diff options
author | Greg Ungerer <gerg@uclinux.org> | 2009-05-01 03:22:36 -0400 |
---|---|---|
committer | Greg Ungerer <gerg@uclinux.org> | 2009-09-15 19:43:45 -0400 |
commit | 0531d7b36b9894b60ba9c0633993d49a813555ff (patch) | |
tree | 1916b44621090ec407b8ff3590d87a58ac3993db | |
parent | 1985d2538cccdcdb444d03bc5994be82e85e1f60 (diff) |
m68knommu: complete interrupt controller code for the 68360 CPU
Define the interrupt controller structures along with the interrupt
controller code for the 68360 CPU. This brings the interrupt setup
and control into one place for this CPU family.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
-rw-r--r-- | arch/m68knommu/platform/68360/ints.c | 44 |
1 files changed, 29 insertions, 15 deletions
diff --git a/arch/m68knommu/platform/68360/ints.c b/arch/m68knommu/platform/68360/ints.c index c36781157e09..1143f77caca4 100644 --- a/arch/m68knommu/platform/68360/ints.c +++ b/arch/m68knommu/platform/68360/ints.c | |||
@@ -37,11 +37,33 @@ extern void *_ramvec[]; | |||
37 | /* The number of spurious interrupts */ | 37 | /* The number of spurious interrupts */ |
38 | volatile unsigned int num_spurious; | 38 | volatile unsigned int num_spurious; |
39 | 39 | ||
40 | static void intc_irq_unmask(unsigned int irq) | ||
41 | { | ||
42 | pquicc->intr_cimr |= (1 << irq); | ||
43 | } | ||
44 | |||
45 | static void intc_irq_mask(unsigned int irq) | ||
46 | { | ||
47 | pquicc->intr_cimr &= ~(1 << irq); | ||
48 | } | ||
49 | |||
50 | static void intc_irq_ack(unsigned int irq) | ||
51 | { | ||
52 | pquicc->intr_cisr = (1 << irq); | ||
53 | } | ||
54 | |||
55 | static struct irq_chip intc_irq_chip = { | ||
56 | .name = "M68K-INTC", | ||
57 | .mask = intc_irq_mask, | ||
58 | .unmask = intc_irq_unmask, | ||
59 | .ack = intc_irq_ack, | ||
60 | }; | ||
61 | |||
40 | /* | 62 | /* |
41 | * This function should be called during kernel startup to initialize | 63 | * This function should be called during kernel startup to initialize |
42 | * the vector table. | 64 | * the vector table. |
43 | */ | 65 | */ |
44 | void init_vectors(void) | 66 | void init_IRQ(void) |
45 | { | 67 | { |
46 | int i; | 68 | int i; |
47 | int vba = (CPM_VECTOR_BASE<<4); | 69 | int vba = (CPM_VECTOR_BASE<<4); |
@@ -109,20 +131,12 @@ void init_vectors(void) | |||
109 | 131 | ||
110 | /* turn off all CPM interrupts */ | 132 | /* turn off all CPM interrupts */ |
111 | pquicc->intr_cimr = 0x00000000; | 133 | pquicc->intr_cimr = 0x00000000; |
112 | } | ||
113 | |||
114 | void enable_vector(unsigned int irq) | ||
115 | { | ||
116 | pquicc->intr_cimr |= (1 << irq); | ||
117 | } | ||
118 | 134 | ||
119 | void disable_vector(unsigned int irq) | 135 | for (i = 0; (i < NR_IRQS); i++) { |
120 | { | 136 | irq_desc[i].status = IRQ_DISABLED; |
121 | pquicc->intr_cimr &= ~(1 << irq); | 137 | irq_desc[i].action = NULL; |
122 | } | 138 | irq_desc[i].depth = 1; |
123 | 139 | irq_desc[i].chip = &intc_irq_chip; | |
124 | void ack_vector(unsigned int irq) | 140 | } |
125 | { | ||
126 | pquicc->intr_cisr = (1 << irq); | ||
127 | } | 141 | } |
128 | 142 | ||