[IA64] Implement futex primitives

Implement futex_atomic_op_inuser() and futex_atomic_cmpxchg_inatomic() on IA64 in order to fully support all futex functionality. Signed-off-by: Jakub Jelinek <jakub@redhat.com> Signed-off-by: David Woodhouse <dwmw2@infradead.org> Signed-off-by: Tony Luck <tony.luck@intel.com>
author: Jakub Jelinek <jakub@redhat.com> 2006-09-26 17:00:56 -0400
committer: Tony Luck <tony.luck@intel.com> 2006-09-26 17:00:56 -0400
commit: a192dc16000241dc02990a36b6830839b73c44de (patch)
tree: 31c228936a92bab32d950aadce2316cc7abdc39b
parent: fd1dfc6f0165e2ad426665e517103672d6832f90 (diff)
1 files changed, 120 insertions, 2 deletions
diff --git a/include/asm-ia64/futex.h b/include/asm-ia64/futex.h
index 6a332a9f099c..07d77f3a8cbe 100644
--- a/include/asm-ia64/futex.h
+++ b/include/asm-ia64/futex.h
@@ -1,6 +1,124 @@
 #ifndef _ASM_FUTEX_H
 #define _ASM_FUTEX_H
-#include <asm-generic/futex.h>
+#include <linux/futex.h>
+#include <asm/errno.h>
+#include <asm/system.h>
+#include <asm/uaccess.h>
-#endif
+#define __futex_atomic_op1(insn, ret, oldval, uaddr, oparg) \
+do {                                                                    \
+        register unsigned long r8 __asm ("r8") = 0;                     \
+        __asm__ __volatile__(                                           \
+                "       mf;;                                    \n"     \
+                "[1:] " insn ";;                                \n"     \
+                "       .xdata4 \"__ex_table\", 1b-., 2f-.      \n"     \
+                "[2:]"                                                  \
+                : "+r" (r8), "=r" (oldval)                              \
+                : "r" (uaddr), "r" (oparg)                              \
+                : "memory");                                            \
+        ret = r8;                                                       \
+} while (0)
+#define __futex_atomic_op2(insn, ret, oldval, uaddr, oparg) \
+do {                                                                    \
+        register unsigned long r8 __asm ("r8") = 0;                     \
+        int val, newval;                                                \
+        do {                                                            \
+                __asm__ __volatile__(                                   \
+                        "       mf;;                              \n"   \
+                        "[1:]   ld4 %3=[%4];;                     \n"   \
+                        "       mov %2=%3                         \n"   \
+                                insn    ";;                       \n"   \
+                        "       mov ar.ccv=%2;;                   \n"   \
+                        "[2:]   cmpxchg4.acq %1=[%4],%3,ar.ccv;;  \n"   \
+                        "       .xdata4 \"__ex_table\", 1b-., 3f-.\n"   \
+                        "       .xdata4 \"__ex_table\", 2b-., 3f-.\n"   \
+                        "[3:]"                                          \
+                        : "+r" (r8), "=r" (val), "=&r" (oldval),        \
+                           "=&r" (newval)                               \
+                        : "r" (uaddr), "r" (oparg)                      \
+                        : "memory");                                    \
+                if (unlikely (r8))                                      \
+                        break;                                          \
+        } while (unlikely (val != oldval));                             \
+        ret = r8;                                                       \
+} while (0)
+static inline int
+futex_atomic_op_inuser (int encoded_op, int __user *uaddr)
+{
+        int op = (encoded_op >> 28) & 7;
+        int cmp = (encoded_op >> 24) & 15;
+        int oparg = (encoded_op << 8) >> 20;
+        int cmparg = (encoded_op << 20) >> 20;
+        int oldval = 0, ret;
+        if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))
+                oparg = 1 << oparg;
+        if (! access_ok (VERIFY_WRITE, uaddr, sizeof(int)))
+                return -EFAULT;
+        inc_preempt_count();
+        switch (op) {
+        case FUTEX_OP_SET:
+                __futex_atomic_op1("xchg4 %1=[%2],%3", ret, oldval, uaddr,
+                                   oparg);
+                break;
+        case FUTEX_OP_ADD:
+                __futex_atomic_op2("add %3=%3,%5", ret, oldval, uaddr, oparg);
+                break;
+        case FUTEX_OP_OR:
+                __futex_atomic_op2("or %3=%3,%5", ret, oldval, uaddr, oparg);
+                break;
+        case FUTEX_OP_ANDN:
+                __futex_atomic_op2("and %3=%3,%5", ret, oldval, uaddr,
+                                   ~oparg);
+                break;
+        case FUTEX_OP_XOR:
+                __futex_atomic_op2("xor %3=%3,%5", ret, oldval, uaddr, oparg);
+                break;
+        default:
+                ret = -ENOSYS;
+        }
+        dec_preempt_count();
+        if (!ret) {
+                switch (cmp) {
+                case FUTEX_OP_CMP_EQ: ret = (oldval == cmparg); break;
+                case FUTEX_OP_CMP_NE: ret = (oldval != cmparg); break;
+                case FUTEX_OP_CMP_LT: ret = (oldval < cmparg); break;
+                case FUTEX_OP_CMP_GE: ret = (oldval >= cmparg); break;
+                case FUTEX_OP_CMP_LE: ret = (oldval <= cmparg); break;
+                case FUTEX_OP_CMP_GT: ret = (oldval > cmparg); break;
+                default: ret = -ENOSYS;
+                }
+        }
+        return ret;
+}
+static inline int
+futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval, int newval)
+{
+        if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int)))
+                return -EFAULT;
+        {
+                register unsigned long r8 __asm ("r8");
+                __asm__ __volatile__(
+                        "       mf;;                                    \n"
+                        "       mov ar.ccv=%3;;                         \n"
+                        "[1:]   cmpxchg4.acq %0=[%1],%2,ar.ccv          \n"
+                        "       .xdata4 \"__ex_table\", 1b-., 2f-.      \n"
+                        "[2:]"
+                        : "=r" (r8)
+                        : "r" (uaddr), "r" (newval),
+                          "rO" ((long) (unsigned) oldval)
+                        : "memory");
+                return r8;
+        }
+}
+#endif /* _ASM_FUTEX_H */
author	Jakub Jelinek <jakub@redhat.com>	2006-09-26 17:00:56 -0400
committer	Tony Luck <tony.luck@intel.com>	2006-09-26 17:00:56 -0400
commit	a192dc16000241dc02990a36b6830839b73c44de (patch)
tree	31c228936a92bab32d950aadce2316cc7abdc39b
parent	fd1dfc6f0165e2ad426665e517103672d6832f90 (diff)

diff --git a/include/asm-ia64/futex.h b/include/asm-ia64/futex.h index 6a332a9f099c..07d77f3a8cbe 100644 --- a/include/asm-ia64/futex.h +++ b/include/asm-ia64/futex.h
@@ -1,6 +1,124 @@
1	#ifndef _ASM_FUTEX_H	1	#ifndef _ASM_FUTEX_H
2	#define _ASM_FUTEX_H	2	#define _ASM_FUTEX_H
3		3
4	#include <asm-generic/futex.h>	4	#include <linux/futex.h>
		5	#include <asm/errno.h>
		6	#include <asm/system.h>
		7	#include <asm/uaccess.h>
5		8
6	#endif	9	#define __futex_atomic_op1(insn, ret, oldval, uaddr, oparg) \
		10	do { \
		11	register unsigned long r8 __asm ("r8") = 0; \
		12	__asm__ __volatile__( \
		13	" mf;; \n" \
		14	"[1:] " insn ";; \n" \
		15	" .xdata4 \"__ex_table\", 1b-., 2f-. \n" \
		16	"[2:]" \
		17	: "+r" (r8), "=r" (oldval) \
		18	: "r" (uaddr), "r" (oparg) \
		19	: "memory"); \
		20	ret = r8; \
		21	} while (0)
		22
		23	#define __futex_atomic_op2(insn, ret, oldval, uaddr, oparg) \
		24	do { \
		25	register unsigned long r8 __asm ("r8") = 0; \
		26	int val, newval; \
		27	do { \
		28	__asm__ __volatile__( \
		29	" mf;; \n" \
		30	"[1:] ld4 %3=[%4];; \n" \
		31	" mov %2=%3 \n" \
		32	insn ";; \n" \
		33	" mov ar.ccv=%2;; \n" \
		34	"[2:] cmpxchg4.acq %1=[%4],%3,ar.ccv;; \n" \
		35	" .xdata4 \"__ex_table\", 1b-., 3f-.\n" \
		36	" .xdata4 \"__ex_table\", 2b-., 3f-.\n" \
		37	"[3:]" \
		38	: "+r" (r8), "=r" (val), "=&r" (oldval), \
		39	"=&r" (newval) \
		40	: "r" (uaddr), "r" (oparg) \
		41	: "memory"); \
		42	if (unlikely (r8)) \
		43	break; \
		44	} while (unlikely (val != oldval)); \
		45	ret = r8; \
		46	} while (0)
		47
		48	static inline int
		49	futex_atomic_op_inuser (int encoded_op, int __user *uaddr)
		50	{
		51	int op = (encoded_op >> 28) & 7;
		52	int cmp = (encoded_op >> 24) & 15;
		53	int oparg = (encoded_op << 8) >> 20;
		54	int cmparg = (encoded_op << 20) >> 20;
		55	int oldval = 0, ret;
		56	if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))
		57	oparg = 1 << oparg;
		58
		59	if (! access_ok (VERIFY_WRITE, uaddr, sizeof(int)))
		60	return -EFAULT;
		61
		62	inc_preempt_count();
		63
		64	switch (op) {
		65	case FUTEX_OP_SET:
		66	__futex_atomic_op1("xchg4 %1=[%2],%3", ret, oldval, uaddr,
		67	oparg);
		68	break;
		69	case FUTEX_OP_ADD:
		70	__futex_atomic_op2("add %3=%3,%5", ret, oldval, uaddr, oparg);
		71	break;
		72	case FUTEX_OP_OR:
		73	__futex_atomic_op2("or %3=%3,%5", ret, oldval, uaddr, oparg);
		74	break;
		75	case FUTEX_OP_ANDN:
		76	__futex_atomic_op2("and %3=%3,%5", ret, oldval, uaddr,
		77	~oparg);
		78	break;
		79	case FUTEX_OP_XOR:
		80	__futex_atomic_op2("xor %3=%3,%5", ret, oldval, uaddr, oparg);
		81	break;
		82	default:
		83	ret = -ENOSYS;
		84	}
		85
		86	dec_preempt_count();
		87
		88	if (!ret) {
		89	switch (cmp) {
		90	case FUTEX_OP_CMP_EQ: ret = (oldval == cmparg); break;
		91	case FUTEX_OP_CMP_NE: ret = (oldval != cmparg); break;
		92	case FUTEX_OP_CMP_LT: ret = (oldval < cmparg); break;
		93	case FUTEX_OP_CMP_GE: ret = (oldval >= cmparg); break;
		94	case FUTEX_OP_CMP_LE: ret = (oldval <= cmparg); break;
		95	case FUTEX_OP_CMP_GT: ret = (oldval > cmparg); break;
		96	default: ret = -ENOSYS;
		97	}
		98	}
		99	return ret;
		100	}
		101
		102	static inline int
		103	futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval, int newval)
		104	{
		105	if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int)))
		106	return -EFAULT;
		107
		108	{
		109	register unsigned long r8 __asm ("r8");
		110	__asm__ __volatile__(
		111	" mf;; \n"
		112	" mov ar.ccv=%3;; \n"
		113	"[1:] cmpxchg4.acq %0=[%1],%2,ar.ccv \n"
		114	" .xdata4 \"__ex_table\", 1b-., 2f-. \n"
		115	"[2:]"
		116	: "=r" (r8)
		117	: "r" (uaddr), "r" (newval),
		118	"rO" ((long) (unsigned) oldval)
		119	: "memory");
		120	return r8;
		121	}
		122	}
		123
		124	#endif /* _ASM_FUTEX_H */