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authorPaul Mundt <lethal@linux-sh.org>2006-09-27 01:31:40 -0400
committerPaul Mundt <lethal@linux-sh.org>2006-09-27 01:31:40 -0400
commit5b19c9081fbd0882c936ec087bf9055a20251dec (patch)
tree3bfb5779699b485fcf524ea34dd227e42f74ae78
parent555ef1963029d19d2367acd09f6b9a6a0056f217 (diff)
sh: Support for SH7770/SH7780 CPU subtypes.
Merge support for SH7770 and SH7780 SH-4A subtypes. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat
-rw-r--r--arch/sh/kernel/cpu/sh4/ex.S164
-rw-r--r--arch/sh/kernel/cpu/sh4/probe.c15
-rw-r--r--arch/sh/kernel/cpu/sh4/sq.c2
-rw-r--r--arch/sh/mm/tlb-sh4.c4
-rw-r--r--include/asm-sh/bugs.h4
-rw-r--r--include/asm-sh/cpu-sh4/cache.h2
6 files changed, 191 insertions, 0 deletions
diff --git a/arch/sh/kernel/cpu/sh4/ex.S b/arch/sh/kernel/cpu/sh4/ex.S
index 26a27df06505..af5ecbddea55 100644
--- a/arch/sh/kernel/cpu/sh4/ex.S
+++ b/arch/sh/kernel/cpu/sh4/ex.S
@@ -72,6 +72,7 @@ ENTRY(interrupt_table)
72 .long do_IRQ ! 1110 72 .long do_IRQ ! 1110
73 .long exception_error 73 .long exception_error
74 ! Internal hardware 74 ! Internal hardware
75#ifndef CONFIG_CPU_SUBTYPE_SH7780
75 .long do_IRQ ! TMU0 tuni0 /* 400 */ 76 .long do_IRQ ! TMU0 tuni0 /* 400 */
76 .long do_IRQ ! TMU1 tuni1 77 .long do_IRQ ! TMU1 tuni1
77 .long do_IRQ ! TMU2 tuni2 78 .long do_IRQ ! TMU2 tuni2
@@ -379,5 +380,168 @@ ENTRY(interrupt_table)
379 .long exception_error ! 141 0x13a0 380 .long exception_error ! 141 0x13a0
380 .long exception_error ! 142 0x13c0 381 .long exception_error ! 142 0x13c0
381 .long exception_error ! 143 0x13e0 382 .long exception_error ! 143 0x13e0
383#elif defined(CONFIG_CPU_SUBTYPE_SH7770)
384 .long do_IRQ ! 50 0x840
385 .long do_IRQ ! 51 0x860
386 .long do_IRQ ! 52 0x880
387 .long do_IRQ ! 53 0x8a0
388 .long do_IRQ ! 54 0x8c0
389 .long do_IRQ ! 55 0x8e0
390 .long do_IRQ ! 56 0x900
391 .long do_IRQ ! 57 0x920
392 .long do_IRQ ! 58 0x940
393 .long do_IRQ ! 59 0x960
394 .long do_IRQ ! 60 0x980
395 .long do_IRQ ! 61 0x9a0
396 .long do_IRQ ! 62 0x9c0
397 .long do_IRQ ! 63 0x9e0
398 .long do_IRQ ! 64 0xa00
399 .long do_IRQ ! 65 0xa20
400 .long do_IRQ ! 66 0xa4d
401 .long do_IRQ ! 67 0xa60
402 .long do_IRQ ! 68 0xa80
403 .long do_IRQ ! 69 0xaa0
404 .long do_IRQ ! 70 0xac0
405 .long do_IRQ ! 71 0xae0
406 .long do_IRQ ! 72 0xb00
407 .long do_IRQ ! 73 0xb20
408 .long do_IRQ ! 74 0xb40
409 .long do_IRQ ! 75 0xb60
410 .long do_IRQ ! 76 0xb80
411 .long do_IRQ ! 77 0xba0
412 .long do_IRQ ! 78 0xbc0
413 .long do_IRQ ! 79 0xbe0
414 .long do_IRQ ! 80 0xc00
415 .long do_IRQ ! 81 0xc20
416 .long do_IRQ ! 82 0xc40
417 .long do_IRQ ! 83 0xc60
418 .long do_IRQ ! 84 0xc80
419 .long do_IRQ ! 85 0xca0
420 .long do_IRQ ! 86 0xcc0
421 .long do_IRQ ! 87 0xce0
422 .long do_IRQ ! 88 0xd00
423 .long do_IRQ ! 89 0xd20
424 .long do_IRQ ! 90 0xd40
425 .long do_IRQ ! 91 0xd60
426 .long do_IRQ ! 92 0xd80
427 .long do_IRQ ! 93 0xda0
428 .long do_IRQ ! 94 0xdc0
429 .long do_IRQ ! 95 0xde0
430 .long do_IRQ ! 96 0xe00
431 .long do_IRQ ! 97 0xe20
432 .long do_IRQ ! 98 0xe40
433 .long do_IRQ ! 99 0xe60
434 .long do_IRQ ! 100 0xe80
435 .long do_IRQ ! 101 0xea0
436 .long do_IRQ ! 102 0xec0
437 .long do_IRQ ! 103 0xee0
438 .long do_IRQ ! 104 0xf00
439 .long do_IRQ ! 105 0xf20
440 .long do_IRQ ! 106 0xf40
441 .long do_IRQ ! 107 0xf60
442 .long do_IRQ ! 108 0xf80
443#endif
444#else
445 .long exception_error /* 400 */
446 .long exception_error
447 .long exception_error
448 .long exception_error
449 .long do_IRQ ! RTC ati
450 .long do_IRQ ! pri
451 .long do_IRQ ! cui
452 .long exception_error
453 .long exception_error /* 500 */
454 .long exception_error
455 .long exception_error
456 .long do_IRQ ! WDT iti /* 560 */
457 .long do_IRQ ! TMU-ch0
458 .long do_IRQ ! TMU-ch1
459 .long do_IRQ ! TMU-ch2
460 .long do_IRQ ! ticpi2 /* 5E0 */
461 .long do_IRQ ! 32 Hitachi UDI /* 600 */
462 .long exception_error
463 .long do_IRQ ! 34 DMAC dmte0
464 .long do_IRQ ! 35 dmte1
465 .long do_IRQ ! 36 dmte2
466 .long do_IRQ ! 37 dmte3
467 .long do_IRQ ! 38 dmae
468 .long exception_error ! 39 /* 6E0 */
469 .long do_IRQ ! 40 SCIF-ch0 eri /* 700 */
470 .long do_IRQ ! 41 rxi
471 .long do_IRQ ! 42 bri
472 .long do_IRQ ! 43 txi
473 .long do_IRQ ! 44 DMAC dmte4 /* 780 */
474 .long do_IRQ ! 45 dmte5
475 .long do_IRQ ! 46 dmte6
476 .long do_IRQ ! 47 dmte7 /* 7E0 */
477#if defined(CONFIG_SH_FPU)
478 .long do_fpu_state_restore ! 48 /* 800 */
479 .long do_fpu_state_restore ! 49 /* 820 */
480#else
481 .long exception_error
482 .long exception_error
483#endif
484 .long exception_error /* 840 */
485 .long exception_error
486 .long exception_error
487 .long exception_error
488 .long exception_error
489 .long exception_error
490 .long do_IRQ ! 56 CMT /* 900 */
491 .long exception_error
492 .long exception_error
493 .long exception_error
494 .long do_IRQ ! 60 HAC
495 .long exception_error
496 .long exception_error
497 .long exception_error
498 .long do_IRQ ! PCI serr /* A00 */
499 .long do_IRQ ! INTA
500 .long do_IRQ ! INTB
501 .long do_IRQ ! INTC
502 .long do_IRQ ! INTD
503 .long do_IRQ ! err
504 .long do_IRQ ! pwd3
505 .long do_IRQ ! pwd2
506 .long do_IRQ ! pwd1 /* B00 */
507 .long do_IRQ ! pwd0
508 .long exception_error
509 .long exception_error
510 .long do_IRQ ! SCIF-ch1 eri /* B80 */
511 .long do_IRQ ! rxi
512 .long do_IRQ ! bri
513 .long do_IRQ ! txi
514 .long do_IRQ ! SIOF /* C00 */
515 .long exception_error
516 .long exception_error
517 .long exception_error
518 .long do_IRQ ! HSPI /* C80 */
519 .long exception_error
520 .long exception_error
521 .long exception_error
522 .long do_IRQ ! MMCIF fatat /* D00 */
523 .long do_IRQ ! tran
524 .long do_IRQ ! err
525 .long do_IRQ ! frdy
526 .long do_IRQ ! DMAC dmint8 /* D80 */
527 .long do_IRQ ! dmint9
528 .long do_IRQ ! dmint10
529 .long do_IRQ ! dmint11
530 .long do_IRQ ! TMU-ch3 /* E00 */
531 .long do_IRQ ! TMU-ch4
532 .long do_IRQ ! TMU-ch5
533 .long exception_error
534 .long do_IRQ ! SSI
535 .long exception_error
536 .long exception_error
537 .long exception_error
538 .long do_IRQ ! FLCTL flste /* F00 */
539 .long do_IRQ ! fltend
540 .long do_IRQ ! fltrq0
541 .long do_IRQ ! fltrq1
542 .long do_IRQ ! GPIO gpioi0 /* F80 */
543 .long do_IRQ ! gpioi1
544 .long do_IRQ ! gpioi2
545 .long do_IRQ ! gpioi3
382#endif 546#endif
383 547
diff --git a/arch/sh/kernel/cpu/sh4/probe.c b/arch/sh/kernel/cpu/sh4/probe.c
index 89986e70d041..85ff48c1533a 100644
--- a/arch/sh/kernel/cpu/sh4/probe.c
+++ b/arch/sh/kernel/cpu/sh4/probe.c
@@ -78,6 +78,21 @@ int __init detect_cpu_and_cache_system(void)
78 cpu_data->dcache.ways = 4; 78 cpu_data->dcache.ways = 4;
79 cpu_data->flags &= ~CPU_HAS_FPU; 79 cpu_data->flags &= ~CPU_HAS_FPU;
80 break; 80 break;
81 case 0x2001:
82 case 0x2004:
83 cpu_data->type = CPU_SH7770;
84 cpu_data->icache.ways = 4;
85 cpu_data->dcache.ways = 4;
86 break;
87 case 0x2006:
88 case 0x200A:
89 if (prr == 0x61)
90 cpu_data->type = CPU_SH7781;
91 else
92 cpu_data->type = CPU_SH7780;
93 cpu_data->icache.ways = 4;
94 cpu_data->dcache.ways = 4;
95 break;
81 case 0x8000: 96 case 0x8000:
82 cpu_data->type = CPU_ST40RA; 97 cpu_data->type = CPU_ST40RA;
83 break; 98 break;
diff --git a/arch/sh/kernel/cpu/sh4/sq.c b/arch/sh/kernel/cpu/sh4/sq.c
index 00f6a3c8c43b..32c93b781b51 100644
--- a/arch/sh/kernel/cpu/sh4/sq.c
+++ b/arch/sh/kernel/cpu/sh4/sq.c
@@ -166,7 +166,9 @@ static struct sq_mapping *__sq_remap(struct sq_mapping *map)
166 ctrl_outl((pteh & MMU_VPN_MASK) | get_asid(), MMU_PTEH); 166 ctrl_outl((pteh & MMU_VPN_MASK) | get_asid(), MMU_PTEH);
167 167
168 ptel = map->addr & PAGE_MASK; 168 ptel = map->addr & PAGE_MASK;
169#ifndef CONFIG_CPU_SUBTYPE_SH7780
169 ctrl_outl(((ptel >> 28) & 0xe) | (ptel & 0x1), MMU_PTEA); 170 ctrl_outl(((ptel >> 28) & 0xe) | (ptel & 0x1), MMU_PTEA);
171#endif
170 172
171 pgprot = pgprot_noncached(PAGE_KERNEL); 173 pgprot = pgprot_noncached(PAGE_KERNEL);
172 174
diff --git a/arch/sh/mm/tlb-sh4.c b/arch/sh/mm/tlb-sh4.c
index 115b1b6be40b..96e5fb0ac4fa 100644
--- a/arch/sh/mm/tlb-sh4.c
+++ b/arch/sh/mm/tlb-sh4.c
@@ -36,7 +36,9 @@ void update_mmu_cache(struct vm_area_struct * vma,
36 unsigned long vpn; 36 unsigned long vpn;
37 struct page *page; 37 struct page *page;
38 unsigned long pfn; 38 unsigned long pfn;
39#ifndef CONFIG_CPU_SUBTYPE_SH7780
39 unsigned long ptea; 40 unsigned long ptea;
41#endif
40 42
41 /* Ptrace may call this routine. */ 43 /* Ptrace may call this routine. */
42 if (vma && current->active_mm != vma->vm_mm) 44 if (vma && current->active_mm != vma->vm_mm)
@@ -59,10 +61,12 @@ void update_mmu_cache(struct vm_area_struct * vma,
59 ctrl_outl(vpn, MMU_PTEH); 61 ctrl_outl(vpn, MMU_PTEH);
60 62
61 pteval = pte_val(pte); 63 pteval = pte_val(pte);
64#ifndef CONFIG_CPU_SUBTYPE_SH7780
62 /* Set PTEA register */ 65 /* Set PTEA register */
63 /* TODO: make this look less hacky */ 66 /* TODO: make this look less hacky */
64 ptea = ((pteval >> 28) & 0xe) | (pteval & 0x1); 67 ptea = ((pteval >> 28) & 0xe) | (pteval & 0x1);
65 ctrl_outl(ptea, MMU_PTEA); 68 ctrl_outl(ptea, MMU_PTEA);
69#endif
66 70
67 /* Set PTEL register */ 71 /* Set PTEL register */
68 pteval &= _PAGE_FLAGS_HARDWARE_MASK; /* drop software flags */ 72 pteval &= _PAGE_FLAGS_HARDWARE_MASK; /* drop software flags */
diff --git a/include/asm-sh/bugs.h b/include/asm-sh/bugs.h
index a6de3d06a3d9..b4000c8bf31b 100644
--- a/include/asm-sh/bugs.h
+++ b/include/asm-sh/bugs.h
@@ -32,6 +32,10 @@ static void __init check_bugs(void)
32 case CPU_SH7750 ... CPU_SH4_501: 32 case CPU_SH7750 ... CPU_SH4_501:
33 *p++ = '4'; 33 *p++ = '4';
34 break; 34 break;
35 case CPU_SH7770 ... CPU_SH7781:
36 *p++ = '4';
37 *p++ = 'a';
38 break;
35 default: 39 default:
36 *p++ = '?'; 40 *p++ = '?';
37 *p++ = '!'; 41 *p++ = '!';
diff --git a/include/asm-sh/cpu-sh4/cache.h b/include/asm-sh/cpu-sh4/cache.h
index 1fe20359312c..6e9c7e6ee8e4 100644
--- a/include/asm-sh/cpu-sh4/cache.h
+++ b/include/asm-sh/cpu-sh4/cache.h
@@ -22,7 +22,9 @@
22#define CCR_CACHE_ICE 0x0100 /* Instruction Cache Enable */ 22#define CCR_CACHE_ICE 0x0100 /* Instruction Cache Enable */
23#define CCR_CACHE_ICI 0x0800 /* IC Invalidate */ 23#define CCR_CACHE_ICI 0x0800 /* IC Invalidate */
24#define CCR_CACHE_IIX 0x8000 /* IC Index Enable */ 24#define CCR_CACHE_IIX 0x8000 /* IC Index Enable */
25#ifndef CONFIG_CPU_SUBTYPE_SH7780
25#define CCR_CACHE_EMODE 0x80000000 /* EMODE Enable */ 26#define CCR_CACHE_EMODE 0x80000000 /* EMODE Enable */
27#endif
26 28
27/* Default CCR setup: 8k+16k-byte cache,P1-wb,enable */ 29/* Default CCR setup: 8k+16k-byte cache,P1-wb,enable */
28#define CCR_CACHE_ENABLE (CCR_CACHE_OCE|CCR_CACHE_ICE) 30#define CCR_CACHE_ENABLE (CCR_CACHE_OCE|CCR_CACHE_ICE)
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