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authorRalf Baechle <ralf@linux-mips.org>2007-07-10 12:33:01 -0400
committerRalf Baechle <ralf@linux-mips.org>2007-07-10 12:33:01 -0400
commite7c4782f92fc4b83d953ce53f77f05ae65dcd773 (patch)
tree8b72472f8653ed55593f52fc10e7eaa9b7b31f1b
parent192cca6ef2c49ac5ff46f7a31cb9dd175995658e (diff)
[MIPS] Put an end to <asm/serial.h>'s long and annyoing existence
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat
-rw-r--r--arch/mips/Kconfig1
-rw-r--r--arch/mips/ddb5xxx/ddb5477/Makefile3
-rw-r--r--arch/mips/ddb5xxx/ddb5477/ddb5477-platform.c49
-rw-r--r--arch/mips/gt64120/momenco_ocelot/Makefile2
-rw-r--r--arch/mips/gt64120/momenco_ocelot/ocelot-platform.c46
-rw-r--r--arch/mips/jazz/Makefile2
-rw-r--r--arch/mips/jazz/jazz-platform.c60
-rw-r--r--arch/mips/kernel/8250-platform.c47
-rw-r--r--arch/mips/kernel/Makefile2
-rw-r--r--arch/mips/mips-boards/malta/Makefile3
-rw-r--r--arch/mips/mips-boards/malta/malta_platform.c65
-rw-r--r--arch/mips/momentum/ocelot_3/platform.c44
-rw-r--r--arch/mips/sgi-ip32/ip32-platform.c52
-rw-r--r--arch/mips/sgi-ip32/ip32-setup.c36
-rw-r--r--include/asm-mips/serial.h110
15 files changed, 371 insertions, 151 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index cba171a5eb03..624c31cd8077 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -155,7 +155,6 @@ config MIPS_MALTA
155 bool "MIPS Malta board" 155 bool "MIPS Malta board"
156 select ARCH_MAY_HAVE_PC_FDC 156 select ARCH_MAY_HAVE_PC_FDC
157 select BOOT_ELF32 157 select BOOT_ELF32
158 select HAVE_STD_PC_SERIAL_PORT
159 select DMA_NONCOHERENT 158 select DMA_NONCOHERENT
160 select GENERIC_ISA_DMA 159 select GENERIC_ISA_DMA
161 select IRQ_CPU 160 select IRQ_CPU
diff --git a/arch/mips/ddb5xxx/ddb5477/Makefile b/arch/mips/ddb5xxx/ddb5477/Makefile
index 23fd3b81fe1a..4864b8a659c7 100644
--- a/arch/mips/ddb5xxx/ddb5477/Makefile
+++ b/arch/mips/ddb5xxx/ddb5477/Makefile
@@ -2,7 +2,8 @@
2# Makefile for NEC DDB-Vrc5477 board 2# Makefile for NEC DDB-Vrc5477 board
3# 3#
4 4
5obj-y += irq.o irq_5477.o setup.o lcd44780.o 5obj-y += ddb5477-platform.o irq.o irq_5477.o setup.o \
6 lcd44780.o
6 7
7obj-$(CONFIG_RUNTIME_DEBUG) += debug.o 8obj-$(CONFIG_RUNTIME_DEBUG) += debug.o
8obj-$(CONFIG_KGDB) += kgdb_io.o 9obj-$(CONFIG_KGDB) += kgdb_io.o
diff --git a/arch/mips/ddb5xxx/ddb5477/ddb5477-platform.c b/arch/mips/ddb5xxx/ddb5477/ddb5477-platform.c
new file mode 100644
index 000000000000..c16020ad54c2
--- /dev/null
+++ b/arch/mips/ddb5xxx/ddb5477/ddb5477-platform.c
@@ -0,0 +1,49 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2007 Ralf Baechle (ralf@linux-mips.org)
7 */
8#include <linux/init.h>
9#include <linux/module.h>
10#include <linux/serial_8250.h>
11
12#include <asm/ddb5xxx/ddb5477.h>
13
14#define DDB_UART_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP)
15
16#define DDB5477_PORT(base, int) \
17{ \
18 .mapbase = base, \
19 .irq = int, \
20 .uartclk = 1843200, \
21 .iotype = UPIO_MEM, \
22 .flags = DDB_UART_FLAGS, \
23 .regshift = 3, \
24}
25
26static struct plat_serial8250_port uart8250_data[] = {
27 DDB5477_PORT(0xbfa04200, VRC5477_IRQ_UART0),
28 DDB5477_PORT(0xbfa04240, VRC5477_IRQ_UART1),
29 { },
30};
31
32static struct platform_device uart8250_device = {
33 .name = "serial8250",
34 .id = PLAT8250_DEV_PLATFORM,
35 .dev = {
36 .platform_data = uart8250_data,
37 },
38};
39
40static int __init uart8250_init(void)
41{
42 return platform_device_register(&uart8250_device);
43}
44
45module_init(uart8250_init);
46
47MODULE_AUTHOR("Ralf Baechle <ralf@linux-mips.org>");
48MODULE_LICENSE("GPL");
49MODULE_DESCRIPTION("8250 UART probe driver for the NEC DDB5477");
diff --git a/arch/mips/gt64120/momenco_ocelot/Makefile b/arch/mips/gt64120/momenco_ocelot/Makefile
index 9f9a33fc76b9..1df5fe23c642 100644
--- a/arch/mips/gt64120/momenco_ocelot/Makefile
+++ b/arch/mips/gt64120/momenco_ocelot/Makefile
@@ -2,6 +2,6 @@
2# Makefile for Momentum's Ocelot board. 2# Makefile for Momentum's Ocelot board.
3# 3#
4 4
5obj-y += irq.o prom.o reset.o setup.o 5obj-y += irq.o ocelot-platform.o prom.o reset.o setup.o
6 6
7obj-$(CONFIG_KGDB) += dbg_io.o 7obj-$(CONFIG_KGDB) += dbg_io.o
diff --git a/arch/mips/gt64120/momenco_ocelot/ocelot-platform.c b/arch/mips/gt64120/momenco_ocelot/ocelot-platform.c
new file mode 100644
index 000000000000..81d9031a5a2a
--- /dev/null
+++ b/arch/mips/gt64120/momenco_ocelot/ocelot-platform.c
@@ -0,0 +1,46 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2007 Ralf Baechle (ralf@linux-mips.org)
7 *
8 * A NS16552 DUART with a 20MHz crystal.
9 *
10 */
11#include <linux/module.h>
12#include <linux/init.h>
13#include <linux/serial_8250.h>
14
15#define OCELOT_UART_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP)
16
17static struct plat_serial8250_port uart8250_data[] = {
18 {
19 .mapbase = 0xe0001020,
20 .irq = 4,
21 .uartclk = 20000000,
22 .iotype = UPIO_MEM,
23 .flags = OCELOT_UART_FLAGS,
24 .regshift = 2,
25 },
26 { },
27};
28
29static struct platform_device uart8250_device = {
30 .name = "serial8250",
31 .id = PLAT8250_DEV_PLATFORM,
32 .dev = {
33 .platform_data = uart8250_data,
34 },
35};
36
37static int __init uart8250_init(void)
38{
39 return platform_device_register(&uart8250_device);
40}
41
42module_init(uart8250_init);
43
44MODULE_AUTHOR("Ralf Baechle <ralf@linux-mips.org>");
45MODULE_LICENSE("GPL");
46MODULE_DESCRIPTION("8250 UART probe driver for the Momenco Ocelot");
diff --git a/arch/mips/jazz/Makefile b/arch/mips/jazz/Makefile
index dd9d99bfcf7a..ae4c402b5004 100644
--- a/arch/mips/jazz/Makefile
+++ b/arch/mips/jazz/Makefile
@@ -2,4 +2,4 @@
2# Makefile for the Jazz family specific parts of the kernel 2# Makefile for the Jazz family specific parts of the kernel
3# 3#
4 4
5obj-y := irq.o jazzdma.o reset.o setup.o 5obj-y := irq.o jazzdma.o jazz-platform.o reset.o setup.o
diff --git a/arch/mips/jazz/jazz-platform.c b/arch/mips/jazz/jazz-platform.c
new file mode 100644
index 000000000000..fd736703eef2
--- /dev/null
+++ b/arch/mips/jazz/jazz-platform.c
@@ -0,0 +1,60 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2007 Ralf Baechle (ralf@linux-mips.org)
7 */
8#include <linux/init.h>
9#include <linux/module.h>
10#include <linux/serial_8250.h>
11
12#include <asm/jazz.h>
13
14/*
15 * Confusion ... It seems the original Microsoft Jazz machine used to have a
16 * 4.096MHz clock for its UART while the MIPS Magnum and Millenium systems
17 * had 8MHz. The Olivetti M700-10 and the Acer PICA have 1.8432MHz like PCs.
18 */
19#ifdef CONFIG_OLIVETTI_M700
20#define JAZZ_BASE_BAUD 1843200
21#else
22#define JAZZ_BASE_BAUD 8000000 /* 3072000 */
23#endif
24
25#define JAZZ_UART_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP)
26
27#define JAZZ_PORT(base, int) \
28{ \
29 .mapbase = base, \
30 .irq = int, \
31 .uartclk = JAZZ_BASE_BAUD, \
32 .iotype = UPIO_MEM, \
33 .flags = JAZZ_UART_FLAGS, \
34 .regshift = 0, \
35}
36
37static struct plat_serial8250_port uart8250_data[] = {
38 JAZZ_PORT(JAZZ_SERIAL1_BASE, JAZZ_SERIAL1_IRQ),
39 JAZZ_PORT(JAZZ_SERIAL2_BASE, JAZZ_SERIAL2_IRQ),
40 { },
41};
42
43static struct platform_device uart8250_device = {
44 .name = "serial8250",
45 .id = PLAT8250_DEV_PLATFORM,
46 .dev = {
47 .platform_data = uart8250_data,
48 },
49};
50
51static int __init uart8250_init(void)
52{
53 return platform_device_register(&uart8250_device);
54}
55
56module_init(uart8250_init);
57
58MODULE_AUTHOR("Ralf Baechle <ralf@linux-mips.org>");
59MODULE_LICENSE("GPL");
60MODULE_DESCRIPTION("8250 UART probe driver for the Jazz family");
diff --git a/arch/mips/kernel/8250-platform.c b/arch/mips/kernel/8250-platform.c
new file mode 100644
index 000000000000..cbf3fe20ad17
--- /dev/null
+++ b/arch/mips/kernel/8250-platform.c
@@ -0,0 +1,47 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2007 Ralf Baechle (ralf@linux-mips.org)
7 */
8#include <linux/module.h>
9#include <linux/init.h>
10#include <linux/serial_8250.h>
11
12#define PORT(base, int) \
13{ \
14 .iobase = base, \
15 .irq = int, \
16 .uartclk = 1843200, \
17 .iotype = UPIO_PORT, \
18 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, \
19 .regshift = 0, \
20}
21
22static struct plat_serial8250_port uart8250_data[] = {
23 PORT(0x3F8, 4),
24 PORT(0x2F8, 3),
25 PORT(0x3E8, 4),
26 PORT(0x2E8, 3),
27 { },
28};
29
30static struct platform_device uart8250_device = {
31 .name = "serial8250",
32 .id = PLAT8250_DEV_PLATFORM,
33 .dev = {
34 .platform_data = uart8250_data,
35 },
36};
37
38static int __init uart8250_init(void)
39{
40 return platform_device_register(&uart8250_device);
41}
42
43module_init(uart8250_init);
44
45MODULE_AUTHOR("Ralf Baechle <ralf@linux-mips.org>");
46MODULE_LICENSE("GPL");
47MODULE_DESCRIPTION("Generic 8250 UART probe driver");
diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile
index 49246264cc7c..bb25dd8ce437 100644
--- a/arch/mips/kernel/Makefile
+++ b/arch/mips/kernel/Makefile
@@ -68,3 +68,5 @@ obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o
68obj-$(CONFIG_EARLY_PRINTK) += early_printk.o 68obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
69 69
70CFLAGS_cpu-bugs64.o = $(shell if $(CC) $(CFLAGS) -Wa,-mdaddi -c -o /dev/null -xc /dev/null >/dev/null 2>&1; then echo "-DHAVE_AS_SET_DADDI"; fi) 70CFLAGS_cpu-bugs64.o = $(shell if $(CC) $(CFLAGS) -Wa,-mdaddi -c -o /dev/null -xc /dev/null >/dev/null 2>&1; then echo "-DHAVE_AS_SET_DADDI"; fi)
71
72obj-$(CONFIG_HAVE_STD_PC_SERIAL_PORT) += 8250-platform.o
diff --git a/arch/mips/mips-boards/malta/Makefile b/arch/mips/mips-boards/malta/Makefile
index 377d9e8f250a..a242b0fc377d 100644
--- a/arch/mips/mips-boards/malta/Makefile
+++ b/arch/mips/mips-boards/malta/Makefile
@@ -19,6 +19,7 @@
19# under Linux. 19# under Linux.
20# 20#
21 21
22obj-y := malta_int.o malta_setup.o 22obj-y := malta_int.o malta_platform.o malta_setup.o
23
23obj-$(CONFIG_MTD) += malta_mtd.o 24obj-$(CONFIG_MTD) += malta_mtd.o
24obj-$(CONFIG_MIPS_MT_SMTC) += malta_smtc.o 25obj-$(CONFIG_MIPS_MT_SMTC) += malta_smtc.o
diff --git a/arch/mips/mips-boards/malta/malta_platform.c b/arch/mips/mips-boards/malta/malta_platform.c
new file mode 100644
index 000000000000..83b9bab3cd3f
--- /dev/null
+++ b/arch/mips/mips-boards/malta/malta_platform.c
@@ -0,0 +1,65 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2007 MIPS Technologies, Inc.
7 * written by Ralf Baechle (ralf@linux-mips.org)
8 *
9 * Probe driver for the Malta's UART ports:
10 *
11 * o 2 ports in the SMC SuperIO
12 * o 1 port in the CBUS UART, a discrete 16550 which normally is only used
13 * for bringups.
14 *
15 * We don't use 8250_platform.c on Malta as it would result in the CBUS
16 * UART becoming ttyS0.
17 */
18#include <linux/module.h>
19#include <linux/init.h>
20#include <linux/serial_8250.h>
21
22#define SMC_PORT(base, int) \
23{ \
24 .iobase = base, \
25 .irq = int, \
26 .uartclk = 1843200, \
27 .iotype = UPIO_PORT, \
28 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, \
29 .regshift = 0, \
30}
31
32#define CBUS_UART_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP)
33
34static struct plat_serial8250_port uart8250_data[] = {
35 SMC_PORT(0x3F8, 4),
36 SMC_PORT(0x2F8, 3),
37 {
38 .mapbase = 0x1f000900, /* The CBUS UART */
39 .irq = MIPS_CPU_IRQ_BASE + 2,
40 .uartclk = 3686400, /* Twice the usual clk! */
41 .iotype = UPIO_MEM32,
42 .flags = CBUS_UART_FLAGS,
43 .regshift = 3,
44 },
45 { },
46};
47
48static struct platform_device uart8250_device = {
49 .name = "serial8250",
50 .id = PLAT8250_DEV_PLATFORM2,
51 .dev = {
52 .platform_data = uart8250_data,
53 },
54};
55
56static int __init uart8250_init(void)
57{
58 return platform_device_register(&uart8250_device);
59}
60
61module_init(uart8250_init);
62
63MODULE_AUTHOR("Ralf Baechle <ralf@linux-mips.org>");
64MODULE_LICENSE("GPL");
65MODULE_DESCRIPTION("8250 UART probe driver for the Malta CBUS UART");
diff --git a/arch/mips/momentum/ocelot_3/platform.c b/arch/mips/momentum/ocelot_3/platform.c
index 44e4c3fc7403..cb63c82ef650 100644
--- a/arch/mips/momentum/ocelot_3/platform.c
+++ b/arch/mips/momentum/ocelot_3/platform.c
@@ -1,8 +1,19 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2006, 07 Ralf Baechle (ralf@linux-mips.org)
7 * Copyright (C) 2007 Dale Farnsworth (dale@farnsworth.org)
8 */
1#include <linux/delay.h> 9#include <linux/delay.h>
2#include <linux/if_ether.h> 10#include <linux/if_ether.h>
11#include <linux/init.h>
3#include <linux/ioport.h> 12#include <linux/ioport.h>
13#include <linux/module.h>
4#include <linux/mv643xx.h> 14#include <linux/mv643xx.h>
5#include <linux/platform_device.h> 15#include <linux/platform_device.h>
16#include <linux/serial_8250.h>
6 17
7#include "ocelot_3_fpga.h" 18#include "ocelot_3_fpga.h"
8 19
@@ -206,3 +217,36 @@ static int __init mv643xx_eth_add_pds(void)
206device_initcall(mv643xx_eth_add_pds); 217device_initcall(mv643xx_eth_add_pds);
207 218
208#endif /* defined(CONFIG_MV643XX_ETH) || defined(CONFIG_MV643XX_ETH_MODULE) */ 219#endif /* defined(CONFIG_MV643XX_ETH) || defined(CONFIG_MV643XX_ETH_MODULE) */
220
221#define OCELOT3_UART_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST)
222
223static struct plat_serial8250_port uart8250_data[] = {
224 {
225 .membase = (signed long) 0xfd000020,
226 .irq = 6,
227 .uartclk = 20000000,
228 .iotype = UPIO_MEM,
229 .flags = OCELOT3_UART_FLAGS,
230 .regshift = 2,
231 },
232 { },
233};
234
235static struct platform_device uart8250_device = {
236 .name = "serial8250",
237 .id = PLAT8250_DEV_PLATFORM,
238 .dev = {
239 .platform_data = uart8250_data,
240 },
241};
242
243static int __init uart8250_init(void)
244{
245 return platform_device_register(&uart8250_device);
246}
247
248module_init(uart8250_init);
249
250MODULE_AUTHOR("Ralf Baechle <ralf@linux-mips.org>");
251MODULE_LICENSE("GPL");
252MODULE_DESCRIPTION("8250 UART probe driver for the Ocelot 3");
diff --git a/arch/mips/sgi-ip32/ip32-platform.c b/arch/mips/sgi-ip32/ip32-platform.c
index 120b15932caf..ba3697ee7ff6 100644
--- a/arch/mips/sgi-ip32/ip32-platform.c
+++ b/arch/mips/sgi-ip32/ip32-platform.c
@@ -1,5 +1,53 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2007 Ralf Baechle (ralf@linux-mips.org)
7 */
8#include <linux/module.h>
1#include <linux/init.h> 9#include <linux/init.h>
2#include <linux/platform_device.h> 10#include <linux/platform_device.h>
11#include <linux/serial_8250.h>
12
13#include <asm/ip32/mace.h>
14#include <asm/ip32/ip32_ints.h>
15
16/*
17 * .iobase isn't a constant (in the sense of C) so we fill it in at runtime.
18 */
19#define MACE_PORT(int) \
20{ \
21 .irq = int, \
22 .uartclk = 1843200, \
23 .iotype = UPIO_MEM, \
24 .flags = UPF_SKIP_TEST, \
25 .regshift = 8, \
26}
27
28static struct plat_serial8250_port uart8250_data[] = {
29 MACE_PORT(MACEISA_SERIAL1_IRQ),
30 MACE_PORT(MACEISA_SERIAL2_IRQ),
31 { },
32};
33
34static struct platform_device uart8250_device = {
35 .name = "serial8250",
36 .id = PLAT8250_DEV_PLATFORM,
37 .dev = {
38 .platform_data = uart8250_data,
39 },
40};
41
42static int __init uart8250_init(void)
43{
44 uart8250_data[0].iobase = (unsigned long) &mace->isa.serial1;
45 uart8250_data[1].iobase = (unsigned long) &mace->isa.serial1;
46
47 return platform_device_register(&uart8250_device);
48}
49
50device_initcall(uart8250_init);
3 51
4static __init int meth_devinit(void) 52static __init int meth_devinit(void)
5{ 53{
@@ -18,3 +66,7 @@ static __init int meth_devinit(void)
18} 66}
19 67
20device_initcall(meth_devinit); 68device_initcall(meth_devinit);
69
70MODULE_AUTHOR("Ralf Baechle <ralf@linux-mips.org>");
71MODULE_LICENSE("GPL");
72MODULE_DESCRIPTION("8250 UART probe driver for SGI IP32 aka O2");
diff --git a/arch/mips/sgi-ip32/ip32-setup.c b/arch/mips/sgi-ip32/ip32-setup.c
index 57708fe28bd7..bbba066cb405 100644
--- a/arch/mips/sgi-ip32/ip32-setup.c
+++ b/arch/mips/sgi-ip32/ip32-setup.c
@@ -62,12 +62,6 @@ static inline void str2eaddr(unsigned char *ea, unsigned char *str)
62} 62}
63#endif 63#endif
64 64
65#ifdef CONFIG_SERIAL_8250
66#include <linux/tty.h>
67#include <linux/serial.h>
68#include <linux/serial_core.h>
69#endif /* CONFIG_SERIAL_8250 */
70
71/* An arbitrary time; this can be decreased if reliability looks good */ 65/* An arbitrary time; this can be decreased if reliability looks good */
72#define WAIT_MS 10 66#define WAIT_MS 10
73 67
@@ -96,36 +90,6 @@ void __init plat_mem_setup(void)
96 90
97 board_time_init = ip32_time_init; 91 board_time_init = ip32_time_init;
98 92
99#ifdef CONFIG_SERIAL_8250
100 {
101 static struct uart_port o2_serial[2];
102
103 memset(o2_serial, 0, sizeof(o2_serial));
104 o2_serial[0].type = PORT_16550A;
105 o2_serial[0].line = 0;
106 o2_serial[0].irq = MACEISA_SERIAL1_IRQ;
107 o2_serial[0].flags = UPF_SKIP_TEST;
108 o2_serial[0].uartclk = 1843200;
109 o2_serial[0].iotype = UPIO_MEM;
110 o2_serial[0].membase = (char *)&mace->isa.serial1;
111 o2_serial[0].fifosize = 14;
112 /* How much to shift register offset by. Each UART register
113 * is replicated over 256 byte space */
114 o2_serial[0].regshift = 8;
115 o2_serial[1].type = PORT_16550A;
116 o2_serial[1].line = 1;
117 o2_serial[1].irq = MACEISA_SERIAL2_IRQ;
118 o2_serial[1].flags = UPF_SKIP_TEST;
119 o2_serial[1].uartclk = 1843200;
120 o2_serial[1].iotype = UPIO_MEM;
121 o2_serial[1].membase = (char *)&mace->isa.serial2;
122 o2_serial[1].fifosize = 14;
123 o2_serial[1].regshift = 8;
124
125 early_serial_setup(&o2_serial[0]);
126 early_serial_setup(&o2_serial[1]);
127 }
128#endif
129#ifdef CONFIG_SGI_O2MACE_ETH 93#ifdef CONFIG_SGI_O2MACE_ETH
130 { 94 {
131 char *mac = ArcGetEnvironmentVariable("eaddr"); 95 char *mac = ArcGetEnvironmentVariable("eaddr");
diff --git a/include/asm-mips/serial.h b/include/asm-mips/serial.h
index 5b9c8ea977b8..c07ebd8eb9e7 100644
--- a/include/asm-mips/serial.h
+++ b/include/asm-mips/serial.h
@@ -19,114 +19,4 @@
19 */ 19 */
20#define BASE_BAUD (1843200 / 16) 20#define BASE_BAUD (1843200 / 16)
21 21
22/* Standard COM flags (except for COM4, because of the 8514 problem) */
23#ifdef CONFIG_SERIAL_DETECT_IRQ
24#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST | ASYNC_AUTO_IRQ)
25#define STD_COM4_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_AUTO_IRQ)
26#else
27#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
28#define STD_COM4_FLAGS ASYNC_BOOT_AUTOCONF
29#endif
30
31#ifdef CONFIG_MACH_JAZZ
32#include <asm/jazz.h>
33
34#ifndef CONFIG_OLIVETTI_M700
35 /* Some Jazz machines seem to have an 8MHz crystal clock but I don't know
36 exactly which ones ... XXX */
37#define JAZZ_BASE_BAUD ( 8000000 / 16 ) /* ( 3072000 / 16) */
38#else
39/* but the M700 isn't such a strange beast */
40#define JAZZ_BASE_BAUD BASE_BAUD
41#endif
42
43#define _JAZZ_SERIAL_INIT(int, base) \
44 { .baud_base = JAZZ_BASE_BAUD, .irq = int, .flags = STD_COM_FLAGS, \
45 .iomem_base = (u8 *) base, .iomem_reg_shift = 0, \
46 .io_type = SERIAL_IO_MEM }
47#define JAZZ_SERIAL_PORT_DEFNS \
48 _JAZZ_SERIAL_INIT(JAZZ_SERIAL1_IRQ, JAZZ_SERIAL1_BASE), \
49 _JAZZ_SERIAL_INIT(JAZZ_SERIAL2_IRQ, JAZZ_SERIAL2_BASE),
50#else
51#define JAZZ_SERIAL_PORT_DEFNS
52#endif
53
54#ifdef CONFIG_HAVE_STD_PC_SERIAL_PORT
55#define STD_SERIAL_PORT_DEFNS \
56 /* UART CLK PORT IRQ FLAGS */ \
57 { 0, BASE_BAUD, 0x3F8, 4, STD_COM_FLAGS }, /* ttyS0 */ \
58 { 0, BASE_BAUD, 0x2F8, 3, STD_COM_FLAGS }, /* ttyS1 */ \
59 { 0, BASE_BAUD, 0x3E8, 4, STD_COM_FLAGS }, /* ttyS2 */ \
60 { 0, BASE_BAUD, 0x2E8, 3, STD_COM4_FLAGS }, /* ttyS3 */
61
62#else /* CONFIG_HAVE_STD_PC_SERIAL_PORTS */
63#define STD_SERIAL_PORT_DEFNS
64#endif /* CONFIG_HAVE_STD_PC_SERIAL_PORTS */
65
66#ifdef CONFIG_MOMENCO_OCELOT_3
67#define OCELOT_3_BASE_BAUD ( 20000000 / 16 )
68#define OCELOT_3_SERIAL_IRQ 6
69#define OCELOT_3_SERIAL_BASE (signed)0xfd000020
70
71#define _OCELOT_3_SERIAL_INIT(int, base) \
72 { .baud_base = OCELOT_3_BASE_BAUD, irq: int, \
73 .flags = STD_COM_FLAGS, \
74 .iomem_base = (u8 *) base, iomem_reg_shift: 2, \
75 io_type: SERIAL_IO_MEM }
76
77#define MOMENCO_OCELOT_3_SERIAL_PORT_DEFNS \
78 _OCELOT_3_SERIAL_INIT(OCELOT_3_SERIAL_IRQ, OCELOT_3_SERIAL_BASE)
79#else
80#define MOMENCO_OCELOT_3_SERIAL_PORT_DEFNS
81#endif
82
83#ifdef CONFIG_MOMENCO_OCELOT
84/* Ordinary NS16552 duart with a 20MHz crystal. */
85#define OCELOT_BASE_BAUD ( 20000000 / 16 )
86
87#define OCELOT_SERIAL1_IRQ 4
88#define OCELOT_SERIAL1_BASE 0xe0001020
89
90#define _OCELOT_SERIAL_INIT(int, base) \
91 { .baud_base = OCELOT_BASE_BAUD, .irq = int, .flags = STD_COM_FLAGS, \
92 .iomem_base = (u8 *) base, .iomem_reg_shift = 2, \
93 .io_type = SERIAL_IO_MEM }
94#define MOMENCO_OCELOT_SERIAL_PORT_DEFNS \
95 _OCELOT_SERIAL_INIT(OCELOT_SERIAL1_IRQ, OCELOT_SERIAL1_BASE)
96#else
97#define MOMENCO_OCELOT_SERIAL_PORT_DEFNS
98#endif
99
100#ifdef CONFIG_DDB5477
101#include <asm/ddb5xxx/ddb5477.h>
102#define DDB5477_SERIAL_PORT_DEFNS \
103 { .baud_base = BASE_BAUD, .irq = VRC5477_IRQ_UART0, \
104 .flags = STD_COM_FLAGS, .iomem_base = (u8*)0xbfa04200, \
105 .iomem_reg_shift = 3, .io_type = SERIAL_IO_MEM}, \
106 { .baud_base = BASE_BAUD, .irq = VRC5477_IRQ_UART1, \
107 .flags = STD_COM_FLAGS, .iomem_base = (u8*)0xbfa04240, \
108 .iomem_reg_shift = 3, .io_type = SERIAL_IO_MEM},
109#else
110#define DDB5477_SERIAL_PORT_DEFNS
111#endif
112
113#ifdef CONFIG_SGI_IP32
114/*
115 * The IP32 (SGI O2) has standard serial ports (UART 16550A) mapped in memory
116 * They are initialized in ip32_setup
117 */
118#define IP32_SERIAL_PORT_DEFNS \
119 {},{},
120#else
121#define IP32_SERIAL_PORT_DEFNS
122#endif /* CONFIG_SGI_IP32 */
123
124#define SERIAL_PORT_DFNS \
125 DDB5477_SERIAL_PORT_DEFNS \
126 IP32_SERIAL_PORT_DEFNS \
127 JAZZ_SERIAL_PORT_DEFNS \
128 STD_SERIAL_PORT_DEFNS \
129 MOMENCO_OCELOT_SERIAL_PORT_DEFNS \
130 MOMENCO_OCELOT_3_SERIAL_PORT_DEFNS
131
132#endif /* _ASM_SERIAL_H */ 22#endif /* _ASM_SERIAL_H */
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-12 23:45:41 -0500