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authorMauro Carvalho Chehab <mchehab@infradead.org>2008-04-22 13:45:15 -0400
committerMauro Carvalho Chehab <mchehab@infradead.org>2008-04-24 13:07:45 -0400
commit9507901ef329b2dd3417372c7c9b2abcfd5c1885 (patch)
treec75414bbc36905375c7615b971d88a1f26a74c88
parentc2cb8fcc006ce59255de67e3fe9f65fb79db633b (diff)
V4L/DVB (7257): cx88: Add xc2028/3028 boards
This patch ports a patch from Markus Rechberger to work with tuner-xc2028. It adds entries for several cx88 boards with xc2038/3028 tuners. Signed-off-by: Mauro Carvalho Chehab <mchehab@infradead.org>
-rw-r--r--Documentation/video4linux/CARDLIST.cx884
-rw-r--r--drivers/media/video/cx88/cx88-cards.c188
-rw-r--r--drivers/media/video/cx88/cx88-dvb.c44
-rw-r--r--drivers/media/video/cx88/cx88.h4
4 files changed, 238 insertions, 2 deletions
diff --git a/Documentation/video4linux/CARDLIST.cx88 b/Documentation/video4linux/CARDLIST.cx88
index 7d48e3dbd074..c92795b6e697 100644
--- a/Documentation/video4linux/CARDLIST.cx88
+++ b/Documentation/video4linux/CARDLIST.cx88
@@ -58,3 +58,7 @@
58 57 -> ADS Tech Instant Video PCI [1421:0390] 58 57 -> ADS Tech Instant Video PCI [1421:0390]
59 58 -> Pinnacle PCTV HD 800i [11bd:0051] 59 58 -> Pinnacle PCTV HD 800i [11bd:0051]
60 59 -> DViCO FusionHDTV 5 PCI nano [18ac:d530] 60 59 -> DViCO FusionHDTV 5 PCI nano [18ac:d530]
61 60 -> Pinnacle Hybrid PCTV [12ab:1788]
62 61 -> Winfast TV2000 XP Global [107d:6f18]
63 62 -> PowerColor Real Angel 330 [14f1:ea3d]
64 63 -> Geniatech X8000-MT DVBT [14f1:8852]
diff --git a/drivers/media/video/cx88/cx88-cards.c b/drivers/media/video/cx88/cx88-cards.c
index 3e07fbe4c843..d07286fa21f5 100644
--- a/drivers/media/video/cx88/cx88-cards.c
+++ b/drivers/media/video/cx88/cx88-cards.c
@@ -1426,6 +1426,124 @@ static const struct cx88_board cx88_boards[] = {
1426 } }, 1426 } },
1427 .mpeg = CX88_MPEG_DVB, 1427 .mpeg = CX88_MPEG_DVB,
1428 }, 1428 },
1429 [CX88_BOARD_PINNACLE_HYBRID_PCTV] = {
1430 .name = "Pinnacle Hybrid PCTV",
1431 .tuner_type = TUNER_XC2028,
1432 .tuner_addr = 0x61,
1433 .input = { {
1434 .type = CX88_VMUX_TELEVISION,
1435 .vmux = 0,
1436 }, {
1437 .type = CX88_VMUX_COMPOSITE1,
1438 .vmux = 1,
1439 }, {
1440 .type = CX88_VMUX_SVIDEO,
1441 .vmux = 2,
1442 } },
1443 .radio = {
1444 .type = CX88_RADIO,
1445 .gpio0 = 0x004ff,
1446 .gpio1 = 0x010ff,
1447 .gpio2 = 0x0ff,
1448 },
1449 },
1450 [CX88_BOARD_WINFAST_TV2000_XP_GLOBAL] = {
1451 .name = "Winfast TV2000 XP Global",
1452 .tuner_type = TUNER_XC2028,
1453 .tuner_addr = 0x61,
1454 .input = { {
1455 .type = CX88_VMUX_TELEVISION,
1456 .vmux = 0,
1457 .gpio0 = 0x0400, /* pin 2:mute = 0 (off?) */
1458 .gpio1 = 0x0000,
1459 .gpio2 = 0x0800, /* pin 19:audio = 0 (tv) */
1460
1461 }, {
1462 .type = CX88_VMUX_COMPOSITE1,
1463 .vmux = 1,
1464 .gpio0 = 0x0400, /* probably? or 0x0404 to turn mute on */
1465 .gpio1 = 0x0000,
1466 .gpio2 = 0x0808, /* pin 19:audio = 1 (line) */
1467
1468 }, {
1469 .type = CX88_VMUX_SVIDEO,
1470 .vmux = 2,
1471 } },
1472 .radio = {
1473 .type = CX88_RADIO,
1474 .gpio0 = 0x004ff,
1475 .gpio1 = 0x010ff,
1476 .gpio2 = 0x0ff,
1477 },
1478 },
1479 [CX88_BOARD_POWERCOLOR_REAL_ANGEL] = {
1480 .name = "PowerColor Real Angel 330",
1481 .tuner_type = TUNER_XC2028,
1482 .tuner_addr = 0x61,
1483 .input = { {
1484 .type = CX88_VMUX_TELEVISION,
1485 .vmux = 0,
1486 .gpio0 = 0x0400, /* pin 2:mute = 0 (off?) */
1487 .gpio1 = 0x0000,
1488 .gpio2 = 0x0800, /* pin 19:audio = 0 (tv) */
1489 }, {
1490 .type = CX88_VMUX_COMPOSITE1,
1491 .vmux = 1,
1492 .gpio0 = 0x0400, /* probably? or 0x0404 to turn mute on */
1493 .gpio1 = 0x0000,
1494 .gpio2 = 0x0808, /* pin 19:audio = 1 (line) */
1495 }, {
1496 .type = CX88_VMUX_SVIDEO,
1497 .vmux = 2,
1498 .gpio0 = 0x000ff,
1499 .gpio1 = 0x0f37d,
1500 .gpio2 = 0x00019,
1501 .gpio3 = 0x00000,
1502 } },
1503 .radio = {
1504 .type = CX88_RADIO,
1505 .gpio0 = 0x000ff,
1506 .gpio1 = 0x0f35d,
1507 .gpio2 = 0x00019,
1508 .gpio3 = 0x00000,
1509 },
1510 },
1511 [CX88_BOARD_GENIATECH_X8000_MT] = {
1512 /* Also PowerColor Real Angel 330 and Geniatech X800 OEM */
1513 .name = "Geniatech X8000-MT DVBT",
1514 .tuner_type = TUNER_XC2028,
1515 .tuner_addr = 0x61,
1516 .input = { {
1517 .type = CX88_VMUX_TELEVISION,
1518 .vmux = 0,
1519 .gpio0 = 0x00000000,
1520 .gpio1 = 0x00e3e341,
1521 .gpio2 = 0x00000000,
1522 .gpio3 = 0x00000000,
1523 }, {
1524 .type = CX88_VMUX_COMPOSITE1,
1525 .vmux = 1,
1526 .gpio0 = 0x00000000,
1527 .gpio1 = 0x00e3e361,
1528 .gpio2 = 0x00000000,
1529 .gpio3 = 0x00000000,
1530 }, {
1531 .type = CX88_VMUX_SVIDEO,
1532 .vmux = 2,
1533 .gpio0 = 0x00000000,
1534 .gpio1 = 0x00e3e361,
1535 .gpio2 = 0x00000000,
1536 .gpio3 = 0x00000000,
1537 } },
1538 .radio = {
1539 .type = CX88_RADIO,
1540 .gpio0 = 0x00000000,
1541 .gpio1 = 0x00e3e341,
1542 .gpio2 = 0x00000000,
1543 .gpio3 = 0x00000000,
1544 },
1545 .mpeg = CX88_MPEG_DVB,
1546 }
1429}; 1547};
1430 1548
1431/* ------------------------------------------------------------------ */ 1549/* ------------------------------------------------------------------ */
@@ -1743,7 +1861,23 @@ static const struct cx88_subid cx88_subids[] = {
1743 .subvendor = 0x18ac, 1861 .subvendor = 0x18ac,
1744 .subdevice = 0xd530, 1862 .subdevice = 0xd530,
1745 .card = CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO, 1863 .card = CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO,
1746 }, 1864 }, {
1865 .subvendor = 0x12ab,
1866 .subdevice = 0x1788,
1867 .card = CX88_BOARD_PINNACLE_HYBRID_PCTV,
1868 }, {
1869 .subvendor = 0x14f1,
1870 .subdevice = 0xea3d,
1871 .card = CX88_BOARD_POWERCOLOR_REAL_ANGEL,
1872 }, {
1873 .subvendor = 0x107d,
1874 .subdevice = 0x6f18,
1875 .card = CX88_BOARD_WINFAST_TV2000_XP_GLOBAL,
1876 }, {
1877 .subvendor = 0x14f1,
1878 .subdevice = 0x8852,
1879 .card = CX88_BOARD_GENIATECH_X8000_MT,
1880 }
1747}; 1881};
1748 1882
1749/* ----------------------------------------------------------------------- */ 1883/* ----------------------------------------------------------------------- */
@@ -1876,6 +2010,50 @@ static void gdi_eeprom(struct cx88_core *core, u8 *eeprom_data)
1876} 2010}
1877 2011
1878/* ----------------------------------------------------------------------- */ 2012/* ----------------------------------------------------------------------- */
2013/* some Geniatech specific stuff */
2014
2015static int cx88_xc3028_geniatech_tuner_callback(void *priv, int command, int mode)
2016{
2017 struct i2c_algo_bit_data *i2c_algo = priv;
2018 struct cx88_core *core = i2c_algo->data;
2019
2020 switch (command) {
2021 case XC2028_TUNER_RESET:
2022 switch (INPUT(core->input).type) {
2023 case CX88_RADIO:
2024 cx_write(MO_GP1_IO, 0x101010);
2025 mdelay(50);
2026 cx_write(MO_GP1_IO, 0x101000);
2027 mdelay(50);
2028 cx_write(MO_GP1_IO, 0x101010);
2029 mdelay(50);
2030 return 0;
2031 case CX88_VMUX_DVB:
2032 cx_write(MO_GP1_IO, 0x030302);
2033 mdelay(50);
2034 cx_write(MO_GP1_IO, 0x101010);
2035 mdelay(50);
2036 cx_write(MO_GP1_IO, 0x101000);
2037 mdelay(50);
2038 cx_write(MO_GP1_IO, 0x101010);
2039 mdelay(50);
2040 return 0;
2041 default:
2042 cx_write(MO_GP1_IO, 0x030301);
2043 mdelay(50);
2044 cx_write(MO_GP1_IO, 0x101010);
2045 mdelay(50);
2046 cx_write(MO_GP1_IO, 0x101000);
2047 mdelay(50);
2048 cx_write(MO_GP1_IO, 0x101010);
2049 mdelay(50);
2050 return 0;
2051 }
2052 }
2053 return -EINVAL;
2054}
2055
2056/* ----------------------------------------------------------------------- */
1879/* some DViCO specific stuff */ 2057/* some DViCO specific stuff */
1880 2058
1881static void dvico_fusionhdtv_hybrid_init(struct cx88_core *core) 2059static void dvico_fusionhdtv_hybrid_init(struct cx88_core *core)
@@ -1914,6 +2092,14 @@ static int cx88_xc2028_tuner_callback(void *priv, int command, int arg)
1914 struct i2c_algo_bit_data *i2c_algo = priv; 2092 struct i2c_algo_bit_data *i2c_algo = priv;
1915 struct cx88_core *core = i2c_algo->data; 2093 struct cx88_core *core = i2c_algo->data;
1916 2094
2095 /* Board-specific callbacks */
2096 switch (core->boardnr) {
2097 case CX88_BOARD_WINFAST_TV2000_XP_GLOBAL:
2098 case CX88_BOARD_POWERCOLOR_REAL_ANGEL:
2099 case CX88_BOARD_GENIATECH_X8000_MT:
2100 return cx88_xc3028_geniatech_tuner_callback(priv, command, arg);
2101 }
2102
1917 switch (command) { 2103 switch (command) {
1918 case XC2028_TUNER_RESET: 2104 case XC2028_TUNER_RESET:
1919 { 2105 {
diff --git a/drivers/media/video/cx88/cx88-dvb.c b/drivers/media/video/cx88/cx88-dvb.c
index 735376060df2..c786d951a04b 100644
--- a/drivers/media/video/cx88/cx88-dvb.c
+++ b/drivers/media/video/cx88/cx88-dvb.c
@@ -434,8 +434,16 @@ static struct xc5000_config pinnacle_pctv_hd_800i_tuner_config = {
434 .tuner_callback = cx88_tuner_callback, 434 .tuner_callback = cx88_tuner_callback,
435}; 435};
436 436
437static struct zl10353_config cx88_geniatech_x8000_mt = {
438 .demod_address = (0x1e >> 1),
439 .no_tuner = 1,
440};
441
442
437static int dvb_register(struct cx8802_dev *dev) 443static int dvb_register(struct cx8802_dev *dev)
438{ 444{
445 int attach_xc3028 = 0;
446
439 /* init struct videobuf_dvb */ 447 /* init struct videobuf_dvb */
440 dev->dvb.name = dev->core->name; 448 dev->dvb.name = dev->core->name;
441 dev->ts_gen_cntrl = 0x0c; 449 dev->ts_gen_cntrl = 0x0c;
@@ -727,16 +735,50 @@ static int dvb_register(struct cx8802_dev *dev)
727 fe->ops.tuner_ops.set_config(fe, &ctl); 735 fe->ops.tuner_ops.set_config(fe, &ctl);
728 } 736 }
729 break; 737 break;
738 case CX88_BOARD_PINNACLE_HYBRID_PCTV:
739 dev->dvb.frontend = dvb_attach(zl10353_attach,
740 &cx88_geniatech_x8000_mt,
741 &dev->core->i2c_adap);
742 attach_xc3028 = 1;
743 break;
744 case CX88_BOARD_GENIATECH_X8000_MT:
745 dev->ts_gen_cntrl = 0x00;
746
747 dev->dvb.frontend = dvb_attach(zl10353_attach,
748 &cx88_geniatech_x8000_mt,
749 &dev->core->i2c_adap);
750 attach_xc3028 = 1;
751 break;
730 default: 752 default:
731 printk(KERN_ERR "%s/2: The frontend of your DVB/ATSC card isn't supported yet\n", 753 printk(KERN_ERR "%s/2: The frontend of your DVB/ATSC card isn't supported yet\n",
732 dev->core->name); 754 dev->core->name);
733 break; 755 break;
734 } 756 }
735 if (NULL == dev->dvb.frontend) { 757 if (NULL == dev->dvb.frontend) {
736 printk(KERN_ERR "%s/2: frontend initialization failed\n", dev->core->name); 758 printk(KERN_ERR
759 "%s/2: frontend initialization failed\n",
760 dev->core->name);
737 return -1; 761 return -1;
738 } 762 }
739 763
764 if (attach_xc3028) {
765 struct dvb_frontend *fe;
766 struct xc2028_config cfg = {
767 .i2c_adap = &dev->core->i2c_adap,
768 .i2c_addr = 0x61,
769 .video_dev = dev->core,
770 };
771 fe = dvb_attach(xc2028_attach, dev->dvb.frontend, &cfg);
772 if (!fe) {
773 printk(KERN_ERR "%s/2: xc3028 attach failed\n",
774 dev->core->name);
775 dvb_frontend_detach(dev->dvb.frontend);
776 dvb_unregister_frontend(dev->dvb.frontend);
777 dev->dvb.frontend = NULL;
778 return -1;
779 }
780 }
781
740 /* Ensure all frontends negotiate bus access */ 782 /* Ensure all frontends negotiate bus access */
741 dev->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl; 783 dev->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
742 784
diff --git a/drivers/media/video/cx88/cx88.h b/drivers/media/video/cx88/cx88.h
index 8121bd07a88a..5145bf2f5557 100644
--- a/drivers/media/video/cx88/cx88.h
+++ b/drivers/media/video/cx88/cx88.h
@@ -212,6 +212,10 @@ extern struct sram_channel cx88_sram_channels[];
212#define CX88_BOARD_ADSTECH_PTV_390 57 212#define CX88_BOARD_ADSTECH_PTV_390 57
213#define CX88_BOARD_PINNACLE_PCTV_HD_800i 58 213#define CX88_BOARD_PINNACLE_PCTV_HD_800i 58
214#define CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO 59 214#define CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO 59
215#define CX88_BOARD_PINNACLE_HYBRID_PCTV 60
216#define CX88_BOARD_WINFAST_TV2000_XP_GLOBAL 61
217#define CX88_BOARD_POWERCOLOR_REAL_ANGEL 62
218#define CX88_BOARD_GENIATECH_X8000_MT 63
215 219
216enum cx88_itype { 220enum cx88_itype {
217 CX88_VMUX_COMPOSITE1 = 1, 221 CX88_VMUX_COMPOSITE1 = 1,