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authorMark Brown <broonie@opensource.wolfsonmicro.com>2008-10-10 10:58:10 -0400
committerLiam Girdwood <lrg@slimlogic.co.uk>2008-10-13 16:51:55 -0400
commit89b4012befb1abca5e86d232bc0e2a797b0d9825 (patch)
tree948e0ed0c35df087f0069356650da431a9fe50ff
parent213f326810b6852bc54f38fd8bb71793f70f2c7a (diff)
mfd: Core support for the WM8350 AudioPlus PMIC
The WM8350 is an integrated audio and power management subsystem intended for use as the primary PMIC in mobile multimedia applications. The WM8350 can be controlled via either I2C or SPI - the control interface is provided by a separate module in order to allow greatest flexibility in configuring the kernel. This driver was originally written by Liam Girdwood and has since been updated to current kernel APIs and split up for submission by me. All the heavy lifting here was done by Liam. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: Samuel Ortiz <sameo@openedhand.com> Signed-off-by: Liam Girdwood <lrg@slimlogic.co.uk>
Diffstat
-rw-r--r--drivers/mfd/Kconfig19
-rw-r--r--drivers/mfd/Makefile2
-rw-r--r--drivers/mfd/wm8350-core.c456
-rw-r--r--drivers/mfd/wm8350-regmap.c1347
-rw-r--r--include/linux/mfd/wm8350/core.h585
5 files changed, 2409 insertions, 0 deletions
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index a3ddf6581ea6..5d7bbf45cae0 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -95,6 +95,25 @@ config MFD_WM8400
95 the device, additional drivers must be enabled in order to use 95 the device, additional drivers must be enabled in order to use
96 the functionality of the device. 96 the functionality of the device.
97 97
98config MFD_WM8350
99 tristate
100
101config MFD_WM8350_CONFIG_MODE_0
102 bool
103 depends on MFD_WM8350
104
105config MFD_WM8350_CONFIG_MODE_1
106 bool
107 depends on MFD_WM8350
108
109config MFD_WM8350_CONFIG_MODE_2
110 bool
111 depends on MFD_WM8350
112
113config MFD_WM8350_CONFIG_MODE_3
114 bool
115 depends on MFD_WM8350
116
98endmenu 117endmenu
99 118
100menu "Multimedia Capabilities Port drivers" 119menu "Multimedia Capabilities Port drivers"
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index 1624c7d87a49..bec1e92d37ba 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -13,6 +13,8 @@ obj-$(CONFIG_MFD_TC6387XB) += tc6387xb.o
13obj-$(CONFIG_MFD_TC6393XB) += tc6393xb.o 13obj-$(CONFIG_MFD_TC6393XB) += tc6393xb.o
14 14
15obj-$(CONFIG_MFD_WM8400) += wm8400-core.o 15obj-$(CONFIG_MFD_WM8400) += wm8400-core.o
16wm8350-objs := wm8350-core.o wm8350-regmap.o
17obj-$(CONFIG_MFD_WM8350) += wm8350.o
16 18
17obj-$(CONFIG_MFD_CORE) += mfd-core.o 19obj-$(CONFIG_MFD_CORE) += mfd-core.o
18 20
diff --git a/drivers/mfd/wm8350-core.c b/drivers/mfd/wm8350-core.c
new file mode 100644
index 000000000000..c7552c0b7797
--- /dev/null
+++ b/drivers/mfd/wm8350-core.c
@@ -0,0 +1,456 @@
1/*
2 * wm8350-core.c -- Device access for Wolfson WM8350
3 *
4 * Copyright 2007, 2008 Wolfson Microelectronics PLC.
5 *
6 * Author: Liam Girdwood, Mark Brown
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 */
14
15#include <linux/kernel.h>
16#include <linux/module.h>
17#include <linux/init.h>
18#include <linux/device.h>
19#include <linux/delay.h>
20#include <linux/interrupt.h>
21
22#include <linux/mfd/wm8350/core.h>
23#include <linux/mfd/wm8350/audio.h>
24#include <linux/mfd/wm8350/gpio.h>
25#include <linux/mfd/wm8350/pmic.h>
26#include <linux/mfd/wm8350/supply.h>
27
28#define WM8350_UNLOCK_KEY 0x0013
29#define WM8350_LOCK_KEY 0x0000
30
31#define WM8350_CLOCK_CONTROL_1 0x28
32#define WM8350_AIF_TEST 0x74
33
34/* debug */
35#define WM8350_BUS_DEBUG 0
36#if WM8350_BUS_DEBUG
37#define dump(regs, src) do { \
38 int i_; \
39 u16 *src_ = src; \
40 printk(KERN_DEBUG); \
41 for (i_ = 0; i_ < regs; i_++) \
42 printk(" 0x%4.4x", *src_++); \
43 printk("\n"); \
44} while (0);
45#else
46#define dump(bytes, src)
47#endif
48
49#define WM8350_LOCK_DEBUG 0
50#if WM8350_LOCK_DEBUG
51#define ldbg(format, arg...) printk(format, ## arg)
52#else
53#define ldbg(format, arg...)
54#endif
55
56/*
57 * WM8350 Device IO
58 */
59static DEFINE_MUTEX(io_mutex);
60static DEFINE_MUTEX(reg_lock_mutex);
61static DEFINE_MUTEX(auxadc_mutex);
62
63/* Perform a physical read from the device.
64 */
65static int wm8350_phys_read(struct wm8350 *wm8350, u8 reg, int num_regs,
66 u16 *dest)
67{
68 int i, ret;
69 int bytes = num_regs * 2;
70
71 dev_dbg(wm8350->dev, "volatile read\n");
72 ret = wm8350->read_dev(wm8350, reg, bytes, (char *)dest);
73
74 for (i = reg; i < reg + num_regs; i++) {
75 /* Cache is CPU endian */
76 dest[i - reg] = be16_to_cpu(dest[i - reg]);
77
78 /* Satisfy non-volatile bits from cache */
79 dest[i - reg] &= wm8350_reg_io_map[i].vol;
80 dest[i - reg] |= wm8350->reg_cache[i];
81
82 /* Mask out non-readable bits */
83 dest[i - reg] &= wm8350_reg_io_map[i].readable;
84 }
85
86 dump(num_regs, dest);
87
88 return ret;
89}
90
91static int wm8350_read(struct wm8350 *wm8350, u8 reg, int num_regs, u16 *dest)
92{
93 int i;
94 int end = reg + num_regs;
95 int ret = 0;
96 int bytes = num_regs * 2;
97
98 if (wm8350->read_dev == NULL)
99 return -ENODEV;
100
101 if ((reg + num_regs - 1) > WM8350_MAX_REGISTER) {
102 dev_err(wm8350->dev, "invalid reg %x\n",
103 reg + num_regs - 1);
104 return -EINVAL;
105 }
106
107 dev_dbg(wm8350->dev,
108 "%s R%d(0x%2.2x) %d regs\n", __func__, reg, reg, num_regs);
109
110#if WM8350_BUS_DEBUG
111 /* we can _safely_ read any register, but warn if read not supported */
112 for (i = reg; i < end; i++) {
113 if (!wm8350_reg_io_map[i].readable)
114 dev_warn(wm8350->dev,
115 "reg R%d is not readable\n", i);
116 }
117#endif
118
119 /* if any volatile registers are required, then read back all */
120 for (i = reg; i < end; i++)
121 if (wm8350_reg_io_map[i].vol)
122 return wm8350_phys_read(wm8350, reg, num_regs, dest);
123
124 /* no volatiles, then cache is good */
125 dev_dbg(wm8350->dev, "cache read\n");
126 memcpy(dest, &wm8350->reg_cache[reg], bytes);
127 dump(num_regs, dest);
128 return ret;
129}
130
131static inline int is_reg_locked(struct wm8350 *wm8350, u8 reg)
132{
133 if (reg == WM8350_SECURITY ||
134 wm8350->reg_cache[WM8350_SECURITY] == WM8350_UNLOCK_KEY)
135 return 0;
136
137 if ((reg == WM8350_GPIO_CONFIGURATION_I_O) ||
138 (reg >= WM8350_GPIO_FUNCTION_SELECT_1 &&
139 reg <= WM8350_GPIO_FUNCTION_SELECT_4) ||
140 (reg >= WM8350_BATTERY_CHARGER_CONTROL_1 &&
141 reg <= WM8350_BATTERY_CHARGER_CONTROL_3))
142 return 1;
143 return 0;
144}
145
146static int wm8350_write(struct wm8350 *wm8350, u8 reg, int num_regs, u16 *src)
147{
148 int i;
149 int end = reg + num_regs;
150 int bytes = num_regs * 2;
151
152 if (wm8350->write_dev == NULL)
153 return -ENODEV;
154
155 if ((reg + num_regs - 1) > WM8350_MAX_REGISTER) {
156 dev_err(wm8350->dev, "invalid reg %x\n",
157 reg + num_regs - 1);
158 return -EINVAL;
159 }
160
161 /* it's generally not a good idea to write to RO or locked registers */
162 for (i = reg; i < end; i++) {
163 if (!wm8350_reg_io_map[i].writable) {
164 dev_err(wm8350->dev,
165 "attempted write to read only reg R%d\n", i);
166 return -EINVAL;
167 }
168
169 if (is_reg_locked(wm8350, i)) {
170 dev_err(wm8350->dev,
171 "attempted write to locked reg R%d\n", i);
172 return -EINVAL;
173 }
174
175 src[i - reg] &= wm8350_reg_io_map[i].writable;
176
177 wm8350->reg_cache[i] =
178 (wm8350->reg_cache[i] & ~wm8350_reg_io_map[i].writable)
179 | src[i - reg];
180
181 src[i - reg] = cpu_to_be16(src[i - reg]);
182 }
183
184 /* Actually write it out */
185 return wm8350->write_dev(wm8350, reg, bytes, (char *)src);
186}
187
188/*
189 * Safe read, modify, write methods
190 */
191int wm8350_clear_bits(struct wm8350 *wm8350, u16 reg, u16 mask)
192{
193 u16 data;
194 int err;
195
196 mutex_lock(&io_mutex);
197 err = wm8350_read(wm8350, reg, 1, &data);
198 if (err) {
199 dev_err(wm8350->dev, "read from reg R%d failed\n", reg);
200 goto out;
201 }
202
203 data &= ~mask;
204 err = wm8350_write(wm8350, reg, 1, &data);
205 if (err)
206 dev_err(wm8350->dev, "write to reg R%d failed\n", reg);
207out:
208 mutex_unlock(&io_mutex);
209 return err;
210}
211EXPORT_SYMBOL_GPL(wm8350_clear_bits);
212
213int wm8350_set_bits(struct wm8350 *wm8350, u16 reg, u16 mask)
214{
215 u16 data;
216 int err;
217
218 mutex_lock(&io_mutex);
219 err = wm8350_read(wm8350, reg, 1, &data);
220 if (err) {
221 dev_err(wm8350->dev, "read from reg R%d failed\n", reg);
222 goto out;
223 }
224
225 data |= mask;
226 err = wm8350_write(wm8350, reg, 1, &data);
227 if (err)
228 dev_err(wm8350->dev, "write to reg R%d failed\n", reg);
229out:
230 mutex_unlock(&io_mutex);
231 return err;
232}
233EXPORT_SYMBOL_GPL(wm8350_set_bits);
234
235u16 wm8350_reg_read(struct wm8350 *wm8350, int reg)
236{
237 u16 data;
238 int err;
239
240 mutex_lock(&io_mutex);
241 err = wm8350_read(wm8350, reg, 1, &data);
242 if (err)
243 dev_err(wm8350->dev, "read from reg R%d failed\n", reg);
244
245 mutex_unlock(&io_mutex);
246 return data;
247}
248EXPORT_SYMBOL_GPL(wm8350_reg_read);
249
250int wm8350_reg_write(struct wm8350 *wm8350, int reg, u16 val)
251{
252 int ret;
253 u16 data = val;
254
255 mutex_lock(&io_mutex);
256 ret = wm8350_write(wm8350, reg, 1, &data);
257 if (ret)
258 dev_err(wm8350->dev, "write to reg R%d failed\n", reg);
259 mutex_unlock(&io_mutex);
260 return ret;
261}
262EXPORT_SYMBOL_GPL(wm8350_reg_write);
263
264int wm8350_block_read(struct wm8350 *wm8350, int start_reg, int regs,
265 u16 *dest)
266{
267 int err = 0;
268
269 mutex_lock(&io_mutex);
270 err = wm8350_read(wm8350, start_reg, regs, dest);
271 if (err)
272 dev_err(wm8350->dev, "block read starting from R%d failed\n",
273 start_reg);
274 mutex_unlock(&io_mutex);
275 return err;
276}
277EXPORT_SYMBOL_GPL(wm8350_block_read);
278
279int wm8350_block_write(struct wm8350 *wm8350, int start_reg, int regs,
280 u16 *src)
281{
282 int ret = 0;
283
284 mutex_lock(&io_mutex);
285 ret = wm8350_write(wm8350, start_reg, regs, src);
286 if (ret)
287 dev_err(wm8350->dev, "block write starting at R%d failed\n",
288 start_reg);
289 mutex_unlock(&io_mutex);
290 return ret;
291}
292EXPORT_SYMBOL_GPL(wm8350_block_write);
293
294int wm8350_reg_lock(struct wm8350 *wm8350)
295{
296 u16 key = WM8350_LOCK_KEY;
297 int ret;
298
299 ldbg(__func__);
300 mutex_lock(&io_mutex);
301 ret = wm8350_write(wm8350, WM8350_SECURITY, 1, &key);
302 if (ret)
303 dev_err(wm8350->dev, "lock failed\n");
304 mutex_unlock(&io_mutex);
305 return ret;
306}
307EXPORT_SYMBOL_GPL(wm8350_reg_lock);
308
309int wm8350_reg_unlock(struct wm8350 *wm8350)
310{
311 u16 key = WM8350_UNLOCK_KEY;
312 int ret;
313
314 ldbg(__func__);
315 mutex_lock(&io_mutex);
316 ret = wm8350_write(wm8350, WM8350_SECURITY, 1, &key);
317 if (ret)
318 dev_err(wm8350->dev, "unlock failed\n");
319 mutex_unlock(&io_mutex);
320 return ret;
321}
322EXPORT_SYMBOL_GPL(wm8350_reg_unlock);
323
324/*
325 * Cache is always host endian.
326 */
327static int wm8350_create_cache(struct wm8350 *wm8350, int mode)
328{
329 int i, ret = 0;
330 u16 value;
331 const u16 *reg_map;
332
333 switch (mode) {
334#ifdef CONFIG_MFD_WM8350_CONFIG_MODE_0
335 case 0:
336 reg_map = wm8350_mode0_defaults;
337 break;
338#endif
339#ifdef CONFIG_MFD_WM8350_CONFIG_MODE_1
340 case 1:
341 reg_map = wm8350_mode1_defaults;
342 break;
343#endif
344#ifdef CONFIG_MFD_WM8350_CONFIG_MODE_2
345 case 2:
346 reg_map = wm8350_mode2_defaults;
347 break;
348#endif
349#ifdef CONFIG_MFD_WM8350_CONFIG_MODE_3
350 case 3:
351 reg_map = wm8350_mode3_defaults;
352 break;
353#endif
354 default:
355 dev_err(wm8350->dev, "Configuration mode %d not supported\n",
356 mode);
357 return -EINVAL;
358 }
359
360 wm8350->reg_cache =
361 kzalloc(sizeof(u16) * (WM8350_MAX_REGISTER + 1), GFP_KERNEL);
362 if (wm8350->reg_cache == NULL)
363 return -ENOMEM;
364
365 /* Read the initial cache state back from the device - this is
366 * a PMIC so the device many not be in a virgin state and we
367 * can't rely on the silicon values.
368 */
369 for (i = 0; i < WM8350_MAX_REGISTER; i++) {
370 /* audio register range */
371 if (wm8350_reg_io_map[i].readable &&
372 (i < WM8350_CLOCK_CONTROL_1 || i > WM8350_AIF_TEST)) {
373 ret = wm8350->read_dev(wm8350, i, 2, (char *)&value);
374 if (ret < 0) {
375 dev_err(wm8350->dev,
376 "failed to read initial cache value\n");
377 goto out;
378 }
379 value = be16_to_cpu(value);
380 value &= wm8350_reg_io_map[i].readable;
381 wm8350->reg_cache[i] = value;
382 } else
383 wm8350->reg_cache[i] = reg_map[i];
384 }
385
386out:
387 return ret;
388}
389EXPORT_SYMBOL_GPL(wm8350_create_cache);
390
391int wm8350_device_init(struct wm8350 *wm8350)
392{
393 int ret = -EINVAL;
394 u16 id1, id2, mask, mode;
395
396 /* get WM8350 revision and config mode */
397 wm8350->read_dev(wm8350, WM8350_RESET_ID, sizeof(id1), &id1);
398 wm8350->read_dev(wm8350, WM8350_ID, sizeof(id2), &id2);
399
400 id1 = be16_to_cpu(id1);
401 id2 = be16_to_cpu(id2);
402
403 if (id1 == 0x0)
404 dev_info(wm8350->dev, "Found Rev C device\n");
405 else if (id1 == 0x6143) {
406 switch ((id2 & WM8350_CHIP_REV_MASK) >> 12) {
407 case WM8350_REV_E:
408 dev_info(wm8350->dev, "Found Rev E device\n");
409 wm8350->rev = WM8350_REV_E;
410 break;
411 case WM8350_REV_F:
412 dev_info(wm8350->dev, "Found Rev F device\n");
413 wm8350->rev = WM8350_REV_F;
414 break;
415 case WM8350_REV_G:
416 dev_info(wm8350->dev, "Found Rev G device\n");
417 wm8350->rev = WM8350_REV_G;
418 break;
419 default:
420 /* For safety we refuse to run on unknown hardware */
421 dev_info(wm8350->dev, "Found unknown rev\n");
422 ret = -ENODEV;
423 goto err;
424 }
425 } else {
426 dev_info(wm8350->dev, "Device with ID %x is not a WM8350\n",
427 id1);
428 ret = -ENODEV;
429 goto err;
430 }
431
432 mode = id2 & WM8350_CONF_STS_MASK >> 10;
433 mask = id2 & WM8350_CUST_ID_MASK;
434 dev_info(wm8350->dev, "Config mode %d, ROM mask %d\n", mode, mask);
435
436 ret = wm8350_create_cache(wm8350, mode);
437 if (ret < 0) {
438 printk(KERN_ERR "wm8350: failed to create register cache\n");
439 return ret;
440 }
441
442 return 0;
443
444err:
445 kfree(wm8350->reg_cache);
446 return ret;
447}
448EXPORT_SYMBOL_GPL(wm8350_device_init);
449
450void wm8350_device_exit(struct wm8350 *wm8350)
451{
452 kfree(wm8350->reg_cache);
453}
454EXPORT_SYMBOL_GPL(wm8350_device_exit);
455
456MODULE_LICENSE("GPL");
diff --git a/drivers/mfd/wm8350-regmap.c b/drivers/mfd/wm8350-regmap.c
new file mode 100644
index 000000000000..974678db22cd
--- /dev/null
+++ b/drivers/mfd/wm8350-regmap.c
@@ -0,0 +1,1347 @@
1/*
2 * wm8350-regmap.c -- Wolfson Microelectronics WM8350 register map
3 *
4 * This file splits out the tables describing the defaults and access
5 * status of the WM8350 registers since they are rather large.
6 *
7 * Copyright 2007, 2008 Wolfson Microelectronics PLC.
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 */
14
15#include <linux/mfd/wm8350/core.h>
16
17#ifdef CONFIG_MFD_WM8350_CONFIG_MODE_0
18
19#undef WM8350_HAVE_CONFIG_MODE
20#define WM8350_HAVE_CONFIG_MODE
21
22const u16 wm8350_mode0_defaults[] = {
23 0x17FF, /* R0 - Reset/ID */
24 0x1000, /* R1 - ID */
25 0x0000, /* R2 */
26 0x1002, /* R3 - System Control 1 */
27 0x0004, /* R4 - System Control 2 */
28 0x0000, /* R5 - System Hibernate */
29 0x8A00, /* R6 - Interface Control */
30 0x0000, /* R7 */
31 0x8000, /* R8 - Power mgmt (1) */
32 0x0000, /* R9 - Power mgmt (2) */
33 0x0000, /* R10 - Power mgmt (3) */
34 0x2000, /* R11 - Power mgmt (4) */
35 0x0E00, /* R12 - Power mgmt (5) */
36 0x0000, /* R13 - Power mgmt (6) */
37 0x0000, /* R14 - Power mgmt (7) */
38 0x0000, /* R15 */
39 0x0000, /* R16 - RTC Seconds/Minutes */
40 0x0100, /* R17 - RTC Hours/Day */
41 0x0101, /* R18 - RTC Date/Month */
42 0x1400, /* R19 - RTC Year */
43 0x0000, /* R20 - Alarm Seconds/Minutes */
44 0x0000, /* R21 - Alarm Hours/Day */
45 0x0000, /* R22 - Alarm Date/Month */
46 0x0320, /* R23 - RTC Time Control */
47 0x0000, /* R24 - System Interrupts */
48 0x0000, /* R25 - Interrupt Status 1 */
49 0x0000, /* R26 - Interrupt Status 2 */
50 0x0000, /* R27 - Power Up Interrupt Status */
51 0x0000, /* R28 - Under Voltage Interrupt status */
52 0x0000, /* R29 - Over Current Interrupt status */
53 0x0000, /* R30 - GPIO Interrupt Status */
54 0x0000, /* R31 - Comparator Interrupt Status */
55 0x3FFF, /* R32 - System Interrupts Mask */
56 0x0000, /* R33 - Interrupt Status 1 Mask */
57 0x0000, /* R34 - Interrupt Status 2 Mask */
58 0x0000, /* R35 - Power Up Interrupt Status Mask */
59 0x0000, /* R36 - Under Voltage Interrupt status Mask */
60 0x0000, /* R37 - Over Current Interrupt status Mask */
61 0x0000, /* R38 - GPIO Interrupt Status Mask */
62 0x0000, /* R39 - Comparator Interrupt Status Mask */
63 0x0040, /* R40 - Clock Control 1 */
64 0x0000, /* R41 - Clock Control 2 */
65 0x3B00, /* R42 - FLL Control 1 */
66 0x7086, /* R43 - FLL Control 2 */
67 0xC226, /* R44 - FLL Control 3 */
68 0x0000, /* R45 - FLL Control 4 */
69 0x0000, /* R46 */
70 0x0000, /* R47 */
71 0x0000, /* R48 - DAC Control */
72 0x0000, /* R49 */
73 0x00C0, /* R50 - DAC Digital Volume L */
74 0x00C0, /* R51 - DAC Digital Volume R */
75 0x0000, /* R52 */
76 0x0040, /* R53 - DAC LR Rate */
77 0x0000, /* R54 - DAC Clock Control */
78 0x0000, /* R55 */
79 0x0000, /* R56 */
80 0x0000, /* R57 */
81 0x4000, /* R58 - DAC Mute */
82 0x0000, /* R59 - DAC Mute Volume */
83 0x0000, /* R60 - DAC Side */
84 0x0000, /* R61 */
85 0x0000, /* R62 */
86 0x0000, /* R63 */
87 0x8000, /* R64 - ADC Control */
88 0x0000, /* R65 */
89 0x00C0, /* R66 - ADC Digital Volume L */
90 0x00C0, /* R67 - ADC Digital Volume R */
91 0x0000, /* R68 - ADC Divider */
92 0x0000, /* R69 */
93 0x0040, /* R70 - ADC LR Rate */
94 0x0000, /* R71 */
95 0x0303, /* R72 - Input Control */
96 0x0000, /* R73 - IN3 Input Control */
97 0x0000, /* R74 - Mic Bias Control */
98 0x0000, /* R75 */
99 0x0000, /* R76 - Output Control */
100 0x0000, /* R77 - Jack Detect */
101 0x0000, /* R78 - Anti Pop Control */
102 0x0000, /* R79 */
103 0x0040, /* R80 - Left Input Volume */
104 0x0040, /* R81 - Right Input Volume */
105 0x0000, /* R82 */
106 0x0000, /* R83 */
107 0x0000, /* R84 */
108 0x0000, /* R85 */
109 0x0000, /* R86 */
110 0x0000, /* R87 */
111 0x0800, /* R88 - Left Mixer Control */
112 0x1000, /* R89 - Right Mixer Control */
113 0x0000, /* R90 */
114 0x0000, /* R91 */
115 0x0000, /* R92 - OUT3 Mixer Control */
116 0x0000, /* R93 - OUT4 Mixer Control */
117 0x0000, /* R94 */
118 0x0000, /* R95 */
119 0x0000, /* R96 - Output Left Mixer Volume */
120 0x0000, /* R97 - Output Right Mixer Volume */
121 0x0000, /* R98 - Input Mixer Volume L */
122 0x0000, /* R99 - Input Mixer Volume R */
123 0x0000, /* R100 - Input Mixer Volume */
124 0x0000, /* R101 */
125 0x0000, /* R102 */
126 0x0000, /* R103 */
127 0x00E4, /* R104 - LOUT1 Volume */
128 0x00E4, /* R105 - ROUT1 Volume */
129 0x00E4, /* R106 - LOUT2 Volume */
130 0x02E4, /* R107 - ROUT2 Volume */
131 0x0000, /* R108 */
132 0x0000, /* R109 */
133 0x0000, /* R110 */
134 0x0000, /* R111 - BEEP Volume */
135 0x0A00, /* R112 - AI Formating */
136 0x0000, /* R113 - ADC DAC COMP */
137 0x0020, /* R114 - AI ADC Control */
138 0x0020, /* R115 - AI DAC Control */
139 0x0000, /* R116 - AIF Test */
140 0x0000, /* R117 */
141 0x0000, /* R118 */
142 0x0000, /* R119 */
143 0x0000, /* R120 */
144 0x0000, /* R121 */
145 0x0000, /* R122 */
146 0x0000, /* R123 */
147 0x0000, /* R124 */
148 0x0000, /* R125 */
149 0x0000, /* R126 */
150 0x0000, /* R127 */
151 0x1FFF, /* R128 - GPIO Debounce */
152 0x0000, /* R129 - GPIO Pin pull up Control */
153 0x03FC, /* R130 - GPIO Pull down Control */
154 0x0000, /* R131 - GPIO Interrupt Mode */
155 0x0000, /* R132 */
156 0x0000, /* R133 - GPIO Control */
157 0x0FFC, /* R134 - GPIO Configuration (i/o) */
158 0x0FFC, /* R135 - GPIO Pin Polarity / Type */
159 0x0000, /* R136 */
160 0x0000, /* R137 */
161 0x0000, /* R138 */
162 0x0000, /* R139 */
163 0x0013, /* R140 - GPIO Function Select 1 */
164 0x0000, /* R141 - GPIO Function Select 2 */
165 0x0000, /* R142 - GPIO Function Select 3 */
166 0x0003, /* R143 - GPIO Function Select 4 */
167 0x0000, /* R144 - Digitiser Control (1) */
168 0x0002, /* R145 - Digitiser Control (2) */
169 0x0000, /* R146 */
170 0x0000, /* R147 */
171 0x0000, /* R148 */
172 0x0000, /* R149 */
173 0x0000, /* R150 */
174 0x0000, /* R151 */
175 0x7000, /* R152 - AUX1 Readback */
176 0x7000, /* R153 - AUX2 Readback */
177 0x7000, /* R154 - AUX3 Readback */
178 0x7000, /* R155 - AUX4 Readback */
179 0x0000, /* R156 - USB Voltage Readback */
180 0x0000, /* R157 - LINE Voltage Readback */
181 0x0000, /* R158 - BATT Voltage Readback */
182 0x0000, /* R159 - Chip Temp Readback */
183 0x0000, /* R160 */
184 0x0000, /* R161 */
185 0x0000, /* R162 */
186 0x0000, /* R163 - Generic Comparator Control */
187 0x0000, /* R164 - Generic comparator 1 */
188 0x0000, /* R165 - Generic comparator 2 */
189 0x0000, /* R166 - Generic comparator 3 */
190 0x0000, /* R167 - Generic comparator 4 */
191 0xA00F, /* R168 - Battery Charger Control 1 */
192 0x0B06, /* R169 - Battery Charger Control 2 */
193 0x0000, /* R170 - Battery Charger Control 3 */
194 0x0000, /* R171 */
195 0x0000, /* R172 - Current Sink Driver A */
196 0x0000, /* R173 - CSA Flash control */
197 0x0000, /* R174 - Current Sink Driver B */
198 0x0000, /* R175 - CSB Flash control */
199 0x0000, /* R176 - DCDC/LDO requested */
200 0x002D, /* R177 - DCDC Active options */
201 0x0000, /* R178 - DCDC Sleep options */
202 0x0025, /* R179 - Power-check comparator */
203 0x000E, /* R180 - DCDC1 Control */
204 0x0000, /* R181 - DCDC1 Timeouts */
205 0x1006, /* R182 - DCDC1 Low Power */
206 0x0018, /* R183 - DCDC2 Control */
207 0x0000, /* R184 - DCDC2 Timeouts */
208 0x0000, /* R185 */
209 0x0000, /* R186 - DCDC3 Control */
210 0x0000, /* R187 - DCDC3 Timeouts */
211 0x0006, /* R188 - DCDC3 Low Power */
212 0x0000, /* R189 - DCDC4 Control */
213 0x0000, /* R190 - DCDC4 Timeouts */
214 0x0006, /* R191 - DCDC4 Low Power */
215 0x0008, /* R192 - DCDC5 Control */
216 0x0000, /* R193 - DCDC5 Timeouts */
217 0x0000, /* R194 */
218 0x0000, /* R195 - DCDC6 Control */
219 0x0000, /* R196 - DCDC6 Timeouts */
220 0x0006, /* R197 - DCDC6 Low Power */
221 0x0000, /* R198 */
222 0x0003, /* R199 - Limit Switch Control */
223 0x001C, /* R200 - LDO1 Control */
224 0x0000, /* R201 - LDO1 Timeouts */
225 0x001C, /* R202 - LDO1 Low Power */
226 0x001B, /* R203 - LDO2 Control */
227 0x0000, /* R204 - LDO2 Timeouts */
228 0x001C, /* R205 - LDO2 Low Power */
229 0x001B, /* R206 - LDO3 Control */
230 0x0000, /* R207 - LDO3 Timeouts */
231 0x001C, /* R208 - LDO3 Low Power */
232 0x001B, /* R209 - LDO4 Control */
233 0x0000, /* R210 - LDO4 Timeouts */
234 0x001C, /* R211 - LDO4 Low Power */
235 0x0000, /* R212 */
236 0x0000, /* R213 */
237 0x0000, /* R214 */
238 0x0000, /* R215 - VCC_FAULT Masks */
239 0x001F, /* R216 - Main Bandgap Control */
240 0x0000, /* R217 - OSC Control */
241 0x9000, /* R218 - RTC Tick Control */
242 0x0000, /* R219 */
243 0x4000, /* R220 - RAM BIST 1 */
244 0x0000, /* R221 */
245 0x0000, /* R222 */
246 0x0000, /* R223 */
247 0x0000, /* R224 */
248 0x0000, /* R225 - DCDC/LDO status */
249 0x0000, /* R226 */
250 0x0000, /* R227 */
251 0x0000, /* R228 */
252 0x0000, /* R229 */
253 0xE000, /* R230 - GPIO Pin Status */
254 0x0000, /* R231 */
255 0x0000, /* R232 */
256 0x0000, /* R233 */
257 0x0000, /* R234 */
258 0x0000, /* R235 */
259 0x0000, /* R236 */
260 0x0000, /* R237 */
261 0x0000, /* R238 */
262 0x0000, /* R239 */
263 0x0000, /* R240 */
264 0x0000, /* R241 */
265 0x0000, /* R242 */
266 0x0000, /* R243 */
267 0x0000, /* R244 */
268 0x0000, /* R245 */
269 0x0000, /* R246 */
270 0x0000, /* R247 */
271 0x0000, /* R248 */
272 0x0000, /* R249 */
273 0x0000, /* R250 */
274 0x0000, /* R251 */
275 0x0000, /* R252 */
276 0x0000, /* R253 */
277 0x0000, /* R254 */
278 0x0000, /* R255 */
279};
280#endif
281
282#ifdef CONFIG_MFD_WM8350_CONFIG_MODE_1
283
284#undef WM8350_HAVE_CONFIG_MODE
285#define WM8350_HAVE_CONFIG_MODE
286
287const u16 wm8350_mode1_defaults[] = {
288 0x17FF, /* R0 - Reset/ID */
289 0x1000, /* R1 - ID */
290 0x0000, /* R2 */
291 0x1002, /* R3 - System Control 1 */
292 0x0014, /* R4 - System Control 2 */
293 0x0000, /* R5 - System Hibernate */
294 0x8A00, /* R6 - Interface Control */
295 0x0000, /* R7 */
296 0x8000, /* R8 - Power mgmt (1) */
297 0x0000, /* R9 - Power mgmt (2) */
298 0x0000, /* R10 - Power mgmt (3) */
299 0x2000, /* R11 - Power mgmt (4) */
300 0x0E00, /* R12 - Power mgmt (5) */
301 0x0000, /* R13 - Power mgmt (6) */
302 0x0000, /* R14 - Power mgmt (7) */
303 0x0000, /* R15 */
304 0x0000, /* R16 - RTC Seconds/Minutes */
305 0x0100, /* R17 - RTC Hours/Day */
306 0x0101, /* R18 - RTC Date/Month */
307 0x1400, /* R19 - RTC Year */
308 0x0000, /* R20 - Alarm Seconds/Minutes */
309 0x0000, /* R21 - Alarm Hours/Day */
310 0x0000, /* R22 - Alarm Date/Month */
311 0x0320, /* R23 - RTC Time Control */
312 0x0000, /* R24 - System Interrupts */
313 0x0000, /* R25 - Interrupt Status 1 */
314 0x0000, /* R26 - Interrupt Status 2 */
315 0x0000, /* R27 - Power Up Interrupt Status */
316 0x0000, /* R28 - Under Voltage Interrupt status */
317 0x0000, /* R29 - Over Current Interrupt status */
318 0x0000, /* R30 - GPIO Interrupt Status */
319 0x0000, /* R31 - Comparator Interrupt Status */
320 0x3FFF, /* R32 - System Interrupts Mask */
321 0x0000, /* R33 - Interrupt Status 1 Mask */
322 0x0000, /* R34 - Interrupt Status 2 Mask */
323 0x0000, /* R35 - Power Up Interrupt Status Mask */
324 0x0000, /* R36 - Under Voltage Interrupt status Mask */
325 0x0000, /* R37 - Over Current Interrupt status Mask */
326 0x0000, /* R38 - GPIO Interrupt Status Mask */
327 0x0000, /* R39 - Comparator Interrupt Status Mask */
328 0x0040, /* R40 - Clock Control 1 */
329 0x0000, /* R41 - Clock Control 2 */
330 0x3B00, /* R42 - FLL Control 1 */
331 0x7086, /* R43 - FLL Control 2 */
332 0xC226, /* R44 - FLL Control 3 */
333 0x0000, /* R45 - FLL Control 4 */
334 0x0000, /* R46 */
335 0x0000, /* R47 */
336 0x0000, /* R48 - DAC Control */
337 0x0000, /* R49 */
338 0x00C0, /* R50 - DAC Digital Volume L */
339 0x00C0, /* R51 - DAC Digital Volume R */
340 0x0000, /* R52 */
341 0x0040, /* R53 - DAC LR Rate */
342 0x0000, /* R54 - DAC Clock Control */
343 0x0000, /* R55 */
344 0x0000, /* R56 */
345 0x0000, /* R57 */
346 0x4000, /* R58 - DAC Mute */
347 0x0000, /* R59 - DAC Mute Volume */
348 0x0000, /* R60 - DAC Side */
349 0x0000, /* R61 */
350 0x0000, /* R62 */
351 0x0000, /* R63 */
352 0x8000, /* R64 - ADC Control */
353 0x0000, /* R65 */
354 0x00C0, /* R66 - ADC Digital Volume L */
355 0x00C0, /* R67 - ADC Digital Volume R */
356 0x0000, /* R68 - ADC Divider */
357 0x0000, /* R69 */
358 0x0040, /* R70 - ADC LR Rate */
359 0x0000, /* R71 */
360 0x0303, /* R72 - Input Control */
361 0x0000, /* R73 - IN3 Input Control */
362 0x0000, /* R74 - Mic Bias Control */
363 0x0000, /* R75 */
364 0x0000, /* R76 - Output Control */
365 0x0000, /* R77 - Jack Detect */
366 0x0000, /* R78 - Anti Pop Control */
367 0x0000, /* R79 */
368 0x0040, /* R80 - Left Input Volume */
369 0x0040, /* R81 - Right Input Volume */
370 0x0000, /* R82 */
371 0x0000, /* R83 */
372 0x0000, /* R84 */
373 0x0000, /* R85 */
374 0x0000, /* R86 */
375 0x0000, /* R87 */
376 0x0800, /* R88 - Left Mixer Control */
377 0x1000, /* R89 - Right Mixer Control */
378 0x0000, /* R90 */
379 0x0000, /* R91 */
380 0x0000, /* R92 - OUT3 Mixer Control */
381 0x0000, /* R93 - OUT4 Mixer Control */
382 0x0000, /* R94 */
383 0x0000, /* R95 */
384 0x0000, /* R96 - Output Left Mixer Volume */
385 0x0000, /* R97 - Output Right Mixer Volume */
386 0x0000, /* R98 - Input Mixer Volume L */
387 0x0000, /* R99 - Input Mixer Volume R */
388 0x0000, /* R100 - Input Mixer Volume */
389 0x0000, /* R101 */
390 0x0000, /* R102 */
391 0x0000, /* R103 */
392 0x00E4, /* R104 - LOUT1 Volume */
393 0x00E4, /* R105 - ROUT1 Volume */
394 0x00E4, /* R106 - LOUT2 Volume */
395 0x02E4, /* R107 - ROUT2 Volume */
396 0x0000, /* R108 */
397 0x0000, /* R109 */
398 0x0000, /* R110 */
399 0x0000, /* R111 - BEEP Volume */
400 0x0A00, /* R112 - AI Formating */
401 0x0000, /* R113 - ADC DAC COMP */
402 0x0020, /* R114 - AI ADC Control */
403 0x0020, /* R115 - AI DAC Control */
404 0x0000, /* R116 - AIF Test */
405 0x0000, /* R117 */
406 0x0000, /* R118 */
407 0x0000, /* R119 */
408 0x0000, /* R120 */
409 0x0000, /* R121 */
410 0x0000, /* R122 */
411 0x0000, /* R123 */
412 0x0000, /* R124 */
413 0x0000, /* R125 */
414 0x0000, /* R126 */
415 0x0000, /* R127 */
416 0x1FFF, /* R128 - GPIO Debounce */
417 0x0000, /* R129 - GPIO Pin pull up Control */
418 0x03FC, /* R130 - GPIO Pull down Control */
419 0x0000, /* R131 - GPIO Interrupt Mode */
420 0x0000, /* R132 */
421 0x0000, /* R133 - GPIO Control */
422 0x00FB, /* R134 - GPIO Configuration (i/o) */
423 0x04FE, /* R135 - GPIO Pin Polarity / Type */
424 0x0000, /* R136 */
425 0x0000, /* R137 */
426 0x0000, /* R138 */
427 0x0000, /* R139 */
428 0x0312, /* R140 - GPIO Function Select 1 */
429 0x1003, /* R141 - GPIO Function Select 2 */
430 0x1331, /* R142 - GPIO Function Select 3 */
431 0x0003, /* R143 - GPIO Function Select 4 */
432 0x0000, /* R144 - Digitiser Control (1) */
433 0x0002, /* R145 - Digitiser Control (2) */
434 0x0000, /* R146 */
435 0x0000, /* R147 */
436 0x0000, /* R148 */
437 0x0000, /* R149 */
438 0x0000, /* R150 */
439 0x0000, /* R151 */
440 0x7000, /* R152 - AUX1 Readback */
441 0x7000, /* R153 - AUX2 Readback */
442 0x7000, /* R154 - AUX3 Readback */
443 0x7000, /* R155 - AUX4 Readback */
444 0x0000, /* R156 - USB Voltage Readback */
445 0x0000, /* R157 - LINE Voltage Readback */
446 0x0000, /* R158 - BATT Voltage Readback */
447 0x0000, /* R159 - Chip Temp Readback */
448 0x0000, /* R160 */
449 0x0000, /* R161 */
450 0x0000, /* R162 */
451 0x0000, /* R163 - Generic Comparator Control */
452 0x0000, /* R164 - Generic comparator 1 */
453 0x0000, /* R165 - Generic comparator 2 */
454 0x0000, /* R166 - Generic comparator 3 */
455 0x0000, /* R167 - Generic comparator 4 */
456 0xA00F, /* R168 - Battery Charger Control 1 */
457 0x0B06, /* R169 - Battery Charger Control 2 */
458 0x0000, /* R170 - Battery Charger Control 3 */
459 0x0000, /* R171 */
460 0x0000, /* R172 - Current Sink Driver A */
461 0x0000, /* R173 - CSA Flash control */
462 0x0000, /* R174 - Current Sink Driver B */
463 0x0000, /* R175 - CSB Flash control */
464 0x0000, /* R176 - DCDC/LDO requested */
465 0x002D, /* R177 - DCDC Active options */
466 0x0000, /* R178 - DCDC Sleep options */
467 0x0025, /* R179 - Power-check comparator */
468 0x0062, /* R180 - DCDC1 Control */
469 0x0400, /* R181 - DCDC1 Timeouts */
470 0x1006, /* R182 - DCDC1 Low Power */
471 0x0018, /* R183 - DCDC2 Control */
472 0x0000, /* R184 - DCDC2 Timeouts */
473 0x0000, /* R185 */
474 0x0026, /* R186 - DCDC3 Control */
475 0x0400, /* R187 - DCDC3 Timeouts */
476 0x0006, /* R188 - DCDC3 Low Power */
477 0x0062, /* R189 - DCDC4 Control */
478 0x0400, /* R190 - DCDC4 Timeouts */
479 0x0006, /* R191 - DCDC4 Low Power */
480 0x0008, /* R192 - DCDC5 Control */
481 0x0000, /* R193 - DCDC5 Timeouts */
482 0x0000, /* R194 */
483 0x0026, /* R195 - DCDC6 Control */
484 0x0800, /* R196 - DCDC6 Timeouts */
485 0x0006, /* R197 - DCDC6 Low Power */
486 0x0000, /* R198 */
487 0x0003, /* R199 - Limit Switch Control */
488 0x0006, /* R200 - LDO1 Control */
489 0x0400, /* R201 - LDO1 Timeouts */
490 0x001C, /* R202 - LDO1 Low Power */
491 0x0006, /* R203 - LDO2 Control */
492 0x0400, /* R204 - LDO2 Timeouts */
493 0x001C, /* R205 - LDO2 Low Power */
494 0x001B, /* R206 - LDO3 Control */
495 0x0000, /* R207 - LDO3 Timeouts */
496 0x001C, /* R208 - LDO3 Low Power */
497 0x001B, /* R209 - LDO4 Control */
498 0x0000, /* R210 - LDO4 Timeouts */
499 0x001C, /* R211 - LDO4 Low Power */
500 0x0000, /* R212 */
501 0x0000, /* R213 */
502 0x0000, /* R214 */
503 0x0000, /* R215 - VCC_FAULT Masks */
504 0x001F, /* R216 - Main Bandgap Control */
505 0x0000, /* R217 - OSC Control */
506 0x9000, /* R218 - RTC Tick Control */
507 0x0000, /* R219 */
508 0x4000, /* R220 - RAM BIST 1 */
509 0x0000, /* R221 */
510 0x0000, /* R222 */
511 0x0000, /* R223 */
512 0x0000, /* R224 */
513 0x0000, /* R225 - DCDC/LDO status */
514 0x0000, /* R226 */
515 0x0000, /* R227 */
516 0x0000, /* R228 */
517 0x0000, /* R229 */
518 0xE000, /* R230 - GPIO Pin Status */
519 0x0000, /* R231 */
520 0x0000, /* R232 */
521 0x0000, /* R233 */
522 0x0000, /* R234 */
523 0x0000, /* R235 */
524 0x0000, /* R236 */
525 0x0000, /* R237 */
526 0x0000, /* R238 */
527 0x0000, /* R239 */
528 0x0000, /* R240 */
529 0x0000, /* R241 */
530 0x0000, /* R242 */
531 0x0000, /* R243 */
532 0x0000, /* R244 */
533 0x0000, /* R245 */
534 0x0000, /* R246 */
535 0x0000, /* R247 */
536 0x0000, /* R248 */
537 0x0000, /* R249 */
538 0x0000, /* R250 */
539 0x0000, /* R251 */
540 0x0000, /* R252 */
541 0x0000, /* R253 */
542 0x0000, /* R254 */
543 0x0000, /* R255 */
544};
545#endif
546
547#ifdef CONFIG_MFD_WM8350_CONFIG_MODE_2
548
549#undef WM8350_HAVE_CONFIG_MODE
550#define WM8350_HAVE_CONFIG_MODE
551
552const u16 wm8350_mode2_defaults[] = {
553 0x17FF, /* R0 - Reset/ID */
554 0x1000, /* R1 - ID */
555 0x0000, /* R2 */
556 0x1002, /* R3 - System Control 1 */
557 0x0014, /* R4 - System Control 2 */
558 0x0000, /* R5 - System Hibernate */
559 0x8A00, /* R6 - Interface Control */
560 0x0000, /* R7 */
561 0x8000, /* R8 - Power mgmt (1) */
562 0x0000, /* R9 - Power mgmt (2) */
563 0x0000, /* R10 - Power mgmt (3) */
564 0x2000, /* R11 - Power mgmt (4) */
565 0x0E00, /* R12 - Power mgmt (5) */
566 0x0000, /* R13 - Power mgmt (6) */
567 0x0000, /* R14 - Power mgmt (7) */
568 0x0000, /* R15 */
569 0x0000, /* R16 - RTC Seconds/Minutes */
570 0x0100, /* R17 - RTC Hours/Day */
571 0x0101, /* R18 - RTC Date/Month */
572 0x1400, /* R19 - RTC Year */
573 0x0000, /* R20 - Alarm Seconds/Minutes */
574 0x0000, /* R21 - Alarm Hours/Day */
575 0x0000, /* R22 - Alarm Date/Month */
576 0x0320, /* R23 - RTC Time Control */
577 0x0000, /* R24 - System Interrupts */
578 0x0000, /* R25 - Interrupt Status 1 */
579 0x0000, /* R26 - Interrupt Status 2 */
580 0x0000, /* R27 - Power Up Interrupt Status */
581 0x0000, /* R28 - Under Voltage Interrupt status */
582 0x0000, /* R29 - Over Current Interrupt status */
583 0x0000, /* R30 - GPIO Interrupt Status */
584 0x0000, /* R31 - Comparator Interrupt Status */
585 0x3FFF, /* R32 - System Interrupts Mask */
586 0x0000, /* R33 - Interrupt Status 1 Mask */
587 0x0000, /* R34 - Interrupt Status 2 Mask */
588 0x0000, /* R35 - Power Up Interrupt Status Mask */
589 0x0000, /* R36 - Under Voltage Interrupt status Mask */
590 0x0000, /* R37 - Over Current Interrupt status Mask */
591 0x0000, /* R38 - GPIO Interrupt Status Mask */
592 0x0000, /* R39 - Comparator Interrupt Status Mask */
593 0x0040, /* R40 - Clock Control 1 */
594 0x0000, /* R41 - Clock Control 2 */
595 0x3B00, /* R42 - FLL Control 1 */
596 0x7086, /* R43 - FLL Control 2 */
597 0xC226, /* R44 - FLL Control 3 */
598 0x0000, /* R45 - FLL Control 4 */
599 0x0000, /* R46 */
600 0x0000, /* R47 */
601 0x0000, /* R48 - DAC Control */
602 0x0000, /* R49 */
603 0x00C0, /* R50 - DAC Digital Volume L */
604 0x00C0, /* R51 - DAC Digital Volume R */
605 0x0000, /* R52 */
606 0x0040, /* R53 - DAC LR Rate */
607 0x0000, /* R54 - DAC Clock Control */
608 0x0000, /* R55 */
609 0x0000, /* R56 */
610 0x0000, /* R57 */
611 0x4000, /* R58 - DAC Mute */
612 0x0000, /* R59 - DAC Mute Volume */
613 0x0000, /* R60 - DAC Side */
614 0x0000, /* R61 */
615 0x0000, /* R62 */
616 0x0000, /* R63 */
617 0x8000, /* R64 - ADC Control */
618 0x0000, /* R65 */
619 0x00C0, /* R66 - ADC Digital Volume L */
620 0x00C0, /* R67 - ADC Digital Volume R */
621 0x0000, /* R68 - ADC Divider */
622 0x0000, /* R69 */
623 0x0040, /* R70 - ADC LR Rate */
624 0x0000, /* R71 */
625 0x0303, /* R72 - Input Control */
626 0x0000, /* R73 - IN3 Input Control */
627 0x0000, /* R74 - Mic Bias Control */
628 0x0000, /* R75 */
629 0x0000, /* R76 - Output Control */
630 0x0000, /* R77 - Jack Detect */
631 0x0000, /* R78 - Anti Pop Control */
632 0x0000, /* R79 */
633 0x0040, /* R80 - Left Input Volume */
634 0x0040, /* R81 - Right Input Volume */
635 0x0000, /* R82 */
636 0x0000, /* R83 */
637 0x0000, /* R84 */
638 0x0000, /* R85 */
639 0x0000, /* R86 */
640 0x0000, /* R87 */
641 0x0800, /* R88 - Left Mixer Control */
642 0x1000, /* R89 - Right Mixer Control */
643 0x0000, /* R90 */
644 0x0000, /* R91 */
645 0x0000, /* R92 - OUT3 Mixer Control */
646 0x0000, /* R93 - OUT4 Mixer Control */
647 0x0000, /* R94 */
648 0x0000, /* R95 */
649 0x0000, /* R96 - Output Left Mixer Volume */
650 0x0000, /* R97 - Output Right Mixer Volume */
651 0x0000, /* R98 - Input Mixer Volume L */
652 0x0000, /* R99 - Input Mixer Volume R */
653 0x0000, /* R100 - Input Mixer Volume */
654 0x0000, /* R101 */
655 0x0000, /* R102 */
656 0x0000, /* R103 */
657 0x00E4, /* R104 - LOUT1 Volume */
658 0x00E4, /* R105 - ROUT1 Volume */
659 0x00E4, /* R106 - LOUT2 Volume */
660 0x02E4, /* R107 - ROUT2 Volume */
661 0x0000, /* R108 */
662 0x0000, /* R109 */
663 0x0000, /* R110 */
664 0x0000, /* R111 - BEEP Volume */
665 0x0A00, /* R112 - AI Formating */
666 0x0000, /* R113 - ADC DAC COMP */
667 0x0020, /* R114 - AI ADC Control */
668 0x0020, /* R115 - AI DAC Control */
669 0x0000, /* R116 - AIF Test */
670 0x0000, /* R117 */
671 0x0000, /* R118 */
672 0x0000, /* R119 */
673 0x0000, /* R120 */
674 0x0000, /* R121 */
675 0x0000, /* R122 */
676 0x0000, /* R123 */
677 0x0000, /* R124 */
678 0x0000, /* R125 */
679 0x0000, /* R126 */
680 0x0000, /* R127 */
681 0x1FFF, /* R128 - GPIO Debounce */
682 0x0000, /* R129 - GPIO Pin pull up Control */
683 0x03FC, /* R130 - GPIO Pull down Control */
684 0x0000, /* R131 - GPIO Interrupt Mode */
685 0x0000, /* R132 */
686 0x0000, /* R133 - GPIO Control */
687 0x08FB, /* R134 - GPIO Configuration (i/o) */
688 0x0CFE, /* R135 - GPIO Pin Polarity / Type */
689 0x0000, /* R136 */
690 0x0000, /* R137 */
691 0x0000, /* R138 */
692 0x0000, /* R139 */
693 0x0312, /* R140 - GPIO Function Select 1 */
694 0x0003, /* R141 - GPIO Function Select 2 */
695 0x2331, /* R142 - GPIO Function Select 3 */
696 0x0003, /* R143 - GPIO Function Select 4 */
697 0x0000, /* R144 - Digitiser Control (1) */
698 0x0002, /* R145 - Digitiser Control (2) */
699 0x0000, /* R146 */
700 0x0000, /* R147 */
701 0x0000, /* R148 */
702 0x0000, /* R149 */
703 0x0000, /* R150 */
704 0x0000, /* R151 */
705 0x7000, /* R152 - AUX1 Readback */
706 0x7000, /* R153 - AUX2 Readback */
707 0x7000, /* R154 - AUX3 Readback */
708 0x7000, /* R155 - AUX4 Readback */
709 0x0000, /* R156 - USB Voltage Readback */
710 0x0000, /* R157 - LINE Voltage Readback */
711 0x0000, /* R158 - BATT Voltage Readback */
712 0x0000, /* R159 - Chip Temp Readback */
713 0x0000, /* R160 */
714 0x0000, /* R161 */
715 0x0000, /* R162 */
716 0x0000, /* R163 - Generic Comparator Control */
717 0x0000, /* R164 - Generic comparator 1 */
718 0x0000, /* R165 - Generic comparator 2 */
719 0x0000, /* R166 - Generic comparator 3 */
720 0x0000, /* R167 - Generic comparator 4 */
721 0xA00F, /* R168 - Battery Charger Control 1 */
722 0x0B06, /* R169 - Battery Charger Control 2 */
723 0x0000, /* R170 - Battery Charger Control 3 */
724 0x0000, /* R171 */
725 0x0000, /* R172 - Current Sink Driver A */
726 0x0000, /* R173 - CSA Flash control */
727 0x0000, /* R174 - Current Sink Driver B */
728 0x0000, /* R175 - CSB Flash control */
729 0x0000, /* R176 - DCDC/LDO requested */
730 0x002D, /* R177 - DCDC Active options */
731 0x0000, /* R178 - DCDC Sleep options */
732 0x0025, /* R179 - Power-check comparator */
733 0x000E, /* R180 - DCDC1 Control */
734 0x0400, /* R181 - DCDC1 Timeouts */
735 0x1006, /* R182 - DCDC1 Low Power */
736 0x0018, /* R183 - DCDC2 Control */
737 0x0000, /* R184 - DCDC2 Timeouts */
738 0x0000, /* R185 */
739 0x002E, /* R186 - DCDC3 Control */
740 0x0800, /* R187 - DCDC3 Timeouts */
741 0x0006, /* R188 - DCDC3 Low Power */
742 0x000E, /* R189 - DCDC4 Control */
743 0x0800, /* R190 - DCDC4 Timeouts */
744 0x0006, /* R191 - DCDC4 Low Power */
745 0x0008, /* R192 - DCDC5 Control */
746 0x0000, /* R193 - DCDC5 Timeouts */
747 0x0000, /* R194 */
748 0x0026, /* R195 - DCDC6 Control */
749 0x0C00, /* R196 - DCDC6 Timeouts */
750 0x0006, /* R197 - DCDC6 Low Power */
751 0x0000, /* R198 */
752 0x0003, /* R199 - Limit Switch Control */
753 0x001A, /* R200 - LDO1 Control */
754 0x0800, /* R201 - LDO1 Timeouts */
755 0x001C, /* R202 - LDO1 Low Power */
756 0x0010, /* R203 - LDO2 Control */
757 0x0800, /* R204 - LDO2 Timeouts */
758 0x001C, /* R205 - LDO2 Low Power */
759 0x000A, /* R206 - LDO3 Control */
760 0x0C00, /* R207 - LDO3 Timeouts */
761 0x001C, /* R208 - LDO3 Low Power */
762 0x001A, /* R209 - LDO4 Control */
763 0x0800, /* R210 - LDO4 Timeouts */
764 0x001C, /* R211 - LDO4 Low Power */
765 0x0000, /* R212 */
766 0x0000, /* R213 */
767 0x0000, /* R214 */
768 0x0000, /* R215 - VCC_FAULT Masks */
769 0x001F, /* R216 - Main Bandgap Control */
770 0x0000, /* R217 - OSC Control */
771 0x9000, /* R218 - RTC Tick Control */
772 0x0000, /* R219 */
773 0x4000, /* R220 - RAM BIST 1 */
774 0x0000, /* R221 */
775 0x0000, /* R222 */
776 0x0000, /* R223 */
777 0x0000, /* R224 */
778 0x0000, /* R225 - DCDC/LDO status */
779 0x0000, /* R226 */
780 0x0000, /* R227 */
781 0x0000, /* R228 */
782 0x0000, /* R229 */
783 0xE000, /* R230 - GPIO Pin Status */
784 0x0000, /* R231 */
785 0x0000, /* R232 */
786 0x0000, /* R233 */
787 0x0000, /* R234 */
788 0x0000, /* R235 */
789 0x0000, /* R236 */
790 0x0000, /* R237 */
791 0x0000, /* R238 */
792 0x0000, /* R239 */
793 0x0000, /* R240 */
794 0x0000, /* R241 */
795 0x0000, /* R242 */
796 0x0000, /* R243 */
797 0x0000, /* R244 */
798 0x0000, /* R245 */
799 0x0000, /* R246 */
800 0x0000, /* R247 */
801 0x0000, /* R248 */
802 0x0000, /* R249 */
803 0x0000, /* R250 */
804 0x0000, /* R251 */
805 0x0000, /* R252 */
806 0x0000, /* R253 */
807 0x0000, /* R254 */
808 0x0000, /* R255 */
809};
810#endif
811
812#ifdef CONFIG_MFD_WM8350_CONFIG_MODE_3
813
814#undef WM8350_HAVE_CONFIG_MODE
815#define WM8350_HAVE_CONFIG_MODE
816
817const u16 wm8350_mode3_defaults[] = {
818 0x17FF, /* R0 - Reset/ID */
819 0x1000, /* R1 - ID */
820 0x0000, /* R2 */
821 0x1000, /* R3 - System Control 1 */
822 0x0004, /* R4 - System Control 2 */
823 0x0000, /* R5 - System Hibernate */
824 0x8A00, /* R6 - Interface Control */
825 0x0000, /* R7 */
826 0x8000, /* R8 - Power mgmt (1) */
827 0x0000, /* R9 - Power mgmt (2) */
828 0x0000, /* R10 - Power mgmt (3) */
829 0x2000, /* R11 - Power mgmt (4) */
830 0x0E00, /* R12 - Power mgmt (5) */
831 0x0000, /* R13 - Power mgmt (6) */
832 0x0000, /* R14 - Power mgmt (7) */
833 0x0000, /* R15 */
834 0x0000, /* R16 - RTC Seconds/Minutes */
835 0x0100, /* R17 - RTC Hours/Day */
836 0x0101, /* R18 - RTC Date/Month */
837 0x1400, /* R19 - RTC Year */
838 0x0000, /* R20 - Alarm Seconds/Minutes */
839 0x0000, /* R21 - Alarm Hours/Day */
840 0x0000, /* R22 - Alarm Date/Month */
841 0x0320, /* R23 - RTC Time Control */
842 0x0000, /* R24 - System Interrupts */
843 0x0000, /* R25 - Interrupt Status 1 */
844 0x0000, /* R26 - Interrupt Status 2 */
845 0x0000, /* R27 - Power Up Interrupt Status */
846 0x0000, /* R28 - Under Voltage Interrupt status */
847 0x0000, /* R29 - Over Current Interrupt status */
848 0x0000, /* R30 - GPIO Interrupt Status */
849 0x0000, /* R31 - Comparator Interrupt Status */
850 0x3FFF, /* R32 - System Interrupts Mask */
851 0x0000, /* R33 - Interrupt Status 1 Mask */
852 0x0000, /* R34 - Interrupt Status 2 Mask */
853 0x0000, /* R35 - Power Up Interrupt Status Mask */
854 0x0000, /* R36 - Under Voltage Interrupt status Mask */
855 0x0000, /* R37 - Over Current Interrupt status Mask */
856 0x0000, /* R38 - GPIO Interrupt Status Mask */
857 0x0000, /* R39 - Comparator Interrupt Status Mask */
858 0x0040, /* R40 - Clock Control 1 */
859 0x0000, /* R41 - Clock Control 2 */
860 0x3B00, /* R42 - FLL Control 1 */
861 0x7086, /* R43 - FLL Control 2 */
862 0xC226, /* R44 - FLL Control 3 */
863 0x0000, /* R45 - FLL Control 4 */
864 0x0000, /* R46 */
865 0x0000, /* R47 */
866 0x0000, /* R48 - DAC Control */
867 0x0000, /* R49 */
868 0x00C0, /* R50 - DAC Digital Volume L */
869 0x00C0, /* R51 - DAC Digital Volume R */
870 0x0000, /* R52 */
871 0x0040, /* R53 - DAC LR Rate */
872 0x0000, /* R54 - DAC Clock Control */
873 0x0000, /* R55 */
874 0x0000, /* R56 */
875 0x0000, /* R57 */
876 0x4000, /* R58 - DAC Mute */
877 0x0000, /* R59 - DAC Mute Volume */
878 0x0000, /* R60 - DAC Side */
879 0x0000, /* R61 */
880 0x0000, /* R62 */
881 0x0000, /* R63 */
882 0x8000, /* R64 - ADC Control */
883 0x0000, /* R65 */
884 0x00C0, /* R66 - ADC Digital Volume L */
885 0x00C0, /* R67 - ADC Digital Volume R */
886 0x0000, /* R68 - ADC Divider */
887 0x0000, /* R69 */
888 0x0040, /* R70 - ADC LR Rate */
889 0x0000, /* R71 */
890 0x0303, /* R72 - Input Control */
891 0x0000, /* R73 - IN3 Input Control */
892 0x0000, /* R74 - Mic Bias Control */
893 0x0000, /* R75 */
894 0x0000, /* R76 - Output Control */
895 0x0000, /* R77 - Jack Detect */
896 0x0000, /* R78 - Anti Pop Control */
897 0x0000, /* R79 */
898 0x0040, /* R80 - Left Input Volume */
899 0x0040, /* R81 - Right Input Volume */
900 0x0000, /* R82 */
901 0x0000, /* R83 */
902 0x0000, /* R84 */
903 0x0000, /* R85 */
904 0x0000, /* R86 */
905 0x0000, /* R87 */
906 0x0800, /* R88 - Left Mixer Control */
907 0x1000, /* R89 - Right Mixer Control */
908 0x0000, /* R90 */
909 0x0000, /* R91 */
910 0x0000, /* R92 - OUT3 Mixer Control */
911 0x0000, /* R93 - OUT4 Mixer Control */
912 0x0000, /* R94 */
913 0x0000, /* R95 */
914 0x0000, /* R96 - Output Left Mixer Volume */
915 0x0000, /* R97 - Output Right Mixer Volume */
916 0x0000, /* R98 - Input Mixer Volume L */
917 0x0000, /* R99 - Input Mixer Volume R */
918 0x0000, /* R100 - Input Mixer Volume */
919 0x0000, /* R101 */
920 0x0000, /* R102 */
921 0x0000, /* R103 */
922 0x00E4, /* R104 - LOUT1 Volume */
923 0x00E4, /* R105 - ROUT1 Volume */
924 0x00E4, /* R106 - LOUT2 Volume */
925 0x02E4, /* R107 - ROUT2 Volume */
926 0x0000, /* R108 */
927 0x0000, /* R109 */
928 0x0000, /* R110 */
929 0x0000, /* R111 - BEEP Volume */
930 0x0A00, /* R112 - AI Formating */
931 0x0000, /* R113 - ADC DAC COMP */
932 0x0020, /* R114 - AI ADC Control */
933 0x0020, /* R115 - AI DAC Control */
934 0x0000, /* R116 - AIF Test */
935 0x0000, /* R117 */
936 0x0000, /* R118 */
937 0x0000, /* R119 */
938 0x0000, /* R120 */
939 0x0000, /* R121 */
940 0x0000, /* R122 */
941 0x0000, /* R123 */
942 0x0000, /* R124 */
943 0x0000, /* R125 */
944 0x0000, /* R126 */
945 0x0000, /* R127 */
946 0x1FFF, /* R128 - GPIO Debounce */
947 0x0000, /* R129 - GPIO Pin pull up Control */
948 0x03FC, /* R130 - GPIO Pull down Control */
949 0x0000, /* R131 - GPIO Interrupt Mode */
950 0x0000, /* R132 */
951 0x0000, /* R133 - GPIO Control */
952 0x0A7B, /* R134 - GPIO Configuration (i/o) */
953 0x06FE, /* R135 - GPIO Pin Polarity / Type */
954 0x0000, /* R136 */
955 0x0000, /* R137 */
956 0x0000, /* R138 */
957 0x0000, /* R139 */
958 0x1312, /* R140 - GPIO Function Select 1 */
959 0x1030, /* R141 - GPIO Function Select 2 */
960 0x2231, /* R142 - GPIO Function Select 3 */
961 0x0003, /* R143 - GPIO Function Select 4 */
962 0x0000, /* R144 - Digitiser Control (1) */
963 0x0002, /* R145 - Digitiser Control (2) */
964 0x0000, /* R146 */
965 0x0000, /* R147 */
966 0x0000, /* R148 */
967 0x0000, /* R149 */
968 0x0000, /* R150 */
969 0x0000, /* R151 */
970 0x7000, /* R152 - AUX1 Readback */
971 0x7000, /* R153 - AUX2 Readback */
972 0x7000, /* R154 - AUX3 Readback */
973 0x7000, /* R155 - AUX4 Readback */
974 0x0000, /* R156 - USB Voltage Readback */
975 0x0000, /* R157 - LINE Voltage Readback */
976 0x0000, /* R158 - BATT Voltage Readback */
977 0x0000, /* R159 - Chip Temp Readback */
978 0x0000, /* R160 */
979 0x0000, /* R161 */
980 0x0000, /* R162 */
981 0x0000, /* R163 - Generic Comparator Control */
982 0x0000, /* R164 - Generic comparator 1 */
983 0x0000, /* R165 - Generic comparator 2 */
984 0x0000, /* R166 - Generic comparator 3 */
985 0x0000, /* R167 - Generic comparator 4 */
986 0xA00F, /* R168 - Battery Charger Control 1 */
987 0x0B06, /* R169 - Battery Charger Control 2 */
988 0x0000, /* R170 - Battery Charger Control 3 */
989 0x0000, /* R171 */
990 0x0000, /* R172 - Current Sink Driver A */
991 0x0000, /* R173 - CSA Flash control */
992 0x0000, /* R174 - Current Sink Driver B */
993 0x0000, /* R175 - CSB Flash control */
994 0x0000, /* R176 - DCDC/LDO requested */
995 0x002D, /* R177 - DCDC Active options */
996 0x0000, /* R178 - DCDC Sleep options */
997 0x0025, /* R179 - Power-check comparator */
998 0x000E, /* R180 - DCDC1 Control */
999 0x0400, /* R181 - DCDC1 Timeouts */
1000 0x1006, /* R182 - DCDC1 Low Power */
1001 0x0018, /* R183 - DCDC2 Control */
1002 0x0000, /* R184 - DCDC2 Timeouts */
1003 0x0000, /* R185 */
1004 0x000E, /* R186 - DCDC3 Control */
1005 0x0400, /* R187 - DCDC3 Timeouts */
1006 0x0006, /* R188 - DCDC3 Low Power */
1007 0x0026, /* R189 - DCDC4 Control */
1008 0x0400, /* R190 - DCDC4 Timeouts */
1009 0x0006, /* R191 - DCDC4 Low Power */
1010 0x0008, /* R192 - DCDC5 Control */
1011 0x0000, /* R193 - DCDC5 Timeouts */
1012 0x0000, /* R194 */
1013 0x0026, /* R195 - DCDC6 Control */
1014 0x0400, /* R196 - DCDC6 Timeouts */
1015 0x0006, /* R197 - DCDC6 Low Power */
1016 0x0000, /* R198 */
1017 0x0003, /* R199 - Limit Switch Control */
1018 0x001C, /* R200 - LDO1 Control */
1019 0x0000, /* R201 - LDO1 Timeouts */
1020 0x001C, /* R202 - LDO1 Low Power */
1021 0x001C, /* R203 - LDO2 Control */
1022 0x0400, /* R204 - LDO2 Timeouts */
1023 0x001C, /* R205 - LDO2 Low Power */
1024 0x001C, /* R206 - LDO3 Control */
1025 0x0400, /* R207 - LDO3 Timeouts */
1026 0x001C, /* R208 - LDO3 Low Power */
1027 0x001F, /* R209 - LDO4 Control */
1028 0x0400, /* R210 - LDO4 Timeouts */
1029 0x001C, /* R211 - LDO4 Low Power */
1030 0x0000, /* R212 */
1031 0x0000, /* R213 */
1032 0x0000, /* R214 */
1033 0x0000, /* R215 - VCC_FAULT Masks */
1034 0x001F, /* R216 - Main Bandgap Control */
1035 0x0000, /* R217 - OSC Control */
1036 0x9000, /* R218 - RTC Tick Control */
1037 0x0000, /* R219 */
1038 0x4000, /* R220 - RAM BIST 1 */
1039 0x0000, /* R221 */
1040 0x0000, /* R222 */
1041 0x0000, /* R223 */
1042 0x0000, /* R224 */
1043 0x0000, /* R225 - DCDC/LDO status */
1044 0x0000, /* R226 */
1045 0x0000, /* R227 */
1046 0x0000, /* R228 */
1047 0x0000, /* R229 */
1048 0xE000, /* R230 - GPIO Pin Status */
1049 0x0000, /* R231 */
1050 0x0000, /* R232 */
1051 0x0000, /* R233 */
1052 0x0000, /* R234 */
1053 0x0000, /* R235 */
1054 0x0000, /* R236 */
1055 0x0000, /* R237 */
1056 0x0000, /* R238 */
1057 0x0000, /* R239 */
1058 0x0000, /* R240 */
1059 0x0000, /* R241 */
1060 0x0000, /* R242 */
1061 0x0000, /* R243 */
1062 0x0000, /* R244 */
1063 0x0000, /* R245 */
1064 0x0000, /* R246 */
1065 0x0000, /* R247 */
1066 0x0000, /* R248 */
1067 0x0000, /* R249 */
1068 0x0000, /* R250 */
1069 0x0000, /* R251 */
1070 0x0000, /* R252 */
1071 0x0000, /* R253 */
1072 0x0000, /* R254 */
1073 0x0000, /* R255 */
1074};
1075#endif
1076
1077/* The register defaults for the config mode used must be compiled in but
1078 * due to the impact on kernel size it is possible to disable
1079 */
1080#ifndef WM8350_HAVE_CONFIG_MODE
1081#warning No WM8350 config modes supported - select at least one of the
1082#warning MFD_WM8350_CONFIG_MODE_n options from the board driver.
1083#endif
1084
1085/*
1086 * Access masks.
1087 */
1088
1089const struct wm8350_reg_access wm8350_reg_io_map[] = {
1090 /* read write volatile */
1091 { 0xFFFF, 0xFFFF, 0xFFFF }, /* R0 - Reset/ID */
1092 { 0x7CFF, 0x0C00, 0x7FFF }, /* R1 - ID */
1093 { 0x0000, 0x0000, 0x0000 }, /* R2 */
1094 { 0xBE3B, 0xBE3B, 0x8000 }, /* R3 - System Control 1 */
1095 { 0xFCF7, 0xFCF7, 0xF800 }, /* R4 - System Control 2 */
1096 { 0x80FF, 0x80FF, 0x8000 }, /* R5 - System Hibernate */
1097 { 0xFB0E, 0xFB0E, 0x0000 }, /* R6 - Interface Control */
1098 { 0x0000, 0x0000, 0x0000 }, /* R7 */
1099 { 0xE537, 0xE537, 0xFFFF }, /* R8 - Power mgmt (1) */
1100 { 0x0FF3, 0x0FF3, 0xFFFF }, /* R9 - Power mgmt (2) */
1101 { 0x008F, 0x008F, 0xFFFF }, /* R10 - Power mgmt (3) */
1102 { 0x6D3C, 0x6D3C, 0xFFFF }, /* R11 - Power mgmt (4) */
1103 { 0x1F8F, 0x1F8F, 0xFFFF }, /* R12 - Power mgmt (5) */
1104 { 0x8F3F, 0x8F3F, 0xFFFF }, /* R13 - Power mgmt (6) */
1105 { 0x0003, 0x0003, 0xFFFF }, /* R14 - Power mgmt (7) */
1106 { 0x0000, 0x0000, 0x0000 }, /* R15 */
1107 { 0x7F7F, 0x7F7F, 0xFFFF }, /* R16 - RTC Seconds/Minutes */
1108 { 0x073F, 0x073F, 0xFFFF }, /* R17 - RTC Hours/Day */
1109 { 0x1F3F, 0x1F3F, 0xFFFF }, /* R18 - RTC Date/Month */
1110 { 0x3FFF, 0x00FF, 0xFFFF }, /* R19 - RTC Year */
1111 { 0x7F7F, 0x7F7F, 0x0000 }, /* R20 - Alarm Seconds/Minutes */
1112 { 0x0F3F, 0x0F3F, 0x0000 }, /* R21 - Alarm Hours/Day */
1113 { 0x1F3F, 0x1F3F, 0x0000 }, /* R22 - Alarm Date/Month */
1114 { 0xEF7F, 0xEA7F, 0xFFFF }, /* R23 - RTC Time Control */
1115 { 0x3BFF, 0x0000, 0xFFFF }, /* R24 - System Interrupts */
1116 { 0xFEE7, 0x0000, 0xFFFF }, /* R25 - Interrupt Status 1 */
1117 { 0x35FF, 0x0000, 0xFFFF }, /* R26 - Interrupt Status 2 */
1118 { 0x0F3F, 0x0000, 0xFFFF }, /* R27 - Power Up Interrupt Status */
1119 { 0x0F3F, 0x0000, 0xFFFF }, /* R28 - Under Voltage Interrupt status */
1120 { 0x8000, 0x0000, 0xFFFF }, /* R29 - Over Current Interrupt status */
1121 { 0x1FFF, 0x0000, 0xFFFF }, /* R30 - GPIO Interrupt Status */
1122 { 0xEF7F, 0x0000, 0xFFFF }, /* R31 - Comparator Interrupt Status */
1123 { 0x3FFF, 0x3FFF, 0x0000 }, /* R32 - System Interrupts Mask */
1124 { 0xFEE7, 0xFEE7, 0x0000 }, /* R33 - Interrupt Status 1 Mask */
1125 { 0xF5FF, 0xF5FF, 0x0000 }, /* R34 - Interrupt Status 2 Mask */
1126 { 0x0F3F, 0x0F3F, 0x0000 }, /* R35 - Power Up Interrupt Status Mask */
1127 { 0x0F3F, 0x0F3F, 0x0000 }, /* R36 - Under Voltage Int status Mask */
1128 { 0x8000, 0x8000, 0x0000 }, /* R37 - Over Current Int status Mask */
1129 { 0x1FFF, 0x1FFF, 0x0000 }, /* R38 - GPIO Interrupt Status Mask */
1130 { 0xEF7F, 0xEF7F, 0x0000 }, /* R39 - Comparator IntStatus Mask */
1131 { 0xC9F7, 0xC9F7, 0xFFFF }, /* R40 - Clock Control 1 */
1132 { 0x8001, 0x8001, 0x0000 }, /* R41 - Clock Control 2 */
1133 { 0xFFF7, 0xFFF7, 0xFFFF }, /* R42 - FLL Control 1 */
1134 { 0xFBFF, 0xFBFF, 0x0000 }, /* R43 - FLL Control 2 */
1135 { 0xFFFF, 0xFFFF, 0x0000 }, /* R44 - FLL Control 3 */
1136 { 0x0033, 0x0033, 0x0000 }, /* R45 - FLL Control 4 */
1137 { 0x0000, 0x0000, 0x0000 }, /* R46 */
1138 { 0x0000, 0x0000, 0x0000 }, /* R47 */
1139 { 0x3033, 0x3033, 0x0000 }, /* R48 - DAC Control */
1140 { 0x0000, 0x0000, 0x0000 }, /* R49 */
1141 { 0x81FF, 0x81FF, 0xFFFF }, /* R50 - DAC Digital Volume L */
1142 { 0x81FF, 0x81FF, 0xFFFF }, /* R51 - DAC Digital Volume R */
1143 { 0x0000, 0x0000, 0x0000 }, /* R52 */
1144 { 0x0FFF, 0x0FFF, 0xFFFF }, /* R53 - DAC LR Rate */
1145 { 0x0017, 0x0017, 0x0000 }, /* R54 - DAC Clock Control */
1146 { 0x0000, 0x0000, 0x0000 }, /* R55 */
1147 { 0x0000, 0x0000, 0x0000 }, /* R56 */
1148 { 0x0000, 0x0000, 0x0000 }, /* R57 */
1149 { 0x4000, 0x4000, 0x0000 }, /* R58 - DAC Mute */
1150 { 0x7000, 0x7000, 0x0000 }, /* R59 - DAC Mute Volume */
1151 { 0x3C00, 0x3C00, 0x0000 }, /* R60 - DAC Side */
1152 { 0x0000, 0x0000, 0x0000 }, /* R61 */
1153 { 0x0000, 0x0000, 0x0000 }, /* R62 */
1154 { 0x0000, 0x0000, 0x0000 }, /* R63 */
1155 { 0x8303, 0x8303, 0xFFFF }, /* R64 - ADC Control */
1156 { 0x0000, 0x0000, 0x0000 }, /* R65 */
1157 { 0x81FF, 0x81FF, 0xFFFF }, /* R66 - ADC Digital Volume L */
1158 { 0x81FF, 0x81FF, 0xFFFF }, /* R67 - ADC Digital Volume R */
1159 { 0x0FFF, 0x0FFF, 0x0000 }, /* R68 - ADC Divider */
1160 { 0x0000, 0x0000, 0x0000 }, /* R69 */
1161 { 0x0FFF, 0x0FFF, 0xFFFF }, /* R70 - ADC LR Rate */
1162 { 0x0000, 0x0000, 0x0000 }, /* R71 */
1163 { 0x0707, 0x0707, 0xFFFF }, /* R72 - Input Control */
1164 { 0xC0C0, 0xC0C0, 0xFFFF }, /* R73 - IN3 Input Control */
1165 { 0xC09F, 0xC09F, 0xFFFF }, /* R74 - Mic Bias Control */
1166 { 0x0000, 0x0000, 0x0000 }, /* R75 */
1167 { 0x0F15, 0x0F15, 0xFFFF }, /* R76 - Output Control */
1168 { 0xC000, 0xC000, 0xFFFF }, /* R77 - Jack Detect */
1169 { 0x03FF, 0x03FF, 0x0000 }, /* R78 - Anti Pop Control */
1170 { 0x0000, 0x0000, 0x0000 }, /* R79 */
1171 { 0xE1FC, 0xE1FC, 0x8000 }, /* R80 - Left Input Volume */
1172 { 0xE1FC, 0xE1FC, 0x8000 }, /* R81 - Right Input Volume */
1173 { 0x0000, 0x0000, 0x0000 }, /* R82 */
1174 { 0x0000, 0x0000, 0x0000 }, /* R83 */
1175 { 0x0000, 0x0000, 0x0000 }, /* R84 */
1176 { 0x0000, 0x0000, 0x0000 }, /* R85 */
1177 { 0x0000, 0x0000, 0x0000 }, /* R86 */
1178 { 0x0000, 0x0000, 0x0000 }, /* R87 */
1179 { 0x9807, 0x9807, 0xFFFF }, /* R88 - Left Mixer Control */
1180 { 0x980B, 0x980B, 0xFFFF }, /* R89 - Right Mixer Control */
1181 { 0x0000, 0x0000, 0x0000 }, /* R90 */
1182 { 0x0000, 0x0000, 0x0000 }, /* R91 */
1183 { 0x8909, 0x8909, 0xFFFF }, /* R92 - OUT3 Mixer Control */
1184 { 0x9E07, 0x9E07, 0xFFFF }, /* R93 - OUT4 Mixer Control */
1185 { 0x0000, 0x0000, 0x0000 }, /* R94 */
1186 { 0x0000, 0x0000, 0x0000 }, /* R95 */
1187 { 0x0EEE, 0x0EEE, 0x0000 }, /* R96 - Output Left Mixer Volume */
1188 { 0xE0EE, 0xE0EE, 0x0000 }, /* R97 - Output Right Mixer Volume */
1189 { 0x0E0F, 0x0E0F, 0x0000 }, /* R98 - Input Mixer Volume L */
1190 { 0xE0E1, 0xE0E1, 0x0000 }, /* R99 - Input Mixer Volume R */
1191 { 0x800E, 0x800E, 0x0000 }, /* R100 - Input Mixer Volume */
1192 { 0x0000, 0x0000, 0x0000 }, /* R101 */
1193 { 0x0000, 0x0000, 0x0000 }, /* R102 */
1194 { 0x0000, 0x0000, 0x0000 }, /* R103 */
1195 { 0xE1FC, 0xE1FC, 0xFFFF }, /* R104 - LOUT1 Volume */
1196 { 0xE1FC, 0xE1FC, 0xFFFF }, /* R105 - ROUT1 Volume */
1197 { 0xE1FC, 0xE1FC, 0xFFFF }, /* R106 - LOUT2 Volume */
1198 { 0xE7FC, 0xE7FC, 0xFFFF }, /* R107 - ROUT2 Volume */
1199 { 0x0000, 0x0000, 0x0000 }, /* R108 */
1200 { 0x0000, 0x0000, 0x0000 }, /* R109 */
1201 { 0x0000, 0x0000, 0x0000 }, /* R110 */
1202 { 0x80E0, 0x80E0, 0xFFFF }, /* R111 - BEEP Volume */
1203 { 0xBF00, 0xBF00, 0x0000 }, /* R112 - AI Formating */
1204 { 0x00F1, 0x00F1, 0x0000 }, /* R113 - ADC DAC COMP */
1205 { 0x00F8, 0x00F8, 0x0000 }, /* R114 - AI ADC Control */
1206 { 0x40FB, 0x40FB, 0x0000 }, /* R115 - AI DAC Control */
1207 { 0x7C30, 0x7C30, 0x0000 }, /* R116 - AIF Test */
1208 { 0x0000, 0x0000, 0x0000 }, /* R117 */
1209 { 0x0000, 0x0000, 0x0000 }, /* R118 */
1210 { 0x0000, 0x0000, 0x0000 }, /* R119 */
1211 { 0x0000, 0x0000, 0x0000 }, /* R120 */
1212 { 0x0000, 0x0000, 0x0000 }, /* R121 */
1213 { 0x0000, 0x0000, 0x0000 }, /* R122 */
1214 { 0x0000, 0x0000, 0x0000 }, /* R123 */
1215 { 0x0000, 0x0000, 0x0000 }, /* R124 */
1216 { 0x0000, 0x0000, 0x0000 }, /* R125 */
1217 { 0x0000, 0x0000, 0x0000 }, /* R126 */
1218 { 0x0000, 0x0000, 0x0000 }, /* R127 */
1219 { 0x1FFF, 0x1FFF, 0x0000 }, /* R128 - GPIO Debounce */
1220 { 0x1FFF, 0x1FFF, 0x0000 }, /* R129 - GPIO Pin pull up Control */
1221 { 0x1FFF, 0x1FFF, 0x0000 }, /* R130 - GPIO Pull down Control */
1222 { 0x1FFF, 0x1FFF, 0x0000 }, /* R131 - GPIO Interrupt Mode */
1223 { 0x0000, 0x0000, 0x0000 }, /* R132 */
1224 { 0x00C0, 0x00C0, 0x0000 }, /* R133 - GPIO Control */
1225 { 0x1FFF, 0x1FFF, 0x0000 }, /* R134 - GPIO Configuration (i/o) */
1226 { 0x1FFF, 0x1FFF, 0x0000 }, /* R135 - GPIO Pin Polarity / Type */
1227 { 0x0000, 0x0000, 0x0000 }, /* R136 */
1228 { 0x0000, 0x0000, 0x0000 }, /* R137 */
1229 { 0x0000, 0x0000, 0x0000 }, /* R138 */
1230 { 0x0000, 0x0000, 0x0000 }, /* R139 */
1231 { 0xFFFF, 0xFFFF, 0x0000 }, /* R140 - GPIO Function Select 1 */
1232 { 0xFFFF, 0xFFFF, 0x0000 }, /* R141 - GPIO Function Select 2 */
1233 { 0xFFFF, 0xFFFF, 0x0000 }, /* R142 - GPIO Function Select 3 */
1234 { 0x000F, 0x000F, 0x0000 }, /* R143 - GPIO Function Select 4 */
1235 { 0xF0FF, 0xF0FF, 0xA000 }, /* R144 - Digitiser Control (1) */
1236 { 0x3707, 0x3707, 0x0000 }, /* R145 - Digitiser Control (2) */
1237 { 0x0000, 0x0000, 0x0000 }, /* R146 */
1238 { 0x0000, 0x0000, 0x0000 }, /* R147 */
1239 { 0x0000, 0x0000, 0x0000 }, /* R148 */
1240 { 0x0000, 0x0000, 0x0000 }, /* R149 */
1241 { 0x0000, 0x0000, 0x0000 }, /* R150 */
1242 { 0x0000, 0x0000, 0x0000 }, /* R151 */
1243 { 0x7FFF, 0x7000, 0xFFFF }, /* R152 - AUX1 Readback */
1244 { 0x7FFF, 0x7000, 0xFFFF }, /* R153 - AUX2 Readback */
1245 { 0x7FFF, 0x7000, 0xFFFF }, /* R154 - AUX3 Readback */
1246 { 0x7FFF, 0x7000, 0xFFFF }, /* R155 - AUX4 Readback */
1247 { 0x0FFF, 0x0000, 0xFFFF }, /* R156 - USB Voltage Readback */
1248 { 0x0FFF, 0x0000, 0xFFFF }, /* R157 - LINE Voltage Readback */
1249 { 0x0FFF, 0x0000, 0xFFFF }, /* R158 - BATT Voltage Readback */
1250 { 0x0FFF, 0x0000, 0xFFFF }, /* R159 - Chip Temp Readback */
1251 { 0x0000, 0x0000, 0x0000 }, /* R160 */
1252 { 0x0000, 0x0000, 0x0000 }, /* R161 */
1253 { 0x0000, 0x0000, 0x0000 }, /* R162 */
1254 { 0x000F, 0x000F, 0x0000 }, /* R163 - Generic Comparator Control */
1255 { 0xFFFF, 0xFFFF, 0x0000 }, /* R164 - Generic comparator 1 */
1256 { 0xFFFF, 0xFFFF, 0x0000 }, /* R165 - Generic comparator 2 */
1257 { 0xFFFF, 0xFFFF, 0x0000 }, /* R166 - Generic comparator 3 */
1258 { 0xFFFF, 0xFFFF, 0x0000 }, /* R167 - Generic comparator 4 */
1259 { 0xBFFF, 0xBFFF, 0x8000 }, /* R168 - Battery Charger Control 1 */
1260 { 0xFFFF, 0x4FFF, 0xB000 }, /* R169 - Battery Charger Control 2 */
1261 { 0x007F, 0x007F, 0x0000 }, /* R170 - Battery Charger Control 3 */
1262 { 0x0000, 0x0000, 0x0000 }, /* R171 */
1263 { 0x903F, 0x903F, 0xFFFF }, /* R172 - Current Sink Driver A */
1264 { 0xE333, 0xE333, 0xFFFF }, /* R173 - CSA Flash control */
1265 { 0x903F, 0x903F, 0xFFFF }, /* R174 - Current Sink Driver B */
1266 { 0xE333, 0xE333, 0xFFFF }, /* R175 - CSB Flash control */
1267 { 0x8F3F, 0x8F3F, 0xFFFF }, /* R176 - DCDC/LDO requested */
1268 { 0x332D, 0x332D, 0x0000 }, /* R177 - DCDC Active options */
1269 { 0x002D, 0x002D, 0x0000 }, /* R178 - DCDC Sleep options */
1270 { 0x5177, 0x5177, 0x8000 }, /* R179 - Power-check comparator */
1271 { 0x047F, 0x047F, 0x0000 }, /* R180 - DCDC1 Control */
1272 { 0xFFC0, 0xFFC0, 0x0000 }, /* R181 - DCDC1 Timeouts */
1273 { 0x737F, 0x737F, 0x0000 }, /* R182 - DCDC1 Low Power */
1274 { 0x535B, 0x535B, 0x0000 }, /* R183 - DCDC2 Control */
1275 { 0xFFC0, 0xFFC0, 0x0000 }, /* R184 - DCDC2 Timeouts */
1276 { 0x0000, 0x0000, 0x0000 }, /* R185 */
1277 { 0x047F, 0x047F, 0x0000 }, /* R186 - DCDC3 Control */
1278 { 0xFFC0, 0xFFC0, 0x0000 }, /* R187 - DCDC3 Timeouts */
1279 { 0x737F, 0x737F, 0x0000 }, /* R188 - DCDC3 Low Power */
1280 { 0x047F, 0x047F, 0x0000 }, /* R189 - DCDC4 Control */
1281 { 0xFFC0, 0xFFC0, 0x0000 }, /* R190 - DCDC4 Timeouts */
1282 { 0x737F, 0x737F, 0x0000 }, /* R191 - DCDC4 Low Power */
1283 { 0x535B, 0x535B, 0x0000 }, /* R192 - DCDC5 Control */
1284 { 0xFFC0, 0xFFC0, 0x0000 }, /* R193 - DCDC5 Timeouts */
1285 { 0x0000, 0x0000, 0x0000 }, /* R194 */
1286 { 0x047F, 0x047F, 0x0000 }, /* R195 - DCDC6 Control */
1287 { 0xFFC0, 0xFFC0, 0x0000 }, /* R196 - DCDC6 Timeouts */
1288 { 0x737F, 0x737F, 0x0000 }, /* R197 - DCDC6 Low Power */
1289 { 0x0000, 0x0000, 0x0000 }, /* R198 */
1290 { 0xFFD3, 0xFFD3, 0x0000 }, /* R199 - Limit Switch Control */
1291 { 0x441F, 0x441F, 0x0000 }, /* R200 - LDO1 Control */
1292 { 0xFFC0, 0xFFC0, 0x0000 }, /* R201 - LDO1 Timeouts */
1293 { 0x331F, 0x331F, 0x0000 }, /* R202 - LDO1 Low Power */
1294 { 0x441F, 0x441F, 0x0000 }, /* R203 - LDO2 Control */
1295 { 0xFFC0, 0xFFC0, 0x0000 }, /* R204 - LDO2 Timeouts */
1296 { 0x331F, 0x331F, 0x0000 }, /* R205 - LDO2 Low Power */
1297 { 0x441F, 0x441F, 0x0000 }, /* R206 - LDO3 Control */
1298 { 0xFFC0, 0xFFC0, 0x0000 }, /* R207 - LDO3 Timeouts */
1299 { 0x331F, 0x331F, 0x0000 }, /* R208 - LDO3 Low Power */
1300 { 0x441F, 0x441F, 0x0000 }, /* R209 - LDO4 Control */
1301 { 0xFFC0, 0xFFC0, 0x0000 }, /* R210 - LDO4 Timeouts */
1302 { 0x331F, 0x331F, 0x0000 }, /* R211 - LDO4 Low Power */
1303 { 0x0000, 0x0000, 0x0000 }, /* R212 */
1304 { 0x0000, 0x0000, 0x0000 }, /* R213 */
1305 { 0x0000, 0x0000, 0x0000 }, /* R214 */
1306 { 0x8F3F, 0x8F3F, 0x0000 }, /* R215 - VCC_FAULT Masks */
1307 { 0xFF3F, 0xE03F, 0x0000 }, /* R216 - Main Bandgap Control */
1308 { 0xEF2F, 0xE02F, 0x0000 }, /* R217 - OSC Control */
1309 { 0xF3FF, 0xB3FF, 0xc000 }, /* R218 - RTC Tick Control */
1310 { 0xFFFF, 0xFFFF, 0xFFFF }, /* R219 */
1311 { 0x09FF, 0x01FF, 0x0000 }, /* R220 - RAM BIST 1 */
1312 { 0x0000, 0x0000, 0x0000 }, /* R221 */
1313 { 0xFFFF, 0xFFFF, 0xFFFF }, /* R222 */
1314 { 0xFFFF, 0xFFFF, 0xFFFF }, /* R223 */
1315 { 0x0000, 0x0000, 0x0000 }, /* R224 */
1316 { 0x8F3F, 0x0000, 0xFFFF }, /* R225 - DCDC/LDO status */
1317 { 0x0000, 0x0000, 0x0000 }, /* R226 */
1318 { 0x0000, 0x0000, 0xFFFF }, /* R227 */
1319 { 0x0000, 0x0000, 0x0000 }, /* R228 */
1320 { 0x0000, 0x0000, 0x0000 }, /* R229 */
1321 { 0xFFFF, 0x1FFF, 0xFFFF }, /* R230 - GPIO Pin Status */
1322 { 0xFFFF, 0x1FFF, 0xFFFF }, /* R231 */
1323 { 0xFFFF, 0x1FFF, 0xFFFF }, /* R232 */
1324 { 0xFFFF, 0x1FFF, 0xFFFF }, /* R233 */
1325 { 0x0000, 0x0000, 0x0000 }, /* R234 */
1326 { 0x0000, 0x0000, 0x0000 }, /* R235 */
1327 { 0x0000, 0x0000, 0x0000 }, /* R236 */
1328 { 0x0000, 0x0000, 0x0000 }, /* R237 */
1329 { 0x0000, 0x0000, 0x0000 }, /* R238 */
1330 { 0x0000, 0x0000, 0x0000 }, /* R239 */
1331 { 0x0000, 0x0000, 0x0000 }, /* R240 */
1332 { 0x0000, 0x0000, 0x0000 }, /* R241 */
1333 { 0x0000, 0x0000, 0x0000 }, /* R242 */
1334 { 0x0000, 0x0000, 0x0000 }, /* R243 */
1335 { 0x0000, 0x0000, 0x0000 }, /* R244 */
1336 { 0x0000, 0x0000, 0x0000 }, /* R245 */
1337 { 0x0000, 0x0000, 0x0000 }, /* R246 */
1338 { 0x0000, 0x0000, 0x0000 }, /* R247 */
1339 { 0xFFFF, 0x0010, 0xFFFF }, /* R248 */
1340 { 0x0000, 0x0000, 0x0000 }, /* R249 */
1341 { 0xFFFF, 0x0010, 0xFFFF }, /* R250 */
1342 { 0xFFFF, 0x0010, 0xFFFF }, /* R251 */
1343 { 0x0000, 0x0000, 0x0000 }, /* R252 */
1344 { 0xFFFF, 0x0010, 0xFFFF }, /* R253 */
1345 { 0x0000, 0x0000, 0x0000 }, /* R254 */
1346 { 0x0000, 0x0000, 0x0000 }, /* R255 */
1347};
diff --git a/include/linux/mfd/wm8350/core.h b/include/linux/mfd/wm8350/core.h
new file mode 100644
index 000000000000..94778c1669dc
--- /dev/null
+++ b/include/linux/mfd/wm8350/core.h
@@ -0,0 +1,585 @@
1/*
2 * core.h -- Core Driver for Wolfson WM8350 PMIC
3 *
4 * Copyright 2007 Wolfson Microelectronics PLC
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 *
11 */
12
13#ifndef __LINUX_MFD_WM8350_CORE_H_
14#define __LINUX_MFD_WM8350_CORE_H_
15
16#include <linux/kernel.h>
17#include <linux/mutex.h>
18#include <linux/workqueue.h>
19
20/*
21 * Register values.
22 */
23#define WM8350_RESET_ID 0x00
24#define WM8350_ID 0x01
25#define WM8350_SYSTEM_CONTROL_1 0x03
26#define WM8350_SYSTEM_CONTROL_2 0x04
27#define WM8350_SYSTEM_HIBERNATE 0x05
28#define WM8350_INTERFACE_CONTROL 0x06
29#define WM8350_POWER_MGMT_1 0x08
30#define WM8350_POWER_MGMT_2 0x09
31#define WM8350_POWER_MGMT_3 0x0A
32#define WM8350_POWER_MGMT_4 0x0B
33#define WM8350_POWER_MGMT_5 0x0C
34#define WM8350_POWER_MGMT_6 0x0D
35#define WM8350_POWER_MGMT_7 0x0E
36
37#define WM8350_SYSTEM_INTERRUPTS 0x18
38#define WM8350_INT_STATUS_1 0x19
39#define WM8350_INT_STATUS_2 0x1A
40#define WM8350_POWER_UP_INT_STATUS 0x1B
41#define WM8350_UNDER_VOLTAGE_INT_STATUS 0x1C
42#define WM8350_OVER_CURRENT_INT_STATUS 0x1D
43#define WM8350_GPIO_INT_STATUS 0x1E
44#define WM8350_COMPARATOR_INT_STATUS 0x1F
45#define WM8350_SYSTEM_INTERRUPTS_MASK 0x20
46#define WM8350_INT_STATUS_1_MASK 0x21
47#define WM8350_INT_STATUS_2_MASK 0x22
48#define WM8350_POWER_UP_INT_STATUS_MASK 0x23
49#define WM8350_UNDER_VOLTAGE_INT_STATUS_MASK 0x24
50#define WM8350_OVER_CURRENT_INT_STATUS_MASK 0x25
51#define WM8350_GPIO_INT_STATUS_MASK 0x26
52#define WM8350_COMPARATOR_INT_STATUS_MASK 0x27
53
54#define WM8350_MAX_REGISTER 0xFF
55
56/*
57 * Field Definitions.
58 */
59
60/*
61 * R0 (0x00) - Reset/ID
62 */
63#define WM8350_SW_RESET_CHIP_ID_MASK 0xFFFF
64
65/*
66 * R1 (0x01) - ID
67 */
68#define WM8350_CHIP_REV_MASK 0x7000
69#define WM8350_CONF_STS_MASK 0x0C00
70#define WM8350_CUST_ID_MASK 0x00FF
71
72/*
73 * R3 (0x03) - System Control 1
74 */
75#define WM8350_CHIP_ON 0x8000
76#define WM8350_POWERCYCLE 0x2000
77#define WM8350_VCC_FAULT_OV 0x1000
78#define WM8350_REG_RSTB_TIME_MASK 0x0C00
79#define WM8350_BG_SLEEP 0x0200
80#define WM8350_MEM_VALID 0x0020
81#define WM8350_CHIP_SET_UP 0x0010
82#define WM8350_ON_DEB_T 0x0008
83#define WM8350_ON_POL 0x0002
84#define WM8350_IRQ_POL 0x0001
85
86/*
87 * R4 (0x04) - System Control 2
88 */
89#define WM8350_USB_SUSPEND_8MA 0x8000
90#define WM8350_USB_SUSPEND 0x4000
91#define WM8350_USB_MSTR 0x2000
92#define WM8350_USB_MSTR_SRC 0x1000
93#define WM8350_USB_500MA 0x0800
94#define WM8350_USB_NOLIM 0x0400
95
96/*
97 * R5 (0x05) - System Hibernate
98 */
99#define WM8350_HIBERNATE 0x8000
100#define WM8350_WDOG_HIB_MODE 0x0080
101#define WM8350_REG_HIB_STARTUP_SEQ 0x0040
102#define WM8350_REG_RESET_HIB_MODE 0x0020
103#define WM8350_RST_HIB_MODE 0x0010
104#define WM8350_IRQ_HIB_MODE 0x0008
105#define WM8350_MEMRST_HIB_MODE 0x0004
106#define WM8350_PCCOMP_HIB_MODE 0x0002
107#define WM8350_TEMPMON_HIB_MODE 0x0001
108
109/*
110 * R6 (0x06) - Interface Control
111 */
112#define WM8350_USE_DEV_PINS 0x8000
113#define WM8350_USE_DEV_PINS_MASK 0x8000
114#define WM8350_USE_DEV_PINS_SHIFT 15
115#define WM8350_DEV_ADDR_MASK 0x6000
116#define WM8350_DEV_ADDR_SHIFT 13
117#define WM8350_CONFIG_DONE 0x1000
118#define WM8350_CONFIG_DONE_MASK 0x1000
119#define WM8350_CONFIG_DONE_SHIFT 12
120#define WM8350_RECONFIG_AT_ON 0x0800
121#define WM8350_RECONFIG_AT_ON_MASK 0x0800
122#define WM8350_RECONFIG_AT_ON_SHIFT 11
123#define WM8350_AUTOINC 0x0200
124#define WM8350_AUTOINC_MASK 0x0200
125#define WM8350_AUTOINC_SHIFT 9
126#define WM8350_ARA 0x0100
127#define WM8350_ARA_MASK 0x0100
128#define WM8350_ARA_SHIFT 8
129#define WM8350_SPI_CFG 0x0008
130#define WM8350_SPI_CFG_MASK 0x0008
131#define WM8350_SPI_CFG_SHIFT 3
132#define WM8350_SPI_4WIRE 0x0004
133#define WM8350_SPI_4WIRE_MASK 0x0004
134#define WM8350_SPI_4WIRE_SHIFT 2
135#define WM8350_SPI_3WIRE 0x0002
136#define WM8350_SPI_3WIRE_MASK 0x0002
137#define WM8350_SPI_3WIRE_SHIFT 1
138
139/* Bit values for R06 (0x06) */
140#define WM8350_USE_DEV_PINS_PRIMARY 0
141#define WM8350_USE_DEV_PINS_DEV 1
142
143#define WM8350_DEV_ADDR_34 0
144#define WM8350_DEV_ADDR_36 1
145#define WM8350_DEV_ADDR_3C 2
146#define WM8350_DEV_ADDR_3E 3
147
148#define WM8350_CONFIG_DONE_OFF 0
149#define WM8350_CONFIG_DONE_DONE 1
150
151#define WM8350_RECONFIG_AT_ON_OFF 0
152#define WM8350_RECONFIG_AT_ON_ON 1
153
154#define WM8350_AUTOINC_OFF 0
155#define WM8350_AUTOINC_ON 1
156
157#define WM8350_ARA_OFF 0
158#define WM8350_ARA_ON 1
159
160#define WM8350_SPI_CFG_CMOS 0
161#define WM8350_SPI_CFG_OD 1
162
163#define WM8350_SPI_4WIRE_3WIRE 0
164#define WM8350_SPI_4WIRE_4WIRE 1
165
166#define WM8350_SPI_3WIRE_I2C 0
167#define WM8350_SPI_3WIRE_SPI 1
168
169/*
170 * R8 (0x08) - Power mgmt (1)
171 */
172#define WM8350_CODEC_ISEL_MASK 0xC000
173#define WM8350_VBUFEN 0x2000
174#define WM8350_OUTPUT_DRAIN_EN 0x0400
175#define WM8350_MIC_DET_ENA 0x0100
176#define WM8350_BIASEN 0x0020
177#define WM8350_MICBEN 0x0010
178#define WM8350_VMIDEN 0x0004
179#define WM8350_VMID_MASK 0x0003
180#define WM8350_VMID_SHIFT 0
181
182/*
183 * R9 (0x09) - Power mgmt (2)
184 */
185#define WM8350_IN3R_ENA 0x0800
186#define WM8350_IN3L_ENA 0x0400
187#define WM8350_INR_ENA 0x0200
188#define WM8350_INL_ENA 0x0100
189#define WM8350_MIXINR_ENA 0x0080
190#define WM8350_MIXINL_ENA 0x0040
191#define WM8350_OUT4_ENA 0x0020
192#define WM8350_OUT3_ENA 0x0010
193#define WM8350_MIXOUTR_ENA 0x0002
194#define WM8350_MIXOUTL_ENA 0x0001
195
196/*
197 * R10 (0x0A) - Power mgmt (3)
198 */
199#define WM8350_IN3R_TO_OUT2R 0x0080
200#define WM8350_OUT2R_ENA 0x0008
201#define WM8350_OUT2L_ENA 0x0004
202#define WM8350_OUT1R_ENA 0x0002
203#define WM8350_OUT1L_ENA 0x0001
204
205/*
206 * R11 (0x0B) - Power mgmt (4)
207 */
208#define WM8350_SYSCLK_ENA 0x4000
209#define WM8350_ADC_HPF_ENA 0x2000
210#define WM8350_FLL_ENA 0x0800
211#define WM8350_FLL_OSC_ENA 0x0400
212#define WM8350_TOCLK_ENA 0x0100
213#define WM8350_DACR_ENA 0x0020
214#define WM8350_DACL_ENA 0x0010
215#define WM8350_ADCR_ENA 0x0008
216#define WM8350_ADCL_ENA 0x0004
217
218/*
219 * R12 (0x0C) - Power mgmt (5)
220 */
221#define WM8350_CODEC_ENA 0x1000
222#define WM8350_RTC_TICK_ENA 0x0800
223#define WM8350_OSC32K_ENA 0x0400
224#define WM8350_CHG_ENA 0x0200
225#define WM8350_ACC_DET_ENA 0x0100
226#define WM8350_AUXADC_ENA 0x0080
227#define WM8350_DCMP4_ENA 0x0008
228#define WM8350_DCMP3_ENA 0x0004
229#define WM8350_DCMP2_ENA 0x0002
230#define WM8350_DCMP1_ENA 0x0001
231
232/*
233 * R13 (0x0D) - Power mgmt (6)
234 */
235#define WM8350_LS_ENA 0x8000
236#define WM8350_LDO4_ENA 0x0800
237#define WM8350_LDO3_ENA 0x0400
238#define WM8350_LDO2_ENA 0x0200
239#define WM8350_LDO1_ENA 0x0100
240#define WM8350_DC6_ENA 0x0020
241#define WM8350_DC5_ENA 0x0010
242#define WM8350_DC4_ENA 0x0008
243#define WM8350_DC3_ENA 0x0004
244#define WM8350_DC2_ENA 0x0002
245#define WM8350_DC1_ENA 0x0001
246
247/*
248 * R14 (0x0E) - Power mgmt (7)
249 */
250#define WM8350_CS2_ENA 0x0002
251#define WM8350_CS1_ENA 0x0001
252
253/*
254 * R24 (0x18) - System Interrupts
255 */
256#define WM8350_OC_INT 0x2000
257#define WM8350_UV_INT 0x1000
258#define WM8350_PUTO_INT 0x0800
259#define WM8350_CS_INT 0x0200
260#define WM8350_EXT_INT 0x0100
261#define WM8350_CODEC_INT 0x0080
262#define WM8350_GP_INT 0x0040
263#define WM8350_AUXADC_INT 0x0020
264#define WM8350_RTC_INT 0x0010
265#define WM8350_SYS_INT 0x0008
266#define WM8350_CHG_INT 0x0004
267#define WM8350_USB_INT 0x0002
268#define WM8350_WKUP_INT 0x0001
269
270/*
271 * R25 (0x19) - Interrupt Status 1
272 */
273#define WM8350_CHG_BAT_HOT_EINT 0x8000
274#define WM8350_CHG_BAT_COLD_EINT 0x4000
275#define WM8350_CHG_BAT_FAIL_EINT 0x2000
276#define WM8350_CHG_TO_EINT 0x1000
277#define WM8350_CHG_END_EINT 0x0800
278#define WM8350_CHG_START_EINT 0x0400
279#define WM8350_CHG_FAST_RDY_EINT 0x0200
280#define WM8350_RTC_PER_EINT 0x0080
281#define WM8350_RTC_SEC_EINT 0x0040
282#define WM8350_RTC_ALM_EINT 0x0020
283#define WM8350_CHG_VBATT_LT_3P9_EINT 0x0004
284#define WM8350_CHG_VBATT_LT_3P1_EINT 0x0002
285#define WM8350_CHG_VBATT_LT_2P85_EINT 0x0001
286
287/*
288 * R26 (0x1A) - Interrupt Status 2
289 */
290#define WM8350_CS1_EINT 0x2000
291#define WM8350_CS2_EINT 0x1000
292#define WM8350_USB_LIMIT_EINT 0x0400
293#define WM8350_AUXADC_DATARDY_EINT 0x0100
294#define WM8350_AUXADC_DCOMP4_EINT 0x0080
295#define WM8350_AUXADC_DCOMP3_EINT 0x0040
296#define WM8350_AUXADC_DCOMP2_EINT 0x0020
297#define WM8350_AUXADC_DCOMP1_EINT 0x0010
298#define WM8350_SYS_HYST_COMP_FAIL_EINT 0x0008
299#define WM8350_SYS_CHIP_GT115_EINT 0x0004
300#define WM8350_SYS_CHIP_GT140_EINT 0x0002
301#define WM8350_SYS_WDOG_TO_EINT 0x0001
302
303/*
304 * R27 (0x1B) - Power Up Interrupt Status
305 */
306#define WM8350_PUTO_LDO4_EINT 0x0800
307#define WM8350_PUTO_LDO3_EINT 0x0400
308#define WM8350_PUTO_LDO2_EINT 0x0200
309#define WM8350_PUTO_LDO1_EINT 0x0100
310#define WM8350_PUTO_DC6_EINT 0x0020
311#define WM8350_PUTO_DC5_EINT 0x0010
312#define WM8350_PUTO_DC4_EINT 0x0008
313#define WM8350_PUTO_DC3_EINT 0x0004
314#define WM8350_PUTO_DC2_EINT 0x0002
315#define WM8350_PUTO_DC1_EINT 0x0001
316
317/*
318 * R28 (0x1C) - Under Voltage Interrupt status
319 */
320#define WM8350_UV_LDO4_EINT 0x0800
321#define WM8350_UV_LDO3_EINT 0x0400
322#define WM8350_UV_LDO2_EINT 0x0200
323#define WM8350_UV_LDO1_EINT 0x0100
324#define WM8350_UV_DC6_EINT 0x0020
325#define WM8350_UV_DC5_EINT 0x0010
326#define WM8350_UV_DC4_EINT 0x0008
327#define WM8350_UV_DC3_EINT 0x0004
328#define WM8350_UV_DC2_EINT 0x0002
329#define WM8350_UV_DC1_EINT 0x0001
330
331/*
332 * R29 (0x1D) - Over Current Interrupt status
333 */
334#define WM8350_OC_LS_EINT 0x8000
335
336/*
337 * R30 (0x1E) - GPIO Interrupt Status
338 */
339#define WM8350_GP12_EINT 0x1000
340#define WM8350_GP11_EINT 0x0800
341#define WM8350_GP10_EINT 0x0400
342#define WM8350_GP9_EINT 0x0200
343#define WM8350_GP8_EINT 0x0100
344#define WM8350_GP7_EINT 0x0080
345#define WM8350_GP6_EINT 0x0040
346#define WM8350_GP5_EINT 0x0020
347#define WM8350_GP4_EINT 0x0010
348#define WM8350_GP3_EINT 0x0008
349#define WM8350_GP2_EINT 0x0004
350#define WM8350_GP1_EINT 0x0002
351#define WM8350_GP0_EINT 0x0001
352
353/*
354 * R31 (0x1F) - Comparator Interrupt Status
355 */
356#define WM8350_EXT_USB_FB_EINT 0x8000
357#define WM8350_EXT_WALL_FB_EINT 0x4000
358#define WM8350_EXT_BAT_FB_EINT 0x2000
359#define WM8350_CODEC_JCK_DET_L_EINT 0x0800
360#define WM8350_CODEC_JCK_DET_R_EINT 0x0400
361#define WM8350_CODEC_MICSCD_EINT 0x0200
362#define WM8350_CODEC_MICD_EINT 0x0100
363#define WM8350_WKUP_OFF_STATE_EINT 0x0040
364#define WM8350_WKUP_HIB_STATE_EINT 0x0020
365#define WM8350_WKUP_CONV_FAULT_EINT 0x0010
366#define WM8350_WKUP_WDOG_RST_EINT 0x0008
367#define WM8350_WKUP_GP_PWR_ON_EINT 0x0004
368#define WM8350_WKUP_ONKEY_EINT 0x0002
369#define WM8350_WKUP_GP_WAKEUP_EINT 0x0001
370
371/*
372 * R32 (0x20) - System Interrupts Mask
373 */
374#define WM8350_IM_OC_INT 0x2000
375#define WM8350_IM_UV_INT 0x1000
376#define WM8350_IM_PUTO_INT 0x0800
377#define WM8350_IM_SPARE_INT 0x0400
378#define WM8350_IM_CS_INT 0x0200
379#define WM8350_IM_EXT_INT 0x0100
380#define WM8350_IM_CODEC_INT 0x0080
381#define WM8350_IM_GP_INT 0x0040
382#define WM8350_IM_AUXADC_INT 0x0020
383#define WM8350_IM_RTC_INT 0x0010
384#define WM8350_IM_SYS_INT 0x0008
385#define WM8350_IM_CHG_INT 0x0004
386#define WM8350_IM_USB_INT 0x0002
387#define WM8350_IM_WKUP_INT 0x0001
388
389/*
390 * R33 (0x21) - Interrupt Status 1 Mask
391 */
392#define WM8350_IM_CHG_BAT_HOT_EINT 0x8000
393#define WM8350_IM_CHG_BAT_COLD_EINT 0x4000
394#define WM8350_IM_CHG_BAT_FAIL_EINT 0x2000
395#define WM8350_IM_CHG_TO_EINT 0x1000
396#define WM8350_IM_CHG_END_EINT 0x0800
397#define WM8350_IM_CHG_START_EINT 0x0400
398#define WM8350_IM_CHG_FAST_RDY_EINT 0x0200
399#define WM8350_IM_RTC_PER_EINT 0x0080
400#define WM8350_IM_RTC_SEC_EINT 0x0040
401#define WM8350_IM_RTC_ALM_EINT 0x0020
402#define WM8350_IM_CHG_VBATT_LT_3P9_EINT 0x0004
403#define WM8350_IM_CHG_VBATT_LT_3P1_EINT 0x0002
404#define WM8350_IM_CHG_VBATT_LT_2P85_EINT 0x0001
405
406/*
407 * R34 (0x22) - Interrupt Status 2 Mask
408 */
409#define WM8350_IM_SPARE2_EINT 0x8000
410#define WM8350_IM_SPARE1_EINT 0x4000
411#define WM8350_IM_CS1_EINT 0x2000
412#define WM8350_IM_CS2_EINT 0x1000
413#define WM8350_IM_USB_LIMIT_EINT 0x0400
414#define WM8350_IM_AUXADC_DATARDY_EINT 0x0100
415#define WM8350_IM_AUXADC_DCOMP4_EINT 0x0080
416#define WM8350_IM_AUXADC_DCOMP3_EINT 0x0040
417#define WM8350_IM_AUXADC_DCOMP2_EINT 0x0020
418#define WM8350_IM_AUXADC_DCOMP1_EINT 0x0010
419#define WM8350_IM_SYS_HYST_COMP_FAIL_EINT 0x0008
420#define WM8350_IM_SYS_CHIP_GT115_EINT 0x0004
421#define WM8350_IM_SYS_CHIP_GT140_EINT 0x0002
422#define WM8350_IM_SYS_WDOG_TO_EINT 0x0001
423
424/*
425 * R35 (0x23) - Power Up Interrupt Status Mask
426 */
427#define WM8350_IM_PUTO_LDO4_EINT 0x0800
428#define WM8350_IM_PUTO_LDO3_EINT 0x0400
429#define WM8350_IM_PUTO_LDO2_EINT 0x0200
430#define WM8350_IM_PUTO_LDO1_EINT 0x0100
431#define WM8350_IM_PUTO_DC6_EINT 0x0020
432#define WM8350_IM_PUTO_DC5_EINT 0x0010
433#define WM8350_IM_PUTO_DC4_EINT 0x0008
434#define WM8350_IM_PUTO_DC3_EINT 0x0004
435#define WM8350_IM_PUTO_DC2_EINT 0x0002
436#define WM8350_IM_PUTO_DC1_EINT 0x0001
437
438/*
439 * R36 (0x24) - Under Voltage Interrupt status Mask
440 */
441#define WM8350_IM_UV_LDO4_EINT 0x0800
442#define WM8350_IM_UV_LDO3_EINT 0x0400
443#define WM8350_IM_UV_LDO2_EINT 0x0200
444#define WM8350_IM_UV_LDO1_EINT 0x0100
445#define WM8350_IM_UV_DC6_EINT 0x0020
446#define WM8350_IM_UV_DC5_EINT 0x0010
447#define WM8350_IM_UV_DC4_EINT 0x0008
448#define WM8350_IM_UV_DC3_EINT 0x0004
449#define WM8350_IM_UV_DC2_EINT 0x0002
450#define WM8350_IM_UV_DC1_EINT 0x0001
451
452/*
453 * R37 (0x25) - Over Current Interrupt status Mask
454 */
455#define WM8350_IM_OC_LS_EINT 0x8000
456
457/*
458 * R38 (0x26) - GPIO Interrupt Status Mask
459 */
460#define WM8350_IM_GP12_EINT 0x1000
461#define WM8350_IM_GP11_EINT 0x0800
462#define WM8350_IM_GP10_EINT 0x0400
463#define WM8350_IM_GP9_EINT 0x0200
464#define WM8350_IM_GP8_EINT 0x0100
465#define WM8350_IM_GP7_EINT 0x0080
466#define WM8350_IM_GP6_EINT 0x0040
467#define WM8350_IM_GP5_EINT 0x0020
468#define WM8350_IM_GP4_EINT 0x0010
469#define WM8350_IM_GP3_EINT 0x0008
470#define WM8350_IM_GP2_EINT 0x0004
471#define WM8350_IM_GP1_EINT 0x0002
472#define WM8350_IM_GP0_EINT 0x0001
473
474/*
475 * R39 (0x27) - Comparator Interrupt Status Mask
476 */
477#define WM8350_IM_EXT_USB_FB_EINT 0x8000
478#define WM8350_IM_EXT_WALL_FB_EINT 0x4000
479#define WM8350_IM_EXT_BAT_FB_EINT 0x2000
480#define WM8350_IM_CODEC_JCK_DET_L_EINT 0x0800
481#define WM8350_IM_CODEC_JCK_DET_R_EINT 0x0400
482#define WM8350_IM_CODEC_MICSCD_EINT 0x0200
483#define WM8350_IM_CODEC_MICD_EINT 0x0100
484#define WM8350_IM_WKUP_OFF_STATE_EINT 0x0040
485#define WM8350_IM_WKUP_HIB_STATE_EINT 0x0020
486#define WM8350_IM_WKUP_CONV_FAULT_EINT 0x0010
487#define WM8350_IM_WKUP_WDOG_RST_EINT 0x0008
488#define WM8350_IM_WKUP_GP_PWR_ON_EINT 0x0004
489#define WM8350_IM_WKUP_ONKEY_EINT 0x0002
490#define WM8350_IM_WKUP_GP_WAKEUP_EINT 0x0001
491
492/*
493 * R220 (0xDC) - RAM BIST 1
494 */
495#define WM8350_READ_STATUS 0x0800
496#define WM8350_TSTRAM_CLK 0x0100
497#define WM8350_TSTRAM_CLK_ENA 0x0080
498#define WM8350_STARTSEQ 0x0040
499#define WM8350_READ_SRC 0x0020
500#define WM8350_COUNT_DIR 0x0010
501#define WM8350_TSTRAM_MODE_MASK 0x000E
502#define WM8350_TSTRAM_ENA 0x0001
503
504/*
505 * R225 (0xE1) - DCDC/LDO status
506 */
507#define WM8350_LS_STS 0x8000
508#define WM8350_LDO4_STS 0x0800
509#define WM8350_LDO3_STS 0x0400
510#define WM8350_LDO2_STS 0x0200
511#define WM8350_LDO1_STS 0x0100
512#define WM8350_DC6_STS 0x0020
513#define WM8350_DC5_STS 0x0010
514#define WM8350_DC4_STS 0x0008
515#define WM8350_DC3_STS 0x0004
516#define WM8350_DC2_STS 0x0002
517#define WM8350_DC1_STS 0x0001
518
519/* WM8350 wake up conditions */
520#define WM8350_IRQ_WKUP_OFF_STATE 43
521#define WM8350_IRQ_WKUP_HIB_STATE 44
522#define WM8350_IRQ_WKUP_CONV_FAULT 45
523#define WM8350_IRQ_WKUP_WDOG_RST 46
524#define WM8350_IRQ_WKUP_GP_PWR_ON 47
525#define WM8350_IRQ_WKUP_ONKEY 48
526#define WM8350_IRQ_WKUP_GP_WAKEUP 49
527
528/* wm8350 chip revisions */
529#define WM8350_REV_E 0x4
530#define WM8350_REV_F 0x5
531#define WM8350_REV_G 0x6
532
533struct wm8350_reg_access {
534 u16 readable; /* Mask of readable bits */
535 u16 writable; /* Mask of writable bits */
536 u16 vol; /* Mask of volatile bits */
537};
538extern const struct wm8350_reg_access wm8350_reg_io_map[];
539extern const u16 wm8350_mode0_defaults[];
540extern const u16 wm8350_mode1_defaults[];
541extern const u16 wm8350_mode2_defaults[];
542extern const u16 wm8350_mode3_defaults[];
543
544struct wm8350;
545
546struct wm8350_irq {
547 void (*handler) (struct wm8350 *, int, void *);
548 void *data;
549};
550
551struct wm8350 {
552 int rev; /* chip revision */
553
554 struct device *dev;
555
556 /* device IO */
557 union {
558 struct i2c_client *i2c_client;
559 struct spi_device *spi_device;
560 };
561 int (*read_dev)(struct wm8350 *wm8350, char reg, int size, void *dest);
562 int (*write_dev)(struct wm8350 *wm8350, char reg, int size,
563 void *src);
564 u16 *reg_cache;
565};
566
567/*
568 * WM8350 device initialisation and exit.
569 */
570int wm8350_device_init(struct wm8350 *wm8350);
571void wm8350_device_exit(struct wm8350 *wm8350);
572
573/*
574 * WM8350 device IO
575 */
576int wm8350_clear_bits(struct wm8350 *wm8350, u16 reg, u16 mask);
577int wm8350_set_bits(struct wm8350 *wm8350, u16 reg, u16 mask);
578u16 wm8350_reg_read(struct wm8350 *wm8350, int reg);
579int wm8350_reg_write(struct wm8350 *wm8350, int reg, u16 val);
580int wm8350_reg_lock(struct wm8350 *wm8350);
581int wm8350_reg_unlock(struct wm8350 *wm8350);
582int wm8350_block_read(struct wm8350 *wm8350, int reg, int size, u16 *dest);
583int wm8350_block_write(struct wm8350 *wm8350, int reg, int size, u16 *src);
584
585#endif
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