diff options
author | Alex Deucher <alexdeucher@gmail.com> | 2010-01-20 16:22:53 -0500 |
---|---|---|
committer | Dave Airlie <airlied@linux.ie> | 2010-01-20 17:40:08 -0500 |
commit | 615e0cb67968c94fd9e53797985843a5b816dec4 (patch) | |
tree | 7a6505324def47d4ecf295084ab2db49c0f336fe | |
parent | 54f088a9603dbee88809cb2ddfd8dc1ef8a74be5 (diff) |
drm/radeon/kms/r4xx: cleanup atom path
most of radeon_legacy_atom_set_surface() is taken care
of in atombios_set_base(), so remove the duplicate
setup and move the remaining bits (DISP_MERGE setup and
FP2 sync) to atombios_crtc.c where they are used.
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@linux.ie>
-rw-r--r-- | drivers/gpu/drm/radeon/atombios_crtc.c | 26 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_legacy_crtc.c | 63 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_mode.h | 1 |
3 files changed, 25 insertions, 65 deletions
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c index a60610271af6..e098bd0cbd26 100644 --- a/drivers/gpu/drm/radeon/atombios_crtc.c +++ b/drivers/gpu/drm/radeon/atombios_crtc.c | |||
@@ -718,6 +718,30 @@ int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y, | |||
718 | return radeon_crtc_set_base(crtc, x, y, old_fb); | 718 | return radeon_crtc_set_base(crtc, x, y, old_fb); |
719 | } | 719 | } |
720 | 720 | ||
721 | /* properly set additional regs when using atombios */ | ||
722 | static void radeon_legacy_atom_fixup(struct drm_crtc *crtc) | ||
723 | { | ||
724 | struct drm_device *dev = crtc->dev; | ||
725 | struct radeon_device *rdev = dev->dev_private; | ||
726 | struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); | ||
727 | u32 disp_merge_cntl; | ||
728 | |||
729 | switch (radeon_crtc->crtc_id) { | ||
730 | case 0: | ||
731 | disp_merge_cntl = RREG32(RADEON_DISP_MERGE_CNTL); | ||
732 | disp_merge_cntl &= ~RADEON_DISP_RGB_OFFSET_EN; | ||
733 | WREG32(RADEON_DISP_MERGE_CNTL, disp_merge_cntl); | ||
734 | break; | ||
735 | case 1: | ||
736 | disp_merge_cntl = RREG32(RADEON_DISP2_MERGE_CNTL); | ||
737 | disp_merge_cntl &= ~RADEON_DISP2_RGB_OFFSET_EN; | ||
738 | WREG32(RADEON_DISP2_MERGE_CNTL, disp_merge_cntl); | ||
739 | WREG32(RADEON_FP_H2_SYNC_STRT_WID, RREG32(RADEON_CRTC2_H_SYNC_STRT_WID)); | ||
740 | WREG32(RADEON_FP_V2_SYNC_STRT_WID, RREG32(RADEON_CRTC2_V_SYNC_STRT_WID)); | ||
741 | break; | ||
742 | } | ||
743 | } | ||
744 | |||
721 | int atombios_crtc_mode_set(struct drm_crtc *crtc, | 745 | int atombios_crtc_mode_set(struct drm_crtc *crtc, |
722 | struct drm_display_mode *mode, | 746 | struct drm_display_mode *mode, |
723 | struct drm_display_mode *adjusted_mode, | 747 | struct drm_display_mode *adjusted_mode, |
@@ -740,7 +764,7 @@ int atombios_crtc_mode_set(struct drm_crtc *crtc, | |||
740 | if (radeon_crtc->crtc_id == 0) | 764 | if (radeon_crtc->crtc_id == 0) |
741 | atombios_set_crtc_dtd_timing(crtc, adjusted_mode); | 765 | atombios_set_crtc_dtd_timing(crtc, adjusted_mode); |
742 | atombios_crtc_set_base(crtc, x, y, old_fb); | 766 | atombios_crtc_set_base(crtc, x, y, old_fb); |
743 | radeon_legacy_atom_set_surface(crtc); | 767 | radeon_legacy_atom_fixup(crtc); |
744 | } | 768 | } |
745 | atombios_overscan_setup(crtc, mode, adjusted_mode); | 769 | atombios_overscan_setup(crtc, mode, adjusted_mode); |
746 | atombios_scaler_setup(crtc); | 770 | atombios_scaler_setup(crtc); |
diff --git a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c index cc27485a07ad..762e07b08951 100644 --- a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c +++ b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c | |||
@@ -339,69 +339,6 @@ void radeon_crtc_dpms(struct drm_crtc *crtc, int mode) | |||
339 | } | 339 | } |
340 | } | 340 | } |
341 | 341 | ||
342 | /* properly set crtc bpp when using atombios */ | ||
343 | void radeon_legacy_atom_set_surface(struct drm_crtc *crtc) | ||
344 | { | ||
345 | struct drm_device *dev = crtc->dev; | ||
346 | struct radeon_device *rdev = dev->dev_private; | ||
347 | struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); | ||
348 | int format; | ||
349 | uint32_t crtc_gen_cntl; | ||
350 | uint32_t disp_merge_cntl; | ||
351 | uint32_t crtc_pitch; | ||
352 | |||
353 | switch (crtc->fb->bits_per_pixel) { | ||
354 | case 8: | ||
355 | format = 2; | ||
356 | break; | ||
357 | case 15: /* 555 */ | ||
358 | format = 3; | ||
359 | break; | ||
360 | case 16: /* 565 */ | ||
361 | format = 4; | ||
362 | break; | ||
363 | case 24: /* RGB */ | ||
364 | format = 5; | ||
365 | break; | ||
366 | case 32: /* xRGB */ | ||
367 | format = 6; | ||
368 | break; | ||
369 | default: | ||
370 | return; | ||
371 | } | ||
372 | |||
373 | crtc_pitch = ((((crtc->fb->pitch / (crtc->fb->bits_per_pixel / 8)) * crtc->fb->bits_per_pixel) + | ||
374 | ((crtc->fb->bits_per_pixel * 8) - 1)) / | ||
375 | (crtc->fb->bits_per_pixel * 8)); | ||
376 | crtc_pitch |= crtc_pitch << 16; | ||
377 | |||
378 | WREG32(RADEON_CRTC_PITCH + radeon_crtc->crtc_offset, crtc_pitch); | ||
379 | |||
380 | switch (radeon_crtc->crtc_id) { | ||
381 | case 0: | ||
382 | disp_merge_cntl = RREG32(RADEON_DISP_MERGE_CNTL); | ||
383 | disp_merge_cntl &= ~RADEON_DISP_RGB_OFFSET_EN; | ||
384 | WREG32(RADEON_DISP_MERGE_CNTL, disp_merge_cntl); | ||
385 | |||
386 | crtc_gen_cntl = RREG32(RADEON_CRTC_GEN_CNTL) & 0xfffff0ff; | ||
387 | crtc_gen_cntl |= (format << 8); | ||
388 | crtc_gen_cntl |= RADEON_CRTC_EXT_DISP_EN; | ||
389 | WREG32(RADEON_CRTC_GEN_CNTL, crtc_gen_cntl); | ||
390 | break; | ||
391 | case 1: | ||
392 | disp_merge_cntl = RREG32(RADEON_DISP2_MERGE_CNTL); | ||
393 | disp_merge_cntl &= ~RADEON_DISP2_RGB_OFFSET_EN; | ||
394 | WREG32(RADEON_DISP2_MERGE_CNTL, disp_merge_cntl); | ||
395 | |||
396 | crtc_gen_cntl = RREG32(RADEON_CRTC2_GEN_CNTL) & 0xfffff0ff; | ||
397 | crtc_gen_cntl |= (format << 8); | ||
398 | WREG32(RADEON_CRTC2_GEN_CNTL, crtc_gen_cntl); | ||
399 | WREG32(RADEON_FP_H2_SYNC_STRT_WID, RREG32(RADEON_CRTC2_H_SYNC_STRT_WID)); | ||
400 | WREG32(RADEON_FP_V2_SYNC_STRT_WID, RREG32(RADEON_CRTC2_V_SYNC_STRT_WID)); | ||
401 | break; | ||
402 | } | ||
403 | } | ||
404 | |||
405 | int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y, | 342 | int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y, |
406 | struct drm_framebuffer *old_fb) | 343 | struct drm_framebuffer *old_fb) |
407 | { | 344 | { |
diff --git a/drivers/gpu/drm/radeon/radeon_mode.h b/drivers/gpu/drm/radeon/radeon_mode.h index 91cb041cb40d..eb19b3022b0e 100644 --- a/drivers/gpu/drm/radeon/radeon_mode.h +++ b/drivers/gpu/drm/radeon/radeon_mode.h | |||
@@ -453,7 +453,6 @@ extern void atombios_crtc_dpms(struct drm_crtc *crtc, int mode); | |||
453 | 453 | ||
454 | extern int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y, | 454 | extern int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y, |
455 | struct drm_framebuffer *old_fb); | 455 | struct drm_framebuffer *old_fb); |
456 | extern void radeon_legacy_atom_set_surface(struct drm_crtc *crtc); | ||
457 | 456 | ||
458 | extern int radeon_crtc_cursor_set(struct drm_crtc *crtc, | 457 | extern int radeon_crtc_cursor_set(struct drm_crtc *crtc, |
459 | struct drm_file *file_priv, | 458 | struct drm_file *file_priv, |