diff options
author | Krishna Gudipati <kgudipat@brocade.com> | 2010-03-05 22:34:44 -0500 |
---|---|---|
committer | James Bottomley <James.Bottomley@suse.de> | 2010-03-07 02:23:53 -0500 |
commit | 8b651b4294e67789028982d18779a9ebe75c2b8a (patch) | |
tree | 043c7a9dfa3a864858ee3f3ed7d9e9a4ab729fbc | |
parent | 0a20de446c76529028cb239bf2a13cb0f05b263a (diff) |
[SCSI] bfa: Clear LL_HALT and PSS_ERR bit when IOC crashes.
Clear LL_HALT and PSS_ERR bit in the interrupt status register on an IOC crash.
Signed-off-by: Krishna Gudipati <kgudipat@brocade.com>
Signed-off-by: James Bottomley <James.Bottomley@suse.de>
-rw-r--r-- | drivers/scsi/bfa/bfa_intr.c | 35 | ||||
-rw-r--r-- | drivers/scsi/bfa/bfa_ioc.h | 1 | ||||
-rw-r--r-- | drivers/scsi/bfa/bfa_ioc_cb.c | 1 | ||||
-rw-r--r-- | drivers/scsi/bfa/bfa_ioc_ct.c | 1 | ||||
-rw-r--r-- | drivers/scsi/bfa/include/bfi/bfi_cbreg.h | 13 | ||||
-rw-r--r-- | drivers/scsi/bfa/include/bfi/bfi_ctreg.h | 23 |
6 files changed, 70 insertions, 4 deletions
diff --git a/drivers/scsi/bfa/bfa_intr.c b/drivers/scsi/bfa/bfa_intr.c index ab463db11144..c42254613f73 100644 --- a/drivers/scsi/bfa/bfa_intr.c +++ b/drivers/scsi/bfa/bfa_intr.c | |||
@@ -197,17 +197,44 @@ bfa_msix_rspq(struct bfa_s *bfa, int rsp_qid) | |||
197 | void | 197 | void |
198 | bfa_msix_lpu_err(struct bfa_s *bfa, int vec) | 198 | bfa_msix_lpu_err(struct bfa_s *bfa, int vec) |
199 | { | 199 | { |
200 | u32 intr; | 200 | u32 intr, curr_value; |
201 | 201 | ||
202 | intr = bfa_reg_read(bfa->iocfc.bfa_regs.intr_status); | 202 | intr = bfa_reg_read(bfa->iocfc.bfa_regs.intr_status); |
203 | 203 | ||
204 | if (intr & (__HFN_INT_MBOX_LPU0 | __HFN_INT_MBOX_LPU1)) | 204 | if (intr & (__HFN_INT_MBOX_LPU0 | __HFN_INT_MBOX_LPU1)) |
205 | bfa_msix_lpu(bfa); | 205 | bfa_msix_lpu(bfa); |
206 | 206 | ||
207 | if (intr & (__HFN_INT_ERR_EMC | | 207 | intr &= (__HFN_INT_ERR_EMC | __HFN_INT_ERR_LPU0 | |
208 | __HFN_INT_ERR_LPU0 | __HFN_INT_ERR_LPU1 | | 208 | __HFN_INT_ERR_LPU1 | __HFN_INT_ERR_PSS | __HFN_INT_LL_HALT); |
209 | __HFN_INT_ERR_PSS | __HFN_INT_LL_HALT)) | 209 | |
210 | if (intr) { | ||
211 | if (intr & __HFN_INT_LL_HALT) { | ||
212 | /** | ||
213 | * If LL_HALT bit is set then FW Init Halt LL Port | ||
214 | * Register needs to be cleared as well so Interrupt | ||
215 | * Status Register will be cleared. | ||
216 | */ | ||
217 | curr_value = bfa_reg_read(bfa->ioc.ioc_regs.ll_halt); | ||
218 | curr_value &= ~__FW_INIT_HALT_P; | ||
219 | bfa_reg_write(bfa->ioc.ioc_regs.ll_halt, curr_value); | ||
220 | } | ||
221 | |||
222 | if (intr & __HFN_INT_ERR_PSS) { | ||
223 | /** | ||
224 | * ERR_PSS bit needs to be cleared as well in case | ||
225 | * interrups are shared so driver's interrupt handler is | ||
226 | * still called eventhough it is already masked out. | ||
227 | */ | ||
228 | curr_value = bfa_reg_read( | ||
229 | bfa->ioc.ioc_regs.pss_err_status_reg); | ||
230 | curr_value &= __PSS_ERR_STATUS_SET; | ||
231 | bfa_reg_write(bfa->ioc.ioc_regs.pss_err_status_reg, | ||
232 | curr_value); | ||
233 | } | ||
234 | |||
235 | bfa_reg_write(bfa->iocfc.bfa_regs.intr_status, intr); | ||
210 | bfa_msix_errint(bfa, intr); | 236 | bfa_msix_errint(bfa, intr); |
237 | } | ||
211 | } | 238 | } |
212 | 239 | ||
213 | void | 240 | void |
diff --git a/drivers/scsi/bfa/bfa_ioc.h b/drivers/scsi/bfa/bfa_ioc.h index 1633a50187f7..853cc3136f0e 100644 --- a/drivers/scsi/bfa/bfa_ioc.h +++ b/drivers/scsi/bfa/bfa_ioc.h | |||
@@ -74,6 +74,7 @@ struct bfa_ioc_regs_s { | |||
74 | bfa_os_addr_t lpu_mbox_cmd; | 74 | bfa_os_addr_t lpu_mbox_cmd; |
75 | bfa_os_addr_t lpu_mbox; | 75 | bfa_os_addr_t lpu_mbox; |
76 | bfa_os_addr_t pss_ctl_reg; | 76 | bfa_os_addr_t pss_ctl_reg; |
77 | bfa_os_addr_t pss_err_status_reg; | ||
77 | bfa_os_addr_t app_pll_fast_ctl_reg; | 78 | bfa_os_addr_t app_pll_fast_ctl_reg; |
78 | bfa_os_addr_t app_pll_slow_ctl_reg; | 79 | bfa_os_addr_t app_pll_slow_ctl_reg; |
79 | bfa_os_addr_t ioc_sem_reg; | 80 | bfa_os_addr_t ioc_sem_reg; |
diff --git a/drivers/scsi/bfa/bfa_ioc_cb.c b/drivers/scsi/bfa/bfa_ioc_cb.c index d1d625bcd721..1fa052ef9ce0 100644 --- a/drivers/scsi/bfa/bfa_ioc_cb.c +++ b/drivers/scsi/bfa/bfa_ioc_cb.c | |||
@@ -145,6 +145,7 @@ bfa_ioc_cb_reg_init(struct bfa_ioc_s *ioc) | |||
145 | * PSS control registers | 145 | * PSS control registers |
146 | */ | 146 | */ |
147 | ioc->ioc_regs.pss_ctl_reg = (rb + PSS_CTL_REG); | 147 | ioc->ioc_regs.pss_ctl_reg = (rb + PSS_CTL_REG); |
148 | ioc->ioc_regs.pss_err_status_reg = (rb + PSS_ERR_STATUS_REG); | ||
148 | ioc->ioc_regs.app_pll_fast_ctl_reg = (rb + APP_PLL_400_CTL_REG); | 149 | ioc->ioc_regs.app_pll_fast_ctl_reg = (rb + APP_PLL_400_CTL_REG); |
149 | ioc->ioc_regs.app_pll_slow_ctl_reg = (rb + APP_PLL_212_CTL_REG); | 150 | ioc->ioc_regs.app_pll_slow_ctl_reg = (rb + APP_PLL_212_CTL_REG); |
150 | 151 | ||
diff --git a/drivers/scsi/bfa/bfa_ioc_ct.c b/drivers/scsi/bfa/bfa_ioc_ct.c index 5de9c24efacf..0430edd2e011 100644 --- a/drivers/scsi/bfa/bfa_ioc_ct.c +++ b/drivers/scsi/bfa/bfa_ioc_ct.c | |||
@@ -237,6 +237,7 @@ bfa_ioc_ct_reg_init(struct bfa_ioc_s *ioc) | |||
237 | * PSS control registers | 237 | * PSS control registers |
238 | */ | 238 | */ |
239 | ioc->ioc_regs.pss_ctl_reg = (rb + PSS_CTL_REG); | 239 | ioc->ioc_regs.pss_ctl_reg = (rb + PSS_CTL_REG); |
240 | ioc->ioc_regs.pss_err_status_reg = (rb + PSS_ERR_STATUS_REG); | ||
240 | ioc->ioc_regs.app_pll_fast_ctl_reg = (rb + APP_PLL_425_CTL_REG); | 241 | ioc->ioc_regs.app_pll_fast_ctl_reg = (rb + APP_PLL_425_CTL_REG); |
241 | ioc->ioc_regs.app_pll_slow_ctl_reg = (rb + APP_PLL_312_CTL_REG); | 242 | ioc->ioc_regs.app_pll_slow_ctl_reg = (rb + APP_PLL_312_CTL_REG); |
242 | 243 | ||
diff --git a/drivers/scsi/bfa/include/bfi/bfi_cbreg.h b/drivers/scsi/bfa/include/bfi/bfi_cbreg.h index 781cefafb659..a51ee61ddb19 100644 --- a/drivers/scsi/bfa/include/bfi/bfi_cbreg.h +++ b/drivers/scsi/bfa/include/bfi/bfi_cbreg.h | |||
@@ -177,6 +177,19 @@ | |||
177 | #define __PSS_LMEM_INIT_EN 0x00000100 | 177 | #define __PSS_LMEM_INIT_EN 0x00000100 |
178 | #define __PSS_LPU1_RESET 0x00000002 | 178 | #define __PSS_LPU1_RESET 0x00000002 |
179 | #define __PSS_LPU0_RESET 0x00000001 | 179 | #define __PSS_LPU0_RESET 0x00000001 |
180 | #define PSS_ERR_STATUS_REG 0x00018810 | ||
181 | #define __PSS_LMEM1_CORR_ERR 0x00000800 | ||
182 | #define __PSS_LMEM0_CORR_ERR 0x00000400 | ||
183 | #define __PSS_LMEM1_UNCORR_ERR 0x00000200 | ||
184 | #define __PSS_LMEM0_UNCORR_ERR 0x00000100 | ||
185 | #define __PSS_BAL_PERR 0x00000080 | ||
186 | #define __PSS_DIP_IF_ERR 0x00000040 | ||
187 | #define __PSS_IOH_IF_ERR 0x00000020 | ||
188 | #define __PSS_TDS_IF_ERR 0x00000010 | ||
189 | #define __PSS_RDS_IF_ERR 0x00000008 | ||
190 | #define __PSS_SGM_IF_ERR 0x00000004 | ||
191 | #define __PSS_LPU1_RAM_ERR 0x00000002 | ||
192 | #define __PSS_LPU0_RAM_ERR 0x00000001 | ||
180 | #define ERR_SET_REG 0x00018818 | 193 | #define ERR_SET_REG 0x00018818 |
181 | #define __PSS_ERR_STATUS_SET 0x00000fff | 194 | #define __PSS_ERR_STATUS_SET 0x00000fff |
182 | 195 | ||
diff --git a/drivers/scsi/bfa/include/bfi/bfi_ctreg.h b/drivers/scsi/bfa/include/bfi/bfi_ctreg.h index d84ebae70cb4..57a8497105af 100644 --- a/drivers/scsi/bfa/include/bfi/bfi_ctreg.h +++ b/drivers/scsi/bfa/include/bfi/bfi_ctreg.h | |||
@@ -430,6 +430,29 @@ enum { | |||
430 | #define __PSS_LMEM_INIT_EN 0x00000100 | 430 | #define __PSS_LMEM_INIT_EN 0x00000100 |
431 | #define __PSS_LPU1_RESET 0x00000002 | 431 | #define __PSS_LPU1_RESET 0x00000002 |
432 | #define __PSS_LPU0_RESET 0x00000001 | 432 | #define __PSS_LPU0_RESET 0x00000001 |
433 | #define PSS_ERR_STATUS_REG 0x00018810 | ||
434 | #define __PSS_LPU1_TCM_READ_ERR 0x00200000 | ||
435 | #define __PSS_LPU0_TCM_READ_ERR 0x00100000 | ||
436 | #define __PSS_LMEM5_CORR_ERR 0x00080000 | ||
437 | #define __PSS_LMEM4_CORR_ERR 0x00040000 | ||
438 | #define __PSS_LMEM3_CORR_ERR 0x00020000 | ||
439 | #define __PSS_LMEM2_CORR_ERR 0x00010000 | ||
440 | #define __PSS_LMEM1_CORR_ERR 0x00008000 | ||
441 | #define __PSS_LMEM0_CORR_ERR 0x00004000 | ||
442 | #define __PSS_LMEM5_UNCORR_ERR 0x00002000 | ||
443 | #define __PSS_LMEM4_UNCORR_ERR 0x00001000 | ||
444 | #define __PSS_LMEM3_UNCORR_ERR 0x00000800 | ||
445 | #define __PSS_LMEM2_UNCORR_ERR 0x00000400 | ||
446 | #define __PSS_LMEM1_UNCORR_ERR 0x00000200 | ||
447 | #define __PSS_LMEM0_UNCORR_ERR 0x00000100 | ||
448 | #define __PSS_BAL_PERR 0x00000080 | ||
449 | #define __PSS_DIP_IF_ERR 0x00000040 | ||
450 | #define __PSS_IOH_IF_ERR 0x00000020 | ||
451 | #define __PSS_TDS_IF_ERR 0x00000010 | ||
452 | #define __PSS_RDS_IF_ERR 0x00000008 | ||
453 | #define __PSS_SGM_IF_ERR 0x00000004 | ||
454 | #define __PSS_LPU1_RAM_ERR 0x00000002 | ||
455 | #define __PSS_LPU0_RAM_ERR 0x00000001 | ||
433 | #define ERR_SET_REG 0x00018818 | 456 | #define ERR_SET_REG 0x00018818 |
434 | #define __PSS_ERR_STATUS_SET 0x003fffff | 457 | #define __PSS_ERR_STATUS_SET 0x003fffff |
435 | #define HQM_QSET0_RXQ_DRBL_P0 0x00038000 | 458 | #define HQM_QSET0_RXQ_DRBL_P0 0x00038000 |