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authorAtsushi Nemoto <anemo@mba.ocn.ne.jp>2006-10-27 12:14:37 -0400
committerRalf Baechle <ralf@linux-mips.org>2006-11-29 20:14:46 -0500
commitc87b6ebaea034c0e0ce86127870cf1511a307b64 (patch)
tree1561d92b130dd9c840237e1ed96cc942f7f17f03
parent0d02f0734f8d2310497fae4f960c978f679f66d9 (diff)
[MIPS] mips hpt cleanup: get rid of mips_hpt_init
Currently nobody outside time.c require mips_hpt_init(). Remove it and call c0_hpt_timer_init() directly if R4k counter was used for timer interrupt. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r--arch/mips/kernel/time.c22
-rw-r--r--arch/mips/pmc-sierra/yosemite/smp.c2
-rw-r--r--include/asm-mips/time.h1
3 files changed, 8 insertions, 17 deletions
diff --git a/arch/mips/kernel/time.c b/arch/mips/kernel/time.c
index e535f86efa2f..111d1baa3b22 100644
--- a/arch/mips/kernel/time.c
+++ b/arch/mips/kernel/time.c
@@ -88,12 +88,6 @@ static unsigned int null_hpt_read(void)
88 return 0; 88 return 0;
89} 89}
90 90
91static void __init null_hpt_init(void)
92{
93 /* nothing */
94}
95
96
97/* 91/*
98 * Timer ack for an R4k-compatible timer of a known frequency. 92 * Timer ack for an R4k-compatible timer of a known frequency.
99 */ 93 */
@@ -133,7 +127,6 @@ static void __init c0_hpt_timer_init(void)
133int (*mips_timer_state)(void); 127int (*mips_timer_state)(void);
134void (*mips_timer_ack)(void); 128void (*mips_timer_ack)(void);
135unsigned int (*mips_hpt_read)(void); 129unsigned int (*mips_hpt_read)(void);
136void (*mips_hpt_init)(void) __initdata = null_hpt_init;
137unsigned int mips_hpt_mask = 0xffffffff; 130unsigned int mips_hpt_mask = 0xffffffff;
138 131
139/* last time when xtime and rtc are sync'ed up */ 132/* last time when xtime and rtc are sync'ed up */
@@ -383,16 +376,20 @@ void __init time_init(void)
383 376
384 if (!mips_timer_state) { 377 if (!mips_timer_state) {
385 /* No external timer interrupt -- use R4k. */ 378 /* No external timer interrupt -- use R4k. */
386 mips_hpt_init = c0_hpt_timer_init;
387 mips_timer_ack = c0_timer_ack; 379 mips_timer_ack = c0_timer_ack;
380 /* Calculate cache parameters. */
381 cycles_per_jiffy =
382 (mips_hpt_frequency + HZ / 2) / HZ;
383 /*
384 * This sets up the high precision
385 * timer for the first interrupt.
386 */
387 c0_hpt_timer_init();
388 } 388 }
389 } 389 }
390 if (!mips_hpt_frequency) 390 if (!mips_hpt_frequency)
391 mips_hpt_frequency = calibrate_hpt(); 391 mips_hpt_frequency = calibrate_hpt();
392 392
393 /* Calculate cache parameters. */
394 cycles_per_jiffy = (mips_hpt_frequency + HZ / 2) / HZ;
395
396 /* Report the high precision timer rate for a reference. */ 393 /* Report the high precision timer rate for a reference. */
397 printk("Using %u.%03u MHz high precision timer.\n", 394 printk("Using %u.%03u MHz high precision timer.\n",
398 ((mips_hpt_frequency + 500) / 1000) / 1000, 395 ((mips_hpt_frequency + 500) / 1000) / 1000,
@@ -403,9 +400,6 @@ void __init time_init(void)
403 /* No timer interrupt ack (e.g. i8254). */ 400 /* No timer interrupt ack (e.g. i8254). */
404 mips_timer_ack = null_timer_ack; 401 mips_timer_ack = null_timer_ack;
405 402
406 /* This sets up the high precision timer for the first interrupt. */
407 mips_hpt_init();
408
409 /* 403 /*
410 * Call board specific timer interrupt setup. 404 * Call board specific timer interrupt setup.
411 * 405 *
diff --git a/arch/mips/pmc-sierra/yosemite/smp.c b/arch/mips/pmc-sierra/yosemite/smp.c
index 3cc0436db6cf..305491e74dbe 100644
--- a/arch/mips/pmc-sierra/yosemite/smp.c
+++ b/arch/mips/pmc-sierra/yosemite/smp.c
@@ -99,8 +99,6 @@ void prom_cpus_done(void)
99 */ 99 */
100void prom_init_secondary(void) 100void prom_init_secondary(void)
101{ 101{
102 mips_hpt_init();
103
104 set_c0_status(ST0_CO | ST0_IE | ST0_IM); 102 set_c0_status(ST0_CO | ST0_IE | ST0_IM);
105} 103}
106 104
diff --git a/include/asm-mips/time.h b/include/asm-mips/time.h
index 625acd337bc3..b58665efb1d7 100644
--- a/include/asm-mips/time.h
+++ b/include/asm-mips/time.h
@@ -48,7 +48,6 @@ extern void (*mips_timer_ack)(void);
48 * If mips_hpt_read is NULL, an R4k-compatible timer setup is attempted. 48 * If mips_hpt_read is NULL, an R4k-compatible timer setup is attempted.
49 */ 49 */
50extern unsigned int (*mips_hpt_read)(void); 50extern unsigned int (*mips_hpt_read)(void);
51extern void (*mips_hpt_init)(void);
52extern unsigned int mips_hpt_mask; 51extern unsigned int mips_hpt_mask;
53 52
54/* 53/*