diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2009-06-19 20:40:40 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2009-06-19 20:40:40 -0400 |
commit | 773d7a09e1a1349a5319ac8665e9c612c6aa27d8 (patch) | |
tree | 3b2272bb3cfcab04ba6459cba116e577278c9392 | |
parent | 17fad5209e6b55148dbd20156cdaf2c7e67faa40 (diff) | |
parent | b71a107c66ad952c9d35ec046a803efc89a80556 (diff) |
Merge branch 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc
* 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (35 commits)
powerpc/5121: make clock debug output more readable
powerpc/5xxx: Add common mpc5xxx_get_bus_frequency() function
powerpc/5200: Update pcm030.dts to add i2c eeprom and delete cruft
powerpc/5200: convert mpc52xx_psc_spi to use cs_control callback
fbdev/xilinxfb: Fix improper casting and tighen up probe path
usb/ps3: Add missing annotations
powerpc: Add memory clobber to mtspr()
powerpc: Fix invalid construct in our CPU selection Kconfig
ps3rom: Use ps3_system_bus_[gs]et_drvdata() instead of direct access
powerpc: Add configurable -Werror for arch/powerpc
of_serial: Add UPF_FIXED_TYPE flag
drivers/hvc: Add missing __devexit_p()
net/ps3: gelic - Add missing annotations
powerpc: Introduce macro spin_event_timeout()
powerpc/warp: Fix ISA_DMA_THRESHOLD default
powerpc/bootwrapper: Custom build options for XPedite52xx targets
powerpc/85xx: Add defconfig for X-ES MPC85xx boards
powerpc/85xx: Add dts files for X-ES MPC85xx boards
powerpc/85xx: Add platform support for X-ES MPC85xx boards
83xx: add support for the kmeter1 board.
...
82 files changed, 7907 insertions, 216 deletions
diff --git a/arch/powerpc/Kconfig.debug b/arch/powerpc/Kconfig.debug index d79a902d155a..3b1005185390 100644 --- a/arch/powerpc/Kconfig.debug +++ b/arch/powerpc/Kconfig.debug | |||
@@ -2,6 +2,23 @@ menu "Kernel hacking" | |||
2 | 2 | ||
3 | source "lib/Kconfig.debug" | 3 | source "lib/Kconfig.debug" |
4 | 4 | ||
5 | config PPC_DISABLE_WERROR | ||
6 | bool "Don't build arch/powerpc code with -Werror" | ||
7 | default n | ||
8 | help | ||
9 | This option tells the compiler NOT to build the code under | ||
10 | arch/powerpc with the -Werror flag (which means warnings | ||
11 | are treated as errors). | ||
12 | |||
13 | Only enable this if you are hitting a build failure in the | ||
14 | arch/powerpc code caused by a warning, and you don't feel | ||
15 | inclined to fix it. | ||
16 | |||
17 | config PPC_WERROR | ||
18 | bool | ||
19 | depends on !PPC_DISABLE_WERROR | ||
20 | default y | ||
21 | |||
5 | config PRINT_STACK_DEPTH | 22 | config PRINT_STACK_DEPTH |
6 | int "Stack depth to print" if DEBUG_KERNEL | 23 | int "Stack depth to print" if DEBUG_KERNEL |
7 | default 64 | 24 | default 64 |
diff --git a/arch/powerpc/boot/cuboot-85xx.c b/arch/powerpc/boot/cuboot-85xx.c index 6776a1a29f13..277ba4a79b5a 100644 --- a/arch/powerpc/boot/cuboot-85xx.c +++ b/arch/powerpc/boot/cuboot-85xx.c | |||
@@ -15,6 +15,7 @@ | |||
15 | #include "cuboot.h" | 15 | #include "cuboot.h" |
16 | 16 | ||
17 | #define TARGET_85xx | 17 | #define TARGET_85xx |
18 | #define TARGET_HAS_ETH3 | ||
18 | #include "ppcboot.h" | 19 | #include "ppcboot.h" |
19 | 20 | ||
20 | static bd_t bd; | 21 | static bd_t bd; |
@@ -27,6 +28,7 @@ static void platform_fixups(void) | |||
27 | dt_fixup_mac_address_by_alias("ethernet0", bd.bi_enetaddr); | 28 | dt_fixup_mac_address_by_alias("ethernet0", bd.bi_enetaddr); |
28 | dt_fixup_mac_address_by_alias("ethernet1", bd.bi_enet1addr); | 29 | dt_fixup_mac_address_by_alias("ethernet1", bd.bi_enet1addr); |
29 | dt_fixup_mac_address_by_alias("ethernet2", bd.bi_enet2addr); | 30 | dt_fixup_mac_address_by_alias("ethernet2", bd.bi_enet2addr); |
31 | dt_fixup_mac_address_by_alias("ethernet3", bd.bi_enet3addr); | ||
30 | dt_fixup_cpu_clocks(bd.bi_intfreq, bd.bi_busfreq / 8, bd.bi_busfreq); | 32 | dt_fixup_cpu_clocks(bd.bi_intfreq, bd.bi_busfreq / 8, bd.bi_busfreq); |
31 | 33 | ||
32 | /* Unfortunately, the specific model number is encoded in the | 34 | /* Unfortunately, the specific model number is encoded in the |
diff --git a/arch/powerpc/boot/dts/asp834x-redboot.dts b/arch/powerpc/boot/dts/asp834x-redboot.dts index 7da84fd7be93..261d10c4534b 100644 --- a/arch/powerpc/boot/dts/asp834x-redboot.dts +++ b/arch/powerpc/boot/dts/asp834x-redboot.dts | |||
@@ -167,7 +167,7 @@ | |||
167 | interrupt-parent = <&ipic>; | 167 | interrupt-parent = <&ipic>; |
168 | interrupts = <39 0x8>; | 168 | interrupts = <39 0x8>; |
169 | phy_type = "ulpi"; | 169 | phy_type = "ulpi"; |
170 | port1; | 170 | port0; |
171 | }; | 171 | }; |
172 | /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */ | 172 | /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */ |
173 | usb@23000 { | 173 | usb@23000 { |
diff --git a/arch/powerpc/boot/dts/gef_sbc610.dts b/arch/powerpc/boot/dts/gef_sbc610.dts index 217f8aa66725..35a63183eecc 100644 --- a/arch/powerpc/boot/dts/gef_sbc610.dts +++ b/arch/powerpc/boot/dts/gef_sbc610.dts | |||
@@ -152,6 +152,16 @@ | |||
152 | interrupt-parent = <&mpic>; | 152 | interrupt-parent = <&mpic>; |
153 | dfsrr; | 153 | dfsrr; |
154 | 154 | ||
155 | hwmon@48 { | ||
156 | compatible = "national,lm92"; | ||
157 | reg = <0x48>; | ||
158 | }; | ||
159 | |||
160 | hwmon@4c { | ||
161 | compatible = "adi,adt7461"; | ||
162 | reg = <0x4c>; | ||
163 | }; | ||
164 | |||
155 | rtc@51 { | 165 | rtc@51 { |
156 | compatible = "epson,rx8581"; | 166 | compatible = "epson,rx8581"; |
157 | reg = <0x00000051>; | 167 | reg = <0x00000051>; |
diff --git a/arch/powerpc/boot/dts/kmeter1.dts b/arch/powerpc/boot/dts/kmeter1.dts new file mode 100644 index 000000000000..167044f7de1d --- /dev/null +++ b/arch/powerpc/boot/dts/kmeter1.dts | |||
@@ -0,0 +1,520 @@ | |||
1 | /* | ||
2 | * Keymile KMETER1 Device Tree Source | ||
3 | * | ||
4 | * 2008 DENX Software Engineering GmbH | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify it | ||
7 | * under the terms of the GNU General Public License as published by the | ||
8 | * Free Software Foundation; either version 2 of the License, or (at your | ||
9 | * option) any later version. | ||
10 | */ | ||
11 | |||
12 | /dts-v1/; | ||
13 | |||
14 | / { | ||
15 | model = "KMETER1"; | ||
16 | compatible = "keymile,KMETER1"; | ||
17 | #address-cells = <1>; | ||
18 | #size-cells = <1>; | ||
19 | |||
20 | aliases { | ||
21 | ethernet0 = &enet_piggy2; | ||
22 | ethernet1 = &enet_estar1; | ||
23 | ethernet2 = &enet_estar2; | ||
24 | ethernet3 = &enet_eth1; | ||
25 | ethernet4 = &enet_eth2; | ||
26 | ethernet5 = &enet_eth3; | ||
27 | ethernet6 = &enet_eth4; | ||
28 | serial0 = &serial0; | ||
29 | }; | ||
30 | |||
31 | cpus { | ||
32 | #address-cells = <1>; | ||
33 | #size-cells = <0>; | ||
34 | |||
35 | PowerPC,8360@0 { | ||
36 | device_type = "cpu"; | ||
37 | reg = <0x0>; | ||
38 | d-cache-line-size = <32>; // 32 bytes | ||
39 | i-cache-line-size = <32>; // 32 bytes | ||
40 | d-cache-size = <32768>; // L1, 32K | ||
41 | i-cache-size = <32768>; // L1, 32K | ||
42 | timebase-frequency = <0>; /* Filled in by U-Boot */ | ||
43 | bus-frequency = <0>; /* Filled in by U-Boot */ | ||
44 | clock-frequency = <0>; /* Filled in by U-Boot */ | ||
45 | }; | ||
46 | }; | ||
47 | |||
48 | memory { | ||
49 | device_type = "memory"; | ||
50 | reg = <0 0>; /* Filled in by U-Boot */ | ||
51 | }; | ||
52 | |||
53 | soc8360@e0000000 { | ||
54 | #address-cells = <1>; | ||
55 | #size-cells = <1>; | ||
56 | device_type = "soc"; | ||
57 | compatible = "fsl,mpc8360-immr", "simple-bus"; | ||
58 | ranges = <0x0 0xe0000000 0x00200000>; | ||
59 | reg = <0xe0000000 0x00000200>; | ||
60 | bus-frequency = <0>; /* Filled in by U-Boot */ | ||
61 | |||
62 | i2c@3000 { | ||
63 | #address-cells = <1>; | ||
64 | #size-cells = <0>; | ||
65 | cell-index = <0>; | ||
66 | compatible = "fsl-i2c"; | ||
67 | reg = <0x3000 0x100>; | ||
68 | interrupts = <14 0x8>; | ||
69 | interrupt-parent = <&ipic>; | ||
70 | dfsrr; | ||
71 | }; | ||
72 | |||
73 | serial0: serial@4500 { | ||
74 | cell-index = <0>; | ||
75 | device_type = "serial"; | ||
76 | compatible = "ns16550"; | ||
77 | reg = <0x4500 0x100>; | ||
78 | clock-frequency = <264000000>; | ||
79 | interrupts = <9 0x8>; | ||
80 | interrupt-parent = <&ipic>; | ||
81 | }; | ||
82 | |||
83 | dma@82a8 { | ||
84 | #address-cells = <1>; | ||
85 | #size-cells = <1>; | ||
86 | compatible = "fsl,mpc8360-dma", "fsl,elo-dma"; | ||
87 | reg = <0x82a8 4>; | ||
88 | ranges = <0 0x8100 0x1a8>; | ||
89 | interrupt-parent = <&ipic>; | ||
90 | interrupts = <71 8>; | ||
91 | cell-index = <0>; | ||
92 | dma-channel@0 { | ||
93 | compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; | ||
94 | reg = <0 0x80>; | ||
95 | interrupt-parent = <&ipic>; | ||
96 | interrupts = <71 8>; | ||
97 | }; | ||
98 | dma-channel@80 { | ||
99 | compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; | ||
100 | reg = <0x80 0x80>; | ||
101 | interrupt-parent = <&ipic>; | ||
102 | interrupts = <71 8>; | ||
103 | }; | ||
104 | dma-channel@100 { | ||
105 | compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; | ||
106 | reg = <0x100 0x80>; | ||
107 | interrupt-parent = <&ipic>; | ||
108 | interrupts = <71 8>; | ||
109 | }; | ||
110 | dma-channel@180 { | ||
111 | compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; | ||
112 | reg = <0x180 0x28>; | ||
113 | interrupt-parent = <&ipic>; | ||
114 | interrupts = <71 8>; | ||
115 | }; | ||
116 | }; | ||
117 | |||
118 | ipic: pic@700 { | ||
119 | #address-cells = <0>; | ||
120 | #interrupt-cells = <2>; | ||
121 | compatible = "fsl,pq2pro-pic", "fsl,ipic"; | ||
122 | interrupt-controller; | ||
123 | reg = <0x700 0x100>; | ||
124 | }; | ||
125 | |||
126 | par_io@1400 { | ||
127 | #address-cells = <1>; | ||
128 | #size-cells = <0>; | ||
129 | reg = <0x1400 0x100>; | ||
130 | compatible = "fsl,mpc8360-par_io"; | ||
131 | num-ports = <7>; | ||
132 | |||
133 | pio_ucc1: ucc_pin@0 { | ||
134 | reg = <0>; | ||
135 | |||
136 | pio-map = < | ||
137 | /* port pin dir open_drain assignment has_irq */ | ||
138 | 0 1 3 0 2 0 /* MDIO */ | ||
139 | 0 2 1 0 1 0 /* MDC */ | ||
140 | |||
141 | 0 3 1 0 1 0 /* TxD0 */ | ||
142 | 0 4 1 0 1 0 /* TxD1 */ | ||
143 | 0 5 1 0 1 0 /* TxD2 */ | ||
144 | 0 6 1 0 1 0 /* TxD3 */ | ||
145 | 0 9 2 0 1 0 /* RxD0 */ | ||
146 | 0 10 2 0 1 0 /* RxD1 */ | ||
147 | 0 11 2 0 1 0 /* RxD2 */ | ||
148 | 0 12 2 0 1 0 /* RxD3 */ | ||
149 | 0 7 1 0 1 0 /* TX_EN */ | ||
150 | 0 8 1 0 1 0 /* TX_ER */ | ||
151 | 0 15 2 0 1 0 /* RX_DV */ | ||
152 | 0 16 2 0 1 0 /* RX_ER */ | ||
153 | 0 0 2 0 1 0 /* RX_CLK */ | ||
154 | 2 9 1 0 3 0 /* GTX_CLK - CLK10 */ | ||
155 | 2 8 2 0 1 0 /* GTX125 - CLK9 */ | ||
156 | >; | ||
157 | }; | ||
158 | |||
159 | pio_ucc2: ucc_pin@1 { | ||
160 | reg = <1>; | ||
161 | |||
162 | pio-map = < | ||
163 | /* port pin dir open_drain assignment has_irq */ | ||
164 | 0 1 3 0 2 0 /* MDIO */ | ||
165 | 0 2 1 0 1 0 /* MDC */ | ||
166 | |||
167 | 0 17 1 0 1 0 /* TxD0 */ | ||
168 | 0 18 1 0 1 0 /* TxD1 */ | ||
169 | 0 19 1 0 1 0 /* TxD2 */ | ||
170 | 0 20 1 0 1 0 /* TxD3 */ | ||
171 | 0 23 2 0 1 0 /* RxD0 */ | ||
172 | 0 24 2 0 1 0 /* RxD1 */ | ||
173 | 0 25 2 0 1 0 /* RxD2 */ | ||
174 | 0 26 2 0 1 0 /* RxD3 */ | ||
175 | 0 21 1 0 1 0 /* TX_EN */ | ||
176 | 0 22 1 0 1 0 /* TX_ER */ | ||
177 | 0 29 2 0 1 0 /* RX_DV */ | ||
178 | 0 30 2 0 1 0 /* RX_ER */ | ||
179 | 0 31 2 0 1 0 /* RX_CLK */ | ||
180 | 2 2 1 0 2 0 /* GTX_CLK - CLK3 */ | ||
181 | 2 3 2 0 1 0 /* GTX125 - CLK4 */ | ||
182 | >; | ||
183 | }; | ||
184 | |||
185 | pio_ucc4: ucc_pin@3 { | ||
186 | reg = <3>; | ||
187 | |||
188 | pio-map = < | ||
189 | /* port pin dir open_drain assignment has_irq */ | ||
190 | 0 1 3 0 2 0 /* MDIO */ | ||
191 | 0 2 1 0 1 0 /* MDC */ | ||
192 | |||
193 | 1 14 1 0 1 0 /* TxD0 (PB14, out, f1) */ | ||
194 | 1 15 1 0 1 0 /* TxD1 (PB15, out, f1) */ | ||
195 | 1 20 2 0 1 0 /* RxD0 (PB20, in, f1) */ | ||
196 | 1 21 2 0 1 0 /* RxD1 (PB21, in, f1) */ | ||
197 | 1 18 1 0 1 0 /* TX_EN (PB18, out, f1) */ | ||
198 | 1 26 2 0 1 0 /* RX_DV (PB26, in, f1) */ | ||
199 | 1 27 2 0 1 0 /* RX_ER (PB27, in, f1) */ | ||
200 | |||
201 | 2 16 2 0 1 0 /* UCC4_RMII_CLK (CLK17) */ | ||
202 | >; | ||
203 | }; | ||
204 | |||
205 | pio_ucc5: ucc_pin@4 { | ||
206 | reg = <4>; | ||
207 | |||
208 | pio-map = < | ||
209 | /* port pin dir open_drain assignment has_irq */ | ||
210 | 0 1 3 0 2 0 /* MDIO */ | ||
211 | 0 2 1 0 1 0 /* MDC */ | ||
212 | |||
213 | 3 0 1 0 1 0 /* TxD0 (PD0, out, f1) */ | ||
214 | 3 1 1 0 1 0 /* TxD1 (PD1, out, f1) */ | ||
215 | 3 6 2 0 1 0 /* RxD0 (PD6, in, f1) */ | ||
216 | 3 7 2 0 1 0 /* RxD1 (PD7, in, f1) */ | ||
217 | 3 4 1 0 1 0 /* TX_EN (PD4, out, f1) */ | ||
218 | 3 12 2 0 1 0 /* RX_DV (PD12, in, f1) */ | ||
219 | 3 13 2 0 1 0 /* RX_ER (PD13, in, f1) */ | ||
220 | >; | ||
221 | }; | ||
222 | |||
223 | pio_ucc6: ucc_pin@5 { | ||
224 | reg = <5>; | ||
225 | |||
226 | pio-map = < | ||
227 | /* port pin dir open_drain assignment has_irq */ | ||
228 | 0 1 3 0 2 0 /* MDIO */ | ||
229 | 0 2 1 0 1 0 /* MDC */ | ||
230 | |||
231 | 3 14 1 0 1 0 /* TxD0 (PD14, out, f1) */ | ||
232 | 3 15 1 0 1 0 /* TxD1 (PD15, out, f1) */ | ||
233 | 3 20 2 0 1 0 /* RxD0 (PD20, in, f1) */ | ||
234 | 3 21 2 0 1 0 /* RxD1 (PD21, in, f1) */ | ||
235 | 3 18 1 0 1 0 /* TX_EN (PD18, out, f1) */ | ||
236 | 3 26 2 0 1 0 /* RX_DV (PD26, in, f1) */ | ||
237 | 3 27 2 0 1 0 /* RX_ER (PD27, in, f1) */ | ||
238 | >; | ||
239 | }; | ||
240 | |||
241 | pio_ucc7: ucc_pin@6 { | ||
242 | reg = <6>; | ||
243 | |||
244 | pio-map = < | ||
245 | /* port pin dir open_drain assignment has_irq */ | ||
246 | 0 1 3 0 2 0 /* MDIO */ | ||
247 | 0 2 1 0 1 0 /* MDC */ | ||
248 | |||
249 | 4 0 1 0 1 0 /* TxD0 (PE0, out, f1) */ | ||
250 | 4 1 1 0 1 0 /* TxD1 (PE1, out, f1) */ | ||
251 | 4 6 2 0 1 0 /* RxD0 (PE6, in, f1) */ | ||
252 | 4 7 2 0 1 0 /* RxD1 (PE7, in, f1) */ | ||
253 | 4 4 1 0 1 0 /* TX_EN (PE4, out, f1) */ | ||
254 | 4 12 2 0 1 0 /* RX_DV (PE12, in, f1) */ | ||
255 | 4 13 2 0 1 0 /* RX_ER (PE13, in, f1) */ | ||
256 | >; | ||
257 | }; | ||
258 | |||
259 | pio_ucc8: ucc_pin@7 { | ||
260 | reg = <7>; | ||
261 | |||
262 | pio-map = < | ||
263 | /* port pin dir open_drain assignment has_irq */ | ||
264 | 0 1 3 0 2 0 /* MDIO */ | ||
265 | 0 2 1 0 1 0 /* MDC */ | ||
266 | |||
267 | 4 14 1 0 2 0 /* TxD0 (PE14, out, f2) */ | ||
268 | 4 15 1 0 1 0 /* TxD1 (PE15, out, f1) */ | ||
269 | 4 20 2 0 1 0 /* RxD0 (PE20, in, f1) */ | ||
270 | 4 21 2 0 1 0 /* RxD1 (PE21, in, f1) */ | ||
271 | 4 18 1 0 1 0 /* TX_EN (PE18, out, f1) */ | ||
272 | 4 26 2 0 1 0 /* RX_DV (PE26, in, f1) */ | ||
273 | 4 27 2 0 1 0 /* RX_ER (PE27, in, f1) */ | ||
274 | |||
275 | 2 15 2 0 1 0 /* UCCx_RMII_CLK (CLK16) */ | ||
276 | >; | ||
277 | }; | ||
278 | |||
279 | }; | ||
280 | |||
281 | qe@100000 { | ||
282 | #address-cells = <1>; | ||
283 | #size-cells = <1>; | ||
284 | compatible = "fsl,qe"; | ||
285 | ranges = <0x0 0x100000 0x100000>; | ||
286 | reg = <0x100000 0x480>; | ||
287 | clock-frequency = <0>; /* Filled in by U-Boot */ | ||
288 | brg-frequency = <0>; /* Filled in by U-Boot */ | ||
289 | bus-frequency = <0>; /* Filled in by U-Boot */ | ||
290 | |||
291 | muram@10000 { | ||
292 | #address-cells = <1>; | ||
293 | #size-cells = <1>; | ||
294 | compatible = "fsl,qe-muram", "fsl,cpm-muram"; | ||
295 | ranges = <0x0 0x00010000 0x0000c000>; | ||
296 | |||
297 | data-only@0 { | ||
298 | compatible = "fsl,qe-muram-data", | ||
299 | "fsl,cpm-muram-data"; | ||
300 | reg = <0x0 0xc000>; | ||
301 | }; | ||
302 | }; | ||
303 | |||
304 | /* ESTAR-1 (UCC1, MDIO 0x10, RGMII) */ | ||
305 | enet_estar1: ucc@2000 { | ||
306 | device_type = "network"; | ||
307 | compatible = "ucc_geth"; | ||
308 | cell-index = <1>; | ||
309 | reg = <0x2000 0x200>; | ||
310 | interrupts = <32>; | ||
311 | interrupt-parent = <&qeic>; | ||
312 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
313 | rx-clock-name = "none"; | ||
314 | tx-clock-name = "clk9"; | ||
315 | phy-handle = <&phy_estar1>; | ||
316 | phy-connection-type = "rgmii-id"; | ||
317 | pio-handle = <&pio_ucc1>; | ||
318 | }; | ||
319 | |||
320 | /* ESTAR-2 (UCC2, MDIO 0x11, RGMII) */ | ||
321 | enet_estar2: ucc@3000 { | ||
322 | device_type = "network"; | ||
323 | compatible = "ucc_geth"; | ||
324 | cell-index = <2>; | ||
325 | reg = <0x3000 0x200>; | ||
326 | interrupts = <33>; | ||
327 | interrupt-parent = <&qeic>; | ||
328 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
329 | rx-clock-name = "none"; | ||
330 | tx-clock-name = "clk4"; | ||
331 | phy-handle = <&phy_estar2>; | ||
332 | phy-connection-type = "rgmii-id"; | ||
333 | pio-handle = <&pio_ucc2>; | ||
334 | }; | ||
335 | |||
336 | /* Piggy2 (UCC4, MDIO 0x00, RMII) */ | ||
337 | enet_piggy2: ucc@3200 { | ||
338 | device_type = "network"; | ||
339 | compatible = "ucc_geth"; | ||
340 | cell-index = <4>; | ||
341 | reg = <0x3200 0x200>; | ||
342 | interrupts = <35>; | ||
343 | interrupt-parent = <&qeic>; | ||
344 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
345 | rx-clock-name = "none"; | ||
346 | tx-clock-name = "clk17"; | ||
347 | phy-handle = <&phy_piggy2>; | ||
348 | phy-connection-type = "rmii"; | ||
349 | pio-handle = <&pio_ucc4>; | ||
350 | }; | ||
351 | |||
352 | /* Eth-1 (UCC5, MDIO 0x08, RMII) */ | ||
353 | enet_eth1: ucc@2400 { | ||
354 | device_type = "network"; | ||
355 | compatible = "ucc_geth"; | ||
356 | cell-index = <5>; | ||
357 | reg = <0x2400 0x200>; | ||
358 | interrupts = <40>; | ||
359 | interrupt-parent = <&qeic>; | ||
360 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
361 | rx-clock-name = "none"; | ||
362 | tx-clock-name = "clk16"; | ||
363 | phy-handle = <&phy_eth1>; | ||
364 | phy-connection-type = "rmii"; | ||
365 | pio-handle = <&pio_ucc5>; | ||
366 | }; | ||
367 | |||
368 | /* Eth-2 (UCC6, MDIO 0x09, RMII) */ | ||
369 | enet_eth2: ucc@3400 { | ||
370 | device_type = "network"; | ||
371 | compatible = "ucc_geth"; | ||
372 | cell-index = <6>; | ||
373 | reg = <0x3400 0x200>; | ||
374 | interrupts = <41>; | ||
375 | interrupt-parent = <&qeic>; | ||
376 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
377 | rx-clock-name = "none"; | ||
378 | tx-clock-name = "clk16"; | ||
379 | phy-handle = <&phy_eth2>; | ||
380 | phy-connection-type = "rmii"; | ||
381 | pio-handle = <&pio_ucc6>; | ||
382 | }; | ||
383 | |||
384 | /* Eth-3 (UCC7, MDIO 0x0a, RMII) */ | ||
385 | enet_eth3: ucc@2600 { | ||
386 | device_type = "network"; | ||
387 | compatible = "ucc_geth"; | ||
388 | cell-index = <7>; | ||
389 | reg = <0x2600 0x200>; | ||
390 | interrupts = <42>; | ||
391 | interrupt-parent = <&qeic>; | ||
392 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
393 | rx-clock-name = "none"; | ||
394 | tx-clock-name = "clk16"; | ||
395 | phy-handle = <&phy_eth3>; | ||
396 | phy-connection-type = "rmii"; | ||
397 | pio-handle = <&pio_ucc7>; | ||
398 | }; | ||
399 | |||
400 | /* Eth-4 (UCC8, MDIO 0x0b, RMII) */ | ||
401 | enet_eth4: ucc@3600 { | ||
402 | device_type = "network"; | ||
403 | compatible = "ucc_geth"; | ||
404 | cell-index = <8>; | ||
405 | reg = <0x3600 0x200>; | ||
406 | interrupts = <43>; | ||
407 | interrupt-parent = <&qeic>; | ||
408 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
409 | rx-clock-name = "none"; | ||
410 | tx-clock-name = "clk16"; | ||
411 | phy-handle = <&phy_eth4>; | ||
412 | phy-connection-type = "rmii"; | ||
413 | pio-handle = <&pio_ucc8>; | ||
414 | }; | ||
415 | |||
416 | mdio@3320 { | ||
417 | #address-cells = <1>; | ||
418 | #size-cells = <0>; | ||
419 | reg = <0x3320 0x18>; | ||
420 | compatible = "fsl,ucc-mdio"; | ||
421 | |||
422 | /* Piggy2 (UCC4, MDIO 0x00, RMII) */ | ||
423 | phy_piggy2: ethernet-phy@00 { | ||
424 | reg = <0x0>; | ||
425 | }; | ||
426 | |||
427 | /* Eth-1 (UCC5, MDIO 0x08, RMII) */ | ||
428 | phy_eth1: ethernet-phy@08 { | ||
429 | reg = <0x08>; | ||
430 | }; | ||
431 | |||
432 | /* Eth-2 (UCC6, MDIO 0x09, RMII) */ | ||
433 | phy_eth2: ethernet-phy@09 { | ||
434 | reg = <0x09>; | ||
435 | }; | ||
436 | |||
437 | /* Eth-3 (UCC7, MDIO 0x0a, RMII) */ | ||
438 | phy_eth3: ethernet-phy@0a { | ||
439 | reg = <0x0a>; | ||
440 | }; | ||
441 | |||
442 | /* Eth-4 (UCC8, MDIO 0x0b, RMII) */ | ||
443 | phy_eth4: ethernet-phy@0b { | ||
444 | reg = <0x0b>; | ||
445 | }; | ||
446 | |||
447 | /* ESTAR-1 (UCC1, MDIO 0x10, RGMII) */ | ||
448 | phy_estar1: ethernet-phy@10 { | ||
449 | interrupt-parent = <&ipic>; | ||
450 | interrupts = <17 0x8>; | ||
451 | reg = <0x10>; | ||
452 | }; | ||
453 | |||
454 | /* ESTAR-2 (UCC2, MDIO 0x11, RGMII) */ | ||
455 | phy_estar2: ethernet-phy@11 { | ||
456 | interrupt-parent = <&ipic>; | ||
457 | interrupts = <18 0x8>; | ||
458 | reg = <0x11>; | ||
459 | }; | ||
460 | }; | ||
461 | |||
462 | qeic: interrupt-controller@80 { | ||
463 | interrupt-controller; | ||
464 | compatible = "fsl,qe-ic"; | ||
465 | #address-cells = <0>; | ||
466 | #interrupt-cells = <1>; | ||
467 | reg = <0x80 0x80>; | ||
468 | interrupts = <32 8 33 8>; | ||
469 | interrupt-parent = <&ipic>; | ||
470 | }; | ||
471 | }; | ||
472 | }; | ||
473 | |||
474 | localbus@e0005000 { | ||
475 | #address-cells = <2>; | ||
476 | #size-cells = <1>; | ||
477 | compatible = "fsl,mpc8360-localbus", "fsl,pq2pro-localbus", | ||
478 | "simple-bus"; | ||
479 | reg = <0xe0005000 0xd8>; | ||
480 | ranges = <0 0 0xf0000000 0x04000000>; /* Filled in by U-Boot */ | ||
481 | |||
482 | flash@f0000000,0 { | ||
483 | compatible = "cfi-flash"; | ||
484 | /* | ||
485 | * The Intel P30 chip has 2 non-identical chips on | ||
486 | * one die, so we need to define 2 seperate regions | ||
487 | * that are scanned by physmap_of independantly. | ||
488 | */ | ||
489 | reg = <0 0x00000000 0x02000000 | ||
490 | 0 0x02000000 0x02000000>; /* Filled in by U-Boot */ | ||
491 | bank-width = <2>; | ||
492 | #address-cells = <1>; | ||
493 | #size-cells = <1>; | ||
494 | partition@0 { | ||
495 | label = "u-boot"; | ||
496 | reg = <0 0x40000>; | ||
497 | }; | ||
498 | partition@40000 { | ||
499 | label = "env"; | ||
500 | reg = <0x40000 0x40000>; | ||
501 | }; | ||
502 | partition@80000 { | ||
503 | label = "dtb"; | ||
504 | reg = <0x80000 0x20000>; | ||
505 | }; | ||
506 | partition@a0000 { | ||
507 | label = "kernel"; | ||
508 | reg = <0xa0000 0x300000>; | ||
509 | }; | ||
510 | partition@3a0000 { | ||
511 | label = "ramdisk"; | ||
512 | reg = <0x3a0000 0x800000>; | ||
513 | }; | ||
514 | partition@ba0000 { | ||
515 | label = "user"; | ||
516 | reg = <0xba0000 0x3460000>; | ||
517 | }; | ||
518 | }; | ||
519 | }; | ||
520 | }; | ||
diff --git a/arch/powerpc/boot/dts/mpc8272ads.dts b/arch/powerpc/boot/dts/mpc8272ads.dts index 2a1929acaabd..60f332778e41 100644 --- a/arch/powerpc/boot/dts/mpc8272ads.dts +++ b/arch/powerpc/boot/dts/mpc8272ads.dts | |||
@@ -17,6 +17,13 @@ | |||
17 | #address-cells = <1>; | 17 | #address-cells = <1>; |
18 | #size-cells = <1>; | 18 | #size-cells = <1>; |
19 | 19 | ||
20 | aliases { | ||
21 | ethernet0 = ð0; | ||
22 | ethernet1 = ð1; | ||
23 | serial0 = &scc1; | ||
24 | serial1 = &scc4; | ||
25 | }; | ||
26 | |||
20 | cpus { | 27 | cpus { |
21 | #address-cells = <1>; | 28 | #address-cells = <1>; |
22 | #size-cells = <0>; | 29 | #size-cells = <0>; |
@@ -46,13 +53,13 @@ | |||
46 | #size-cells = <1>; | 53 | #size-cells = <1>; |
47 | reg = <0xf0010100 0x40>; | 54 | reg = <0xf0010100 0x40>; |
48 | 55 | ||
49 | ranges = <0x0 0x0 0xfe000000 0x2000000 | 56 | ranges = <0x0 0x0 0xff800000 0x00800000 |
50 | 0x1 0x0 0xf4500000 0x8000 | 57 | 0x1 0x0 0xf4500000 0x8000 |
51 | 0x3 0x0 0xf8200000 0x8000>; | 58 | 0x3 0x0 0xf8200000 0x8000>; |
52 | 59 | ||
53 | flash@0,0 { | 60 | flash@0,0 { |
54 | compatible = "jedec-flash"; | 61 | compatible = "jedec-flash"; |
55 | reg = <0x0 0x0 0x2000000>; | 62 | reg = <0x0 0x0 0x00800000>; |
56 | bank-width = <4>; | 63 | bank-width = <4>; |
57 | device-width = <1>; | 64 | device-width = <1>; |
58 | }; | 65 | }; |
@@ -144,7 +151,7 @@ | |||
144 | reg = <0x119f0 0x10 0x115f0 0x10>; | 151 | reg = <0x119f0 0x10 0x115f0 0x10>; |
145 | }; | 152 | }; |
146 | 153 | ||
147 | serial@11a00 { | 154 | scc1: serial@11a00 { |
148 | device_type = "serial"; | 155 | device_type = "serial"; |
149 | compatible = "fsl,mpc8272-scc-uart", | 156 | compatible = "fsl,mpc8272-scc-uart", |
150 | "fsl,cpm2-scc-uart"; | 157 | "fsl,cpm2-scc-uart"; |
@@ -155,7 +162,7 @@ | |||
155 | fsl,cpm-command = <0x800000>; | 162 | fsl,cpm-command = <0x800000>; |
156 | }; | 163 | }; |
157 | 164 | ||
158 | serial@11a60 { | 165 | scc4: serial@11a60 { |
159 | device_type = "serial"; | 166 | device_type = "serial"; |
160 | compatible = "fsl,mpc8272-scc-uart", | 167 | compatible = "fsl,mpc8272-scc-uart", |
161 | "fsl,cpm2-scc-uart"; | 168 | "fsl,cpm2-scc-uart"; |
@@ -192,7 +199,7 @@ | |||
192 | }; | 199 | }; |
193 | }; | 200 | }; |
194 | 201 | ||
195 | ethernet@11300 { | 202 | eth0: ethernet@11300 { |
196 | device_type = "network"; | 203 | device_type = "network"; |
197 | compatible = "fsl,mpc8272-fcc-enet", | 204 | compatible = "fsl,mpc8272-fcc-enet", |
198 | "fsl,cpm2-fcc-enet"; | 205 | "fsl,cpm2-fcc-enet"; |
@@ -205,7 +212,7 @@ | |||
205 | fsl,cpm-command = <0x12000300>; | 212 | fsl,cpm-command = <0x12000300>; |
206 | }; | 213 | }; |
207 | 214 | ||
208 | ethernet@11320 { | 215 | eth1: ethernet@11320 { |
209 | device_type = "network"; | 216 | device_type = "network"; |
210 | compatible = "fsl,mpc8272-fcc-enet", | 217 | compatible = "fsl,mpc8272-fcc-enet", |
211 | "fsl,cpm2-fcc-enet"; | 218 | "fsl,cpm2-fcc-enet"; |
diff --git a/arch/powerpc/boot/dts/mpc8315erdb.dts b/arch/powerpc/boot/dts/mpc8315erdb.dts index 3f4c5fb988a0..32e10f588c1d 100644 --- a/arch/powerpc/boot/dts/mpc8315erdb.dts +++ b/arch/powerpc/boot/dts/mpc8315erdb.dts | |||
@@ -322,6 +322,21 @@ | |||
322 | reg = <0x700 0x100>; | 322 | reg = <0x700 0x100>; |
323 | device_type = "ipic"; | 323 | device_type = "ipic"; |
324 | }; | 324 | }; |
325 | |||
326 | ipic-msi@7c0 { | ||
327 | compatible = "fsl,ipic-msi"; | ||
328 | reg = <0x7c0 0x40>; | ||
329 | msi-available-ranges = <0 0x100>; | ||
330 | interrupts = <0x43 0x8 | ||
331 | 0x4 0x8 | ||
332 | 0x51 0x8 | ||
333 | 0x52 0x8 | ||
334 | 0x56 0x8 | ||
335 | 0x57 0x8 | ||
336 | 0x58 0x8 | ||
337 | 0x59 0x8>; | ||
338 | interrupt-parent = < &ipic >; | ||
339 | }; | ||
325 | }; | 340 | }; |
326 | 341 | ||
327 | pci0: pci@e0008500 { | 342 | pci0: pci@e0008500 { |
diff --git a/arch/powerpc/boot/dts/mpc8349emitx.dts b/arch/powerpc/boot/dts/mpc8349emitx.dts index e3eeaeda9187..feeeb7f9d609 100644 --- a/arch/powerpc/boot/dts/mpc8349emitx.dts +++ b/arch/powerpc/boot/dts/mpc8349emitx.dts | |||
@@ -156,7 +156,7 @@ | |||
156 | interrupt-parent = <&ipic>; | 156 | interrupt-parent = <&ipic>; |
157 | interrupts = <39 0x8>; | 157 | interrupts = <39 0x8>; |
158 | phy_type = "ulpi"; | 158 | phy_type = "ulpi"; |
159 | port1; | 159 | port0; |
160 | }; | 160 | }; |
161 | 161 | ||
162 | usb@23000 { | 162 | usb@23000 { |
diff --git a/arch/powerpc/boot/dts/mpc834x_mds.dts b/arch/powerpc/boot/dts/mpc834x_mds.dts index a2553a6f9009..230febb9b72f 100644 --- a/arch/powerpc/boot/dts/mpc834x_mds.dts +++ b/arch/powerpc/boot/dts/mpc834x_mds.dts | |||
@@ -153,7 +153,7 @@ | |||
153 | interrupt-parent = <&ipic>; | 153 | interrupt-parent = <&ipic>; |
154 | interrupts = <39 0x8>; | 154 | interrupts = <39 0x8>; |
155 | phy_type = "ulpi"; | 155 | phy_type = "ulpi"; |
156 | port1; | 156 | port0; |
157 | }; | 157 | }; |
158 | /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */ | 158 | /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */ |
159 | usb@23000 { | 159 | usb@23000 { |
diff --git a/arch/powerpc/boot/dts/mpc8377_mds.dts b/arch/powerpc/boot/dts/mpc8377_mds.dts index 67bb372c9451..f32c2811c6d9 100644 --- a/arch/powerpc/boot/dts/mpc8377_mds.dts +++ b/arch/powerpc/boot/dts/mpc8377_mds.dts | |||
@@ -155,7 +155,7 @@ | |||
155 | }; | 155 | }; |
156 | 156 | ||
157 | sdhci@2e000 { | 157 | sdhci@2e000 { |
158 | compatible = "fsl,mpc8377-esdhc", "fsl,mpc8379-esdhc"; | 158 | compatible = "fsl,mpc8377-esdhc", "fsl,esdhc"; |
159 | reg = <0x2e000 0x1000>; | 159 | reg = <0x2e000 0x1000>; |
160 | interrupts = <42 0x8>; | 160 | interrupts = <42 0x8>; |
161 | interrupt-parent = <&ipic>; | 161 | interrupt-parent = <&ipic>; |
diff --git a/arch/powerpc/boot/dts/mpc8377_rdb.dts b/arch/powerpc/boot/dts/mpc8377_rdb.dts index 053339390c22..224b4f0704b8 100644 --- a/arch/powerpc/boot/dts/mpc8377_rdb.dts +++ b/arch/powerpc/boot/dts/mpc8377_rdb.dts | |||
@@ -169,7 +169,7 @@ | |||
169 | }; | 169 | }; |
170 | 170 | ||
171 | sdhci@2e000 { | 171 | sdhci@2e000 { |
172 | compatible = "fsl,mpc8377-esdhc", "fsl,mpc8379-esdhc"; | 172 | compatible = "fsl,mpc8377-esdhc", "fsl,esdhc"; |
173 | reg = <0x2e000 0x1000>; | 173 | reg = <0x2e000 0x1000>; |
174 | interrupts = <42 0x8>; | 174 | interrupts = <42 0x8>; |
175 | interrupt-parent = <&ipic>; | 175 | interrupt-parent = <&ipic>; |
diff --git a/arch/powerpc/boot/dts/mpc8378_mds.dts b/arch/powerpc/boot/dts/mpc8378_mds.dts index a955a577db81..f720ab9af30d 100644 --- a/arch/powerpc/boot/dts/mpc8378_mds.dts +++ b/arch/powerpc/boot/dts/mpc8378_mds.dts | |||
@@ -155,7 +155,7 @@ | |||
155 | }; | 155 | }; |
156 | 156 | ||
157 | sdhci@2e000 { | 157 | sdhci@2e000 { |
158 | compatible = "fsl,mpc8378-esdhc", "fsl,mpc8379-esdhc"; | 158 | compatible = "fsl,mpc8378-esdhc", "fsl,esdhc"; |
159 | reg = <0x2e000 0x1000>; | 159 | reg = <0x2e000 0x1000>; |
160 | interrupts = <42 0x8>; | 160 | interrupts = <42 0x8>; |
161 | interrupt-parent = <&ipic>; | 161 | interrupt-parent = <&ipic>; |
diff --git a/arch/powerpc/boot/dts/mpc8378_rdb.dts b/arch/powerpc/boot/dts/mpc8378_rdb.dts index 5d90e85704c3..474ea2fa3f86 100644 --- a/arch/powerpc/boot/dts/mpc8378_rdb.dts +++ b/arch/powerpc/boot/dts/mpc8378_rdb.dts | |||
@@ -169,7 +169,7 @@ | |||
169 | }; | 169 | }; |
170 | 170 | ||
171 | sdhci@2e000 { | 171 | sdhci@2e000 { |
172 | compatible = "fsl,mpc8378-esdhc", "fsl,mpc8379-esdhc"; | 172 | compatible = "fsl,mpc8378-esdhc", "fsl,esdhc"; |
173 | reg = <0x2e000 0x1000>; | 173 | reg = <0x2e000 0x1000>; |
174 | interrupts = <42 0x8>; | 174 | interrupts = <42 0x8>; |
175 | interrupt-parent = <&ipic>; | 175 | interrupt-parent = <&ipic>; |
diff --git a/arch/powerpc/boot/dts/mpc8379_mds.dts b/arch/powerpc/boot/dts/mpc8379_mds.dts index d266ddbfc28d..4fa221fd9bdc 100644 --- a/arch/powerpc/boot/dts/mpc8379_mds.dts +++ b/arch/powerpc/boot/dts/mpc8379_mds.dts | |||
@@ -153,7 +153,7 @@ | |||
153 | }; | 153 | }; |
154 | 154 | ||
155 | sdhci@2e000 { | 155 | sdhci@2e000 { |
156 | compatible = "fsl,mpc8379-esdhc"; | 156 | compatible = "fsl,mpc8379-esdhc", "fsl,esdhc"; |
157 | reg = <0x2e000 0x1000>; | 157 | reg = <0x2e000 0x1000>; |
158 | interrupts = <42 0x8>; | 158 | interrupts = <42 0x8>; |
159 | interrupt-parent = <&ipic>; | 159 | interrupt-parent = <&ipic>; |
diff --git a/arch/powerpc/boot/dts/mpc8379_rdb.dts b/arch/powerpc/boot/dts/mpc8379_rdb.dts index 98ae95bd18f4..d4838af8d379 100644 --- a/arch/powerpc/boot/dts/mpc8379_rdb.dts +++ b/arch/powerpc/boot/dts/mpc8379_rdb.dts | |||
@@ -167,7 +167,7 @@ | |||
167 | }; | 167 | }; |
168 | 168 | ||
169 | sdhci@2e000 { | 169 | sdhci@2e000 { |
170 | compatible = "fsl,mpc8379-esdhc"; | 170 | compatible = "fsl,mpc8379-esdhc", "fsl,esdhc"; |
171 | reg = <0x2e000 0x1000>; | 171 | reg = <0x2e000 0x1000>; |
172 | interrupts = <42 0x8>; | 172 | interrupts = <42 0x8>; |
173 | interrupt-parent = <&ipic>; | 173 | interrupt-parent = <&ipic>; |
diff --git a/arch/powerpc/boot/dts/mpc8569mds.dts b/arch/powerpc/boot/dts/mpc8569mds.dts index 39c2927503cf..a8dcb018c4a5 100644 --- a/arch/powerpc/boot/dts/mpc8569mds.dts +++ b/arch/powerpc/boot/dts/mpc8569mds.dts | |||
@@ -24,6 +24,8 @@ | |||
24 | ethernet1 = &enet1; | 24 | ethernet1 = &enet1; |
25 | ethernet2 = &enet2; | 25 | ethernet2 = &enet2; |
26 | ethernet3 = &enet3; | 26 | ethernet3 = &enet3; |
27 | ethernet5 = &enet5; | ||
28 | ethernet7 = &enet7; | ||
27 | pci1 = &pci1; | 29 | pci1 = &pci1; |
28 | rapidio0 = &rio0; | 30 | rapidio0 = &rio0; |
29 | }; | 31 | }; |
@@ -70,8 +72,30 @@ | |||
70 | #size-cells = <1>; | 72 | #size-cells = <1>; |
71 | compatible = "cfi-flash"; | 73 | compatible = "cfi-flash"; |
72 | reg = <0x0 0x0 0x02000000>; | 74 | reg = <0x0 0x0 0x02000000>; |
73 | bank-width = <2>; | 75 | bank-width = <1>; |
74 | device-width = <1>; | 76 | device-width = <1>; |
77 | partition@0 { | ||
78 | label = "ramdisk"; | ||
79 | reg = <0x00000000 0x01c00000>; | ||
80 | }; | ||
81 | partition@1c00000 { | ||
82 | label = "kernel"; | ||
83 | reg = <0x01c00000 0x002e0000>; | ||
84 | }; | ||
85 | partiton@1ee0000 { | ||
86 | label = "dtb"; | ||
87 | reg = <0x01ee0000 0x00020000>; | ||
88 | }; | ||
89 | partition@1f00000 { | ||
90 | label = "firmware"; | ||
91 | reg = <0x01f00000 0x00080000>; | ||
92 | read-only; | ||
93 | }; | ||
94 | partition@1f80000 { | ||
95 | label = "u-boot"; | ||
96 | reg = <0x01f80000 0x00080000>; | ||
97 | read-only; | ||
98 | }; | ||
75 | }; | 99 | }; |
76 | 100 | ||
77 | bcsr@1,0 { | 101 | bcsr@1,0 { |
@@ -466,6 +490,37 @@ | |||
466 | reg = <0x3>; | 490 | reg = <0x3>; |
467 | device_type = "ethernet-phy"; | 491 | device_type = "ethernet-phy"; |
468 | }; | 492 | }; |
493 | qe_phy5: ethernet-phy@04 { | ||
494 | interrupt-parent = <&mpic>; | ||
495 | reg = <0x04>; | ||
496 | device_type = "ethernet-phy"; | ||
497 | }; | ||
498 | qe_phy7: ethernet-phy@06 { | ||
499 | interrupt-parent = <&mpic>; | ||
500 | reg = <0x6>; | ||
501 | device_type = "ethernet-phy"; | ||
502 | }; | ||
503 | }; | ||
504 | mdio@3520 { | ||
505 | #address-cells = <1>; | ||
506 | #size-cells = <0>; | ||
507 | reg = <0x3520 0x18>; | ||
508 | compatible = "fsl,ucc-mdio"; | ||
509 | |||
510 | tbi0: tbi-phy@15 { | ||
511 | reg = <0x15>; | ||
512 | device_type = "tbi-phy"; | ||
513 | }; | ||
514 | }; | ||
515 | mdio@3720 { | ||
516 | #address-cells = <1>; | ||
517 | #size-cells = <0>; | ||
518 | reg = <0x3720 0x38>; | ||
519 | compatible = "fsl,ucc-mdio"; | ||
520 | tbi1: tbi-phy@17 { | ||
521 | reg = <0x17>; | ||
522 | device_type = "tbi-phy"; | ||
523 | }; | ||
469 | }; | 524 | }; |
470 | 525 | ||
471 | enet2: ucc@2200 { | 526 | enet2: ucc@2200 { |
@@ -513,6 +568,36 @@ | |||
513 | phy-connection-type = "rgmii-id"; | 568 | phy-connection-type = "rgmii-id"; |
514 | }; | 569 | }; |
515 | 570 | ||
571 | enet5: ucc@3400 { | ||
572 | device_type = "network"; | ||
573 | compatible = "ucc_geth"; | ||
574 | cell-index = <6>; | ||
575 | reg = <0x3400 0x200>; | ||
576 | interrupts = <41>; | ||
577 | interrupt-parent = <&qeic>; | ||
578 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
579 | rx-clock-name = "none"; | ||
580 | tx-clock-name = "none"; | ||
581 | tbi-handle = <&tbi0>; | ||
582 | phy-handle = <&qe_phy5>; | ||
583 | phy-connection-type = "sgmii"; | ||
584 | }; | ||
585 | |||
586 | enet7: ucc@3600 { | ||
587 | device_type = "network"; | ||
588 | compatible = "ucc_geth"; | ||
589 | cell-index = <8>; | ||
590 | reg = <0x3600 0x200>; | ||
591 | interrupts = <43>; | ||
592 | interrupt-parent = <&qeic>; | ||
593 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
594 | rx-clock-name = "none"; | ||
595 | tx-clock-name = "none"; | ||
596 | tbi-handle = <&tbi1>; | ||
597 | phy-handle = <&qe_phy7>; | ||
598 | phy-connection-type = "sgmii"; | ||
599 | }; | ||
600 | |||
516 | muram@10000 { | 601 | muram@10000 { |
517 | #address-cells = <1>; | 602 | #address-cells = <1>; |
518 | #size-cells = <1>; | 603 | #size-cells = <1>; |
diff --git a/arch/powerpc/boot/dts/pcm030.dts b/arch/powerpc/boot/dts/pcm030.dts index 895834713894..30bfdc04c6df 100644 --- a/arch/powerpc/boot/dts/pcm030.dts +++ b/arch/powerpc/boot/dts/pcm030.dts | |||
@@ -258,34 +258,16 @@ | |||
258 | compatible = "nxp,pcf8563"; | 258 | compatible = "nxp,pcf8563"; |
259 | reg = <0x51>; | 259 | reg = <0x51>; |
260 | }; | 260 | }; |
261 | /* FIXME: EEPROM */ | 261 | eeprom@52 { |
262 | compatible = "catalyst,24c32"; | ||
263 | reg = <0x52>; | ||
264 | }; | ||
262 | }; | 265 | }; |
263 | 266 | ||
264 | sram@8000 { | 267 | sram@8000 { |
265 | compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram"; | 268 | compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram"; |
266 | reg = <0x8000 0x4000>; | 269 | reg = <0x8000 0x4000>; |
267 | }; | 270 | }; |
268 | |||
269 | /* This is only an example device to show the usage of gpios. It maps all available | ||
270 | * gpios to the "gpio-provider" device. | ||
271 | */ | ||
272 | gpio { | ||
273 | compatible = "gpio-provider"; | ||
274 | |||
275 | /* mpc52xx exp.con patchfield */ | ||
276 | gpios = <&gpio_wkup 0 0 /* GPIO_WKUP_7 11d jp13-3 */ | ||
277 | &gpio_wkup 1 0 /* GPIO_WKUP_6 14c */ | ||
278 | &gpio_wkup 6 0 /* PSC2_4 43c x5-11 */ | ||
279 | &gpio_simple 2 0 /* IRDA_1 24c x7-6 set GPS_PORT_CONFIG[IRDA] = 0 */ | ||
280 | &gpio_simple 3 0 /* IRDA_0 x8-5 set GPS_PORT_CONFIG[IRDA] = 0 */ | ||
281 | &gpt2 0 0 /* timer2 12d x4-4 */ | ||
282 | &gpt3 0 0 /* timer3 13d x6-4 */ | ||
283 | &gpt4 0 0 /* timer4 61c x2-16 */ | ||
284 | &gpt5 0 0 /* timer5 44c x7-11 */ | ||
285 | &gpt6 0 0 /* timer6 60c x8-15 */ | ||
286 | &gpt7 0 0 /* timer7 36a x17-9 */ | ||
287 | >; | ||
288 | }; | ||
289 | }; | 271 | }; |
290 | 272 | ||
291 | pci@f0000d00 { | 273 | pci@f0000d00 { |
diff --git a/arch/powerpc/boot/dts/sbc8349.dts b/arch/powerpc/boot/dts/sbc8349.dts index 5fb6f6684b0e..2d9fa68f641c 100644 --- a/arch/powerpc/boot/dts/sbc8349.dts +++ b/arch/powerpc/boot/dts/sbc8349.dts | |||
@@ -144,7 +144,7 @@ | |||
144 | interrupt-parent = <&ipic>; | 144 | interrupt-parent = <&ipic>; |
145 | interrupts = <39 0x8>; | 145 | interrupts = <39 0x8>; |
146 | phy_type = "ulpi"; | 146 | phy_type = "ulpi"; |
147 | port1; | 147 | port0; |
148 | }; | 148 | }; |
149 | /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */ | 149 | /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */ |
150 | usb@23000 { | 150 | usb@23000 { |
diff --git a/arch/powerpc/boot/dts/xcalibur1501.dts b/arch/powerpc/boot/dts/xcalibur1501.dts new file mode 100644 index 000000000000..ac0a617b4299 --- /dev/null +++ b/arch/powerpc/boot/dts/xcalibur1501.dts | |||
@@ -0,0 +1,696 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2008 Extreme Engineering Solutions, Inc. | ||
3 | * Based on MPC8572DS device tree from Freescale Semiconductor, Inc. | ||
4 | * | ||
5 | * XCalibur1501 6U CompactPCI single-board computer based on MPC8572E | ||
6 | * | ||
7 | * This is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | */ | ||
11 | |||
12 | /dts-v1/; | ||
13 | / { | ||
14 | model = "xes,xcalibur1501"; | ||
15 | compatible = "xes,xcalibur1501", "xes,MPC8572"; | ||
16 | #address-cells = <2>; | ||
17 | #size-cells = <2>; | ||
18 | |||
19 | aliases { | ||
20 | ethernet0 = &enet0; | ||
21 | ethernet1 = &enet1; | ||
22 | ethernet2 = &enet2; | ||
23 | ethernet3 = &enet3; | ||
24 | serial0 = &serial0; | ||
25 | serial1 = &serial1; | ||
26 | pci2 = &pci2; | ||
27 | }; | ||
28 | |||
29 | cpus { | ||
30 | #address-cells = <1>; | ||
31 | #size-cells = <0>; | ||
32 | |||
33 | PowerPC,8572@0 { | ||
34 | device_type = "cpu"; | ||
35 | reg = <0x0>; | ||
36 | d-cache-line-size = <32>; // 32 bytes | ||
37 | i-cache-line-size = <32>; // 32 bytes | ||
38 | d-cache-size = <0x8000>; // L1, 32K | ||
39 | i-cache-size = <0x8000>; // L1, 32K | ||
40 | timebase-frequency = <0>; | ||
41 | bus-frequency = <0>; | ||
42 | clock-frequency = <0>; | ||
43 | next-level-cache = <&L2>; | ||
44 | }; | ||
45 | |||
46 | PowerPC,8572@1 { | ||
47 | device_type = "cpu"; | ||
48 | reg = <0x1>; | ||
49 | d-cache-line-size = <32>; // 32 bytes | ||
50 | i-cache-line-size = <32>; // 32 bytes | ||
51 | d-cache-size = <0x8000>; // L1, 32K | ||
52 | i-cache-size = <0x8000>; // L1, 32K | ||
53 | timebase-frequency = <0>; | ||
54 | bus-frequency = <0>; | ||
55 | clock-frequency = <0>; | ||
56 | next-level-cache = <&L2>; | ||
57 | }; | ||
58 | }; | ||
59 | |||
60 | memory { | ||
61 | device_type = "memory"; | ||
62 | reg = <0x0 0x0 0x0 0x0>; // Filled in by U-Boot | ||
63 | }; | ||
64 | |||
65 | localbus@ef005000 { | ||
66 | #address-cells = <2>; | ||
67 | #size-cells = <1>; | ||
68 | compatible = "fsl,mpc8572-elbc", "fsl,elbc", "simple-bus"; | ||
69 | reg = <0 0xef005000 0 0x1000>; | ||
70 | interrupts = <19 2>; | ||
71 | interrupt-parent = <&mpic>; | ||
72 | /* Local bus region mappings */ | ||
73 | ranges = <0 0 0 0xf8000000 0x8000000 /* CS0: Flash 1 */ | ||
74 | 1 0 0 0xf0000000 0x8000000 /* CS1: Flash 2 */ | ||
75 | 2 0 0 0xef800000 0x40000 /* CS2: NAND CE1 */ | ||
76 | 3 0 0 0xef840000 0x40000 /* CS3: NAND CE2 */ | ||
77 | 4 0 0 0xe9000000 0x100000>; /* CS4: USB */ | ||
78 | |||
79 | nor-boot@0,0 { | ||
80 | compatible = "amd,s29gl01gp", "cfi-flash"; | ||
81 | bank-width = <2>; | ||
82 | reg = <0 0 0x8000000>; /* 128MB */ | ||
83 | #address-cells = <1>; | ||
84 | #size-cells = <1>; | ||
85 | partition@0 { | ||
86 | label = "Primary user space"; | ||
87 | reg = <0x00000000 0x6f00000>; /* 111 MB */ | ||
88 | }; | ||
89 | partition@6f00000 { | ||
90 | label = "Primary kernel"; | ||
91 | reg = <0x6f00000 0x1000000>; /* 16 MB */ | ||
92 | }; | ||
93 | partition@7f00000 { | ||
94 | label = "Primary DTB"; | ||
95 | reg = <0x7f00000 0x40000>; /* 256 KB */ | ||
96 | }; | ||
97 | partition@7f40000 { | ||
98 | label = "Primary U-Boot environment"; | ||
99 | reg = <0x7f40000 0x40000>; /* 256 KB */ | ||
100 | }; | ||
101 | partition@7f80000 { | ||
102 | label = "Primary U-Boot"; | ||
103 | reg = <0x7f80000 0x80000>; /* 512 KB */ | ||
104 | read-only; | ||
105 | }; | ||
106 | }; | ||
107 | |||
108 | nor-alternate@1,0 { | ||
109 | compatible = "amd,s29gl01gp", "cfi-flash"; | ||
110 | bank-width = <2>; | ||
111 | //reg = <0xf0000000 0x08000000>; /* 128MB */ | ||
112 | reg = <1 0 0x8000000>; /* 128MB */ | ||
113 | #address-cells = <1>; | ||
114 | #size-cells = <1>; | ||
115 | partition@0 { | ||
116 | label = "Secondary user space"; | ||
117 | reg = <0x00000000 0x6f00000>; /* 111 MB */ | ||
118 | }; | ||
119 | partition@6f00000 { | ||
120 | label = "Secondary kernel"; | ||
121 | reg = <0x6f00000 0x1000000>; /* 16 MB */ | ||
122 | }; | ||
123 | partition@7f00000 { | ||
124 | label = "Secondary DTB"; | ||
125 | reg = <0x7f00000 0x40000>; /* 256 KB */ | ||
126 | }; | ||
127 | partition@7f40000 { | ||
128 | label = "Secondary U-Boot environment"; | ||
129 | reg = <0x7f40000 0x40000>; /* 256 KB */ | ||
130 | }; | ||
131 | partition@7f80000 { | ||
132 | label = "Secondary U-Boot"; | ||
133 | reg = <0x7f80000 0x80000>; /* 512 KB */ | ||
134 | read-only; | ||
135 | }; | ||
136 | }; | ||
137 | |||
138 | nand@2,0 { | ||
139 | #address-cells = <1>; | ||
140 | #size-cells = <1>; | ||
141 | /* | ||
142 | * Actual part could be ST Micro NAND08GW3B2A (1 GB), | ||
143 | * Micron MT29F8G08DAA (2x 512 MB), or Micron | ||
144 | * MT29F16G08FAA (2x 1 GB), depending on the build | ||
145 | * configuration | ||
146 | */ | ||
147 | compatible = "fsl,mpc8572-fcm-nand", | ||
148 | "fsl,elbc-fcm-nand"; | ||
149 | reg = <2 0 0x40000>; | ||
150 | /* U-Boot should fix this up if chip size > 1 GB */ | ||
151 | partition@0 { | ||
152 | label = "NAND Filesystem"; | ||
153 | reg = <0 0x40000000>; | ||
154 | }; | ||
155 | }; | ||
156 | |||
157 | usb@4,0 { | ||
158 | compatible = "nxp,usb-isp1761"; | ||
159 | reg = <4 0 0x100000>; | ||
160 | bus-width = <32>; | ||
161 | interrupt-parent = <&mpic>; | ||
162 | interrupts = <10 1>; | ||
163 | }; | ||
164 | }; | ||
165 | |||
166 | soc8572@ef000000 { | ||
167 | #address-cells = <1>; | ||
168 | #size-cells = <1>; | ||
169 | device_type = "soc"; | ||
170 | compatible = "fsl,mpc8572-immr", "simple-bus"; | ||
171 | ranges = <0x0 0 0xef000000 0x100000>; | ||
172 | bus-frequency = <0>; // Filled out by uboot. | ||
173 | |||
174 | ecm-law@0 { | ||
175 | compatible = "fsl,ecm-law"; | ||
176 | reg = <0x0 0x1000>; | ||
177 | fsl,num-laws = <12>; | ||
178 | }; | ||
179 | |||
180 | ecm@1000 { | ||
181 | compatible = "fsl,mpc8572-ecm", "fsl,ecm"; | ||
182 | reg = <0x1000 0x1000>; | ||
183 | interrupts = <17 2>; | ||
184 | interrupt-parent = <&mpic>; | ||
185 | }; | ||
186 | |||
187 | memory-controller@2000 { | ||
188 | compatible = "fsl,mpc8572-memory-controller"; | ||
189 | reg = <0x2000 0x1000>; | ||
190 | interrupt-parent = <&mpic>; | ||
191 | interrupts = <18 2>; | ||
192 | }; | ||
193 | |||
194 | memory-controller@6000 { | ||
195 | compatible = "fsl,mpc8572-memory-controller"; | ||
196 | reg = <0x6000 0x1000>; | ||
197 | interrupt-parent = <&mpic>; | ||
198 | interrupts = <18 2>; | ||
199 | }; | ||
200 | |||
201 | L2: l2-cache-controller@20000 { | ||
202 | compatible = "fsl,mpc8572-l2-cache-controller"; | ||
203 | reg = <0x20000 0x1000>; | ||
204 | cache-line-size = <32>; // 32 bytes | ||
205 | cache-size = <0x100000>; // L2, 1M | ||
206 | interrupt-parent = <&mpic>; | ||
207 | interrupts = <16 2>; | ||
208 | }; | ||
209 | |||
210 | i2c@3000 { | ||
211 | #address-cells = <1>; | ||
212 | #size-cells = <0>; | ||
213 | cell-index = <0>; | ||
214 | compatible = "fsl-i2c"; | ||
215 | reg = <0x3000 0x100>; | ||
216 | interrupts = <43 2>; | ||
217 | interrupt-parent = <&mpic>; | ||
218 | dfsrr; | ||
219 | |||
220 | temp-sensor@48 { | ||
221 | compatible = "dallas,ds1631", "dallas,ds1621"; | ||
222 | reg = <0x48>; | ||
223 | }; | ||
224 | |||
225 | temp-sensor@4c { | ||
226 | compatible = "adi,adt7461"; | ||
227 | reg = <0x4c>; | ||
228 | }; | ||
229 | |||
230 | cpu-supervisor@51 { | ||
231 | compatible = "dallas,ds4510"; | ||
232 | reg = <0x51>; | ||
233 | }; | ||
234 | |||
235 | eeprom@54 { | ||
236 | compatible = "atmel,at24c128b"; | ||
237 | reg = <0x54>; | ||
238 | }; | ||
239 | |||
240 | rtc@68 { | ||
241 | compatible = "stm,m41t00", | ||
242 | "dallas,ds1338"; | ||
243 | reg = <0x68>; | ||
244 | }; | ||
245 | |||
246 | pcie-switch@6a { | ||
247 | compatible = "plx,pex8648"; | ||
248 | reg = <0x6a>; | ||
249 | }; | ||
250 | |||
251 | /* On-board signals for VID, flash, serial */ | ||
252 | gpio1: gpio@18 { | ||
253 | compatible = "nxp,pca9557"; | ||
254 | reg = <0x18>; | ||
255 | #gpio-cells = <2>; | ||
256 | gpio-controller; | ||
257 | polarity = <0x00>; | ||
258 | }; | ||
259 | |||
260 | /* PMC0/XMC0 signals */ | ||
261 | gpio2: gpio@1c { | ||
262 | compatible = "nxp,pca9557"; | ||
263 | reg = <0x1c>; | ||
264 | #gpio-cells = <2>; | ||
265 | gpio-controller; | ||
266 | polarity = <0x00>; | ||
267 | }; | ||
268 | |||
269 | /* PMC1/XMC1 signals */ | ||
270 | gpio3: gpio@1d { | ||
271 | compatible = "nxp,pca9557"; | ||
272 | reg = <0x1d>; | ||
273 | #gpio-cells = <2>; | ||
274 | gpio-controller; | ||
275 | polarity = <0x00>; | ||
276 | }; | ||
277 | |||
278 | /* CompactPCI signals (sysen, GA[4:0]) */ | ||
279 | gpio4: gpio@1e { | ||
280 | compatible = "nxp,pca9557"; | ||
281 | reg = <0x1e>; | ||
282 | #gpio-cells = <2>; | ||
283 | gpio-controller; | ||
284 | polarity = <0x00>; | ||
285 | }; | ||
286 | |||
287 | /* CompactPCI J5 GPIO and FAL/DEG/PRST */ | ||
288 | gpio5: gpio@1f { | ||
289 | compatible = "nxp,pca9557"; | ||
290 | reg = <0x1f>; | ||
291 | #gpio-cells = <2>; | ||
292 | gpio-controller; | ||
293 | polarity = <0x00>; | ||
294 | }; | ||
295 | }; | ||
296 | |||
297 | i2c@3100 { | ||
298 | #address-cells = <1>; | ||
299 | #size-cells = <0>; | ||
300 | cell-index = <1>; | ||
301 | compatible = "fsl-i2c"; | ||
302 | reg = <0x3100 0x100>; | ||
303 | interrupts = <43 2>; | ||
304 | interrupt-parent = <&mpic>; | ||
305 | dfsrr; | ||
306 | }; | ||
307 | |||
308 | dma@c300 { | ||
309 | #address-cells = <1>; | ||
310 | #size-cells = <1>; | ||
311 | compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma"; | ||
312 | reg = <0xc300 0x4>; | ||
313 | ranges = <0x0 0xc100 0x200>; | ||
314 | cell-index = <1>; | ||
315 | dma-channel@0 { | ||
316 | compatible = "fsl,mpc8572-dma-channel", | ||
317 | "fsl,eloplus-dma-channel"; | ||
318 | reg = <0x0 0x80>; | ||
319 | cell-index = <0>; | ||
320 | interrupt-parent = <&mpic>; | ||
321 | interrupts = <76 2>; | ||
322 | }; | ||
323 | dma-channel@80 { | ||
324 | compatible = "fsl,mpc8572-dma-channel", | ||
325 | "fsl,eloplus-dma-channel"; | ||
326 | reg = <0x80 0x80>; | ||
327 | cell-index = <1>; | ||
328 | interrupt-parent = <&mpic>; | ||
329 | interrupts = <77 2>; | ||
330 | }; | ||
331 | dma-channel@100 { | ||
332 | compatible = "fsl,mpc8572-dma-channel", | ||
333 | "fsl,eloplus-dma-channel"; | ||
334 | reg = <0x100 0x80>; | ||
335 | cell-index = <2>; | ||
336 | interrupt-parent = <&mpic>; | ||
337 | interrupts = <78 2>; | ||
338 | }; | ||
339 | dma-channel@180 { | ||
340 | compatible = "fsl,mpc8572-dma-channel", | ||
341 | "fsl,eloplus-dma-channel"; | ||
342 | reg = <0x180 0x80>; | ||
343 | cell-index = <3>; | ||
344 | interrupt-parent = <&mpic>; | ||
345 | interrupts = <79 2>; | ||
346 | }; | ||
347 | }; | ||
348 | |||
349 | dma@21300 { | ||
350 | #address-cells = <1>; | ||
351 | #size-cells = <1>; | ||
352 | compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma"; | ||
353 | reg = <0x21300 0x4>; | ||
354 | ranges = <0x0 0x21100 0x200>; | ||
355 | cell-index = <0>; | ||
356 | dma-channel@0 { | ||
357 | compatible = "fsl,mpc8572-dma-channel", | ||
358 | "fsl,eloplus-dma-channel"; | ||
359 | reg = <0x0 0x80>; | ||
360 | cell-index = <0>; | ||
361 | interrupt-parent = <&mpic>; | ||
362 | interrupts = <20 2>; | ||
363 | }; | ||
364 | dma-channel@80 { | ||
365 | compatible = "fsl,mpc8572-dma-channel", | ||
366 | "fsl,eloplus-dma-channel"; | ||
367 | reg = <0x80 0x80>; | ||
368 | cell-index = <1>; | ||
369 | interrupt-parent = <&mpic>; | ||
370 | interrupts = <21 2>; | ||
371 | }; | ||
372 | dma-channel@100 { | ||
373 | compatible = "fsl,mpc8572-dma-channel", | ||
374 | "fsl,eloplus-dma-channel"; | ||
375 | reg = <0x100 0x80>; | ||
376 | cell-index = <2>; | ||
377 | interrupt-parent = <&mpic>; | ||
378 | interrupts = <22 2>; | ||
379 | }; | ||
380 | dma-channel@180 { | ||
381 | compatible = "fsl,mpc8572-dma-channel", | ||
382 | "fsl,eloplus-dma-channel"; | ||
383 | reg = <0x180 0x80>; | ||
384 | cell-index = <3>; | ||
385 | interrupt-parent = <&mpic>; | ||
386 | interrupts = <23 2>; | ||
387 | }; | ||
388 | }; | ||
389 | |||
390 | /* eTSEC 1 front panel 0 */ | ||
391 | enet0: ethernet@24000 { | ||
392 | #address-cells = <1>; | ||
393 | #size-cells = <1>; | ||
394 | cell-index = <0>; | ||
395 | device_type = "network"; | ||
396 | model = "eTSEC"; | ||
397 | compatible = "gianfar"; | ||
398 | reg = <0x24000 0x1000>; | ||
399 | ranges = <0x0 0x24000 0x1000>; | ||
400 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
401 | interrupts = <29 2 30 2 34 2>; | ||
402 | interrupt-parent = <&mpic>; | ||
403 | tbi-handle = <&tbi0>; | ||
404 | phy-handle = <&phy0>; | ||
405 | phy-connection-type = "sgmii"; | ||
406 | |||
407 | mdio@520 { | ||
408 | #address-cells = <1>; | ||
409 | #size-cells = <0>; | ||
410 | compatible = "fsl,gianfar-mdio"; | ||
411 | reg = <0x520 0x20>; | ||
412 | |||
413 | phy0: ethernet-phy@1 { | ||
414 | interrupt-parent = <&mpic>; | ||
415 | interrupts = <4 1>; | ||
416 | reg = <0x1>; | ||
417 | }; | ||
418 | phy1: ethernet-phy@2 { | ||
419 | interrupt-parent = <&mpic>; | ||
420 | interrupts = <4 1>; | ||
421 | reg = <0x2>; | ||
422 | }; | ||
423 | phy2: ethernet-phy@3 { | ||
424 | interrupt-parent = <&mpic>; | ||
425 | interrupts = <5 1>; | ||
426 | reg = <0x3>; | ||
427 | }; | ||
428 | phy3: ethernet-phy@4 { | ||
429 | interrupt-parent = <&mpic>; | ||
430 | interrupts = <5 1>; | ||
431 | reg = <0x4>; | ||
432 | }; | ||
433 | tbi0: tbi-phy@11 { | ||
434 | reg = <0x11>; | ||
435 | device_type = "tbi-phy"; | ||
436 | }; | ||
437 | }; | ||
438 | }; | ||
439 | |||
440 | /* eTSEC 2 front panel 1 */ | ||
441 | enet1: ethernet@25000 { | ||
442 | #address-cells = <1>; | ||
443 | #size-cells = <1>; | ||
444 | cell-index = <1>; | ||
445 | device_type = "network"; | ||
446 | model = "eTSEC"; | ||
447 | compatible = "gianfar"; | ||
448 | reg = <0x25000 0x1000>; | ||
449 | ranges = <0x0 0x25000 0x1000>; | ||
450 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
451 | interrupts = <35 2 36 2 40 2>; | ||
452 | interrupt-parent = <&mpic>; | ||
453 | tbi-handle = <&tbi1>; | ||
454 | phy-handle = <&phy1>; | ||
455 | phy-connection-type = "sgmii"; | ||
456 | |||
457 | mdio@520 { | ||
458 | #address-cells = <1>; | ||
459 | #size-cells = <0>; | ||
460 | compatible = "fsl,gianfar-tbi"; | ||
461 | reg = <0x520 0x20>; | ||
462 | |||
463 | tbi1: tbi-phy@11 { | ||
464 | reg = <0x11>; | ||
465 | device_type = "tbi-phy"; | ||
466 | }; | ||
467 | }; | ||
468 | }; | ||
469 | |||
470 | /* eTSEC 3 PICMG2.16 backplane port 0 */ | ||
471 | enet2: ethernet@26000 { | ||
472 | #address-cells = <1>; | ||
473 | #size-cells = <1>; | ||
474 | cell-index = <2>; | ||
475 | device_type = "network"; | ||
476 | model = "eTSEC"; | ||
477 | compatible = "gianfar"; | ||
478 | reg = <0x26000 0x1000>; | ||
479 | ranges = <0x0 0x26000 0x1000>; | ||
480 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
481 | interrupts = <31 2 32 2 33 2>; | ||
482 | interrupt-parent = <&mpic>; | ||
483 | tbi-handle = <&tbi2>; | ||
484 | phy-handle = <&phy2>; | ||
485 | phy-connection-type = "sgmii"; | ||
486 | |||
487 | mdio@520 { | ||
488 | #address-cells = <1>; | ||
489 | #size-cells = <0>; | ||
490 | compatible = "fsl,gianfar-tbi"; | ||
491 | reg = <0x520 0x20>; | ||
492 | |||
493 | tbi2: tbi-phy@11 { | ||
494 | reg = <0x11>; | ||
495 | device_type = "tbi-phy"; | ||
496 | }; | ||
497 | }; | ||
498 | }; | ||
499 | |||
500 | /* eTSEC 4 PICMG2.16 backplane port 1 */ | ||
501 | enet3: ethernet@27000 { | ||
502 | #address-cells = <1>; | ||
503 | #size-cells = <1>; | ||
504 | cell-index = <3>; | ||
505 | device_type = "network"; | ||
506 | model = "eTSEC"; | ||
507 | compatible = "gianfar"; | ||
508 | reg = <0x27000 0x1000>; | ||
509 | ranges = <0x0 0x27000 0x1000>; | ||
510 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
511 | interrupts = <37 2 38 2 39 2>; | ||
512 | interrupt-parent = <&mpic>; | ||
513 | tbi-handle = <&tbi3>; | ||
514 | phy-handle = <&phy3>; | ||
515 | phy-connection-type = "sgmii"; | ||
516 | |||
517 | mdio@520 { | ||
518 | #address-cells = <1>; | ||
519 | #size-cells = <0>; | ||
520 | compatible = "fsl,gianfar-tbi"; | ||
521 | reg = <0x520 0x20>; | ||
522 | |||
523 | tbi3: tbi-phy@11 { | ||
524 | reg = <0x11>; | ||
525 | device_type = "tbi-phy"; | ||
526 | }; | ||
527 | }; | ||
528 | }; | ||
529 | |||
530 | /* UART0 */ | ||
531 | serial0: serial@4500 { | ||
532 | cell-index = <0>; | ||
533 | device_type = "serial"; | ||
534 | compatible = "ns16550"; | ||
535 | reg = <0x4500 0x100>; | ||
536 | clock-frequency = <0>; | ||
537 | interrupts = <42 2>; | ||
538 | interrupt-parent = <&mpic>; | ||
539 | }; | ||
540 | |||
541 | /* UART1 */ | ||
542 | serial1: serial@4600 { | ||
543 | cell-index = <1>; | ||
544 | device_type = "serial"; | ||
545 | compatible = "ns16550"; | ||
546 | reg = <0x4600 0x100>; | ||
547 | clock-frequency = <0>; | ||
548 | interrupts = <42 2>; | ||
549 | interrupt-parent = <&mpic>; | ||
550 | }; | ||
551 | |||
552 | global-utilities@e0000 { //global utilities block | ||
553 | compatible = "fsl,mpc8572-guts"; | ||
554 | reg = <0xe0000 0x1000>; | ||
555 | fsl,has-rstcr; | ||
556 | }; | ||
557 | |||
558 | msi@41600 { | ||
559 | compatible = "fsl,mpc8572-msi", "fsl,mpic-msi"; | ||
560 | reg = <0x41600 0x80>; | ||
561 | msi-available-ranges = <0 0x100>; | ||
562 | interrupts = < | ||
563 | 0xe0 0 | ||
564 | 0xe1 0 | ||
565 | 0xe2 0 | ||
566 | 0xe3 0 | ||
567 | 0xe4 0 | ||
568 | 0xe5 0 | ||
569 | 0xe6 0 | ||
570 | 0xe7 0>; | ||
571 | interrupt-parent = <&mpic>; | ||
572 | }; | ||
573 | |||
574 | crypto@30000 { | ||
575 | compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2", | ||
576 | "fsl,sec2.1", "fsl,sec2.0"; | ||
577 | reg = <0x30000 0x10000>; | ||
578 | interrupts = <45 2 58 2>; | ||
579 | interrupt-parent = <&mpic>; | ||
580 | fsl,num-channels = <4>; | ||
581 | fsl,channel-fifo-len = <24>; | ||
582 | fsl,exec-units-mask = <0x9fe>; | ||
583 | fsl,descriptor-types-mask = <0x3ab0ebf>; | ||
584 | }; | ||
585 | |||
586 | mpic: pic@40000 { | ||
587 | interrupt-controller; | ||
588 | #address-cells = <0>; | ||
589 | #interrupt-cells = <2>; | ||
590 | reg = <0x40000 0x40000>; | ||
591 | compatible = "chrp,open-pic"; | ||
592 | device_type = "open-pic"; | ||
593 | }; | ||
594 | |||
595 | gpio0: gpio@f000 { | ||
596 | compatible = "fsl,mpc8572-gpio"; | ||
597 | reg = <0xf000 0x1000>; | ||
598 | interrupts = <47 2>; | ||
599 | interrupt-parent = <&mpic>; | ||
600 | #gpio-cells = <2>; | ||
601 | gpio-controller; | ||
602 | }; | ||
603 | |||
604 | gpio-leds { | ||
605 | compatible = "gpio-leds"; | ||
606 | |||
607 | heartbeat { | ||
608 | label = "Heartbeat"; | ||
609 | gpios = <&gpio0 4 1>; | ||
610 | linux,default-trigger = "heartbeat"; | ||
611 | }; | ||
612 | |||
613 | yellow { | ||
614 | label = "Yellow"; | ||
615 | gpios = <&gpio0 5 1>; | ||
616 | }; | ||
617 | |||
618 | red { | ||
619 | label = "Red"; | ||
620 | gpios = <&gpio0 6 1>; | ||
621 | }; | ||
622 | |||
623 | green { | ||
624 | label = "Green"; | ||
625 | gpios = <&gpio0 7 1>; | ||
626 | }; | ||
627 | }; | ||
628 | |||
629 | /* PME (pattern-matcher) */ | ||
630 | pme@10000 { | ||
631 | compatible = "fsl,mpc8572-pme", "pme8572"; | ||
632 | reg = <0x10000 0x5000>; | ||
633 | interrupts = <57 2 64 2 65 2 66 2 67 2>; | ||
634 | interrupt-parent = <&mpic>; | ||
635 | }; | ||
636 | |||
637 | tlu@2f000 { | ||
638 | compatible = "fsl,mpc8572-tlu", "fsl_tlu"; | ||
639 | reg = <0x2f000 0x1000>; | ||
640 | interupts = <61 2 >; | ||
641 | interrupt-parent = <&mpic>; | ||
642 | }; | ||
643 | |||
644 | tlu@15000 { | ||
645 | compatible = "fsl,mpc8572-tlu", "fsl_tlu"; | ||
646 | reg = <0x15000 0x1000>; | ||
647 | interupts = <75 2>; | ||
648 | interrupt-parent = <&mpic>; | ||
649 | }; | ||
650 | }; | ||
651 | |||
652 | /* | ||
653 | * PCI Express controller 3 @ ef008000 is not used. | ||
654 | * This would have been pci0 on other mpc85xx platforms. | ||
655 | * | ||
656 | * PCI Express controller 2 @ ef009000 is not used. | ||
657 | * This would have been pci1 on other mpc85xx platforms. | ||
658 | */ | ||
659 | |||
660 | /* PCI Express controller 1, wired to PEX8648 PCIe switch */ | ||
661 | pci2: pcie@ef00a000 { | ||
662 | compatible = "fsl,mpc8548-pcie"; | ||
663 | device_type = "pci"; | ||
664 | #interrupt-cells = <1>; | ||
665 | #size-cells = <2>; | ||
666 | #address-cells = <3>; | ||
667 | reg = <0 0xef00a000 0 0x1000>; | ||
668 | bus-range = <0 255>; | ||
669 | ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x40000000 | ||
670 | 0x1000000 0x0 0x00000000 0 0xe8000000 0x0 0x10000>; | ||
671 | clock-frequency = <33333333>; | ||
672 | interrupt-parent = <&mpic>; | ||
673 | interrupts = <26 2>; | ||
674 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; | ||
675 | interrupt-map = < | ||
676 | /* IDSEL 0x0 */ | ||
677 | 0x0 0x0 0x0 0x1 &mpic 0x0 0x1 | ||
678 | 0x0 0x0 0x0 0x2 &mpic 0x1 0x1 | ||
679 | 0x0 0x0 0x0 0x3 &mpic 0x2 0x1 | ||
680 | 0x0 0x0 0x0 0x4 &mpic 0x3 0x1 | ||
681 | >; | ||
682 | pcie@0 { | ||
683 | reg = <0x0 0x0 0x0 0x0 0x0>; | ||
684 | #size-cells = <2>; | ||
685 | #address-cells = <3>; | ||
686 | device_type = "pci"; | ||
687 | ranges = <0x2000000 0x0 0x80000000 | ||
688 | 0x2000000 0x0 0x80000000 | ||
689 | 0x0 0x40000000 | ||
690 | |||
691 | 0x1000000 0x0 0x0 | ||
692 | 0x1000000 0x0 0x0 | ||
693 | 0x0 0x100000>; | ||
694 | }; | ||
695 | }; | ||
696 | }; | ||
diff --git a/arch/powerpc/boot/dts/xpedite5200.dts b/arch/powerpc/boot/dts/xpedite5200.dts new file mode 100644 index 000000000000..a0cf53fbd55c --- /dev/null +++ b/arch/powerpc/boot/dts/xpedite5200.dts | |||
@@ -0,0 +1,466 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2009 Extreme Engineering Solutions, Inc. | ||
3 | * Based on TQM8548 device tree | ||
4 | * | ||
5 | * XPedite5200 PrPMC/XMC module based on MPC8548E | ||
6 | * | ||
7 | * This is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | */ | ||
11 | |||
12 | /dts-v1/; | ||
13 | |||
14 | / { | ||
15 | model = "xes,xpedite5200"; | ||
16 | compatible = "xes,xpedite5200", "xes,MPC8548"; | ||
17 | #address-cells = <1>; | ||
18 | #size-cells = <1>; | ||
19 | |||
20 | aliases { | ||
21 | ethernet0 = &enet0; | ||
22 | ethernet1 = &enet1; | ||
23 | ethernet2 = &enet2; | ||
24 | ethernet3 = &enet3; | ||
25 | |||
26 | serial0 = &serial0; | ||
27 | serial1 = &serial1; | ||
28 | pci0 = &pci0; | ||
29 | }; | ||
30 | |||
31 | cpus { | ||
32 | #address-cells = <1>; | ||
33 | #size-cells = <0>; | ||
34 | |||
35 | PowerPC,8548@0 { | ||
36 | device_type = "cpu"; | ||
37 | reg = <0>; | ||
38 | d-cache-line-size = <32>; // 32 bytes | ||
39 | i-cache-line-size = <32>; // 32 bytes | ||
40 | d-cache-size = <0x8000>; // L1, 32K | ||
41 | i-cache-size = <0x8000>; // L1, 32K | ||
42 | next-level-cache = <&L2>; | ||
43 | }; | ||
44 | }; | ||
45 | |||
46 | memory { | ||
47 | device_type = "memory"; | ||
48 | reg = <0x0 0x0>; // Filled in by U-Boot | ||
49 | }; | ||
50 | |||
51 | soc@ef000000 { | ||
52 | #address-cells = <1>; | ||
53 | #size-cells = <1>; | ||
54 | device_type = "soc"; | ||
55 | ranges = <0x0 0xef000000 0x100000>; | ||
56 | bus-frequency = <0>; | ||
57 | compatible = "fsl,mpc8548-immr", "simple-bus"; | ||
58 | |||
59 | ecm-law@0 { | ||
60 | compatible = "fsl,ecm-law"; | ||
61 | reg = <0x0 0x1000>; | ||
62 | fsl,num-laws = <12>; | ||
63 | }; | ||
64 | |||
65 | ecm@1000 { | ||
66 | compatible = "fsl,mpc8548-ecm", "fsl,ecm"; | ||
67 | reg = <0x1000 0x1000>; | ||
68 | interrupts = <17 2>; | ||
69 | interrupt-parent = <&mpic>; | ||
70 | }; | ||
71 | |||
72 | memory-controller@2000 { | ||
73 | compatible = "fsl,mpc8548-memory-controller"; | ||
74 | reg = <0x2000 0x1000>; | ||
75 | interrupt-parent = <&mpic>; | ||
76 | interrupts = <18 2>; | ||
77 | }; | ||
78 | |||
79 | L2: l2-cache-controller@20000 { | ||
80 | compatible = "fsl,mpc8548-l2-cache-controller"; | ||
81 | reg = <0x20000 0x1000>; | ||
82 | cache-line-size = <32>; // 32 bytes | ||
83 | cache-size = <0x80000>; // L2, 512K | ||
84 | interrupt-parent = <&mpic>; | ||
85 | interrupts = <16 2>; | ||
86 | }; | ||
87 | |||
88 | /* On-card I2C */ | ||
89 | i2c@3000 { | ||
90 | #address-cells = <1>; | ||
91 | #size-cells = <0>; | ||
92 | cell-index = <0>; | ||
93 | compatible = "fsl-i2c"; | ||
94 | reg = <0x3000 0x100>; | ||
95 | interrupts = <43 2>; | ||
96 | interrupt-parent = <&mpic>; | ||
97 | dfsrr; | ||
98 | |||
99 | /* | ||
100 | * Board GPIO: | ||
101 | * 0: BRD_CFG0 (1: P14 IO present) | ||
102 | * 1: BRD_CFG1 (1: FP ethernet present) | ||
103 | * 2: BRD_CFG2 (1: XMC IO present) | ||
104 | * 3: XMC root complex indicator | ||
105 | * 4: Flash boot device indicator | ||
106 | * 5: Flash write protect enable | ||
107 | * 6: PMC monarch indicator | ||
108 | * 7: PMC EREADY | ||
109 | */ | ||
110 | gpio1: gpio@18 { | ||
111 | compatible = "nxp,pca9556"; | ||
112 | reg = <0x18>; | ||
113 | #gpio-cells = <2>; | ||
114 | gpio-controller; | ||
115 | polarity = <0x00>; | ||
116 | }; | ||
117 | |||
118 | /* P14 GPIO */ | ||
119 | gpio2: gpio@19 { | ||
120 | compatible = "nxp,pca9556"; | ||
121 | reg = <0x19>; | ||
122 | #gpio-cells = <2>; | ||
123 | gpio-controller; | ||
124 | polarity = <0x00>; | ||
125 | }; | ||
126 | |||
127 | eeprom@50 { | ||
128 | compatible = "atmel,at24c16"; | ||
129 | reg = <0x50>; | ||
130 | }; | ||
131 | |||
132 | rtc@68 { | ||
133 | compatible = "stm,m41t00", | ||
134 | "dallas,ds1338"; | ||
135 | reg = <0x68>; | ||
136 | }; | ||
137 | |||
138 | dtt@48 { | ||
139 | compatible = "maxim,max1237"; | ||
140 | reg = <0x34>; | ||
141 | }; | ||
142 | }; | ||
143 | |||
144 | /* Off-card I2C */ | ||
145 | i2c@3100 { | ||
146 | #address-cells = <1>; | ||
147 | #size-cells = <0>; | ||
148 | cell-index = <1>; | ||
149 | compatible = "fsl-i2c"; | ||
150 | reg = <0x3100 0x100>; | ||
151 | interrupts = <43 2>; | ||
152 | interrupt-parent = <&mpic>; | ||
153 | dfsrr; | ||
154 | }; | ||
155 | |||
156 | dma@21300 { | ||
157 | #address-cells = <1>; | ||
158 | #size-cells = <1>; | ||
159 | compatible = "fsl,mpc8548-dma", "fsl,eloplus-dma"; | ||
160 | reg = <0x21300 0x4>; | ||
161 | ranges = <0x0 0x21100 0x200>; | ||
162 | cell-index = <0>; | ||
163 | dma-channel@0 { | ||
164 | compatible = "fsl,mpc8548-dma-channel", | ||
165 | "fsl,eloplus-dma-channel"; | ||
166 | reg = <0x0 0x80>; | ||
167 | cell-index = <0>; | ||
168 | interrupt-parent = <&mpic>; | ||
169 | interrupts = <20 2>; | ||
170 | }; | ||
171 | dma-channel@80 { | ||
172 | compatible = "fsl,mpc8548-dma-channel", | ||
173 | "fsl,eloplus-dma-channel"; | ||
174 | reg = <0x80 0x80>; | ||
175 | cell-index = <1>; | ||
176 | interrupt-parent = <&mpic>; | ||
177 | interrupts = <21 2>; | ||
178 | }; | ||
179 | dma-channel@100 { | ||
180 | compatible = "fsl,mpc8548-dma-channel", | ||
181 | "fsl,eloplus-dma-channel"; | ||
182 | reg = <0x100 0x80>; | ||
183 | cell-index = <2>; | ||
184 | interrupt-parent = <&mpic>; | ||
185 | interrupts = <22 2>; | ||
186 | }; | ||
187 | dma-channel@180 { | ||
188 | compatible = "fsl,mpc8548-dma-channel", | ||
189 | "fsl,eloplus-dma-channel"; | ||
190 | reg = <0x180 0x80>; | ||
191 | cell-index = <3>; | ||
192 | interrupt-parent = <&mpic>; | ||
193 | interrupts = <23 2>; | ||
194 | }; | ||
195 | }; | ||
196 | |||
197 | /* eTSEC1: Front panel port 0 */ | ||
198 | enet0: ethernet@24000 { | ||
199 | #address-cells = <1>; | ||
200 | #size-cells = <1>; | ||
201 | cell-index = <0>; | ||
202 | device_type = "network"; | ||
203 | model = "eTSEC"; | ||
204 | compatible = "gianfar"; | ||
205 | reg = <0x24000 0x1000>; | ||
206 | ranges = <0x0 0x24000 0x1000>; | ||
207 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
208 | interrupts = <29 2 30 2 34 2>; | ||
209 | interrupt-parent = <&mpic>; | ||
210 | tbi-handle = <&tbi0>; | ||
211 | phy-handle = <&phy0>; | ||
212 | |||
213 | mdio@520 { | ||
214 | #address-cells = <1>; | ||
215 | #size-cells = <0>; | ||
216 | compatible = "fsl,gianfar-mdio"; | ||
217 | reg = <0x520 0x20>; | ||
218 | |||
219 | phy0: ethernet-phy@1 { | ||
220 | interrupt-parent = <&mpic>; | ||
221 | interrupts = <8 1>; | ||
222 | reg = <0x1>; | ||
223 | }; | ||
224 | phy1: ethernet-phy@2 { | ||
225 | interrupt-parent = <&mpic>; | ||
226 | interrupts = <8 1>; | ||
227 | reg = <0x2>; | ||
228 | }; | ||
229 | phy2: ethernet-phy@3 { | ||
230 | interrupt-parent = <&mpic>; | ||
231 | interrupts = <8 1>; | ||
232 | reg = <0x3>; | ||
233 | }; | ||
234 | phy3: ethernet-phy@4 { | ||
235 | interrupt-parent = <&mpic>; | ||
236 | interrupts = <8 1>; | ||
237 | reg = <0x4>; | ||
238 | }; | ||
239 | tbi0: tbi-phy@11 { | ||
240 | reg = <0x11>; | ||
241 | device_type = "tbi-phy"; | ||
242 | }; | ||
243 | }; | ||
244 | }; | ||
245 | |||
246 | /* eTSEC2: Front panel port 1 */ | ||
247 | enet1: ethernet@25000 { | ||
248 | #address-cells = <1>; | ||
249 | #size-cells = <1>; | ||
250 | cell-index = <1>; | ||
251 | device_type = "network"; | ||
252 | model = "eTSEC"; | ||
253 | compatible = "gianfar"; | ||
254 | reg = <0x25000 0x1000>; | ||
255 | ranges = <0x0 0x25000 0x1000>; | ||
256 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
257 | interrupts = <35 2 36 2 40 2>; | ||
258 | interrupt-parent = <&mpic>; | ||
259 | tbi-handle = <&tbi1>; | ||
260 | phy-handle = <&phy1>; | ||
261 | |||
262 | mdio@520 { | ||
263 | #address-cells = <1>; | ||
264 | #size-cells = <0>; | ||
265 | compatible = "fsl,gianfar-tbi"; | ||
266 | reg = <0x520 0x20>; | ||
267 | |||
268 | tbi1: tbi-phy@11 { | ||
269 | reg = <0x11>; | ||
270 | device_type = "tbi-phy"; | ||
271 | }; | ||
272 | }; | ||
273 | }; | ||
274 | |||
275 | /* eTSEC3: Rear panel port 2 */ | ||
276 | enet2: ethernet@26000 { | ||
277 | #address-cells = <1>; | ||
278 | #size-cells = <1>; | ||
279 | cell-index = <2>; | ||
280 | device_type = "network"; | ||
281 | model = "eTSEC"; | ||
282 | compatible = "gianfar"; | ||
283 | reg = <0x26000 0x1000>; | ||
284 | ranges = <0x0 0x26000 0x1000>; | ||
285 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
286 | interrupts = <31 2 32 2 33 2>; | ||
287 | interrupt-parent = <&mpic>; | ||
288 | tbi-handle = <&tbi2>; | ||
289 | phy-handle = <&phy2>; | ||
290 | |||
291 | mdio@520 { | ||
292 | #address-cells = <1>; | ||
293 | #size-cells = <0>; | ||
294 | compatible = "fsl,gianfar-tbi"; | ||
295 | reg = <0x520 0x20>; | ||
296 | |||
297 | tbi2: tbi-phy@11 { | ||
298 | reg = <0x11>; | ||
299 | device_type = "tbi-phy"; | ||
300 | }; | ||
301 | }; | ||
302 | }; | ||
303 | |||
304 | /* eTSEC4: Rear panel port 3 */ | ||
305 | enet3: ethernet@27000 { | ||
306 | #address-cells = <1>; | ||
307 | #size-cells = <1>; | ||
308 | cell-index = <3>; | ||
309 | device_type = "network"; | ||
310 | model = "eTSEC"; | ||
311 | compatible = "gianfar"; | ||
312 | reg = <0x27000 0x1000>; | ||
313 | ranges = <0x0 0x27000 0x1000>; | ||
314 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
315 | interrupts = <37 2 38 2 39 2>; | ||
316 | interrupt-parent = <&mpic>; | ||
317 | tbi-handle = <&tbi3>; | ||
318 | phy-handle = <&phy3>; | ||
319 | |||
320 | mdio@520 { | ||
321 | #address-cells = <1>; | ||
322 | #size-cells = <0>; | ||
323 | compatible = "fsl,gianfar-tbi"; | ||
324 | reg = <0x520 0x20>; | ||
325 | |||
326 | tbi3: tbi-phy@11 { | ||
327 | reg = <0x11>; | ||
328 | device_type = "tbi-phy"; | ||
329 | }; | ||
330 | }; | ||
331 | }; | ||
332 | |||
333 | serial0: serial@4500 { | ||
334 | cell-index = <0>; | ||
335 | device_type = "serial"; | ||
336 | compatible = "ns16550"; | ||
337 | reg = <0x4500 0x100>; | ||
338 | clock-frequency = <0>; | ||
339 | current-speed = <115200>; | ||
340 | interrupts = <42 2>; | ||
341 | interrupt-parent = <&mpic>; | ||
342 | }; | ||
343 | |||
344 | serial1: serial@4600 { | ||
345 | cell-index = <1>; | ||
346 | device_type = "serial"; | ||
347 | compatible = "ns16550"; | ||
348 | reg = <0x4600 0x100>; | ||
349 | clock-frequency = <0>; | ||
350 | current-speed = <115200>; | ||
351 | interrupts = <42 2>; | ||
352 | interrupt-parent = <&mpic>; | ||
353 | }; | ||
354 | |||
355 | global-utilities@e0000 { // global utilities reg | ||
356 | compatible = "fsl,mpc8548-guts"; | ||
357 | reg = <0xe0000 0x1000>; | ||
358 | fsl,has-rstcr; | ||
359 | }; | ||
360 | |||
361 | mpic: pic@40000 { | ||
362 | interrupt-controller; | ||
363 | #address-cells = <0>; | ||
364 | #interrupt-cells = <2>; | ||
365 | reg = <0x40000 0x40000>; | ||
366 | compatible = "chrp,open-pic"; | ||
367 | device_type = "open-pic"; | ||
368 | }; | ||
369 | }; | ||
370 | |||
371 | localbus@ef005000 { | ||
372 | compatible = "fsl,mpc8548-localbus", "fsl,pq3-localbus", | ||
373 | "simple-bus"; | ||
374 | #address-cells = <2>; | ||
375 | #size-cells = <1>; | ||
376 | reg = <0xef005000 0x100>; // BRx, ORx, etc. | ||
377 | |||
378 | ranges = < | ||
379 | 0 0x0 0xfc000000 0x04000000 // NOR boot flash | ||
380 | 1 0x0 0xf8000000 0x04000000 // NOR expansion flash | ||
381 | 2 0x0 0xef800000 0x00010000 // NAND CE1 | ||
382 | 3 0x0 0xef840000 0x00010000 // NAND CE2 | ||
383 | >; | ||
384 | |||
385 | nor-boot@0,0 { | ||
386 | #address-cells = <1>; | ||
387 | #size-cells = <1>; | ||
388 | compatible = "cfi-flash"; | ||
389 | reg = <0 0x0 0x4000000>; | ||
390 | bank-width = <2>; | ||
391 | |||
392 | partition@0 { | ||
393 | label = "Primary OS"; | ||
394 | reg = <0x00000000 0x180000>; | ||
395 | }; | ||
396 | partition@180000 { | ||
397 | label = "Secondary OS"; | ||
398 | reg = <0x00180000 0x180000>; | ||
399 | }; | ||
400 | partition@300000 { | ||
401 | label = "User"; | ||
402 | reg = <0x00300000 0x3c80000>; | ||
403 | }; | ||
404 | partition@3f80000 { | ||
405 | label = "Boot firmware"; | ||
406 | reg = <0x03f80000 0x80000>; | ||
407 | }; | ||
408 | }; | ||
409 | |||
410 | nor-alternate@1,0 { | ||
411 | #address-cells = <1>; | ||
412 | #size-cells = <1>; | ||
413 | compatible = "cfi-flash"; | ||
414 | reg = <1 0x0 0x4000000>; | ||
415 | bank-width = <2>; | ||
416 | |||
417 | partition@0 { | ||
418 | label = "Filesystem"; | ||
419 | reg = <0x00000000 0x3f80000>; | ||
420 | }; | ||
421 | partition@3f80000 { | ||
422 | label = "Alternate boot firmware"; | ||
423 | reg = <0x03f80000 0x80000>; | ||
424 | }; | ||
425 | }; | ||
426 | |||
427 | nand@2,0 { | ||
428 | #address-cells = <1>; | ||
429 | #size-cells = <1>; | ||
430 | compatible = "xes,address-ctl-nand"; | ||
431 | reg = <2 0x0 0x10000>; | ||
432 | cle-line = <0x8>; /* CLE tied to A3 */ | ||
433 | ale-line = <0x10>; /* ALE tied to A4 */ | ||
434 | |||
435 | /* U-Boot should fix this up */ | ||
436 | partition@0 { | ||
437 | label = "NAND Filesystem"; | ||
438 | reg = <0 0x40000000>; | ||
439 | }; | ||
440 | }; | ||
441 | }; | ||
442 | |||
443 | /* PMC interface */ | ||
444 | pci0: pci@ef008000 { | ||
445 | #interrupt-cells = <1>; | ||
446 | #size-cells = <2>; | ||
447 | #address-cells = <3>; | ||
448 | compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci"; | ||
449 | device_type = "pci"; | ||
450 | reg = <0xef008000 0x1000>; | ||
451 | clock-frequency = <33333333>; | ||
452 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; | ||
453 | interrupt-map = < | ||
454 | /* IDSEL */ | ||
455 | 0xe000 0 0 1 &mpic 2 1 | ||
456 | 0xe000 0 0 2 &mpic 3 1>; | ||
457 | |||
458 | interrupt-parent = <&mpic>; | ||
459 | interrupts = <24 2>; | ||
460 | bus-range = <0 0>; | ||
461 | ranges = <0x02000000 0 0x80000000 0x80000000 0 0x40000000 | ||
462 | 0x01000000 0 0x00000000 0xe8000000 0 0x00800000>; | ||
463 | }; | ||
464 | |||
465 | /* XMC PCIe is not yet enabled in U-Boot on XPedite5200 */ | ||
466 | }; | ||
diff --git a/arch/powerpc/boot/dts/xpedite5200_xmon.dts b/arch/powerpc/boot/dts/xpedite5200_xmon.dts new file mode 100644 index 000000000000..c5b29752651a --- /dev/null +++ b/arch/powerpc/boot/dts/xpedite5200_xmon.dts | |||
@@ -0,0 +1,506 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2009 Extreme Engineering Solutions, Inc. | ||
3 | * Based on TQM8548 device tree | ||
4 | * | ||
5 | * XPedite5200 PrPMC/XMC module based on MPC8548E. This dts is for the | ||
6 | * xMon boot loader memory map which differs from U-Boot's. | ||
7 | * | ||
8 | * This is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | /dts-v1/; | ||
14 | |||
15 | / { | ||
16 | model = "xes,xpedite5200"; | ||
17 | compatible = "xes,xpedite5200", "xes,MPC8548"; | ||
18 | #address-cells = <1>; | ||
19 | #size-cells = <1>; | ||
20 | form-factor = "PMC/XMC"; | ||
21 | boot-bank = <0x0>; | ||
22 | |||
23 | aliases { | ||
24 | ethernet0 = &enet0; | ||
25 | ethernet1 = &enet1; | ||
26 | ethernet2 = &enet2; | ||
27 | ethernet3 = &enet3; | ||
28 | |||
29 | serial0 = &serial0; | ||
30 | serial1 = &serial1; | ||
31 | pci0 = &pci0; | ||
32 | pci1 = &pci1; | ||
33 | }; | ||
34 | |||
35 | cpus { | ||
36 | #address-cells = <1>; | ||
37 | #size-cells = <0>; | ||
38 | |||
39 | PowerPC,8548@0 { | ||
40 | device_type = "cpu"; | ||
41 | reg = <0>; | ||
42 | d-cache-line-size = <32>; // 32 bytes | ||
43 | i-cache-line-size = <32>; // 32 bytes | ||
44 | d-cache-size = <0x8000>; // L1, 32K | ||
45 | i-cache-size = <0x8000>; // L1, 32K | ||
46 | next-level-cache = <&L2>; | ||
47 | }; | ||
48 | }; | ||
49 | |||
50 | memory { | ||
51 | device_type = "memory"; | ||
52 | reg = <0x0 0x0>; // Filled in by boot loader | ||
53 | }; | ||
54 | |||
55 | soc@ef000000 { | ||
56 | #address-cells = <1>; | ||
57 | #size-cells = <1>; | ||
58 | device_type = "soc"; | ||
59 | ranges = <0x0 0xef000000 0x100000>; | ||
60 | bus-frequency = <0>; | ||
61 | compatible = "fsl,mpc8548-immr", "simple-bus"; | ||
62 | |||
63 | ecm-law@0 { | ||
64 | compatible = "fsl,ecm-law"; | ||
65 | reg = <0x0 0x1000>; | ||
66 | fsl,num-laws = <12>; | ||
67 | }; | ||
68 | |||
69 | ecm@1000 { | ||
70 | compatible = "fsl,mpc8548-ecm", "fsl,ecm"; | ||
71 | reg = <0x1000 0x1000>; | ||
72 | interrupts = <17 2>; | ||
73 | interrupt-parent = <&mpic>; | ||
74 | }; | ||
75 | |||
76 | memory-controller@2000 { | ||
77 | compatible = "fsl,mpc8548-memory-controller"; | ||
78 | reg = <0x2000 0x1000>; | ||
79 | interrupt-parent = <&mpic>; | ||
80 | interrupts = <18 2>; | ||
81 | }; | ||
82 | |||
83 | L2: l2-cache-controller@20000 { | ||
84 | compatible = "fsl,mpc8548-l2-cache-controller"; | ||
85 | reg = <0x20000 0x1000>; | ||
86 | cache-line-size = <32>; // 32 bytes | ||
87 | cache-size = <0x80000>; // L2, 512K | ||
88 | interrupt-parent = <&mpic>; | ||
89 | interrupts = <16 2>; | ||
90 | }; | ||
91 | |||
92 | /* On-card I2C */ | ||
93 | i2c@3000 { | ||
94 | #address-cells = <1>; | ||
95 | #size-cells = <0>; | ||
96 | cell-index = <0>; | ||
97 | compatible = "fsl-i2c"; | ||
98 | reg = <0x3000 0x100>; | ||
99 | interrupts = <43 2>; | ||
100 | interrupt-parent = <&mpic>; | ||
101 | dfsrr; | ||
102 | |||
103 | /* | ||
104 | * Board GPIO: | ||
105 | * 0: BRD_CFG0 (1: P14 IO present) | ||
106 | * 1: BRD_CFG1 (1: FP ethernet present) | ||
107 | * 2: BRD_CFG2 (1: XMC IO present) | ||
108 | * 3: XMC root complex indicator | ||
109 | * 4: Flash boot device indicator | ||
110 | * 5: Flash write protect enable | ||
111 | * 6: PMC monarch indicator | ||
112 | * 7: PMC EREADY | ||
113 | */ | ||
114 | gpio1: gpio@18 { | ||
115 | compatible = "nxp,pca9556"; | ||
116 | reg = <0x18>; | ||
117 | #gpio-cells = <2>; | ||
118 | gpio-controller; | ||
119 | polarity = <0x00>; | ||
120 | }; | ||
121 | |||
122 | /* P14 GPIO */ | ||
123 | gpio2: gpio@19 { | ||
124 | compatible = "nxp,pca9556"; | ||
125 | reg = <0x19>; | ||
126 | #gpio-cells = <2>; | ||
127 | gpio-controller; | ||
128 | polarity = <0x00>; | ||
129 | }; | ||
130 | |||
131 | eeprom@50 { | ||
132 | compatible = "atmel,at24c16"; | ||
133 | reg = <0x50>; | ||
134 | }; | ||
135 | |||
136 | rtc@68 { | ||
137 | compatible = "stm,m41t00", | ||
138 | "dallas,ds1338"; | ||
139 | reg = <0x68>; | ||
140 | }; | ||
141 | |||
142 | dtt@48 { | ||
143 | compatible = "maxim,max1237"; | ||
144 | reg = <0x34>; | ||
145 | }; | ||
146 | }; | ||
147 | |||
148 | /* Off-card I2C */ | ||
149 | i2c@3100 { | ||
150 | #address-cells = <1>; | ||
151 | #size-cells = <0>; | ||
152 | cell-index = <1>; | ||
153 | compatible = "fsl-i2c"; | ||
154 | reg = <0x3100 0x100>; | ||
155 | interrupts = <43 2>; | ||
156 | interrupt-parent = <&mpic>; | ||
157 | dfsrr; | ||
158 | }; | ||
159 | |||
160 | dma@21300 { | ||
161 | #address-cells = <1>; | ||
162 | #size-cells = <1>; | ||
163 | compatible = "fsl,mpc8548-dma", "fsl,eloplus-dma"; | ||
164 | reg = <0x21300 0x4>; | ||
165 | ranges = <0x0 0x21100 0x200>; | ||
166 | cell-index = <0>; | ||
167 | dma-channel@0 { | ||
168 | compatible = "fsl,mpc8548-dma-channel", | ||
169 | "fsl,eloplus-dma-channel"; | ||
170 | reg = <0x0 0x80>; | ||
171 | cell-index = <0>; | ||
172 | interrupt-parent = <&mpic>; | ||
173 | interrupts = <20 2>; | ||
174 | }; | ||
175 | dma-channel@80 { | ||
176 | compatible = "fsl,mpc8548-dma-channel", | ||
177 | "fsl,eloplus-dma-channel"; | ||
178 | reg = <0x80 0x80>; | ||
179 | cell-index = <1>; | ||
180 | interrupt-parent = <&mpic>; | ||
181 | interrupts = <21 2>; | ||
182 | }; | ||
183 | dma-channel@100 { | ||
184 | compatible = "fsl,mpc8548-dma-channel", | ||
185 | "fsl,eloplus-dma-channel"; | ||
186 | reg = <0x100 0x80>; | ||
187 | cell-index = <2>; | ||
188 | interrupt-parent = <&mpic>; | ||
189 | interrupts = <22 2>; | ||
190 | }; | ||
191 | dma-channel@180 { | ||
192 | compatible = "fsl,mpc8548-dma-channel", | ||
193 | "fsl,eloplus-dma-channel"; | ||
194 | reg = <0x180 0x80>; | ||
195 | cell-index = <3>; | ||
196 | interrupt-parent = <&mpic>; | ||
197 | interrupts = <23 2>; | ||
198 | }; | ||
199 | }; | ||
200 | |||
201 | /* eTSEC1: Front panel port 0 */ | ||
202 | enet0: ethernet@24000 { | ||
203 | #address-cells = <1>; | ||
204 | #size-cells = <1>; | ||
205 | cell-index = <0>; | ||
206 | device_type = "network"; | ||
207 | model = "eTSEC"; | ||
208 | compatible = "gianfar"; | ||
209 | reg = <0x24000 0x1000>; | ||
210 | ranges = <0x0 0x24000 0x1000>; | ||
211 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
212 | interrupts = <29 2 30 2 34 2>; | ||
213 | interrupt-parent = <&mpic>; | ||
214 | tbi-handle = <&tbi0>; | ||
215 | phy-handle = <&phy0>; | ||
216 | |||
217 | mdio@520 { | ||
218 | #address-cells = <1>; | ||
219 | #size-cells = <0>; | ||
220 | compatible = "fsl,gianfar-mdio"; | ||
221 | reg = <0x520 0x20>; | ||
222 | |||
223 | phy0: ethernet-phy@1 { | ||
224 | interrupt-parent = <&mpic>; | ||
225 | interrupts = <8 1>; | ||
226 | reg = <0x1>; | ||
227 | }; | ||
228 | phy1: ethernet-phy@2 { | ||
229 | interrupt-parent = <&mpic>; | ||
230 | interrupts = <8 1>; | ||
231 | reg = <0x2>; | ||
232 | }; | ||
233 | phy2: ethernet-phy@3 { | ||
234 | interrupt-parent = <&mpic>; | ||
235 | interrupts = <8 1>; | ||
236 | reg = <0x3>; | ||
237 | }; | ||
238 | phy3: ethernet-phy@4 { | ||
239 | interrupt-parent = <&mpic>; | ||
240 | interrupts = <8 1>; | ||
241 | reg = <0x4>; | ||
242 | }; | ||
243 | tbi0: tbi-phy@11 { | ||
244 | reg = <0x11>; | ||
245 | device_type = "tbi-phy"; | ||
246 | }; | ||
247 | }; | ||
248 | }; | ||
249 | |||
250 | /* eTSEC2: Front panel port 1 */ | ||
251 | enet1: ethernet@25000 { | ||
252 | #address-cells = <1>; | ||
253 | #size-cells = <1>; | ||
254 | cell-index = <1>; | ||
255 | device_type = "network"; | ||
256 | model = "eTSEC"; | ||
257 | compatible = "gianfar"; | ||
258 | reg = <0x25000 0x1000>; | ||
259 | ranges = <0x0 0x25000 0x1000>; | ||
260 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
261 | interrupts = <35 2 36 2 40 2>; | ||
262 | interrupt-parent = <&mpic>; | ||
263 | tbi-handle = <&tbi1>; | ||
264 | phy-handle = <&phy1>; | ||
265 | |||
266 | mdio@520 { | ||
267 | #address-cells = <1>; | ||
268 | #size-cells = <0>; | ||
269 | compatible = "fsl,gianfar-tbi"; | ||
270 | reg = <0x520 0x20>; | ||
271 | |||
272 | tbi1: tbi-phy@11 { | ||
273 | reg = <0x11>; | ||
274 | device_type = "tbi-phy"; | ||
275 | }; | ||
276 | }; | ||
277 | }; | ||
278 | |||
279 | /* eTSEC3: Rear panel port 2 */ | ||
280 | enet2: ethernet@26000 { | ||
281 | #address-cells = <1>; | ||
282 | #size-cells = <1>; | ||
283 | cell-index = <2>; | ||
284 | device_type = "network"; | ||
285 | model = "eTSEC"; | ||
286 | compatible = "gianfar"; | ||
287 | reg = <0x26000 0x1000>; | ||
288 | ranges = <0x0 0x26000 0x1000>; | ||
289 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
290 | interrupts = <31 2 32 2 33 2>; | ||
291 | interrupt-parent = <&mpic>; | ||
292 | tbi-handle = <&tbi2>; | ||
293 | phy-handle = <&phy2>; | ||
294 | |||
295 | mdio@520 { | ||
296 | #address-cells = <1>; | ||
297 | #size-cells = <0>; | ||
298 | compatible = "fsl,gianfar-tbi"; | ||
299 | reg = <0x520 0x20>; | ||
300 | |||
301 | tbi2: tbi-phy@11 { | ||
302 | reg = <0x11>; | ||
303 | device_type = "tbi-phy"; | ||
304 | }; | ||
305 | }; | ||
306 | }; | ||
307 | |||
308 | /* eTSEC4: Rear panel port 3 */ | ||
309 | enet3: ethernet@27000 { | ||
310 | #address-cells = <1>; | ||
311 | #size-cells = <1>; | ||
312 | cell-index = <3>; | ||
313 | device_type = "network"; | ||
314 | model = "eTSEC"; | ||
315 | compatible = "gianfar"; | ||
316 | reg = <0x27000 0x1000>; | ||
317 | ranges = <0x0 0x27000 0x1000>; | ||
318 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
319 | interrupts = <37 2 38 2 39 2>; | ||
320 | interrupt-parent = <&mpic>; | ||
321 | tbi-handle = <&tbi3>; | ||
322 | phy-handle = <&phy3>; | ||
323 | |||
324 | mdio@520 { | ||
325 | #address-cells = <1>; | ||
326 | #size-cells = <0>; | ||
327 | compatible = "fsl,gianfar-tbi"; | ||
328 | reg = <0x520 0x20>; | ||
329 | |||
330 | tbi3: tbi-phy@11 { | ||
331 | reg = <0x11>; | ||
332 | device_type = "tbi-phy"; | ||
333 | }; | ||
334 | }; | ||
335 | }; | ||
336 | |||
337 | serial0: serial@4500 { | ||
338 | cell-index = <0>; | ||
339 | device_type = "serial"; | ||
340 | compatible = "ns16550"; | ||
341 | reg = <0x4500 0x100>; | ||
342 | clock-frequency = <0>; | ||
343 | current-speed = <9600>; | ||
344 | interrupts = <42 2>; | ||
345 | interrupt-parent = <&mpic>; | ||
346 | }; | ||
347 | |||
348 | serial1: serial@4600 { | ||
349 | cell-index = <1>; | ||
350 | device_type = "serial"; | ||
351 | compatible = "ns16550"; | ||
352 | reg = <0x4600 0x100>; | ||
353 | clock-frequency = <0>; | ||
354 | current-speed = <9600>; | ||
355 | interrupts = <42 2>; | ||
356 | interrupt-parent = <&mpic>; | ||
357 | }; | ||
358 | |||
359 | global-utilities@e0000 { // global utilities reg | ||
360 | compatible = "fsl,mpc8548-guts"; | ||
361 | reg = <0xe0000 0x1000>; | ||
362 | fsl,has-rstcr; | ||
363 | }; | ||
364 | |||
365 | mpic: pic@40000 { | ||
366 | interrupt-controller; | ||
367 | #address-cells = <0>; | ||
368 | #interrupt-cells = <2>; | ||
369 | reg = <0x40000 0x40000>; | ||
370 | compatible = "chrp,open-pic"; | ||
371 | device_type = "open-pic"; | ||
372 | }; | ||
373 | }; | ||
374 | |||
375 | localbus@ef005000 { | ||
376 | compatible = "fsl,mpc8548-localbus", "fsl,pq3-localbus", | ||
377 | "simple-bus"; | ||
378 | #address-cells = <2>; | ||
379 | #size-cells = <1>; | ||
380 | reg = <0xef005000 0x100>; // BRx, ORx, etc. | ||
381 | |||
382 | ranges = < | ||
383 | 0 0x0 0xf8000000 0x08000000 // NOR boot flash | ||
384 | 1 0x0 0xf0000000 0x08000000 // NOR expansion flash | ||
385 | 2 0x0 0xe8000000 0x00010000 // NAND CE1 | ||
386 | 3 0x0 0xe8010000 0x00010000 // NAND CE2 | ||
387 | >; | ||
388 | |||
389 | nor-boot@0,0 { | ||
390 | #address-cells = <1>; | ||
391 | #size-cells = <1>; | ||
392 | compatible = "cfi-flash"; | ||
393 | reg = <0 0x0 0x4000000>; | ||
394 | bank-width = <2>; | ||
395 | |||
396 | partition@0 { | ||
397 | label = "Primary OS"; | ||
398 | reg = <0x00000000 0x180000>; | ||
399 | }; | ||
400 | partition@180000 { | ||
401 | label = "Secondary OS"; | ||
402 | reg = <0x00180000 0x180000>; | ||
403 | }; | ||
404 | partition@300000 { | ||
405 | label = "User"; | ||
406 | reg = <0x00300000 0x3c80000>; | ||
407 | }; | ||
408 | partition@3f80000 { | ||
409 | label = "Boot firmware"; | ||
410 | reg = <0x03f80000 0x80000>; | ||
411 | }; | ||
412 | }; | ||
413 | |||
414 | nor-alternate@1,0 { | ||
415 | #address-cells = <1>; | ||
416 | #size-cells = <1>; | ||
417 | compatible = "cfi-flash"; | ||
418 | reg = <1 0x0 0x4000000>; | ||
419 | bank-width = <2>; | ||
420 | |||
421 | partition@0 { | ||
422 | label = "Filesystem"; | ||
423 | reg = <0x00000000 0x3f80000>; | ||
424 | }; | ||
425 | partition@3f80000 { | ||
426 | label = "Alternate boot firmware"; | ||
427 | reg = <0x03f80000 0x80000>; | ||
428 | }; | ||
429 | }; | ||
430 | |||
431 | nand@2,0 { | ||
432 | #address-cells = <1>; | ||
433 | #size-cells = <1>; | ||
434 | compatible = "xes,address-ctl-nand"; | ||
435 | reg = <2 0x0 0x10000>; | ||
436 | cle-line = <0x8>; /* CLE tied to A3 */ | ||
437 | ale-line = <0x10>; /* ALE tied to A4 */ | ||
438 | |||
439 | partition@0 { | ||
440 | label = "NAND Filesystem"; | ||
441 | reg = <0 0x40000000>; | ||
442 | }; | ||
443 | }; | ||
444 | }; | ||
445 | |||
446 | /* PMC interface */ | ||
447 | pci0: pci@ef008000 { | ||
448 | #interrupt-cells = <1>; | ||
449 | #size-cells = <2>; | ||
450 | #address-cells = <3>; | ||
451 | compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci"; | ||
452 | device_type = "pci"; | ||
453 | reg = <0xef008000 0x1000>; | ||
454 | clock-frequency = <33333333>; | ||
455 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; | ||
456 | interrupt-map = < | ||
457 | /* IDSEL */ | ||
458 | 0xe000 0 0 1 &mpic 2 1 | ||
459 | 0xe000 0 0 2 &mpic 3 1>; | ||
460 | |||
461 | interrupt-parent = <&mpic>; | ||
462 | interrupts = <24 2>; | ||
463 | bus-range = <0 0>; | ||
464 | ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000 | ||
465 | 0x01000000 0 0x00000000 0xd0000000 0 0x01000000>; | ||
466 | }; | ||
467 | |||
468 | /* XMC PCIe */ | ||
469 | pci1: pcie@ef00a000 { | ||
470 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; | ||
471 | interrupt-map = < | ||
472 | /* IDSEL 0x0 */ | ||
473 | 0x00000 0 0 1 &mpic 0 1 | ||
474 | 0x00000 0 0 2 &mpic 1 1 | ||
475 | 0x00000 0 0 3 &mpic 2 1 | ||
476 | 0x00000 0 0 4 &mpic 3 1>; | ||
477 | |||
478 | interrupt-parent = <&mpic>; | ||
479 | interrupts = <26 2>; | ||
480 | bus-range = <0 0xff>; | ||
481 | ranges = <0x02000000 0 0xa0000000 0xa0000000 0 0x20000000 | ||
482 | 0x01000000 0 0x00000000 0xd1000000 0 0x01000000>; | ||
483 | clock-frequency = <33333333>; | ||
484 | #interrupt-cells = <1>; | ||
485 | #size-cells = <2>; | ||
486 | #address-cells = <3>; | ||
487 | reg = <0xef00a000 0x1000>; | ||
488 | compatible = "fsl,mpc8548-pcie"; | ||
489 | device_type = "pci"; | ||
490 | pcie@0 { | ||
491 | reg = <0 0 0 0 0>; | ||
492 | #size-cells = <2>; | ||
493 | #address-cells = <3>; | ||
494 | device_type = "pci"; | ||
495 | ranges = <0x02000000 0 0xc0000000 0x02000000 0 | ||
496 | 0xc0000000 0 0x20000000 | ||
497 | 0x01000000 0 0x00000000 0x01000000 0 | ||
498 | 0x00000000 0 0x08000000>; | ||
499 | }; | ||
500 | }; | ||
501 | |||
502 | /* Needed for dtbImage boot wrapper compatibility */ | ||
503 | chosen { | ||
504 | linux,stdout-path = &serial0; | ||
505 | }; | ||
506 | }; | ||
diff --git a/arch/powerpc/boot/dts/xpedite5301.dts b/arch/powerpc/boot/dts/xpedite5301.dts new file mode 100644 index 000000000000..db7faf5ebb39 --- /dev/null +++ b/arch/powerpc/boot/dts/xpedite5301.dts | |||
@@ -0,0 +1,640 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2008 Extreme Engineering Solutions, Inc. | ||
3 | * Based on MPC8572DS device tree from Freescale Semiconductor, Inc. | ||
4 | * | ||
5 | * XPedite5301 PMC/XMC module based on MPC8572E | ||
6 | * | ||
7 | * This is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | */ | ||
11 | |||
12 | /dts-v1/; | ||
13 | / { | ||
14 | model = "xes,xpedite5301"; | ||
15 | compatible = "xes,xpedite5301", "xes,MPC8572"; | ||
16 | #address-cells = <2>; | ||
17 | #size-cells = <2>; | ||
18 | form-factor = "PMC/XMC"; | ||
19 | boot-bank = <0x0>; /* 0: Primary flash, 1: Secondary flash */ | ||
20 | |||
21 | aliases { | ||
22 | ethernet0 = &enet0; | ||
23 | ethernet1 = &enet1; | ||
24 | serial0 = &serial0; | ||
25 | serial1 = &serial1; | ||
26 | pci1 = &pci1; | ||
27 | pci2 = &pci2; | ||
28 | }; | ||
29 | |||
30 | cpus { | ||
31 | #address-cells = <1>; | ||
32 | #size-cells = <0>; | ||
33 | |||
34 | PowerPC,8572@0 { | ||
35 | device_type = "cpu"; | ||
36 | reg = <0x0>; | ||
37 | d-cache-line-size = <32>; // 32 bytes | ||
38 | i-cache-line-size = <32>; // 32 bytes | ||
39 | d-cache-size = <0x8000>; // L1, 32K | ||
40 | i-cache-size = <0x8000>; // L1, 32K | ||
41 | timebase-frequency = <0>; | ||
42 | bus-frequency = <0>; | ||
43 | clock-frequency = <0>; | ||
44 | next-level-cache = <&L2>; | ||
45 | }; | ||
46 | |||
47 | PowerPC,8572@1 { | ||
48 | device_type = "cpu"; | ||
49 | reg = <0x1>; | ||
50 | d-cache-line-size = <32>; // 32 bytes | ||
51 | i-cache-line-size = <32>; // 32 bytes | ||
52 | d-cache-size = <0x8000>; // L1, 32K | ||
53 | i-cache-size = <0x8000>; // L1, 32K | ||
54 | timebase-frequency = <0>; | ||
55 | bus-frequency = <0>; | ||
56 | clock-frequency = <0>; | ||
57 | next-level-cache = <&L2>; | ||
58 | }; | ||
59 | }; | ||
60 | |||
61 | memory { | ||
62 | device_type = "memory"; | ||
63 | reg = <0x0 0x0 0x0 0x0>; // Filled in by U-Boot | ||
64 | }; | ||
65 | |||
66 | localbus@ef005000 { | ||
67 | #address-cells = <2>; | ||
68 | #size-cells = <1>; | ||
69 | compatible = "fsl,mpc8572-elbc", "fsl,elbc", "simple-bus"; | ||
70 | reg = <0 0xef005000 0 0x1000>; | ||
71 | interrupts = <19 2>; | ||
72 | interrupt-parent = <&mpic>; | ||
73 | /* Local bus region mappings */ | ||
74 | ranges = <0 0 0 0xf8000000 0x8000000 /* CS0: Boot flash */ | ||
75 | 1 0 0 0xf0000000 0x8000000 /* CS1: Alternate flash */ | ||
76 | 2 0 0 0xef800000 0x40000 /* CS2: NAND CE1 */ | ||
77 | 3 0 0 0xef840000 0x40000>; /* CS3: NAND CE2 */ | ||
78 | |||
79 | nor-boot@0,0 { | ||
80 | compatible = "amd,s29gl01gp", "cfi-flash"; | ||
81 | bank-width = <2>; | ||
82 | reg = <0 0 0x8000000>; /* 128MB */ | ||
83 | #address-cells = <1>; | ||
84 | #size-cells = <1>; | ||
85 | partition@0 { | ||
86 | label = "Primary user space"; | ||
87 | reg = <0x00000000 0x6f00000>; /* 111 MB */ | ||
88 | }; | ||
89 | partition@6f00000 { | ||
90 | label = "Primary kernel"; | ||
91 | reg = <0x6f00000 0x1000000>; /* 16 MB */ | ||
92 | }; | ||
93 | partition@7f00000 { | ||
94 | label = "Primary DTB"; | ||
95 | reg = <0x7f00000 0x40000>; /* 256 KB */ | ||
96 | }; | ||
97 | partition@7f40000 { | ||
98 | label = "Primary U-Boot environment"; | ||
99 | reg = <0x7f40000 0x40000>; /* 256 KB */ | ||
100 | }; | ||
101 | partition@7f80000 { | ||
102 | label = "Primary U-Boot"; | ||
103 | reg = <0x7f80000 0x80000>; /* 512 KB */ | ||
104 | read-only; | ||
105 | }; | ||
106 | }; | ||
107 | |||
108 | nor-alternate@1,0 { | ||
109 | compatible = "amd,s29gl01gp", "cfi-flash"; | ||
110 | bank-width = <2>; | ||
111 | //reg = <0xf0000000 0x08000000>; /* 128MB */ | ||
112 | reg = <1 0 0x8000000>; /* 128MB */ | ||
113 | #address-cells = <1>; | ||
114 | #size-cells = <1>; | ||
115 | partition@0 { | ||
116 | label = "Secondary user space"; | ||
117 | reg = <0x00000000 0x6f00000>; /* 111 MB */ | ||
118 | }; | ||
119 | partition@6f00000 { | ||
120 | label = "Secondary kernel"; | ||
121 | reg = <0x6f00000 0x1000000>; /* 16 MB */ | ||
122 | }; | ||
123 | partition@7f00000 { | ||
124 | label = "Secondary DTB"; | ||
125 | reg = <0x7f00000 0x40000>; /* 256 KB */ | ||
126 | }; | ||
127 | partition@7f40000 { | ||
128 | label = "Secondary U-Boot environment"; | ||
129 | reg = <0x7f40000 0x40000>; /* 256 KB */ | ||
130 | }; | ||
131 | partition@7f80000 { | ||
132 | label = "Secondary U-Boot"; | ||
133 | reg = <0x7f80000 0x80000>; /* 512 KB */ | ||
134 | read-only; | ||
135 | }; | ||
136 | }; | ||
137 | |||
138 | nand@2,0 { | ||
139 | #address-cells = <1>; | ||
140 | #size-cells = <1>; | ||
141 | /* | ||
142 | * Actual part could be ST Micro NAND08GW3B2A (1 GB), | ||
143 | * Micron MT29F8G08DAA (2x 512 MB), or Micron | ||
144 | * MT29F16G08FAA (2x 1 GB), depending on the build | ||
145 | * configuration | ||
146 | */ | ||
147 | compatible = "fsl,mpc8572-fcm-nand", | ||
148 | "fsl,elbc-fcm-nand"; | ||
149 | reg = <2 0 0x40000>; | ||
150 | /* U-Boot should fix this up if chip size > 1 GB */ | ||
151 | partition@0 { | ||
152 | label = "NAND Filesystem"; | ||
153 | reg = <0 0x40000000>; | ||
154 | }; | ||
155 | }; | ||
156 | |||
157 | }; | ||
158 | |||
159 | soc8572@ef000000 { | ||
160 | #address-cells = <1>; | ||
161 | #size-cells = <1>; | ||
162 | device_type = "soc"; | ||
163 | compatible = "fsl,mpc8572-immr", "simple-bus"; | ||
164 | ranges = <0x0 0 0xef000000 0x100000>; | ||
165 | bus-frequency = <0>; // Filled out by uboot. | ||
166 | |||
167 | ecm-law@0 { | ||
168 | compatible = "fsl,ecm-law"; | ||
169 | reg = <0x0 0x1000>; | ||
170 | fsl,num-laws = <12>; | ||
171 | }; | ||
172 | |||
173 | ecm@1000 { | ||
174 | compatible = "fsl,mpc8572-ecm", "fsl,ecm"; | ||
175 | reg = <0x1000 0x1000>; | ||
176 | interrupts = <17 2>; | ||
177 | interrupt-parent = <&mpic>; | ||
178 | }; | ||
179 | |||
180 | memory-controller@2000 { | ||
181 | compatible = "fsl,mpc8572-memory-controller"; | ||
182 | reg = <0x2000 0x1000>; | ||
183 | interrupt-parent = <&mpic>; | ||
184 | interrupts = <18 2>; | ||
185 | }; | ||
186 | |||
187 | memory-controller@6000 { | ||
188 | compatible = "fsl,mpc8572-memory-controller"; | ||
189 | reg = <0x6000 0x1000>; | ||
190 | interrupt-parent = <&mpic>; | ||
191 | interrupts = <18 2>; | ||
192 | }; | ||
193 | |||
194 | L2: l2-cache-controller@20000 { | ||
195 | compatible = "fsl,mpc8572-l2-cache-controller"; | ||
196 | reg = <0x20000 0x1000>; | ||
197 | cache-line-size = <32>; // 32 bytes | ||
198 | cache-size = <0x100000>; // L2, 1M | ||
199 | interrupt-parent = <&mpic>; | ||
200 | interrupts = <16 2>; | ||
201 | }; | ||
202 | |||
203 | i2c@3000 { | ||
204 | #address-cells = <1>; | ||
205 | #size-cells = <0>; | ||
206 | cell-index = <0>; | ||
207 | compatible = "fsl-i2c"; | ||
208 | reg = <0x3000 0x100>; | ||
209 | interrupts = <43 2>; | ||
210 | interrupt-parent = <&mpic>; | ||
211 | dfsrr; | ||
212 | |||
213 | temp-sensor@48 { | ||
214 | compatible = "dallas,ds1631", "dallas,ds1621"; | ||
215 | reg = <0x48>; | ||
216 | }; | ||
217 | |||
218 | temp-sensor@4c { | ||
219 | compatible = "adi,adt7461"; | ||
220 | reg = <0x4c>; | ||
221 | }; | ||
222 | |||
223 | cpu-supervisor@51 { | ||
224 | compatible = "dallas,ds4510"; | ||
225 | reg = <0x51>; | ||
226 | }; | ||
227 | |||
228 | eeprom@54 { | ||
229 | compatible = "atmel,at24c128b"; | ||
230 | reg = <0x54>; | ||
231 | }; | ||
232 | |||
233 | rtc@68 { | ||
234 | compatible = "stm,m41t00", | ||
235 | "dallas,ds1338"; | ||
236 | reg = <0x68>; | ||
237 | }; | ||
238 | |||
239 | pcie-switch@70 { | ||
240 | compatible = "plx,pex8518"; | ||
241 | reg = <0x70>; | ||
242 | }; | ||
243 | |||
244 | gpio1: gpio@18 { | ||
245 | compatible = "nxp,pca9557"; | ||
246 | reg = <0x18>; | ||
247 | #gpio-cells = <2>; | ||
248 | gpio-controller; | ||
249 | polarity = <0x00>; | ||
250 | }; | ||
251 | |||
252 | gpio2: gpio@1c { | ||
253 | compatible = "nxp,pca9557"; | ||
254 | reg = <0x1c>; | ||
255 | #gpio-cells = <2>; | ||
256 | gpio-controller; | ||
257 | polarity = <0x00>; | ||
258 | }; | ||
259 | |||
260 | gpio3: gpio@1e { | ||
261 | compatible = "nxp,pca9557"; | ||
262 | reg = <0x1e>; | ||
263 | #gpio-cells = <2>; | ||
264 | gpio-controller; | ||
265 | polarity = <0x00>; | ||
266 | }; | ||
267 | |||
268 | gpio4: gpio@1f { | ||
269 | compatible = "nxp,pca9557"; | ||
270 | reg = <0x1f>; | ||
271 | #gpio-cells = <2>; | ||
272 | gpio-controller; | ||
273 | polarity = <0x00>; | ||
274 | }; | ||
275 | }; | ||
276 | |||
277 | i2c@3100 { | ||
278 | #address-cells = <1>; | ||
279 | #size-cells = <0>; | ||
280 | cell-index = <1>; | ||
281 | compatible = "fsl-i2c"; | ||
282 | reg = <0x3100 0x100>; | ||
283 | interrupts = <43 2>; | ||
284 | interrupt-parent = <&mpic>; | ||
285 | dfsrr; | ||
286 | }; | ||
287 | |||
288 | dma@c300 { | ||
289 | #address-cells = <1>; | ||
290 | #size-cells = <1>; | ||
291 | compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma"; | ||
292 | reg = <0xc300 0x4>; | ||
293 | ranges = <0x0 0xc100 0x200>; | ||
294 | cell-index = <1>; | ||
295 | dma-channel@0 { | ||
296 | compatible = "fsl,mpc8572-dma-channel", | ||
297 | "fsl,eloplus-dma-channel"; | ||
298 | reg = <0x0 0x80>; | ||
299 | cell-index = <0>; | ||
300 | interrupt-parent = <&mpic>; | ||
301 | interrupts = <76 2>; | ||
302 | }; | ||
303 | dma-channel@80 { | ||
304 | compatible = "fsl,mpc8572-dma-channel", | ||
305 | "fsl,eloplus-dma-channel"; | ||
306 | reg = <0x80 0x80>; | ||
307 | cell-index = <1>; | ||
308 | interrupt-parent = <&mpic>; | ||
309 | interrupts = <77 2>; | ||
310 | }; | ||
311 | dma-channel@100 { | ||
312 | compatible = "fsl,mpc8572-dma-channel", | ||
313 | "fsl,eloplus-dma-channel"; | ||
314 | reg = <0x100 0x80>; | ||
315 | cell-index = <2>; | ||
316 | interrupt-parent = <&mpic>; | ||
317 | interrupts = <78 2>; | ||
318 | }; | ||
319 | dma-channel@180 { | ||
320 | compatible = "fsl,mpc8572-dma-channel", | ||
321 | "fsl,eloplus-dma-channel"; | ||
322 | reg = <0x180 0x80>; | ||
323 | cell-index = <3>; | ||
324 | interrupt-parent = <&mpic>; | ||
325 | interrupts = <79 2>; | ||
326 | }; | ||
327 | }; | ||
328 | |||
329 | dma@21300 { | ||
330 | #address-cells = <1>; | ||
331 | #size-cells = <1>; | ||
332 | compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma"; | ||
333 | reg = <0x21300 0x4>; | ||
334 | ranges = <0x0 0x21100 0x200>; | ||
335 | cell-index = <0>; | ||
336 | dma-channel@0 { | ||
337 | compatible = "fsl,mpc8572-dma-channel", | ||
338 | "fsl,eloplus-dma-channel"; | ||
339 | reg = <0x0 0x80>; | ||
340 | cell-index = <0>; | ||
341 | interrupt-parent = <&mpic>; | ||
342 | interrupts = <20 2>; | ||
343 | }; | ||
344 | dma-channel@80 { | ||
345 | compatible = "fsl,mpc8572-dma-channel", | ||
346 | "fsl,eloplus-dma-channel"; | ||
347 | reg = <0x80 0x80>; | ||
348 | cell-index = <1>; | ||
349 | interrupt-parent = <&mpic>; | ||
350 | interrupts = <21 2>; | ||
351 | }; | ||
352 | dma-channel@100 { | ||
353 | compatible = "fsl,mpc8572-dma-channel", | ||
354 | "fsl,eloplus-dma-channel"; | ||
355 | reg = <0x100 0x80>; | ||
356 | cell-index = <2>; | ||
357 | interrupt-parent = <&mpic>; | ||
358 | interrupts = <22 2>; | ||
359 | }; | ||
360 | dma-channel@180 { | ||
361 | compatible = "fsl,mpc8572-dma-channel", | ||
362 | "fsl,eloplus-dma-channel"; | ||
363 | reg = <0x180 0x80>; | ||
364 | cell-index = <3>; | ||
365 | interrupt-parent = <&mpic>; | ||
366 | interrupts = <23 2>; | ||
367 | }; | ||
368 | }; | ||
369 | |||
370 | /* eTSEC 1 */ | ||
371 | enet0: ethernet@24000 { | ||
372 | #address-cells = <1>; | ||
373 | #size-cells = <1>; | ||
374 | cell-index = <0>; | ||
375 | device_type = "network"; | ||
376 | model = "eTSEC"; | ||
377 | compatible = "gianfar"; | ||
378 | reg = <0x24000 0x1000>; | ||
379 | ranges = <0x0 0x24000 0x1000>; | ||
380 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
381 | interrupts = <29 2 30 2 34 2>; | ||
382 | interrupt-parent = <&mpic>; | ||
383 | tbi-handle = <&tbi0>; | ||
384 | phy-handle = <&phy0>; | ||
385 | phy-connection-type = "sgmii"; | ||
386 | |||
387 | mdio@520 { | ||
388 | #address-cells = <1>; | ||
389 | #size-cells = <0>; | ||
390 | compatible = "fsl,gianfar-mdio"; | ||
391 | reg = <0x520 0x20>; | ||
392 | |||
393 | phy0: ethernet-phy@1 { | ||
394 | interrupt-parent = <&mpic>; | ||
395 | interrupts = <8 1>; | ||
396 | reg = <0x1>; | ||
397 | }; | ||
398 | phy1: ethernet-phy@2 { | ||
399 | interrupt-parent = <&mpic>; | ||
400 | interrupts = <8 1>; | ||
401 | reg = <0x2>; | ||
402 | }; | ||
403 | tbi0: tbi-phy@11 { | ||
404 | reg = <0x11>; | ||
405 | device_type = "tbi-phy"; | ||
406 | }; | ||
407 | }; | ||
408 | }; | ||
409 | |||
410 | /* eTSEC 2 */ | ||
411 | enet1: ethernet@25000 { | ||
412 | #address-cells = <1>; | ||
413 | #size-cells = <1>; | ||
414 | cell-index = <1>; | ||
415 | device_type = "network"; | ||
416 | model = "eTSEC"; | ||
417 | compatible = "gianfar"; | ||
418 | reg = <0x25000 0x1000>; | ||
419 | ranges = <0x0 0x25000 0x1000>; | ||
420 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
421 | interrupts = <35 2 36 2 40 2>; | ||
422 | interrupt-parent = <&mpic>; | ||
423 | tbi-handle = <&tbi1>; | ||
424 | phy-handle = <&phy1>; | ||
425 | phy-connection-type = "sgmii"; | ||
426 | |||
427 | mdio@520 { | ||
428 | #address-cells = <1>; | ||
429 | #size-cells = <0>; | ||
430 | compatible = "fsl,gianfar-tbi"; | ||
431 | reg = <0x520 0x20>; | ||
432 | |||
433 | tbi1: tbi-phy@11 { | ||
434 | reg = <0x11>; | ||
435 | device_type = "tbi-phy"; | ||
436 | }; | ||
437 | }; | ||
438 | }; | ||
439 | |||
440 | /* UART0 */ | ||
441 | serial0: serial@4500 { | ||
442 | cell-index = <0>; | ||
443 | device_type = "serial"; | ||
444 | compatible = "ns16550"; | ||
445 | reg = <0x4500 0x100>; | ||
446 | clock-frequency = <0>; | ||
447 | interrupts = <42 2>; | ||
448 | interrupt-parent = <&mpic>; | ||
449 | }; | ||
450 | |||
451 | /* UART1 */ | ||
452 | serial1: serial@4600 { | ||
453 | cell-index = <1>; | ||
454 | device_type = "serial"; | ||
455 | compatible = "ns16550"; | ||
456 | reg = <0x4600 0x100>; | ||
457 | clock-frequency = <0>; | ||
458 | interrupts = <42 2>; | ||
459 | interrupt-parent = <&mpic>; | ||
460 | }; | ||
461 | |||
462 | global-utilities@e0000 { //global utilities block | ||
463 | compatible = "fsl,mpc8572-guts"; | ||
464 | reg = <0xe0000 0x1000>; | ||
465 | fsl,has-rstcr; | ||
466 | }; | ||
467 | |||
468 | msi@41600 { | ||
469 | compatible = "fsl,mpc8572-msi", "fsl,mpic-msi"; | ||
470 | reg = <0x41600 0x80>; | ||
471 | msi-available-ranges = <0 0x100>; | ||
472 | interrupts = < | ||
473 | 0xe0 0 | ||
474 | 0xe1 0 | ||
475 | 0xe2 0 | ||
476 | 0xe3 0 | ||
477 | 0xe4 0 | ||
478 | 0xe5 0 | ||
479 | 0xe6 0 | ||
480 | 0xe7 0>; | ||
481 | interrupt-parent = <&mpic>; | ||
482 | }; | ||
483 | |||
484 | crypto@30000 { | ||
485 | compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2", | ||
486 | "fsl,sec2.1", "fsl,sec2.0"; | ||
487 | reg = <0x30000 0x10000>; | ||
488 | interrupts = <45 2 58 2>; | ||
489 | interrupt-parent = <&mpic>; | ||
490 | fsl,num-channels = <4>; | ||
491 | fsl,channel-fifo-len = <24>; | ||
492 | fsl,exec-units-mask = <0x9fe>; | ||
493 | fsl,descriptor-types-mask = <0x3ab0ebf>; | ||
494 | }; | ||
495 | |||
496 | mpic: pic@40000 { | ||
497 | interrupt-controller; | ||
498 | #address-cells = <0>; | ||
499 | #interrupt-cells = <2>; | ||
500 | reg = <0x40000 0x40000>; | ||
501 | compatible = "chrp,open-pic"; | ||
502 | device_type = "open-pic"; | ||
503 | }; | ||
504 | |||
505 | gpio0: gpio@f000 { | ||
506 | compatible = "fsl,mpc8572-gpio"; | ||
507 | reg = <0xf000 0x1000>; | ||
508 | interrupts = <47 2>; | ||
509 | interrupt-parent = <&mpic>; | ||
510 | #gpio-cells = <2>; | ||
511 | gpio-controller; | ||
512 | }; | ||
513 | |||
514 | gpio-leds { | ||
515 | compatible = "gpio-leds"; | ||
516 | |||
517 | heartbeat { | ||
518 | label = "Heartbeat"; | ||
519 | gpios = <&gpio0 4 1>; | ||
520 | linux,default-trigger = "heartbeat"; | ||
521 | }; | ||
522 | |||
523 | yellow { | ||
524 | label = "Yellow"; | ||
525 | gpios = <&gpio0 5 1>; | ||
526 | }; | ||
527 | |||
528 | red { | ||
529 | label = "Red"; | ||
530 | gpios = <&gpio0 6 1>; | ||
531 | }; | ||
532 | |||
533 | green { | ||
534 | label = "Green"; | ||
535 | gpios = <&gpio0 7 1>; | ||
536 | }; | ||
537 | }; | ||
538 | |||
539 | /* PME (pattern-matcher) */ | ||
540 | pme@10000 { | ||
541 | compatible = "fsl,mpc8572-pme", "pme8572"; | ||
542 | reg = <0x10000 0x5000>; | ||
543 | interrupts = <57 2 64 2 65 2 66 2 67 2>; | ||
544 | interrupt-parent = <&mpic>; | ||
545 | }; | ||
546 | |||
547 | tlu@2f000 { | ||
548 | compatible = "fsl,mpc8572-tlu", "fsl_tlu"; | ||
549 | reg = <0x2f000 0x1000>; | ||
550 | interupts = <61 2 >; | ||
551 | interrupt-parent = <&mpic>; | ||
552 | }; | ||
553 | |||
554 | tlu@15000 { | ||
555 | compatible = "fsl,mpc8572-tlu", "fsl_tlu"; | ||
556 | reg = <0x15000 0x1000>; | ||
557 | interupts = <75 2>; | ||
558 | interrupt-parent = <&mpic>; | ||
559 | }; | ||
560 | }; | ||
561 | |||
562 | /* | ||
563 | * PCI Express controller 3 @ ef008000 is not used. | ||
564 | * This would have been pci0 on other mpc85xx platforms. | ||
565 | */ | ||
566 | |||
567 | /* PCI Express controller 2, wired to XMC P15 connector */ | ||
568 | pci1: pcie@ef009000 { | ||
569 | compatible = "fsl,mpc8548-pcie"; | ||
570 | device_type = "pci"; | ||
571 | #interrupt-cells = <1>; | ||
572 | #size-cells = <2>; | ||
573 | #address-cells = <3>; | ||
574 | reg = <0 0xef009000 0 0x1000>; | ||
575 | bus-range = <0 255>; | ||
576 | ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x10000000 | ||
577 | 0x1000000 0x0 0x00000000 0 0xe8800000 0x0 0x00010000>; | ||
578 | clock-frequency = <33333333>; | ||
579 | interrupt-parent = <&mpic>; | ||
580 | interrupts = <25 2>; | ||
581 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; | ||
582 | interrupt-map = < | ||
583 | /* IDSEL 0x0 */ | ||
584 | 0x0 0x0 0x0 0x1 &mpic 0x4 0x1 | ||
585 | 0x0 0x0 0x0 0x2 &mpic 0x5 0x1 | ||
586 | 0x0 0x0 0x0 0x3 &mpic 0x6 0x1 | ||
587 | 0x0 0x0 0x0 0x4 &mpic 0x7 0x1 | ||
588 | >; | ||
589 | pcie@0 { | ||
590 | reg = <0x00000000 0x00000000 0x00000000 0x00000000 0x00000000>; | ||
591 | #size-cells = <2>; | ||
592 | #address-cells = <3>; | ||
593 | device_type = "pci"; | ||
594 | ranges = <0x2000000 0x0 0xc0000000 | ||
595 | 0x2000000 0x0 0xc0000000 | ||
596 | 0x0 0x10000000 | ||
597 | |||
598 | 0x1000000 0x0 0x0 | ||
599 | 0x1000000 0x0 0x0 | ||
600 | 0x0 0x100000>; | ||
601 | }; | ||
602 | }; | ||
603 | |||
604 | /* PCI Express controller 1, wired to PEX8112 for PMC interface */ | ||
605 | pci2: pcie@ef00a000 { | ||
606 | compatible = "fsl,mpc8548-pcie"; | ||
607 | device_type = "pci"; | ||
608 | #interrupt-cells = <1>; | ||
609 | #size-cells = <2>; | ||
610 | #address-cells = <3>; | ||
611 | reg = <0 0xef00a000 0 0x1000>; | ||
612 | bus-range = <0 255>; | ||
613 | ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x40000000 | ||
614 | 0x1000000 0x0 0x00000000 0 0xe8000000 0x0 0x10000>; | ||
615 | clock-frequency = <33333333>; | ||
616 | interrupt-parent = <&mpic>; | ||
617 | interrupts = <26 2>; | ||
618 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; | ||
619 | interrupt-map = < | ||
620 | /* IDSEL 0x0 */ | ||
621 | 0x0 0x0 0x0 0x1 &mpic 0x0 0x1 | ||
622 | 0x0 0x0 0x0 0x2 &mpic 0x1 0x1 | ||
623 | 0x0 0x0 0x0 0x3 &mpic 0x2 0x1 | ||
624 | 0x0 0x0 0x0 0x4 &mpic 0x3 0x1 | ||
625 | >; | ||
626 | pcie@0 { | ||
627 | reg = <0x0 0x0 0x0 0x0 0x0>; | ||
628 | #size-cells = <2>; | ||
629 | #address-cells = <3>; | ||
630 | device_type = "pci"; | ||
631 | ranges = <0x2000000 0x0 0x80000000 | ||
632 | 0x2000000 0x0 0x80000000 | ||
633 | 0x0 0x40000000 | ||
634 | |||
635 | 0x1000000 0x0 0x0 | ||
636 | 0x1000000 0x0 0x0 | ||
637 | 0x0 0x100000>; | ||
638 | }; | ||
639 | }; | ||
640 | }; | ||
diff --git a/arch/powerpc/boot/dts/xpedite5330.dts b/arch/powerpc/boot/dts/xpedite5330.dts new file mode 100644 index 000000000000..c364ca6ff7d0 --- /dev/null +++ b/arch/powerpc/boot/dts/xpedite5330.dts | |||
@@ -0,0 +1,707 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2008 Extreme Engineering Solutions, Inc. | ||
3 | * Based on MPC8572DS device tree from Freescale Semiconductor, Inc. | ||
4 | * | ||
5 | * XPedite5330 3U CompactPCI module based on MPC8572E | ||
6 | * | ||
7 | * This is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | */ | ||
11 | |||
12 | /dts-v1/; | ||
13 | / { | ||
14 | model = "xes,xpedite5330"; | ||
15 | compatible = "xes,xpedite5330", "xes,MPC8572"; | ||
16 | #address-cells = <2>; | ||
17 | #size-cells = <2>; | ||
18 | form-factor = "3U CompactPCI"; | ||
19 | boot-bank = <0x0>; /* 0: Primary flash, 1: Secondary flash */ | ||
20 | |||
21 | aliases { | ||
22 | ethernet0 = &enet0; | ||
23 | ethernet1 = &enet1; | ||
24 | serial0 = &serial0; | ||
25 | serial1 = &serial1; | ||
26 | pci0 = &pci0; | ||
27 | pci1 = &pci1; | ||
28 | pci2 = &pci2; | ||
29 | }; | ||
30 | |||
31 | pmcslots { | ||
32 | #address-cells = <1>; | ||
33 | #size-cells = <0>; | ||
34 | |||
35 | pmcslot@0 { | ||
36 | cell-index = <0>; | ||
37 | /* | ||
38 | * boolean properties (true if defined): | ||
39 | * monarch; | ||
40 | * module-present; | ||
41 | */ | ||
42 | }; | ||
43 | }; | ||
44 | |||
45 | xmcslots { | ||
46 | #address-cells = <1>; | ||
47 | #size-cells = <0>; | ||
48 | |||
49 | xmcslot@0 { | ||
50 | cell-index = <0>; | ||
51 | /* | ||
52 | * boolean properties (true if defined): | ||
53 | * module-present; | ||
54 | */ | ||
55 | }; | ||
56 | }; | ||
57 | |||
58 | cpci { | ||
59 | /* | ||
60 | * boolean properties (true if defined): | ||
61 | * system-controller; | ||
62 | */ | ||
63 | system-controller; | ||
64 | }; | ||
65 | |||
66 | cpus { | ||
67 | #address-cells = <1>; | ||
68 | #size-cells = <0>; | ||
69 | |||
70 | PowerPC,8572@0 { | ||
71 | device_type = "cpu"; | ||
72 | reg = <0x0>; | ||
73 | d-cache-line-size = <32>; // 32 bytes | ||
74 | i-cache-line-size = <32>; // 32 bytes | ||
75 | d-cache-size = <0x8000>; // L1, 32K | ||
76 | i-cache-size = <0x8000>; // L1, 32K | ||
77 | timebase-frequency = <0>; | ||
78 | bus-frequency = <0>; | ||
79 | clock-frequency = <0>; | ||
80 | next-level-cache = <&L2>; | ||
81 | }; | ||
82 | |||
83 | PowerPC,8572@1 { | ||
84 | device_type = "cpu"; | ||
85 | reg = <0x1>; | ||
86 | d-cache-line-size = <32>; // 32 bytes | ||
87 | i-cache-line-size = <32>; // 32 bytes | ||
88 | d-cache-size = <0x8000>; // L1, 32K | ||
89 | i-cache-size = <0x8000>; // L1, 32K | ||
90 | timebase-frequency = <0>; | ||
91 | bus-frequency = <0>; | ||
92 | clock-frequency = <0>; | ||
93 | next-level-cache = <&L2>; | ||
94 | }; | ||
95 | }; | ||
96 | |||
97 | memory { | ||
98 | device_type = "memory"; | ||
99 | reg = <0x0 0x0 0x0 0x0>; // Filled in by U-Boot | ||
100 | }; | ||
101 | |||
102 | localbus@ef005000 { | ||
103 | #address-cells = <2>; | ||
104 | #size-cells = <1>; | ||
105 | compatible = "fsl,mpc8572-elbc", "fsl,elbc", "simple-bus"; | ||
106 | reg = <0 0xef005000 0 0x1000>; | ||
107 | interrupts = <19 2>; | ||
108 | interrupt-parent = <&mpic>; | ||
109 | /* Local bus region mappings */ | ||
110 | ranges = <0 0 0 0xf8000000 0x8000000 /* CS0: Boot flash */ | ||
111 | 1 0 0 0xf0000000 0x8000000 /* CS1: Alternate flash */ | ||
112 | 2 0 0 0xef800000 0x40000 /* CS2: NAND CE1 */ | ||
113 | 3 0 0 0xef840000 0x40000>; /* CS3: NAND CE2 */ | ||
114 | |||
115 | nor-boot@0,0 { | ||
116 | compatible = "amd,s29gl01gp", "cfi-flash"; | ||
117 | bank-width = <2>; | ||
118 | reg = <0 0 0x8000000>; /* 128MB */ | ||
119 | #address-cells = <1>; | ||
120 | #size-cells = <1>; | ||
121 | partition@0 { | ||
122 | label = "Primary user space"; | ||
123 | reg = <0x00000000 0x6f00000>; /* 111 MB */ | ||
124 | }; | ||
125 | partition@6f00000 { | ||
126 | label = "Primary kernel"; | ||
127 | reg = <0x6f00000 0x1000000>; /* 16 MB */ | ||
128 | }; | ||
129 | partition@7f00000 { | ||
130 | label = "Primary DTB"; | ||
131 | reg = <0x7f00000 0x40000>; /* 256 KB */ | ||
132 | }; | ||
133 | partition@7f40000 { | ||
134 | label = "Primary U-Boot environment"; | ||
135 | reg = <0x7f40000 0x40000>; /* 256 KB */ | ||
136 | }; | ||
137 | partition@7f80000 { | ||
138 | label = "Primary U-Boot"; | ||
139 | reg = <0x7f80000 0x80000>; /* 512 KB */ | ||
140 | read-only; | ||
141 | }; | ||
142 | }; | ||
143 | |||
144 | nor-alternate@1,0 { | ||
145 | compatible = "amd,s29gl01gp", "cfi-flash"; | ||
146 | bank-width = <2>; | ||
147 | //reg = <0xf0000000 0x08000000>; /* 128MB */ | ||
148 | reg = <1 0 0x8000000>; /* 128MB */ | ||
149 | #address-cells = <1>; | ||
150 | #size-cells = <1>; | ||
151 | partition@0 { | ||
152 | label = "Secondary user space"; | ||
153 | reg = <0x00000000 0x6f00000>; /* 111 MB */ | ||
154 | }; | ||
155 | partition@6f00000 { | ||
156 | label = "Secondary kernel"; | ||
157 | reg = <0x6f00000 0x1000000>; /* 16 MB */ | ||
158 | }; | ||
159 | partition@7f00000 { | ||
160 | label = "Secondary DTB"; | ||
161 | reg = <0x7f00000 0x40000>; /* 256 KB */ | ||
162 | }; | ||
163 | partition@7f40000 { | ||
164 | label = "Secondary U-Boot environment"; | ||
165 | reg = <0x7f40000 0x40000>; /* 256 KB */ | ||
166 | }; | ||
167 | partition@7f80000 { | ||
168 | label = "Secondary U-Boot"; | ||
169 | reg = <0x7f80000 0x80000>; /* 512 KB */ | ||
170 | read-only; | ||
171 | }; | ||
172 | }; | ||
173 | |||
174 | nand@2,0 { | ||
175 | #address-cells = <1>; | ||
176 | #size-cells = <1>; | ||
177 | /* | ||
178 | * Actual part could be ST Micro NAND08GW3B2A (1 GB), | ||
179 | * Micron MT29F8G08DAA (2x 512 MB), or Micron | ||
180 | * MT29F16G08FAA (2x 1 GB), depending on the build | ||
181 | * configuration | ||
182 | */ | ||
183 | compatible = "fsl,mpc8572-fcm-nand", | ||
184 | "fsl,elbc-fcm-nand"; | ||
185 | reg = <2 0 0x40000>; | ||
186 | /* U-Boot should fix this up if chip size > 1 GB */ | ||
187 | partition@0 { | ||
188 | label = "NAND Filesystem"; | ||
189 | reg = <0 0x40000000>; | ||
190 | }; | ||
191 | }; | ||
192 | |||
193 | }; | ||
194 | |||
195 | soc8572@ef000000 { | ||
196 | #address-cells = <1>; | ||
197 | #size-cells = <1>; | ||
198 | device_type = "soc"; | ||
199 | compatible = "fsl,mpc8572-immr", "simple-bus"; | ||
200 | ranges = <0x0 0 0xef000000 0x100000>; | ||
201 | bus-frequency = <0>; // Filled out by uboot. | ||
202 | |||
203 | ecm-law@0 { | ||
204 | compatible = "fsl,ecm-law"; | ||
205 | reg = <0x0 0x1000>; | ||
206 | fsl,num-laws = <12>; | ||
207 | }; | ||
208 | |||
209 | ecm@1000 { | ||
210 | compatible = "fsl,mpc8572-ecm", "fsl,ecm"; | ||
211 | reg = <0x1000 0x1000>; | ||
212 | interrupts = <17 2>; | ||
213 | interrupt-parent = <&mpic>; | ||
214 | }; | ||
215 | |||
216 | memory-controller@2000 { | ||
217 | compatible = "fsl,mpc8572-memory-controller"; | ||
218 | reg = <0x2000 0x1000>; | ||
219 | interrupt-parent = <&mpic>; | ||
220 | interrupts = <18 2>; | ||
221 | }; | ||
222 | |||
223 | memory-controller@6000 { | ||
224 | compatible = "fsl,mpc8572-memory-controller"; | ||
225 | reg = <0x6000 0x1000>; | ||
226 | interrupt-parent = <&mpic>; | ||
227 | interrupts = <18 2>; | ||
228 | }; | ||
229 | |||
230 | L2: l2-cache-controller@20000 { | ||
231 | compatible = "fsl,mpc8572-l2-cache-controller"; | ||
232 | reg = <0x20000 0x1000>; | ||
233 | cache-line-size = <32>; // 32 bytes | ||
234 | cache-size = <0x100000>; // L2, 1M | ||
235 | interrupt-parent = <&mpic>; | ||
236 | interrupts = <16 2>; | ||
237 | }; | ||
238 | |||
239 | i2c@3000 { | ||
240 | #address-cells = <1>; | ||
241 | #size-cells = <0>; | ||
242 | cell-index = <0>; | ||
243 | compatible = "fsl-i2c"; | ||
244 | reg = <0x3000 0x100>; | ||
245 | interrupts = <43 2>; | ||
246 | interrupt-parent = <&mpic>; | ||
247 | dfsrr; | ||
248 | |||
249 | temp-sensor@48 { | ||
250 | compatible = "dallas,ds1631", "dallas,ds1621"; | ||
251 | reg = <0x48>; | ||
252 | }; | ||
253 | |||
254 | temp-sensor@4c { | ||
255 | compatible = "adi,adt7461"; | ||
256 | reg = <0x4c>; | ||
257 | }; | ||
258 | |||
259 | cpu-supervisor@51 { | ||
260 | compatible = "dallas,ds4510"; | ||
261 | reg = <0x51>; | ||
262 | }; | ||
263 | |||
264 | eeprom@54 { | ||
265 | compatible = "atmel,at24c128b"; | ||
266 | reg = <0x54>; | ||
267 | }; | ||
268 | |||
269 | rtc@68 { | ||
270 | compatible = "stm,m41t00", | ||
271 | "dallas,ds1338"; | ||
272 | reg = <0x68>; | ||
273 | }; | ||
274 | |||
275 | pcie-switch@70 { | ||
276 | compatible = "plx,pex8518"; | ||
277 | reg = <0x70>; | ||
278 | }; | ||
279 | |||
280 | gpio1: gpio@18 { | ||
281 | compatible = "nxp,pca9557"; | ||
282 | reg = <0x18>; | ||
283 | #gpio-cells = <2>; | ||
284 | gpio-controller; | ||
285 | polarity = <0x00>; | ||
286 | }; | ||
287 | |||
288 | gpio2: gpio@1c { | ||
289 | compatible = "nxp,pca9557"; | ||
290 | reg = <0x1c>; | ||
291 | #gpio-cells = <2>; | ||
292 | gpio-controller; | ||
293 | polarity = <0x00>; | ||
294 | }; | ||
295 | |||
296 | gpio3: gpio@1e { | ||
297 | compatible = "nxp,pca9557"; | ||
298 | reg = <0x1e>; | ||
299 | #gpio-cells = <2>; | ||
300 | gpio-controller; | ||
301 | polarity = <0x00>; | ||
302 | }; | ||
303 | |||
304 | gpio4: gpio@1f { | ||
305 | compatible = "nxp,pca9557"; | ||
306 | reg = <0x1f>; | ||
307 | #gpio-cells = <2>; | ||
308 | gpio-controller; | ||
309 | polarity = <0x00>; | ||
310 | }; | ||
311 | }; | ||
312 | |||
313 | i2c@3100 { | ||
314 | #address-cells = <1>; | ||
315 | #size-cells = <0>; | ||
316 | cell-index = <1>; | ||
317 | compatible = "fsl-i2c"; | ||
318 | reg = <0x3100 0x100>; | ||
319 | interrupts = <43 2>; | ||
320 | interrupt-parent = <&mpic>; | ||
321 | dfsrr; | ||
322 | }; | ||
323 | |||
324 | dma@c300 { | ||
325 | #address-cells = <1>; | ||
326 | #size-cells = <1>; | ||
327 | compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma"; | ||
328 | reg = <0xc300 0x4>; | ||
329 | ranges = <0x0 0xc100 0x200>; | ||
330 | cell-index = <1>; | ||
331 | dma-channel@0 { | ||
332 | compatible = "fsl,mpc8572-dma-channel", | ||
333 | "fsl,eloplus-dma-channel"; | ||
334 | reg = <0x0 0x80>; | ||
335 | cell-index = <0>; | ||
336 | interrupt-parent = <&mpic>; | ||
337 | interrupts = <76 2>; | ||
338 | }; | ||
339 | dma-channel@80 { | ||
340 | compatible = "fsl,mpc8572-dma-channel", | ||
341 | "fsl,eloplus-dma-channel"; | ||
342 | reg = <0x80 0x80>; | ||
343 | cell-index = <1>; | ||
344 | interrupt-parent = <&mpic>; | ||
345 | interrupts = <77 2>; | ||
346 | }; | ||
347 | dma-channel@100 { | ||
348 | compatible = "fsl,mpc8572-dma-channel", | ||
349 | "fsl,eloplus-dma-channel"; | ||
350 | reg = <0x100 0x80>; | ||
351 | cell-index = <2>; | ||
352 | interrupt-parent = <&mpic>; | ||
353 | interrupts = <78 2>; | ||
354 | }; | ||
355 | dma-channel@180 { | ||
356 | compatible = "fsl,mpc8572-dma-channel", | ||
357 | "fsl,eloplus-dma-channel"; | ||
358 | reg = <0x180 0x80>; | ||
359 | cell-index = <3>; | ||
360 | interrupt-parent = <&mpic>; | ||
361 | interrupts = <79 2>; | ||
362 | }; | ||
363 | }; | ||
364 | |||
365 | dma@21300 { | ||
366 | #address-cells = <1>; | ||
367 | #size-cells = <1>; | ||
368 | compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma"; | ||
369 | reg = <0x21300 0x4>; | ||
370 | ranges = <0x0 0x21100 0x200>; | ||
371 | cell-index = <0>; | ||
372 | dma-channel@0 { | ||
373 | compatible = "fsl,mpc8572-dma-channel", | ||
374 | "fsl,eloplus-dma-channel"; | ||
375 | reg = <0x0 0x80>; | ||
376 | cell-index = <0>; | ||
377 | interrupt-parent = <&mpic>; | ||
378 | interrupts = <20 2>; | ||
379 | }; | ||
380 | dma-channel@80 { | ||
381 | compatible = "fsl,mpc8572-dma-channel", | ||
382 | "fsl,eloplus-dma-channel"; | ||
383 | reg = <0x80 0x80>; | ||
384 | cell-index = <1>; | ||
385 | interrupt-parent = <&mpic>; | ||
386 | interrupts = <21 2>; | ||
387 | }; | ||
388 | dma-channel@100 { | ||
389 | compatible = "fsl,mpc8572-dma-channel", | ||
390 | "fsl,eloplus-dma-channel"; | ||
391 | reg = <0x100 0x80>; | ||
392 | cell-index = <2>; | ||
393 | interrupt-parent = <&mpic>; | ||
394 | interrupts = <22 2>; | ||
395 | }; | ||
396 | dma-channel@180 { | ||
397 | compatible = "fsl,mpc8572-dma-channel", | ||
398 | "fsl,eloplus-dma-channel"; | ||
399 | reg = <0x180 0x80>; | ||
400 | cell-index = <3>; | ||
401 | interrupt-parent = <&mpic>; | ||
402 | interrupts = <23 2>; | ||
403 | }; | ||
404 | }; | ||
405 | |||
406 | /* eTSEC 1 */ | ||
407 | enet0: ethernet@24000 { | ||
408 | #address-cells = <1>; | ||
409 | #size-cells = <1>; | ||
410 | cell-index = <0>; | ||
411 | device_type = "network"; | ||
412 | model = "eTSEC"; | ||
413 | compatible = "gianfar"; | ||
414 | reg = <0x24000 0x1000>; | ||
415 | ranges = <0x0 0x24000 0x1000>; | ||
416 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
417 | interrupts = <29 2 30 2 34 2>; | ||
418 | interrupt-parent = <&mpic>; | ||
419 | tbi-handle = <&tbi0>; | ||
420 | phy-handle = <&phy0>; | ||
421 | phy-connection-type = "sgmii"; | ||
422 | |||
423 | mdio@520 { | ||
424 | #address-cells = <1>; | ||
425 | #size-cells = <0>; | ||
426 | compatible = "fsl,gianfar-mdio"; | ||
427 | reg = <0x520 0x20>; | ||
428 | |||
429 | phy0: ethernet-phy@1 { | ||
430 | interrupt-parent = <&mpic>; | ||
431 | interrupts = <8 1>; | ||
432 | reg = <0x1>; | ||
433 | }; | ||
434 | phy1: ethernet-phy@2 { | ||
435 | interrupt-parent = <&mpic>; | ||
436 | interrupts = <8 1>; | ||
437 | reg = <0x2>; | ||
438 | }; | ||
439 | tbi0: tbi-phy@11 { | ||
440 | reg = <0x11>; | ||
441 | device_type = "tbi-phy"; | ||
442 | }; | ||
443 | }; | ||
444 | }; | ||
445 | |||
446 | /* eTSEC 2 */ | ||
447 | enet1: ethernet@25000 { | ||
448 | #address-cells = <1>; | ||
449 | #size-cells = <1>; | ||
450 | cell-index = <1>; | ||
451 | device_type = "network"; | ||
452 | model = "eTSEC"; | ||
453 | compatible = "gianfar"; | ||
454 | reg = <0x25000 0x1000>; | ||
455 | ranges = <0x0 0x25000 0x1000>; | ||
456 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
457 | interrupts = <35 2 36 2 40 2>; | ||
458 | interrupt-parent = <&mpic>; | ||
459 | tbi-handle = <&tbi1>; | ||
460 | phy-handle = <&phy1>; | ||
461 | phy-connection-type = "sgmii"; | ||
462 | |||
463 | mdio@520 { | ||
464 | #address-cells = <1>; | ||
465 | #size-cells = <0>; | ||
466 | compatible = "fsl,gianfar-tbi"; | ||
467 | reg = <0x520 0x20>; | ||
468 | |||
469 | tbi1: tbi-phy@11 { | ||
470 | reg = <0x11>; | ||
471 | device_type = "tbi-phy"; | ||
472 | }; | ||
473 | }; | ||
474 | }; | ||
475 | |||
476 | /* UART0 */ | ||
477 | serial0: serial@4500 { | ||
478 | cell-index = <0>; | ||
479 | device_type = "serial"; | ||
480 | compatible = "ns16550"; | ||
481 | reg = <0x4500 0x100>; | ||
482 | clock-frequency = <0>; | ||
483 | interrupts = <42 2>; | ||
484 | interrupt-parent = <&mpic>; | ||
485 | }; | ||
486 | |||
487 | /* UART1 */ | ||
488 | serial1: serial@4600 { | ||
489 | cell-index = <1>; | ||
490 | device_type = "serial"; | ||
491 | compatible = "ns16550"; | ||
492 | reg = <0x4600 0x100>; | ||
493 | clock-frequency = <0>; | ||
494 | interrupts = <42 2>; | ||
495 | interrupt-parent = <&mpic>; | ||
496 | }; | ||
497 | |||
498 | global-utilities@e0000 { //global utilities block | ||
499 | compatible = "fsl,mpc8572-guts"; | ||
500 | reg = <0xe0000 0x1000>; | ||
501 | fsl,has-rstcr; | ||
502 | }; | ||
503 | |||
504 | msi@41600 { | ||
505 | compatible = "fsl,mpc8572-msi", "fsl,mpic-msi"; | ||
506 | reg = <0x41600 0x80>; | ||
507 | msi-available-ranges = <0 0x100>; | ||
508 | interrupts = < | ||
509 | 0xe0 0 | ||
510 | 0xe1 0 | ||
511 | 0xe2 0 | ||
512 | 0xe3 0 | ||
513 | 0xe4 0 | ||
514 | 0xe5 0 | ||
515 | 0xe6 0 | ||
516 | 0xe7 0>; | ||
517 | interrupt-parent = <&mpic>; | ||
518 | }; | ||
519 | |||
520 | crypto@30000 { | ||
521 | compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2", | ||
522 | "fsl,sec2.1", "fsl,sec2.0"; | ||
523 | reg = <0x30000 0x10000>; | ||
524 | interrupts = <45 2 58 2>; | ||
525 | interrupt-parent = <&mpic>; | ||
526 | fsl,num-channels = <4>; | ||
527 | fsl,channel-fifo-len = <24>; | ||
528 | fsl,exec-units-mask = <0x9fe>; | ||
529 | fsl,descriptor-types-mask = <0x3ab0ebf>; | ||
530 | }; | ||
531 | |||
532 | mpic: pic@40000 { | ||
533 | interrupt-controller; | ||
534 | #address-cells = <0>; | ||
535 | #interrupt-cells = <2>; | ||
536 | reg = <0x40000 0x40000>; | ||
537 | compatible = "chrp,open-pic"; | ||
538 | device_type = "open-pic"; | ||
539 | }; | ||
540 | |||
541 | gpio0: gpio@f000 { | ||
542 | compatible = "fsl,mpc8572-gpio"; | ||
543 | reg = <0xf000 0x1000>; | ||
544 | interrupts = <47 2>; | ||
545 | interrupt-parent = <&mpic>; | ||
546 | #gpio-cells = <2>; | ||
547 | gpio-controller; | ||
548 | }; | ||
549 | |||
550 | gpio-leds { | ||
551 | compatible = "gpio-leds"; | ||
552 | |||
553 | heartbeat { | ||
554 | label = "Heartbeat"; | ||
555 | gpios = <&gpio0 4 1>; | ||
556 | linux,default-trigger = "heartbeat"; | ||
557 | }; | ||
558 | |||
559 | yellow { | ||
560 | label = "Yellow"; | ||
561 | gpios = <&gpio0 5 1>; | ||
562 | }; | ||
563 | |||
564 | red { | ||
565 | label = "Red"; | ||
566 | gpios = <&gpio0 6 1>; | ||
567 | }; | ||
568 | |||
569 | green { | ||
570 | label = "Green"; | ||
571 | gpios = <&gpio0 7 1>; | ||
572 | }; | ||
573 | }; | ||
574 | |||
575 | /* PME (pattern-matcher) */ | ||
576 | pme@10000 { | ||
577 | compatible = "fsl,mpc8572-pme", "pme8572"; | ||
578 | reg = <0x10000 0x5000>; | ||
579 | interrupts = <57 2 64 2 65 2 66 2 67 2>; | ||
580 | interrupt-parent = <&mpic>; | ||
581 | }; | ||
582 | |||
583 | tlu@2f000 { | ||
584 | compatible = "fsl,mpc8572-tlu", "fsl_tlu"; | ||
585 | reg = <0x2f000 0x1000>; | ||
586 | interupts = <61 2 >; | ||
587 | interrupt-parent = <&mpic>; | ||
588 | }; | ||
589 | |||
590 | tlu@15000 { | ||
591 | compatible = "fsl,mpc8572-tlu", "fsl_tlu"; | ||
592 | reg = <0x15000 0x1000>; | ||
593 | interupts = <75 2>; | ||
594 | interrupt-parent = <&mpic>; | ||
595 | }; | ||
596 | }; | ||
597 | |||
598 | /* PCI Express controller 3 - CompactPCI bus via PEX8112 bridge */ | ||
599 | pci0: pcie@ef008000 { | ||
600 | compatible = "fsl,mpc8548-pcie"; | ||
601 | device_type = "pci"; | ||
602 | #interrupt-cells = <1>; | ||
603 | #size-cells = <2>; | ||
604 | #address-cells = <3>; | ||
605 | reg = <0 0xef008000 0 0x1000>; | ||
606 | bus-range = <0 255>; | ||
607 | ranges = <0x2000000 0x0 0xe0000000 0 0xe0000000 0x0 0x10000000 | ||
608 | 0x1000000 0x0 0x00000000 0 0xe9000000 0x0 0x10000>; | ||
609 | clock-frequency = <33333333>; | ||
610 | interrupt-parent = <&mpic>; | ||
611 | interrupts = <24 2>; | ||
612 | interrupt-map-mask = <0xff00 0x0 0x0 0x7>; | ||
613 | interrupt-map = < | ||
614 | 0x0 0x0 0x0 0x1 &mpic 0x0 0x1 | ||
615 | 0x0 0x0 0x0 0x2 &mpic 0x1 0x1 | ||
616 | 0x0 0x0 0x0 0x3 &mpic 0x2 0x1 | ||
617 | 0x0 0x0 0x0 0x4 &mpic 0x3 0x1 | ||
618 | >; | ||
619 | pcie@0 { | ||
620 | reg = <0x0 0x0 0x0 0x0 0x0>; | ||
621 | #size-cells = <2>; | ||
622 | #address-cells = <3>; | ||
623 | device_type = "pci"; | ||
624 | ranges = <0x02000000 0x0 0xe0000000 | ||
625 | 0x02000000 0x0 0xe0000000 | ||
626 | 0x0 0x10000000 | ||
627 | |||
628 | 0x01000000 0x0 0x0 | ||
629 | 0x01000000 0x0 0x0 | ||
630 | 0x0 0x100000>; | ||
631 | }; | ||
632 | }; | ||
633 | |||
634 | /* PCI Express controller 2, PMC module via PEX8112 bridge */ | ||
635 | pci1: pcie@ef009000 { | ||
636 | compatible = "fsl,mpc8548-pcie"; | ||
637 | device_type = "pci"; | ||
638 | #interrupt-cells = <1>; | ||
639 | #size-cells = <2>; | ||
640 | #address-cells = <3>; | ||
641 | reg = <0 0xef009000 0 0x1000>; | ||
642 | bus-range = <0 255>; | ||
643 | ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x10000000 | ||
644 | 0x1000000 0x0 0x00000000 0 0xe8800000 0x0 0x10000>; | ||
645 | clock-frequency = <33333333>; | ||
646 | interrupt-parent = <&mpic>; | ||
647 | interrupts = <25 2>; | ||
648 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; | ||
649 | interrupt-map = < | ||
650 | /* IDSEL 0x0 */ | ||
651 | 0x0 0x0 0x0 0x1 &mpic 0x4 0x1 | ||
652 | 0x0 0x0 0x0 0x2 &mpic 0x5 0x1 | ||
653 | 0x0 0x0 0x0 0x3 &mpic 0x6 0x1 | ||
654 | 0x0 0x0 0x0 0x4 &mpic 0x7 0x1 | ||
655 | >; | ||
656 | pcie@0 { | ||
657 | reg = <0x0 0x0 0x0 0x0 0x0>; | ||
658 | #size-cells = <2>; | ||
659 | #address-cells = <3>; | ||
660 | device_type = "pci"; | ||
661 | ranges = <0x2000000 0x0 0xc0000000 | ||
662 | 0x2000000 0x0 0xc0000000 | ||
663 | 0x0 0x10000000 | ||
664 | |||
665 | 0x1000000 0x0 0x0 | ||
666 | 0x1000000 0x0 0x0 | ||
667 | 0x0 0x100000>; | ||
668 | }; | ||
669 | }; | ||
670 | |||
671 | /* PCI Express controller 1, XMC P15 */ | ||
672 | pci2: pcie@ef00a000 { | ||
673 | compatible = "fsl,mpc8548-pcie"; | ||
674 | device_type = "pci"; | ||
675 | #interrupt-cells = <1>; | ||
676 | #size-cells = <2>; | ||
677 | #address-cells = <3>; | ||
678 | reg = <0 0xef00a000 0 0x1000>; | ||
679 | bus-range = <0 255>; | ||
680 | ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x40000000 | ||
681 | 0x1000000 0x0 0x00000000 0 0xe8000000 0x0 0x10000>; | ||
682 | clock-frequency = <33333333>; | ||
683 | interrupt-parent = <&mpic>; | ||
684 | interrupts = <26 2>; | ||
685 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; | ||
686 | interrupt-map = < | ||
687 | /* IDSEL 0x0 */ | ||
688 | 0x0 0x0 0x0 0x1 &mpic 0x0 0x1 | ||
689 | 0x0 0x0 0x0 0x2 &mpic 0x1 0x1 | ||
690 | 0x0 0x0 0x0 0x3 &mpic 0x2 0x1 | ||
691 | 0x0 0x0 0x0 0x4 &mpic 0x3 0x1 | ||
692 | >; | ||
693 | pcie@0 { | ||
694 | reg = <0x0 0x0 0x0 0x0 0x0>; | ||
695 | #size-cells = <2>; | ||
696 | #address-cells = <3>; | ||
697 | device_type = "pci"; | ||
698 | ranges = <0x2000000 0x0 0x80000000 | ||
699 | 0x2000000 0x0 0x80000000 | ||
700 | 0x0 0x40000000 | ||
701 | |||
702 | 0x1000000 0x0 0x0 | ||
703 | 0x1000000 0x0 0x0 | ||
704 | 0x0 0x100000>; | ||
705 | }; | ||
706 | }; | ||
707 | }; | ||
diff --git a/arch/powerpc/boot/dts/xpedite5370.dts b/arch/powerpc/boot/dts/xpedite5370.dts new file mode 100644 index 000000000000..7a8a4afd56cf --- /dev/null +++ b/arch/powerpc/boot/dts/xpedite5370.dts | |||
@@ -0,0 +1,638 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2008 Extreme Engineering Solutions, Inc. | ||
3 | * Based on MPC8572DS device tree from Freescale Semiconductor, Inc. | ||
4 | * | ||
5 | * XPedite5370 3U VPX single-board computer based on MPC8572E | ||
6 | * | ||
7 | * This is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | */ | ||
11 | |||
12 | /dts-v1/; | ||
13 | / { | ||
14 | model = "xes,xpedite5370"; | ||
15 | compatible = "xes,xpedite5370", "xes,MPC8572"; | ||
16 | #address-cells = <2>; | ||
17 | #size-cells = <2>; | ||
18 | |||
19 | aliases { | ||
20 | ethernet0 = &enet0; | ||
21 | ethernet1 = &enet1; | ||
22 | serial0 = &serial0; | ||
23 | serial1 = &serial1; | ||
24 | pci1 = &pci1; | ||
25 | pci2 = &pci2; | ||
26 | }; | ||
27 | |||
28 | cpus { | ||
29 | #address-cells = <1>; | ||
30 | #size-cells = <0>; | ||
31 | |||
32 | PowerPC,8572@0 { | ||
33 | device_type = "cpu"; | ||
34 | reg = <0x0>; | ||
35 | d-cache-line-size = <32>; // 32 bytes | ||
36 | i-cache-line-size = <32>; // 32 bytes | ||
37 | d-cache-size = <0x8000>; // L1, 32K | ||
38 | i-cache-size = <0x8000>; // L1, 32K | ||
39 | timebase-frequency = <0>; | ||
40 | bus-frequency = <0>; | ||
41 | clock-frequency = <0>; | ||
42 | next-level-cache = <&L2>; | ||
43 | }; | ||
44 | |||
45 | PowerPC,8572@1 { | ||
46 | device_type = "cpu"; | ||
47 | reg = <0x1>; | ||
48 | d-cache-line-size = <32>; // 32 bytes | ||
49 | i-cache-line-size = <32>; // 32 bytes | ||
50 | d-cache-size = <0x8000>; // L1, 32K | ||
51 | i-cache-size = <0x8000>; // L1, 32K | ||
52 | timebase-frequency = <0>; | ||
53 | bus-frequency = <0>; | ||
54 | clock-frequency = <0>; | ||
55 | next-level-cache = <&L2>; | ||
56 | }; | ||
57 | }; | ||
58 | |||
59 | memory { | ||
60 | device_type = "memory"; | ||
61 | reg = <0x0 0x0 0x0 0x0>; // Filled in by U-Boot | ||
62 | }; | ||
63 | |||
64 | localbus@ef005000 { | ||
65 | #address-cells = <2>; | ||
66 | #size-cells = <1>; | ||
67 | compatible = "fsl,mpc8572-elbc", "fsl,elbc", "simple-bus"; | ||
68 | reg = <0 0xef005000 0 0x1000>; | ||
69 | interrupts = <19 2>; | ||
70 | interrupt-parent = <&mpic>; | ||
71 | /* Local bus region mappings */ | ||
72 | ranges = <0 0 0 0xf8000000 0x8000000 /* CS0: Boot flash */ | ||
73 | 1 0 0 0xf0000000 0x8000000 /* CS1: Alternate flash */ | ||
74 | 2 0 0 0xef800000 0x40000 /* CS2: NAND CE1 */ | ||
75 | 3 0 0 0xef840000 0x40000>; /* CS3: NAND CE2 */ | ||
76 | |||
77 | nor-boot@0,0 { | ||
78 | compatible = "amd,s29gl01gp", "cfi-flash"; | ||
79 | bank-width = <2>; | ||
80 | reg = <0 0 0x8000000>; /* 128MB */ | ||
81 | #address-cells = <1>; | ||
82 | #size-cells = <1>; | ||
83 | partition@0 { | ||
84 | label = "Primary user space"; | ||
85 | reg = <0x00000000 0x6f00000>; /* 111 MB */ | ||
86 | }; | ||
87 | partition@6f00000 { | ||
88 | label = "Primary kernel"; | ||
89 | reg = <0x6f00000 0x1000000>; /* 16 MB */ | ||
90 | }; | ||
91 | partition@7f00000 { | ||
92 | label = "Primary DTB"; | ||
93 | reg = <0x7f00000 0x40000>; /* 256 KB */ | ||
94 | }; | ||
95 | partition@7f40000 { | ||
96 | label = "Primary U-Boot environment"; | ||
97 | reg = <0x7f40000 0x40000>; /* 256 KB */ | ||
98 | }; | ||
99 | partition@7f80000 { | ||
100 | label = "Primary U-Boot"; | ||
101 | reg = <0x7f80000 0x80000>; /* 512 KB */ | ||
102 | read-only; | ||
103 | }; | ||
104 | }; | ||
105 | |||
106 | nor-alternate@1,0 { | ||
107 | compatible = "amd,s29gl01gp", "cfi-flash"; | ||
108 | bank-width = <2>; | ||
109 | //reg = <0xf0000000 0x08000000>; /* 128MB */ | ||
110 | reg = <1 0 0x8000000>; /* 128MB */ | ||
111 | #address-cells = <1>; | ||
112 | #size-cells = <1>; | ||
113 | partition@0 { | ||
114 | label = "Secondary user space"; | ||
115 | reg = <0x00000000 0x6f00000>; /* 111 MB */ | ||
116 | }; | ||
117 | partition@6f00000 { | ||
118 | label = "Secondary kernel"; | ||
119 | reg = <0x6f00000 0x1000000>; /* 16 MB */ | ||
120 | }; | ||
121 | partition@7f00000 { | ||
122 | label = "Secondary DTB"; | ||
123 | reg = <0x7f00000 0x40000>; /* 256 KB */ | ||
124 | }; | ||
125 | partition@7f40000 { | ||
126 | label = "Secondary U-Boot environment"; | ||
127 | reg = <0x7f40000 0x40000>; /* 256 KB */ | ||
128 | }; | ||
129 | partition@7f80000 { | ||
130 | label = "Secondary U-Boot"; | ||
131 | reg = <0x7f80000 0x80000>; /* 512 KB */ | ||
132 | read-only; | ||
133 | }; | ||
134 | }; | ||
135 | |||
136 | nand@2,0 { | ||
137 | #address-cells = <1>; | ||
138 | #size-cells = <1>; | ||
139 | /* | ||
140 | * Actual part could be ST Micro NAND08GW3B2A (1 GB), | ||
141 | * Micron MT29F8G08DAA (2x 512 MB), or Micron | ||
142 | * MT29F16G08FAA (2x 1 GB), depending on the build | ||
143 | * configuration | ||
144 | */ | ||
145 | compatible = "fsl,mpc8572-fcm-nand", | ||
146 | "fsl,elbc-fcm-nand"; | ||
147 | reg = <2 0 0x40000>; | ||
148 | /* U-Boot should fix this up if chip size > 1 GB */ | ||
149 | partition@0 { | ||
150 | label = "NAND Filesystem"; | ||
151 | reg = <0 0x40000000>; | ||
152 | }; | ||
153 | }; | ||
154 | |||
155 | }; | ||
156 | |||
157 | soc8572@ef000000 { | ||
158 | #address-cells = <1>; | ||
159 | #size-cells = <1>; | ||
160 | device_type = "soc"; | ||
161 | compatible = "fsl,mpc8572-immr", "simple-bus"; | ||
162 | ranges = <0x0 0 0xef000000 0x100000>; | ||
163 | bus-frequency = <0>; // Filled out by uboot. | ||
164 | |||
165 | ecm-law@0 { | ||
166 | compatible = "fsl,ecm-law"; | ||
167 | reg = <0x0 0x1000>; | ||
168 | fsl,num-laws = <12>; | ||
169 | }; | ||
170 | |||
171 | ecm@1000 { | ||
172 | compatible = "fsl,mpc8572-ecm", "fsl,ecm"; | ||
173 | reg = <0x1000 0x1000>; | ||
174 | interrupts = <17 2>; | ||
175 | interrupt-parent = <&mpic>; | ||
176 | }; | ||
177 | |||
178 | memory-controller@2000 { | ||
179 | compatible = "fsl,mpc8572-memory-controller"; | ||
180 | reg = <0x2000 0x1000>; | ||
181 | interrupt-parent = <&mpic>; | ||
182 | interrupts = <18 2>; | ||
183 | }; | ||
184 | |||
185 | memory-controller@6000 { | ||
186 | compatible = "fsl,mpc8572-memory-controller"; | ||
187 | reg = <0x6000 0x1000>; | ||
188 | interrupt-parent = <&mpic>; | ||
189 | interrupts = <18 2>; | ||
190 | }; | ||
191 | |||
192 | L2: l2-cache-controller@20000 { | ||
193 | compatible = "fsl,mpc8572-l2-cache-controller"; | ||
194 | reg = <0x20000 0x1000>; | ||
195 | cache-line-size = <32>; // 32 bytes | ||
196 | cache-size = <0x100000>; // L2, 1M | ||
197 | interrupt-parent = <&mpic>; | ||
198 | interrupts = <16 2>; | ||
199 | }; | ||
200 | |||
201 | i2c@3000 { | ||
202 | #address-cells = <1>; | ||
203 | #size-cells = <0>; | ||
204 | cell-index = <0>; | ||
205 | compatible = "fsl-i2c"; | ||
206 | reg = <0x3000 0x100>; | ||
207 | interrupts = <43 2>; | ||
208 | interrupt-parent = <&mpic>; | ||
209 | dfsrr; | ||
210 | |||
211 | temp-sensor@48 { | ||
212 | compatible = "dallas,ds1631", "dallas,ds1621"; | ||
213 | reg = <0x48>; | ||
214 | }; | ||
215 | |||
216 | temp-sensor@4c { | ||
217 | compatible = "adi,adt7461"; | ||
218 | reg = <0x4c>; | ||
219 | }; | ||
220 | |||
221 | cpu-supervisor@51 { | ||
222 | compatible = "dallas,ds4510"; | ||
223 | reg = <0x51>; | ||
224 | }; | ||
225 | |||
226 | eeprom@54 { | ||
227 | compatible = "atmel,at24c128b"; | ||
228 | reg = <0x54>; | ||
229 | }; | ||
230 | |||
231 | rtc@68 { | ||
232 | compatible = "stm,m41t00", | ||
233 | "dallas,ds1338"; | ||
234 | reg = <0x68>; | ||
235 | }; | ||
236 | |||
237 | pcie-switch@70 { | ||
238 | compatible = "plx,pex8518"; | ||
239 | reg = <0x70>; | ||
240 | }; | ||
241 | |||
242 | gpio1: gpio@18 { | ||
243 | compatible = "nxp,pca9557"; | ||
244 | reg = <0x18>; | ||
245 | #gpio-cells = <2>; | ||
246 | gpio-controller; | ||
247 | polarity = <0x00>; | ||
248 | }; | ||
249 | |||
250 | gpio2: gpio@1c { | ||
251 | compatible = "nxp,pca9557"; | ||
252 | reg = <0x1c>; | ||
253 | #gpio-cells = <2>; | ||
254 | gpio-controller; | ||
255 | polarity = <0x00>; | ||
256 | }; | ||
257 | |||
258 | gpio3: gpio@1e { | ||
259 | compatible = "nxp,pca9557"; | ||
260 | reg = <0x1e>; | ||
261 | #gpio-cells = <2>; | ||
262 | gpio-controller; | ||
263 | polarity = <0x00>; | ||
264 | }; | ||
265 | |||
266 | gpio4: gpio@1f { | ||
267 | compatible = "nxp,pca9557"; | ||
268 | reg = <0x1f>; | ||
269 | #gpio-cells = <2>; | ||
270 | gpio-controller; | ||
271 | polarity = <0x00>; | ||
272 | }; | ||
273 | }; | ||
274 | |||
275 | i2c@3100 { | ||
276 | #address-cells = <1>; | ||
277 | #size-cells = <0>; | ||
278 | cell-index = <1>; | ||
279 | compatible = "fsl-i2c"; | ||
280 | reg = <0x3100 0x100>; | ||
281 | interrupts = <43 2>; | ||
282 | interrupt-parent = <&mpic>; | ||
283 | dfsrr; | ||
284 | }; | ||
285 | |||
286 | dma@c300 { | ||
287 | #address-cells = <1>; | ||
288 | #size-cells = <1>; | ||
289 | compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma"; | ||
290 | reg = <0xc300 0x4>; | ||
291 | ranges = <0x0 0xc100 0x200>; | ||
292 | cell-index = <1>; | ||
293 | dma-channel@0 { | ||
294 | compatible = "fsl,mpc8572-dma-channel", | ||
295 | "fsl,eloplus-dma-channel"; | ||
296 | reg = <0x0 0x80>; | ||
297 | cell-index = <0>; | ||
298 | interrupt-parent = <&mpic>; | ||
299 | interrupts = <76 2>; | ||
300 | }; | ||
301 | dma-channel@80 { | ||
302 | compatible = "fsl,mpc8572-dma-channel", | ||
303 | "fsl,eloplus-dma-channel"; | ||
304 | reg = <0x80 0x80>; | ||
305 | cell-index = <1>; | ||
306 | interrupt-parent = <&mpic>; | ||
307 | interrupts = <77 2>; | ||
308 | }; | ||
309 | dma-channel@100 { | ||
310 | compatible = "fsl,mpc8572-dma-channel", | ||
311 | "fsl,eloplus-dma-channel"; | ||
312 | reg = <0x100 0x80>; | ||
313 | cell-index = <2>; | ||
314 | interrupt-parent = <&mpic>; | ||
315 | interrupts = <78 2>; | ||
316 | }; | ||
317 | dma-channel@180 { | ||
318 | compatible = "fsl,mpc8572-dma-channel", | ||
319 | "fsl,eloplus-dma-channel"; | ||
320 | reg = <0x180 0x80>; | ||
321 | cell-index = <3>; | ||
322 | interrupt-parent = <&mpic>; | ||
323 | interrupts = <79 2>; | ||
324 | }; | ||
325 | }; | ||
326 | |||
327 | dma@21300 { | ||
328 | #address-cells = <1>; | ||
329 | #size-cells = <1>; | ||
330 | compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma"; | ||
331 | reg = <0x21300 0x4>; | ||
332 | ranges = <0x0 0x21100 0x200>; | ||
333 | cell-index = <0>; | ||
334 | dma-channel@0 { | ||
335 | compatible = "fsl,mpc8572-dma-channel", | ||
336 | "fsl,eloplus-dma-channel"; | ||
337 | reg = <0x0 0x80>; | ||
338 | cell-index = <0>; | ||
339 | interrupt-parent = <&mpic>; | ||
340 | interrupts = <20 2>; | ||
341 | }; | ||
342 | dma-channel@80 { | ||
343 | compatible = "fsl,mpc8572-dma-channel", | ||
344 | "fsl,eloplus-dma-channel"; | ||
345 | reg = <0x80 0x80>; | ||
346 | cell-index = <1>; | ||
347 | interrupt-parent = <&mpic>; | ||
348 | interrupts = <21 2>; | ||
349 | }; | ||
350 | dma-channel@100 { | ||
351 | compatible = "fsl,mpc8572-dma-channel", | ||
352 | "fsl,eloplus-dma-channel"; | ||
353 | reg = <0x100 0x80>; | ||
354 | cell-index = <2>; | ||
355 | interrupt-parent = <&mpic>; | ||
356 | interrupts = <22 2>; | ||
357 | }; | ||
358 | dma-channel@180 { | ||
359 | compatible = "fsl,mpc8572-dma-channel", | ||
360 | "fsl,eloplus-dma-channel"; | ||
361 | reg = <0x180 0x80>; | ||
362 | cell-index = <3>; | ||
363 | interrupt-parent = <&mpic>; | ||
364 | interrupts = <23 2>; | ||
365 | }; | ||
366 | }; | ||
367 | |||
368 | /* eTSEC 1 */ | ||
369 | enet0: ethernet@24000 { | ||
370 | #address-cells = <1>; | ||
371 | #size-cells = <1>; | ||
372 | cell-index = <0>; | ||
373 | device_type = "network"; | ||
374 | model = "eTSEC"; | ||
375 | compatible = "gianfar"; | ||
376 | reg = <0x24000 0x1000>; | ||
377 | ranges = <0x0 0x24000 0x1000>; | ||
378 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
379 | interrupts = <29 2 30 2 34 2>; | ||
380 | interrupt-parent = <&mpic>; | ||
381 | tbi-handle = <&tbi0>; | ||
382 | phy-handle = <&phy0>; | ||
383 | phy-connection-type = "sgmii"; | ||
384 | |||
385 | mdio@520 { | ||
386 | #address-cells = <1>; | ||
387 | #size-cells = <0>; | ||
388 | compatible = "fsl,gianfar-mdio"; | ||
389 | reg = <0x520 0x20>; | ||
390 | |||
391 | phy0: ethernet-phy@1 { | ||
392 | interrupt-parent = <&mpic>; | ||
393 | interrupts = <8 1>; | ||
394 | reg = <0x1>; | ||
395 | }; | ||
396 | phy1: ethernet-phy@2 { | ||
397 | interrupt-parent = <&mpic>; | ||
398 | interrupts = <8 1>; | ||
399 | reg = <0x2>; | ||
400 | }; | ||
401 | tbi0: tbi-phy@11 { | ||
402 | reg = <0x11>; | ||
403 | device_type = "tbi-phy"; | ||
404 | }; | ||
405 | }; | ||
406 | }; | ||
407 | |||
408 | /* eTSEC 2 */ | ||
409 | enet1: ethernet@25000 { | ||
410 | #address-cells = <1>; | ||
411 | #size-cells = <1>; | ||
412 | cell-index = <1>; | ||
413 | device_type = "network"; | ||
414 | model = "eTSEC"; | ||
415 | compatible = "gianfar"; | ||
416 | reg = <0x25000 0x1000>; | ||
417 | ranges = <0x0 0x25000 0x1000>; | ||
418 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
419 | interrupts = <35 2 36 2 40 2>; | ||
420 | interrupt-parent = <&mpic>; | ||
421 | tbi-handle = <&tbi1>; | ||
422 | phy-handle = <&phy1>; | ||
423 | phy-connection-type = "sgmii"; | ||
424 | |||
425 | mdio@520 { | ||
426 | #address-cells = <1>; | ||
427 | #size-cells = <0>; | ||
428 | compatible = "fsl,gianfar-tbi"; | ||
429 | reg = <0x520 0x20>; | ||
430 | |||
431 | tbi1: tbi-phy@11 { | ||
432 | reg = <0x11>; | ||
433 | device_type = "tbi-phy"; | ||
434 | }; | ||
435 | }; | ||
436 | }; | ||
437 | |||
438 | /* UART0 */ | ||
439 | serial0: serial@4500 { | ||
440 | cell-index = <0>; | ||
441 | device_type = "serial"; | ||
442 | compatible = "ns16550"; | ||
443 | reg = <0x4500 0x100>; | ||
444 | clock-frequency = <0>; | ||
445 | interrupts = <42 2>; | ||
446 | interrupt-parent = <&mpic>; | ||
447 | }; | ||
448 | |||
449 | /* UART1 */ | ||
450 | serial1: serial@4600 { | ||
451 | cell-index = <1>; | ||
452 | device_type = "serial"; | ||
453 | compatible = "ns16550"; | ||
454 | reg = <0x4600 0x100>; | ||
455 | clock-frequency = <0>; | ||
456 | interrupts = <42 2>; | ||
457 | interrupt-parent = <&mpic>; | ||
458 | }; | ||
459 | |||
460 | global-utilities@e0000 { //global utilities block | ||
461 | compatible = "fsl,mpc8572-guts"; | ||
462 | reg = <0xe0000 0x1000>; | ||
463 | fsl,has-rstcr; | ||
464 | }; | ||
465 | |||
466 | msi@41600 { | ||
467 | compatible = "fsl,mpc8572-msi", "fsl,mpic-msi"; | ||
468 | reg = <0x41600 0x80>; | ||
469 | msi-available-ranges = <0 0x100>; | ||
470 | interrupts = < | ||
471 | 0xe0 0 | ||
472 | 0xe1 0 | ||
473 | 0xe2 0 | ||
474 | 0xe3 0 | ||
475 | 0xe4 0 | ||
476 | 0xe5 0 | ||
477 | 0xe6 0 | ||
478 | 0xe7 0>; | ||
479 | interrupt-parent = <&mpic>; | ||
480 | }; | ||
481 | |||
482 | crypto@30000 { | ||
483 | compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2", | ||
484 | "fsl,sec2.1", "fsl,sec2.0"; | ||
485 | reg = <0x30000 0x10000>; | ||
486 | interrupts = <45 2 58 2>; | ||
487 | interrupt-parent = <&mpic>; | ||
488 | fsl,num-channels = <4>; | ||
489 | fsl,channel-fifo-len = <24>; | ||
490 | fsl,exec-units-mask = <0x9fe>; | ||
491 | fsl,descriptor-types-mask = <0x3ab0ebf>; | ||
492 | }; | ||
493 | |||
494 | mpic: pic@40000 { | ||
495 | interrupt-controller; | ||
496 | #address-cells = <0>; | ||
497 | #interrupt-cells = <2>; | ||
498 | reg = <0x40000 0x40000>; | ||
499 | compatible = "chrp,open-pic"; | ||
500 | device_type = "open-pic"; | ||
501 | }; | ||
502 | |||
503 | gpio0: gpio@f000 { | ||
504 | compatible = "fsl,mpc8572-gpio"; | ||
505 | reg = <0xf000 0x1000>; | ||
506 | interrupts = <47 2>; | ||
507 | interrupt-parent = <&mpic>; | ||
508 | #gpio-cells = <2>; | ||
509 | gpio-controller; | ||
510 | }; | ||
511 | |||
512 | gpio-leds { | ||
513 | compatible = "gpio-leds"; | ||
514 | |||
515 | heartbeat { | ||
516 | label = "Heartbeat"; | ||
517 | gpios = <&gpio0 4 1>; | ||
518 | linux,default-trigger = "heartbeat"; | ||
519 | }; | ||
520 | |||
521 | yellow { | ||
522 | label = "Yellow"; | ||
523 | gpios = <&gpio0 5 1>; | ||
524 | }; | ||
525 | |||
526 | red { | ||
527 | label = "Red"; | ||
528 | gpios = <&gpio0 6 1>; | ||
529 | }; | ||
530 | |||
531 | green { | ||
532 | label = "Green"; | ||
533 | gpios = <&gpio0 7 1>; | ||
534 | }; | ||
535 | }; | ||
536 | |||
537 | /* PME (pattern-matcher) */ | ||
538 | pme@10000 { | ||
539 | compatible = "fsl,mpc8572-pme", "pme8572"; | ||
540 | reg = <0x10000 0x5000>; | ||
541 | interrupts = <57 2 64 2 65 2 66 2 67 2>; | ||
542 | interrupt-parent = <&mpic>; | ||
543 | }; | ||
544 | |||
545 | tlu@2f000 { | ||
546 | compatible = "fsl,mpc8572-tlu", "fsl_tlu"; | ||
547 | reg = <0x2f000 0x1000>; | ||
548 | interupts = <61 2 >; | ||
549 | interrupt-parent = <&mpic>; | ||
550 | }; | ||
551 | |||
552 | tlu@15000 { | ||
553 | compatible = "fsl,mpc8572-tlu", "fsl_tlu"; | ||
554 | reg = <0x15000 0x1000>; | ||
555 | interupts = <75 2>; | ||
556 | interrupt-parent = <&mpic>; | ||
557 | }; | ||
558 | }; | ||
559 | |||
560 | /* | ||
561 | * PCI Express controller 3 @ ef008000 is not used. | ||
562 | * This would have been pci0 on other mpc85xx platforms. | ||
563 | */ | ||
564 | |||
565 | /* PCI Express controller 2, wired to VPX P1,P2 backplane */ | ||
566 | pci1: pcie@ef009000 { | ||
567 | compatible = "fsl,mpc8548-pcie"; | ||
568 | device_type = "pci"; | ||
569 | #interrupt-cells = <1>; | ||
570 | #size-cells = <2>; | ||
571 | #address-cells = <3>; | ||
572 | reg = <0 0xef009000 0 0x1000>; | ||
573 | bus-range = <0 255>; | ||
574 | ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x10000000 | ||
575 | 0x1000000 0x0 0x00000000 0 0xe8800000 0x0 0x00010000>; | ||
576 | clock-frequency = <33333333>; | ||
577 | interrupt-parent = <&mpic>; | ||
578 | interrupts = <25 2>; | ||
579 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; | ||
580 | interrupt-map = < | ||
581 | /* IDSEL 0x0 */ | ||
582 | 0x0 0x0 0x0 0x1 &mpic 0x4 0x1 | ||
583 | 0x0 0x0 0x0 0x2 &mpic 0x5 0x1 | ||
584 | 0x0 0x0 0x0 0x3 &mpic 0x6 0x1 | ||
585 | 0x0 0x0 0x0 0x4 &mpic 0x7 0x1 | ||
586 | >; | ||
587 | pcie@0 { | ||
588 | reg = <0x00000000 0x00000000 0x00000000 0x00000000 0x00000000>; | ||
589 | #size-cells = <2>; | ||
590 | #address-cells = <3>; | ||
591 | device_type = "pci"; | ||
592 | ranges = <0x2000000 0x0 0xc0000000 | ||
593 | 0x2000000 0x0 0xc0000000 | ||
594 | 0x0 0x10000000 | ||
595 | |||
596 | 0x1000000 0x0 0x0 | ||
597 | 0x1000000 0x0 0x0 | ||
598 | 0x0 0x100000>; | ||
599 | }; | ||
600 | }; | ||
601 | |||
602 | /* PCI Express controller 1, wired to PEX8518 PCIe switch */ | ||
603 | pci2: pcie@ef00a000 { | ||
604 | compatible = "fsl,mpc8548-pcie"; | ||
605 | device_type = "pci"; | ||
606 | #interrupt-cells = <1>; | ||
607 | #size-cells = <2>; | ||
608 | #address-cells = <3>; | ||
609 | reg = <0 0xef00a000 0 0x1000>; | ||
610 | bus-range = <0 255>; | ||
611 | ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x40000000 | ||
612 | 0x1000000 0x0 0x00000000 0 0xe8000000 0x0 0x10000>; | ||
613 | clock-frequency = <33333333>; | ||
614 | interrupt-parent = <&mpic>; | ||
615 | interrupts = <26 2>; | ||
616 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; | ||
617 | interrupt-map = < | ||
618 | /* IDSEL 0x0 */ | ||
619 | 0x0 0x0 0x0 0x1 &mpic 0x0 0x1 | ||
620 | 0x0 0x0 0x0 0x2 &mpic 0x1 0x1 | ||
621 | 0x0 0x0 0x0 0x3 &mpic 0x2 0x1 | ||
622 | 0x0 0x0 0x0 0x4 &mpic 0x3 0x1 | ||
623 | >; | ||
624 | pcie@0 { | ||
625 | reg = <0x0 0x0 0x0 0x0 0x0>; | ||
626 | #size-cells = <2>; | ||
627 | #address-cells = <3>; | ||
628 | device_type = "pci"; | ||
629 | ranges = <0x2000000 0x0 0x80000000 | ||
630 | 0x2000000 0x0 0x80000000 | ||
631 | 0x0 0x40000000 | ||
632 | |||
633 | 0x1000000 0x0 0x0 | ||
634 | 0x1000000 0x0 0x0 | ||
635 | 0x0 0x100000>; | ||
636 | }; | ||
637 | }; | ||
638 | }; | ||
diff --git a/arch/powerpc/boot/wrapper b/arch/powerpc/boot/wrapper index 3ac75aecdb94..4db487d1d2a8 100755 --- a/arch/powerpc/boot/wrapper +++ b/arch/powerpc/boot/wrapper | |||
@@ -225,6 +225,10 @@ asp834x-redboot) | |||
225 | platformo="$object/fixed-head.o $object/redboot-83xx.o" | 225 | platformo="$object/fixed-head.o $object/redboot-83xx.o" |
226 | binary=y | 226 | binary=y |
227 | ;; | 227 | ;; |
228 | xpedite52*) | ||
229 | link_address='0x1400000' | ||
230 | platformo=$object/cuboot-85xx.o | ||
231 | ;; | ||
228 | esac | 232 | esac |
229 | 233 | ||
230 | vmz="$tmpdir/`basename \"$kernel\"`.$ext" | 234 | vmz="$tmpdir/`basename \"$kernel\"`.$ext" |
diff --git a/arch/powerpc/configs/83xx/kmeter1_defconfig b/arch/powerpc/configs/83xx/kmeter1_defconfig new file mode 100644 index 000000000000..bf0853f29f31 --- /dev/null +++ b/arch/powerpc/configs/83xx/kmeter1_defconfig | |||
@@ -0,0 +1,908 @@ | |||
1 | # | ||
2 | # Automatically generated make config: don't edit | ||
3 | # Linux kernel version: 2.6.28 | ||
4 | # Fri Apr 3 10:34:33 2009 | ||
5 | # | ||
6 | # CONFIG_PPC64 is not set | ||
7 | |||
8 | # | ||
9 | # Processor support | ||
10 | # | ||
11 | CONFIG_6xx=y | ||
12 | # CONFIG_PPC_85xx is not set | ||
13 | # CONFIG_PPC_8xx is not set | ||
14 | # CONFIG_40x is not set | ||
15 | # CONFIG_44x is not set | ||
16 | # CONFIG_E200 is not set | ||
17 | CONFIG_PPC_FPU=y | ||
18 | # CONFIG_FSL_EMB_PERFMON is not set | ||
19 | # CONFIG_ALTIVEC is not set | ||
20 | CONFIG_PPC_STD_MMU=y | ||
21 | CONFIG_PPC_STD_MMU_32=y | ||
22 | # CONFIG_PPC_MM_SLICES is not set | ||
23 | # CONFIG_SMP is not set | ||
24 | CONFIG_PPC32=y | ||
25 | CONFIG_WORD_SIZE=32 | ||
26 | # CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set | ||
27 | CONFIG_MMU=y | ||
28 | CONFIG_GENERIC_CMOS_UPDATE=y | ||
29 | CONFIG_GENERIC_TIME=y | ||
30 | CONFIG_GENERIC_TIME_VSYSCALL=y | ||
31 | CONFIG_GENERIC_CLOCKEVENTS=y | ||
32 | CONFIG_GENERIC_HARDIRQS=y | ||
33 | # CONFIG_HAVE_SETUP_PER_CPU_AREA is not set | ||
34 | CONFIG_IRQ_PER_CPU=y | ||
35 | CONFIG_STACKTRACE_SUPPORT=y | ||
36 | CONFIG_HAVE_LATENCYTOP_SUPPORT=y | ||
37 | CONFIG_LOCKDEP_SUPPORT=y | ||
38 | CONFIG_RWSEM_XCHGADD_ALGORITHM=y | ||
39 | CONFIG_ARCH_HAS_ILOG2_U32=y | ||
40 | CONFIG_GENERIC_HWEIGHT=y | ||
41 | CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
42 | CONFIG_GENERIC_FIND_NEXT_BIT=y | ||
43 | # CONFIG_ARCH_NO_VIRT_TO_BUS is not set | ||
44 | CONFIG_PPC=y | ||
45 | CONFIG_EARLY_PRINTK=y | ||
46 | CONFIG_GENERIC_NVRAM=y | ||
47 | CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y | ||
48 | CONFIG_ARCH_MAY_HAVE_PC_FDC=y | ||
49 | CONFIG_PPC_OF=y | ||
50 | CONFIG_OF=y | ||
51 | CONFIG_PPC_UDBG_16550=y | ||
52 | # CONFIG_GENERIC_TBSYNC is not set | ||
53 | CONFIG_AUDIT_ARCH=y | ||
54 | CONFIG_GENERIC_BUG=y | ||
55 | CONFIG_DEFAULT_UIMAGE=y | ||
56 | CONFIG_ARCH_SUSPEND_POSSIBLE=y | ||
57 | # CONFIG_PPC_DCR_NATIVE is not set | ||
58 | # CONFIG_PPC_DCR_MMIO is not set | ||
59 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
60 | |||
61 | # | ||
62 | # General setup | ||
63 | # | ||
64 | CONFIG_EXPERIMENTAL=y | ||
65 | CONFIG_BROKEN_ON_SMP=y | ||
66 | CONFIG_LOCK_KERNEL=y | ||
67 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
68 | CONFIG_LOCALVERSION="" | ||
69 | CONFIG_LOCALVERSION_AUTO=y | ||
70 | # CONFIG_SWAP is not set | ||
71 | CONFIG_SYSVIPC=y | ||
72 | CONFIG_SYSVIPC_SYSCTL=y | ||
73 | CONFIG_POSIX_MQUEUE=y | ||
74 | # CONFIG_BSD_PROCESS_ACCT is not set | ||
75 | # CONFIG_TASKSTATS is not set | ||
76 | # CONFIG_AUDIT is not set | ||
77 | # CONFIG_IKCONFIG is not set | ||
78 | CONFIG_LOG_BUF_SHIFT=14 | ||
79 | # CONFIG_CGROUPS is not set | ||
80 | # CONFIG_GROUP_SCHED is not set | ||
81 | # CONFIG_SYSFS_DEPRECATED_V2 is not set | ||
82 | # CONFIG_RELAY is not set | ||
83 | # CONFIG_NAMESPACES is not set | ||
84 | # CONFIG_BLK_DEV_INITRD is not set | ||
85 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | ||
86 | CONFIG_SYSCTL=y | ||
87 | CONFIG_EMBEDDED=y | ||
88 | CONFIG_SYSCTL_SYSCALL=y | ||
89 | CONFIG_KALLSYMS=y | ||
90 | CONFIG_KALLSYMS_ALL=y | ||
91 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | ||
92 | # CONFIG_HOTPLUG is not set | ||
93 | CONFIG_PRINTK=y | ||
94 | CONFIG_BUG=y | ||
95 | CONFIG_ELF_CORE=y | ||
96 | CONFIG_COMPAT_BRK=y | ||
97 | CONFIG_BASE_FULL=y | ||
98 | CONFIG_FUTEX=y | ||
99 | CONFIG_ANON_INODES=y | ||
100 | CONFIG_EPOLL=y | ||
101 | CONFIG_SIGNALFD=y | ||
102 | CONFIG_TIMERFD=y | ||
103 | CONFIG_EVENTFD=y | ||
104 | CONFIG_SHMEM=y | ||
105 | CONFIG_AIO=y | ||
106 | CONFIG_VM_EVENT_COUNTERS=y | ||
107 | CONFIG_SLAB=y | ||
108 | # CONFIG_SLUB is not set | ||
109 | # CONFIG_SLOB is not set | ||
110 | # CONFIG_PROFILING is not set | ||
111 | # CONFIG_MARKERS is not set | ||
112 | CONFIG_HAVE_OPROFILE=y | ||
113 | # CONFIG_KPROBES is not set | ||
114 | CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y | ||
115 | CONFIG_HAVE_IOREMAP_PROT=y | ||
116 | CONFIG_HAVE_KPROBES=y | ||
117 | CONFIG_HAVE_KRETPROBES=y | ||
118 | CONFIG_HAVE_ARCH_TRACEHOOK=y | ||
119 | # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set | ||
120 | CONFIG_SLABINFO=y | ||
121 | CONFIG_RT_MUTEXES=y | ||
122 | # CONFIG_TINY_SHMEM is not set | ||
123 | CONFIG_BASE_SMALL=0 | ||
124 | CONFIG_MODULES=y | ||
125 | # CONFIG_MODULE_FORCE_LOAD is not set | ||
126 | CONFIG_MODULE_UNLOAD=y | ||
127 | # CONFIG_MODULE_FORCE_UNLOAD is not set | ||
128 | # CONFIG_MODVERSIONS is not set | ||
129 | # CONFIG_MODULE_SRCVERSION_ALL is not set | ||
130 | CONFIG_KMOD=y | ||
131 | CONFIG_BLOCK=y | ||
132 | # CONFIG_LBD is not set | ||
133 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
134 | # CONFIG_LSF is not set | ||
135 | # CONFIG_BLK_DEV_BSG is not set | ||
136 | # CONFIG_BLK_DEV_INTEGRITY is not set | ||
137 | |||
138 | # | ||
139 | # IO Schedulers | ||
140 | # | ||
141 | CONFIG_IOSCHED_NOOP=y | ||
142 | # CONFIG_IOSCHED_AS is not set | ||
143 | # CONFIG_IOSCHED_DEADLINE is not set | ||
144 | # CONFIG_IOSCHED_CFQ is not set | ||
145 | # CONFIG_DEFAULT_AS is not set | ||
146 | # CONFIG_DEFAULT_DEADLINE is not set | ||
147 | # CONFIG_DEFAULT_CFQ is not set | ||
148 | CONFIG_DEFAULT_NOOP=y | ||
149 | CONFIG_DEFAULT_IOSCHED="noop" | ||
150 | CONFIG_CLASSIC_RCU=y | ||
151 | # CONFIG_FREEZER is not set | ||
152 | |||
153 | # | ||
154 | # Platform support | ||
155 | # | ||
156 | CONFIG_PPC_MULTIPLATFORM=y | ||
157 | CONFIG_CLASSIC32=y | ||
158 | # CONFIG_PPC_CHRP is not set | ||
159 | # CONFIG_MPC5121_ADS is not set | ||
160 | # CONFIG_MPC5121_GENERIC is not set | ||
161 | # CONFIG_PPC_MPC52xx is not set | ||
162 | # CONFIG_PPC_PMAC is not set | ||
163 | # CONFIG_PPC_CELL is not set | ||
164 | # CONFIG_PPC_CELL_NATIVE is not set | ||
165 | # CONFIG_PPC_82xx is not set | ||
166 | # CONFIG_PQ2ADS is not set | ||
167 | CONFIG_PPC_83xx=y | ||
168 | # CONFIG_MPC831x_RDB is not set | ||
169 | # CONFIG_MPC832x_MDS is not set | ||
170 | # CONFIG_MPC832x_RDB is not set | ||
171 | # CONFIG_MPC834x_MDS is not set | ||
172 | # CONFIG_MPC834x_ITX is not set | ||
173 | # CONFIG_MPC836x_MDS is not set | ||
174 | # CONFIG_MPC836x_RDK is not set | ||
175 | # CONFIG_MPC837x_MDS is not set | ||
176 | # CONFIG_MPC837x_RDB is not set | ||
177 | # CONFIG_SBC834x is not set | ||
178 | # CONFIG_ASP834x is not set | ||
179 | CONFIG_KMETER1=y | ||
180 | # CONFIG_PPC_86xx is not set | ||
181 | # CONFIG_EMBEDDED6xx is not set | ||
182 | CONFIG_IPIC=y | ||
183 | # CONFIG_MPIC is not set | ||
184 | # CONFIG_MPIC_WEIRD is not set | ||
185 | # CONFIG_PPC_I8259 is not set | ||
186 | # CONFIG_PPC_RTAS is not set | ||
187 | # CONFIG_MMIO_NVRAM is not set | ||
188 | # CONFIG_PPC_MPC106 is not set | ||
189 | # CONFIG_PPC_970_NAP is not set | ||
190 | # CONFIG_PPC_INDIRECT_IO is not set | ||
191 | # CONFIG_GENERIC_IOMAP is not set | ||
192 | # CONFIG_CPU_FREQ is not set | ||
193 | # CONFIG_TAU is not set | ||
194 | CONFIG_QUICC_ENGINE=y | ||
195 | # CONFIG_QE_GPIO is not set | ||
196 | # CONFIG_FSL_ULI1575 is not set | ||
197 | |||
198 | # | ||
199 | # Kernel options | ||
200 | # | ||
201 | # CONFIG_HIGHMEM is not set | ||
202 | CONFIG_TICK_ONESHOT=y | ||
203 | CONFIG_NO_HZ=y | ||
204 | CONFIG_HIGH_RES_TIMERS=y | ||
205 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | ||
206 | # CONFIG_HZ_100 is not set | ||
207 | CONFIG_HZ_250=y | ||
208 | # CONFIG_HZ_300 is not set | ||
209 | # CONFIG_HZ_1000 is not set | ||
210 | CONFIG_HZ=250 | ||
211 | CONFIG_SCHED_HRTICK=y | ||
212 | # CONFIG_PREEMPT_NONE is not set | ||
213 | # CONFIG_PREEMPT_VOLUNTARY is not set | ||
214 | CONFIG_PREEMPT=y | ||
215 | # CONFIG_PREEMPT_RCU is not set | ||
216 | CONFIG_BINFMT_ELF=y | ||
217 | # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set | ||
218 | # CONFIG_HAVE_AOUT is not set | ||
219 | # CONFIG_BINFMT_MISC is not set | ||
220 | # CONFIG_IOMMU_HELPER is not set | ||
221 | CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y | ||
222 | CONFIG_ARCH_HAS_WALK_MEMORY=y | ||
223 | CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y | ||
224 | # CONFIG_KEXEC is not set | ||
225 | CONFIG_ARCH_FLATMEM_ENABLE=y | ||
226 | CONFIG_ARCH_POPULATES_NODE_MAP=y | ||
227 | CONFIG_SELECT_MEMORY_MODEL=y | ||
228 | CONFIG_FLATMEM_MANUAL=y | ||
229 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
230 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
231 | CONFIG_FLATMEM=y | ||
232 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
233 | CONFIG_PAGEFLAGS_EXTENDED=y | ||
234 | CONFIG_SPLIT_PTLOCK_CPUS=4 | ||
235 | CONFIG_MIGRATION=y | ||
236 | # CONFIG_RESOURCES_64BIT is not set | ||
237 | # CONFIG_PHYS_ADDR_T_64BIT is not set | ||
238 | CONFIG_ZONE_DMA_FLAG=1 | ||
239 | CONFIG_BOUNCE=y | ||
240 | CONFIG_VIRT_TO_BUS=y | ||
241 | CONFIG_UNEVICTABLE_LRU=y | ||
242 | CONFIG_FORCE_MAX_ZONEORDER=11 | ||
243 | CONFIG_PROC_DEVICETREE=y | ||
244 | # CONFIG_CMDLINE_BOOL is not set | ||
245 | CONFIG_EXTRA_TARGETS="" | ||
246 | # CONFIG_PM is not set | ||
247 | # CONFIG_SECCOMP is not set | ||
248 | CONFIG_ISA_DMA_API=y | ||
249 | |||
250 | # | ||
251 | # Bus options | ||
252 | # | ||
253 | CONFIG_ZONE_DMA=y | ||
254 | CONFIG_GENERIC_ISA_DMA=y | ||
255 | CONFIG_FSL_SOC=y | ||
256 | CONFIG_PPC_PCI_CHOICE=y | ||
257 | # CONFIG_PCI is not set | ||
258 | # CONFIG_PCI_DOMAINS is not set | ||
259 | # CONFIG_PCI_SYSCALL is not set | ||
260 | # CONFIG_ARCH_SUPPORTS_MSI is not set | ||
261 | # CONFIG_HAS_RAPIDIO is not set | ||
262 | |||
263 | # | ||
264 | # Advanced setup | ||
265 | # | ||
266 | # CONFIG_ADVANCED_OPTIONS is not set | ||
267 | |||
268 | # | ||
269 | # Default settings for advanced configuration options are used | ||
270 | # | ||
271 | CONFIG_LOWMEM_SIZE=0x30000000 | ||
272 | CONFIG_PAGE_OFFSET=0xc0000000 | ||
273 | CONFIG_KERNEL_START=0xc0000000 | ||
274 | CONFIG_PHYSICAL_START=0x00000000 | ||
275 | CONFIG_TASK_SIZE=0xc0000000 | ||
276 | CONFIG_NET=y | ||
277 | |||
278 | # | ||
279 | # Networking options | ||
280 | # | ||
281 | CONFIG_PACKET=y | ||
282 | # CONFIG_PACKET_MMAP is not set | ||
283 | CONFIG_UNIX=y | ||
284 | # CONFIG_NET_KEY is not set | ||
285 | CONFIG_INET=y | ||
286 | CONFIG_IP_MULTICAST=y | ||
287 | # CONFIG_IP_ADVANCED_ROUTER is not set | ||
288 | CONFIG_IP_FIB_HASH=y | ||
289 | CONFIG_IP_PNP=y | ||
290 | # CONFIG_IP_PNP_DHCP is not set | ||
291 | # CONFIG_IP_PNP_BOOTP is not set | ||
292 | # CONFIG_IP_PNP_RARP is not set | ||
293 | # CONFIG_NET_IPIP is not set | ||
294 | # CONFIG_NET_IPGRE is not set | ||
295 | # CONFIG_IP_MROUTE is not set | ||
296 | # CONFIG_ARPD is not set | ||
297 | # CONFIG_SYN_COOKIES is not set | ||
298 | # CONFIG_INET_AH is not set | ||
299 | # CONFIG_INET_ESP is not set | ||
300 | # CONFIG_INET_IPCOMP is not set | ||
301 | # CONFIG_INET_XFRM_TUNNEL is not set | ||
302 | # CONFIG_INET_TUNNEL is not set | ||
303 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | ||
304 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | ||
305 | # CONFIG_INET_XFRM_MODE_BEET is not set | ||
306 | # CONFIG_INET_LRO is not set | ||
307 | CONFIG_INET_DIAG=y | ||
308 | CONFIG_INET_TCP_DIAG=y | ||
309 | # CONFIG_TCP_CONG_ADVANCED is not set | ||
310 | CONFIG_TCP_CONG_CUBIC=y | ||
311 | CONFIG_DEFAULT_TCP_CONG="cubic" | ||
312 | # CONFIG_TCP_MD5SIG is not set | ||
313 | # CONFIG_IPV6 is not set | ||
314 | # CONFIG_NETWORK_SECMARK is not set | ||
315 | # CONFIG_NETFILTER is not set | ||
316 | # CONFIG_IP_DCCP is not set | ||
317 | # CONFIG_IP_SCTP is not set | ||
318 | # CONFIG_TIPC is not set | ||
319 | # CONFIG_ATM is not set | ||
320 | CONFIG_STP=m | ||
321 | CONFIG_BRIDGE=m | ||
322 | # CONFIG_NET_DSA is not set | ||
323 | CONFIG_VLAN_8021Q=y | ||
324 | # CONFIG_VLAN_8021Q_GVRP is not set | ||
325 | # CONFIG_DECNET is not set | ||
326 | CONFIG_LLC=m | ||
327 | # CONFIG_LLC2 is not set | ||
328 | # CONFIG_IPX is not set | ||
329 | # CONFIG_ATALK is not set | ||
330 | # CONFIG_X25 is not set | ||
331 | # CONFIG_LAPB is not set | ||
332 | # CONFIG_ECONET is not set | ||
333 | # CONFIG_WAN_ROUTER is not set | ||
334 | # CONFIG_NET_SCHED is not set | ||
335 | |||
336 | # | ||
337 | # Network testing | ||
338 | # | ||
339 | # CONFIG_NET_PKTGEN is not set | ||
340 | # CONFIG_HAMRADIO is not set | ||
341 | # CONFIG_CAN is not set | ||
342 | # CONFIG_IRDA is not set | ||
343 | # CONFIG_BT is not set | ||
344 | # CONFIG_AF_RXRPC is not set | ||
345 | # CONFIG_PHONET is not set | ||
346 | # CONFIG_WIRELESS is not set | ||
347 | # CONFIG_RFKILL is not set | ||
348 | # CONFIG_NET_9P is not set | ||
349 | |||
350 | # | ||
351 | # Device Drivers | ||
352 | # | ||
353 | |||
354 | # | ||
355 | # Generic Driver Options | ||
356 | # | ||
357 | CONFIG_STANDALONE=y | ||
358 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
359 | # CONFIG_SYS_HYPERVISOR is not set | ||
360 | # CONFIG_CONNECTOR is not set | ||
361 | CONFIG_MTD=y | ||
362 | # CONFIG_MTD_DEBUG is not set | ||
363 | CONFIG_MTD_CONCAT=y | ||
364 | CONFIG_MTD_PARTITIONS=y | ||
365 | # CONFIG_MTD_REDBOOT_PARTS is not set | ||
366 | CONFIG_MTD_CMDLINE_PARTS=y | ||
367 | CONFIG_MTD_OF_PARTS=y | ||
368 | # CONFIG_MTD_AR7_PARTS is not set | ||
369 | |||
370 | # | ||
371 | # User Modules And Translation Layers | ||
372 | # | ||
373 | CONFIG_MTD_CHAR=y | ||
374 | CONFIG_MTD_BLKDEVS=y | ||
375 | CONFIG_MTD_BLOCK=y | ||
376 | # CONFIG_FTL is not set | ||
377 | # CONFIG_NFTL is not set | ||
378 | # CONFIG_INFTL is not set | ||
379 | # CONFIG_RFD_FTL is not set | ||
380 | # CONFIG_SSFDC is not set | ||
381 | # CONFIG_MTD_OOPS is not set | ||
382 | |||
383 | # | ||
384 | # RAM/ROM/Flash chip drivers | ||
385 | # | ||
386 | CONFIG_MTD_CFI=y | ||
387 | # CONFIG_MTD_JEDECPROBE is not set | ||
388 | CONFIG_MTD_GEN_PROBE=y | ||
389 | # CONFIG_MTD_CFI_ADV_OPTIONS is not set | ||
390 | CONFIG_MTD_MAP_BANK_WIDTH_1=y | ||
391 | CONFIG_MTD_MAP_BANK_WIDTH_2=y | ||
392 | CONFIG_MTD_MAP_BANK_WIDTH_4=y | ||
393 | # CONFIG_MTD_MAP_BANK_WIDTH_8 is not set | ||
394 | # CONFIG_MTD_MAP_BANK_WIDTH_16 is not set | ||
395 | # CONFIG_MTD_MAP_BANK_WIDTH_32 is not set | ||
396 | CONFIG_MTD_CFI_I1=y | ||
397 | CONFIG_MTD_CFI_I2=y | ||
398 | # CONFIG_MTD_CFI_I4 is not set | ||
399 | # CONFIG_MTD_CFI_I8 is not set | ||
400 | CONFIG_MTD_CFI_INTELEXT=y | ||
401 | CONFIG_MTD_CFI_AMDSTD=y | ||
402 | # CONFIG_MTD_CFI_STAA is not set | ||
403 | CONFIG_MTD_CFI_UTIL=y | ||
404 | # CONFIG_MTD_RAM is not set | ||
405 | # CONFIG_MTD_ROM is not set | ||
406 | # CONFIG_MTD_ABSENT is not set | ||
407 | |||
408 | # | ||
409 | # Mapping drivers for chip access | ||
410 | # | ||
411 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set | ||
412 | # CONFIG_MTD_PHYSMAP is not set | ||
413 | CONFIG_MTD_PHYSMAP_OF=y | ||
414 | # CONFIG_MTD_PLATRAM is not set | ||
415 | |||
416 | # | ||
417 | # Self-contained MTD device drivers | ||
418 | # | ||
419 | # CONFIG_MTD_SLRAM is not set | ||
420 | CONFIG_MTD_PHRAM=y | ||
421 | # CONFIG_MTD_MTDRAM is not set | ||
422 | # CONFIG_MTD_BLOCK2MTD is not set | ||
423 | |||
424 | # | ||
425 | # Disk-On-Chip Device Drivers | ||
426 | # | ||
427 | # CONFIG_MTD_DOC2000 is not set | ||
428 | # CONFIG_MTD_DOC2001 is not set | ||
429 | # CONFIG_MTD_DOC2001PLUS is not set | ||
430 | # CONFIG_MTD_NAND is not set | ||
431 | # CONFIG_MTD_ONENAND is not set | ||
432 | |||
433 | # | ||
434 | # UBI - Unsorted block images | ||
435 | # | ||
436 | CONFIG_MTD_UBI=y | ||
437 | CONFIG_MTD_UBI_WL_THRESHOLD=4096 | ||
438 | CONFIG_MTD_UBI_BEB_RESERVE=1 | ||
439 | CONFIG_MTD_UBI_GLUEBI=y | ||
440 | |||
441 | # | ||
442 | # UBI debugging options | ||
443 | # | ||
444 | CONFIG_MTD_UBI_DEBUG=y | ||
445 | # CONFIG_MTD_UBI_DEBUG_MSG is not set | ||
446 | # CONFIG_MTD_UBI_DEBUG_PARANOID is not set | ||
447 | # CONFIG_MTD_UBI_DEBUG_DISABLE_BGT is not set | ||
448 | # CONFIG_MTD_UBI_DEBUG_USERSPACE_IO is not set | ||
449 | # CONFIG_MTD_UBI_DEBUG_EMULATE_BITFLIPS is not set | ||
450 | # CONFIG_MTD_UBI_DEBUG_EMULATE_WRITE_FAILURES is not set | ||
451 | # CONFIG_MTD_UBI_DEBUG_EMULATE_ERASE_FAILURES is not set | ||
452 | |||
453 | # | ||
454 | # Additional UBI debugging messages | ||
455 | # | ||
456 | # CONFIG_MTD_UBI_DEBUG_MSG_BLD is not set | ||
457 | # CONFIG_MTD_UBI_DEBUG_MSG_EBA is not set | ||
458 | # CONFIG_MTD_UBI_DEBUG_MSG_WL is not set | ||
459 | # CONFIG_MTD_UBI_DEBUG_MSG_IO is not set | ||
460 | CONFIG_OF_DEVICE=y | ||
461 | CONFIG_OF_I2C=y | ||
462 | # CONFIG_PARPORT is not set | ||
463 | CONFIG_BLK_DEV=y | ||
464 | # CONFIG_BLK_DEV_FD is not set | ||
465 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
466 | # CONFIG_BLK_DEV_LOOP is not set | ||
467 | # CONFIG_BLK_DEV_NBD is not set | ||
468 | # CONFIG_BLK_DEV_RAM is not set | ||
469 | # CONFIG_CDROM_PKTCDVD is not set | ||
470 | # CONFIG_ATA_OVER_ETH is not set | ||
471 | # CONFIG_BLK_DEV_HD is not set | ||
472 | # CONFIG_MISC_DEVICES is not set | ||
473 | CONFIG_HAVE_IDE=y | ||
474 | # CONFIG_IDE is not set | ||
475 | |||
476 | # | ||
477 | # SCSI device support | ||
478 | # | ||
479 | # CONFIG_RAID_ATTRS is not set | ||
480 | # CONFIG_SCSI is not set | ||
481 | # CONFIG_SCSI_DMA is not set | ||
482 | # CONFIG_SCSI_NETLINK is not set | ||
483 | # CONFIG_ATA is not set | ||
484 | # CONFIG_MD is not set | ||
485 | # CONFIG_MACINTOSH_DRIVERS is not set | ||
486 | CONFIG_NETDEVICES=y | ||
487 | CONFIG_DUMMY=y | ||
488 | # CONFIG_BONDING is not set | ||
489 | # CONFIG_MACVLAN is not set | ||
490 | # CONFIG_EQUALIZER is not set | ||
491 | CONFIG_TUN=y | ||
492 | # CONFIG_VETH is not set | ||
493 | CONFIG_PHYLIB=y | ||
494 | |||
495 | # | ||
496 | # MII PHY device drivers | ||
497 | # | ||
498 | CONFIG_MARVELL_PHY=y | ||
499 | # CONFIG_DAVICOM_PHY is not set | ||
500 | # CONFIG_QSEMI_PHY is not set | ||
501 | # CONFIG_LXT_PHY is not set | ||
502 | # CONFIG_CICADA_PHY is not set | ||
503 | # CONFIG_VITESSE_PHY is not set | ||
504 | # CONFIG_SMSC_PHY is not set | ||
505 | # CONFIG_BROADCOM_PHY is not set | ||
506 | # CONFIG_ICPLUS_PHY is not set | ||
507 | # CONFIG_REALTEK_PHY is not set | ||
508 | # CONFIG_FIXED_PHY is not set | ||
509 | # CONFIG_MDIO_BITBANG is not set | ||
510 | CONFIG_NET_ETHERNET=y | ||
511 | CONFIG_MII=y | ||
512 | # CONFIG_IBM_NEW_EMAC_ZMII is not set | ||
513 | # CONFIG_IBM_NEW_EMAC_RGMII is not set | ||
514 | # CONFIG_IBM_NEW_EMAC_TAH is not set | ||
515 | # CONFIG_IBM_NEW_EMAC_EMAC4 is not set | ||
516 | # CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set | ||
517 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set | ||
518 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set | ||
519 | # CONFIG_B44 is not set | ||
520 | CONFIG_NETDEV_1000=y | ||
521 | # CONFIG_GIANFAR is not set | ||
522 | CONFIG_UCC_GETH=y | ||
523 | # CONFIG_UGETH_MAGIC_PACKET is not set | ||
524 | # CONFIG_UGETH_FILTERING is not set | ||
525 | # CONFIG_UGETH_TX_ON_DEMAND is not set | ||
526 | # CONFIG_MV643XX_ETH is not set | ||
527 | # CONFIG_NETDEV_10000 is not set | ||
528 | |||
529 | # | ||
530 | # Wireless LAN | ||
531 | # | ||
532 | # CONFIG_WLAN_PRE80211 is not set | ||
533 | # CONFIG_WLAN_80211 is not set | ||
534 | # CONFIG_IWLWIFI_LEDS is not set | ||
535 | CONFIG_WAN=y | ||
536 | CONFIG_HDLC=y | ||
537 | # CONFIG_HDLC_RAW is not set | ||
538 | # CONFIG_HDLC_RAW_ETH is not set | ||
539 | # CONFIG_HDLC_CISCO is not set | ||
540 | # CONFIG_HDLC_FR is not set | ||
541 | # CONFIG_HDLC_PPP is not set | ||
542 | |||
543 | # | ||
544 | # X.25/LAPB support is disabled | ||
545 | # | ||
546 | CONFIG_HDLC_KM=y | ||
547 | CONFIG_FS_UCC_HDLC=y | ||
548 | # CONFIG_DLCI is not set | ||
549 | CONFIG_PPP=y | ||
550 | CONFIG_PPP_MULTILINK=y | ||
551 | # CONFIG_PPP_FILTER is not set | ||
552 | # CONFIG_PPP_ASYNC is not set | ||
553 | # CONFIG_PPP_SYNC_TTY is not set | ||
554 | # CONFIG_PPP_DEFLATE is not set | ||
555 | # CONFIG_PPP_BSDCOMP is not set | ||
556 | # CONFIG_PPP_MPPE is not set | ||
557 | CONFIG_PPPOE=y | ||
558 | # CONFIG_PPPOL2TP is not set | ||
559 | # CONFIG_SLIP is not set | ||
560 | CONFIG_SLHC=y | ||
561 | # CONFIG_NETCONSOLE is not set | ||
562 | # CONFIG_NETPOLL is not set | ||
563 | # CONFIG_NET_POLL_CONTROLLER is not set | ||
564 | # CONFIG_ISDN is not set | ||
565 | # CONFIG_PHONE is not set | ||
566 | |||
567 | # | ||
568 | # Input device support | ||
569 | # | ||
570 | # CONFIG_INPUT is not set | ||
571 | |||
572 | # | ||
573 | # Hardware I/O ports | ||
574 | # | ||
575 | # CONFIG_SERIO is not set | ||
576 | # CONFIG_GAMEPORT is not set | ||
577 | |||
578 | # | ||
579 | # Character devices | ||
580 | # | ||
581 | # CONFIG_VT is not set | ||
582 | # CONFIG_DEVKMEM is not set | ||
583 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
584 | |||
585 | # | ||
586 | # Serial drivers | ||
587 | # | ||
588 | CONFIG_SERIAL_8250=y | ||
589 | CONFIG_SERIAL_8250_CONSOLE=y | ||
590 | CONFIG_SERIAL_8250_NR_UARTS=4 | ||
591 | CONFIG_SERIAL_8250_RUNTIME_UARTS=4 | ||
592 | # CONFIG_SERIAL_8250_EXTENDED is not set | ||
593 | |||
594 | # | ||
595 | # Non-8250 serial port support | ||
596 | # | ||
597 | # CONFIG_SERIAL_UARTLITE is not set | ||
598 | CONFIG_SERIAL_CORE=y | ||
599 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
600 | # CONFIG_SERIAL_OF_PLATFORM is not set | ||
601 | # CONFIG_SERIAL_QE is not set | ||
602 | CONFIG_UNIX98_PTYS=y | ||
603 | CONFIG_LEGACY_PTYS=y | ||
604 | CONFIG_LEGACY_PTY_COUNT=256 | ||
605 | # CONFIG_IPMI_HANDLER is not set | ||
606 | CONFIG_HW_RANDOM=y | ||
607 | # CONFIG_NVRAM is not set | ||
608 | # CONFIG_GEN_RTC is not set | ||
609 | # CONFIG_R3964 is not set | ||
610 | # CONFIG_RAW_DRIVER is not set | ||
611 | # CONFIG_TCG_TPM is not set | ||
612 | CONFIG_BOOTCOUNT=y | ||
613 | CONFIG_I2C=y | ||
614 | CONFIG_I2C_BOARDINFO=y | ||
615 | CONFIG_I2C_CHARDEV=y | ||
616 | CONFIG_I2C_HELPER_AUTO=y | ||
617 | |||
618 | # | ||
619 | # I2C Hardware Bus support | ||
620 | # | ||
621 | |||
622 | # | ||
623 | # I2C system bus drivers (mostly embedded / system-on-chip) | ||
624 | # | ||
625 | CONFIG_I2C_MPC=y | ||
626 | # CONFIG_I2C_OCORES is not set | ||
627 | # CONFIG_I2C_SIMTEC is not set | ||
628 | |||
629 | # | ||
630 | # External I2C/SMBus adapter drivers | ||
631 | # | ||
632 | # CONFIG_I2C_PARPORT_LIGHT is not set | ||
633 | # CONFIG_I2C_TAOS_EVM is not set | ||
634 | |||
635 | # | ||
636 | # Other I2C/SMBus bus drivers | ||
637 | # | ||
638 | # CONFIG_I2C_PCA_PLATFORM is not set | ||
639 | # CONFIG_I2C_STUB is not set | ||
640 | |||
641 | # | ||
642 | # Miscellaneous I2C Chip support | ||
643 | # | ||
644 | # CONFIG_DS1682 is not set | ||
645 | # CONFIG_AT24 is not set | ||
646 | # CONFIG_SENSORS_EEPROM is not set | ||
647 | # CONFIG_SENSORS_PCF8574 is not set | ||
648 | # CONFIG_PCF8575 is not set | ||
649 | # CONFIG_SENSORS_PCA9539 is not set | ||
650 | # CONFIG_SENSORS_PCF8591 is not set | ||
651 | # CONFIG_SENSORS_MAX6875 is not set | ||
652 | # CONFIG_SENSORS_TSL2550 is not set | ||
653 | # CONFIG_MCU_MPC8349EMITX is not set | ||
654 | # CONFIG_I2C_DEBUG_CORE is not set | ||
655 | # CONFIG_I2C_DEBUG_ALGO is not set | ||
656 | # CONFIG_I2C_DEBUG_BUS is not set | ||
657 | # CONFIG_I2C_DEBUG_CHIP is not set | ||
658 | # CONFIG_SPI is not set | ||
659 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y | ||
660 | # CONFIG_GPIOLIB is not set | ||
661 | # CONFIG_W1 is not set | ||
662 | # CONFIG_POWER_SUPPLY is not set | ||
663 | # CONFIG_HWMON is not set | ||
664 | # CONFIG_THERMAL is not set | ||
665 | # CONFIG_THERMAL_HWMON is not set | ||
666 | # CONFIG_WATCHDOG is not set | ||
667 | CONFIG_SSB_POSSIBLE=y | ||
668 | |||
669 | # | ||
670 | # Sonics Silicon Backplane | ||
671 | # | ||
672 | # CONFIG_SSB is not set | ||
673 | |||
674 | # | ||
675 | # Multifunction device drivers | ||
676 | # | ||
677 | # CONFIG_MFD_CORE is not set | ||
678 | # CONFIG_MFD_SM501 is not set | ||
679 | # CONFIG_HTC_PASIC3 is not set | ||
680 | # CONFIG_MFD_TMIO is not set | ||
681 | # CONFIG_PMIC_DA903X is not set | ||
682 | # CONFIG_MFD_WM8400 is not set | ||
683 | # CONFIG_MFD_WM8350_I2C is not set | ||
684 | # CONFIG_REGULATOR is not set | ||
685 | |||
686 | # | ||
687 | # Multimedia devices | ||
688 | # | ||
689 | |||
690 | # | ||
691 | # Multimedia core support | ||
692 | # | ||
693 | # CONFIG_VIDEO_DEV is not set | ||
694 | # CONFIG_DVB_CORE is not set | ||
695 | # CONFIG_VIDEO_MEDIA is not set | ||
696 | |||
697 | # | ||
698 | # Multimedia drivers | ||
699 | # | ||
700 | # CONFIG_DAB is not set | ||
701 | |||
702 | # | ||
703 | # Graphics support | ||
704 | # | ||
705 | # CONFIG_VGASTATE is not set | ||
706 | # CONFIG_VIDEO_OUTPUT_CONTROL is not set | ||
707 | # CONFIG_FB is not set | ||
708 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
709 | |||
710 | # | ||
711 | # Display device support | ||
712 | # | ||
713 | # CONFIG_DISPLAY_SUPPORT is not set | ||
714 | # CONFIG_SOUND is not set | ||
715 | # CONFIG_USB_SUPPORT is not set | ||
716 | # CONFIG_MMC is not set | ||
717 | # CONFIG_MEMSTICK is not set | ||
718 | # CONFIG_NEW_LEDS is not set | ||
719 | # CONFIG_ACCESSIBILITY is not set | ||
720 | # CONFIG_EDAC is not set | ||
721 | # CONFIG_RTC_CLASS is not set | ||
722 | # CONFIG_DMADEVICES is not set | ||
723 | CONFIG_UIO=y | ||
724 | # CONFIG_UIO_PDRV is not set | ||
725 | # CONFIG_UIO_PDRV_GENIRQ is not set | ||
726 | # CONFIG_UIO_SMX is not set | ||
727 | # CONFIG_UIO_SERCOS3 is not set | ||
728 | # CONFIG_STAGING is not set | ||
729 | |||
730 | # | ||
731 | # File systems | ||
732 | # | ||
733 | # CONFIG_EXT2_FS is not set | ||
734 | # CONFIG_EXT3_FS is not set | ||
735 | # CONFIG_EXT4_FS is not set | ||
736 | # CONFIG_REISERFS_FS is not set | ||
737 | # CONFIG_JFS_FS is not set | ||
738 | # CONFIG_FS_POSIX_ACL is not set | ||
739 | CONFIG_FILE_LOCKING=y | ||
740 | # CONFIG_XFS_FS is not set | ||
741 | # CONFIG_OCFS2_FS is not set | ||
742 | # CONFIG_DNOTIFY is not set | ||
743 | CONFIG_INOTIFY=y | ||
744 | CONFIG_INOTIFY_USER=y | ||
745 | # CONFIG_QUOTA is not set | ||
746 | # CONFIG_AUTOFS_FS is not set | ||
747 | # CONFIG_AUTOFS4_FS is not set | ||
748 | # CONFIG_FUSE_FS is not set | ||
749 | |||
750 | # | ||
751 | # CD-ROM/DVD Filesystems | ||
752 | # | ||
753 | # CONFIG_ISO9660_FS is not set | ||
754 | # CONFIG_UDF_FS is not set | ||
755 | |||
756 | # | ||
757 | # DOS/FAT/NT Filesystems | ||
758 | # | ||
759 | # CONFIG_MSDOS_FS is not set | ||
760 | # CONFIG_VFAT_FS is not set | ||
761 | # CONFIG_NTFS_FS is not set | ||
762 | |||
763 | # | ||
764 | # Pseudo filesystems | ||
765 | # | ||
766 | CONFIG_PROC_FS=y | ||
767 | # CONFIG_PROC_KCORE is not set | ||
768 | CONFIG_PROC_SYSCTL=y | ||
769 | CONFIG_PROC_PAGE_MONITOR=y | ||
770 | CONFIG_SYSFS=y | ||
771 | CONFIG_TMPFS=y | ||
772 | # CONFIG_TMPFS_POSIX_ACL is not set | ||
773 | # CONFIG_HUGETLB_PAGE is not set | ||
774 | # CONFIG_CONFIGFS_FS is not set | ||
775 | |||
776 | # | ||
777 | # Miscellaneous filesystems | ||
778 | # | ||
779 | # CONFIG_ADFS_FS is not set | ||
780 | # CONFIG_AFFS_FS is not set | ||
781 | # CONFIG_HFS_FS is not set | ||
782 | # CONFIG_HFSPLUS_FS is not set | ||
783 | # CONFIG_BEFS_FS is not set | ||
784 | # CONFIG_BFS_FS is not set | ||
785 | # CONFIG_EFS_FS is not set | ||
786 | CONFIG_JFFS2_FS=y | ||
787 | CONFIG_JFFS2_FS_DEBUG=0 | ||
788 | CONFIG_JFFS2_FS_WRITEBUFFER=y | ||
789 | # CONFIG_JFFS2_FS_WBUF_VERIFY is not set | ||
790 | # CONFIG_JFFS2_SUMMARY is not set | ||
791 | # CONFIG_JFFS2_FS_XATTR is not set | ||
792 | # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set | ||
793 | CONFIG_JFFS2_ZLIB=y | ||
794 | # CONFIG_JFFS2_LZO is not set | ||
795 | CONFIG_JFFS2_RTIME=y | ||
796 | # CONFIG_JFFS2_RUBIN is not set | ||
797 | # CONFIG_UBIFS_FS is not set | ||
798 | # CONFIG_CRAMFS is not set | ||
799 | # CONFIG_VXFS_FS is not set | ||
800 | # CONFIG_MINIX_FS is not set | ||
801 | # CONFIG_OMFS_FS is not set | ||
802 | # CONFIG_HPFS_FS is not set | ||
803 | # CONFIG_QNX4FS_FS is not set | ||
804 | # CONFIG_ROMFS_FS is not set | ||
805 | # CONFIG_SYSV_FS is not set | ||
806 | # CONFIG_UFS_FS is not set | ||
807 | CONFIG_NETWORK_FILESYSTEMS=y | ||
808 | CONFIG_NFS_FS=y | ||
809 | CONFIG_NFS_V3=y | ||
810 | # CONFIG_NFS_V3_ACL is not set | ||
811 | # CONFIG_NFS_V4 is not set | ||
812 | CONFIG_ROOT_NFS=y | ||
813 | # CONFIG_NFSD is not set | ||
814 | CONFIG_LOCKD=y | ||
815 | CONFIG_LOCKD_V4=y | ||
816 | CONFIG_NFS_COMMON=y | ||
817 | CONFIG_SUNRPC=y | ||
818 | # CONFIG_SUNRPC_REGISTER_V4 is not set | ||
819 | # CONFIG_RPCSEC_GSS_KRB5 is not set | ||
820 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | ||
821 | # CONFIG_SMB_FS is not set | ||
822 | # CONFIG_CIFS is not set | ||
823 | # CONFIG_NCP_FS is not set | ||
824 | # CONFIG_CODA_FS is not set | ||
825 | # CONFIG_AFS_FS is not set | ||
826 | |||
827 | # | ||
828 | # Partition Types | ||
829 | # | ||
830 | CONFIG_PARTITION_ADVANCED=y | ||
831 | # CONFIG_ACORN_PARTITION is not set | ||
832 | # CONFIG_OSF_PARTITION is not set | ||
833 | # CONFIG_AMIGA_PARTITION is not set | ||
834 | # CONFIG_ATARI_PARTITION is not set | ||
835 | # CONFIG_MAC_PARTITION is not set | ||
836 | # CONFIG_MSDOS_PARTITION is not set | ||
837 | # CONFIG_LDM_PARTITION is not set | ||
838 | # CONFIG_SGI_PARTITION is not set | ||
839 | # CONFIG_ULTRIX_PARTITION is not set | ||
840 | # CONFIG_SUN_PARTITION is not set | ||
841 | # CONFIG_KARMA_PARTITION is not set | ||
842 | # CONFIG_EFI_PARTITION is not set | ||
843 | # CONFIG_SYSV68_PARTITION is not set | ||
844 | # CONFIG_NLS is not set | ||
845 | # CONFIG_DLM is not set | ||
846 | CONFIG_UCC_FAST=y | ||
847 | CONFIG_UCC=y | ||
848 | |||
849 | # | ||
850 | # Library routines | ||
851 | # | ||
852 | CONFIG_BITREVERSE=y | ||
853 | # CONFIG_CRC_CCITT is not set | ||
854 | # CONFIG_CRC16 is not set | ||
855 | # CONFIG_CRC_T10DIF is not set | ||
856 | # CONFIG_CRC_ITU_T is not set | ||
857 | CONFIG_CRC32=y | ||
858 | # CONFIG_CRC7 is not set | ||
859 | # CONFIG_LIBCRC32C is not set | ||
860 | CONFIG_ZLIB_INFLATE=y | ||
861 | CONFIG_ZLIB_DEFLATE=y | ||
862 | CONFIG_PLIST=y | ||
863 | CONFIG_HAS_IOMEM=y | ||
864 | CONFIG_HAS_IOPORT=y | ||
865 | CONFIG_HAS_DMA=y | ||
866 | CONFIG_HAVE_LMB=y | ||
867 | |||
868 | # | ||
869 | # Kernel hacking | ||
870 | # | ||
871 | # CONFIG_PRINTK_TIME is not set | ||
872 | CONFIG_ENABLE_WARN_DEPRECATED=y | ||
873 | CONFIG_ENABLE_MUST_CHECK=y | ||
874 | CONFIG_FRAME_WARN=1024 | ||
875 | # CONFIG_MAGIC_SYSRQ is not set | ||
876 | # CONFIG_UNUSED_SYMBOLS is not set | ||
877 | CONFIG_DEBUG_FS=y | ||
878 | # CONFIG_HEADERS_CHECK is not set | ||
879 | # CONFIG_DEBUG_KERNEL is not set | ||
880 | # CONFIG_DEBUG_BUGVERBOSE is not set | ||
881 | # CONFIG_DEBUG_MEMORY_INIT is not set | ||
882 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
883 | # CONFIG_LATENCYTOP is not set | ||
884 | CONFIG_SYSCTL_SYSCALL_CHECK=y | ||
885 | CONFIG_HAVE_FUNCTION_TRACER=y | ||
886 | |||
887 | # | ||
888 | # Tracers | ||
889 | # | ||
890 | # CONFIG_DYNAMIC_PRINTK_DEBUG is not set | ||
891 | # CONFIG_SAMPLES is not set | ||
892 | CONFIG_HAVE_ARCH_KGDB=y | ||
893 | # CONFIG_IRQSTACKS is not set | ||
894 | # CONFIG_VIRQ_DEBUG is not set | ||
895 | # CONFIG_BOOTX_TEXT is not set | ||
896 | # CONFIG_PPC_EARLY_DEBUG is not set | ||
897 | |||
898 | # | ||
899 | # Security options | ||
900 | # | ||
901 | # CONFIG_KEYS is not set | ||
902 | # CONFIG_SECURITY is not set | ||
903 | # CONFIG_SECURITYFS is not set | ||
904 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | ||
905 | # CONFIG_CRYPTO is not set | ||
906 | # CONFIG_PPC_CLOCK is not set | ||
907 | CONFIG_PPC_LIB_RHEAP=y | ||
908 | # CONFIG_VIRTUALIZATION is not set | ||
diff --git a/arch/powerpc/configs/85xx/xes_mpc85xx_defconfig b/arch/powerpc/configs/85xx/xes_mpc85xx_defconfig new file mode 100644 index 000000000000..2552cbefba6b --- /dev/null +++ b/arch/powerpc/configs/85xx/xes_mpc85xx_defconfig | |||
@@ -0,0 +1,1821 @@ | |||
1 | # | ||
2 | # Automatically generated make config: don't edit | ||
3 | # Linux kernel version: 2.6.30-rc6 | ||
4 | # Thu Jun 11 11:25:17 2009 | ||
5 | # | ||
6 | # CONFIG_PPC64 is not set | ||
7 | |||
8 | # | ||
9 | # Processor support | ||
10 | # | ||
11 | # CONFIG_6xx is not set | ||
12 | CONFIG_PPC_85xx=y | ||
13 | # CONFIG_PPC_8xx is not set | ||
14 | # CONFIG_40x is not set | ||
15 | # CONFIG_44x is not set | ||
16 | # CONFIG_E200 is not set | ||
17 | CONFIG_E500=y | ||
18 | # CONFIG_PPC_E500MC is not set | ||
19 | CONFIG_BOOKE=y | ||
20 | CONFIG_FSL_BOOKE=y | ||
21 | CONFIG_FSL_EMB_PERFMON=y | ||
22 | # CONFIG_PHYS_64BIT is not set | ||
23 | CONFIG_SPE=y | ||
24 | CONFIG_PPC_MMU_NOHASH=y | ||
25 | CONFIG_PPC_BOOK3E_MMU=y | ||
26 | # CONFIG_PPC_MM_SLICES is not set | ||
27 | CONFIG_SMP=y | ||
28 | CONFIG_NR_CPUS=2 | ||
29 | CONFIG_PPC32=y | ||
30 | CONFIG_WORD_SIZE=32 | ||
31 | # CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set | ||
32 | CONFIG_MMU=y | ||
33 | CONFIG_GENERIC_CMOS_UPDATE=y | ||
34 | CONFIG_GENERIC_TIME=y | ||
35 | CONFIG_GENERIC_TIME_VSYSCALL=y | ||
36 | CONFIG_GENERIC_CLOCKEVENTS=y | ||
37 | CONFIG_GENERIC_HARDIRQS=y | ||
38 | # CONFIG_HAVE_SETUP_PER_CPU_AREA is not set | ||
39 | CONFIG_IRQ_PER_CPU=y | ||
40 | CONFIG_STACKTRACE_SUPPORT=y | ||
41 | CONFIG_HAVE_LATENCYTOP_SUPPORT=y | ||
42 | CONFIG_LOCKDEP_SUPPORT=y | ||
43 | CONFIG_RWSEM_XCHGADD_ALGORITHM=y | ||
44 | CONFIG_ARCH_HAS_ILOG2_U32=y | ||
45 | CONFIG_GENERIC_HWEIGHT=y | ||
46 | CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
47 | CONFIG_GENERIC_FIND_NEXT_BIT=y | ||
48 | CONFIG_GENERIC_GPIO=y | ||
49 | # CONFIG_ARCH_NO_VIRT_TO_BUS is not set | ||
50 | CONFIG_PPC=y | ||
51 | CONFIG_EARLY_PRINTK=y | ||
52 | CONFIG_GENERIC_NVRAM=y | ||
53 | CONFIG_SCHED_OMIT_FRAME_POINTER=y | ||
54 | CONFIG_ARCH_MAY_HAVE_PC_FDC=y | ||
55 | CONFIG_PPC_OF=y | ||
56 | CONFIG_OF=y | ||
57 | CONFIG_PPC_UDBG_16550=y | ||
58 | CONFIG_GENERIC_TBSYNC=y | ||
59 | CONFIG_AUDIT_ARCH=y | ||
60 | CONFIG_GENERIC_BUG=y | ||
61 | CONFIG_DTC=y | ||
62 | CONFIG_DEFAULT_UIMAGE=y | ||
63 | # CONFIG_PPC_DCR_NATIVE is not set | ||
64 | # CONFIG_PPC_DCR_MMIO is not set | ||
65 | CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y | ||
66 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
67 | |||
68 | # | ||
69 | # General setup | ||
70 | # | ||
71 | CONFIG_EXPERIMENTAL=y | ||
72 | CONFIG_LOCK_KERNEL=y | ||
73 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
74 | CONFIG_LOCALVERSION="" | ||
75 | CONFIG_LOCALVERSION_AUTO=y | ||
76 | CONFIG_SWAP=y | ||
77 | CONFIG_SYSVIPC=y | ||
78 | CONFIG_SYSVIPC_SYSCTL=y | ||
79 | CONFIG_POSIX_MQUEUE=y | ||
80 | CONFIG_POSIX_MQUEUE_SYSCTL=y | ||
81 | CONFIG_BSD_PROCESS_ACCT=y | ||
82 | # CONFIG_BSD_PROCESS_ACCT_V3 is not set | ||
83 | # CONFIG_TASKSTATS is not set | ||
84 | CONFIG_AUDIT=y | ||
85 | # CONFIG_AUDITSYSCALL is not set | ||
86 | |||
87 | # | ||
88 | # RCU Subsystem | ||
89 | # | ||
90 | CONFIG_CLASSIC_RCU=y | ||
91 | # CONFIG_TREE_RCU is not set | ||
92 | # CONFIG_PREEMPT_RCU is not set | ||
93 | # CONFIG_TREE_RCU_TRACE is not set | ||
94 | # CONFIG_PREEMPT_RCU_TRACE is not set | ||
95 | CONFIG_IKCONFIG=y | ||
96 | CONFIG_IKCONFIG_PROC=y | ||
97 | CONFIG_LOG_BUF_SHIFT=14 | ||
98 | # CONFIG_GROUP_SCHED is not set | ||
99 | # CONFIG_CGROUPS is not set | ||
100 | CONFIG_SYSFS_DEPRECATED=y | ||
101 | CONFIG_SYSFS_DEPRECATED_V2=y | ||
102 | # CONFIG_RELAY is not set | ||
103 | # CONFIG_NAMESPACES is not set | ||
104 | CONFIG_BLK_DEV_INITRD=y | ||
105 | CONFIG_INITRAMFS_SOURCE="" | ||
106 | CONFIG_RD_GZIP=y | ||
107 | # CONFIG_RD_BZIP2 is not set | ||
108 | # CONFIG_RD_LZMA is not set | ||
109 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | ||
110 | CONFIG_SYSCTL=y | ||
111 | CONFIG_ANON_INODES=y | ||
112 | CONFIG_EMBEDDED=y | ||
113 | CONFIG_SYSCTL_SYSCALL=y | ||
114 | CONFIG_KALLSYMS=y | ||
115 | CONFIG_KALLSYMS_ALL=y | ||
116 | CONFIG_KALLSYMS_EXTRA_PASS=y | ||
117 | # CONFIG_STRIP_ASM_SYMS is not set | ||
118 | CONFIG_HOTPLUG=y | ||
119 | CONFIG_PRINTK=y | ||
120 | CONFIG_BUG=y | ||
121 | CONFIG_ELF_CORE=y | ||
122 | CONFIG_BASE_FULL=y | ||
123 | CONFIG_FUTEX=y | ||
124 | CONFIG_EPOLL=y | ||
125 | CONFIG_SIGNALFD=y | ||
126 | CONFIG_TIMERFD=y | ||
127 | CONFIG_EVENTFD=y | ||
128 | CONFIG_SHMEM=y | ||
129 | CONFIG_AIO=y | ||
130 | CONFIG_VM_EVENT_COUNTERS=y | ||
131 | CONFIG_PCI_QUIRKS=y | ||
132 | CONFIG_SLUB_DEBUG=y | ||
133 | CONFIG_COMPAT_BRK=y | ||
134 | # CONFIG_SLAB is not set | ||
135 | CONFIG_SLUB=y | ||
136 | # CONFIG_SLOB is not set | ||
137 | # CONFIG_PROFILING is not set | ||
138 | # CONFIG_MARKERS is not set | ||
139 | CONFIG_HAVE_OPROFILE=y | ||
140 | # CONFIG_KPROBES is not set | ||
141 | CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y | ||
142 | CONFIG_HAVE_IOREMAP_PROT=y | ||
143 | CONFIG_HAVE_KPROBES=y | ||
144 | CONFIG_HAVE_KRETPROBES=y | ||
145 | CONFIG_HAVE_ARCH_TRACEHOOK=y | ||
146 | CONFIG_USE_GENERIC_SMP_HELPERS=y | ||
147 | # CONFIG_SLOW_WORK is not set | ||
148 | # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set | ||
149 | CONFIG_SLABINFO=y | ||
150 | CONFIG_RT_MUTEXES=y | ||
151 | CONFIG_BASE_SMALL=0 | ||
152 | CONFIG_MODULES=y | ||
153 | # CONFIG_MODULE_FORCE_LOAD is not set | ||
154 | CONFIG_MODULE_UNLOAD=y | ||
155 | CONFIG_MODULE_FORCE_UNLOAD=y | ||
156 | CONFIG_MODVERSIONS=y | ||
157 | # CONFIG_MODULE_SRCVERSION_ALL is not set | ||
158 | CONFIG_STOP_MACHINE=y | ||
159 | CONFIG_BLOCK=y | ||
160 | CONFIG_LBD=y | ||
161 | # CONFIG_BLK_DEV_BSG is not set | ||
162 | # CONFIG_BLK_DEV_INTEGRITY is not set | ||
163 | |||
164 | # | ||
165 | # IO Schedulers | ||
166 | # | ||
167 | CONFIG_IOSCHED_NOOP=y | ||
168 | CONFIG_IOSCHED_AS=y | ||
169 | CONFIG_IOSCHED_DEADLINE=y | ||
170 | CONFIG_IOSCHED_CFQ=y | ||
171 | # CONFIG_DEFAULT_AS is not set | ||
172 | # CONFIG_DEFAULT_DEADLINE is not set | ||
173 | CONFIG_DEFAULT_CFQ=y | ||
174 | # CONFIG_DEFAULT_NOOP is not set | ||
175 | CONFIG_DEFAULT_IOSCHED="cfq" | ||
176 | # CONFIG_FREEZER is not set | ||
177 | CONFIG_PPC_MSI_BITMAP=y | ||
178 | |||
179 | # | ||
180 | # Platform support | ||
181 | # | ||
182 | # CONFIG_PPC_CELL is not set | ||
183 | # CONFIG_PPC_CELL_NATIVE is not set | ||
184 | # CONFIG_PQ2ADS is not set | ||
185 | CONFIG_MPC85xx=y | ||
186 | # CONFIG_MPC8540_ADS is not set | ||
187 | # CONFIG_MPC8560_ADS is not set | ||
188 | # CONFIG_MPC85xx_CDS is not set | ||
189 | # CONFIG_MPC85xx_MDS is not set | ||
190 | # CONFIG_MPC8536_DS is not set | ||
191 | # CONFIG_MPC85xx_DS is not set | ||
192 | # CONFIG_SOCRATES is not set | ||
193 | # CONFIG_KSI8560 is not set | ||
194 | CONFIG_XES_MPC85xx=y | ||
195 | # CONFIG_STX_GP3 is not set | ||
196 | # CONFIG_TQM8540 is not set | ||
197 | # CONFIG_TQM8541 is not set | ||
198 | # CONFIG_TQM8548 is not set | ||
199 | # CONFIG_TQM8555 is not set | ||
200 | # CONFIG_TQM8560 is not set | ||
201 | # CONFIG_SBC8548 is not set | ||
202 | # CONFIG_SBC8560 is not set | ||
203 | # CONFIG_IPIC is not set | ||
204 | CONFIG_MPIC=y | ||
205 | # CONFIG_MPIC_WEIRD is not set | ||
206 | # CONFIG_PPC_I8259 is not set | ||
207 | # CONFIG_PPC_RTAS is not set | ||
208 | # CONFIG_MMIO_NVRAM is not set | ||
209 | # CONFIG_PPC_MPC106 is not set | ||
210 | # CONFIG_PPC_970_NAP is not set | ||
211 | # CONFIG_PPC_INDIRECT_IO is not set | ||
212 | # CONFIG_GENERIC_IOMAP is not set | ||
213 | # CONFIG_CPU_FREQ is not set | ||
214 | # CONFIG_QUICC_ENGINE is not set | ||
215 | # CONFIG_CPM2 is not set | ||
216 | # CONFIG_FSL_ULI1575 is not set | ||
217 | CONFIG_MPC8xxx_GPIO=y | ||
218 | # CONFIG_SIMPLE_GPIO is not set | ||
219 | |||
220 | # | ||
221 | # Kernel options | ||
222 | # | ||
223 | CONFIG_HIGHMEM=y | ||
224 | # CONFIG_NO_HZ is not set | ||
225 | # CONFIG_HIGH_RES_TIMERS is not set | ||
226 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | ||
227 | # CONFIG_HZ_100 is not set | ||
228 | CONFIG_HZ_250=y | ||
229 | # CONFIG_HZ_300 is not set | ||
230 | # CONFIG_HZ_1000 is not set | ||
231 | CONFIG_HZ=250 | ||
232 | # CONFIG_SCHED_HRTICK is not set | ||
233 | CONFIG_PREEMPT_NONE=y | ||
234 | # CONFIG_PREEMPT_VOLUNTARY is not set | ||
235 | # CONFIG_PREEMPT is not set | ||
236 | CONFIG_BINFMT_ELF=y | ||
237 | # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set | ||
238 | # CONFIG_HAVE_AOUT is not set | ||
239 | # CONFIG_BINFMT_MISC is not set | ||
240 | CONFIG_MATH_EMULATION=y | ||
241 | # CONFIG_IOMMU_HELPER is not set | ||
242 | CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y | ||
243 | CONFIG_ARCH_HAS_WALK_MEMORY=y | ||
244 | CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y | ||
245 | # CONFIG_IRQ_ALL_CPUS is not set | ||
246 | CONFIG_ARCH_FLATMEM_ENABLE=y | ||
247 | CONFIG_ARCH_POPULATES_NODE_MAP=y | ||
248 | CONFIG_SELECT_MEMORY_MODEL=y | ||
249 | CONFIG_FLATMEM_MANUAL=y | ||
250 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
251 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
252 | CONFIG_FLATMEM=y | ||
253 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
254 | CONFIG_PAGEFLAGS_EXTENDED=y | ||
255 | CONFIG_SPLIT_PTLOCK_CPUS=4 | ||
256 | CONFIG_MIGRATION=y | ||
257 | # CONFIG_PHYS_ADDR_T_64BIT is not set | ||
258 | CONFIG_ZONE_DMA_FLAG=1 | ||
259 | CONFIG_BOUNCE=y | ||
260 | CONFIG_VIRT_TO_BUS=y | ||
261 | CONFIG_UNEVICTABLE_LRU=y | ||
262 | CONFIG_HAVE_MLOCK=y | ||
263 | CONFIG_HAVE_MLOCKED_PAGE_BIT=y | ||
264 | CONFIG_PPC_4K_PAGES=y | ||
265 | # CONFIG_PPC_16K_PAGES is not set | ||
266 | # CONFIG_PPC_64K_PAGES is not set | ||
267 | # CONFIG_PPC_256K_PAGES is not set | ||
268 | CONFIG_FORCE_MAX_ZONEORDER=11 | ||
269 | CONFIG_PROC_DEVICETREE=y | ||
270 | # CONFIG_CMDLINE_BOOL is not set | ||
271 | CONFIG_EXTRA_TARGETS="" | ||
272 | # CONFIG_PM is not set | ||
273 | CONFIG_SECCOMP=y | ||
274 | CONFIG_ISA_DMA_API=y | ||
275 | |||
276 | # | ||
277 | # Bus options | ||
278 | # | ||
279 | CONFIG_ZONE_DMA=y | ||
280 | CONFIG_PPC_INDIRECT_PCI=y | ||
281 | CONFIG_FSL_SOC=y | ||
282 | CONFIG_FSL_PCI=y | ||
283 | CONFIG_FSL_LBC=y | ||
284 | CONFIG_PPC_PCI_CHOICE=y | ||
285 | CONFIG_PCI=y | ||
286 | CONFIG_PCI_DOMAINS=y | ||
287 | CONFIG_PCI_SYSCALL=y | ||
288 | CONFIG_PCIEPORTBUS=y | ||
289 | CONFIG_PCIEAER=y | ||
290 | # CONFIG_PCIEASPM is not set | ||
291 | CONFIG_ARCH_SUPPORTS_MSI=y | ||
292 | CONFIG_PCI_MSI=y | ||
293 | CONFIG_PCI_LEGACY=y | ||
294 | # CONFIG_PCI_DEBUG is not set | ||
295 | # CONFIG_PCI_STUB is not set | ||
296 | # CONFIG_PCI_IOV is not set | ||
297 | # CONFIG_PCCARD is not set | ||
298 | # CONFIG_HOTPLUG_PCI is not set | ||
299 | # CONFIG_HAS_RAPIDIO is not set | ||
300 | |||
301 | # | ||
302 | # Advanced setup | ||
303 | # | ||
304 | CONFIG_ADVANCED_OPTIONS=y | ||
305 | CONFIG_LOWMEM_SIZE_BOOL=y | ||
306 | CONFIG_LOWMEM_SIZE=0x40000000 | ||
307 | # CONFIG_LOWMEM_CAM_NUM_BOOL is not set | ||
308 | CONFIG_LOWMEM_CAM_NUM=3 | ||
309 | # CONFIG_RELOCATABLE is not set | ||
310 | CONFIG_PAGE_OFFSET_BOOL=y | ||
311 | CONFIG_PAGE_OFFSET=0x80000000 | ||
312 | CONFIG_KERNEL_START_BOOL=y | ||
313 | CONFIG_KERNEL_START=0x80000000 | ||
314 | # CONFIG_PHYSICAL_START_BOOL is not set | ||
315 | CONFIG_PHYSICAL_START=0x00000000 | ||
316 | CONFIG_PHYSICAL_ALIGN=0x04000000 | ||
317 | CONFIG_TASK_SIZE_BOOL=y | ||
318 | CONFIG_TASK_SIZE=0x80000000 | ||
319 | CONFIG_NET=y | ||
320 | |||
321 | # | ||
322 | # Networking options | ||
323 | # | ||
324 | CONFIG_PACKET=y | ||
325 | # CONFIG_PACKET_MMAP is not set | ||
326 | CONFIG_UNIX=y | ||
327 | CONFIG_XFRM=y | ||
328 | CONFIG_XFRM_USER=y | ||
329 | # CONFIG_XFRM_SUB_POLICY is not set | ||
330 | # CONFIG_XFRM_MIGRATE is not set | ||
331 | # CONFIG_XFRM_STATISTICS is not set | ||
332 | CONFIG_NET_KEY=y | ||
333 | # CONFIG_NET_KEY_MIGRATE is not set | ||
334 | CONFIG_INET=y | ||
335 | CONFIG_IP_MULTICAST=y | ||
336 | CONFIG_IP_ADVANCED_ROUTER=y | ||
337 | CONFIG_ASK_IP_FIB_HASH=y | ||
338 | # CONFIG_IP_FIB_TRIE is not set | ||
339 | CONFIG_IP_FIB_HASH=y | ||
340 | CONFIG_IP_MULTIPLE_TABLES=y | ||
341 | CONFIG_IP_ROUTE_MULTIPATH=y | ||
342 | CONFIG_IP_ROUTE_VERBOSE=y | ||
343 | CONFIG_IP_PNP=y | ||
344 | CONFIG_IP_PNP_DHCP=y | ||
345 | CONFIG_IP_PNP_BOOTP=y | ||
346 | CONFIG_IP_PNP_RARP=y | ||
347 | CONFIG_NET_IPIP=y | ||
348 | CONFIG_NET_IPGRE=y | ||
349 | CONFIG_NET_IPGRE_BROADCAST=y | ||
350 | CONFIG_IP_MROUTE=y | ||
351 | CONFIG_IP_PIMSM_V1=y | ||
352 | CONFIG_IP_PIMSM_V2=y | ||
353 | CONFIG_ARPD=y | ||
354 | # CONFIG_SYN_COOKIES is not set | ||
355 | # CONFIG_INET_AH is not set | ||
356 | # CONFIG_INET_ESP is not set | ||
357 | # CONFIG_INET_IPCOMP is not set | ||
358 | # CONFIG_INET_XFRM_TUNNEL is not set | ||
359 | CONFIG_INET_TUNNEL=y | ||
360 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | ||
361 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | ||
362 | # CONFIG_INET_XFRM_MODE_BEET is not set | ||
363 | # CONFIG_INET_LRO is not set | ||
364 | CONFIG_INET_DIAG=y | ||
365 | CONFIG_INET_TCP_DIAG=y | ||
366 | # CONFIG_TCP_CONG_ADVANCED is not set | ||
367 | CONFIG_TCP_CONG_CUBIC=y | ||
368 | CONFIG_DEFAULT_TCP_CONG="cubic" | ||
369 | # CONFIG_TCP_MD5SIG is not set | ||
370 | CONFIG_IPV6=y | ||
371 | # CONFIG_IPV6_PRIVACY is not set | ||
372 | # CONFIG_IPV6_ROUTER_PREF is not set | ||
373 | # CONFIG_IPV6_OPTIMISTIC_DAD is not set | ||
374 | # CONFIG_INET6_AH is not set | ||
375 | # CONFIG_INET6_ESP is not set | ||
376 | # CONFIG_INET6_IPCOMP is not set | ||
377 | # CONFIG_IPV6_MIP6 is not set | ||
378 | # CONFIG_INET6_XFRM_TUNNEL is not set | ||
379 | # CONFIG_INET6_TUNNEL is not set | ||
380 | CONFIG_INET6_XFRM_MODE_TRANSPORT=y | ||
381 | CONFIG_INET6_XFRM_MODE_TUNNEL=y | ||
382 | CONFIG_INET6_XFRM_MODE_BEET=y | ||
383 | # CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set | ||
384 | CONFIG_IPV6_SIT=y | ||
385 | CONFIG_IPV6_NDISC_NODETYPE=y | ||
386 | # CONFIG_IPV6_TUNNEL is not set | ||
387 | # CONFIG_IPV6_MULTIPLE_TABLES is not set | ||
388 | # CONFIG_IPV6_MROUTE is not set | ||
389 | # CONFIG_NETWORK_SECMARK is not set | ||
390 | # CONFIG_NETFILTER is not set | ||
391 | # CONFIG_IP_DCCP is not set | ||
392 | # CONFIG_IP_SCTP is not set | ||
393 | # CONFIG_TIPC is not set | ||
394 | # CONFIG_ATM is not set | ||
395 | # CONFIG_BRIDGE is not set | ||
396 | # CONFIG_NET_DSA is not set | ||
397 | # CONFIG_VLAN_8021Q is not set | ||
398 | # CONFIG_DECNET is not set | ||
399 | # CONFIG_LLC2 is not set | ||
400 | # CONFIG_IPX is not set | ||
401 | # CONFIG_ATALK is not set | ||
402 | # CONFIG_X25 is not set | ||
403 | # CONFIG_LAPB is not set | ||
404 | # CONFIG_ECONET is not set | ||
405 | # CONFIG_WAN_ROUTER is not set | ||
406 | # CONFIG_PHONET is not set | ||
407 | # CONFIG_NET_SCHED is not set | ||
408 | # CONFIG_DCB is not set | ||
409 | |||
410 | # | ||
411 | # Network testing | ||
412 | # | ||
413 | # CONFIG_NET_PKTGEN is not set | ||
414 | # CONFIG_HAMRADIO is not set | ||
415 | # CONFIG_CAN is not set | ||
416 | # CONFIG_IRDA is not set | ||
417 | # CONFIG_BT is not set | ||
418 | # CONFIG_AF_RXRPC is not set | ||
419 | CONFIG_FIB_RULES=y | ||
420 | # CONFIG_WIRELESS is not set | ||
421 | # CONFIG_WIMAX is not set | ||
422 | # CONFIG_RFKILL is not set | ||
423 | # CONFIG_NET_9P is not set | ||
424 | |||
425 | # | ||
426 | # Device Drivers | ||
427 | # | ||
428 | |||
429 | # | ||
430 | # Generic Driver Options | ||
431 | # | ||
432 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
433 | CONFIG_STANDALONE=y | ||
434 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
435 | CONFIG_FW_LOADER=y | ||
436 | CONFIG_FIRMWARE_IN_KERNEL=y | ||
437 | CONFIG_EXTRA_FIRMWARE="" | ||
438 | # CONFIG_DEBUG_DRIVER is not set | ||
439 | # CONFIG_DEBUG_DEVRES is not set | ||
440 | # CONFIG_SYS_HYPERVISOR is not set | ||
441 | # CONFIG_CONNECTOR is not set | ||
442 | CONFIG_MTD=y | ||
443 | # CONFIG_MTD_DEBUG is not set | ||
444 | # CONFIG_MTD_CONCAT is not set | ||
445 | CONFIG_MTD_PARTITIONS=y | ||
446 | # CONFIG_MTD_TESTS is not set | ||
447 | CONFIG_MTD_REDBOOT_PARTS=y | ||
448 | CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1 | ||
449 | # CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set | ||
450 | # CONFIG_MTD_REDBOOT_PARTS_READONLY is not set | ||
451 | CONFIG_MTD_CMDLINE_PARTS=y | ||
452 | CONFIG_MTD_OF_PARTS=y | ||
453 | # CONFIG_MTD_AR7_PARTS is not set | ||
454 | |||
455 | # | ||
456 | # User Modules And Translation Layers | ||
457 | # | ||
458 | CONFIG_MTD_CHAR=y | ||
459 | CONFIG_MTD_BLKDEVS=y | ||
460 | CONFIG_MTD_BLOCK=y | ||
461 | # CONFIG_FTL is not set | ||
462 | # CONFIG_NFTL is not set | ||
463 | # CONFIG_INFTL is not set | ||
464 | # CONFIG_RFD_FTL is not set | ||
465 | # CONFIG_SSFDC is not set | ||
466 | # CONFIG_MTD_OOPS is not set | ||
467 | |||
468 | # | ||
469 | # RAM/ROM/Flash chip drivers | ||
470 | # | ||
471 | CONFIG_MTD_CFI=y | ||
472 | CONFIG_MTD_JEDECPROBE=y | ||
473 | CONFIG_MTD_GEN_PROBE=y | ||
474 | # CONFIG_MTD_CFI_ADV_OPTIONS is not set | ||
475 | CONFIG_MTD_MAP_BANK_WIDTH_1=y | ||
476 | CONFIG_MTD_MAP_BANK_WIDTH_2=y | ||
477 | CONFIG_MTD_MAP_BANK_WIDTH_4=y | ||
478 | # CONFIG_MTD_MAP_BANK_WIDTH_8 is not set | ||
479 | # CONFIG_MTD_MAP_BANK_WIDTH_16 is not set | ||
480 | # CONFIG_MTD_MAP_BANK_WIDTH_32 is not set | ||
481 | CONFIG_MTD_CFI_I1=y | ||
482 | CONFIG_MTD_CFI_I2=y | ||
483 | # CONFIG_MTD_CFI_I4 is not set | ||
484 | # CONFIG_MTD_CFI_I8 is not set | ||
485 | CONFIG_MTD_CFI_INTELEXT=y | ||
486 | CONFIG_MTD_CFI_AMDSTD=y | ||
487 | CONFIG_MTD_CFI_STAA=y | ||
488 | CONFIG_MTD_CFI_UTIL=y | ||
489 | # CONFIG_MTD_RAM is not set | ||
490 | # CONFIG_MTD_ROM is not set | ||
491 | # CONFIG_MTD_ABSENT is not set | ||
492 | |||
493 | # | ||
494 | # Mapping drivers for chip access | ||
495 | # | ||
496 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set | ||
497 | # CONFIG_MTD_PHYSMAP is not set | ||
498 | CONFIG_MTD_PHYSMAP_OF=y | ||
499 | # CONFIG_MTD_INTEL_VR_NOR is not set | ||
500 | # CONFIG_MTD_PLATRAM is not set | ||
501 | |||
502 | # | ||
503 | # Self-contained MTD device drivers | ||
504 | # | ||
505 | # CONFIG_MTD_PMC551 is not set | ||
506 | # CONFIG_MTD_SLRAM is not set | ||
507 | # CONFIG_MTD_PHRAM is not set | ||
508 | # CONFIG_MTD_MTDRAM is not set | ||
509 | # CONFIG_MTD_BLOCK2MTD is not set | ||
510 | |||
511 | # | ||
512 | # Disk-On-Chip Device Drivers | ||
513 | # | ||
514 | # CONFIG_MTD_DOC2000 is not set | ||
515 | # CONFIG_MTD_DOC2001 is not set | ||
516 | # CONFIG_MTD_DOC2001PLUS is not set | ||
517 | CONFIG_MTD_NAND=y | ||
518 | # CONFIG_MTD_NAND_VERIFY_WRITE is not set | ||
519 | # CONFIG_MTD_NAND_ECC_SMC is not set | ||
520 | # CONFIG_MTD_NAND_MUSEUM_IDS is not set | ||
521 | CONFIG_MTD_NAND_IDS=y | ||
522 | # CONFIG_MTD_NAND_DISKONCHIP is not set | ||
523 | # CONFIG_MTD_NAND_CAFE is not set | ||
524 | # CONFIG_MTD_NAND_NANDSIM is not set | ||
525 | # CONFIG_MTD_NAND_PLATFORM is not set | ||
526 | # CONFIG_MTD_ALAUDA is not set | ||
527 | CONFIG_MTD_NAND_FSL_ELBC=y | ||
528 | CONFIG_MTD_NAND_FSL_UPM=y | ||
529 | # CONFIG_MTD_ONENAND is not set | ||
530 | |||
531 | # | ||
532 | # LPDDR flash memory drivers | ||
533 | # | ||
534 | # CONFIG_MTD_LPDDR is not set | ||
535 | |||
536 | # | ||
537 | # UBI - Unsorted block images | ||
538 | # | ||
539 | # CONFIG_MTD_UBI is not set | ||
540 | CONFIG_OF_DEVICE=y | ||
541 | CONFIG_OF_GPIO=y | ||
542 | CONFIG_OF_I2C=y | ||
543 | # CONFIG_PARPORT is not set | ||
544 | CONFIG_BLK_DEV=y | ||
545 | # CONFIG_BLK_DEV_FD is not set | ||
546 | # CONFIG_BLK_CPQ_DA is not set | ||
547 | # CONFIG_BLK_CPQ_CISS_DA is not set | ||
548 | # CONFIG_BLK_DEV_DAC960 is not set | ||
549 | # CONFIG_BLK_DEV_UMEM is not set | ||
550 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
551 | CONFIG_BLK_DEV_LOOP=y | ||
552 | # CONFIG_BLK_DEV_CRYPTOLOOP is not set | ||
553 | CONFIG_BLK_DEV_NBD=y | ||
554 | # CONFIG_BLK_DEV_SX8 is not set | ||
555 | # CONFIG_BLK_DEV_UB is not set | ||
556 | CONFIG_BLK_DEV_RAM=y | ||
557 | CONFIG_BLK_DEV_RAM_COUNT=16 | ||
558 | CONFIG_BLK_DEV_RAM_SIZE=131072 | ||
559 | # CONFIG_BLK_DEV_XIP is not set | ||
560 | # CONFIG_CDROM_PKTCDVD is not set | ||
561 | # CONFIG_ATA_OVER_ETH is not set | ||
562 | # CONFIG_BLK_DEV_HD is not set | ||
563 | CONFIG_MISC_DEVICES=y | ||
564 | # CONFIG_PHANTOM is not set | ||
565 | # CONFIG_SGI_IOC4 is not set | ||
566 | # CONFIG_TIFM_CORE is not set | ||
567 | # CONFIG_ICS932S401 is not set | ||
568 | # CONFIG_ENCLOSURE_SERVICES is not set | ||
569 | # CONFIG_HP_ILO is not set | ||
570 | # CONFIG_ISL29003 is not set | ||
571 | # CONFIG_C2PORT is not set | ||
572 | |||
573 | # | ||
574 | # EEPROM support | ||
575 | # | ||
576 | # CONFIG_EEPROM_AT24 is not set | ||
577 | # CONFIG_EEPROM_LEGACY is not set | ||
578 | # CONFIG_EEPROM_93CX6 is not set | ||
579 | CONFIG_HAVE_IDE=y | ||
580 | # CONFIG_IDE is not set | ||
581 | |||
582 | # | ||
583 | # SCSI device support | ||
584 | # | ||
585 | # CONFIG_RAID_ATTRS is not set | ||
586 | CONFIG_SCSI=y | ||
587 | CONFIG_SCSI_DMA=y | ||
588 | # CONFIG_SCSI_TGT is not set | ||
589 | # CONFIG_SCSI_NETLINK is not set | ||
590 | CONFIG_SCSI_PROC_FS=y | ||
591 | |||
592 | # | ||
593 | # SCSI support type (disk, tape, CD-ROM) | ||
594 | # | ||
595 | CONFIG_BLK_DEV_SD=y | ||
596 | CONFIG_CHR_DEV_ST=y | ||
597 | # CONFIG_CHR_DEV_OSST is not set | ||
598 | CONFIG_BLK_DEV_SR=y | ||
599 | # CONFIG_BLK_DEV_SR_VENDOR is not set | ||
600 | CONFIG_CHR_DEV_SG=y | ||
601 | # CONFIG_CHR_DEV_SCH is not set | ||
602 | |||
603 | # | ||
604 | # Some SCSI devices (e.g. CD jukebox) support multiple LUNs | ||
605 | # | ||
606 | CONFIG_SCSI_MULTI_LUN=y | ||
607 | # CONFIG_SCSI_CONSTANTS is not set | ||
608 | CONFIG_SCSI_LOGGING=y | ||
609 | # CONFIG_SCSI_SCAN_ASYNC is not set | ||
610 | CONFIG_SCSI_WAIT_SCAN=m | ||
611 | |||
612 | # | ||
613 | # SCSI Transports | ||
614 | # | ||
615 | # CONFIG_SCSI_SPI_ATTRS is not set | ||
616 | # CONFIG_SCSI_FC_ATTRS is not set | ||
617 | # CONFIG_SCSI_ISCSI_ATTRS is not set | ||
618 | # CONFIG_SCSI_SAS_LIBSAS is not set | ||
619 | # CONFIG_SCSI_SRP_ATTRS is not set | ||
620 | CONFIG_SCSI_LOWLEVEL=y | ||
621 | # CONFIG_ISCSI_TCP is not set | ||
622 | # CONFIG_BLK_DEV_3W_XXXX_RAID is not set | ||
623 | # CONFIG_SCSI_3W_9XXX is not set | ||
624 | # CONFIG_SCSI_ACARD is not set | ||
625 | # CONFIG_SCSI_AACRAID is not set | ||
626 | # CONFIG_SCSI_AIC7XXX is not set | ||
627 | # CONFIG_SCSI_AIC7XXX_OLD is not set | ||
628 | # CONFIG_SCSI_AIC79XX is not set | ||
629 | # CONFIG_SCSI_AIC94XX is not set | ||
630 | # CONFIG_SCSI_DPT_I2O is not set | ||
631 | # CONFIG_SCSI_ADVANSYS is not set | ||
632 | # CONFIG_SCSI_ARCMSR is not set | ||
633 | # CONFIG_MEGARAID_NEWGEN is not set | ||
634 | # CONFIG_MEGARAID_LEGACY is not set | ||
635 | # CONFIG_MEGARAID_SAS is not set | ||
636 | # CONFIG_SCSI_MPT2SAS is not set | ||
637 | # CONFIG_SCSI_HPTIOP is not set | ||
638 | # CONFIG_SCSI_BUSLOGIC is not set | ||
639 | # CONFIG_LIBFC is not set | ||
640 | # CONFIG_LIBFCOE is not set | ||
641 | # CONFIG_FCOE is not set | ||
642 | # CONFIG_SCSI_DMX3191D is not set | ||
643 | # CONFIG_SCSI_EATA is not set | ||
644 | # CONFIG_SCSI_FUTURE_DOMAIN is not set | ||
645 | # CONFIG_SCSI_GDTH is not set | ||
646 | # CONFIG_SCSI_IPS is not set | ||
647 | # CONFIG_SCSI_INITIO is not set | ||
648 | # CONFIG_SCSI_INIA100 is not set | ||
649 | # CONFIG_SCSI_MVSAS is not set | ||
650 | # CONFIG_SCSI_STEX is not set | ||
651 | # CONFIG_SCSI_SYM53C8XX_2 is not set | ||
652 | # CONFIG_SCSI_IPR is not set | ||
653 | # CONFIG_SCSI_QLOGIC_1280 is not set | ||
654 | # CONFIG_SCSI_QLA_FC is not set | ||
655 | # CONFIG_SCSI_QLA_ISCSI is not set | ||
656 | # CONFIG_SCSI_LPFC is not set | ||
657 | # CONFIG_SCSI_DC395x is not set | ||
658 | # CONFIG_SCSI_DC390T is not set | ||
659 | # CONFIG_SCSI_NSP32 is not set | ||
660 | # CONFIG_SCSI_DEBUG is not set | ||
661 | # CONFIG_SCSI_SRP is not set | ||
662 | # CONFIG_SCSI_DH is not set | ||
663 | # CONFIG_SCSI_OSD_INITIATOR is not set | ||
664 | CONFIG_ATA=y | ||
665 | # CONFIG_ATA_NONSTANDARD is not set | ||
666 | CONFIG_SATA_PMP=y | ||
667 | CONFIG_SATA_AHCI=y | ||
668 | # CONFIG_SATA_SIL24 is not set | ||
669 | # CONFIG_SATA_FSL is not set | ||
670 | CONFIG_ATA_SFF=y | ||
671 | # CONFIG_SATA_SVW is not set | ||
672 | # CONFIG_ATA_PIIX is not set | ||
673 | # CONFIG_SATA_MV is not set | ||
674 | # CONFIG_SATA_NV is not set | ||
675 | # CONFIG_PDC_ADMA is not set | ||
676 | # CONFIG_SATA_QSTOR is not set | ||
677 | # CONFIG_SATA_PROMISE is not set | ||
678 | # CONFIG_SATA_SX4 is not set | ||
679 | # CONFIG_SATA_SIL is not set | ||
680 | # CONFIG_SATA_SIS is not set | ||
681 | # CONFIG_SATA_ULI is not set | ||
682 | # CONFIG_SATA_VIA is not set | ||
683 | # CONFIG_SATA_VITESSE is not set | ||
684 | # CONFIG_SATA_INIC162X is not set | ||
685 | CONFIG_PATA_ALI=y | ||
686 | # CONFIG_PATA_AMD is not set | ||
687 | # CONFIG_PATA_ARTOP is not set | ||
688 | # CONFIG_PATA_ATIIXP is not set | ||
689 | # CONFIG_PATA_CMD640_PCI is not set | ||
690 | # CONFIG_PATA_CMD64X is not set | ||
691 | # CONFIG_PATA_CS5520 is not set | ||
692 | # CONFIG_PATA_CS5530 is not set | ||
693 | # CONFIG_PATA_CYPRESS is not set | ||
694 | # CONFIG_PATA_EFAR is not set | ||
695 | # CONFIG_ATA_GENERIC is not set | ||
696 | # CONFIG_PATA_HPT366 is not set | ||
697 | # CONFIG_PATA_HPT37X is not set | ||
698 | # CONFIG_PATA_HPT3X2N is not set | ||
699 | # CONFIG_PATA_HPT3X3 is not set | ||
700 | # CONFIG_PATA_IT821X is not set | ||
701 | # CONFIG_PATA_IT8213 is not set | ||
702 | # CONFIG_PATA_JMICRON is not set | ||
703 | # CONFIG_PATA_TRIFLEX is not set | ||
704 | # CONFIG_PATA_MARVELL is not set | ||
705 | # CONFIG_PATA_MPIIX is not set | ||
706 | # CONFIG_PATA_OLDPIIX is not set | ||
707 | # CONFIG_PATA_NETCELL is not set | ||
708 | # CONFIG_PATA_NINJA32 is not set | ||
709 | # CONFIG_PATA_NS87410 is not set | ||
710 | # CONFIG_PATA_NS87415 is not set | ||
711 | # CONFIG_PATA_OPTI is not set | ||
712 | # CONFIG_PATA_OPTIDMA is not set | ||
713 | # CONFIG_PATA_PDC_OLD is not set | ||
714 | # CONFIG_PATA_RADISYS is not set | ||
715 | # CONFIG_PATA_RZ1000 is not set | ||
716 | # CONFIG_PATA_SC1200 is not set | ||
717 | # CONFIG_PATA_SERVERWORKS is not set | ||
718 | # CONFIG_PATA_PDC2027X is not set | ||
719 | # CONFIG_PATA_SIL680 is not set | ||
720 | # CONFIG_PATA_SIS is not set | ||
721 | # CONFIG_PATA_VIA is not set | ||
722 | # CONFIG_PATA_WINBOND is not set | ||
723 | # CONFIG_PATA_PLATFORM is not set | ||
724 | # CONFIG_PATA_SCH is not set | ||
725 | # CONFIG_MD is not set | ||
726 | # CONFIG_FUSION is not set | ||
727 | |||
728 | # | ||
729 | # IEEE 1394 (FireWire) support | ||
730 | # | ||
731 | |||
732 | # | ||
733 | # Enable only one of the two stacks, unless you know what you are doing | ||
734 | # | ||
735 | # CONFIG_FIREWIRE is not set | ||
736 | # CONFIG_IEEE1394 is not set | ||
737 | # CONFIG_I2O is not set | ||
738 | # CONFIG_MACINTOSH_DRIVERS is not set | ||
739 | CONFIG_NETDEVICES=y | ||
740 | CONFIG_COMPAT_NET_DEV_OPS=y | ||
741 | CONFIG_DUMMY=y | ||
742 | # CONFIG_BONDING is not set | ||
743 | # CONFIG_MACVLAN is not set | ||
744 | # CONFIG_EQUALIZER is not set | ||
745 | # CONFIG_TUN is not set | ||
746 | # CONFIG_VETH is not set | ||
747 | # CONFIG_ARCNET is not set | ||
748 | CONFIG_PHYLIB=y | ||
749 | |||
750 | # | ||
751 | # MII PHY device drivers | ||
752 | # | ||
753 | # CONFIG_MARVELL_PHY is not set | ||
754 | # CONFIG_DAVICOM_PHY is not set | ||
755 | # CONFIG_QSEMI_PHY is not set | ||
756 | # CONFIG_LXT_PHY is not set | ||
757 | # CONFIG_CICADA_PHY is not set | ||
758 | # CONFIG_VITESSE_PHY is not set | ||
759 | # CONFIG_SMSC_PHY is not set | ||
760 | CONFIG_BROADCOM_PHY=y | ||
761 | # CONFIG_ICPLUS_PHY is not set | ||
762 | # CONFIG_REALTEK_PHY is not set | ||
763 | # CONFIG_NATIONAL_PHY is not set | ||
764 | # CONFIG_STE10XP is not set | ||
765 | # CONFIG_LSI_ET1011C_PHY is not set | ||
766 | # CONFIG_FIXED_PHY is not set | ||
767 | # CONFIG_MDIO_BITBANG is not set | ||
768 | CONFIG_NET_ETHERNET=y | ||
769 | CONFIG_MII=y | ||
770 | # CONFIG_HAPPYMEAL is not set | ||
771 | # CONFIG_SUNGEM is not set | ||
772 | # CONFIG_CASSINI is not set | ||
773 | # CONFIG_NET_VENDOR_3COM is not set | ||
774 | # CONFIG_ETHOC is not set | ||
775 | # CONFIG_DNET is not set | ||
776 | # CONFIG_NET_TULIP is not set | ||
777 | # CONFIG_HP100 is not set | ||
778 | # CONFIG_IBM_NEW_EMAC_ZMII is not set | ||
779 | # CONFIG_IBM_NEW_EMAC_RGMII is not set | ||
780 | # CONFIG_IBM_NEW_EMAC_TAH is not set | ||
781 | # CONFIG_IBM_NEW_EMAC_EMAC4 is not set | ||
782 | # CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set | ||
783 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set | ||
784 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set | ||
785 | # CONFIG_NET_PCI is not set | ||
786 | # CONFIG_B44 is not set | ||
787 | # CONFIG_ATL2 is not set | ||
788 | CONFIG_NETDEV_1000=y | ||
789 | # CONFIG_ACENIC is not set | ||
790 | # CONFIG_DL2K is not set | ||
791 | CONFIG_E1000=y | ||
792 | # CONFIG_E1000E is not set | ||
793 | # CONFIG_IP1000 is not set | ||
794 | # CONFIG_IGB is not set | ||
795 | # CONFIG_IGBVF is not set | ||
796 | # CONFIG_NS83820 is not set | ||
797 | # CONFIG_HAMACHI is not set | ||
798 | # CONFIG_YELLOWFIN is not set | ||
799 | # CONFIG_R8169 is not set | ||
800 | # CONFIG_SIS190 is not set | ||
801 | # CONFIG_SKGE is not set | ||
802 | # CONFIG_SKY2 is not set | ||
803 | # CONFIG_VIA_VELOCITY is not set | ||
804 | # CONFIG_TIGON3 is not set | ||
805 | # CONFIG_BNX2 is not set | ||
806 | CONFIG_FSL_PQ_MDIO=y | ||
807 | CONFIG_GIANFAR=y | ||
808 | # CONFIG_QLA3XXX is not set | ||
809 | # CONFIG_ATL1 is not set | ||
810 | # CONFIG_ATL1E is not set | ||
811 | # CONFIG_ATL1C is not set | ||
812 | # CONFIG_JME is not set | ||
813 | # CONFIG_NETDEV_10000 is not set | ||
814 | # CONFIG_TR is not set | ||
815 | |||
816 | # | ||
817 | # Wireless LAN | ||
818 | # | ||
819 | # CONFIG_WLAN_PRE80211 is not set | ||
820 | # CONFIG_WLAN_80211 is not set | ||
821 | |||
822 | # | ||
823 | # Enable WiMAX (Networking options) to see the WiMAX drivers | ||
824 | # | ||
825 | |||
826 | # | ||
827 | # USB Network Adapters | ||
828 | # | ||
829 | # CONFIG_USB_CATC is not set | ||
830 | # CONFIG_USB_KAWETH is not set | ||
831 | # CONFIG_USB_PEGASUS is not set | ||
832 | # CONFIG_USB_RTL8150 is not set | ||
833 | # CONFIG_USB_USBNET is not set | ||
834 | # CONFIG_WAN is not set | ||
835 | # CONFIG_FDDI is not set | ||
836 | # CONFIG_HIPPI is not set | ||
837 | # CONFIG_PPP is not set | ||
838 | # CONFIG_SLIP is not set | ||
839 | # CONFIG_NET_FC is not set | ||
840 | # CONFIG_NETCONSOLE is not set | ||
841 | # CONFIG_NETPOLL is not set | ||
842 | # CONFIG_NET_POLL_CONTROLLER is not set | ||
843 | # CONFIG_ISDN is not set | ||
844 | # CONFIG_PHONE is not set | ||
845 | |||
846 | # | ||
847 | # Input device support | ||
848 | # | ||
849 | CONFIG_INPUT=y | ||
850 | # CONFIG_INPUT_FF_MEMLESS is not set | ||
851 | # CONFIG_INPUT_POLLDEV is not set | ||
852 | |||
853 | # | ||
854 | # Userland interfaces | ||
855 | # | ||
856 | # CONFIG_INPUT_MOUSEDEV is not set | ||
857 | # CONFIG_INPUT_JOYDEV is not set | ||
858 | # CONFIG_INPUT_EVDEV is not set | ||
859 | # CONFIG_INPUT_EVBUG is not set | ||
860 | |||
861 | # | ||
862 | # Input Device Drivers | ||
863 | # | ||
864 | # CONFIG_INPUT_KEYBOARD is not set | ||
865 | # CONFIG_INPUT_MOUSE is not set | ||
866 | # CONFIG_INPUT_JOYSTICK is not set | ||
867 | # CONFIG_INPUT_TABLET is not set | ||
868 | # CONFIG_INPUT_TOUCHSCREEN is not set | ||
869 | # CONFIG_INPUT_MISC is not set | ||
870 | |||
871 | # | ||
872 | # Hardware I/O ports | ||
873 | # | ||
874 | CONFIG_SERIO=y | ||
875 | CONFIG_SERIO_I8042=y | ||
876 | CONFIG_SERIO_SERPORT=y | ||
877 | # CONFIG_SERIO_PCIPS2 is not set | ||
878 | CONFIG_SERIO_LIBPS2=y | ||
879 | # CONFIG_SERIO_RAW is not set | ||
880 | # CONFIG_SERIO_XILINX_XPS_PS2 is not set | ||
881 | # CONFIG_GAMEPORT is not set | ||
882 | |||
883 | # | ||
884 | # Character devices | ||
885 | # | ||
886 | CONFIG_VT=y | ||
887 | CONFIG_CONSOLE_TRANSLATIONS=y | ||
888 | CONFIG_VT_CONSOLE=y | ||
889 | CONFIG_HW_CONSOLE=y | ||
890 | # CONFIG_VT_HW_CONSOLE_BINDING is not set | ||
891 | CONFIG_DEVKMEM=y | ||
892 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
893 | # CONFIG_NOZOMI is not set | ||
894 | |||
895 | # | ||
896 | # Serial drivers | ||
897 | # | ||
898 | CONFIG_SERIAL_8250=y | ||
899 | CONFIG_SERIAL_8250_CONSOLE=y | ||
900 | CONFIG_SERIAL_8250_PCI=y | ||
901 | CONFIG_SERIAL_8250_NR_UARTS=2 | ||
902 | CONFIG_SERIAL_8250_RUNTIME_UARTS=2 | ||
903 | CONFIG_SERIAL_8250_EXTENDED=y | ||
904 | CONFIG_SERIAL_8250_MANY_PORTS=y | ||
905 | CONFIG_SERIAL_8250_SHARE_IRQ=y | ||
906 | CONFIG_SERIAL_8250_DETECT_IRQ=y | ||
907 | CONFIG_SERIAL_8250_RSA=y | ||
908 | |||
909 | # | ||
910 | # Non-8250 serial port support | ||
911 | # | ||
912 | # CONFIG_SERIAL_UARTLITE is not set | ||
913 | CONFIG_SERIAL_CORE=y | ||
914 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
915 | # CONFIG_SERIAL_JSM is not set | ||
916 | # CONFIG_SERIAL_OF_PLATFORM is not set | ||
917 | CONFIG_UNIX98_PTYS=y | ||
918 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | ||
919 | CONFIG_LEGACY_PTYS=y | ||
920 | CONFIG_LEGACY_PTY_COUNT=256 | ||
921 | # CONFIG_HVC_UDBG is not set | ||
922 | # CONFIG_IPMI_HANDLER is not set | ||
923 | # CONFIG_HW_RANDOM is not set | ||
924 | CONFIG_NVRAM=y | ||
925 | # CONFIG_R3964 is not set | ||
926 | # CONFIG_APPLICOM is not set | ||
927 | # CONFIG_RAW_DRIVER is not set | ||
928 | # CONFIG_TCG_TPM is not set | ||
929 | CONFIG_DEVPORT=y | ||
930 | CONFIG_I2C=y | ||
931 | CONFIG_I2C_BOARDINFO=y | ||
932 | CONFIG_I2C_CHARDEV=y | ||
933 | CONFIG_I2C_HELPER_AUTO=y | ||
934 | |||
935 | # | ||
936 | # I2C Hardware Bus support | ||
937 | # | ||
938 | |||
939 | # | ||
940 | # PC SMBus host controller drivers | ||
941 | # | ||
942 | # CONFIG_I2C_ALI1535 is not set | ||
943 | # CONFIG_I2C_ALI1563 is not set | ||
944 | # CONFIG_I2C_ALI15X3 is not set | ||
945 | # CONFIG_I2C_AMD756 is not set | ||
946 | # CONFIG_I2C_AMD8111 is not set | ||
947 | # CONFIG_I2C_I801 is not set | ||
948 | # CONFIG_I2C_ISCH is not set | ||
949 | # CONFIG_I2C_PIIX4 is not set | ||
950 | # CONFIG_I2C_NFORCE2 is not set | ||
951 | # CONFIG_I2C_SIS5595 is not set | ||
952 | # CONFIG_I2C_SIS630 is not set | ||
953 | # CONFIG_I2C_SIS96X is not set | ||
954 | # CONFIG_I2C_VIA is not set | ||
955 | # CONFIG_I2C_VIAPRO is not set | ||
956 | |||
957 | # | ||
958 | # I2C system bus drivers (mostly embedded / system-on-chip) | ||
959 | # | ||
960 | # CONFIG_I2C_GPIO is not set | ||
961 | CONFIG_I2C_MPC=y | ||
962 | # CONFIG_I2C_OCORES is not set | ||
963 | # CONFIG_I2C_SIMTEC is not set | ||
964 | |||
965 | # | ||
966 | # External I2C/SMBus adapter drivers | ||
967 | # | ||
968 | # CONFIG_I2C_PARPORT_LIGHT is not set | ||
969 | # CONFIG_I2C_TAOS_EVM is not set | ||
970 | # CONFIG_I2C_TINY_USB is not set | ||
971 | |||
972 | # | ||
973 | # Graphics adapter I2C/DDC channel drivers | ||
974 | # | ||
975 | # CONFIG_I2C_VOODOO3 is not set | ||
976 | |||
977 | # | ||
978 | # Other I2C/SMBus bus drivers | ||
979 | # | ||
980 | # CONFIG_I2C_PCA_PLATFORM is not set | ||
981 | # CONFIG_I2C_STUB is not set | ||
982 | |||
983 | # | ||
984 | # Miscellaneous I2C Chip support | ||
985 | # | ||
986 | # CONFIG_DS1682 is not set | ||
987 | # CONFIG_SENSORS_PCF8574 is not set | ||
988 | # CONFIG_PCF8575 is not set | ||
989 | # CONFIG_SENSORS_MAX6875 is not set | ||
990 | # CONFIG_SENSORS_TSL2550 is not set | ||
991 | # CONFIG_I2C_DEBUG_CORE is not set | ||
992 | # CONFIG_I2C_DEBUG_ALGO is not set | ||
993 | # CONFIG_I2C_DEBUG_BUS is not set | ||
994 | # CONFIG_I2C_DEBUG_CHIP is not set | ||
995 | # CONFIG_SPI is not set | ||
996 | CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y | ||
997 | CONFIG_ARCH_REQUIRE_GPIOLIB=y | ||
998 | CONFIG_GPIOLIB=y | ||
999 | # CONFIG_DEBUG_GPIO is not set | ||
1000 | CONFIG_GPIO_SYSFS=y | ||
1001 | |||
1002 | # | ||
1003 | # Memory mapped GPIO expanders: | ||
1004 | # | ||
1005 | # CONFIG_GPIO_XILINX is not set | ||
1006 | |||
1007 | # | ||
1008 | # I2C GPIO expanders: | ||
1009 | # | ||
1010 | # CONFIG_GPIO_MAX732X is not set | ||
1011 | CONFIG_GPIO_PCA953X=y | ||
1012 | # CONFIG_GPIO_PCF857X is not set | ||
1013 | |||
1014 | # | ||
1015 | # PCI GPIO expanders: | ||
1016 | # | ||
1017 | # CONFIG_GPIO_BT8XX is not set | ||
1018 | |||
1019 | # | ||
1020 | # SPI GPIO expanders: | ||
1021 | # | ||
1022 | # CONFIG_W1 is not set | ||
1023 | # CONFIG_POWER_SUPPLY is not set | ||
1024 | CONFIG_HWMON=y | ||
1025 | # CONFIG_HWMON_VID is not set | ||
1026 | # CONFIG_SENSORS_AD7414 is not set | ||
1027 | # CONFIG_SENSORS_AD7418 is not set | ||
1028 | # CONFIG_SENSORS_ADM1021 is not set | ||
1029 | # CONFIG_SENSORS_ADM1025 is not set | ||
1030 | # CONFIG_SENSORS_ADM1026 is not set | ||
1031 | # CONFIG_SENSORS_ADM1029 is not set | ||
1032 | # CONFIG_SENSORS_ADM1031 is not set | ||
1033 | # CONFIG_SENSORS_ADM9240 is not set | ||
1034 | # CONFIG_SENSORS_ADT7462 is not set | ||
1035 | # CONFIG_SENSORS_ADT7470 is not set | ||
1036 | # CONFIG_SENSORS_ADT7473 is not set | ||
1037 | # CONFIG_SENSORS_ADT7475 is not set | ||
1038 | # CONFIG_SENSORS_ATXP1 is not set | ||
1039 | CONFIG_SENSORS_DS1621=y | ||
1040 | # CONFIG_SENSORS_I5K_AMB is not set | ||
1041 | # CONFIG_SENSORS_F71805F is not set | ||
1042 | # CONFIG_SENSORS_F71882FG is not set | ||
1043 | # CONFIG_SENSORS_F75375S is not set | ||
1044 | # CONFIG_SENSORS_G760A is not set | ||
1045 | # CONFIG_SENSORS_GL518SM is not set | ||
1046 | # CONFIG_SENSORS_GL520SM is not set | ||
1047 | # CONFIG_SENSORS_IT87 is not set | ||
1048 | # CONFIG_SENSORS_LM63 is not set | ||
1049 | # CONFIG_SENSORS_LM75 is not set | ||
1050 | # CONFIG_SENSORS_LM77 is not set | ||
1051 | # CONFIG_SENSORS_LM78 is not set | ||
1052 | # CONFIG_SENSORS_LM80 is not set | ||
1053 | # CONFIG_SENSORS_LM83 is not set | ||
1054 | # CONFIG_SENSORS_LM85 is not set | ||
1055 | # CONFIG_SENSORS_LM87 is not set | ||
1056 | CONFIG_SENSORS_LM90=y | ||
1057 | # CONFIG_SENSORS_LM92 is not set | ||
1058 | # CONFIG_SENSORS_LM93 is not set | ||
1059 | # CONFIG_SENSORS_LTC4215 is not set | ||
1060 | # CONFIG_SENSORS_LTC4245 is not set | ||
1061 | # CONFIG_SENSORS_LM95241 is not set | ||
1062 | # CONFIG_SENSORS_MAX1619 is not set | ||
1063 | # CONFIG_SENSORS_MAX6650 is not set | ||
1064 | # CONFIG_SENSORS_PC87360 is not set | ||
1065 | # CONFIG_SENSORS_PC87427 is not set | ||
1066 | # CONFIG_SENSORS_PCF8591 is not set | ||
1067 | # CONFIG_SENSORS_SHT15 is not set | ||
1068 | # CONFIG_SENSORS_SIS5595 is not set | ||
1069 | # CONFIG_SENSORS_DME1737 is not set | ||
1070 | # CONFIG_SENSORS_SMSC47M1 is not set | ||
1071 | # CONFIG_SENSORS_SMSC47M192 is not set | ||
1072 | # CONFIG_SENSORS_SMSC47B397 is not set | ||
1073 | # CONFIG_SENSORS_ADS7828 is not set | ||
1074 | # CONFIG_SENSORS_THMC50 is not set | ||
1075 | # CONFIG_SENSORS_VIA686A is not set | ||
1076 | # CONFIG_SENSORS_VT1211 is not set | ||
1077 | # CONFIG_SENSORS_VT8231 is not set | ||
1078 | # CONFIG_SENSORS_W83781D is not set | ||
1079 | # CONFIG_SENSORS_W83791D is not set | ||
1080 | # CONFIG_SENSORS_W83792D is not set | ||
1081 | # CONFIG_SENSORS_W83793 is not set | ||
1082 | # CONFIG_SENSORS_W83L785TS is not set | ||
1083 | # CONFIG_SENSORS_W83L786NG is not set | ||
1084 | # CONFIG_SENSORS_W83627HF is not set | ||
1085 | # CONFIG_SENSORS_W83627EHF is not set | ||
1086 | # CONFIG_HWMON_DEBUG_CHIP is not set | ||
1087 | # CONFIG_THERMAL is not set | ||
1088 | # CONFIG_THERMAL_HWMON is not set | ||
1089 | CONFIG_WATCHDOG=y | ||
1090 | # CONFIG_WATCHDOG_NOWAYOUT is not set | ||
1091 | |||
1092 | # | ||
1093 | # Watchdog Device Drivers | ||
1094 | # | ||
1095 | # CONFIG_SOFT_WATCHDOG is not set | ||
1096 | # CONFIG_ALIM7101_WDT is not set | ||
1097 | # CONFIG_BOOKE_WDT is not set | ||
1098 | |||
1099 | # | ||
1100 | # PCI-based Watchdog Cards | ||
1101 | # | ||
1102 | # CONFIG_PCIPCWATCHDOG is not set | ||
1103 | # CONFIG_WDTPCI is not set | ||
1104 | |||
1105 | # | ||
1106 | # USB-based Watchdog Cards | ||
1107 | # | ||
1108 | # CONFIG_USBPCWATCHDOG is not set | ||
1109 | CONFIG_SSB_POSSIBLE=y | ||
1110 | |||
1111 | # | ||
1112 | # Sonics Silicon Backplane | ||
1113 | # | ||
1114 | # CONFIG_SSB is not set | ||
1115 | |||
1116 | # | ||
1117 | # Multifunction device drivers | ||
1118 | # | ||
1119 | # CONFIG_MFD_CORE is not set | ||
1120 | # CONFIG_MFD_SM501 is not set | ||
1121 | # CONFIG_HTC_PASIC3 is not set | ||
1122 | # CONFIG_TPS65010 is not set | ||
1123 | # CONFIG_TWL4030_CORE is not set | ||
1124 | # CONFIG_MFD_TMIO is not set | ||
1125 | # CONFIG_PMIC_DA903X is not set | ||
1126 | # CONFIG_MFD_WM8400 is not set | ||
1127 | # CONFIG_MFD_WM8350_I2C is not set | ||
1128 | # CONFIG_MFD_PCF50633 is not set | ||
1129 | # CONFIG_REGULATOR is not set | ||
1130 | |||
1131 | # | ||
1132 | # Multimedia devices | ||
1133 | # | ||
1134 | |||
1135 | # | ||
1136 | # Multimedia core support | ||
1137 | # | ||
1138 | # CONFIG_VIDEO_DEV is not set | ||
1139 | # CONFIG_DVB_CORE is not set | ||
1140 | # CONFIG_VIDEO_MEDIA is not set | ||
1141 | |||
1142 | # | ||
1143 | # Multimedia drivers | ||
1144 | # | ||
1145 | # CONFIG_DAB is not set | ||
1146 | |||
1147 | # | ||
1148 | # Graphics support | ||
1149 | # | ||
1150 | # CONFIG_AGP is not set | ||
1151 | # CONFIG_DRM is not set | ||
1152 | # CONFIG_VGASTATE is not set | ||
1153 | CONFIG_VIDEO_OUTPUT_CONTROL=y | ||
1154 | # CONFIG_FB is not set | ||
1155 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
1156 | |||
1157 | # | ||
1158 | # Display device support | ||
1159 | # | ||
1160 | # CONFIG_DISPLAY_SUPPORT is not set | ||
1161 | |||
1162 | # | ||
1163 | # Console display driver support | ||
1164 | # | ||
1165 | CONFIG_VGA_CONSOLE=y | ||
1166 | # CONFIG_VGACON_SOFT_SCROLLBACK is not set | ||
1167 | CONFIG_DUMMY_CONSOLE=y | ||
1168 | # CONFIG_SOUND is not set | ||
1169 | CONFIG_HID_SUPPORT=y | ||
1170 | CONFIG_HID=y | ||
1171 | # CONFIG_HID_DEBUG is not set | ||
1172 | # CONFIG_HIDRAW is not set | ||
1173 | |||
1174 | # | ||
1175 | # USB Input Devices | ||
1176 | # | ||
1177 | CONFIG_USB_HID=y | ||
1178 | # CONFIG_HID_PID is not set | ||
1179 | # CONFIG_USB_HIDDEV is not set | ||
1180 | |||
1181 | # | ||
1182 | # Special HID drivers | ||
1183 | # | ||
1184 | # CONFIG_HID_A4TECH is not set | ||
1185 | # CONFIG_HID_APPLE is not set | ||
1186 | # CONFIG_HID_BELKIN is not set | ||
1187 | # CONFIG_HID_CHERRY is not set | ||
1188 | # CONFIG_HID_CHICONY is not set | ||
1189 | # CONFIG_HID_CYPRESS is not set | ||
1190 | # CONFIG_DRAGONRISE_FF is not set | ||
1191 | # CONFIG_HID_EZKEY is not set | ||
1192 | # CONFIG_HID_KYE is not set | ||
1193 | # CONFIG_HID_GYRATION is not set | ||
1194 | # CONFIG_HID_KENSINGTON is not set | ||
1195 | # CONFIG_HID_LOGITECH is not set | ||
1196 | # CONFIG_HID_MICROSOFT is not set | ||
1197 | # CONFIG_HID_MONTEREY is not set | ||
1198 | # CONFIG_HID_NTRIG is not set | ||
1199 | # CONFIG_HID_PANTHERLORD is not set | ||
1200 | # CONFIG_HID_PETALYNX is not set | ||
1201 | # CONFIG_HID_SAMSUNG is not set | ||
1202 | # CONFIG_HID_SONY is not set | ||
1203 | # CONFIG_HID_SUNPLUS is not set | ||
1204 | # CONFIG_GREENASIA_FF is not set | ||
1205 | # CONFIG_HID_TOPSEED is not set | ||
1206 | # CONFIG_THRUSTMASTER_FF is not set | ||
1207 | # CONFIG_ZEROPLUS_FF is not set | ||
1208 | CONFIG_USB_SUPPORT=y | ||
1209 | CONFIG_USB_ARCH_HAS_HCD=y | ||
1210 | CONFIG_USB_ARCH_HAS_OHCI=y | ||
1211 | CONFIG_USB_ARCH_HAS_EHCI=y | ||
1212 | CONFIG_USB=y | ||
1213 | # CONFIG_USB_DEBUG is not set | ||
1214 | # CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set | ||
1215 | |||
1216 | # | ||
1217 | # Miscellaneous USB options | ||
1218 | # | ||
1219 | CONFIG_USB_DEVICEFS=y | ||
1220 | # CONFIG_USB_DEVICE_CLASS is not set | ||
1221 | # CONFIG_USB_DYNAMIC_MINORS is not set | ||
1222 | # CONFIG_USB_OTG is not set | ||
1223 | # CONFIG_USB_OTG_WHITELIST is not set | ||
1224 | # CONFIG_USB_OTG_BLACKLIST_HUB is not set | ||
1225 | CONFIG_USB_MON=y | ||
1226 | # CONFIG_USB_WUSB is not set | ||
1227 | # CONFIG_USB_WUSB_CBAF is not set | ||
1228 | |||
1229 | # | ||
1230 | # USB Host Controller Drivers | ||
1231 | # | ||
1232 | # CONFIG_USB_C67X00_HCD is not set | ||
1233 | # CONFIG_USB_EHCI_HCD is not set | ||
1234 | # CONFIG_USB_OXU210HP_HCD is not set | ||
1235 | # CONFIG_USB_ISP116X_HCD is not set | ||
1236 | CONFIG_USB_ISP1760_HCD=y | ||
1237 | # CONFIG_USB_OHCI_HCD is not set | ||
1238 | # CONFIG_USB_UHCI_HCD is not set | ||
1239 | # CONFIG_USB_SL811_HCD is not set | ||
1240 | # CONFIG_USB_R8A66597_HCD is not set | ||
1241 | # CONFIG_USB_WHCI_HCD is not set | ||
1242 | # CONFIG_USB_HWA_HCD is not set | ||
1243 | |||
1244 | # | ||
1245 | # USB Device Class drivers | ||
1246 | # | ||
1247 | # CONFIG_USB_ACM is not set | ||
1248 | # CONFIG_USB_PRINTER is not set | ||
1249 | # CONFIG_USB_WDM is not set | ||
1250 | # CONFIG_USB_TMC is not set | ||
1251 | |||
1252 | # | ||
1253 | # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may | ||
1254 | # | ||
1255 | |||
1256 | # | ||
1257 | # also be needed; see USB_STORAGE Help for more info | ||
1258 | # | ||
1259 | CONFIG_USB_STORAGE=y | ||
1260 | # CONFIG_USB_STORAGE_DEBUG is not set | ||
1261 | # CONFIG_USB_STORAGE_DATAFAB is not set | ||
1262 | # CONFIG_USB_STORAGE_FREECOM is not set | ||
1263 | # CONFIG_USB_STORAGE_ISD200 is not set | ||
1264 | # CONFIG_USB_STORAGE_USBAT is not set | ||
1265 | # CONFIG_USB_STORAGE_SDDR09 is not set | ||
1266 | # CONFIG_USB_STORAGE_SDDR55 is not set | ||
1267 | # CONFIG_USB_STORAGE_JUMPSHOT is not set | ||
1268 | # CONFIG_USB_STORAGE_ALAUDA is not set | ||
1269 | # CONFIG_USB_STORAGE_ONETOUCH is not set | ||
1270 | # CONFIG_USB_STORAGE_KARMA is not set | ||
1271 | # CONFIG_USB_STORAGE_CYPRESS_ATACB is not set | ||
1272 | # CONFIG_USB_LIBUSUAL is not set | ||
1273 | |||
1274 | # | ||
1275 | # USB Imaging devices | ||
1276 | # | ||
1277 | # CONFIG_USB_MDC800 is not set | ||
1278 | # CONFIG_USB_MICROTEK is not set | ||
1279 | |||
1280 | # | ||
1281 | # USB port drivers | ||
1282 | # | ||
1283 | # CONFIG_USB_SERIAL is not set | ||
1284 | |||
1285 | # | ||
1286 | # USB Miscellaneous drivers | ||
1287 | # | ||
1288 | # CONFIG_USB_EMI62 is not set | ||
1289 | # CONFIG_USB_EMI26 is not set | ||
1290 | # CONFIG_USB_ADUTUX is not set | ||
1291 | # CONFIG_USB_SEVSEG is not set | ||
1292 | # CONFIG_USB_RIO500 is not set | ||
1293 | # CONFIG_USB_LEGOTOWER is not set | ||
1294 | # CONFIG_USB_LCD is not set | ||
1295 | # CONFIG_USB_BERRY_CHARGE is not set | ||
1296 | # CONFIG_USB_LED is not set | ||
1297 | # CONFIG_USB_CYPRESS_CY7C63 is not set | ||
1298 | # CONFIG_USB_CYTHERM is not set | ||
1299 | # CONFIG_USB_IDMOUSE is not set | ||
1300 | # CONFIG_USB_FTDI_ELAN is not set | ||
1301 | # CONFIG_USB_APPLEDISPLAY is not set | ||
1302 | # CONFIG_USB_LD is not set | ||
1303 | # CONFIG_USB_TRANCEVIBRATOR is not set | ||
1304 | # CONFIG_USB_IOWARRIOR is not set | ||
1305 | # CONFIG_USB_TEST is not set | ||
1306 | # CONFIG_USB_ISIGHTFW is not set | ||
1307 | # CONFIG_USB_VST is not set | ||
1308 | # CONFIG_USB_GADGET is not set | ||
1309 | |||
1310 | # | ||
1311 | # OTG and related infrastructure | ||
1312 | # | ||
1313 | # CONFIG_USB_GPIO_VBUS is not set | ||
1314 | # CONFIG_NOP_USB_XCEIV is not set | ||
1315 | # CONFIG_UWB is not set | ||
1316 | # CONFIG_MMC is not set | ||
1317 | # CONFIG_MEMSTICK is not set | ||
1318 | CONFIG_NEW_LEDS=y | ||
1319 | CONFIG_LEDS_CLASS=y | ||
1320 | |||
1321 | # | ||
1322 | # LED drivers | ||
1323 | # | ||
1324 | # CONFIG_LEDS_PCA9532 is not set | ||
1325 | CONFIG_LEDS_GPIO=y | ||
1326 | CONFIG_LEDS_GPIO_PLATFORM=y | ||
1327 | CONFIG_LEDS_GPIO_OF=y | ||
1328 | # CONFIG_LEDS_LP5521 is not set | ||
1329 | CONFIG_LEDS_PCA955X=y | ||
1330 | # CONFIG_LEDS_BD2802 is not set | ||
1331 | |||
1332 | # | ||
1333 | # LED Triggers | ||
1334 | # | ||
1335 | CONFIG_LEDS_TRIGGERS=y | ||
1336 | CONFIG_LEDS_TRIGGER_TIMER=y | ||
1337 | CONFIG_LEDS_TRIGGER_HEARTBEAT=y | ||
1338 | # CONFIG_LEDS_TRIGGER_BACKLIGHT is not set | ||
1339 | CONFIG_LEDS_TRIGGER_GPIO=y | ||
1340 | # CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set | ||
1341 | |||
1342 | # | ||
1343 | # iptables trigger is under Netfilter config (LED target) | ||
1344 | # | ||
1345 | # CONFIG_ACCESSIBILITY is not set | ||
1346 | # CONFIG_INFINIBAND is not set | ||
1347 | CONFIG_EDAC=y | ||
1348 | |||
1349 | # | ||
1350 | # Reporting subsystems | ||
1351 | # | ||
1352 | # CONFIG_EDAC_DEBUG is not set | ||
1353 | CONFIG_EDAC_MM_EDAC=y | ||
1354 | CONFIG_EDAC_MPC85XX=y | ||
1355 | # CONFIG_EDAC_AMD8131 is not set | ||
1356 | # CONFIG_EDAC_AMD8111 is not set | ||
1357 | CONFIG_RTC_LIB=y | ||
1358 | CONFIG_RTC_CLASS=y | ||
1359 | CONFIG_RTC_HCTOSYS=y | ||
1360 | CONFIG_RTC_HCTOSYS_DEVICE="rtc0" | ||
1361 | # CONFIG_RTC_DEBUG is not set | ||
1362 | |||
1363 | # | ||
1364 | # RTC interfaces | ||
1365 | # | ||
1366 | CONFIG_RTC_INTF_SYSFS=y | ||
1367 | CONFIG_RTC_INTF_PROC=y | ||
1368 | CONFIG_RTC_INTF_DEV=y | ||
1369 | # CONFIG_RTC_INTF_DEV_UIE_EMUL is not set | ||
1370 | # CONFIG_RTC_DRV_TEST is not set | ||
1371 | |||
1372 | # | ||
1373 | # I2C RTC drivers | ||
1374 | # | ||
1375 | CONFIG_RTC_DRV_DS1307=y | ||
1376 | # CONFIG_RTC_DRV_DS1374 is not set | ||
1377 | # CONFIG_RTC_DRV_DS1672 is not set | ||
1378 | # CONFIG_RTC_DRV_MAX6900 is not set | ||
1379 | # CONFIG_RTC_DRV_RS5C372 is not set | ||
1380 | # CONFIG_RTC_DRV_ISL1208 is not set | ||
1381 | # CONFIG_RTC_DRV_X1205 is not set | ||
1382 | # CONFIG_RTC_DRV_PCF8563 is not set | ||
1383 | # CONFIG_RTC_DRV_PCF8583 is not set | ||
1384 | # CONFIG_RTC_DRV_M41T80 is not set | ||
1385 | # CONFIG_RTC_DRV_S35390A is not set | ||
1386 | # CONFIG_RTC_DRV_FM3130 is not set | ||
1387 | # CONFIG_RTC_DRV_RX8581 is not set | ||
1388 | |||
1389 | # | ||
1390 | # SPI RTC drivers | ||
1391 | # | ||
1392 | |||
1393 | # | ||
1394 | # Platform RTC drivers | ||
1395 | # | ||
1396 | CONFIG_RTC_DRV_CMOS=y | ||
1397 | # CONFIG_RTC_DRV_DS1286 is not set | ||
1398 | # CONFIG_RTC_DRV_DS1511 is not set | ||
1399 | # CONFIG_RTC_DRV_DS1553 is not set | ||
1400 | # CONFIG_RTC_DRV_DS1742 is not set | ||
1401 | # CONFIG_RTC_DRV_STK17TA8 is not set | ||
1402 | # CONFIG_RTC_DRV_M48T86 is not set | ||
1403 | # CONFIG_RTC_DRV_M48T35 is not set | ||
1404 | # CONFIG_RTC_DRV_M48T59 is not set | ||
1405 | # CONFIG_RTC_DRV_BQ4802 is not set | ||
1406 | # CONFIG_RTC_DRV_V3020 is not set | ||
1407 | |||
1408 | # | ||
1409 | # on-CPU RTC drivers | ||
1410 | # | ||
1411 | # CONFIG_RTC_DRV_GENERIC is not set | ||
1412 | CONFIG_DMADEVICES=y | ||
1413 | |||
1414 | # | ||
1415 | # DMA Devices | ||
1416 | # | ||
1417 | CONFIG_FSL_DMA=y | ||
1418 | CONFIG_DMA_ENGINE=y | ||
1419 | |||
1420 | # | ||
1421 | # DMA Clients | ||
1422 | # | ||
1423 | CONFIG_NET_DMA=y | ||
1424 | # CONFIG_ASYNC_TX_DMA is not set | ||
1425 | # CONFIG_DMATEST is not set | ||
1426 | # CONFIG_AUXDISPLAY is not set | ||
1427 | # CONFIG_UIO is not set | ||
1428 | # CONFIG_STAGING is not set | ||
1429 | |||
1430 | # | ||
1431 | # File systems | ||
1432 | # | ||
1433 | CONFIG_EXT2_FS=y | ||
1434 | # CONFIG_EXT2_FS_XATTR is not set | ||
1435 | # CONFIG_EXT2_FS_XIP is not set | ||
1436 | CONFIG_EXT3_FS=y | ||
1437 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
1438 | CONFIG_EXT3_FS_XATTR=y | ||
1439 | # CONFIG_EXT3_FS_POSIX_ACL is not set | ||
1440 | # CONFIG_EXT3_FS_SECURITY is not set | ||
1441 | # CONFIG_EXT4_FS is not set | ||
1442 | CONFIG_JBD=y | ||
1443 | CONFIG_FS_MBCACHE=y | ||
1444 | # CONFIG_REISERFS_FS is not set | ||
1445 | # CONFIG_JFS_FS is not set | ||
1446 | # CONFIG_FS_POSIX_ACL is not set | ||
1447 | CONFIG_FILE_LOCKING=y | ||
1448 | # CONFIG_XFS_FS is not set | ||
1449 | # CONFIG_GFS2_FS is not set | ||
1450 | # CONFIG_OCFS2_FS is not set | ||
1451 | # CONFIG_BTRFS_FS is not set | ||
1452 | CONFIG_DNOTIFY=y | ||
1453 | CONFIG_INOTIFY=y | ||
1454 | CONFIG_INOTIFY_USER=y | ||
1455 | # CONFIG_QUOTA is not set | ||
1456 | # CONFIG_AUTOFS_FS is not set | ||
1457 | # CONFIG_AUTOFS4_FS is not set | ||
1458 | # CONFIG_FUSE_FS is not set | ||
1459 | |||
1460 | # | ||
1461 | # Caches | ||
1462 | # | ||
1463 | # CONFIG_FSCACHE is not set | ||
1464 | |||
1465 | # | ||
1466 | # CD-ROM/DVD Filesystems | ||
1467 | # | ||
1468 | CONFIG_ISO9660_FS=y | ||
1469 | CONFIG_JOLIET=y | ||
1470 | CONFIG_ZISOFS=y | ||
1471 | CONFIG_UDF_FS=y | ||
1472 | CONFIG_UDF_NLS=y | ||
1473 | |||
1474 | # | ||
1475 | # DOS/FAT/NT Filesystems | ||
1476 | # | ||
1477 | CONFIG_FAT_FS=y | ||
1478 | CONFIG_MSDOS_FS=y | ||
1479 | CONFIG_VFAT_FS=y | ||
1480 | CONFIG_FAT_DEFAULT_CODEPAGE=437 | ||
1481 | CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" | ||
1482 | # CONFIG_NTFS_FS is not set | ||
1483 | |||
1484 | # | ||
1485 | # Pseudo filesystems | ||
1486 | # | ||
1487 | CONFIG_PROC_FS=y | ||
1488 | CONFIG_PROC_KCORE=y | ||
1489 | CONFIG_PROC_SYSCTL=y | ||
1490 | CONFIG_PROC_PAGE_MONITOR=y | ||
1491 | CONFIG_SYSFS=y | ||
1492 | CONFIG_TMPFS=y | ||
1493 | # CONFIG_TMPFS_POSIX_ACL is not set | ||
1494 | # CONFIG_HUGETLB_PAGE is not set | ||
1495 | # CONFIG_CONFIGFS_FS is not set | ||
1496 | CONFIG_MISC_FILESYSTEMS=y | ||
1497 | # CONFIG_ADFS_FS is not set | ||
1498 | # CONFIG_AFFS_FS is not set | ||
1499 | # CONFIG_HFS_FS is not set | ||
1500 | # CONFIG_HFSPLUS_FS is not set | ||
1501 | # CONFIG_BEFS_FS is not set | ||
1502 | # CONFIG_BFS_FS is not set | ||
1503 | # CONFIG_EFS_FS is not set | ||
1504 | CONFIG_JFFS2_FS=y | ||
1505 | CONFIG_JFFS2_FS_DEBUG=0 | ||
1506 | CONFIG_JFFS2_FS_WRITEBUFFER=y | ||
1507 | # CONFIG_JFFS2_FS_WBUF_VERIFY is not set | ||
1508 | CONFIG_JFFS2_SUMMARY=y | ||
1509 | # CONFIG_JFFS2_FS_XATTR is not set | ||
1510 | # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set | ||
1511 | CONFIG_JFFS2_ZLIB=y | ||
1512 | # CONFIG_JFFS2_LZO is not set | ||
1513 | CONFIG_JFFS2_RTIME=y | ||
1514 | # CONFIG_JFFS2_RUBIN is not set | ||
1515 | # CONFIG_CRAMFS is not set | ||
1516 | # CONFIG_SQUASHFS is not set | ||
1517 | # CONFIG_VXFS_FS is not set | ||
1518 | # CONFIG_MINIX_FS is not set | ||
1519 | # CONFIG_OMFS_FS is not set | ||
1520 | # CONFIG_HPFS_FS is not set | ||
1521 | # CONFIG_QNX4FS_FS is not set | ||
1522 | # CONFIG_ROMFS_FS is not set | ||
1523 | # CONFIG_SYSV_FS is not set | ||
1524 | # CONFIG_UFS_FS is not set | ||
1525 | # CONFIG_NILFS2_FS is not set | ||
1526 | CONFIG_NETWORK_FILESYSTEMS=y | ||
1527 | CONFIG_NFS_FS=y | ||
1528 | CONFIG_NFS_V3=y | ||
1529 | # CONFIG_NFS_V3_ACL is not set | ||
1530 | # CONFIG_NFS_V4 is not set | ||
1531 | CONFIG_ROOT_NFS=y | ||
1532 | CONFIG_NFSD=y | ||
1533 | # CONFIG_NFSD_V3 is not set | ||
1534 | # CONFIG_NFSD_V4 is not set | ||
1535 | CONFIG_LOCKD=y | ||
1536 | CONFIG_LOCKD_V4=y | ||
1537 | CONFIG_EXPORTFS=y | ||
1538 | CONFIG_NFS_COMMON=y | ||
1539 | CONFIG_SUNRPC=y | ||
1540 | # CONFIG_RPCSEC_GSS_KRB5 is not set | ||
1541 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | ||
1542 | # CONFIG_SMB_FS is not set | ||
1543 | # CONFIG_CIFS is not set | ||
1544 | # CONFIG_NCP_FS is not set | ||
1545 | # CONFIG_CODA_FS is not set | ||
1546 | # CONFIG_AFS_FS is not set | ||
1547 | |||
1548 | # | ||
1549 | # Partition Types | ||
1550 | # | ||
1551 | CONFIG_PARTITION_ADVANCED=y | ||
1552 | # CONFIG_ACORN_PARTITION is not set | ||
1553 | # CONFIG_OSF_PARTITION is not set | ||
1554 | # CONFIG_AMIGA_PARTITION is not set | ||
1555 | # CONFIG_ATARI_PARTITION is not set | ||
1556 | # CONFIG_MAC_PARTITION is not set | ||
1557 | CONFIG_MSDOS_PARTITION=y | ||
1558 | # CONFIG_BSD_DISKLABEL is not set | ||
1559 | # CONFIG_MINIX_SUBPARTITION is not set | ||
1560 | # CONFIG_SOLARIS_X86_PARTITION is not set | ||
1561 | # CONFIG_UNIXWARE_DISKLABEL is not set | ||
1562 | # CONFIG_LDM_PARTITION is not set | ||
1563 | # CONFIG_SGI_PARTITION is not set | ||
1564 | # CONFIG_ULTRIX_PARTITION is not set | ||
1565 | # CONFIG_SUN_PARTITION is not set | ||
1566 | # CONFIG_KARMA_PARTITION is not set | ||
1567 | # CONFIG_EFI_PARTITION is not set | ||
1568 | # CONFIG_SYSV68_PARTITION is not set | ||
1569 | CONFIG_NLS=y | ||
1570 | CONFIG_NLS_DEFAULT="iso8859-1" | ||
1571 | CONFIG_NLS_CODEPAGE_437=y | ||
1572 | # CONFIG_NLS_CODEPAGE_737 is not set | ||
1573 | # CONFIG_NLS_CODEPAGE_775 is not set | ||
1574 | # CONFIG_NLS_CODEPAGE_850 is not set | ||
1575 | # CONFIG_NLS_CODEPAGE_852 is not set | ||
1576 | # CONFIG_NLS_CODEPAGE_855 is not set | ||
1577 | # CONFIG_NLS_CODEPAGE_857 is not set | ||
1578 | # CONFIG_NLS_CODEPAGE_860 is not set | ||
1579 | # CONFIG_NLS_CODEPAGE_861 is not set | ||
1580 | # CONFIG_NLS_CODEPAGE_862 is not set | ||
1581 | # CONFIG_NLS_CODEPAGE_863 is not set | ||
1582 | # CONFIG_NLS_CODEPAGE_864 is not set | ||
1583 | # CONFIG_NLS_CODEPAGE_865 is not set | ||
1584 | # CONFIG_NLS_CODEPAGE_866 is not set | ||
1585 | # CONFIG_NLS_CODEPAGE_869 is not set | ||
1586 | # CONFIG_NLS_CODEPAGE_936 is not set | ||
1587 | # CONFIG_NLS_CODEPAGE_950 is not set | ||
1588 | # CONFIG_NLS_CODEPAGE_932 is not set | ||
1589 | # CONFIG_NLS_CODEPAGE_949 is not set | ||
1590 | # CONFIG_NLS_CODEPAGE_874 is not set | ||
1591 | # CONFIG_NLS_ISO8859_8 is not set | ||
1592 | # CONFIG_NLS_CODEPAGE_1250 is not set | ||
1593 | # CONFIG_NLS_CODEPAGE_1251 is not set | ||
1594 | # CONFIG_NLS_ASCII is not set | ||
1595 | CONFIG_NLS_ISO8859_1=y | ||
1596 | # CONFIG_NLS_ISO8859_2 is not set | ||
1597 | # CONFIG_NLS_ISO8859_3 is not set | ||
1598 | # CONFIG_NLS_ISO8859_4 is not set | ||
1599 | # CONFIG_NLS_ISO8859_5 is not set | ||
1600 | # CONFIG_NLS_ISO8859_6 is not set | ||
1601 | # CONFIG_NLS_ISO8859_7 is not set | ||
1602 | # CONFIG_NLS_ISO8859_9 is not set | ||
1603 | # CONFIG_NLS_ISO8859_13 is not set | ||
1604 | # CONFIG_NLS_ISO8859_14 is not set | ||
1605 | # CONFIG_NLS_ISO8859_15 is not set | ||
1606 | # CONFIG_NLS_KOI8_R is not set | ||
1607 | # CONFIG_NLS_KOI8_U is not set | ||
1608 | # CONFIG_NLS_UTF8 is not set | ||
1609 | # CONFIG_DLM is not set | ||
1610 | # CONFIG_BINARY_PRINTF is not set | ||
1611 | |||
1612 | # | ||
1613 | # Library routines | ||
1614 | # | ||
1615 | CONFIG_BITREVERSE=y | ||
1616 | CONFIG_GENERIC_FIND_LAST_BIT=y | ||
1617 | # CONFIG_CRC_CCITT is not set | ||
1618 | # CONFIG_CRC16 is not set | ||
1619 | CONFIG_CRC_T10DIF=y | ||
1620 | CONFIG_CRC_ITU_T=y | ||
1621 | CONFIG_CRC32=y | ||
1622 | # CONFIG_CRC7 is not set | ||
1623 | # CONFIG_LIBCRC32C is not set | ||
1624 | CONFIG_ZLIB_INFLATE=y | ||
1625 | CONFIG_ZLIB_DEFLATE=y | ||
1626 | CONFIG_DECOMPRESS_GZIP=y | ||
1627 | CONFIG_HAS_IOMEM=y | ||
1628 | CONFIG_HAS_IOPORT=y | ||
1629 | CONFIG_HAS_DMA=y | ||
1630 | CONFIG_HAVE_LMB=y | ||
1631 | CONFIG_NLATTR=y | ||
1632 | |||
1633 | # | ||
1634 | # Kernel hacking | ||
1635 | # | ||
1636 | # CONFIG_PRINTK_TIME is not set | ||
1637 | CONFIG_ENABLE_WARN_DEPRECATED=y | ||
1638 | CONFIG_ENABLE_MUST_CHECK=y | ||
1639 | CONFIG_FRAME_WARN=1024 | ||
1640 | # CONFIG_MAGIC_SYSRQ is not set | ||
1641 | # CONFIG_UNUSED_SYMBOLS is not set | ||
1642 | # CONFIG_DEBUG_FS is not set | ||
1643 | # CONFIG_HEADERS_CHECK is not set | ||
1644 | CONFIG_DEBUG_KERNEL=y | ||
1645 | # CONFIG_DEBUG_SHIRQ is not set | ||
1646 | CONFIG_DETECT_SOFTLOCKUP=y | ||
1647 | # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set | ||
1648 | CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 | ||
1649 | CONFIG_DETECT_HUNG_TASK=y | ||
1650 | # CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set | ||
1651 | CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 | ||
1652 | CONFIG_SCHED_DEBUG=y | ||
1653 | # CONFIG_SCHEDSTATS is not set | ||
1654 | # CONFIG_TIMER_STATS is not set | ||
1655 | # CONFIG_DEBUG_OBJECTS is not set | ||
1656 | # CONFIG_SLUB_DEBUG_ON is not set | ||
1657 | # CONFIG_SLUB_STATS is not set | ||
1658 | # CONFIG_DEBUG_RT_MUTEXES is not set | ||
1659 | # CONFIG_RT_MUTEX_TESTER is not set | ||
1660 | # CONFIG_DEBUG_SPINLOCK is not set | ||
1661 | # CONFIG_DEBUG_MUTEXES is not set | ||
1662 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set | ||
1663 | # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set | ||
1664 | # CONFIG_DEBUG_KOBJECT is not set | ||
1665 | # CONFIG_DEBUG_HIGHMEM is not set | ||
1666 | # CONFIG_DEBUG_BUGVERBOSE is not set | ||
1667 | # CONFIG_DEBUG_INFO is not set | ||
1668 | # CONFIG_DEBUG_VM is not set | ||
1669 | # CONFIG_DEBUG_WRITECOUNT is not set | ||
1670 | # CONFIG_DEBUG_MEMORY_INIT is not set | ||
1671 | # CONFIG_DEBUG_LIST is not set | ||
1672 | # CONFIG_DEBUG_SG is not set | ||
1673 | # CONFIG_DEBUG_NOTIFIERS is not set | ||
1674 | # CONFIG_BOOT_PRINTK_DELAY is not set | ||
1675 | # CONFIG_RCU_TORTURE_TEST is not set | ||
1676 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
1677 | # CONFIG_BACKTRACE_SELF_TEST is not set | ||
1678 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set | ||
1679 | # CONFIG_FAULT_INJECTION is not set | ||
1680 | # CONFIG_LATENCYTOP is not set | ||
1681 | # CONFIG_SYSCTL_SYSCALL_CHECK is not set | ||
1682 | # CONFIG_DEBUG_PAGEALLOC is not set | ||
1683 | CONFIG_HAVE_FUNCTION_TRACER=y | ||
1684 | CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y | ||
1685 | CONFIG_HAVE_DYNAMIC_FTRACE=y | ||
1686 | CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y | ||
1687 | CONFIG_TRACING_SUPPORT=y | ||
1688 | |||
1689 | # | ||
1690 | # Tracers | ||
1691 | # | ||
1692 | # CONFIG_FUNCTION_TRACER is not set | ||
1693 | # CONFIG_SCHED_TRACER is not set | ||
1694 | # CONFIG_CONTEXT_SWITCH_TRACER is not set | ||
1695 | # CONFIG_EVENT_TRACER is not set | ||
1696 | # CONFIG_BOOT_TRACER is not set | ||
1697 | # CONFIG_TRACE_BRANCH_PROFILING is not set | ||
1698 | # CONFIG_STACK_TRACER is not set | ||
1699 | # CONFIG_KMEMTRACE is not set | ||
1700 | # CONFIG_WORKQUEUE_TRACER is not set | ||
1701 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
1702 | # CONFIG_SAMPLES is not set | ||
1703 | CONFIG_HAVE_ARCH_KGDB=y | ||
1704 | # CONFIG_KGDB is not set | ||
1705 | CONFIG_PRINT_STACK_DEPTH=64 | ||
1706 | # CONFIG_DEBUG_STACKOVERFLOW is not set | ||
1707 | # CONFIG_DEBUG_STACK_USAGE is not set | ||
1708 | # CONFIG_CODE_PATCHING_SELFTEST is not set | ||
1709 | # CONFIG_FTR_FIXUP_SELFTEST is not set | ||
1710 | # CONFIG_MSI_BITMAP_SELFTEST is not set | ||
1711 | # CONFIG_XMON is not set | ||
1712 | # CONFIG_IRQSTACKS is not set | ||
1713 | # CONFIG_BDI_SWITCH is not set | ||
1714 | # CONFIG_PPC_EARLY_DEBUG is not set | ||
1715 | |||
1716 | # | ||
1717 | # Security options | ||
1718 | # | ||
1719 | # CONFIG_KEYS is not set | ||
1720 | # CONFIG_SECURITY is not set | ||
1721 | # CONFIG_SECURITYFS is not set | ||
1722 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | ||
1723 | CONFIG_CRYPTO=y | ||
1724 | |||
1725 | # | ||
1726 | # Crypto core or helper | ||
1727 | # | ||
1728 | # CONFIG_CRYPTO_FIPS is not set | ||
1729 | CONFIG_CRYPTO_ALGAPI=y | ||
1730 | CONFIG_CRYPTO_ALGAPI2=y | ||
1731 | CONFIG_CRYPTO_AEAD2=y | ||
1732 | CONFIG_CRYPTO_BLKCIPHER2=y | ||
1733 | CONFIG_CRYPTO_HASH=y | ||
1734 | CONFIG_CRYPTO_HASH2=y | ||
1735 | CONFIG_CRYPTO_RNG2=y | ||
1736 | CONFIG_CRYPTO_PCOMP=y | ||
1737 | CONFIG_CRYPTO_MANAGER=y | ||
1738 | CONFIG_CRYPTO_MANAGER2=y | ||
1739 | # CONFIG_CRYPTO_GF128MUL is not set | ||
1740 | # CONFIG_CRYPTO_NULL is not set | ||
1741 | CONFIG_CRYPTO_WORKQUEUE=y | ||
1742 | # CONFIG_CRYPTO_CRYPTD is not set | ||
1743 | # CONFIG_CRYPTO_AUTHENC is not set | ||
1744 | # CONFIG_CRYPTO_TEST is not set | ||
1745 | |||
1746 | # | ||
1747 | # Authenticated Encryption with Associated Data | ||
1748 | # | ||
1749 | # CONFIG_CRYPTO_CCM is not set | ||
1750 | # CONFIG_CRYPTO_GCM is not set | ||
1751 | # CONFIG_CRYPTO_SEQIV is not set | ||
1752 | |||
1753 | # | ||
1754 | # Block modes | ||
1755 | # | ||
1756 | # CONFIG_CRYPTO_CBC is not set | ||
1757 | # CONFIG_CRYPTO_CTR is not set | ||
1758 | # CONFIG_CRYPTO_CTS is not set | ||
1759 | # CONFIG_CRYPTO_ECB is not set | ||
1760 | # CONFIG_CRYPTO_LRW is not set | ||
1761 | # CONFIG_CRYPTO_PCBC is not set | ||
1762 | # CONFIG_CRYPTO_XTS is not set | ||
1763 | |||
1764 | # | ||
1765 | # Hash modes | ||
1766 | # | ||
1767 | CONFIG_CRYPTO_HMAC=y | ||
1768 | # CONFIG_CRYPTO_XCBC is not set | ||
1769 | |||
1770 | # | ||
1771 | # Digest | ||
1772 | # | ||
1773 | # CONFIG_CRYPTO_CRC32C is not set | ||
1774 | # CONFIG_CRYPTO_MD4 is not set | ||
1775 | CONFIG_CRYPTO_MD5=y | ||
1776 | # CONFIG_CRYPTO_MICHAEL_MIC is not set | ||
1777 | # CONFIG_CRYPTO_RMD128 is not set | ||
1778 | # CONFIG_CRYPTO_RMD160 is not set | ||
1779 | # CONFIG_CRYPTO_RMD256 is not set | ||
1780 | # CONFIG_CRYPTO_RMD320 is not set | ||
1781 | # CONFIG_CRYPTO_SHA1 is not set | ||
1782 | # CONFIG_CRYPTO_SHA256 is not set | ||
1783 | # CONFIG_CRYPTO_SHA512 is not set | ||
1784 | # CONFIG_CRYPTO_TGR192 is not set | ||
1785 | # CONFIG_CRYPTO_WP512 is not set | ||
1786 | |||
1787 | # | ||
1788 | # Ciphers | ||
1789 | # | ||
1790 | # CONFIG_CRYPTO_AES is not set | ||
1791 | # CONFIG_CRYPTO_ANUBIS is not set | ||
1792 | # CONFIG_CRYPTO_ARC4 is not set | ||
1793 | # CONFIG_CRYPTO_BLOWFISH is not set | ||
1794 | # CONFIG_CRYPTO_CAMELLIA is not set | ||
1795 | # CONFIG_CRYPTO_CAST5 is not set | ||
1796 | # CONFIG_CRYPTO_CAST6 is not set | ||
1797 | # CONFIG_CRYPTO_DES is not set | ||
1798 | # CONFIG_CRYPTO_FCRYPT is not set | ||
1799 | # CONFIG_CRYPTO_KHAZAD is not set | ||
1800 | # CONFIG_CRYPTO_SALSA20 is not set | ||
1801 | # CONFIG_CRYPTO_SEED is not set | ||
1802 | # CONFIG_CRYPTO_SERPENT is not set | ||
1803 | # CONFIG_CRYPTO_TEA is not set | ||
1804 | # CONFIG_CRYPTO_TWOFISH is not set | ||
1805 | |||
1806 | # | ||
1807 | # Compression | ||
1808 | # | ||
1809 | # CONFIG_CRYPTO_DEFLATE is not set | ||
1810 | # CONFIG_CRYPTO_ZLIB is not set | ||
1811 | # CONFIG_CRYPTO_LZO is not set | ||
1812 | |||
1813 | # | ||
1814 | # Random Number Generation | ||
1815 | # | ||
1816 | # CONFIG_CRYPTO_ANSI_CPRNG is not set | ||
1817 | CONFIG_CRYPTO_HW=y | ||
1818 | # CONFIG_CRYPTO_DEV_HIFN_795X is not set | ||
1819 | # CONFIG_CRYPTO_DEV_TALITOS is not set | ||
1820 | # CONFIG_PPC_CLOCK is not set | ||
1821 | # CONFIG_VIRTUALIZATION is not set | ||
diff --git a/arch/powerpc/include/asm/delay.h b/arch/powerpc/include/asm/delay.h index f9200a65c632..1e2eb41fa057 100644 --- a/arch/powerpc/include/asm/delay.h +++ b/arch/powerpc/include/asm/delay.h | |||
@@ -2,8 +2,11 @@ | |||
2 | #define _ASM_POWERPC_DELAY_H | 2 | #define _ASM_POWERPC_DELAY_H |
3 | #ifdef __KERNEL__ | 3 | #ifdef __KERNEL__ |
4 | 4 | ||
5 | #include <asm/time.h> | ||
6 | |||
5 | /* | 7 | /* |
6 | * Copyright 1996, Paul Mackerras. | 8 | * Copyright 1996, Paul Mackerras. |
9 | * Copyright (C) 2009 Freescale Semiconductor, Inc. All rights reserved. | ||
7 | * | 10 | * |
8 | * This program is free software; you can redistribute it and/or | 11 | * This program is free software; you can redistribute it and/or |
9 | * modify it under the terms of the GNU General Public License | 12 | * modify it under the terms of the GNU General Public License |
@@ -30,5 +33,38 @@ extern void udelay(unsigned long usecs); | |||
30 | #define mdelay(n) udelay((n) * 1000) | 33 | #define mdelay(n) udelay((n) * 1000) |
31 | #endif | 34 | #endif |
32 | 35 | ||
36 | /** | ||
37 | * spin_event_timeout - spin until a condition gets true or a timeout elapses | ||
38 | * @condition: a C expression to evalate | ||
39 | * @timeout: timeout, in microseconds | ||
40 | * @delay: the number of microseconds to delay between each evaluation of | ||
41 | * @condition | ||
42 | * | ||
43 | * The process spins until the condition evaluates to true (non-zero) or the | ||
44 | * timeout elapses. The return value of this macro is the value of | ||
45 | * @condition when the loop terminates. This allows you to determine the cause | ||
46 | * of the loop terminates. If the return value is zero, then you know a | ||
47 | * timeout has occurred. | ||
48 | * | ||
49 | * This primary purpose of this macro is to poll on a hardware register | ||
50 | * until a status bit changes. The timeout ensures that the loop still | ||
51 | * terminates even if the bit never changes. The delay is for devices that | ||
52 | * need a delay in between successive reads. | ||
53 | * | ||
54 | * gcc will optimize out the if-statement if @delay is a constant. | ||
55 | */ | ||
56 | #define spin_event_timeout(condition, timeout, delay) \ | ||
57 | ({ \ | ||
58 | typeof(condition) __ret; \ | ||
59 | unsigned long __loops = tb_ticks_per_usec * timeout; \ | ||
60 | unsigned long __start = get_tbl(); \ | ||
61 | while (!(__ret = (condition)) && (tb_ticks_since(__start) <= __loops)) \ | ||
62 | if (delay) \ | ||
63 | udelay(delay); \ | ||
64 | else \ | ||
65 | cpu_relax(); \ | ||
66 | __ret; \ | ||
67 | }) | ||
68 | |||
33 | #endif /* __KERNEL__ */ | 69 | #endif /* __KERNEL__ */ |
34 | #endif /* _ASM_POWERPC_DELAY_H */ | 70 | #endif /* _ASM_POWERPC_DELAY_H */ |
diff --git a/arch/powerpc/include/asm/fsl_lbc.h b/arch/powerpc/include/asm/fsl_lbc.h index 63a4f779f531..1b5a21041f9b 100644 --- a/arch/powerpc/include/asm/fsl_lbc.h +++ b/arch/powerpc/include/asm/fsl_lbc.h | |||
@@ -95,8 +95,8 @@ struct fsl_lbc_bank { | |||
95 | }; | 95 | }; |
96 | 96 | ||
97 | struct fsl_lbc_regs { | 97 | struct fsl_lbc_regs { |
98 | struct fsl_lbc_bank bank[8]; | 98 | struct fsl_lbc_bank bank[12]; |
99 | u8 res0[0x28]; | 99 | u8 res0[0x8]; |
100 | __be32 mar; /**< UPM Address Register */ | 100 | __be32 mar; /**< UPM Address Register */ |
101 | u8 res1[0x4]; | 101 | u8 res1[0x4]; |
102 | __be32 mamr; /**< UPMA Mode Register */ | 102 | __be32 mamr; /**< UPMA Mode Register */ |
diff --git a/arch/powerpc/include/asm/mpc52xx.h b/arch/powerpc/include/asm/mpc52xx.h index 52e049cd9e68..1b4f697abbdd 100644 --- a/arch/powerpc/include/asm/mpc52xx.h +++ b/arch/powerpc/include/asm/mpc52xx.h | |||
@@ -16,6 +16,7 @@ | |||
16 | #ifndef __ASSEMBLY__ | 16 | #ifndef __ASSEMBLY__ |
17 | #include <asm/types.h> | 17 | #include <asm/types.h> |
18 | #include <asm/prom.h> | 18 | #include <asm/prom.h> |
19 | #include <asm/mpc5xxx.h> | ||
19 | #endif /* __ASSEMBLY__ */ | 20 | #endif /* __ASSEMBLY__ */ |
20 | 21 | ||
21 | #include <linux/suspend.h> | 22 | #include <linux/suspend.h> |
@@ -268,7 +269,6 @@ struct mpc52xx_intr { | |||
268 | #ifndef __ASSEMBLY__ | 269 | #ifndef __ASSEMBLY__ |
269 | 270 | ||
270 | /* mpc52xx_common.c */ | 271 | /* mpc52xx_common.c */ |
271 | extern unsigned int mpc52xx_find_ipb_freq(struct device_node *node); | ||
272 | extern void mpc5200_setup_xlb_arbiter(void); | 272 | extern void mpc5200_setup_xlb_arbiter(void); |
273 | extern void mpc52xx_declare_of_platform_devices(void); | 273 | extern void mpc52xx_declare_of_platform_devices(void); |
274 | extern void mpc52xx_map_common_devices(void); | 274 | extern void mpc52xx_map_common_devices(void); |
diff --git a/arch/powerpc/include/asm/mpc512x.h b/arch/powerpc/include/asm/mpc5xxx.h index c48a1658eeac..5ce9c5fa434a 100644 --- a/arch/powerpc/include/asm/mpc512x.h +++ b/arch/powerpc/include/asm/mpc5xxx.h | |||
@@ -4,7 +4,7 @@ | |||
4 | * Author: John Rigby, <jrigby@freescale.com>, Friday Apr 13 2007 | 4 | * Author: John Rigby, <jrigby@freescale.com>, Friday Apr 13 2007 |
5 | * | 5 | * |
6 | * Description: | 6 | * Description: |
7 | * MPC5121 Prototypes and definitions | 7 | * MPC5xxx Prototypes and definitions |
8 | * | 8 | * |
9 | * This is free software; you can redistribute it and/or modify it | 9 | * This is free software; you can redistribute it and/or modify it |
10 | * under the terms of the GNU General Public License as published by | 10 | * under the terms of the GNU General Public License as published by |
@@ -13,10 +13,10 @@ | |||
13 | * | 13 | * |
14 | */ | 14 | */ |
15 | 15 | ||
16 | #ifndef __ASM_POWERPC_MPC512x_H__ | 16 | #ifndef __ASM_POWERPC_MPC5xxx_H__ |
17 | #define __ASM_POWERPC_MPC512x_H__ | 17 | #define __ASM_POWERPC_MPC5xxx_H__ |
18 | 18 | ||
19 | extern unsigned long mpc512x_find_ips_freq(struct device_node *node); | 19 | extern unsigned long mpc5xxx_get_bus_frequency(struct device_node *node); |
20 | 20 | ||
21 | #endif /* __ASM_POWERPC_MPC512x_H__ */ | 21 | #endif /* __ASM_POWERPC_MPC5xxx_H__ */ |
22 | 22 | ||
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h index a3c28e46947c..1170267736d3 100644 --- a/arch/powerpc/include/asm/reg.h +++ b/arch/powerpc/include/asm/reg.h | |||
@@ -755,7 +755,8 @@ | |||
755 | #define mfspr(rn) ({unsigned long rval; \ | 755 | #define mfspr(rn) ({unsigned long rval; \ |
756 | asm volatile("mfspr %0," __stringify(rn) \ | 756 | asm volatile("mfspr %0," __stringify(rn) \ |
757 | : "=r" (rval)); rval;}) | 757 | : "=r" (rval)); rval;}) |
758 | #define mtspr(rn, v) asm volatile("mtspr " __stringify(rn) ",%0" : : "r" (v)) | 758 | #define mtspr(rn, v) asm volatile("mtspr " __stringify(rn) ",%0" : : "r" (v)\ |
759 | : "memory") | ||
759 | 760 | ||
760 | #ifdef __powerpc64__ | 761 | #ifdef __powerpc64__ |
761 | #ifdef CONFIG_PPC_CELL | 762 | #ifdef CONFIG_PPC_CELL |
diff --git a/arch/powerpc/include/asm/reg_booke.h b/arch/powerpc/include/asm/reg_booke.h index 601ddbc46002..6bcf364cbb2f 100644 --- a/arch/powerpc/include/asm/reg_booke.h +++ b/arch/powerpc/include/asm/reg_booke.h | |||
@@ -389,12 +389,14 @@ | |||
389 | #define ICCR_CACHE 1 /* Cacheable */ | 389 | #define ICCR_CACHE 1 /* Cacheable */ |
390 | 390 | ||
391 | /* Bit definitions for L1CSR0. */ | 391 | /* Bit definitions for L1CSR0. */ |
392 | #define L1CSR0_CPE 0x00010000 /* Data Cache Parity Enable */ | ||
392 | #define L1CSR0_CLFC 0x00000100 /* Cache Lock Bits Flash Clear */ | 393 | #define L1CSR0_CLFC 0x00000100 /* Cache Lock Bits Flash Clear */ |
393 | #define L1CSR0_DCFI 0x00000002 /* Data Cache Flash Invalidate */ | 394 | #define L1CSR0_DCFI 0x00000002 /* Data Cache Flash Invalidate */ |
394 | #define L1CSR0_CFI 0x00000002 /* Cache Flash Invalidate */ | 395 | #define L1CSR0_CFI 0x00000002 /* Cache Flash Invalidate */ |
395 | #define L1CSR0_DCE 0x00000001 /* Data Cache Enable */ | 396 | #define L1CSR0_DCE 0x00000001 /* Data Cache Enable */ |
396 | 397 | ||
397 | /* Bit definitions for L1CSR1. */ | 398 | /* Bit definitions for L1CSR1. */ |
399 | #define L1CSR1_CPE 0x00010000 /* Instruction Cache Parity Enable */ | ||
398 | #define L1CSR1_ICLFR 0x00000100 /* Instr Cache Lock Bits Flash Reset */ | 400 | #define L1CSR1_ICLFR 0x00000100 /* Instr Cache Lock Bits Flash Reset */ |
399 | #define L1CSR1_ICFI 0x00000002 /* Instr Cache Flash Invalidate */ | 401 | #define L1CSR1_ICFI 0x00000002 /* Instr Cache Flash Invalidate */ |
400 | #define L1CSR1_ICE 0x00000001 /* Instr Cache Enable */ | 402 | #define L1CSR1_ICE 0x00000001 /* Instr Cache Enable */ |
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile index 612b0c4dc26d..6a4fb29a0618 100644 --- a/arch/powerpc/kernel/Makefile +++ b/arch/powerpc/kernel/Makefile | |||
@@ -4,6 +4,8 @@ | |||
4 | 4 | ||
5 | CFLAGS_ptrace.o += -DUTS_MACHINE='"$(UTS_MACHINE)"' | 5 | CFLAGS_ptrace.o += -DUTS_MACHINE='"$(UTS_MACHINE)"' |
6 | 6 | ||
7 | subdir-ccflags-$(CONFIG_PPC_WERROR) := -Werror | ||
8 | |||
7 | ifeq ($(CONFIG_PPC64),y) | 9 | ifeq ($(CONFIG_PPC64),y) |
8 | CFLAGS_prom_init.o += -mno-minimal-toc | 10 | CFLAGS_prom_init.o += -mno-minimal-toc |
9 | endif | 11 | endif |
diff --git a/arch/powerpc/kernel/cpu_setup_6xx.S b/arch/powerpc/kernel/cpu_setup_6xx.S index 54f767e31a1a..1e9949e68856 100644 --- a/arch/powerpc/kernel/cpu_setup_6xx.S +++ b/arch/powerpc/kernel/cpu_setup_6xx.S | |||
@@ -239,6 +239,9 @@ END_FTR_SECTION_IFSET(CPU_FTR_L3CR) | |||
239 | ori r11,r11,HID0_SGE | HID0_FOLD | HID0_BHTE | 239 | ori r11,r11,HID0_SGE | HID0_FOLD | HID0_BHTE |
240 | ori r11,r11,HID0_LRSTK | HID0_BTIC | 240 | ori r11,r11,HID0_LRSTK | HID0_BTIC |
241 | oris r11,r11,HID0_DPM@h | 241 | oris r11,r11,HID0_DPM@h |
242 | BEGIN_MMU_FTR_SECTION | ||
243 | oris r11,r11,HID0_HIGH_BAT@h | ||
244 | END_MMU_FTR_SECTION_IFSET(MMU_FTR_USE_HIGH_BATS) | ||
242 | BEGIN_FTR_SECTION | 245 | BEGIN_FTR_SECTION |
243 | xori r11,r11,HID0_BTIC | 246 | xori r11,r11,HID0_BTIC |
244 | END_FTR_SECTION_IFSET(CPU_FTR_NO_BTIC) | 247 | END_FTR_SECTION_IFSET(CPU_FTR_NO_BTIC) |
diff --git a/arch/powerpc/kernel/cpu_setup_fsl_booke.S b/arch/powerpc/kernel/cpu_setup_fsl_booke.S index eb4b9adcedb4..0adb50ad8031 100644 --- a/arch/powerpc/kernel/cpu_setup_fsl_booke.S +++ b/arch/powerpc/kernel/cpu_setup_fsl_booke.S | |||
@@ -17,6 +17,40 @@ | |||
17 | #include <asm/cputable.h> | 17 | #include <asm/cputable.h> |
18 | #include <asm/ppc_asm.h> | 18 | #include <asm/ppc_asm.h> |
19 | 19 | ||
20 | _GLOBAL(__e500_icache_setup) | ||
21 | mfspr r0, SPRN_L1CSR1 | ||
22 | andi. r3, r0, L1CSR1_ICE | ||
23 | bnelr /* Already enabled */ | ||
24 | oris r0, r0, L1CSR1_CPE@h | ||
25 | ori r0, r0, (L1CSR1_ICFI | L1CSR1_ICLFR | L1CSR1_ICE) | ||
26 | mtspr SPRN_L1CSR1, r0 /* Enable I-Cache */ | ||
27 | isync | ||
28 | blr | ||
29 | |||
30 | _GLOBAL(__e500_dcache_setup) | ||
31 | mfspr r0, SPRN_L1CSR0 | ||
32 | andi. r3, r0, L1CSR0_DCE | ||
33 | bnelr /* Already enabled */ | ||
34 | msync | ||
35 | isync | ||
36 | li r0, 0 | ||
37 | mtspr SPRN_L1CSR0, r0 /* Disable */ | ||
38 | msync | ||
39 | isync | ||
40 | li r0, (L1CSR0_DCFI | L1CSR0_CLFC) | ||
41 | mtspr SPRN_L1CSR0, r0 /* Invalidate */ | ||
42 | isync | ||
43 | 1: mfspr r0, SPRN_L1CSR0 | ||
44 | andi. r3, r0, L1CSR0_CLFC | ||
45 | bne+ 1b /* Wait for lock bits reset */ | ||
46 | oris r0, r0, L1CSR0_CPE@h | ||
47 | ori r0, r0, L1CSR0_DCE | ||
48 | msync | ||
49 | isync | ||
50 | mtspr SPRN_L1CSR0, r0 /* Enable */ | ||
51 | isync | ||
52 | blr | ||
53 | |||
20 | _GLOBAL(__setup_cpu_e200) | 54 | _GLOBAL(__setup_cpu_e200) |
21 | /* enable dedicated debug exception handling resources (Debug APU) */ | 55 | /* enable dedicated debug exception handling resources (Debug APU) */ |
22 | mfspr r3,SPRN_HID0 | 56 | mfspr r3,SPRN_HID0 |
@@ -25,7 +59,16 @@ _GLOBAL(__setup_cpu_e200) | |||
25 | b __setup_e200_ivors | 59 | b __setup_e200_ivors |
26 | _GLOBAL(__setup_cpu_e500v1) | 60 | _GLOBAL(__setup_cpu_e500v1) |
27 | _GLOBAL(__setup_cpu_e500v2) | 61 | _GLOBAL(__setup_cpu_e500v2) |
28 | b __setup_e500_ivors | 62 | mflr r4 |
63 | bl __e500_icache_setup | ||
64 | bl __e500_dcache_setup | ||
65 | bl __setup_e500_ivors | ||
66 | mtlr r4 | ||
67 | blr | ||
29 | _GLOBAL(__setup_cpu_e500mc) | 68 | _GLOBAL(__setup_cpu_e500mc) |
30 | b __setup_e500mc_ivors | 69 | mflr r4 |
31 | 70 | bl __e500_icache_setup | |
71 | bl __e500_dcache_setup | ||
72 | bl __setup_e500mc_ivors | ||
73 | mtlr r4 | ||
74 | blr | ||
diff --git a/arch/powerpc/kvm/Makefile b/arch/powerpc/kvm/Makefile index 4b2df66c79d8..459c7ee580f7 100644 --- a/arch/powerpc/kvm/Makefile +++ b/arch/powerpc/kvm/Makefile | |||
@@ -2,6 +2,8 @@ | |||
2 | # Makefile for Kernel-based Virtual Machine module | 2 | # Makefile for Kernel-based Virtual Machine module |
3 | # | 3 | # |
4 | 4 | ||
5 | subdir-ccflags-$(CONFIG_PPC_WERROR) := -Werror | ||
6 | |||
5 | EXTRA_CFLAGS += -Ivirt/kvm -Iarch/powerpc/kvm | 7 | EXTRA_CFLAGS += -Ivirt/kvm -Iarch/powerpc/kvm |
6 | 8 | ||
7 | common-objs-y = $(addprefix ../../../virt/kvm/, kvm_main.o coalesced_mmio.o) | 9 | common-objs-y = $(addprefix ../../../virt/kvm/, kvm_main.o coalesced_mmio.o) |
diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib/Makefile index 29b742b90f1f..3040dac18a37 100644 --- a/arch/powerpc/lib/Makefile +++ b/arch/powerpc/lib/Makefile | |||
@@ -2,6 +2,8 @@ | |||
2 | # Makefile for ppc-specific library files.. | 2 | # Makefile for ppc-specific library files.. |
3 | # | 3 | # |
4 | 4 | ||
5 | subdir-ccflags-$(CONFIG_PPC_WERROR) := -Werror | ||
6 | |||
5 | ifeq ($(CONFIG_PPC64),y) | 7 | ifeq ($(CONFIG_PPC64),y) |
6 | EXTRA_CFLAGS += -mno-minimal-toc | 8 | EXTRA_CFLAGS += -mno-minimal-toc |
7 | endif | 9 | endif |
diff --git a/arch/powerpc/mm/Makefile b/arch/powerpc/mm/Makefile index c4bcf072cb3c..2d2192e48de7 100644 --- a/arch/powerpc/mm/Makefile +++ b/arch/powerpc/mm/Makefile | |||
@@ -2,6 +2,8 @@ | |||
2 | # Makefile for the linux ppc-specific parts of the memory manager. | 2 | # Makefile for the linux ppc-specific parts of the memory manager. |
3 | # | 3 | # |
4 | 4 | ||
5 | subdir-ccflags-$(CONFIG_PPC_WERROR) := -Werror | ||
6 | |||
5 | ifeq ($(CONFIG_PPC64),y) | 7 | ifeq ($(CONFIG_PPC64),y) |
6 | EXTRA_CFLAGS += -mno-minimal-toc | 8 | EXTRA_CFLAGS += -mno-minimal-toc |
7 | endif | 9 | endif |
diff --git a/arch/powerpc/oprofile/Makefile b/arch/powerpc/oprofile/Makefile index 2ef6b0dddd8c..73e1c2ca0552 100644 --- a/arch/powerpc/oprofile/Makefile +++ b/arch/powerpc/oprofile/Makefile | |||
@@ -1,3 +1,5 @@ | |||
1 | subdir-ccflags-$(CONFIG_PPC_WERROR) := -Werror | ||
2 | |||
1 | ifeq ($(CONFIG_PPC64),y) | 3 | ifeq ($(CONFIG_PPC64),y) |
2 | EXTRA_CFLAGS += -mno-minimal-toc | 4 | EXTRA_CFLAGS += -mno-minimal-toc |
3 | endif | 5 | endif |
diff --git a/arch/powerpc/platforms/44x/warp.c b/arch/powerpc/platforms/44x/warp.c index c5118802a281..42e09a9f77e2 100644 --- a/arch/powerpc/platforms/44x/warp.c +++ b/arch/powerpc/platforms/44x/warp.c | |||
@@ -43,7 +43,13 @@ static int __init warp_probe(void) | |||
43 | { | 43 | { |
44 | unsigned long root = of_get_flat_dt_root(); | 44 | unsigned long root = of_get_flat_dt_root(); |
45 | 45 | ||
46 | return of_flat_dt_is_compatible(root, "pika,warp"); | 46 | if (!of_flat_dt_is_compatible(root, "pika,warp")) |
47 | return 0; | ||
48 | |||
49 | /* For __dma_alloc_coherent */ | ||
50 | ISA_DMA_THRESHOLD = ~0L; | ||
51 | |||
52 | return 1; | ||
47 | } | 53 | } |
48 | 54 | ||
49 | define_machine(warp) { | 55 | define_machine(warp) { |
diff --git a/arch/powerpc/platforms/512x/clock.c b/arch/powerpc/platforms/512x/clock.c index 1bcff94eb924..84544d072043 100644 --- a/arch/powerpc/platforms/512x/clock.c +++ b/arch/powerpc/platforms/512x/clock.c | |||
@@ -24,7 +24,7 @@ | |||
24 | #include <linux/io.h> | 24 | #include <linux/io.h> |
25 | 25 | ||
26 | #include <linux/of_platform.h> | 26 | #include <linux/of_platform.h> |
27 | #include <asm/mpc512x.h> | 27 | #include <asm/mpc5xxx.h> |
28 | #include <asm/clk_interface.h> | 28 | #include <asm/clk_interface.h> |
29 | 29 | ||
30 | #undef CLK_DEBUG | 30 | #undef CLK_DEBUG |
@@ -83,13 +83,13 @@ static void dump_clocks(void) | |||
83 | mutex_lock(&clocks_mutex); | 83 | mutex_lock(&clocks_mutex); |
84 | printk(KERN_INFO "CLOCKS:\n"); | 84 | printk(KERN_INFO "CLOCKS:\n"); |
85 | list_for_each_entry(p, &clocks, node) { | 85 | list_for_each_entry(p, &clocks, node) { |
86 | printk(KERN_INFO " %s %ld", p->name, p->rate); | 86 | pr_info(" %s=%ld", p->name, p->rate); |
87 | if (p->parent) | 87 | if (p->parent) |
88 | printk(KERN_INFO " %s %ld", p->parent->name, | 88 | pr_cont(" %s=%ld", p->parent->name, |
89 | p->parent->rate); | 89 | p->parent->rate); |
90 | if (p->flags & CLK_HAS_CTRL) | 90 | if (p->flags & CLK_HAS_CTRL) |
91 | printk(KERN_INFO " reg/bit %d/%d", p->reg, p->bit); | 91 | pr_cont(" reg/bit=%d/%d", p->reg, p->bit); |
92 | printk("\n"); | 92 | pr_cont("\n"); |
93 | } | 93 | } |
94 | mutex_unlock(&clocks_mutex); | 94 | mutex_unlock(&clocks_mutex); |
95 | } | 95 | } |
diff --git a/arch/powerpc/platforms/512x/mpc512x.h b/arch/powerpc/platforms/512x/mpc512x.h index 9c03693cb009..22a5352407e0 100644 --- a/arch/powerpc/platforms/512x/mpc512x.h +++ b/arch/powerpc/platforms/512x/mpc512x.h | |||
@@ -11,7 +11,6 @@ | |||
11 | 11 | ||
12 | #ifndef __MPC512X_H__ | 12 | #ifndef __MPC512X_H__ |
13 | #define __MPC512X_H__ | 13 | #define __MPC512X_H__ |
14 | extern unsigned long mpc512x_find_ips_freq(struct device_node *node); | ||
15 | extern void __init mpc512x_init_IRQ(void); | 14 | extern void __init mpc512x_init_IRQ(void); |
16 | void __init mpc512x_declare_of_platform_devices(void); | 15 | void __init mpc512x_declare_of_platform_devices(void); |
17 | #endif /* __MPC512X_H__ */ | 16 | #endif /* __MPC512X_H__ */ |
diff --git a/arch/powerpc/platforms/512x/mpc512x_shared.c b/arch/powerpc/platforms/512x/mpc512x_shared.c index d8cd579f3191..434d683df5a0 100644 --- a/arch/powerpc/platforms/512x/mpc512x_shared.c +++ b/arch/powerpc/platforms/512x/mpc512x_shared.c | |||
@@ -24,29 +24,6 @@ | |||
24 | 24 | ||
25 | #include "mpc512x.h" | 25 | #include "mpc512x.h" |
26 | 26 | ||
27 | unsigned long | ||
28 | mpc512x_find_ips_freq(struct device_node *node) | ||
29 | { | ||
30 | struct device_node *np; | ||
31 | const unsigned int *p_ips_freq = NULL; | ||
32 | |||
33 | of_node_get(node); | ||
34 | while (node) { | ||
35 | p_ips_freq = of_get_property(node, "bus-frequency", NULL); | ||
36 | if (p_ips_freq) | ||
37 | break; | ||
38 | |||
39 | np = of_get_parent(node); | ||
40 | of_node_put(node); | ||
41 | node = np; | ||
42 | } | ||
43 | if (node) | ||
44 | of_node_put(node); | ||
45 | |||
46 | return p_ips_freq ? *p_ips_freq : 0; | ||
47 | } | ||
48 | EXPORT_SYMBOL(mpc512x_find_ips_freq); | ||
49 | |||
50 | void __init mpc512x_init_IRQ(void) | 27 | void __init mpc512x_init_IRQ(void) |
51 | { | 28 | { |
52 | struct device_node *np; | 29 | struct device_node *np; |
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_common.c b/arch/powerpc/platforms/52xx/mpc52xx_common.c index 8e3dd5a0f228..a46bad0c2339 100644 --- a/arch/powerpc/platforms/52xx/mpc52xx_common.c +++ b/arch/powerpc/platforms/52xx/mpc52xx_common.c | |||
@@ -47,36 +47,6 @@ static DEFINE_SPINLOCK(mpc52xx_lock); | |||
47 | static struct mpc52xx_gpt __iomem *mpc52xx_wdt; | 47 | static struct mpc52xx_gpt __iomem *mpc52xx_wdt; |
48 | static struct mpc52xx_cdm __iomem *mpc52xx_cdm; | 48 | static struct mpc52xx_cdm __iomem *mpc52xx_cdm; |
49 | 49 | ||
50 | /** | ||
51 | * mpc52xx_find_ipb_freq - Find the IPB bus frequency for a device | ||
52 | * @node: device node | ||
53 | * | ||
54 | * Returns IPB bus frequency, or 0 if the bus frequency cannot be found. | ||
55 | */ | ||
56 | unsigned int | ||
57 | mpc52xx_find_ipb_freq(struct device_node *node) | ||
58 | { | ||
59 | struct device_node *np; | ||
60 | const unsigned int *p_ipb_freq = NULL; | ||
61 | |||
62 | of_node_get(node); | ||
63 | while (node) { | ||
64 | p_ipb_freq = of_get_property(node, "bus-frequency", NULL); | ||
65 | if (p_ipb_freq) | ||
66 | break; | ||
67 | |||
68 | np = of_get_parent(node); | ||
69 | of_node_put(node); | ||
70 | node = np; | ||
71 | } | ||
72 | if (node) | ||
73 | of_node_put(node); | ||
74 | |||
75 | return p_ipb_freq ? *p_ipb_freq : 0; | ||
76 | } | ||
77 | EXPORT_SYMBOL(mpc52xx_find_ipb_freq); | ||
78 | |||
79 | |||
80 | /* | 50 | /* |
81 | * Configure the XLB arbiter settings to match what Linux expects. | 51 | * Configure the XLB arbiter settings to match what Linux expects. |
82 | */ | 52 | */ |
@@ -221,7 +191,7 @@ unsigned int mpc52xx_get_xtal_freq(struct device_node *node) | |||
221 | if (!mpc52xx_cdm) | 191 | if (!mpc52xx_cdm) |
222 | return 0; | 192 | return 0; |
223 | 193 | ||
224 | freq = mpc52xx_find_ipb_freq(node); | 194 | freq = mpc5xxx_get_bus_frequency(node); |
225 | if (!freq) | 195 | if (!freq) |
226 | return 0; | 196 | return 0; |
227 | 197 | ||
diff --git a/arch/powerpc/platforms/83xx/Kconfig b/arch/powerpc/platforms/83xx/Kconfig index 437d29a59d72..083ebee9a16d 100644 --- a/arch/powerpc/platforms/83xx/Kconfig +++ b/arch/powerpc/platforms/83xx/Kconfig | |||
@@ -96,6 +96,13 @@ config ASP834x | |||
96 | This enables support for the Analogue & Micro ASP 83xx | 96 | This enables support for the Analogue & Micro ASP 83xx |
97 | board. | 97 | board. |
98 | 98 | ||
99 | config KMETER1 | ||
100 | bool "Keymile KMETER1" | ||
101 | select DEFAULT_UIMAGE | ||
102 | select QUICC_ENGINE | ||
103 | help | ||
104 | This enables support for the Keymile KMETER1 board. | ||
105 | |||
99 | 106 | ||
100 | endif | 107 | endif |
101 | 108 | ||
diff --git a/arch/powerpc/platforms/83xx/Makefile b/arch/powerpc/platforms/83xx/Makefile index 051777c542c7..e139c36572ec 100644 --- a/arch/powerpc/platforms/83xx/Makefile +++ b/arch/powerpc/platforms/83xx/Makefile | |||
@@ -15,3 +15,4 @@ obj-$(CONFIG_MPC837x_MDS) += mpc837x_mds.o | |||
15 | obj-$(CONFIG_SBC834x) += sbc834x.o | 15 | obj-$(CONFIG_SBC834x) += sbc834x.o |
16 | obj-$(CONFIG_MPC837x_RDB) += mpc837x_rdb.o | 16 | obj-$(CONFIG_MPC837x_RDB) += mpc837x_rdb.o |
17 | obj-$(CONFIG_ASP834x) += asp834x.o | 17 | obj-$(CONFIG_ASP834x) += asp834x.o |
18 | obj-$(CONFIG_KMETER1) += kmeter1.o | ||
diff --git a/arch/powerpc/platforms/83xx/kmeter1.c b/arch/powerpc/platforms/83xx/kmeter1.c new file mode 100644 index 000000000000..903acfd851ac --- /dev/null +++ b/arch/powerpc/platforms/83xx/kmeter1.c | |||
@@ -0,0 +1,191 @@ | |||
1 | /* | ||
2 | * Copyright 2008 DENX Software Engineering GmbH | ||
3 | * Author: Heiko Schocher <hs@denx.de> | ||
4 | * | ||
5 | * Description: | ||
6 | * Keymile KMETER1 board specific routines. | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify it | ||
9 | * under the terms of the GNU General Public License as published by the | ||
10 | * Free Software Foundation; either version 2 of the License, or (at your | ||
11 | * option) any later version. | ||
12 | */ | ||
13 | |||
14 | #include <linux/stddef.h> | ||
15 | #include <linux/kernel.h> | ||
16 | #include <linux/init.h> | ||
17 | #include <linux/errno.h> | ||
18 | #include <linux/reboot.h> | ||
19 | #include <linux/pci.h> | ||
20 | #include <linux/kdev_t.h> | ||
21 | #include <linux/major.h> | ||
22 | #include <linux/console.h> | ||
23 | #include <linux/delay.h> | ||
24 | #include <linux/seq_file.h> | ||
25 | #include <linux/root_dev.h> | ||
26 | #include <linux/initrd.h> | ||
27 | #include <linux/of_platform.h> | ||
28 | #include <linux/of_device.h> | ||
29 | |||
30 | #include <asm/system.h> | ||
31 | #include <asm/atomic.h> | ||
32 | #include <asm/time.h> | ||
33 | #include <asm/io.h> | ||
34 | #include <asm/machdep.h> | ||
35 | #include <asm/ipic.h> | ||
36 | #include <asm/irq.h> | ||
37 | #include <asm/prom.h> | ||
38 | #include <asm/udbg.h> | ||
39 | #include <sysdev/fsl_soc.h> | ||
40 | #include <sysdev/fsl_pci.h> | ||
41 | #include <asm/qe.h> | ||
42 | #include <asm/qe_ic.h> | ||
43 | |||
44 | #include "mpc83xx.h" | ||
45 | |||
46 | #define SVR_REV(svr) (((svr) >> 0) & 0xFFFF) /* Revision field */ | ||
47 | /* ************************************************************************ | ||
48 | * | ||
49 | * Setup the architecture | ||
50 | * | ||
51 | */ | ||
52 | static void __init kmeter1_setup_arch(void) | ||
53 | { | ||
54 | struct device_node *np; | ||
55 | |||
56 | if (ppc_md.progress) | ||
57 | ppc_md.progress("kmeter1_setup_arch()", 0); | ||
58 | |||
59 | #ifdef CONFIG_PCI | ||
60 | for_each_compatible_node(np, "pci", "fsl,mpc8349-pci") | ||
61 | mpc83xx_add_bridge(np); | ||
62 | #endif | ||
63 | |||
64 | #ifdef CONFIG_QUICC_ENGINE | ||
65 | qe_reset(); | ||
66 | |||
67 | np = of_find_node_by_name(NULL, "par_io"); | ||
68 | if (np != NULL) { | ||
69 | par_io_init(np); | ||
70 | of_node_put(np); | ||
71 | |||
72 | for (np = NULL; (np = of_find_node_by_name(np, "ucc")) != NULL;) | ||
73 | par_io_of_config(np); | ||
74 | } | ||
75 | |||
76 | np = of_find_compatible_node(NULL, "network", "ucc_geth"); | ||
77 | if (np != NULL) { | ||
78 | uint svid; | ||
79 | |||
80 | /* handle mpc8360ea rev.2.1 erratum 2: RGMII Timing */ | ||
81 | svid = mfspr(SPRN_SVR); | ||
82 | if (SVR_REV(svid) == 0x0021) { | ||
83 | struct device_node *np_par; | ||
84 | struct resource res; | ||
85 | void __iomem *base; | ||
86 | int ret; | ||
87 | |||
88 | np_par = of_find_node_by_name(NULL, "par_io"); | ||
89 | if (np_par == NULL) { | ||
90 | printk(KERN_WARNING "%s couldn;t find par_io node\n", | ||
91 | __func__); | ||
92 | return; | ||
93 | } | ||
94 | /* Map Parallel I/O ports registers */ | ||
95 | ret = of_address_to_resource(np_par, 0, &res); | ||
96 | if (ret) { | ||
97 | printk(KERN_WARNING "%s couldn;t map par_io registers\n", | ||
98 | __func__); | ||
99 | return; | ||
100 | } | ||
101 | base = ioremap(res.start, res.end - res.start + 1); | ||
102 | |||
103 | /* | ||
104 | * IMMR + 0x14A8[4:5] = 11 (clk delay for UCC 2) | ||
105 | * IMMR + 0x14A8[18:19] = 11 (clk delay for UCC 1) | ||
106 | */ | ||
107 | setbits32((base + 0xa8), 0x0c003000); | ||
108 | |||
109 | /* | ||
110 | * IMMR + 0x14AC[20:27] = 10101010 | ||
111 | * (data delay for both UCC's) | ||
112 | */ | ||
113 | clrsetbits_be32((base + 0xac), 0xff0, 0xaa0); | ||
114 | iounmap(base); | ||
115 | of_node_put(np_par); | ||
116 | } | ||
117 | of_node_put(np); | ||
118 | } | ||
119 | #endif /* CONFIG_QUICC_ENGINE */ | ||
120 | } | ||
121 | |||
122 | static struct of_device_id kmeter_ids[] = { | ||
123 | { .type = "soc", }, | ||
124 | { .compatible = "soc", }, | ||
125 | { .compatible = "simple-bus", }, | ||
126 | { .type = "qe", }, | ||
127 | { .compatible = "fsl,qe", }, | ||
128 | {}, | ||
129 | }; | ||
130 | |||
131 | static int __init kmeter_declare_of_platform_devices(void) | ||
132 | { | ||
133 | /* Publish the QE devices */ | ||
134 | of_platform_bus_probe(NULL, kmeter_ids, NULL); | ||
135 | |||
136 | return 0; | ||
137 | } | ||
138 | machine_device_initcall(kmeter1, kmeter_declare_of_platform_devices); | ||
139 | |||
140 | static void __init kmeter1_init_IRQ(void) | ||
141 | { | ||
142 | struct device_node *np; | ||
143 | |||
144 | np = of_find_compatible_node(NULL, NULL, "fsl,pq2pro-pic"); | ||
145 | if (!np) { | ||
146 | np = of_find_node_by_type(NULL, "ipic"); | ||
147 | if (!np) | ||
148 | return; | ||
149 | } | ||
150 | |||
151 | ipic_init(np, 0); | ||
152 | |||
153 | /* Initialize the default interrupt mapping priorities, | ||
154 | * in case the boot rom changed something on us. | ||
155 | */ | ||
156 | ipic_set_default_priority(); | ||
157 | of_node_put(np); | ||
158 | |||
159 | #ifdef CONFIG_QUICC_ENGINE | ||
160 | np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic"); | ||
161 | if (!np) { | ||
162 | np = of_find_node_by_type(NULL, "qeic"); | ||
163 | if (!np) | ||
164 | return; | ||
165 | } | ||
166 | qe_ic_init(np, 0, qe_ic_cascade_low_ipic, qe_ic_cascade_high_ipic); | ||
167 | of_node_put(np); | ||
168 | #endif /* CONFIG_QUICC_ENGINE */ | ||
169 | } | ||
170 | |||
171 | /* | ||
172 | * Called very early, MMU is off, device-tree isn't unflattened | ||
173 | */ | ||
174 | static int __init kmeter1_probe(void) | ||
175 | { | ||
176 | unsigned long root = of_get_flat_dt_root(); | ||
177 | |||
178 | return of_flat_dt_is_compatible(root, "keymile,KMETER1"); | ||
179 | } | ||
180 | |||
181 | define_machine(kmeter1) { | ||
182 | .name = "KMETER1", | ||
183 | .probe = kmeter1_probe, | ||
184 | .setup_arch = kmeter1_setup_arch, | ||
185 | .init_IRQ = kmeter1_init_IRQ, | ||
186 | .get_irq = ipic_get_irq, | ||
187 | .restart = mpc83xx_restart, | ||
188 | .time_init = mpc83xx_time_init, | ||
189 | .calibrate_decr = generic_calibrate_decr, | ||
190 | .progress = udbg_progress, | ||
191 | }; | ||
diff --git a/arch/powerpc/platforms/83xx/mpc83xx.h b/arch/powerpc/platforms/83xx/mpc83xx.h index 83cfe51526ec..d1dc5b0b4fbf 100644 --- a/arch/powerpc/platforms/83xx/mpc83xx.h +++ b/arch/powerpc/platforms/83xx/mpc83xx.h | |||
@@ -22,8 +22,8 @@ | |||
22 | /* system i/o configuration register low */ | 22 | /* system i/o configuration register low */ |
23 | #define MPC83XX_SICRL_OFFS 0x114 | 23 | #define MPC83XX_SICRL_OFFS 0x114 |
24 | #define MPC834X_SICRL_USB_MASK 0x60000000 | 24 | #define MPC834X_SICRL_USB_MASK 0x60000000 |
25 | #define MPC834X_SICRL_USB0 0x40000000 | 25 | #define MPC834X_SICRL_USB0 0x20000000 |
26 | #define MPC834X_SICRL_USB1 0x20000000 | 26 | #define MPC834X_SICRL_USB1 0x40000000 |
27 | #define MPC831X_SICRL_USB_MASK 0x00000c00 | 27 | #define MPC831X_SICRL_USB_MASK 0x00000c00 |
28 | #define MPC831X_SICRL_USB_ULPI 0x00000800 | 28 | #define MPC831X_SICRL_USB_ULPI 0x00000800 |
29 | #define MPC8315_SICRL_USB_MASK 0x000000fc | 29 | #define MPC8315_SICRL_USB_MASK 0x000000fc |
diff --git a/arch/powerpc/platforms/83xx/usb.c b/arch/powerpc/platforms/83xx/usb.c index 11e1fac17c7f..3ba4bb7d41bb 100644 --- a/arch/powerpc/platforms/83xx/usb.c +++ b/arch/powerpc/platforms/83xx/usb.c | |||
@@ -47,25 +47,25 @@ int mpc834x_usb_cfg(void) | |||
47 | sccr |= MPC83XX_SCCR_USB_DRCM_11; /* 1:3 */ | 47 | sccr |= MPC83XX_SCCR_USB_DRCM_11; /* 1:3 */ |
48 | 48 | ||
49 | prop = of_get_property(np, "phy_type", NULL); | 49 | prop = of_get_property(np, "phy_type", NULL); |
50 | port1_is_dr = 1; | ||
50 | if (prop && (!strcmp(prop, "utmi") || | 51 | if (prop && (!strcmp(prop, "utmi") || |
51 | !strcmp(prop, "utmi_wide"))) { | 52 | !strcmp(prop, "utmi_wide"))) { |
52 | sicrl |= MPC834X_SICRL_USB0 | MPC834X_SICRL_USB1; | 53 | sicrl |= MPC834X_SICRL_USB0 | MPC834X_SICRL_USB1; |
53 | sicrh |= MPC834X_SICRH_USB_UTMI; | 54 | sicrh |= MPC834X_SICRH_USB_UTMI; |
54 | port1_is_dr = 1; | 55 | port0_is_dr = 1; |
55 | } else if (prop && !strcmp(prop, "serial")) { | 56 | } else if (prop && !strcmp(prop, "serial")) { |
56 | dr_mode = of_get_property(np, "dr_mode", NULL); | 57 | dr_mode = of_get_property(np, "dr_mode", NULL); |
57 | if (dr_mode && !strcmp(dr_mode, "otg")) { | 58 | if (dr_mode && !strcmp(dr_mode, "otg")) { |
58 | sicrl |= MPC834X_SICRL_USB0 | MPC834X_SICRL_USB1; | 59 | sicrl |= MPC834X_SICRL_USB0 | MPC834X_SICRL_USB1; |
59 | port1_is_dr = 1; | 60 | port0_is_dr = 1; |
60 | } else { | 61 | } else { |
61 | sicrl |= MPC834X_SICRL_USB0; | 62 | sicrl |= MPC834X_SICRL_USB1; |
62 | } | 63 | } |
63 | } else if (prop && !strcmp(prop, "ulpi")) { | 64 | } else if (prop && !strcmp(prop, "ulpi")) { |
64 | sicrl |= MPC834X_SICRL_USB0; | 65 | sicrl |= MPC834X_SICRL_USB1; |
65 | } else { | 66 | } else { |
66 | printk(KERN_WARNING "834x USB PHY type not supported\n"); | 67 | printk(KERN_WARNING "834x USB PHY type not supported\n"); |
67 | } | 68 | } |
68 | port0_is_dr = 1; | ||
69 | of_node_put(np); | 69 | of_node_put(np); |
70 | } | 70 | } |
71 | np = of_find_compatible_node(NULL, NULL, "fsl-usb2-mph"); | 71 | np = of_find_compatible_node(NULL, NULL, "fsl-usb2-mph"); |
diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig index 43d385cedcd7..a9b416688975 100644 --- a/arch/powerpc/platforms/85xx/Kconfig +++ b/arch/powerpc/platforms/85xx/Kconfig | |||
@@ -35,12 +35,14 @@ config MPC85xx_MDS | |||
35 | select DEFAULT_UIMAGE | 35 | select DEFAULT_UIMAGE |
36 | select PHYLIB | 36 | select PHYLIB |
37 | select HAS_RAPIDIO | 37 | select HAS_RAPIDIO |
38 | select SWIOTLB | ||
38 | help | 39 | help |
39 | This option enables support for the MPC85xx MDS board | 40 | This option enables support for the MPC85xx MDS board |
40 | 41 | ||
41 | config MPC8536_DS | 42 | config MPC8536_DS |
42 | bool "Freescale MPC8536 DS" | 43 | bool "Freescale MPC8536 DS" |
43 | select DEFAULT_UIMAGE | 44 | select DEFAULT_UIMAGE |
45 | select SWIOTLB | ||
44 | help | 46 | help |
45 | This option enables support for the MPC8536 DS board | 47 | This option enables support for the MPC8536 DS board |
46 | 48 | ||
@@ -49,6 +51,7 @@ config MPC85xx_DS | |||
49 | select PPC_I8259 | 51 | select PPC_I8259 |
50 | select DEFAULT_UIMAGE | 52 | select DEFAULT_UIMAGE |
51 | select FSL_ULI1575 | 53 | select FSL_ULI1575 |
54 | select SWIOTLB | ||
52 | help | 55 | help |
53 | This option enables support for the MPC85xx DS (MPC8544 DS) board | 56 | This option enables support for the MPC85xx DS (MPC8544 DS) board |
54 | 57 | ||
@@ -64,6 +67,16 @@ config KSI8560 | |||
64 | help | 67 | help |
65 | This option enables support for the Emerson KSI8560 board | 68 | This option enables support for the Emerson KSI8560 board |
66 | 69 | ||
70 | config XES_MPC85xx | ||
71 | bool "X-ES single-board computer" | ||
72 | select DEFAULT_UIMAGE | ||
73 | help | ||
74 | This option enables support for the various single-board | ||
75 | computers from Extreme Engineering Solutions (X-ES) based on | ||
76 | Freescale MPC85xx processors. | ||
77 | Manufacturer: Extreme Engineering Solutions, Inc. | ||
78 | URL: <http://www.xes-inc.com/> | ||
79 | |||
67 | config STX_GP3 | 80 | config STX_GP3 |
68 | bool "Silicon Turnkey Express GP3" | 81 | bool "Silicon Turnkey Express GP3" |
69 | help | 82 | help |
diff --git a/arch/powerpc/platforms/85xx/Makefile b/arch/powerpc/platforms/85xx/Makefile index a857b35b9828..835733f2b12c 100644 --- a/arch/powerpc/platforms/85xx/Makefile +++ b/arch/powerpc/platforms/85xx/Makefile | |||
@@ -15,3 +15,4 @@ obj-$(CONFIG_SBC8560) += sbc8560.o | |||
15 | obj-$(CONFIG_SBC8548) += sbc8548.o | 15 | obj-$(CONFIG_SBC8548) += sbc8548.o |
16 | obj-$(CONFIG_SOCRATES) += socrates.o socrates_fpga_pic.o | 16 | obj-$(CONFIG_SOCRATES) += socrates.o socrates_fpga_pic.o |
17 | obj-$(CONFIG_KSI8560) += ksi8560.o | 17 | obj-$(CONFIG_KSI8560) += ksi8560.o |
18 | obj-$(CONFIG_XES_MPC85xx) += xes_mpc85xx.o \ No newline at end of file | ||
diff --git a/arch/powerpc/platforms/85xx/mpc8536_ds.c b/arch/powerpc/platforms/85xx/mpc8536_ds.c index 63efca20d7bd..055ff417bae9 100644 --- a/arch/powerpc/platforms/85xx/mpc8536_ds.c +++ b/arch/powerpc/platforms/85xx/mpc8536_ds.c | |||
@@ -17,6 +17,7 @@ | |||
17 | #include <linux/seq_file.h> | 17 | #include <linux/seq_file.h> |
18 | #include <linux/interrupt.h> | 18 | #include <linux/interrupt.h> |
19 | #include <linux/of_platform.h> | 19 | #include <linux/of_platform.h> |
20 | #include <linux/lmb.h> | ||
20 | 21 | ||
21 | #include <asm/system.h> | 22 | #include <asm/system.h> |
22 | #include <asm/time.h> | 23 | #include <asm/time.h> |
@@ -26,6 +27,7 @@ | |||
26 | #include <asm/prom.h> | 27 | #include <asm/prom.h> |
27 | #include <asm/udbg.h> | 28 | #include <asm/udbg.h> |
28 | #include <asm/mpic.h> | 29 | #include <asm/mpic.h> |
30 | #include <asm/swiotlb.h> | ||
29 | 31 | ||
30 | #include <sysdev/fsl_soc.h> | 32 | #include <sysdev/fsl_soc.h> |
31 | #include <sysdev/fsl_pci.h> | 33 | #include <sysdev/fsl_pci.h> |
@@ -65,7 +67,9 @@ static void __init mpc8536_ds_setup_arch(void) | |||
65 | { | 67 | { |
66 | #ifdef CONFIG_PCI | 68 | #ifdef CONFIG_PCI |
67 | struct device_node *np; | 69 | struct device_node *np; |
70 | struct pci_controller *hose; | ||
68 | #endif | 71 | #endif |
72 | dma_addr_t max = 0xffffffff; | ||
69 | 73 | ||
70 | if (ppc_md.progress) | 74 | if (ppc_md.progress) |
71 | ppc_md.progress("mpc8536_ds_setup_arch()", 0); | 75 | ppc_md.progress("mpc8536_ds_setup_arch()", 0); |
@@ -80,11 +84,22 @@ static void __init mpc8536_ds_setup_arch(void) | |||
80 | fsl_add_bridge(np, 1); | 84 | fsl_add_bridge(np, 1); |
81 | else | 85 | else |
82 | fsl_add_bridge(np, 0); | 86 | fsl_add_bridge(np, 0); |
87 | |||
88 | hose = pci_find_hose_for_OF_device(np); | ||
89 | max = min(max, hose->dma_window_base_cur + | ||
90 | hose->dma_window_size); | ||
83 | } | 91 | } |
84 | } | 92 | } |
85 | 93 | ||
86 | #endif | 94 | #endif |
87 | 95 | ||
96 | #ifdef CONFIG_SWIOTLB | ||
97 | if (lmb_end_of_DRAM() > max) { | ||
98 | ppc_swiotlb_enable = 1; | ||
99 | set_pci_dma_ops(&swiotlb_pci_dma_ops); | ||
100 | } | ||
101 | #endif | ||
102 | |||
88 | printk("MPC8536 DS board from Freescale Semiconductor\n"); | 103 | printk("MPC8536 DS board from Freescale Semiconductor\n"); |
89 | } | 104 | } |
90 | 105 | ||
@@ -102,6 +117,8 @@ static int __init mpc8536_ds_publish_devices(void) | |||
102 | } | 117 | } |
103 | machine_device_initcall(mpc8536_ds, mpc8536_ds_publish_devices); | 118 | machine_device_initcall(mpc8536_ds, mpc8536_ds_publish_devices); |
104 | 119 | ||
120 | machine_arch_initcall(mpc8536_ds, swiotlb_setup_bus_notifier); | ||
121 | |||
105 | /* | 122 | /* |
106 | * Called very early, device-tree isn't unflattened | 123 | * Called very early, device-tree isn't unflattened |
107 | */ | 124 | */ |
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ds.c b/arch/powerpc/platforms/85xx/mpc85xx_ds.c index 53d5851a6c97..849c0ac0025f 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_ds.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_ds.c | |||
@@ -20,6 +20,7 @@ | |||
20 | #include <linux/seq_file.h> | 20 | #include <linux/seq_file.h> |
21 | #include <linux/interrupt.h> | 21 | #include <linux/interrupt.h> |
22 | #include <linux/of_platform.h> | 22 | #include <linux/of_platform.h> |
23 | #include <linux/lmb.h> | ||
23 | 24 | ||
24 | #include <asm/system.h> | 25 | #include <asm/system.h> |
25 | #include <asm/time.h> | 26 | #include <asm/time.h> |
@@ -30,6 +31,7 @@ | |||
30 | #include <asm/udbg.h> | 31 | #include <asm/udbg.h> |
31 | #include <asm/mpic.h> | 32 | #include <asm/mpic.h> |
32 | #include <asm/i8259.h> | 33 | #include <asm/i8259.h> |
34 | #include <asm/swiotlb.h> | ||
33 | 35 | ||
34 | #include <sysdev/fsl_soc.h> | 36 | #include <sysdev/fsl_soc.h> |
35 | #include <sysdev/fsl_pci.h> | 37 | #include <sysdev/fsl_pci.h> |
@@ -155,7 +157,9 @@ static void __init mpc85xx_ds_setup_arch(void) | |||
155 | { | 157 | { |
156 | #ifdef CONFIG_PCI | 158 | #ifdef CONFIG_PCI |
157 | struct device_node *np; | 159 | struct device_node *np; |
160 | struct pci_controller *hose; | ||
158 | #endif | 161 | #endif |
162 | dma_addr_t max = 0xffffffff; | ||
159 | 163 | ||
160 | if (ppc_md.progress) | 164 | if (ppc_md.progress) |
161 | ppc_md.progress("mpc85xx_ds_setup_arch()", 0); | 165 | ppc_md.progress("mpc85xx_ds_setup_arch()", 0); |
@@ -171,6 +175,10 @@ static void __init mpc85xx_ds_setup_arch(void) | |||
171 | fsl_add_bridge(np, 1); | 175 | fsl_add_bridge(np, 1); |
172 | else | 176 | else |
173 | fsl_add_bridge(np, 0); | 177 | fsl_add_bridge(np, 0); |
178 | |||
179 | hose = pci_find_hose_for_OF_device(np); | ||
180 | max = min(max, hose->dma_window_base_cur + | ||
181 | hose->dma_window_size); | ||
174 | } | 182 | } |
175 | } | 183 | } |
176 | 184 | ||
@@ -181,6 +189,13 @@ static void __init mpc85xx_ds_setup_arch(void) | |||
181 | mpc85xx_smp_init(); | 189 | mpc85xx_smp_init(); |
182 | #endif | 190 | #endif |
183 | 191 | ||
192 | #ifdef CONFIG_SWIOTLB | ||
193 | if (lmb_end_of_DRAM() > max) { | ||
194 | ppc_swiotlb_enable = 1; | ||
195 | set_pci_dma_ops(&swiotlb_pci_dma_ops); | ||
196 | } | ||
197 | #endif | ||
198 | |||
184 | printk("MPC85xx DS board from Freescale Semiconductor\n"); | 199 | printk("MPC85xx DS board from Freescale Semiconductor\n"); |
185 | } | 200 | } |
186 | 201 | ||
@@ -217,6 +232,10 @@ machine_device_initcall(mpc8544_ds, mpc85xxds_publish_devices); | |||
217 | machine_device_initcall(mpc8572_ds, mpc85xxds_publish_devices); | 232 | machine_device_initcall(mpc8572_ds, mpc85xxds_publish_devices); |
218 | machine_device_initcall(p2020_ds, mpc85xxds_publish_devices); | 233 | machine_device_initcall(p2020_ds, mpc85xxds_publish_devices); |
219 | 234 | ||
235 | machine_arch_initcall(mpc8544_ds, swiotlb_setup_bus_notifier); | ||
236 | machine_arch_initcall(mpc8572_ds, swiotlb_setup_bus_notifier); | ||
237 | machine_arch_initcall(p2020_ds, swiotlb_setup_bus_notifier); | ||
238 | |||
220 | /* | 239 | /* |
221 | * Called very early, device-tree isn't unflattened | 240 | * Called very early, device-tree isn't unflattened |
222 | */ | 241 | */ |
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c b/arch/powerpc/platforms/85xx/mpc85xx_mds.c index b2c0a4319973..77f90b356356 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_mds.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_mds.c | |||
@@ -33,6 +33,7 @@ | |||
33 | #include <linux/of_platform.h> | 33 | #include <linux/of_platform.h> |
34 | #include <linux/of_device.h> | 34 | #include <linux/of_device.h> |
35 | #include <linux/phy.h> | 35 | #include <linux/phy.h> |
36 | #include <linux/lmb.h> | ||
36 | 37 | ||
37 | #include <asm/system.h> | 38 | #include <asm/system.h> |
38 | #include <asm/atomic.h> | 39 | #include <asm/atomic.h> |
@@ -49,6 +50,7 @@ | |||
49 | #include <asm/qe.h> | 50 | #include <asm/qe.h> |
50 | #include <asm/qe_ic.h> | 51 | #include <asm/qe_ic.h> |
51 | #include <asm/mpic.h> | 52 | #include <asm/mpic.h> |
53 | #include <asm/swiotlb.h> | ||
52 | 54 | ||
53 | #undef DEBUG | 55 | #undef DEBUG |
54 | #ifdef DEBUG | 56 | #ifdef DEBUG |
@@ -155,6 +157,10 @@ static void __init mpc85xx_mds_setup_arch(void) | |||
155 | { | 157 | { |
156 | struct device_node *np; | 158 | struct device_node *np; |
157 | static u8 __iomem *bcsr_regs = NULL; | 159 | static u8 __iomem *bcsr_regs = NULL; |
160 | #ifdef CONFIG_PCI | ||
161 | struct pci_controller *hose; | ||
162 | #endif | ||
163 | dma_addr_t max = 0xffffffff; | ||
158 | 164 | ||
159 | if (ppc_md.progress) | 165 | if (ppc_md.progress) |
160 | ppc_md.progress("mpc85xx_mds_setup_arch()", 0); | 166 | ppc_md.progress("mpc85xx_mds_setup_arch()", 0); |
@@ -179,6 +185,10 @@ static void __init mpc85xx_mds_setup_arch(void) | |||
179 | fsl_add_bridge(np, 1); | 185 | fsl_add_bridge(np, 1); |
180 | else | 186 | else |
181 | fsl_add_bridge(np, 0); | 187 | fsl_add_bridge(np, 0); |
188 | |||
189 | hose = pci_find_hose_for_OF_device(np); | ||
190 | max = min(max, hose->dma_window_base_cur + | ||
191 | hose->dma_window_size); | ||
182 | } | 192 | } |
183 | } | 193 | } |
184 | #endif | 194 | #endif |
@@ -227,6 +237,13 @@ static void __init mpc85xx_mds_setup_arch(void) | |||
227 | iounmap(bcsr_regs); | 237 | iounmap(bcsr_regs); |
228 | } | 238 | } |
229 | #endif /* CONFIG_QUICC_ENGINE */ | 239 | #endif /* CONFIG_QUICC_ENGINE */ |
240 | |||
241 | #ifdef CONFIG_SWIOTLB | ||
242 | if (lmb_end_of_DRAM() > max) { | ||
243 | ppc_swiotlb_enable = 1; | ||
244 | set_pci_dma_ops(&swiotlb_pci_dma_ops); | ||
245 | } | ||
246 | #endif | ||
230 | } | 247 | } |
231 | 248 | ||
232 | 249 | ||
@@ -281,6 +298,9 @@ static int __init mpc85xx_publish_devices(void) | |||
281 | machine_device_initcall(mpc8568_mds, mpc85xx_publish_devices); | 298 | machine_device_initcall(mpc8568_mds, mpc85xx_publish_devices); |
282 | machine_device_initcall(mpc8569_mds, mpc85xx_publish_devices); | 299 | machine_device_initcall(mpc8569_mds, mpc85xx_publish_devices); |
283 | 300 | ||
301 | machine_arch_initcall(mpc8568_mds, swiotlb_setup_bus_notifier); | ||
302 | machine_arch_initcall(mpc8569_mds, swiotlb_setup_bus_notifier); | ||
303 | |||
284 | static void __init mpc85xx_mds_pic_init(void) | 304 | static void __init mpc85xx_mds_pic_init(void) |
285 | { | 305 | { |
286 | struct mpic *mpic; | 306 | struct mpic *mpic; |
diff --git a/arch/powerpc/platforms/85xx/xes_mpc85xx.c b/arch/powerpc/platforms/85xx/xes_mpc85xx.c new file mode 100644 index 000000000000..ee01532786e4 --- /dev/null +++ b/arch/powerpc/platforms/85xx/xes_mpc85xx.c | |||
@@ -0,0 +1,282 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2009 Extreme Engineering Solutions, Inc. | ||
3 | * | ||
4 | * X-ES board-specific functionality | ||
5 | * | ||
6 | * Based on mpc85xx_ds code from Freescale Semiconductor, Inc. | ||
7 | * | ||
8 | * Author: Nate Case <ncase@xes-inc.com> | ||
9 | * | ||
10 | * This is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | #include <linux/stddef.h> | ||
16 | #include <linux/kernel.h> | ||
17 | #include <linux/pci.h> | ||
18 | #include <linux/kdev_t.h> | ||
19 | #include <linux/delay.h> | ||
20 | #include <linux/seq_file.h> | ||
21 | #include <linux/interrupt.h> | ||
22 | #include <linux/of_platform.h> | ||
23 | |||
24 | #include <asm/system.h> | ||
25 | #include <asm/time.h> | ||
26 | #include <asm/machdep.h> | ||
27 | #include <asm/pci-bridge.h> | ||
28 | #include <mm/mmu_decl.h> | ||
29 | #include <asm/prom.h> | ||
30 | #include <asm/udbg.h> | ||
31 | #include <asm/mpic.h> | ||
32 | |||
33 | #include <sysdev/fsl_soc.h> | ||
34 | #include <sysdev/fsl_pci.h> | ||
35 | #include <linux/of_platform.h> | ||
36 | |||
37 | /* A few bit definitions needed for fixups on some boards */ | ||
38 | #define MPC85xx_L2CTL_L2E 0x80000000 /* L2 enable */ | ||
39 | #define MPC85xx_L2CTL_L2I 0x40000000 /* L2 flash invalidate */ | ||
40 | #define MPC85xx_L2CTL_L2SIZ_MASK 0x30000000 /* L2 SRAM size (R/O) */ | ||
41 | |||
42 | void __init xes_mpc85xx_pic_init(void) | ||
43 | { | ||
44 | struct mpic *mpic; | ||
45 | struct resource r; | ||
46 | struct device_node *np; | ||
47 | |||
48 | np = of_find_node_by_type(NULL, "open-pic"); | ||
49 | if (np == NULL) { | ||
50 | printk(KERN_ERR "Could not find open-pic node\n"); | ||
51 | return; | ||
52 | } | ||
53 | |||
54 | if (of_address_to_resource(np, 0, &r)) { | ||
55 | printk(KERN_ERR "Failed to map mpic register space\n"); | ||
56 | of_node_put(np); | ||
57 | return; | ||
58 | } | ||
59 | |||
60 | mpic = mpic_alloc(np, r.start, | ||
61 | MPIC_PRIMARY | MPIC_WANTS_RESET | | ||
62 | MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS, | ||
63 | 0, 256, " OpenPIC "); | ||
64 | BUG_ON(mpic == NULL); | ||
65 | of_node_put(np); | ||
66 | |||
67 | mpic_init(mpic); | ||
68 | } | ||
69 | |||
70 | static void xes_mpc85xx_configure_l2(void __iomem *l2_base) | ||
71 | { | ||
72 | volatile uint32_t ctl, tmp; | ||
73 | |||
74 | asm volatile("msync; isync"); | ||
75 | tmp = in_be32(l2_base); | ||
76 | |||
77 | /* | ||
78 | * xMon may have enabled part of L2 as SRAM, so we need to set it | ||
79 | * up for all cache mode just to be safe. | ||
80 | */ | ||
81 | printk(KERN_INFO "xes_mpc85xx: Enabling L2 as cache\n"); | ||
82 | |||
83 | ctl = MPC85xx_L2CTL_L2E | MPC85xx_L2CTL_L2I; | ||
84 | if (machine_is_compatible("MPC8540") || | ||
85 | machine_is_compatible("MPC8560")) | ||
86 | /* | ||
87 | * Assume L2 SRAM is used fully for cache, so set | ||
88 | * L2BLKSZ (bits 4:5) to match L2SIZ (bits 2:3). | ||
89 | */ | ||
90 | ctl |= (tmp & MPC85xx_L2CTL_L2SIZ_MASK) >> 2; | ||
91 | |||
92 | asm volatile("msync; isync"); | ||
93 | out_be32(l2_base, ctl); | ||
94 | asm volatile("msync; isync"); | ||
95 | } | ||
96 | |||
97 | static void xes_mpc85xx_fixups(void) | ||
98 | { | ||
99 | struct device_node *np; | ||
100 | int err; | ||
101 | |||
102 | /* | ||
103 | * Legacy xMon firmware on some X-ES boards does not enable L2 | ||
104 | * as cache. We must ensure that they get enabled here. | ||
105 | */ | ||
106 | for_each_node_by_name(np, "l2-cache-controller") { | ||
107 | struct resource r[2]; | ||
108 | void __iomem *l2_base; | ||
109 | |||
110 | /* Only MPC8548, MPC8540, and MPC8560 boards are affected */ | ||
111 | if (!of_device_is_compatible(np, | ||
112 | "fsl,mpc8548-l2-cache-controller") && | ||
113 | !of_device_is_compatible(np, | ||
114 | "fsl,mpc8540-l2-cache-controller") && | ||
115 | !of_device_is_compatible(np, | ||
116 | "fsl,mpc8560-l2-cache-controller")) | ||
117 | continue; | ||
118 | |||
119 | err = of_address_to_resource(np, 0, &r[0]); | ||
120 | if (err) { | ||
121 | printk(KERN_WARNING "xes_mpc85xx: Could not get " | ||
122 | "resource for device tree node '%s'", | ||
123 | np->full_name); | ||
124 | continue; | ||
125 | } | ||
126 | |||
127 | l2_base = ioremap(r[0].start, r[0].end - r[0].start + 1); | ||
128 | |||
129 | xes_mpc85xx_configure_l2(l2_base); | ||
130 | } | ||
131 | } | ||
132 | |||
133 | #ifdef CONFIG_PCI | ||
134 | static int primary_phb_addr; | ||
135 | #endif | ||
136 | |||
137 | /* | ||
138 | * Setup the architecture | ||
139 | */ | ||
140 | #ifdef CONFIG_SMP | ||
141 | extern void __init mpc85xx_smp_init(void); | ||
142 | #endif | ||
143 | static void __init xes_mpc85xx_setup_arch(void) | ||
144 | { | ||
145 | #ifdef CONFIG_PCI | ||
146 | struct device_node *np; | ||
147 | #endif | ||
148 | struct device_node *root; | ||
149 | const char *model = "Unknown"; | ||
150 | |||
151 | root = of_find_node_by_path("/"); | ||
152 | if (root == NULL) | ||
153 | return; | ||
154 | |||
155 | model = of_get_property(root, "model", NULL); | ||
156 | |||
157 | printk(KERN_INFO "X-ES MPC85xx-based single-board computer: %s\n", | ||
158 | model + strlen("xes,")); | ||
159 | |||
160 | xes_mpc85xx_fixups(); | ||
161 | |||
162 | #ifdef CONFIG_PCI | ||
163 | for_each_node_by_type(np, "pci") { | ||
164 | if (of_device_is_compatible(np, "fsl,mpc8540-pci") || | ||
165 | of_device_is_compatible(np, "fsl,mpc8548-pcie")) { | ||
166 | struct resource rsrc; | ||
167 | of_address_to_resource(np, 0, &rsrc); | ||
168 | if ((rsrc.start & 0xfffff) == primary_phb_addr) | ||
169 | fsl_add_bridge(np, 1); | ||
170 | else | ||
171 | fsl_add_bridge(np, 0); | ||
172 | } | ||
173 | } | ||
174 | #endif | ||
175 | |||
176 | #ifdef CONFIG_SMP | ||
177 | mpc85xx_smp_init(); | ||
178 | #endif | ||
179 | } | ||
180 | |||
181 | static struct of_device_id __initdata xes_mpc85xx_ids[] = { | ||
182 | { .type = "soc", }, | ||
183 | { .compatible = "soc", }, | ||
184 | { .compatible = "simple-bus", }, | ||
185 | { .compatible = "gianfar", }, | ||
186 | {}, | ||
187 | }; | ||
188 | |||
189 | static int __init xes_mpc85xx_publish_devices(void) | ||
190 | { | ||
191 | return of_platform_bus_probe(NULL, xes_mpc85xx_ids, NULL); | ||
192 | } | ||
193 | machine_device_initcall(xes_mpc8572, xes_mpc85xx_publish_devices); | ||
194 | machine_device_initcall(xes_mpc8548, xes_mpc85xx_publish_devices); | ||
195 | machine_device_initcall(xes_mpc8540, xes_mpc85xx_publish_devices); | ||
196 | |||
197 | /* | ||
198 | * Called very early, device-tree isn't unflattened | ||
199 | */ | ||
200 | static int __init xes_mpc8572_probe(void) | ||
201 | { | ||
202 | unsigned long root = of_get_flat_dt_root(); | ||
203 | |||
204 | if (of_flat_dt_is_compatible(root, "xes,MPC8572")) { | ||
205 | #ifdef CONFIG_PCI | ||
206 | primary_phb_addr = 0x8000; | ||
207 | #endif | ||
208 | return 1; | ||
209 | } else { | ||
210 | return 0; | ||
211 | } | ||
212 | } | ||
213 | |||
214 | static int __init xes_mpc8548_probe(void) | ||
215 | { | ||
216 | unsigned long root = of_get_flat_dt_root(); | ||
217 | |||
218 | if (of_flat_dt_is_compatible(root, "xes,MPC8548")) { | ||
219 | #ifdef CONFIG_PCI | ||
220 | primary_phb_addr = 0xb000; | ||
221 | #endif | ||
222 | return 1; | ||
223 | } else { | ||
224 | return 0; | ||
225 | } | ||
226 | } | ||
227 | |||
228 | static int __init xes_mpc8540_probe(void) | ||
229 | { | ||
230 | unsigned long root = of_get_flat_dt_root(); | ||
231 | |||
232 | if (of_flat_dt_is_compatible(root, "xes,MPC8540")) { | ||
233 | #ifdef CONFIG_PCI | ||
234 | primary_phb_addr = 0xb000; | ||
235 | #endif | ||
236 | return 1; | ||
237 | } else { | ||
238 | return 0; | ||
239 | } | ||
240 | } | ||
241 | |||
242 | define_machine(xes_mpc8572) { | ||
243 | .name = "X-ES MPC8572", | ||
244 | .probe = xes_mpc8572_probe, | ||
245 | .setup_arch = xes_mpc85xx_setup_arch, | ||
246 | .init_IRQ = xes_mpc85xx_pic_init, | ||
247 | #ifdef CONFIG_PCI | ||
248 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, | ||
249 | #endif | ||
250 | .get_irq = mpic_get_irq, | ||
251 | .restart = fsl_rstcr_restart, | ||
252 | .calibrate_decr = generic_calibrate_decr, | ||
253 | .progress = udbg_progress, | ||
254 | }; | ||
255 | |||
256 | define_machine(xes_mpc8548) { | ||
257 | .name = "X-ES MPC8548", | ||
258 | .probe = xes_mpc8548_probe, | ||
259 | .setup_arch = xes_mpc85xx_setup_arch, | ||
260 | .init_IRQ = xes_mpc85xx_pic_init, | ||
261 | #ifdef CONFIG_PCI | ||
262 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, | ||
263 | #endif | ||
264 | .get_irq = mpic_get_irq, | ||
265 | .restart = fsl_rstcr_restart, | ||
266 | .calibrate_decr = generic_calibrate_decr, | ||
267 | .progress = udbg_progress, | ||
268 | }; | ||
269 | |||
270 | define_machine(xes_mpc8540) { | ||
271 | .name = "X-ES MPC8540", | ||
272 | .probe = xes_mpc8540_probe, | ||
273 | .setup_arch = xes_mpc85xx_setup_arch, | ||
274 | .init_IRQ = xes_mpc85xx_pic_init, | ||
275 | #ifdef CONFIG_PCI | ||
276 | .pcibios_fixup_bus = fsl_pcibios_fixup_bus, | ||
277 | #endif | ||
278 | .get_irq = mpic_get_irq, | ||
279 | .restart = fsl_rstcr_restart, | ||
280 | .calibrate_decr = generic_calibrate_decr, | ||
281 | .progress = udbg_progress, | ||
282 | }; | ||
diff --git a/arch/powerpc/platforms/86xx/Kconfig b/arch/powerpc/platforms/86xx/Kconfig index fdaf4ddaa955..9c7b64a3402b 100644 --- a/arch/powerpc/platforms/86xx/Kconfig +++ b/arch/powerpc/platforms/86xx/Kconfig | |||
@@ -15,6 +15,7 @@ config MPC8641_HPCN | |||
15 | select DEFAULT_UIMAGE | 15 | select DEFAULT_UIMAGE |
16 | select FSL_ULI1575 | 16 | select FSL_ULI1575 |
17 | select HAS_RAPIDIO | 17 | select HAS_RAPIDIO |
18 | select SWIOTLB | ||
18 | help | 19 | help |
19 | This option enables support for the MPC8641 HPCN board. | 20 | This option enables support for the MPC8641 HPCN board. |
20 | 21 | ||
diff --git a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c index 7e9e83c04a8a..66327024a6a6 100644 --- a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c +++ b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c | |||
@@ -19,6 +19,7 @@ | |||
19 | #include <linux/delay.h> | 19 | #include <linux/delay.h> |
20 | #include <linux/seq_file.h> | 20 | #include <linux/seq_file.h> |
21 | #include <linux/of_platform.h> | 21 | #include <linux/of_platform.h> |
22 | #include <linux/lmb.h> | ||
22 | 23 | ||
23 | #include <asm/system.h> | 24 | #include <asm/system.h> |
24 | #include <asm/time.h> | 25 | #include <asm/time.h> |
@@ -27,6 +28,7 @@ | |||
27 | #include <asm/prom.h> | 28 | #include <asm/prom.h> |
28 | #include <mm/mmu_decl.h> | 29 | #include <mm/mmu_decl.h> |
29 | #include <asm/udbg.h> | 30 | #include <asm/udbg.h> |
31 | #include <asm/swiotlb.h> | ||
30 | 32 | ||
31 | #include <asm/mpic.h> | 33 | #include <asm/mpic.h> |
32 | 34 | ||
@@ -70,7 +72,9 @@ mpc86xx_hpcn_setup_arch(void) | |||
70 | { | 72 | { |
71 | #ifdef CONFIG_PCI | 73 | #ifdef CONFIG_PCI |
72 | struct device_node *np; | 74 | struct device_node *np; |
75 | struct pci_controller *hose; | ||
73 | #endif | 76 | #endif |
77 | dma_addr_t max = 0xffffffff; | ||
74 | 78 | ||
75 | if (ppc_md.progress) | 79 | if (ppc_md.progress) |
76 | ppc_md.progress("mpc86xx_hpcn_setup_arch()", 0); | 80 | ppc_md.progress("mpc86xx_hpcn_setup_arch()", 0); |
@@ -83,6 +87,9 @@ mpc86xx_hpcn_setup_arch(void) | |||
83 | fsl_add_bridge(np, 1); | 87 | fsl_add_bridge(np, 1); |
84 | else | 88 | else |
85 | fsl_add_bridge(np, 0); | 89 | fsl_add_bridge(np, 0); |
90 | hose = pci_find_hose_for_OF_device(np); | ||
91 | max = min(max, hose->dma_window_base_cur + | ||
92 | hose->dma_window_size); | ||
86 | } | 93 | } |
87 | 94 | ||
88 | ppc_md.pci_exclude_device = mpc86xx_exclude_device; | 95 | ppc_md.pci_exclude_device = mpc86xx_exclude_device; |
@@ -94,6 +101,13 @@ mpc86xx_hpcn_setup_arch(void) | |||
94 | #ifdef CONFIG_SMP | 101 | #ifdef CONFIG_SMP |
95 | mpc86xx_smp_init(); | 102 | mpc86xx_smp_init(); |
96 | #endif | 103 | #endif |
104 | |||
105 | #ifdef CONFIG_SWIOTLB | ||
106 | if (lmb_end_of_DRAM() > max) { | ||
107 | ppc_swiotlb_enable = 1; | ||
108 | set_pci_dma_ops(&swiotlb_pci_dma_ops); | ||
109 | } | ||
110 | #endif | ||
97 | } | 111 | } |
98 | 112 | ||
99 | 113 | ||
@@ -158,6 +172,7 @@ static int __init declare_of_platform_devices(void) | |||
158 | return 0; | 172 | return 0; |
159 | } | 173 | } |
160 | machine_device_initcall(mpc86xx_hpcn, declare_of_platform_devices); | 174 | machine_device_initcall(mpc86xx_hpcn, declare_of_platform_devices); |
175 | machine_arch_initcall(mpc86xx_hpcn, swiotlb_setup_bus_notifier); | ||
161 | 176 | ||
162 | define_machine(mpc86xx_hpcn) { | 177 | define_machine(mpc86xx_hpcn) { |
163 | .name = "MPC86xx HPCN", | 178 | .name = "MPC86xx HPCN", |
diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype index cca6b4fc719a..c4192542b809 100644 --- a/arch/powerpc/platforms/Kconfig.cputype +++ b/arch/powerpc/platforms/Kconfig.cputype | |||
@@ -21,7 +21,7 @@ choice | |||
21 | 21 | ||
22 | If unsure, select 52xx/6xx/7xx/74xx/82xx/83xx/86xx. | 22 | If unsure, select 52xx/6xx/7xx/74xx/82xx/83xx/86xx. |
23 | 23 | ||
24 | config PPC_BOOK3S | 24 | config PPC_BOOK3S_32 |
25 | bool "512x/52xx/6xx/7xx/74xx/82xx/83xx/86xx" | 25 | bool "512x/52xx/6xx/7xx/74xx/82xx/83xx/86xx" |
26 | select PPC_FPU | 26 | select PPC_FPU |
27 | 27 | ||
@@ -57,11 +57,14 @@ config E200 | |||
57 | 57 | ||
58 | endchoice | 58 | endchoice |
59 | 59 | ||
60 | config PPC_BOOK3S | 60 | config PPC_BOOK3S_64 |
61 | default y | 61 | def_bool y |
62 | depends on PPC64 | 62 | depends on PPC64 |
63 | select PPC_FPU | 63 | select PPC_FPU |
64 | 64 | ||
65 | config PPC_BOOK3S | ||
66 | def_bool y | ||
67 | depends on PPC_BOOK3S_32 || PPC_BOOK3S_64 | ||
65 | 68 | ||
66 | config POWER4_ONLY | 69 | config POWER4_ONLY |
67 | bool "Optimize for POWER4" | 70 | bool "Optimize for POWER4" |
diff --git a/arch/powerpc/platforms/Makefile b/arch/powerpc/platforms/Makefile index f7419198e635..a6812ee00100 100644 --- a/arch/powerpc/platforms/Makefile +++ b/arch/powerpc/platforms/Makefile | |||
@@ -1,4 +1,6 @@ | |||
1 | 1 | ||
2 | subdir-ccflags-$(CONFIG_PPC_WERROR) := -Werror | ||
3 | |||
2 | obj-$(CONFIG_FSL_ULI1575) += fsl_uli1575.o | 4 | obj-$(CONFIG_FSL_ULI1575) += fsl_uli1575.o |
3 | 5 | ||
4 | obj-$(CONFIG_PPC_PMAC) += powermac/ | 6 | obj-$(CONFIG_PPC_PMAC) += powermac/ |
diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile index 2d1c87dd5d14..9d4b17462f13 100644 --- a/arch/powerpc/sysdev/Makefile +++ b/arch/powerpc/sysdev/Makefile | |||
@@ -1,3 +1,5 @@ | |||
1 | subdir-ccflags-$(CONFIG_PPC_WERROR) := -Werror | ||
2 | |||
1 | ifeq ($(CONFIG_PPC64),y) | 3 | ifeq ($(CONFIG_PPC64),y) |
2 | EXTRA_CFLAGS += -mno-minimal-toc | 4 | EXTRA_CFLAGS += -mno-minimal-toc |
3 | endif | 5 | endif |
@@ -48,6 +50,9 @@ obj-$(CONFIG_PPC_DCR) += dcr.o | |||
48 | obj-$(CONFIG_8xx) += mpc8xx_pic.o cpm1.o | 50 | obj-$(CONFIG_8xx) += mpc8xx_pic.o cpm1.o |
49 | obj-$(CONFIG_UCODE_PATCH) += micropatch.o | 51 | obj-$(CONFIG_UCODE_PATCH) += micropatch.o |
50 | 52 | ||
53 | obj-$(CONFIG_PPC_MPC512x) += mpc5xxx_clocks.o | ||
54 | obj-$(CONFIG_PPC_MPC52xx) += mpc5xxx_clocks.o | ||
55 | |||
51 | ifeq ($(CONFIG_SUSPEND),y) | 56 | ifeq ($(CONFIG_SUSPEND),y) |
52 | obj-$(CONFIG_6xx) += 6xx-suspend.o | 57 | obj-$(CONFIG_6xx) += 6xx-suspend.o |
53 | endif | 58 | endif |
diff --git a/arch/powerpc/sysdev/mpc5xxx_clocks.c b/arch/powerpc/sysdev/mpc5xxx_clocks.c new file mode 100644 index 000000000000..34e12f9995fe --- /dev/null +++ b/arch/powerpc/sysdev/mpc5xxx_clocks.c | |||
@@ -0,0 +1,33 @@ | |||
1 | /** | ||
2 | * mpc5xxx_get_bus_frequency - Find the bus frequency for a device | ||
3 | * @node: device node | ||
4 | * | ||
5 | * Returns bus frequency (IPS on MPC512x, IPB on MPC52xx), | ||
6 | * or 0 if the bus frequency cannot be found. | ||
7 | */ | ||
8 | |||
9 | #include <linux/kernel.h> | ||
10 | #include <linux/of_platform.h> | ||
11 | |||
12 | unsigned int | ||
13 | mpc5xxx_get_bus_frequency(struct device_node *node) | ||
14 | { | ||
15 | struct device_node *np; | ||
16 | const unsigned int *p_bus_freq = NULL; | ||
17 | |||
18 | of_node_get(node); | ||
19 | while (node) { | ||
20 | p_bus_freq = of_get_property(node, "bus-frequency", NULL); | ||
21 | if (p_bus_freq) | ||
22 | break; | ||
23 | |||
24 | np = of_get_parent(node); | ||
25 | of_node_put(node); | ||
26 | node = np; | ||
27 | } | ||
28 | if (node) | ||
29 | of_node_put(node); | ||
30 | |||
31 | return p_bus_freq ? *p_bus_freq : 0; | ||
32 | } | ||
33 | EXPORT_SYMBOL(mpc5xxx_get_bus_frequency); | ||
diff --git a/arch/powerpc/xmon/Makefile b/arch/powerpc/xmon/Makefile index 9cb03b71b9d6..85ab97ab840a 100644 --- a/arch/powerpc/xmon/Makefile +++ b/arch/powerpc/xmon/Makefile | |||
@@ -1,5 +1,7 @@ | |||
1 | # Makefile for xmon | 1 | # Makefile for xmon |
2 | 2 | ||
3 | subdir-ccflags-$(CONFIG_PPC_WERROR) := -Werror | ||
4 | |||
3 | ifdef CONFIG_PPC64 | 5 | ifdef CONFIG_PPC64 |
4 | EXTRA_CFLAGS += -mno-minimal-toc | 6 | EXTRA_CFLAGS += -mno-minimal-toc |
5 | endif | 7 | endif |
diff --git a/drivers/ata/pata_mpc52xx.c b/drivers/ata/pata_mpc52xx.c index 68d27bc70d06..2bc2dbe30e8f 100644 --- a/drivers/ata/pata_mpc52xx.c +++ b/drivers/ata/pata_mpc52xx.c | |||
@@ -694,7 +694,7 @@ mpc52xx_ata_probe(struct of_device *op, const struct of_device_id *match) | |||
694 | struct bcom_task *dmatsk = NULL; | 694 | struct bcom_task *dmatsk = NULL; |
695 | 695 | ||
696 | /* Get ipb frequency */ | 696 | /* Get ipb frequency */ |
697 | ipb_freq = mpc52xx_find_ipb_freq(op->node); | 697 | ipb_freq = mpc5xxx_get_bus_frequency(op->node); |
698 | if (!ipb_freq) { | 698 | if (!ipb_freq) { |
699 | dev_err(&op->dev, "could not determine IPB bus frequency\n"); | 699 | dev_err(&op->dev, "could not determine IPB bus frequency\n"); |
700 | return -ENODEV; | 700 | return -ENODEV; |
diff --git a/drivers/char/hvc_iseries.c b/drivers/char/hvc_iseries.c index 449727b6166d..936d05bf37fa 100644 --- a/drivers/char/hvc_iseries.c +++ b/drivers/char/hvc_iseries.c | |||
@@ -241,7 +241,7 @@ static int __devexit hvc_vio_remove(struct vio_dev *vdev) | |||
241 | static struct vio_driver hvc_vio_driver = { | 241 | static struct vio_driver hvc_vio_driver = { |
242 | .id_table = hvc_driver_table, | 242 | .id_table = hvc_driver_table, |
243 | .probe = hvc_vio_probe, | 243 | .probe = hvc_vio_probe, |
244 | .remove = hvc_vio_remove, | 244 | .remove = __devexit_p(hvc_vio_remove), |
245 | .driver = { | 245 | .driver = { |
246 | .name = hvc_driver_name, | 246 | .name = hvc_driver_name, |
247 | .owner = THIS_MODULE, | 247 | .owner = THIS_MODULE, |
diff --git a/drivers/char/hvc_vio.c b/drivers/char/hvc_vio.c index bd62dc86b47d..c72b994652ac 100644 --- a/drivers/char/hvc_vio.c +++ b/drivers/char/hvc_vio.c | |||
@@ -113,7 +113,7 @@ static int __devexit hvc_vio_remove(struct vio_dev *vdev) | |||
113 | static struct vio_driver hvc_vio_driver = { | 113 | static struct vio_driver hvc_vio_driver = { |
114 | .id_table = hvc_driver_table, | 114 | .id_table = hvc_driver_table, |
115 | .probe = hvc_vio_probe, | 115 | .probe = hvc_vio_probe, |
116 | .remove = hvc_vio_remove, | 116 | .remove = __devexit_p(hvc_vio_remove), |
117 | .driver = { | 117 | .driver = { |
118 | .name = hvc_driver_name, | 118 | .name = hvc_driver_name, |
119 | .owner = THIS_MODULE, | 119 | .owner = THIS_MODULE, |
diff --git a/drivers/char/hvcs.c b/drivers/char/hvcs.c index 7d64e4230e66..266b858b8f85 100644 --- a/drivers/char/hvcs.c +++ b/drivers/char/hvcs.c | |||
@@ -868,7 +868,7 @@ static int __devexit hvcs_remove(struct vio_dev *dev) | |||
868 | static struct vio_driver hvcs_vio_driver = { | 868 | static struct vio_driver hvcs_vio_driver = { |
869 | .id_table = hvcs_driver_table, | 869 | .id_table = hvcs_driver_table, |
870 | .probe = hvcs_probe, | 870 | .probe = hvcs_probe, |
871 | .remove = hvcs_remove, | 871 | .remove = __devexit_p(hvcs_remove), |
872 | .driver = { | 872 | .driver = { |
873 | .name = hvcs_driver_name, | 873 | .name = hvcs_driver_name, |
874 | .owner = THIS_MODULE, | 874 | .owner = THIS_MODULE, |
diff --git a/drivers/i2c/busses/i2c-mpc.c b/drivers/i2c/busses/i2c-mpc.c index dd778d7ae047..d325e86e3103 100644 --- a/drivers/i2c/busses/i2c-mpc.c +++ b/drivers/i2c/busses/i2c-mpc.c | |||
@@ -197,7 +197,7 @@ int mpc_i2c_get_fdr_52xx(struct device_node *node, u32 clock, int prescaler) | |||
197 | return -EINVAL; | 197 | return -EINVAL; |
198 | 198 | ||
199 | /* Determine divider value */ | 199 | /* Determine divider value */ |
200 | divider = mpc52xx_find_ipb_freq(node) / clock; | 200 | divider = mpc5xxx_get_bus_frequency(node) / clock; |
201 | 201 | ||
202 | /* | 202 | /* |
203 | * We want to choose an FDR/DFSR that generates an I2C bus speed that | 203 | * We want to choose an FDR/DFSR that generates an I2C bus speed that |
diff --git a/drivers/net/fec_mpc52xx.c b/drivers/net/fec_mpc52xx.c index 7d443405bbe2..cc786333d95c 100644 --- a/drivers/net/fec_mpc52xx.c +++ b/drivers/net/fec_mpc52xx.c | |||
@@ -948,7 +948,7 @@ mpc52xx_fec_probe(struct of_device *op, const struct of_device_id *match) | |||
948 | /* Start with safe defaults for link connection */ | 948 | /* Start with safe defaults for link connection */ |
949 | priv->speed = 100; | 949 | priv->speed = 100; |
950 | priv->duplex = DUPLEX_HALF; | 950 | priv->duplex = DUPLEX_HALF; |
951 | priv->mdio_speed = ((mpc52xx_find_ipb_freq(op->node) >> 20) / 5) << 1; | 951 | priv->mdio_speed = ((mpc5xxx_get_bus_frequency(op->node) >> 20) / 5) << 1; |
952 | 952 | ||
953 | /* The current speed preconfigures the speed of the MII link */ | 953 | /* The current speed preconfigures the speed of the MII link */ |
954 | prop = of_get_property(op->node, "current-speed", &prop_size); | 954 | prop = of_get_property(op->node, "current-speed", &prop_size); |
diff --git a/drivers/net/fec_mpc52xx_phy.c b/drivers/net/fec_mpc52xx_phy.c index fec9f245116b..31e6d62b785d 100644 --- a/drivers/net/fec_mpc52xx_phy.c +++ b/drivers/net/fec_mpc52xx_phy.c | |||
@@ -106,7 +106,7 @@ static int mpc52xx_fec_mdio_probe(struct of_device *of, | |||
106 | 106 | ||
107 | /* set MII speed */ | 107 | /* set MII speed */ |
108 | out_be32(&priv->regs->mii_speed, | 108 | out_be32(&priv->regs->mii_speed, |
109 | ((mpc52xx_find_ipb_freq(of->node) >> 20) / 5) << 1); | 109 | ((mpc5xxx_get_bus_frequency(of->node) >> 20) / 5) << 1); |
110 | 110 | ||
111 | err = of_mdiobus_register(bus, np); | 111 | err = of_mdiobus_register(bus, np); |
112 | if (err) | 112 | if (err) |
diff --git a/drivers/net/ps3_gelic_net.c b/drivers/net/ps3_gelic_net.c index 2b38f39924a6..d1a5fb4d6acb 100644 --- a/drivers/net/ps3_gelic_net.c +++ b/drivers/net/ps3_gelic_net.c | |||
@@ -214,9 +214,10 @@ static void gelic_card_free_chain(struct gelic_card *card, | |||
214 | * | 214 | * |
215 | * returns 0 on success, <0 on failure | 215 | * returns 0 on success, <0 on failure |
216 | */ | 216 | */ |
217 | static int gelic_card_init_chain(struct gelic_card *card, | 217 | static int __devinit gelic_card_init_chain(struct gelic_card *card, |
218 | struct gelic_descr_chain *chain, | 218 | struct gelic_descr_chain *chain, |
219 | struct gelic_descr *start_descr, int no) | 219 | struct gelic_descr *start_descr, |
220 | int no) | ||
220 | { | 221 | { |
221 | int i; | 222 | int i; |
222 | struct gelic_descr *descr; | 223 | struct gelic_descr *descr; |
@@ -407,7 +408,7 @@ rewind: | |||
407 | * | 408 | * |
408 | * returns 0 on success, < 0 on failure | 409 | * returns 0 on success, < 0 on failure |
409 | */ | 410 | */ |
410 | static int gelic_card_alloc_rx_skbs(struct gelic_card *card) | 411 | static int __devinit gelic_card_alloc_rx_skbs(struct gelic_card *card) |
411 | { | 412 | { |
412 | struct gelic_descr_chain *chain; | 413 | struct gelic_descr_chain *chain; |
413 | int ret; | 414 | int ret; |
@@ -1422,8 +1423,8 @@ static const struct net_device_ops gelic_netdevice_ops = { | |||
1422 | * | 1423 | * |
1423 | * fills out function pointers in the net_device structure | 1424 | * fills out function pointers in the net_device structure |
1424 | */ | 1425 | */ |
1425 | static void gelic_ether_setup_netdev_ops(struct net_device *netdev, | 1426 | static void __devinit gelic_ether_setup_netdev_ops(struct net_device *netdev, |
1426 | struct napi_struct *napi) | 1427 | struct napi_struct *napi) |
1427 | { | 1428 | { |
1428 | netdev->watchdog_timeo = GELIC_NET_WATCHDOG_TIMEOUT; | 1429 | netdev->watchdog_timeo = GELIC_NET_WATCHDOG_TIMEOUT; |
1429 | /* NAPI */ | 1430 | /* NAPI */ |
@@ -1443,7 +1444,8 @@ static void gelic_ether_setup_netdev_ops(struct net_device *netdev, | |||
1443 | * gelic_ether_setup_netdev initializes the net_device structure | 1444 | * gelic_ether_setup_netdev initializes the net_device structure |
1444 | * and register it. | 1445 | * and register it. |
1445 | **/ | 1446 | **/ |
1446 | int gelic_net_setup_netdev(struct net_device *netdev, struct gelic_card *card) | 1447 | int __devinit gelic_net_setup_netdev(struct net_device *netdev, |
1448 | struct gelic_card *card) | ||
1447 | { | 1449 | { |
1448 | int status; | 1450 | int status; |
1449 | u64 v1, v2; | 1451 | u64 v1, v2; |
@@ -1491,7 +1493,7 @@ int gelic_net_setup_netdev(struct net_device *netdev, struct gelic_card *card) | |||
1491 | * the card and net_device structures are linked to each other | 1493 | * the card and net_device structures are linked to each other |
1492 | */ | 1494 | */ |
1493 | #define GELIC_ALIGN (32) | 1495 | #define GELIC_ALIGN (32) |
1494 | static struct gelic_card *gelic_alloc_card_net(struct net_device **netdev) | 1496 | static struct gelic_card * __devinit gelic_alloc_card_net(struct net_device **netdev) |
1495 | { | 1497 | { |
1496 | struct gelic_card *card; | 1498 | struct gelic_card *card; |
1497 | struct gelic_port *port; | 1499 | struct gelic_port *port; |
@@ -1542,7 +1544,7 @@ static struct gelic_card *gelic_alloc_card_net(struct net_device **netdev) | |||
1542 | return card; | 1544 | return card; |
1543 | } | 1545 | } |
1544 | 1546 | ||
1545 | static void gelic_card_get_vlan_info(struct gelic_card *card) | 1547 | static void __devinit gelic_card_get_vlan_info(struct gelic_card *card) |
1546 | { | 1548 | { |
1547 | u64 v1, v2; | 1549 | u64 v1, v2; |
1548 | int status; | 1550 | int status; |
@@ -1616,7 +1618,7 @@ static void gelic_card_get_vlan_info(struct gelic_card *card) | |||
1616 | /** | 1618 | /** |
1617 | * ps3_gelic_driver_probe - add a device to the control of this driver | 1619 | * ps3_gelic_driver_probe - add a device to the control of this driver |
1618 | */ | 1620 | */ |
1619 | static int ps3_gelic_driver_probe(struct ps3_system_bus_device *dev) | 1621 | static int __devinit ps3_gelic_driver_probe(struct ps3_system_bus_device *dev) |
1620 | { | 1622 | { |
1621 | struct gelic_card *card; | 1623 | struct gelic_card *card; |
1622 | struct net_device *netdev; | 1624 | struct net_device *netdev; |
diff --git a/drivers/net/ps3_gelic_wireless.c b/drivers/net/ps3_gelic_wireless.c index 4f3ada622f9b..b6b3ca9bdb21 100644 --- a/drivers/net/ps3_gelic_wireless.c +++ b/drivers/net/ps3_gelic_wireless.c | |||
@@ -2442,7 +2442,7 @@ static const struct iw_handler_def gelic_wl_wext_handler_def = { | |||
2442 | #endif | 2442 | #endif |
2443 | }; | 2443 | }; |
2444 | 2444 | ||
2445 | static struct net_device *gelic_wl_alloc(struct gelic_card *card) | 2445 | static struct net_device * __devinit gelic_wl_alloc(struct gelic_card *card) |
2446 | { | 2446 | { |
2447 | struct net_device *netdev; | 2447 | struct net_device *netdev; |
2448 | struct gelic_port *port; | 2448 | struct gelic_port *port; |
@@ -2722,7 +2722,7 @@ static struct ethtool_ops gelic_wl_ethtool_ops = { | |||
2722 | .set_rx_csum = gelic_net_set_rx_csum, | 2722 | .set_rx_csum = gelic_net_set_rx_csum, |
2723 | }; | 2723 | }; |
2724 | 2724 | ||
2725 | static void gelic_wl_setup_netdev_ops(struct net_device *netdev) | 2725 | static void __devinit gelic_wl_setup_netdev_ops(struct net_device *netdev) |
2726 | { | 2726 | { |
2727 | struct gelic_wl_info *wl; | 2727 | struct gelic_wl_info *wl; |
2728 | wl = port_wl(netdev_priv(netdev)); | 2728 | wl = port_wl(netdev_priv(netdev)); |
@@ -2738,7 +2738,7 @@ static void gelic_wl_setup_netdev_ops(struct net_device *netdev) | |||
2738 | /* | 2738 | /* |
2739 | * driver probe/remove | 2739 | * driver probe/remove |
2740 | */ | 2740 | */ |
2741 | int gelic_wl_driver_probe(struct gelic_card *card) | 2741 | int __devinit gelic_wl_driver_probe(struct gelic_card *card) |
2742 | { | 2742 | { |
2743 | int ret; | 2743 | int ret; |
2744 | struct net_device *netdev; | 2744 | struct net_device *netdev; |
diff --git a/drivers/rapidio/rio-scan.c b/drivers/rapidio/rio-scan.c index 3b78540288c7..45415096c294 100644 --- a/drivers/rapidio/rio-scan.c +++ b/drivers/rapidio/rio-scan.c | |||
@@ -263,15 +263,21 @@ static void rio_route_set_ops(struct rio_dev *rdev) | |||
263 | * device to the RIO device list. Creates the generic sysfs nodes | 263 | * device to the RIO device list. Creates the generic sysfs nodes |
264 | * for an RIO device. | 264 | * for an RIO device. |
265 | */ | 265 | */ |
266 | static void __devinit rio_add_device(struct rio_dev *rdev) | 266 | static int __devinit rio_add_device(struct rio_dev *rdev) |
267 | { | 267 | { |
268 | device_add(&rdev->dev); | 268 | int err; |
269 | |||
270 | err = device_add(&rdev->dev); | ||
271 | if (err) | ||
272 | return err; | ||
269 | 273 | ||
270 | spin_lock(&rio_global_list_lock); | 274 | spin_lock(&rio_global_list_lock); |
271 | list_add_tail(&rdev->global_list, &rio_devices); | 275 | list_add_tail(&rdev->global_list, &rio_devices); |
272 | spin_unlock(&rio_global_list_lock); | 276 | spin_unlock(&rio_global_list_lock); |
273 | 277 | ||
274 | rio_create_sysfs_dev_files(rdev); | 278 | rio_create_sysfs_dev_files(rdev); |
279 | |||
280 | return 0; | ||
275 | } | 281 | } |
276 | 282 | ||
277 | /** | 283 | /** |
@@ -294,13 +300,14 @@ static struct rio_dev __devinit *rio_setup_device(struct rio_net *net, | |||
294 | struct rio_mport *port, u16 destid, | 300 | struct rio_mport *port, u16 destid, |
295 | u8 hopcount, int do_enum) | 301 | u8 hopcount, int do_enum) |
296 | { | 302 | { |
303 | int ret = 0; | ||
297 | struct rio_dev *rdev; | 304 | struct rio_dev *rdev; |
298 | struct rio_switch *rswitch; | 305 | struct rio_switch *rswitch = NULL; |
299 | int result, rdid; | 306 | int result, rdid; |
300 | 307 | ||
301 | rdev = kzalloc(sizeof(struct rio_dev), GFP_KERNEL); | 308 | rdev = kzalloc(sizeof(struct rio_dev), GFP_KERNEL); |
302 | if (!rdev) | 309 | if (!rdev) |
303 | goto out; | 310 | return NULL; |
304 | 311 | ||
305 | rdev->net = net; | 312 | rdev->net = net; |
306 | rio_mport_read_config_32(port, destid, hopcount, RIO_DEV_ID_CAR, | 313 | rio_mport_read_config_32(port, destid, hopcount, RIO_DEV_ID_CAR, |
@@ -343,23 +350,16 @@ static struct rio_dev __devinit *rio_setup_device(struct rio_net *net, | |||
343 | rio_mport_read_config_32(port, destid, hopcount, | 350 | rio_mport_read_config_32(port, destid, hopcount, |
344 | RIO_SWP_INFO_CAR, &rdev->swpinfo); | 351 | RIO_SWP_INFO_CAR, &rdev->swpinfo); |
345 | rswitch = kmalloc(sizeof(struct rio_switch), GFP_KERNEL); | 352 | rswitch = kmalloc(sizeof(struct rio_switch), GFP_KERNEL); |
346 | if (!rswitch) { | 353 | if (!rswitch) |
347 | kfree(rdev); | 354 | goto cleanup; |
348 | rdev = NULL; | ||
349 | goto out; | ||
350 | } | ||
351 | rswitch->switchid = next_switchid; | 355 | rswitch->switchid = next_switchid; |
352 | rswitch->hopcount = hopcount; | 356 | rswitch->hopcount = hopcount; |
353 | rswitch->destid = destid; | 357 | rswitch->destid = destid; |
354 | rswitch->route_table = kzalloc(sizeof(u8)* | 358 | rswitch->route_table = kzalloc(sizeof(u8)* |
355 | RIO_MAX_ROUTE_ENTRIES(port->sys_size), | 359 | RIO_MAX_ROUTE_ENTRIES(port->sys_size), |
356 | GFP_KERNEL); | 360 | GFP_KERNEL); |
357 | if (!rswitch->route_table) { | 361 | if (!rswitch->route_table) |
358 | kfree(rdev); | 362 | goto cleanup; |
359 | rdev = NULL; | ||
360 | kfree(rswitch); | ||
361 | goto out; | ||
362 | } | ||
363 | /* Initialize switch route table */ | 363 | /* Initialize switch route table */ |
364 | for (rdid = 0; rdid < RIO_MAX_ROUTE_ENTRIES(port->sys_size); | 364 | for (rdid = 0; rdid < RIO_MAX_ROUTE_ENTRIES(port->sys_size); |
365 | rdid++) | 365 | rdid++) |
@@ -390,10 +390,19 @@ static struct rio_dev __devinit *rio_setup_device(struct rio_net *net, | |||
390 | rio_init_dbell_res(&rdev->riores[RIO_DOORBELL_RESOURCE], | 390 | rio_init_dbell_res(&rdev->riores[RIO_DOORBELL_RESOURCE], |
391 | 0, 0xffff); | 391 | 0, 0xffff); |
392 | 392 | ||
393 | rio_add_device(rdev); | 393 | ret = rio_add_device(rdev); |
394 | if (ret) | ||
395 | goto cleanup; | ||
394 | 396 | ||
395 | out: | ||
396 | return rdev; | 397 | return rdev; |
398 | |||
399 | cleanup: | ||
400 | if (rswitch) { | ||
401 | kfree(rswitch->route_table); | ||
402 | kfree(rswitch); | ||
403 | } | ||
404 | kfree(rdev); | ||
405 | return NULL; | ||
397 | } | 406 | } |
398 | 407 | ||
399 | /** | 408 | /** |
diff --git a/drivers/rapidio/rio-sysfs.c b/drivers/rapidio/rio-sysfs.c index 97a147f050d6..ba742e82c57d 100644 --- a/drivers/rapidio/rio-sysfs.c +++ b/drivers/rapidio/rio-sysfs.c | |||
@@ -214,9 +214,11 @@ static struct bin_attribute rio_config_attr = { | |||
214 | */ | 214 | */ |
215 | int rio_create_sysfs_dev_files(struct rio_dev *rdev) | 215 | int rio_create_sysfs_dev_files(struct rio_dev *rdev) |
216 | { | 216 | { |
217 | sysfs_create_bin_file(&rdev->dev.kobj, &rio_config_attr); | 217 | int err = 0; |
218 | 218 | ||
219 | return 0; | 219 | err = sysfs_create_bin_file(&rdev->dev.kobj, &rio_config_attr); |
220 | |||
221 | return err; | ||
220 | } | 222 | } |
221 | 223 | ||
222 | /** | 224 | /** |
diff --git a/drivers/scsi/ps3rom.c b/drivers/scsi/ps3rom.c index ca0dd33497ec..db90caf43f42 100644 --- a/drivers/scsi/ps3rom.c +++ b/drivers/scsi/ps3rom.c | |||
@@ -299,7 +299,7 @@ static irqreturn_t ps3rom_interrupt(int irq, void *data) | |||
299 | return IRQ_HANDLED; | 299 | return IRQ_HANDLED; |
300 | } | 300 | } |
301 | 301 | ||
302 | host = dev->sbd.core.driver_data; | 302 | host = ps3_system_bus_get_drvdata(&dev->sbd); |
303 | priv = shost_priv(host); | 303 | priv = shost_priv(host); |
304 | cmd = priv->curr_cmd; | 304 | cmd = priv->curr_cmd; |
305 | 305 | ||
@@ -387,7 +387,7 @@ static int __devinit ps3rom_probe(struct ps3_system_bus_device *_dev) | |||
387 | } | 387 | } |
388 | 388 | ||
389 | priv = shost_priv(host); | 389 | priv = shost_priv(host); |
390 | dev->sbd.core.driver_data = host; | 390 | ps3_system_bus_set_drvdata(&dev->sbd, host); |
391 | priv->dev = dev; | 391 | priv->dev = dev; |
392 | 392 | ||
393 | /* One device/LUN per SCSI bus */ | 393 | /* One device/LUN per SCSI bus */ |
@@ -407,7 +407,7 @@ static int __devinit ps3rom_probe(struct ps3_system_bus_device *_dev) | |||
407 | 407 | ||
408 | fail_host_put: | 408 | fail_host_put: |
409 | scsi_host_put(host); | 409 | scsi_host_put(host); |
410 | dev->sbd.core.driver_data = NULL; | 410 | ps3_system_bus_set_drvdata(&dev->sbd, NULL); |
411 | fail_teardown: | 411 | fail_teardown: |
412 | ps3stor_teardown(dev); | 412 | ps3stor_teardown(dev); |
413 | fail_free_bounce: | 413 | fail_free_bounce: |
@@ -418,12 +418,12 @@ fail_free_bounce: | |||
418 | static int ps3rom_remove(struct ps3_system_bus_device *_dev) | 418 | static int ps3rom_remove(struct ps3_system_bus_device *_dev) |
419 | { | 419 | { |
420 | struct ps3_storage_device *dev = to_ps3_storage_device(&_dev->core); | 420 | struct ps3_storage_device *dev = to_ps3_storage_device(&_dev->core); |
421 | struct Scsi_Host *host = dev->sbd.core.driver_data; | 421 | struct Scsi_Host *host = ps3_system_bus_get_drvdata(&dev->sbd); |
422 | 422 | ||
423 | scsi_remove_host(host); | 423 | scsi_remove_host(host); |
424 | ps3stor_teardown(dev); | 424 | ps3stor_teardown(dev); |
425 | scsi_host_put(host); | 425 | scsi_host_put(host); |
426 | dev->sbd.core.driver_data = NULL; | 426 | ps3_system_bus_set_drvdata(&dev->sbd, NULL); |
427 | kfree(dev->bounce_buf); | 427 | kfree(dev->bounce_buf); |
428 | return 0; | 428 | return 0; |
429 | } | 429 | } |
diff --git a/drivers/serial/mpc52xx_uart.c b/drivers/serial/mpc52xx_uart.c index b3feb6198d57..abbd146c50d9 100644 --- a/drivers/serial/mpc52xx_uart.c +++ b/drivers/serial/mpc52xx_uart.c | |||
@@ -76,7 +76,6 @@ | |||
76 | #include <linux/of_platform.h> | 76 | #include <linux/of_platform.h> |
77 | 77 | ||
78 | #include <asm/mpc52xx.h> | 78 | #include <asm/mpc52xx.h> |
79 | #include <asm/mpc512x.h> | ||
80 | #include <asm/mpc52xx_psc.h> | 79 | #include <asm/mpc52xx_psc.h> |
81 | 80 | ||
82 | #if defined(CONFIG_SERIAL_MPC52xx_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) | 81 | #if defined(CONFIG_SERIAL_MPC52xx_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) |
@@ -254,7 +253,7 @@ static unsigned long mpc52xx_getuartclk(void *p) | |||
254 | * but the generic serial code assumes 16 | 253 | * but the generic serial code assumes 16 |
255 | * so return ipb freq / 2 | 254 | * so return ipb freq / 2 |
256 | */ | 255 | */ |
257 | return mpc52xx_find_ipb_freq(p) / 2; | 256 | return mpc5xxx_get_bus_frequency(p) / 2; |
258 | } | 257 | } |
259 | 258 | ||
260 | static struct psc_ops mpc52xx_psc_ops = { | 259 | static struct psc_ops mpc52xx_psc_ops = { |
@@ -391,7 +390,7 @@ static void mpc512x_psc_cw_restore_ints(struct uart_port *port) | |||
391 | 390 | ||
392 | static unsigned long mpc512x_getuartclk(void *p) | 391 | static unsigned long mpc512x_getuartclk(void *p) |
393 | { | 392 | { |
394 | return mpc512x_find_ips_freq(p); | 393 | return mpc5xxx_get_bus_frequency(p); |
395 | } | 394 | } |
396 | 395 | ||
397 | static struct psc_ops mpc512x_psc_ops = { | 396 | static struct psc_ops mpc512x_psc_ops = { |
diff --git a/drivers/serial/of_serial.c b/drivers/serial/of_serial.c index 54483cd3529e..02406ba6da1c 100644 --- a/drivers/serial/of_serial.c +++ b/drivers/serial/of_serial.c | |||
@@ -67,7 +67,7 @@ static int __devinit of_platform_serial_setup(struct of_device *ofdev, | |||
67 | port->type = type; | 67 | port->type = type; |
68 | port->uartclk = *clk; | 68 | port->uartclk = *clk; |
69 | port->flags = UPF_SHARE_IRQ | UPF_BOOT_AUTOCONF | UPF_IOREMAP | 69 | port->flags = UPF_SHARE_IRQ | UPF_BOOT_AUTOCONF | UPF_IOREMAP |
70 | | UPF_FIXED_PORT; | 70 | | UPF_FIXED_PORT | UPF_FIXED_TYPE; |
71 | port->dev = &ofdev->dev; | 71 | port->dev = &ofdev->dev; |
72 | /* If current-speed was set, then try not to change it. */ | 72 | /* If current-speed was set, then try not to change it. */ |
73 | if (spd) | 73 | if (spd) |
diff --git a/drivers/serial/ucc_uart.c b/drivers/serial/ucc_uart.c index 7de66c06b05d..e945e780b5c9 100644 --- a/drivers/serial/ucc_uart.c +++ b/drivers/serial/ucc_uart.c | |||
@@ -681,22 +681,27 @@ static void qe_uart_init_ucc(struct uart_qe_port *qe_port) | |||
681 | out_be16(&uccup->rccm, 0xc0ff); | 681 | out_be16(&uccup->rccm, 0xc0ff); |
682 | 682 | ||
683 | /* Configure the GUMR registers for UART */ | 683 | /* Configure the GUMR registers for UART */ |
684 | if (soft_uart) | 684 | if (soft_uart) { |
685 | /* Soft-UART requires a 1X multiplier for TX */ | 685 | /* Soft-UART requires a 1X multiplier for TX */ |
686 | clrsetbits_be32(&uccp->gumr_l, | 686 | clrsetbits_be32(&uccp->gumr_l, |
687 | UCC_SLOW_GUMR_L_MODE_MASK | UCC_SLOW_GUMR_L_TDCR_MASK | | 687 | UCC_SLOW_GUMR_L_MODE_MASK | UCC_SLOW_GUMR_L_TDCR_MASK | |
688 | UCC_SLOW_GUMR_L_RDCR_MASK, | 688 | UCC_SLOW_GUMR_L_RDCR_MASK, |
689 | UCC_SLOW_GUMR_L_MODE_UART | UCC_SLOW_GUMR_L_TDCR_1 | | 689 | UCC_SLOW_GUMR_L_MODE_UART | UCC_SLOW_GUMR_L_TDCR_1 | |
690 | UCC_SLOW_GUMR_L_RDCR_16); | 690 | UCC_SLOW_GUMR_L_RDCR_16); |
691 | else | 691 | |
692 | clrsetbits_be32(&uccp->gumr_h, UCC_SLOW_GUMR_H_RFW, | ||
693 | UCC_SLOW_GUMR_H_TRX | UCC_SLOW_GUMR_H_TTX); | ||
694 | } else { | ||
692 | clrsetbits_be32(&uccp->gumr_l, | 695 | clrsetbits_be32(&uccp->gumr_l, |
693 | UCC_SLOW_GUMR_L_MODE_MASK | UCC_SLOW_GUMR_L_TDCR_MASK | | 696 | UCC_SLOW_GUMR_L_MODE_MASK | UCC_SLOW_GUMR_L_TDCR_MASK | |
694 | UCC_SLOW_GUMR_L_RDCR_MASK, | 697 | UCC_SLOW_GUMR_L_RDCR_MASK, |
695 | UCC_SLOW_GUMR_L_MODE_UART | UCC_SLOW_GUMR_L_TDCR_16 | | 698 | UCC_SLOW_GUMR_L_MODE_UART | UCC_SLOW_GUMR_L_TDCR_16 | |
696 | UCC_SLOW_GUMR_L_RDCR_16); | 699 | UCC_SLOW_GUMR_L_RDCR_16); |
697 | 700 | ||
698 | clrsetbits_be32(&uccp->gumr_h, UCC_SLOW_GUMR_H_RFW, | 701 | clrsetbits_be32(&uccp->gumr_h, |
699 | UCC_SLOW_GUMR_H_TRX | UCC_SLOW_GUMR_H_TTX); | 702 | UCC_SLOW_GUMR_H_TRX | UCC_SLOW_GUMR_H_TTX, |
703 | UCC_SLOW_GUMR_H_RFW); | ||
704 | } | ||
700 | 705 | ||
701 | #ifdef LOOPBACK | 706 | #ifdef LOOPBACK |
702 | clrsetbits_be32(&uccp->gumr_l, UCC_SLOW_GUMR_L_DIAG_MASK, | 707 | clrsetbits_be32(&uccp->gumr_l, UCC_SLOW_GUMR_L_DIAG_MASK, |
@@ -706,7 +711,7 @@ static void qe_uart_init_ucc(struct uart_qe_port *qe_port) | |||
706 | UCC_SLOW_GUMR_H_CDS); | 711 | UCC_SLOW_GUMR_H_CDS); |
707 | #endif | 712 | #endif |
708 | 713 | ||
709 | /* Enable rx interrupts and clear all pending events. */ | 714 | /* Disable rx interrupts and clear all pending events. */ |
710 | out_be16(&uccp->uccm, 0); | 715 | out_be16(&uccp->uccm, 0); |
711 | out_be16(&uccp->ucce, 0xffff); | 716 | out_be16(&uccp->ucce, 0xffff); |
712 | out_be16(&uccp->udsr, 0x7e7e); | 717 | out_be16(&uccp->udsr, 0x7e7e); |
@@ -765,6 +770,10 @@ static void qe_uart_init_ucc(struct uart_qe_port *qe_port) | |||
765 | cecr_subblock = ucc_slow_get_qe_cr_subblock(qe_port->ucc_num); | 770 | cecr_subblock = ucc_slow_get_qe_cr_subblock(qe_port->ucc_num); |
766 | qe_issue_cmd(QE_INIT_TX_RX, cecr_subblock, | 771 | qe_issue_cmd(QE_INIT_TX_RX, cecr_subblock, |
767 | QE_CR_PROTOCOL_UNSPECIFIED, 0); | 772 | QE_CR_PROTOCOL_UNSPECIFIED, 0); |
773 | } else { | ||
774 | cecr_subblock = ucc_slow_get_qe_cr_subblock(qe_port->ucc_num); | ||
775 | qe_issue_cmd(QE_INIT_TX_RX, cecr_subblock, | ||
776 | QE_CR_PROTOCOL_UART, 0); | ||
768 | } | 777 | } |
769 | } | 778 | } |
770 | 779 | ||
diff --git a/drivers/usb/host/ehci-ps3.c b/drivers/usb/host/ehci-ps3.c index eecd2a0680a2..93f7035d00a1 100644 --- a/drivers/usb/host/ehci-ps3.c +++ b/drivers/usb/host/ehci-ps3.c | |||
@@ -77,7 +77,7 @@ static const struct hc_driver ps3_ehci_hc_driver = { | |||
77 | .port_handed_over = ehci_port_handed_over, | 77 | .port_handed_over = ehci_port_handed_over, |
78 | }; | 78 | }; |
79 | 79 | ||
80 | static int ps3_ehci_probe(struct ps3_system_bus_device *dev) | 80 | static int __devinit ps3_ehci_probe(struct ps3_system_bus_device *dev) |
81 | { | 81 | { |
82 | int result; | 82 | int result; |
83 | struct usb_hcd *hcd; | 83 | struct usb_hcd *hcd; |
@@ -225,7 +225,7 @@ static int ps3_ehci_remove(struct ps3_system_bus_device *dev) | |||
225 | return 0; | 225 | return 0; |
226 | } | 226 | } |
227 | 227 | ||
228 | static int ps3_ehci_driver_register(struct ps3_system_bus_driver *drv) | 228 | static int __init ps3_ehci_driver_register(struct ps3_system_bus_driver *drv) |
229 | { | 229 | { |
230 | return firmware_has_feature(FW_FEATURE_PS3_LV1) | 230 | return firmware_has_feature(FW_FEATURE_PS3_LV1) |
231 | ? ps3_system_bus_driver_register(drv) | 231 | ? ps3_system_bus_driver_register(drv) |
diff --git a/drivers/usb/host/ohci-ps3.c b/drivers/usb/host/ohci-ps3.c index 1d56259c5db1..700950455f4d 100644 --- a/drivers/usb/host/ohci-ps3.c +++ b/drivers/usb/host/ohci-ps3.c | |||
@@ -75,7 +75,7 @@ static const struct hc_driver ps3_ohci_hc_driver = { | |||
75 | #endif | 75 | #endif |
76 | }; | 76 | }; |
77 | 77 | ||
78 | static int ps3_ohci_probe(struct ps3_system_bus_device *dev) | 78 | static int __devinit ps3_ohci_probe(struct ps3_system_bus_device *dev) |
79 | { | 79 | { |
80 | int result; | 80 | int result; |
81 | struct usb_hcd *hcd; | 81 | struct usb_hcd *hcd; |
@@ -224,7 +224,7 @@ static int ps3_ohci_remove(struct ps3_system_bus_device *dev) | |||
224 | return 0; | 224 | return 0; |
225 | } | 225 | } |
226 | 226 | ||
227 | static int ps3_ohci_driver_register(struct ps3_system_bus_driver *drv) | 227 | static int __init ps3_ohci_driver_register(struct ps3_system_bus_driver *drv) |
228 | { | 228 | { |
229 | return firmware_has_feature(FW_FEATURE_PS3_LV1) | 229 | return firmware_has_feature(FW_FEATURE_PS3_LV1) |
230 | ? ps3_system_bus_driver_register(drv) | 230 | ? ps3_system_bus_driver_register(drv) |
diff --git a/drivers/video/xilinxfb.c b/drivers/video/xilinxfb.c index 7a868bd16e0e..ed7c8d0ddccb 100644 --- a/drivers/video/xilinxfb.c +++ b/drivers/video/xilinxfb.c | |||
@@ -124,7 +124,6 @@ struct xilinxfb_drvdata { | |||
124 | registers */ | 124 | registers */ |
125 | 125 | ||
126 | dcr_host_t dcr_host; | 126 | dcr_host_t dcr_host; |
127 | unsigned int dcr_start; | ||
128 | unsigned int dcr_len; | 127 | unsigned int dcr_len; |
129 | 128 | ||
130 | void *fb_virt; /* virt. address of the frame buffer */ | 129 | void *fb_virt; /* virt. address of the frame buffer */ |
@@ -325,8 +324,8 @@ static int xilinxfb_assign(struct device *dev, | |||
325 | drvdata->regs); | 324 | drvdata->regs); |
326 | } | 325 | } |
327 | /* Put a banner in the log (for DEBUG) */ | 326 | /* Put a banner in the log (for DEBUG) */ |
328 | dev_dbg(dev, "fb: phys=%p, virt=%p, size=%x\n", | 327 | dev_dbg(dev, "fb: phys=%llx, virt=%p, size=%x\n", |
329 | (void *)drvdata->fb_phys, drvdata->fb_virt, fbsize); | 328 | (unsigned long long)drvdata->fb_phys, drvdata->fb_virt, fbsize); |
330 | 329 | ||
331 | return 0; /* success */ | 330 | return 0; /* success */ |
332 | 331 | ||
@@ -404,9 +403,7 @@ xilinxfb_of_probe(struct of_device *op, const struct of_device_id *match) | |||
404 | u32 tft_access; | 403 | u32 tft_access; |
405 | struct xilinxfb_platform_data pdata; | 404 | struct xilinxfb_platform_data pdata; |
406 | struct resource res; | 405 | struct resource res; |
407 | int size, rc; | 406 | int size, rc, start; |
408 | int start = 0, len = 0; | ||
409 | dcr_host_t dcr_host; | ||
410 | struct xilinxfb_drvdata *drvdata; | 407 | struct xilinxfb_drvdata *drvdata; |
411 | 408 | ||
412 | /* Copy with the default pdata (not a ptr reference!) */ | 409 | /* Copy with the default pdata (not a ptr reference!) */ |
@@ -414,35 +411,39 @@ xilinxfb_of_probe(struct of_device *op, const struct of_device_id *match) | |||
414 | 411 | ||
415 | dev_dbg(&op->dev, "xilinxfb_of_probe(%p, %p)\n", op, match); | 412 | dev_dbg(&op->dev, "xilinxfb_of_probe(%p, %p)\n", op, match); |
416 | 413 | ||
414 | /* Allocate the driver data region */ | ||
415 | drvdata = kzalloc(sizeof(*drvdata), GFP_KERNEL); | ||
416 | if (!drvdata) { | ||
417 | dev_err(&op->dev, "Couldn't allocate device private record\n"); | ||
418 | return -ENOMEM; | ||
419 | } | ||
420 | |||
417 | /* | 421 | /* |
418 | * To check whether the core is connected directly to DCR or PLB | 422 | * To check whether the core is connected directly to DCR or PLB |
419 | * interface and initialize the tft_access accordingly. | 423 | * interface and initialize the tft_access accordingly. |
420 | */ | 424 | */ |
421 | p = (u32 *)of_get_property(op->node, "xlnx,dcr-splb-slave-if", NULL); | 425 | p = (u32 *)of_get_property(op->node, "xlnx,dcr-splb-slave-if", NULL); |
422 | 426 | tft_access = p ? *p : 0; | |
423 | if (p) | ||
424 | tft_access = *p; | ||
425 | else | ||
426 | tft_access = 0; /* For backward compatibility */ | ||
427 | 427 | ||
428 | /* | 428 | /* |
429 | * Fill the resource structure if its direct PLB interface | 429 | * Fill the resource structure if its direct PLB interface |
430 | * otherwise fill the dcr_host structure. | 430 | * otherwise fill the dcr_host structure. |
431 | */ | 431 | */ |
432 | if (tft_access) { | 432 | if (tft_access) { |
433 | drvdata->flags |= PLB_ACCESS_FLAG; | ||
433 | rc = of_address_to_resource(op->node, 0, &res); | 434 | rc = of_address_to_resource(op->node, 0, &res); |
434 | if (rc) { | 435 | if (rc) { |
435 | dev_err(&op->dev, "invalid address\n"); | 436 | dev_err(&op->dev, "invalid address\n"); |
436 | return -ENODEV; | 437 | goto err; |
437 | } | 438 | } |
438 | |||
439 | } else { | 439 | } else { |
440 | res.start = 0; | ||
440 | start = dcr_resource_start(op->node, 0); | 441 | start = dcr_resource_start(op->node, 0); |
441 | len = dcr_resource_len(op->node, 0); | 442 | drvdata->dcr_len = dcr_resource_len(op->node, 0); |
442 | dcr_host = dcr_map(op->node, start, len); | 443 | drvdata->dcr_host = dcr_map(op->node, start, drvdata->dcr_len); |
443 | if (!DCR_MAP_OK(dcr_host)) { | 444 | if (!DCR_MAP_OK(drvdata->dcr_host)) { |
444 | dev_err(&op->dev, "invalid address\n"); | 445 | dev_err(&op->dev, "invalid DCR address\n"); |
445 | return -ENODEV; | 446 | goto err; |
446 | } | 447 | } |
447 | } | 448 | } |
448 | 449 | ||
@@ -467,26 +468,12 @@ xilinxfb_of_probe(struct of_device *op, const struct of_device_id *match) | |||
467 | if (of_find_property(op->node, "rotate-display", NULL)) | 468 | if (of_find_property(op->node, "rotate-display", NULL)) |
468 | pdata.rotate_screen = 1; | 469 | pdata.rotate_screen = 1; |
469 | 470 | ||
470 | /* Allocate the driver data region */ | ||
471 | drvdata = kzalloc(sizeof(*drvdata), GFP_KERNEL); | ||
472 | if (!drvdata) { | ||
473 | dev_err(&op->dev, "Couldn't allocate device private record\n"); | ||
474 | return -ENOMEM; | ||
475 | } | ||
476 | dev_set_drvdata(&op->dev, drvdata); | 471 | dev_set_drvdata(&op->dev, drvdata); |
472 | return xilinxfb_assign(&op->dev, drvdata, res.start, &pdata); | ||
477 | 473 | ||
478 | if (tft_access) | 474 | err: |
479 | drvdata->flags |= PLB_ACCESS_FLAG; | 475 | kfree(drvdata); |
480 | 476 | return -ENODEV; | |
481 | /* Arguments are passed based on the interface */ | ||
482 | if (drvdata->flags & PLB_ACCESS_FLAG) { | ||
483 | return xilinxfb_assign(&op->dev, drvdata, res.start, &pdata); | ||
484 | } else { | ||
485 | drvdata->dcr_start = start; | ||
486 | drvdata->dcr_len = len; | ||
487 | drvdata->dcr_host = dcr_host; | ||
488 | return xilinxfb_assign(&op->dev, drvdata, 0, &pdata); | ||
489 | } | ||
490 | } | 477 | } |
491 | 478 | ||
492 | static int __devexit xilinxfb_of_remove(struct of_device *op) | 479 | static int __devexit xilinxfb_of_remove(struct of_device *op) |
diff --git a/drivers/watchdog/mpc5200_wdt.c b/drivers/watchdog/mpc5200_wdt.c index 465fe36adad4..fa9c47ce0ae7 100644 --- a/drivers/watchdog/mpc5200_wdt.c +++ b/drivers/watchdog/mpc5200_wdt.c | |||
@@ -188,7 +188,7 @@ static int mpc5200_wdt_probe(struct of_device *op, | |||
188 | if (!wdt) | 188 | if (!wdt) |
189 | return -ENOMEM; | 189 | return -ENOMEM; |
190 | 190 | ||
191 | wdt->ipb_freq = mpc52xx_find_ipb_freq(op->node); | 191 | wdt->ipb_freq = mpc5xxx_get_bus_frequency(op->node); |
192 | 192 | ||
193 | err = of_address_to_resource(op->node, 0, &wdt->mem); | 193 | err = of_address_to_resource(op->node, 0, &wdt->mem); |
194 | if (err) | 194 | if (err) |