diff options
author | James Courtier-Dutton <James@superbug.co.uk> | 2006-04-09 12:44:13 -0400 |
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committer | Jaroslav Kysela <perex@suse.cz> | 2006-06-22 15:32:38 -0400 |
commit | 3969f6178b86613fd443e70d11b8848451552bdd (patch) | |
tree | 4e7c2c81b5dbeff5b48313d0d5fc2ef5b1bda5c8 | |
parent | 21fdddea8e4cc54341d389916d0c17db8c1ca452 (diff) |
[ALSA] Add p17v.h file.
Signed-off-by: James Courtier-Dutton <James@superbug.co.uk>
-rw-r--r-- | sound/pci/emu10k1/p17v.h | 111 |
1 files changed, 111 insertions, 0 deletions
diff --git a/sound/pci/emu10k1/p17v.h b/sound/pci/emu10k1/p17v.h new file mode 100644 index 000000000000..7ddb5be632cf --- /dev/null +++ b/sound/pci/emu10k1/p17v.h | |||
@@ -0,0 +1,111 @@ | |||
1 | /* | ||
2 | * Copyright (c) by James Courtier-Dutton <James@superbug.demon.co.uk> | ||
3 | * Driver p17v chips | ||
4 | * Version: 0.01 | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
19 | * | ||
20 | */ | ||
21 | |||
22 | /******************************************************************************/ | ||
23 | /* Audigy2Value Tina (P17V) pointer-offset register set, | ||
24 | * accessed through the PTR20 and DATA24 registers */ | ||
25 | /******************************************************************************/ | ||
26 | |||
27 | /* 00 - 07: Not used */ | ||
28 | #define P17V_PLAYBACK_FIFO_PTR 0x08 /* Current playback fifo pointer | ||
29 | * and number of sound samples in cache. | ||
30 | */ | ||
31 | /* 09 - 12: Not used */ | ||
32 | #define P17V_CAPTURE_FIFO_PTR 0x13 /* Current capture fifo pointer | ||
33 | * and number of sound samples in cache. | ||
34 | */ | ||
35 | /* 14 - 17: Not used */ | ||
36 | #define P17V_PB_CHN_SEL 0x18 /* P17v playback channel select */ | ||
37 | #define P17V_SE_SLOT_SEL_L 0x19 /* Sound Engine slot select low */ | ||
38 | #define P17V_SE_SLOT_SEL_H 0x1a /* Sound Engine slot select high */ | ||
39 | /* 1b - 1f: Not used */ | ||
40 | /* 20 - 2f: Not used */ | ||
41 | /* 30 - 3b: Not used */ | ||
42 | #define P17V_SPI 0x3c /* SPI interface register */ | ||
43 | #define P17V_I2C_ADDR 0x3d /* I2C Address */ | ||
44 | #define P17V_I2C_0 0x3e /* I2C Data */ | ||
45 | #define P17V_I2C_1 0x3f /* I2C Data */ | ||
46 | |||
47 | #define P17V_START_AUDIO 0x40 /* Start Audio bit */ | ||
48 | /* 41 - 47: Reserved */ | ||
49 | #define P17V_START_CAPTURE 0x48 /* Start Capture bit */ | ||
50 | #define P17V_CAPTURE_FIFO_BASE 0x49 /* Record FIFO base address */ | ||
51 | #define P17V_CAPTURE_FIFO_SIZE 0x4a /* Record FIFO buffer size */ | ||
52 | #define P17V_CAPTURE_FIFO_INDEX 0x4b /* Record FIFO capture index */ | ||
53 | #define P17V_CAPTURE_VOL_H 0x4c /* P17v capture volume control */ | ||
54 | #define P17V_CAPTURE_VOL_L 0x4d /* P17v capture volume control */ | ||
55 | /* 4e - 4f: Not used */ | ||
56 | /* 50 - 5f: Not used */ | ||
57 | #define P17V_SRCSel 0x60 /* SRC48 and SRCMulti sample rate select | ||
58 | * and output select | ||
59 | */ | ||
60 | #define P17V_MIXER_AC97_10K1_VOL_L 0x61 /* 10K to Mixer_AC97 input volume control */ | ||
61 | #define P17V_MIXER_AC97_10K1_VOL_H 0x62 /* 10K to Mixer_AC97 input volume control */ | ||
62 | #define P17V_MIXER_AC97_P17V_VOL_L 0x63 /* P17V to Mixer_AC97 input volume control */ | ||
63 | #define P17V_MIXER_AC97_P17V_VOL_H 0x64 /* P17V to Mixer_AC97 input volume control */ | ||
64 | #define P17V_MIXER_AC97_SRP_REC_VOL_L 0x65 /* SRP Record to Mixer_AC97 input volume control */ | ||
65 | #define P17V_MIXER_AC97_SRP_REC_VOL_H 0x66 /* SRP Record to Mixer_AC97 input volume control */ | ||
66 | /* 67 - 68: Reserved */ | ||
67 | #define P17V_MIXER_Spdif_10K1_VOL_L 0x69 /* 10K to Mixer_Spdif input volume control */ | ||
68 | #define P17V_MIXER_Spdif_10K1_VOL_H 0x6A /* 10K to Mixer_Spdif input volume control */ | ||
69 | #define P17V_MIXER_Spdif_P17V_VOL_L 0x6B /* P17V to Mixer_Spdif input volume control */ | ||
70 | #define P17V_MIXER_Spdif_P17V_VOL_H 0x6C /* P17V to Mixer_Spdif input volume control */ | ||
71 | #define P17V_MIXER_Spdif_SRP_REC_VOL_L 0x6D /* SRP Record to Mixer_Spdif input volume control */ | ||
72 | #define P17V_MIXER_Spdif_SRP_REC_VOL_H 0x6E /* SRP Record to Mixer_Spdif input volume control */ | ||
73 | /* 6f - 70: Reserved */ | ||
74 | #define P17V_MIXER_I2S_10K1_VOL_L 0x71 /* 10K to Mixer_I2S input volume control */ | ||
75 | #define P17V_MIXER_I2S_10K1_VOL_H 0x72 /* 10K to Mixer_I2S input volume control */ | ||
76 | #define P17V_MIXER_I2S_P17V_VOL_L 0x73 /* P17V to Mixer_I2S input volume control */ | ||
77 | #define P17V_MIXER_I2S_P17V_VOL_H 0x74 /* P17V to Mixer_I2S input volume control */ | ||
78 | #define P17V_MIXER_I2S_SRP_REC_VOL_L 0x75 /* SRP Record to Mixer_I2S input volume control */ | ||
79 | #define P17V_MIXER_I2S_SRP_REC_VOL_H 0x76 /* SRP Record to Mixer_I2S input volume control */ | ||
80 | /* 77 - 78: Reserved */ | ||
81 | #define P17V_MIXER_AC97_ENABLE 0x79 /* Mixer AC97 input audio enable */ | ||
82 | #define P17V_MIXER_SPDIF_ENABLE 0x7A /* Mixer SPDIF input audio enable */ | ||
83 | #define P17V_MIXER_I2S_ENABLE 0x7B /* Mixer I2S input audio enable */ | ||
84 | #define P17V_AUDIO_OUT_ENABLE 0x7C /* Audio out enable */ | ||
85 | #define P17V_MIXER_ATT 0x7D /* SRP Mixer Attenuation Select */ | ||
86 | #define P17V_SRP_RECORD_SRR 0x7E /* SRP Record channel source Select */ | ||
87 | #define P17V_SOFT_RESET_SRP_MIXER 0x7F /* SRP and mixer soft reset */ | ||
88 | |||
89 | #define P17V_AC97_OUT_MASTER_VOL_L 0x80 /* AC97 Output master volume control */ | ||
90 | #define P17V_AC97_OUT_MASTER_VOL_H 0x81 /* AC97 Output master volume control */ | ||
91 | #define P17V_SPDIF_OUT_MASTER_VOL_L 0x82 /* SPDIF Output master volume control */ | ||
92 | #define P17V_SPDIF_OUT_MASTER_VOL_H 0x83 /* SPDIF Output master volume control */ | ||
93 | #define P17V_I2S_OUT_MASTER_VOL_L 0x84 /* I2S Output master volume control */ | ||
94 | #define P17V_I2S_OUT_MASTER_VOL_H 0x85 /* I2S Output master volume control */ | ||
95 | /* 86 - 87: Not used */ | ||
96 | #define P17V_I2S_CHANNEL_SWAP_PHASE_INVERSE 0x88 /* I2S out mono channel swap | ||
97 | * and phase inverse */ | ||
98 | #define P17V_SPDIF_CHANNEL_SWAP_PHASE_INVERSE 0x89 /* SPDIF out mono channel swap | ||
99 | * and phase inverse */ | ||
100 | /* 8A: Not used */ | ||
101 | #define P17V_SRP_P17V_ESR 0x8B /* SRP_P17V estimated sample rate and rate lock */ | ||
102 | #define P17V_SRP_REC_ESR 0x8C /* SRP_REC estimated sample rate and rate lock */ | ||
103 | #define P17V_SRP_BYPASS 0x8D /* srps channel bypass and srps bypass */ | ||
104 | /* 8E - 92: Not used */ | ||
105 | #define P17V_I2S_SRC_SEL 0x93 /* I2SIN mode sel */ | ||
106 | |||
107 | |||
108 | |||
109 | |||
110 | |||
111 | |||