diff options
author | Ben Dooks <ben-linux@fluff.org> | 2008-04-15 19:08:36 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2008-04-17 12:04:38 -0400 |
commit | 1017be88d341c05adc8d790d8092781b7330dafd (patch) | |
tree | b658661bf3bd261d51c3d28d7dcab3dc6dbe70d0 | |
parent | 6ddc4b07a2669bdb8b90e3e12fb1ccfb6dc4a99c (diff) |
[ARM] 4985/1: S3C2412: Fix ARMDIVN name in CLKDIVN definition.
Fix the name of the S3C2412_CLKDIVN_ARMDIVN define.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-rw-r--r-- | arch/arm/mach-s3c2412/s3c2412.c | 2 | ||||
-rw-r--r-- | include/asm-arm/arch-s3c2410/regs-clock.h | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-s3c2412/s3c2412.c b/arch/arm/mach-s3c2412/s3c2412.c index abf1599c9f97..98a0de924c22 100644 --- a/arch/arm/mach-s3c2412/s3c2412.c +++ b/arch/arm/mach-s3c2412/s3c2412.c | |||
@@ -175,7 +175,7 @@ void __init s3c2412_init_clocks(int xtal) | |||
175 | /* work out clock scalings */ | 175 | /* work out clock scalings */ |
176 | 176 | ||
177 | hclk = fclk / ((tmp & S3C2412_CLKDIVN_HDIVN_MASK) + 1); | 177 | hclk = fclk / ((tmp & S3C2412_CLKDIVN_HDIVN_MASK) + 1); |
178 | hclk /= ((tmp & S3C2421_CLKDIVN_ARMDIVN) ? 2 : 1); | 178 | hclk /= ((tmp & S3C2412_CLKDIVN_ARMDIVN) ? 2 : 1); |
179 | pclk = hclk / ((tmp & S3C2412_CLKDIVN_PDIVN) ? 2 : 1); | 179 | pclk = hclk / ((tmp & S3C2412_CLKDIVN_PDIVN) ? 2 : 1); |
180 | 180 | ||
181 | /* print brieft summary of clocks, etc */ | 181 | /* print brieft summary of clocks, etc */ |
diff --git a/include/asm-arm/arch-s3c2410/regs-clock.h b/include/asm-arm/arch-s3c2410/regs-clock.h index dba9df9d8713..ecae9e7f5e45 100644 --- a/include/asm-arm/arch-s3c2410/regs-clock.h +++ b/include/asm-arm/arch-s3c2410/regs-clock.h | |||
@@ -137,7 +137,7 @@ s3c2410_get_pll(unsigned int pllval, unsigned int baseclk) | |||
137 | 137 | ||
138 | #define S3C2412_CLKDIVN_PDIVN (1<<2) | 138 | #define S3C2412_CLKDIVN_PDIVN (1<<2) |
139 | #define S3C2412_CLKDIVN_HDIVN_MASK (3<<0) | 139 | #define S3C2412_CLKDIVN_HDIVN_MASK (3<<0) |
140 | #define S3C2421_CLKDIVN_ARMDIVN (1<<3) | 140 | #define S3C2412_CLKDIVN_ARMDIVN (1<<3) |
141 | #define S3C2412_CLKDIVN_DVSEN (1<<4) | 141 | #define S3C2412_CLKDIVN_DVSEN (1<<4) |
142 | #define S3C2412_CLKDIVN_HALFHCLK (1<<5) | 142 | #define S3C2412_CLKDIVN_HALFHCLK (1<<5) |
143 | #define S3C2412_CLKDIVN_USB48DIV (1<<6) | 143 | #define S3C2412_CLKDIVN_USB48DIV (1<<6) |