diff options
author | Nobuhiro Iwamatsu <hemamu@t-base.ne.jp> | 2006-12-28 11:50:35 -0500 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2007-02-12 20:54:44 -0500 |
commit | aa4a5db52a440d32eab134bfb79d2c9af71eedb4 (patch) | |
tree | da02073f3f8c51df876cc1a37444711a472203d5 | |
parent | 08d2e099fb19ec2edef548a2988c824c8ec0b071 (diff) |
sh: Solution Engine 770x IPR irq setup.
Fixups for external IPR IRQs for the SE770x FPGA.
Signed-off-by: Nobuhiro Iwamatsu <hemamu@t-base.ne.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-rw-r--r-- | arch/sh/boards/se/770x/irq.c | 108 | ||||
-rw-r--r-- | arch/sh/boards/se/770x/setup.c | 8 |
2 files changed, 75 insertions, 41 deletions
diff --git a/arch/sh/boards/se/770x/irq.c b/arch/sh/boards/se/770x/irq.c index fcd7cd7fa05f..307ca5da6232 100644 --- a/arch/sh/boards/se/770x/irq.c +++ b/arch/sh/boards/se/770x/irq.c | |||
@@ -2,56 +2,96 @@ | |||
2 | * linux/arch/sh/boards/se/770x/irq.c | 2 | * linux/arch/sh/boards/se/770x/irq.c |
3 | * | 3 | * |
4 | * Copyright (C) 2000 Kazumoto Kojima | 4 | * Copyright (C) 2000 Kazumoto Kojima |
5 | * Copyright (C) 2006 Nobuhiro Iwamatsu | ||
5 | * | 6 | * |
6 | * Hitachi SolutionEngine Support. | 7 | * Hitachi SolutionEngine Support. |
7 | * | 8 | * |
8 | */ | 9 | */ |
9 | 10 | ||
10 | #include <linux/init.h> | 11 | #include <linux/init.h> |
12 | #include <linux/interrupt.h> | ||
11 | #include <linux/irq.h> | 13 | #include <linux/irq.h> |
12 | #include <asm/irq.h> | 14 | #include <asm/irq.h> |
13 | #include <asm/io.h> | 15 | #include <asm/io.h> |
14 | #include <asm/se.h> | 16 | #include <asm/se.h> |
15 | 17 | ||
18 | /* | ||
19 | * If the problem of make_ipr_irq is solved, | ||
20 | * this code will become unnecessary. :-) | ||
21 | */ | ||
22 | static void se770x_disable_ipr_irq(unsigned int irq) | ||
23 | { | ||
24 | struct ipr_data *p = get_irq_chip_data(irq); | ||
25 | |||
26 | ctrl_outw(ctrl_inw(p->addr) & (0xffff ^ (0xf << p->shift)), p->addr); | ||
27 | } | ||
28 | |||
29 | static void se770x_enable_ipr_irq(unsigned int irq) | ||
30 | { | ||
31 | struct ipr_data *p = get_irq_chip_data(irq); | ||
32 | |||
33 | ctrl_outw(ctrl_inw(p->addr) | (p->priority << p->shift), p->addr); | ||
34 | } | ||
35 | |||
36 | static struct irq_chip se770x_irq_chip = { | ||
37 | .name = "MS770xSE-FPGA", | ||
38 | .mask = se770x_disable_ipr_irq, | ||
39 | .unmask = se770x_enable_ipr_irq, | ||
40 | .mask_ack = se770x_disable_ipr_irq, | ||
41 | }; | ||
42 | |||
43 | void make_se770x_irq(struct ipr_data *table, unsigned int nr_irqs) | ||
44 | { | ||
45 | int i; | ||
46 | |||
47 | for (i = 0; i < nr_irqs; i++) { | ||
48 | unsigned int irq = table[i].irq; | ||
49 | disable_irq_nosync(irq); | ||
50 | set_irq_chip_and_handler_name(irq, &se770x_irq_chip, | ||
51 | handle_level_irq, "level"); | ||
52 | set_irq_chip_data(irq, &table[i]); | ||
53 | se770x_enable_ipr_irq(irq); | ||
54 | } | ||
55 | } | ||
56 | |||
16 | static struct ipr_data se770x_ipr_map[] = { | 57 | static struct ipr_data se770x_ipr_map[] = { |
17 | #if defined(CONFIG_CPU_SUBTYPE_SH7705) | 58 | #if defined(CONFIG_CPU_SUBTYPE_SH7705) |
18 | /* This is default value */ | 59 | /* This is default value */ |
19 | { 0xf-0x2, BCR_ILCRA, 2, 0x2 }, | 60 | { 0xf-0x2, 0, 8, 0x2 , BCR_ILCRA}, |
20 | { 0xf-0xa, BCR_ILCRA, 1, 0xa }, | 61 | { 0xf-0xa, 0, 4, 0xa , BCR_ILCRA}, |
21 | { 0xf-0x5, BCR_ILCRB, 0, 0x5 }, | 62 | { 0xf-0x5, 0, 0, 0x5 , BCR_ILCRB}, |
22 | { 0xf-0x8, BCR_ILCRC, 1, 0x8 }, | 63 | { 0xf-0x8, 0, 4, 0x8 , BCR_ILCRC}, |
23 | { 0xf-0xc, BCR_ILCRC, 0, 0xc }, | 64 | { 0xf-0xc, 0, 0, 0xc , BCR_ILCRC}, |
24 | { 0xf-0xe, BCR_ILCRD, 3, 0xe }, | 65 | { 0xf-0xe, 0, 12, 0xe , BCR_ILCRD}, |
25 | { 0xf-0x3, BCR_ILCRD, 1, 0x3 }, /* LAN */ | 66 | { 0xf-0x3, 0, 4, 0x3 , BCR_ILCRD}, /* LAN */ |
26 | { 0xf-0xd, BCR_ILCRE, 2, 0xd }, | 67 | { 0xf-0xd, 0, 8, 0xd , BCR_ILCRE}, |
27 | { 0xf-0x9, BCR_ILCRE, 1, 0x9 }, | 68 | { 0xf-0x9, 0, 4, 0x9 , BCR_ILCRE}, |
28 | { 0xf-0x1, BCR_ILCRE, 0, 0x1 }, | 69 | { 0xf-0x1, 0, 0, 0x1 , BCR_ILCRE}, |
29 | { 0xf-0xf, BCR_ILCRF, 3, 0xf }, | 70 | { 0xf-0xf, 0, 12, 0xf , BCR_ILCRF}, |
30 | { 0xf-0xb, BCR_ILCRF, 1, 0xb }, | 71 | { 0xf-0xb, 0, 4, 0xb , BCR_ILCRF}, |
31 | { 0xf-0x7, BCR_ILCRG, 3, 0x7 }, | 72 | { 0xf-0x7, 0, 12, 0x7 , BCR_ILCRG}, |
32 | { 0xf-0x6, BCR_ILCRG, 2, 0x6 }, | 73 | { 0xf-0x6, 0, 8, 0x6 , BCR_ILCRG}, |
33 | { 0xf-0x4, BCR_ILCRG, 1, 0x4 }, | 74 | { 0xf-0x4, 0, 4, 0x4 , BCR_ILCRG}, |
34 | #else | 75 | #else |
35 | { 14, BCR_ILCRA, 2, 0x0f-14 }, | 76 | { 14, 0, 8, 0x0f-14 ,BCR_ILCRA}, |
36 | { 12, BCR_ILCRA, 1, 0x0f-12 }, | 77 | { 12, 0, 4, 0x0f-12 ,BCR_ILCRA}, |
37 | { 8, BCR_ILCRB, 1, 0x0f- 8 }, | 78 | { 8, 0, 4, 0x0f- 8 ,BCR_ILCRB}, |
38 | { 6, BCR_ILCRC, 3, 0x0f- 6 }, | 79 | { 6, 0, 12, 0x0f- 6 ,BCR_ILCRC}, |
39 | { 5, BCR_ILCRC, 2, 0x0f- 5 }, | 80 | { 5, 0, 8, 0x0f- 5 ,BCR_ILCRC}, |
40 | { 4, BCR_ILCRC, 1, 0x0f- 4 }, | 81 | { 4, 0, 4, 0x0f- 4 ,BCR_ILCRC}, |
41 | { 3, BCR_ILCRC, 0, 0x0f- 3 }, | 82 | { 3, 0, 0, 0x0f- 3 ,BCR_ILCRC}, |
42 | { 1, BCR_ILCRD, 3, 0x0f- 1 }, | 83 | { 1, 0, 12, 0x0f- 1 ,BCR_ILCRD}, |
43 | 84 | /* ST NIC */ | |
44 | { 10, BCR_ILCRD, 1, 0x0f-10 }, /* LAN */ | 85 | { 10, 0, 4, 0x0f-10 ,BCR_ILCRD}, /* LAN */ |
45 | 86 | /* MRSHPC IRQs setting */ | |
46 | { 0, BCR_ILCRE, 3, 0x0f- 0 }, /* PCIRQ3 */ | 87 | { 0, 0, 12, 0x0f- 0 ,BCR_ILCRE}, /* PCIRQ3 */ |
47 | { 11, BCR_ILCRE, 2, 0x0f-11 }, /* PCIRQ2 */ | 88 | { 11, 0, 8, 0x0f-11 ,BCR_ILCRE}, /* PCIRQ2 */ |
48 | { 9, BCR_ILCRE, 1, 0x0f- 9 }, /* PCIRQ1 */ | 89 | { 9, 0, 4, 0x0f- 9 ,BCR_ILCRE}, /* PCIRQ1 */ |
49 | { 7, BCR_ILCRE, 0, 0x0f- 7 }, /* PCIRQ0 */ | 90 | { 7, 0, 0, 0x0f- 7 ,BCR_ILCRE}, /* PCIRQ0 */ |
50 | |||
51 | /* #2, #13 are allocated for SLOT IRQ #1 and #2 (for now) */ | 91 | /* #2, #13 are allocated for SLOT IRQ #1 and #2 (for now) */ |
52 | /* NOTE: #2 and #13 are not used on PC */ | 92 | /* NOTE: #2 and #13 are not used on PC */ |
53 | { 13, BCR_ILCRG, 1, 0x0f-13 }, /* SLOTIRQ2 */ | 93 | { 13, 0, 4, 0x0f-13 ,BCR_ILCRG}, /* SLOTIRQ2 */ |
54 | { 2, BCR_ILCRG, 0, 0x0f- 2 }, /* SLOTIRQ1 */ | 94 | { 2, 0, 0, 0x0f- 2 ,BCR_ILCRG}, /* SLOTIRQ1 */ |
55 | #endif | 95 | #endif |
56 | }; | 96 | }; |
57 | 97 | ||
@@ -81,5 +121,5 @@ void __init init_se_IRQ(void) | |||
81 | ctrl_outw(0, BCR_ILCRF); | 121 | ctrl_outw(0, BCR_ILCRF); |
82 | ctrl_outw(0, BCR_ILCRG); | 122 | ctrl_outw(0, BCR_ILCRG); |
83 | #endif | 123 | #endif |
84 | make_ipr_irq(se770x_ipr_map, ARRAY_SIZE(se770x_ipr_map)); | 124 | make_se770x_irq(se770x_ipr_map, ARRAY_SIZE(se770x_ipr_map)); |
85 | } | 125 | } |
diff --git a/arch/sh/boards/se/770x/setup.c b/arch/sh/boards/se/770x/setup.c index a1d51d5fa925..84f2e4857c63 100644 --- a/arch/sh/boards/se/770x/setup.c +++ b/arch/sh/boards/se/770x/setup.c | |||
@@ -1,5 +1,4 @@ | |||
1 | /* $Id: setup.c,v 1.1.2.4 2002/03/02 21:57:07 lethal Exp $ | 1 | /* |
2 | * | ||
3 | * linux/arch/sh/boards/se/770x/setup.c | 2 | * linux/arch/sh/boards/se/770x/setup.c |
4 | * | 3 | * |
5 | * Copyright (C) 2000 Kazumoto Kojima | 4 | * Copyright (C) 2000 Kazumoto Kojima |
@@ -36,11 +35,6 @@ static void __init smsc_setup(char **cmdline_p) | |||
36 | smsc_config(ACTIVATE_INDEX, 0x01); | 35 | smsc_config(ACTIVATE_INDEX, 0x01); |
37 | smsc_config(IRQ_SELECT_INDEX, 6); /* IRQ6 */ | 36 | smsc_config(IRQ_SELECT_INDEX, 6); /* IRQ6 */ |
38 | 37 | ||
39 | /* IDE1 */ | ||
40 | smsc_config(CURRENT_LDN_INDEX, LDN_IDE1); | ||
41 | smsc_config(ACTIVATE_INDEX, 0x01); | ||
42 | smsc_config(IRQ_SELECT_INDEX, 14); /* IRQ14 */ | ||
43 | |||
44 | /* AUXIO (GPIO): to use IDE1 */ | 38 | /* AUXIO (GPIO): to use IDE1 */ |
45 | smsc_config(CURRENT_LDN_INDEX, LDN_AUXIO); | 39 | smsc_config(CURRENT_LDN_INDEX, LDN_AUXIO); |
46 | smsc_config(GPIO46_INDEX, 0x00); /* nIOROP */ | 40 | smsc_config(GPIO46_INDEX, 0x00); /* nIOROP */ |