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authorLinus Torvalds <torvalds@g5.osdl.org>2006-05-31 19:48:05 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2006-05-31 19:48:05 -0400
commitba8f5baba79da8eb502f8534c3a8ecb64aceb790 (patch)
tree39a0438607446681bdf5173c7480ff90f3825945
parent5cedae9ca752a43cfb1074907d12c9f01fbebd45 (diff)
parent44d921b246923380f26b8010e47ac5dfe48fcec5 (diff)
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: [MIPS] Treat R14000 like R10000. [MIPS] Remove EXPERIMENTAL from PAGE_SIZE_16KB [MIPS] Update/Fix instruction definitions [MIPS] DSP and MDMX share the same config flag bit. [MIPS] Fix deadlock on MP with cache aliases. [MIPS] Use generic STABS_DEBUG macro. [MIPS] Create consistency in "system type" selection. [MIPS] Use generic DWARF_DEBUG [MIPS] Fix kgdb exception handler from user mode. [MIPS] Update struct sigcontext member names [MIPS] Update/fix futex assembly [MIPS] Remove support for sysmips(2) SETNAME and MIPS_RDNVRAM operations. [MIPS] Fix detection and handling of the 74K processor. [MIPS] Add missing 34K processor IDs [MIPS] Fix marking buddy of pte global for MIPS32 w/36-bit physical address [MIPS] AU1xxx mips_timer_interrupt() fixes [MIPS] Fix typo
Diffstat
-rw-r--r--arch/mips/Kconfig96
-rw-r--r--arch/mips/au1000/common/irq.c1
-rw-r--r--arch/mips/au1000/common/time.c1
-rw-r--r--arch/mips/kernel/asm-offsets.c4
-rw-r--r--arch/mips/kernel/cpu-probe.c13
-rw-r--r--arch/mips/kernel/entry.S2
-rw-r--r--arch/mips/kernel/gdb-low.S8
-rw-r--r--arch/mips/kernel/proc.c2
-rw-r--r--arch/mips/kernel/signal-common.h30
-rw-r--r--arch/mips/kernel/syscall.c24
-rw-r--r--arch/mips/kernel/traps.c1
-rw-r--r--arch/mips/kernel/vmlinux.lds.S20
-rw-r--r--arch/mips/mm/c-r4k.c44
-rw-r--r--arch/mips/mm/pg-r4k.c1
-rw-r--r--arch/mips/mm/tlbex.c2
-rw-r--r--arch/mips/oprofile/common.c1
-rw-r--r--arch/mips/oprofile/op_model_mipsxx.c4
-rw-r--r--include/asm-mips/cpu.h6
-rw-r--r--include/asm-mips/futex.h141
-rw-r--r--include/asm-mips/inst.h33
-rw-r--r--include/asm-mips/mipsregs.h2
-rw-r--r--include/asm-mips/pgtable.h88
-rw-r--r--include/asm-mips/sigcontext.h10
23 files changed, 328 insertions, 206 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index ee5fbb02b28f..e8ff09fe73d9 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -13,7 +13,7 @@ choice
13 default SGI_IP22 13 default SGI_IP22
14 14
15config MIPS_MTX1 15config MIPS_MTX1
16 bool "Support for 4G Systems MTX-1 board" 16 bool "4G Systems MTX-1 board"
17 select DMA_NONCOHERENT 17 select DMA_NONCOHERENT
18 select HW_HAS_PCI 18 select HW_HAS_PCI
19 select SOC_AU1500 19 select SOC_AU1500
@@ -120,7 +120,7 @@ config MIPS_MIRAGE
120 select SYS_SUPPORTS_LITTLE_ENDIAN 120 select SYS_SUPPORTS_LITTLE_ENDIAN
121 121
122config MIPS_COBALT 122config MIPS_COBALT
123 bool "Support for Cobalt Server" 123 bool "Cobalt Server"
124 select DMA_NONCOHERENT 124 select DMA_NONCOHERENT
125 select HW_HAS_PCI 125 select HW_HAS_PCI
126 select I8259 126 select I8259
@@ -132,7 +132,7 @@ config MIPS_COBALT
132 select SYS_SUPPORTS_LITTLE_ENDIAN 132 select SYS_SUPPORTS_LITTLE_ENDIAN
133 133
134config MACH_DECSTATION 134config MACH_DECSTATION
135 bool "Support for DECstations" 135 bool "DECstations"
136 select BOOT_ELF32 136 select BOOT_ELF32
137 select DMA_NONCOHERENT 137 select DMA_NONCOHERENT
138 select EARLY_PRINTK 138 select EARLY_PRINTK
@@ -158,7 +158,7 @@ config MACH_DECSTATION
158 otherwise choose R3000. 158 otherwise choose R3000.
159 159
160config MIPS_EV64120 160config MIPS_EV64120
161 bool "Support for Galileo EV64120 Evaluation board (EXPERIMENTAL)" 161 bool "Galileo EV64120 Evaluation board (EXPERIMENTAL)"
162 depends on EXPERIMENTAL 162 depends on EXPERIMENTAL
163 select DMA_NONCOHERENT 163 select DMA_NONCOHERENT
164 select HW_HAS_PCI 164 select HW_HAS_PCI
@@ -175,7 +175,7 @@ config MIPS_EV64120
175 kernel for this platform. 175 kernel for this platform.
176 176
177config MIPS_EV96100 177config MIPS_EV96100
178 bool "Support for Galileo EV96100 Evaluation board (EXPERIMENTAL)" 178 bool "Galileo EV96100 Evaluation board (EXPERIMENTAL)"
179 depends on EXPERIMENTAL 179 depends on EXPERIMENTAL
180 select DMA_NONCOHERENT 180 select DMA_NONCOHERENT
181 select HW_HAS_PCI 181 select HW_HAS_PCI
@@ -195,7 +195,7 @@ config MIPS_EV96100
195 here if you wish to build a kernel for this platform. 195 here if you wish to build a kernel for this platform.
196 196
197config MIPS_IVR 197config MIPS_IVR
198 bool "Support for Globespan IVR board" 198 bool "Globespan IVR board"
199 select DMA_NONCOHERENT 199 select DMA_NONCOHERENT
200 select HW_HAS_PCI 200 select HW_HAS_PCI
201 select ITE_BOARD_GEN 201 select ITE_BOARD_GEN
@@ -211,7 +211,7 @@ config MIPS_IVR
211 build a kernel for this platform. 211 build a kernel for this platform.
212 212
213config MIPS_ITE8172 213config MIPS_ITE8172
214 bool "Support for ITE 8172G board" 214 bool "ITE 8172G board"
215 select DMA_NONCOHERENT 215 select DMA_NONCOHERENT
216 select HW_HAS_PCI 216 select HW_HAS_PCI
217 select ITE_BOARD_GEN 217 select ITE_BOARD_GEN
@@ -228,7 +228,7 @@ config MIPS_ITE8172
228 a kernel for this platform. 228 a kernel for this platform.
229 229
230config MACH_JAZZ 230config MACH_JAZZ
231 bool "Support for the Jazz family of machines" 231 bool "Jazz family of machines"
232 select ARC 232 select ARC
233 select ARC32 233 select ARC32
234 select ARCH_MAY_HAVE_PC_FDC 234 select ARCH_MAY_HAVE_PC_FDC
@@ -246,7 +246,7 @@ config MACH_JAZZ
246 Olivetti M700-10 workstations. 246 Olivetti M700-10 workstations.
247 247
248config LASAT 248config LASAT
249 bool "Support for LASAT Networks platforms" 249 bool "LASAT Networks platforms"
250 select DMA_NONCOHERENT 250 select DMA_NONCOHERENT
251 select HW_HAS_PCI 251 select HW_HAS_PCI
252 select MIPS_GT64120 252 select MIPS_GT64120
@@ -258,7 +258,7 @@ config LASAT
258 select SYS_SUPPORTS_LITTLE_ENDIAN 258 select SYS_SUPPORTS_LITTLE_ENDIAN
259 259
260config MIPS_ATLAS 260config MIPS_ATLAS
261 bool "Support for MIPS Atlas board" 261 bool "MIPS Atlas board"
262 select BOOT_ELF32 262 select BOOT_ELF32
263 select DMA_NONCOHERENT 263 select DMA_NONCOHERENT
264 select IRQ_CPU 264 select IRQ_CPU
@@ -283,7 +283,7 @@ config MIPS_ATLAS
283 board. 283 board.
284 284
285config MIPS_MALTA 285config MIPS_MALTA
286 bool "Support for MIPS Malta board" 286 bool "MIPS Malta board"
287 select ARCH_MAY_HAVE_PC_FDC 287 select ARCH_MAY_HAVE_PC_FDC
288 select BOOT_ELF32 288 select BOOT_ELF32
289 select HAVE_STD_PC_SERIAL_PORT 289 select HAVE_STD_PC_SERIAL_PORT
@@ -311,7 +311,7 @@ config MIPS_MALTA
311 board. 311 board.
312 312
313config MIPS_SEAD 313config MIPS_SEAD
314 bool "Support for MIPS SEAD board (EXPERIMENTAL)" 314 bool "MIPS SEAD board (EXPERIMENTAL)"
315 depends on EXPERIMENTAL 315 depends on EXPERIMENTAL
316 select IRQ_CPU 316 select IRQ_CPU
317 select DMA_NONCOHERENT 317 select DMA_NONCOHERENT
@@ -328,7 +328,7 @@ config MIPS_SEAD
328 board. 328 board.
329 329
330config MIPS_SIM 330config MIPS_SIM
331 bool 'Support for MIPS simulator (MIPSsim)' 331 bool 'MIPS simulator (MIPSsim)'
332 select DMA_NONCOHERENT 332 select DMA_NONCOHERENT
333 select IRQ_CPU 333 select IRQ_CPU
334 select SYS_HAS_CPU_MIPS32_R1 334 select SYS_HAS_CPU_MIPS32_R1
@@ -341,7 +341,7 @@ config MIPS_SIM
341 emulator. 341 emulator.
342 342
343config MOMENCO_JAGUAR_ATX 343config MOMENCO_JAGUAR_ATX
344 bool "Support for Momentum Jaguar board" 344 bool "Momentum Jaguar board"
345 select BOOT_ELF32 345 select BOOT_ELF32
346 select DMA_NONCOHERENT 346 select DMA_NONCOHERENT
347 select HW_HAS_PCI 347 select HW_HAS_PCI
@@ -361,7 +361,7 @@ config MOMENCO_JAGUAR_ATX
361 Momentum Computer <http://www.momenco.com/>. 361 Momentum Computer <http://www.momenco.com/>.
362 362
363config MOMENCO_OCELOT 363config MOMENCO_OCELOT
364 bool "Support for Momentum Ocelot board" 364 bool "Momentum Ocelot board"
365 select DMA_NONCOHERENT 365 select DMA_NONCOHERENT
366 select HW_HAS_PCI 366 select HW_HAS_PCI
367 select IRQ_CPU 367 select IRQ_CPU
@@ -378,7 +378,7 @@ config MOMENCO_OCELOT
378 Momentum Computer <http://www.momenco.com/>. 378 Momentum Computer <http://www.momenco.com/>.
379 379
380config MOMENCO_OCELOT_3 380config MOMENCO_OCELOT_3
381 bool "Support for Momentum Ocelot-3 board" 381 bool "Momentum Ocelot-3 board"
382 select BOOT_ELF32 382 select BOOT_ELF32
383 select DMA_NONCOHERENT 383 select DMA_NONCOHERENT
384 select HW_HAS_PCI 384 select HW_HAS_PCI
@@ -397,7 +397,7 @@ config MOMENCO_OCELOT_3
397 PMC-Sierra Rm79000 core. 397 PMC-Sierra Rm79000 core.
398 398
399config MOMENCO_OCELOT_C 399config MOMENCO_OCELOT_C
400 bool "Support for Momentum Ocelot-C board" 400 bool "Momentum Ocelot-C board"
401 select DMA_NONCOHERENT 401 select DMA_NONCOHERENT
402 select HW_HAS_PCI 402 select HW_HAS_PCI
403 select IRQ_CPU 403 select IRQ_CPU
@@ -414,7 +414,7 @@ config MOMENCO_OCELOT_C
414 Momentum Computer <http://www.momenco.com/>. 414 Momentum Computer <http://www.momenco.com/>.
415 415
416config MOMENCO_OCELOT_G 416config MOMENCO_OCELOT_G
417 bool "Support for Momentum Ocelot-G board" 417 bool "Momentum Ocelot-G board"
418 select DMA_NONCOHERENT 418 select DMA_NONCOHERENT
419 select HW_HAS_PCI 419 select HW_HAS_PCI
420 select IRQ_CPU 420 select IRQ_CPU
@@ -431,23 +431,23 @@ config MOMENCO_OCELOT_G
431 Momentum Computer <http://www.momenco.com/>. 431 Momentum Computer <http://www.momenco.com/>.
432 432
433config MIPS_XXS1500 433config MIPS_XXS1500
434 bool "Support for MyCable XXS1500 board" 434 bool "MyCable XXS1500 board"
435 select DMA_NONCOHERENT 435 select DMA_NONCOHERENT
436 select SOC_AU1500 436 select SOC_AU1500
437 select SYS_SUPPORTS_LITTLE_ENDIAN 437 select SYS_SUPPORTS_LITTLE_ENDIAN
438 438
439config PNX8550_V2PCI 439config PNX8550_V2PCI
440 bool "Support for Philips PNX8550 based Viper2-PCI board" 440 bool "Philips PNX8550 based Viper2-PCI board"
441 select PNX8550 441 select PNX8550
442 select SYS_SUPPORTS_LITTLE_ENDIAN 442 select SYS_SUPPORTS_LITTLE_ENDIAN
443 443
444config PNX8550_JBS 444config PNX8550_JBS
445 bool "Support for Philips PNX8550 based JBS board" 445 bool "Philips PNX8550 based JBS board"
446 select PNX8550 446 select PNX8550
447 select SYS_SUPPORTS_LITTLE_ENDIAN 447 select SYS_SUPPORTS_LITTLE_ENDIAN
448 448
449config DDB5074 449config DDB5074
450 bool "Support for NEC DDB Vrc-5074 (EXPERIMENTAL)" 450 bool "NEC DDB Vrc-5074 (EXPERIMENTAL)"
451 depends on EXPERIMENTAL 451 depends on EXPERIMENTAL
452 select DDB5XXX_COMMON 452 select DDB5XXX_COMMON
453 select DMA_NONCOHERENT 453 select DMA_NONCOHERENT
@@ -465,7 +465,7 @@ config DDB5074
465 evaluation board. 465 evaluation board.
466 466
467config DDB5476 467config DDB5476
468 bool "Support for NEC DDB Vrc-5476" 468 bool "NEC DDB Vrc-5476"
469 select DDB5XXX_COMMON 469 select DDB5XXX_COMMON
470 select DMA_NONCOHERENT 470 select DMA_NONCOHERENT
471 select HAVE_STD_PC_SERIAL_PORT 471 select HAVE_STD_PC_SERIAL_PORT
@@ -486,7 +486,7 @@ config DDB5476
486 IDE controller, PS2 keyboard, PS2 mouse, etc. 486 IDE controller, PS2 keyboard, PS2 mouse, etc.
487 487
488config DDB5477 488config DDB5477
489 bool "Support for NEC DDB Vrc-5477" 489 bool "NEC DDB Vrc-5477"
490 select DDB5XXX_COMMON 490 select DDB5XXX_COMMON
491 select DMA_NONCOHERENT 491 select DMA_NONCOHERENT
492 select HW_HAS_PCI 492 select HW_HAS_PCI
@@ -504,13 +504,13 @@ config DDB5477
504 ether port USB, AC97, PCI, etc. 504 ether port USB, AC97, PCI, etc.
505 505
506config MACH_VR41XX 506config MACH_VR41XX
507 bool "Support for NEC VR4100 series based machines" 507 bool "NEC VR41XX-based machines"
508 select SYS_HAS_CPU_VR41XX 508 select SYS_HAS_CPU_VR41XX
509 select SYS_SUPPORTS_32BIT_KERNEL 509 select SYS_SUPPORTS_32BIT_KERNEL
510 select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL 510 select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
511 511
512config PMC_YOSEMITE 512config PMC_YOSEMITE
513 bool "Support for PMC-Sierra Yosemite eval board" 513 bool "PMC-Sierra Yosemite eval board"
514 select DMA_COHERENT 514 select DMA_COHERENT
515 select HW_HAS_PCI 515 select HW_HAS_PCI
516 select IRQ_CPU 516 select IRQ_CPU
@@ -527,7 +527,7 @@ config PMC_YOSEMITE
527 manufactured by PMC-Sierra. 527 manufactured by PMC-Sierra.
528 528
529config QEMU 529config QEMU
530 bool "Support for Qemu" 530 bool "Qemu"
531 select DMA_COHERENT 531 select DMA_COHERENT
532 select GENERIC_ISA_DMA 532 select GENERIC_ISA_DMA
533 select HAVE_STD_PC_SERIAL_PORT 533 select HAVE_STD_PC_SERIAL_PORT
@@ -547,7 +547,7 @@ config QEMU
547 can be found at http://www.linux-mips.org/wiki/Qemu. 547 can be found at http://www.linux-mips.org/wiki/Qemu.
548 548
549config SGI_IP22 549config SGI_IP22
550 bool "Support for SGI IP22 (Indy/Indigo2)" 550 bool "SGI IP22 (Indy/Indigo2)"
551 select ARC 551 select ARC
552 select ARC32 552 select ARC32
553 select BOOT_ELF32 553 select BOOT_ELF32
@@ -567,7 +567,7 @@ config SGI_IP22
567 that runs on these, say Y here. 567 that runs on these, say Y here.
568 568
569config SGI_IP27 569config SGI_IP27
570 bool "Support for SGI IP27 (Origin200/2000)" 570 bool "SGI IP27 (Origin200/2000)"
571 select ARC 571 select ARC
572 select ARC64 572 select ARC64
573 select BOOT_ELF64 573 select BOOT_ELF64
@@ -583,7 +583,7 @@ config SGI_IP27
583 here. 583 here.
584 584
585config SGI_IP32 585config SGI_IP32
586 bool "Support for SGI IP32 (O2) (EXPERIMENTAL)" 586 bool "SGI IP32 (O2) (EXPERIMENTAL)"
587 depends on EXPERIMENTAL 587 depends on EXPERIMENTAL
588 select ARC 588 select ARC
589 select ARC32 589 select ARC32
@@ -604,7 +604,7 @@ config SGI_IP32
604 If you want this kernel to run on SGI O2 workstation, say Y here. 604 If you want this kernel to run on SGI O2 workstation, say Y here.
605 605
606config SIBYTE_BIGSUR 606config SIBYTE_BIGSUR
607 bool "Support for Sibyte BCM91480B-BigSur" 607 bool "Sibyte BCM91480B-BigSur"
608 select BOOT_ELF32 608 select BOOT_ELF32
609 select DMA_COHERENT 609 select DMA_COHERENT
610 select PCI_DOMAINS 610 select PCI_DOMAINS
@@ -615,7 +615,7 @@ config SIBYTE_BIGSUR
615 select SYS_SUPPORTS_LITTLE_ENDIAN 615 select SYS_SUPPORTS_LITTLE_ENDIAN
616 616
617config SIBYTE_SWARM 617config SIBYTE_SWARM
618 bool "Support for Sibyte BCM91250A-SWARM" 618 bool "Sibyte BCM91250A-SWARM"
619 select BOOT_ELF32 619 select BOOT_ELF32
620 select DMA_COHERENT 620 select DMA_COHERENT
621 select SIBYTE_SB1250 621 select SIBYTE_SB1250
@@ -626,7 +626,7 @@ config SIBYTE_SWARM
626 select SYS_SUPPORTS_LITTLE_ENDIAN 626 select SYS_SUPPORTS_LITTLE_ENDIAN
627 627
628config SIBYTE_SENTOSA 628config SIBYTE_SENTOSA
629 bool "Support for Sibyte BCM91250E-Sentosa" 629 bool "Sibyte BCM91250E-Sentosa"
630 depends on EXPERIMENTAL 630 depends on EXPERIMENTAL
631 select BOOT_ELF32 631 select BOOT_ELF32
632 select DMA_COHERENT 632 select DMA_COHERENT
@@ -637,7 +637,7 @@ config SIBYTE_SENTOSA
637 select SYS_SUPPORTS_LITTLE_ENDIAN 637 select SYS_SUPPORTS_LITTLE_ENDIAN
638 638
639config SIBYTE_RHONE 639config SIBYTE_RHONE
640 bool "Support for Sibyte BCM91125E-Rhone" 640 bool "Sibyte BCM91125E-Rhone"
641 depends on EXPERIMENTAL 641 depends on EXPERIMENTAL
642 select BOOT_ELF32 642 select BOOT_ELF32
643 select DMA_COHERENT 643 select DMA_COHERENT
@@ -648,7 +648,7 @@ config SIBYTE_RHONE
648 select SYS_SUPPORTS_LITTLE_ENDIAN 648 select SYS_SUPPORTS_LITTLE_ENDIAN
649 649
650config SIBYTE_CARMEL 650config SIBYTE_CARMEL
651 bool "Support for Sibyte BCM91120x-Carmel" 651 bool "Sibyte BCM91120x-Carmel"
652 depends on EXPERIMENTAL 652 depends on EXPERIMENTAL
653 select BOOT_ELF32 653 select BOOT_ELF32
654 select DMA_COHERENT 654 select DMA_COHERENT
@@ -659,7 +659,7 @@ config SIBYTE_CARMEL
659 select SYS_SUPPORTS_LITTLE_ENDIAN 659 select SYS_SUPPORTS_LITTLE_ENDIAN
660 660
661config SIBYTE_PTSWARM 661config SIBYTE_PTSWARM
662 bool "Support for Sibyte BCM91250PT-PTSWARM" 662 bool "Sibyte BCM91250PT-PTSWARM"
663 depends on EXPERIMENTAL 663 depends on EXPERIMENTAL
664 select BOOT_ELF32 664 select BOOT_ELF32
665 select DMA_COHERENT 665 select DMA_COHERENT
@@ -671,7 +671,7 @@ config SIBYTE_PTSWARM
671 select SYS_SUPPORTS_LITTLE_ENDIAN 671 select SYS_SUPPORTS_LITTLE_ENDIAN
672 672
673config SIBYTE_LITTLESUR 673config SIBYTE_LITTLESUR
674 bool "Support for Sibyte BCM91250C2-LittleSur" 674 bool "Sibyte BCM91250C2-LittleSur"
675 depends on EXPERIMENTAL 675 depends on EXPERIMENTAL
676 select BOOT_ELF32 676 select BOOT_ELF32
677 select DMA_COHERENT 677 select DMA_COHERENT
@@ -683,7 +683,7 @@ config SIBYTE_LITTLESUR
683 select SYS_SUPPORTS_LITTLE_ENDIAN 683 select SYS_SUPPORTS_LITTLE_ENDIAN
684 684
685config SIBYTE_CRHINE 685config SIBYTE_CRHINE
686 bool "Support for Sibyte BCM91120C-CRhine" 686 bool "Sibyte BCM91120C-CRhine"
687 depends on EXPERIMENTAL 687 depends on EXPERIMENTAL
688 select BOOT_ELF32 688 select BOOT_ELF32
689 select DMA_COHERENT 689 select DMA_COHERENT
@@ -694,7 +694,7 @@ config SIBYTE_CRHINE
694 select SYS_SUPPORTS_LITTLE_ENDIAN 694 select SYS_SUPPORTS_LITTLE_ENDIAN
695 695
696config SIBYTE_CRHONE 696config SIBYTE_CRHONE
697 bool "Support for Sibyte BCM91125C-CRhone" 697 bool "Sibyte BCM91125C-CRhone"
698 depends on EXPERIMENTAL 698 depends on EXPERIMENTAL
699 select BOOT_ELF32 699 select BOOT_ELF32
700 select DMA_COHERENT 700 select DMA_COHERENT
@@ -706,7 +706,7 @@ config SIBYTE_CRHONE
706 select SYS_SUPPORTS_LITTLE_ENDIAN 706 select SYS_SUPPORTS_LITTLE_ENDIAN
707 707
708config SNI_RM200_PCI 708config SNI_RM200_PCI
709 bool "Support for SNI RM200 PCI" 709 bool "SNI RM200 PCI"
710 select ARC 710 select ARC
711 select ARC32 711 select ARC32
712 select ARCH_MAY_HAVE_PC_FDC 712 select ARCH_MAY_HAVE_PC_FDC
@@ -732,7 +732,7 @@ config SNI_RM200_PCI
732 support this machine type. 732 support this machine type.
733 733
734config TOSHIBA_JMR3927 734config TOSHIBA_JMR3927
735 bool "Support for Toshiba JMR-TX3927 board" 735 bool "Toshiba JMR-TX3927 board"
736 select DMA_NONCOHERENT 736 select DMA_NONCOHERENT
737 select HW_HAS_PCI 737 select HW_HAS_PCI
738 select MIPS_TX3927 738 select MIPS_TX3927
@@ -743,7 +743,7 @@ config TOSHIBA_JMR3927
743 select TOSHIBA_BOARDS 743 select TOSHIBA_BOARDS
744 744
745config TOSHIBA_RBTX4927 745config TOSHIBA_RBTX4927
746 bool "Support for Toshiba TBTX49[23]7 board" 746 bool "Toshiba TBTX49[23]7 board"
747 select DMA_NONCOHERENT 747 select DMA_NONCOHERENT
748 select HAS_TXX9_SERIAL 748 select HAS_TXX9_SERIAL
749 select HW_HAS_PCI 749 select HW_HAS_PCI
@@ -760,7 +760,7 @@ config TOSHIBA_RBTX4927
760 support this machine type 760 support this machine type
761 761
762config TOSHIBA_RBTX4938 762config TOSHIBA_RBTX4938
763 bool "Support for Toshiba RBTX4938 board" 763 bool "Toshiba RBTX4938 board"
764 select HAVE_STD_PC_SERIAL_PORT 764 select HAVE_STD_PC_SERIAL_PORT
765 select DMA_NONCOHERENT 765 select DMA_NONCOHERENT
766 select GENERIC_ISA_DMA 766 select GENERIC_ISA_DMA
@@ -1411,13 +1411,12 @@ config PAGE_SIZE_8KB
1411 1411
1412config PAGE_SIZE_16KB 1412config PAGE_SIZE_16KB
1413 bool "16kB" 1413 bool "16kB"
1414 depends on EXPERIMENTAL && !CPU_R3000 && !CPU_TX39XX 1414 depends on !CPU_R3000 && !CPU_TX39XX
1415 help 1415 help
1416 Using 16kB page size will result in higher performance kernel at 1416 Using 16kB page size will result in higher performance kernel at
1417 the price of higher memory consumption. This option is available on 1417 the price of higher memory consumption. This option is available on
1418 all non-R3000 family processor. Not that at the time of this 1418 all non-R3000 family processors. Note that you will need a suitable
1419 writing this option is still high experimental; there are also 1419 Linux distribution to support this.
1420 issues with compatibility of user applications.
1421 1420
1422config PAGE_SIZE_64KB 1421config PAGE_SIZE_64KB
1423 bool "64kB" 1422 bool "64kB"
@@ -1426,8 +1425,7 @@ config PAGE_SIZE_64KB
1426 Using 64kB page size will result in higher performance kernel at 1425 Using 64kB page size will result in higher performance kernel at
1427 the price of higher memory consumption. This option is available on 1426 the price of higher memory consumption. This option is available on
1428 all non-R3000 family processor. Not that at the time of this 1427 all non-R3000 family processor. Not that at the time of this
1429 writing this option is still high experimental; there are also 1428 writing this option is still high experimental.
1430 issues with compatibility of user applications.
1431 1429
1432endchoice 1430endchoice
1433 1431
diff --git a/arch/mips/au1000/common/irq.c b/arch/mips/au1000/common/irq.c
index da61de776154..afe05ec12c27 100644
--- a/arch/mips/au1000/common/irq.c
+++ b/arch/mips/au1000/common/irq.c
@@ -68,6 +68,7 @@
68 68
69extern void set_debug_traps(void); 69extern void set_debug_traps(void);
70extern irq_cpustat_t irq_stat [NR_CPUS]; 70extern irq_cpustat_t irq_stat [NR_CPUS];
71extern void mips_timer_interrupt(struct pt_regs *regs);
71 72
72static void setup_local_irq(unsigned int irq, int type, int int_req); 73static void setup_local_irq(unsigned int irq, int type, int int_req);
73static unsigned int startup_irq(unsigned int irq); 74static unsigned int startup_irq(unsigned int irq);
diff --git a/arch/mips/au1000/common/time.c b/arch/mips/au1000/common/time.c
index f85f1524b366..f74d66a58a21 100644
--- a/arch/mips/au1000/common/time.c
+++ b/arch/mips/au1000/common/time.c
@@ -116,6 +116,7 @@ void mips_timer_interrupt(struct pt_regs *regs)
116 116
117null: 117null:
118 ack_r4ktimer(0); 118 ack_r4ktimer(0);
119 irq_exit();
119} 120}
120 121
121#ifdef CONFIG_PM 122#ifdef CONFIG_PM
diff --git a/arch/mips/kernel/asm-offsets.c b/arch/mips/kernel/asm-offsets.c
index 92b28b674d6f..0facfaf4e950 100644
--- a/arch/mips/kernel/asm-offsets.c
+++ b/arch/mips/kernel/asm-offsets.c
@@ -272,8 +272,8 @@ void output_sc_defines(void)
272 text("/* Linux sigcontext offsets. */"); 272 text("/* Linux sigcontext offsets. */");
273 offset("#define SC_REGS ", struct sigcontext, sc_regs); 273 offset("#define SC_REGS ", struct sigcontext, sc_regs);
274 offset("#define SC_FPREGS ", struct sigcontext, sc_fpregs); 274 offset("#define SC_FPREGS ", struct sigcontext, sc_fpregs);
275 offset("#define SC_MDHI ", struct sigcontext, sc_hi); 275 offset("#define SC_MDHI ", struct sigcontext, sc_mdhi);
276 offset("#define SC_MDLO ", struct sigcontext, sc_lo); 276 offset("#define SC_MDLO ", struct sigcontext, sc_mdlo);
277 offset("#define SC_PC ", struct sigcontext, sc_pc); 277 offset("#define SC_PC ", struct sigcontext, sc_pc);
278 offset("#define SC_FPC_CSR ", struct sigcontext, sc_fpc_csr); 278 offset("#define SC_FPC_CSR ", struct sigcontext, sc_fpc_csr);
279 linefeed; 279 linefeed;
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 58b3b14873cb..bef3e2dc7c52 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -121,6 +121,7 @@ static inline void check_wait(void)
121 case CPU_24K: 121 case CPU_24K:
122 case CPU_25KF: 122 case CPU_25KF:
123 case CPU_34K: 123 case CPU_34K:
124 case CPU_74K:
124 case CPU_PR4450: 125 case CPU_PR4450:
125 cpu_wait = r4k_wait; 126 cpu_wait = r4k_wait;
126 printk(" available.\n"); 127 printk(" available.\n");
@@ -432,6 +433,15 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c)
432 MIPS_CPU_LLSC; 433 MIPS_CPU_LLSC;
433 c->tlbsize = 64; 434 c->tlbsize = 64;
434 break; 435 break;
436 case PRID_IMP_R14000:
437 c->cputype = CPU_R14000;
438 c->isa_level = MIPS_CPU_ISA_IV;
439 c->options = MIPS_CPU_TLB | MIPS_CPU_4K_CACHE | MIPS_CPU_4KEX |
440 MIPS_CPU_FPU | MIPS_CPU_32FPR |
441 MIPS_CPU_COUNTER | MIPS_CPU_WATCH |
442 MIPS_CPU_LLSC;
443 c->tlbsize = 64;
444 break;
435 } 445 }
436} 446}
437 447
@@ -593,6 +603,9 @@ static inline void cpu_probe_mips(struct cpuinfo_mips *c)
593 case PRID_IMP_34K: 603 case PRID_IMP_34K:
594 c->cputype = CPU_34K; 604 c->cputype = CPU_34K;
595 break; 605 break;
606 case PRID_IMP_74K:
607 c->cputype = CPU_74K;
608 break;
596 } 609 }
597} 610}
598 611
diff --git a/arch/mips/kernel/entry.S b/arch/mips/kernel/entry.S
index d101d2fb24ca..a9c6de1b9542 100644
--- a/arch/mips/kernel/entry.S
+++ b/arch/mips/kernel/entry.S
@@ -101,7 +101,7 @@ FEXPORT(restore_all) # restore full frame
101 EMT 101 EMT
1021: 1021:
103 mfc0 v1, CP0_TCSTATUS 103 mfc0 v1, CP0_TCSTATUS
104 /* We set IXMT above, XOR should cler it here */ 104 /* We set IXMT above, XOR should clear it here */
105 xori v1, v1, TCSTATUS_IXMT 105 xori v1, v1, TCSTATUS_IXMT
106 or v1, v0, v1 106 or v1, v0, v1
107 mtc0 v1, CP0_TCSTATUS 107 mtc0 v1, CP0_TCSTATUS
diff --git a/arch/mips/kernel/gdb-low.S b/arch/mips/kernel/gdb-low.S
index 10f28fb9f008..5fd7a8af0c62 100644
--- a/arch/mips/kernel/gdb-low.S
+++ b/arch/mips/kernel/gdb-low.S
@@ -54,9 +54,11 @@
54 */ 54 */
55 mfc0 k0, CP0_CAUSE 55 mfc0 k0, CP0_CAUSE
56 andi k0, k0, 0x7c 56 andi k0, k0, 0x7c
57 add k1, k1, k0 57#ifdef CONFIG_64BIT
58 PTR_L k0, saved_vectors(k1) 58 dsll k0, k0, 1
59 jr k0 59#endif
60 PTR_L k1, saved_vectors(k0)
61 jr k1
60 nop 62 nop
611: 631:
62 move k0, sp 64 move k0, sp
diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c
index 84ab959f924a..9def554f335b 100644
--- a/arch/mips/kernel/proc.c
+++ b/arch/mips/kernel/proc.c
@@ -42,6 +42,7 @@ static const char *cpu_name[] = {
42 [CPU_R8000] = "R8000", 42 [CPU_R8000] = "R8000",
43 [CPU_R10000] = "R10000", 43 [CPU_R10000] = "R10000",
44 [CPU_R12000] = "R12000", 44 [CPU_R12000] = "R12000",
45 [CPU_R14000] = "R14000",
45 [CPU_R4300] = "R4300", 46 [CPU_R4300] = "R4300",
46 [CPU_R4650] = "R4650", 47 [CPU_R4650] = "R4650",
47 [CPU_R4700] = "R4700", 48 [CPU_R4700] = "R4700",
@@ -74,6 +75,7 @@ static const char *cpu_name[] = {
74 [CPU_24K] = "MIPS 24K", 75 [CPU_24K] = "MIPS 24K",
75 [CPU_25KF] = "MIPS 25Kf", 76 [CPU_25KF] = "MIPS 25Kf",
76 [CPU_34K] = "MIPS 34K", 77 [CPU_34K] = "MIPS 34K",
78 [CPU_74K] = "MIPS 74K",
77 [CPU_VR4111] = "NEC VR4111", 79 [CPU_VR4111] = "NEC VR4111",
78 [CPU_VR4121] = "NEC VR4121", 80 [CPU_VR4121] = "NEC VR4121",
79 [CPU_VR4122] = "NEC VR4122", 81 [CPU_VR4122] = "NEC VR4122",
diff --git a/arch/mips/kernel/signal-common.h b/arch/mips/kernel/signal-common.h
index 3ca786215d48..ce6cb915c0a7 100644
--- a/arch/mips/kernel/signal-common.h
+++ b/arch/mips/kernel/signal-common.h
@@ -31,7 +31,6 @@ setup_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc)
31 save_gp_reg(31); 31 save_gp_reg(31);
32#undef save_gp_reg 32#undef save_gp_reg
33 33
34#ifdef CONFIG_32BIT
35 err |= __put_user(regs->hi, &sc->sc_mdhi); 34 err |= __put_user(regs->hi, &sc->sc_mdhi);
36 err |= __put_user(regs->lo, &sc->sc_mdlo); 35 err |= __put_user(regs->lo, &sc->sc_mdlo);
37 if (cpu_has_dsp) { 36 if (cpu_has_dsp) {
@@ -43,20 +42,6 @@ setup_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc)
43 err |= __put_user(mflo3(), &sc->sc_lo3); 42 err |= __put_user(mflo3(), &sc->sc_lo3);
44 err |= __put_user(rddsp(DSP_MASK), &sc->sc_dsp); 43 err |= __put_user(rddsp(DSP_MASK), &sc->sc_dsp);
45 } 44 }
46#endif
47#ifdef CONFIG_64BIT
48 err |= __put_user(regs->hi, &sc->sc_hi[0]);
49 err |= __put_user(regs->lo, &sc->sc_lo[0]);
50 if (cpu_has_dsp) {
51 err |= __put_user(mfhi1(), &sc->sc_hi[1]);
52 err |= __put_user(mflo1(), &sc->sc_lo[1]);
53 err |= __put_user(mfhi2(), &sc->sc_hi[2]);
54 err |= __put_user(mflo2(), &sc->sc_lo[2]);
55 err |= __put_user(mfhi3(), &sc->sc_hi[3]);
56 err |= __put_user(mflo3(), &sc->sc_lo[3]);
57 err |= __put_user(rddsp(DSP_MASK), &sc->sc_dsp);
58 }
59#endif
60 45
61 err |= __put_user(!!used_math(), &sc->sc_used_math); 46 err |= __put_user(!!used_math(), &sc->sc_used_math);
62 47
@@ -92,7 +77,6 @@ restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc)
92 current_thread_info()->restart_block.fn = do_no_restart_syscall; 77 current_thread_info()->restart_block.fn = do_no_restart_syscall;
93 78
94 err |= __get_user(regs->cp0_epc, &sc->sc_pc); 79 err |= __get_user(regs->cp0_epc, &sc->sc_pc);
95#ifdef CONFIG_32BIT
96 err |= __get_user(regs->hi, &sc->sc_mdhi); 80 err |= __get_user(regs->hi, &sc->sc_mdhi);
97 err |= __get_user(regs->lo, &sc->sc_mdlo); 81 err |= __get_user(regs->lo, &sc->sc_mdlo);
98 if (cpu_has_dsp) { 82 if (cpu_has_dsp) {
@@ -104,20 +88,6 @@ restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc)
104 err |= __get_user(treg, &sc->sc_lo3); mtlo3(treg); 88 err |= __get_user(treg, &sc->sc_lo3); mtlo3(treg);
105 err |= __get_user(treg, &sc->sc_dsp); wrdsp(treg, DSP_MASK); 89 err |= __get_user(treg, &sc->sc_dsp); wrdsp(treg, DSP_MASK);
106 } 90 }
107#endif
108#ifdef CONFIG_64BIT
109 err |= __get_user(regs->hi, &sc->sc_hi[0]);
110 err |= __get_user(regs->lo, &sc->sc_lo[0]);
111 if (cpu_has_dsp) {
112 err |= __get_user(treg, &sc->sc_hi[1]); mthi1(treg);
113 err |= __get_user(treg, &sc->sc_lo[1]); mthi1(treg);
114 err |= __get_user(treg, &sc->sc_hi[2]); mthi2(treg);
115 err |= __get_user(treg, &sc->sc_lo[2]); mthi2(treg);
116 err |= __get_user(treg, &sc->sc_hi[3]); mthi3(treg);
117 err |= __get_user(treg, &sc->sc_lo[3]); mthi3(treg);
118 err |= __get_user(treg, &sc->sc_dsp); wrdsp(treg, DSP_MASK);
119 }
120#endif
121 91
122#define restore_gp_reg(i) do { \ 92#define restore_gp_reg(i) do { \
123 err |= __get_user(regs->regs[i], &sc->sc_regs[i]); \ 93 err |= __get_user(regs->regs[i], &sc->sc_regs[i]); \
diff --git a/arch/mips/kernel/syscall.c b/arch/mips/kernel/syscall.c
index 2aeaa2fd4b32..8f4fdd94dbd0 100644
--- a/arch/mips/kernel/syscall.c
+++ b/arch/mips/kernel/syscall.c
@@ -280,27 +280,6 @@ asmlinkage int _sys_sysmips(int cmd, long arg1, int arg2, int arg3)
280 char __user *name; 280 char __user *name;
281 281
282 switch(cmd) { 282 switch(cmd) {
283 case SETNAME: {
284 char nodename[__NEW_UTS_LEN + 1];
285
286 if (!capable(CAP_SYS_ADMIN))
287 return -EPERM;
288
289 name = (char __user *) arg1;
290
291 len = strncpy_from_user(nodename, name, __NEW_UTS_LEN);
292 if (len < 0)
293 return -EFAULT;
294
295 down_write(&uts_sem);
296 strncpy(system_utsname.nodename, nodename, len);
297 nodename[__NEW_UTS_LEN] = '\0';
298 strlcpy(system_utsname.nodename, nodename,
299 sizeof(system_utsname.nodename));
300 up_write(&uts_sem);
301 return 0;
302 }
303
304 case MIPS_ATOMIC_SET: 283 case MIPS_ATOMIC_SET:
305 printk(KERN_CRIT "How did I get here?\n"); 284 printk(KERN_CRIT "How did I get here?\n");
306 return -EINVAL; 285 return -EINVAL;
@@ -313,9 +292,6 @@ asmlinkage int _sys_sysmips(int cmd, long arg1, int arg2, int arg3)
313 case FLUSH_CACHE: 292 case FLUSH_CACHE:
314 __flush_cache_all(); 293 __flush_cache_all();
315 return 0; 294 return 0;
316
317 case MIPS_RDNVRAM:
318 return -EIO;
319 } 295 }
320 296
321 return -EINVAL; 297 return -EINVAL;
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index 4901f0a37fca..35cb08da3820 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -902,6 +902,7 @@ static inline void parity_protection_init(void)
902{ 902{
903 switch (current_cpu_data.cputype) { 903 switch (current_cpu_data.cputype) {
904 case CPU_24K: 904 case CPU_24K:
905 case CPU_34K:
905 case CPU_5KC: 906 case CPU_5KC:
906 write_c0_ecc(0x80000000); 907 write_c0_ecc(0x80000000);
907 back_to_back_c0_hazard(); 908 back_to_back_c0_hazard();
diff --git a/arch/mips/kernel/vmlinux.lds.S b/arch/mips/kernel/vmlinux.lds.S
index 14fa00e3cdfa..b84d1f9ce28e 100644
--- a/arch/mips/kernel/vmlinux.lds.S
+++ b/arch/mips/kernel/vmlinux.lds.S
@@ -151,23 +151,13 @@ SECTIONS
151 151
152 /* This is the MIPS specific mdebug section. */ 152 /* This is the MIPS specific mdebug section. */
153 .mdebug : { *(.mdebug) } 153 .mdebug : { *(.mdebug) }
154 /* These are needed for ELF backends which have not yet been 154
155 converted to the new style linker. */ 155 STABS_DEBUG
156 .stab 0 : { *(.stab) } 156
157 .stabstr 0 : { *(.stabstr) } 157 DWARF_DEBUG
158 /* DWARF debug sections. 158
159 Symbols in the .debug DWARF section are relative to the beginning of the
160 section so we begin .debug at 0. It's not clear yet what needs to happen
161 for the others. */
162 .debug 0 : { *(.debug) }
163 .debug_srcinfo 0 : { *(.debug_srcinfo) }
164 .debug_aranges 0 : { *(.debug_aranges) }
165 .debug_pubnames 0 : { *(.debug_pubnames) }
166 .debug_sfnames 0 : { *(.debug_sfnames) }
167 .line 0 : { *(.line) }
168 /* These must appear regardless of . */ 159 /* These must appear regardless of . */
169 .gptab.sdata : { *(.gptab.data) *(.gptab.sdata) } 160 .gptab.sdata : { *(.gptab.data) *(.gptab.sdata) }
170 .gptab.sbss : { *(.gptab.bss) *(.gptab.sbss) } 161 .gptab.sbss : { *(.gptab.bss) *(.gptab.sbss) }
171 .comment : { *(.comment) }
172 .note : { *(.note) } 162 .note : { *(.note) }
173} 163}
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index 4182e1176fae..6b3541769602 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -29,6 +29,27 @@
29#include <asm/war.h> 29#include <asm/war.h>
30#include <asm/cacheflush.h> /* for run_uncached() */ 30#include <asm/cacheflush.h> /* for run_uncached() */
31 31
32
33/*
34 * Special Variant of smp_call_function for use by cache functions:
35 *
36 * o No return value
37 * o collapses to normal function call on UP kernels
38 * o collapses to normal function call on systems with a single shared
39 * primary cache.
40 */
41static inline void r4k_on_each_cpu(void (*func) (void *info), void *info,
42 int retry, int wait)
43{
44 preempt_disable();
45
46#if !defined(CONFIG_MIPS_MT_SMP) && !defined(CONFIG_MIPS_MT_SMTC)
47 smp_call_function(func, info, retry, wait);
48#endif
49 func(info);
50 preempt_enable();
51}
52
32/* 53/*
33 * Must die. 54 * Must die.
34 */ 55 */
@@ -299,7 +320,7 @@ static void r4k_flush_cache_all(void)
299 if (!cpu_has_dc_aliases) 320 if (!cpu_has_dc_aliases)
300 return; 321 return;
301 322
302 on_each_cpu(local_r4k_flush_cache_all, NULL, 1, 1); 323 r4k_on_each_cpu(local_r4k_flush_cache_all, NULL, 1, 1);
303} 324}
304 325
305static inline void local_r4k___flush_cache_all(void * args) 326static inline void local_r4k___flush_cache_all(void * args)
@@ -314,13 +335,14 @@ static inline void local_r4k___flush_cache_all(void * args)
314 case CPU_R4400MC: 335 case CPU_R4400MC:
315 case CPU_R10000: 336 case CPU_R10000:
316 case CPU_R12000: 337 case CPU_R12000:
338 case CPU_R14000:
317 r4k_blast_scache(); 339 r4k_blast_scache();
318 } 340 }
319} 341}
320 342
321static void r4k___flush_cache_all(void) 343static void r4k___flush_cache_all(void)
322{ 344{
323 on_each_cpu(local_r4k___flush_cache_all, NULL, 1, 1); 345 r4k_on_each_cpu(local_r4k___flush_cache_all, NULL, 1, 1);
324} 346}
325 347
326static inline void local_r4k_flush_cache_range(void * args) 348static inline void local_r4k_flush_cache_range(void * args)
@@ -341,7 +363,7 @@ static inline void local_r4k_flush_cache_range(void * args)
341static void r4k_flush_cache_range(struct vm_area_struct *vma, 363static void r4k_flush_cache_range(struct vm_area_struct *vma,
342 unsigned long start, unsigned long end) 364 unsigned long start, unsigned long end)
343{ 365{
344 on_each_cpu(local_r4k_flush_cache_range, vma, 1, 1); 366 r4k_on_each_cpu(local_r4k_flush_cache_range, vma, 1, 1);
345} 367}
346 368
347static inline void local_r4k_flush_cache_mm(void * args) 369static inline void local_r4k_flush_cache_mm(void * args)
@@ -370,7 +392,7 @@ static void r4k_flush_cache_mm(struct mm_struct *mm)
370 if (!cpu_has_dc_aliases) 392 if (!cpu_has_dc_aliases)
371 return; 393 return;
372 394
373 on_each_cpu(local_r4k_flush_cache_mm, mm, 1, 1); 395 r4k_on_each_cpu(local_r4k_flush_cache_mm, mm, 1, 1);
374} 396}
375 397
376struct flush_cache_page_args { 398struct flush_cache_page_args {
@@ -461,7 +483,7 @@ static void r4k_flush_cache_page(struct vm_area_struct *vma,
461 args.addr = addr; 483 args.addr = addr;
462 args.pfn = pfn; 484 args.pfn = pfn;
463 485
464 on_each_cpu(local_r4k_flush_cache_page, &args, 1, 1); 486 r4k_on_each_cpu(local_r4k_flush_cache_page, &args, 1, 1);
465} 487}
466 488
467static inline void local_r4k_flush_data_cache_page(void * addr) 489static inline void local_r4k_flush_data_cache_page(void * addr)
@@ -471,7 +493,7 @@ static inline void local_r4k_flush_data_cache_page(void * addr)
471 493
472static void r4k_flush_data_cache_page(unsigned long addr) 494static void r4k_flush_data_cache_page(unsigned long addr)
473{ 495{
474 on_each_cpu(local_r4k_flush_data_cache_page, (void *) addr, 1, 1); 496 r4k_on_each_cpu(local_r4k_flush_data_cache_page, (void *) addr, 1, 1);
475} 497}
476 498
477struct flush_icache_range_args { 499struct flush_icache_range_args {
@@ -514,7 +536,7 @@ static void r4k_flush_icache_range(unsigned long start, unsigned long end)
514 args.start = start; 536 args.start = start;
515 args.end = end; 537 args.end = end;
516 538
517 on_each_cpu(local_r4k_flush_icache_range, &args, 1, 1); 539 r4k_on_each_cpu(local_r4k_flush_icache_range, &args, 1, 1);
518 instruction_hazard(); 540 instruction_hazard();
519} 541}
520 542
@@ -590,7 +612,7 @@ static void r4k_flush_icache_page(struct vm_area_struct *vma,
590 args.vma = vma; 612 args.vma = vma;
591 args.page = page; 613 args.page = page;
592 614
593 on_each_cpu(local_r4k_flush_icache_page, &args, 1, 1); 615 r4k_on_each_cpu(local_r4k_flush_icache_page, &args, 1, 1);
594} 616}
595 617
596 618
@@ -689,7 +711,7 @@ static void local_r4k_flush_cache_sigtramp(void * arg)
689 711
690static void r4k_flush_cache_sigtramp(unsigned long addr) 712static void r4k_flush_cache_sigtramp(unsigned long addr)
691{ 713{
692 on_each_cpu(local_r4k_flush_cache_sigtramp, (void *) addr, 1, 1); 714 r4k_on_each_cpu(local_r4k_flush_cache_sigtramp, (void *) addr, 1, 1);
693} 715}
694 716
695static void r4k_flush_icache_all(void) 717static void r4k_flush_icache_all(void)
@@ -812,6 +834,7 @@ static void __init probe_pcache(void)
812 834
813 case CPU_R10000: 835 case CPU_R10000:
814 case CPU_R12000: 836 case CPU_R12000:
837 case CPU_R14000:
815 icache_size = 1 << (12 + ((config & R10K_CONF_IC) >> 29)); 838 icache_size = 1 << (12 + ((config & R10K_CONF_IC) >> 29));
816 c->icache.linesz = 64; 839 c->icache.linesz = 64;
817 c->icache.ways = 2; 840 c->icache.ways = 2;
@@ -965,9 +988,11 @@ static void __init probe_pcache(void)
965 c->dcache.flags |= MIPS_CACHE_PINDEX; 988 c->dcache.flags |= MIPS_CACHE_PINDEX;
966 case CPU_R10000: 989 case CPU_R10000:
967 case CPU_R12000: 990 case CPU_R12000:
991 case CPU_R14000:
968 case CPU_SB1: 992 case CPU_SB1:
969 break; 993 break;
970 case CPU_24K: 994 case CPU_24K:
995 case CPU_34K:
971 if (!(read_c0_config7() & (1 << 16))) 996 if (!(read_c0_config7() & (1 << 16)))
972 default: 997 default:
973 if (c->dcache.waysize > PAGE_SIZE) 998 if (c->dcache.waysize > PAGE_SIZE)
@@ -1091,6 +1116,7 @@ static void __init setup_scache(void)
1091 1116
1092 case CPU_R10000: 1117 case CPU_R10000:
1093 case CPU_R12000: 1118 case CPU_R12000:
1119 case CPU_R14000:
1094 scache_size = 0x80000 << ((config & R10K_CONF_SS) >> 16); 1120 scache_size = 0x80000 << ((config & R10K_CONF_SS) >> 16);
1095 c->scache.linesz = 64 << ((config >> 13) & 1); 1121 c->scache.linesz = 64 << ((config >> 13) & 1);
1096 c->scache.ways = 2; 1122 c->scache.ways = 2;
diff --git a/arch/mips/mm/pg-r4k.c b/arch/mips/mm/pg-r4k.c
index e4390dc3eb48..b7c749232ffe 100644
--- a/arch/mips/mm/pg-r4k.c
+++ b/arch/mips/mm/pg-r4k.c
@@ -357,6 +357,7 @@ void __init build_clear_page(void)
357 357
358 case CPU_R10000: 358 case CPU_R10000:
359 case CPU_R12000: 359 case CPU_R12000:
360 case CPU_R14000:
360 pref_src_mode = Pref_LoadStreamed; 361 pref_src_mode = Pref_LoadStreamed;
361 pref_dst_mode = Pref_StoreStreamed; 362 pref_dst_mode = Pref_StoreStreamed;
362 break; 363 break;
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index 053dbacac56b..54507be2ab5b 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -875,6 +875,7 @@ static __init void build_tlb_write_entry(u32 **p, struct label **l,
875 875
876 case CPU_R10000: 876 case CPU_R10000:
877 case CPU_R12000: 877 case CPU_R12000:
878 case CPU_R14000:
878 case CPU_4KC: 879 case CPU_4KC:
879 case CPU_SB1: 880 case CPU_SB1:
880 case CPU_SB1A: 881 case CPU_SB1A:
@@ -906,6 +907,7 @@ static __init void build_tlb_write_entry(u32 **p, struct label **l,
906 case CPU_4KEC: 907 case CPU_4KEC:
907 case CPU_24K: 908 case CPU_24K:
908 case CPU_34K: 909 case CPU_34K:
910 case CPU_74K:
909 i_ehb(p); 911 i_ehb(p);
910 tlbw(p); 912 tlbw(p);
911 break; 913 break;
diff --git a/arch/mips/oprofile/common.c b/arch/mips/oprofile/common.c
index f2b4862aaae5..91b799d2cd88 100644
--- a/arch/mips/oprofile/common.c
+++ b/arch/mips/oprofile/common.c
@@ -80,6 +80,7 @@ int __init oprofile_arch_init(struct oprofile_operations *ops)
80 case CPU_24K: 80 case CPU_24K:
81 case CPU_25KF: 81 case CPU_25KF:
82 case CPU_34K: 82 case CPU_34K:
83 case CPU_74K:
83 case CPU_SB1: 84 case CPU_SB1:
84 case CPU_SB1A: 85 case CPU_SB1A:
85 lmodel = &op_model_mipsxx; 86 lmodel = &op_model_mipsxx;
diff --git a/arch/mips/oprofile/op_model_mipsxx.c b/arch/mips/oprofile/op_model_mipsxx.c
index 95d488ca0754..e7ce92391303 100644
--- a/arch/mips/oprofile/op_model_mipsxx.c
+++ b/arch/mips/oprofile/op_model_mipsxx.c
@@ -205,6 +205,10 @@ static int __init mipsxx_init(void)
205 case CPU_34K: 205 case CPU_34K:
206 op_model_mipsxx.cpu_type = "mips/34K"; 206 op_model_mipsxx.cpu_type = "mips/34K";
207 break; 207 break;
208
209 case CPU_74K:
210 op_model_mipsxx.cpu_type = "mips/74K";
211 break;
208#endif 212#endif
209 213
210 case CPU_5KC: 214 case CPU_5KC:
diff --git a/include/asm-mips/cpu.h b/include/asm-mips/cpu.h
index 818b9a97e214..dff2a0a52f8f 100644
--- a/include/asm-mips/cpu.h
+++ b/include/asm-mips/cpu.h
@@ -51,6 +51,7 @@
51#define PRID_IMP_R4300 0x0b00 51#define PRID_IMP_R4300 0x0b00
52#define PRID_IMP_VR41XX 0x0c00 52#define PRID_IMP_VR41XX 0x0c00
53#define PRID_IMP_R12000 0x0e00 53#define PRID_IMP_R12000 0x0e00
54#define PRID_IMP_R14000 0x0f00
54#define PRID_IMP_R8000 0x1000 55#define PRID_IMP_R8000 0x1000
55#define PRID_IMP_PR4450 0x1200 56#define PRID_IMP_PR4450 0x1200
56#define PRID_IMP_R4600 0x2000 57#define PRID_IMP_R4600 0x2000
@@ -87,6 +88,7 @@
87#define PRID_IMP_24K 0x9300 88#define PRID_IMP_24K 0x9300
88#define PRID_IMP_34K 0x9500 89#define PRID_IMP_34K 0x9500
89#define PRID_IMP_24KE 0x9600 90#define PRID_IMP_24KE 0x9600
91#define PRID_IMP_74K 0x9700
90 92
91/* 93/*
92 * These are the PRID's for when 23:16 == PRID_COMP_SIBYTE 94 * These are the PRID's for when 23:16 == PRID_COMP_SIBYTE
@@ -196,7 +198,9 @@
196#define CPU_34K 60 198#define CPU_34K 60
197#define CPU_PR4450 61 199#define CPU_PR4450 61
198#define CPU_SB1A 62 200#define CPU_SB1A 62
199#define CPU_LAST 62 201#define CPU_74K 63
202#define CPU_R14000 64
203#define CPU_LAST 64
200 204
201/* 205/*
202 * ISA Level encodings 206 * ISA Level encodings
diff --git a/include/asm-mips/futex.h b/include/asm-mips/futex.h
index a554089991f2..12d118f1bc9c 100644
--- a/include/asm-mips/futex.h
+++ b/include/asm-mips/futex.h
@@ -7,6 +7,7 @@
7#include <linux/futex.h> 7#include <linux/futex.h>
8#include <asm/errno.h> 8#include <asm/errno.h>
9#include <asm/uaccess.h> 9#include <asm/uaccess.h>
10#include <asm/war.h>
10 11
11#ifdef CONFIG_SMP 12#ifdef CONFIG_SMP
12#define __FUTEX_SMP_SYNC " sync \n" 13#define __FUTEX_SMP_SYNC " sync \n"
@@ -16,30 +17,58 @@
16 17
17#define __futex_atomic_op(insn, ret, oldval, uaddr, oparg) \ 18#define __futex_atomic_op(insn, ret, oldval, uaddr, oparg) \
18{ \ 19{ \
19 __asm__ __volatile__( \ 20 if (cpu_has_llsc && R10000_LLSC_WAR) { \
20 " .set push \n" \ 21 __asm__ __volatile__( \
21 " .set noat \n" \ 22 " .set push \n" \
22 " .set mips3 \n" \ 23 " .set noat \n" \
23 "1: ll %1, (%3) # __futex_atomic_op1 \n" \ 24 " .set mips3 \n" \
24 " .set mips0 \n" \ 25 "1: ll %1, (%3) # __futex_atomic_op \n" \
25 " " insn " \n" \ 26 " .set mips0 \n" \
26 " .set mips3 \n" \ 27 " " insn " \n" \
27 "2: sc $1, (%3) \n" \ 28 " .set mips3 \n" \
28 " beqzl $1, 1b \n" \ 29 "2: sc $1, (%3) \n" \
29 __FUTEX_SMP_SYNC \ 30 " beqzl $1, 1b \n" \
30 "3: \n" \ 31 __FUTEX_SMP_SYNC \
31 " .set pop \n" \ 32 "3: \n" \
32 " .set mips0 \n" \ 33 " .set pop \n" \
33 " .section .fixup,\"ax\" \n" \ 34 " .set mips0 \n" \
34 "4: li %0, %5 \n" \ 35 " .section .fixup,\"ax\" \n" \
35 " j 2b \n" \ 36 "4: li %0, %5 \n" \
36 " .previous \n" \ 37 " j 2b \n" \
37 " .section __ex_table,\"a\" \n" \ 38 " .previous \n" \
38 " "__UA_ADDR "\t1b, 4b \n" \ 39 " .section __ex_table,\"a\" \n" \
39 " "__UA_ADDR "\t2b, 4b \n" \ 40 " "__UA_ADDR "\t1b, 4b \n" \
40 " .previous \n" \ 41 " "__UA_ADDR "\t2b, 4b \n" \
41 : "=r" (ret), "=r" (oldval) \ 42 " .previous \n" \
42 : "0" (0), "r" (uaddr), "Jr" (oparg), "i" (-EFAULT)); \ 43 : "=r" (ret), "=r" (oldval) \
44 : "0" (0), "r" (uaddr), "Jr" (oparg), "i" (-EFAULT)); \
45 } else if (cpu_has_llsc) { \
46 __asm__ __volatile__( \
47 " .set push \n" \
48 " .set noat \n" \
49 " .set mips3 \n" \
50 "1: ll %1, (%3) # __futex_atomic_op \n" \
51 " .set mips0 \n" \
52 " " insn " \n" \
53 " .set mips3 \n" \
54 "2: sc $1, (%3) \n" \
55 " beqz $1, 1b \n" \
56 __FUTEX_SMP_SYNC \
57 "3: \n" \
58 " .set pop \n" \
59 " .set mips0 \n" \
60 " .section .fixup,\"ax\" \n" \
61 "4: li %0, %5 \n" \
62 " j 2b \n" \
63 " .previous \n" \
64 " .section __ex_table,\"a\" \n" \
65 " "__UA_ADDR "\t1b, 4b \n" \
66 " "__UA_ADDR "\t2b, 4b \n" \
67 " .previous \n" \
68 : "=r" (ret), "=r" (oldval) \
69 : "0" (0), "r" (uaddr), "Jr" (oparg), "i" (-EFAULT)); \
70 } else \
71 ret = -ENOSYS; \
43} 72}
44 73
45static inline int 74static inline int
@@ -102,7 +131,69 @@ futex_atomic_op_inuser (int encoded_op, int __user *uaddr)
102static inline int 131static inline int
103futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval, int newval) 132futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval, int newval)
104{ 133{
105 return -ENOSYS; 134 int retval;
135
136 if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int)))
137 return -EFAULT;
138
139 if (cpu_has_llsc && R10000_LLSC_WAR) {
140 __asm__ __volatile__(
141 "# futex_atomic_cmpxchg_inatomic \n"
142 " .set push \n"
143 " .set noat \n"
144 " .set mips3 \n"
145 "1: ll %0, %2 \n"
146 " bne %0, %z3, 3f \n"
147 " .set mips0 \n"
148 " move $1, %z4 \n"
149 " .set mips3 \n"
150 "2: sc $1, %1 \n"
151 " beqzl $1, 1b \n"
152 __FUTEX_SMP_SYNC
153 "3: \n"
154 " .set pop \n"
155 " .section .fixup,\"ax\" \n"
156 "4: li %0, %5 \n"
157 " j 3b \n"
158 " .previous \n"
159 " .section __ex_table,\"a\" \n"
160 " "__UA_ADDR "\t1b, 4b \n"
161 " "__UA_ADDR "\t2b, 4b \n"
162 " .previous \n"
163 : "=&r" (retval), "=R" (*uaddr)
164 : "R" (*uaddr), "Jr" (oldval), "Jr" (newval), "i" (-EFAULT)
165 : "memory");
166 } else if (cpu_has_llsc) {
167 __asm__ __volatile__(
168 "# futex_atomic_cmpxchg_inatomic \n"
169 " .set push \n"
170 " .set noat \n"
171 " .set mips3 \n"
172 "1: ll %0, %2 \n"
173 " bne %0, %z3, 3f \n"
174 " .set mips0 \n"
175 " move $1, %z4 \n"
176 " .set mips3 \n"
177 "2: sc $1, %1 \n"
178 " beqz $1, 1b \n"
179 __FUTEX_SMP_SYNC
180 "3: \n"
181 " .set pop \n"
182 " .section .fixup,\"ax\" \n"
183 "4: li %0, %5 \n"
184 " j 3b \n"
185 " .previous \n"
186 " .section __ex_table,\"a\" \n"
187 " "__UA_ADDR "\t1b, 4b \n"
188 " "__UA_ADDR "\t2b, 4b \n"
189 " .previous \n"
190 : "=&r" (retval), "=R" (*uaddr)
191 : "R" (*uaddr), "Jr" (oldval), "Jr" (newval), "i" (-EFAULT)
192 : "memory");
193 } else
194 return -ENOSYS;
195
196 return retval;
106} 197}
107 198
108#endif 199#endif
diff --git a/include/asm-mips/inst.h b/include/asm-mips/inst.h
index e0745f4ff624..1ed8d0f62577 100644
--- a/include/asm-mips/inst.h
+++ b/include/asm-mips/inst.h
@@ -6,6 +6,7 @@
6 * for more details. 6 * for more details.
7 * 7 *
8 * Copyright (C) 1996, 2000 by Ralf Baechle 8 * Copyright (C) 1996, 2000 by Ralf Baechle
9 * Copyright (C) 2006 by Thiemo Seufer
9 */ 10 */
10#ifndef _ASM_INST_H 11#ifndef _ASM_INST_H
11#define _ASM_INST_H 12#define _ASM_INST_H
@@ -21,14 +22,14 @@ enum major_op {
21 cop0_op, cop1_op, cop2_op, cop1x_op, 22 cop0_op, cop1_op, cop2_op, cop1x_op,
22 beql_op, bnel_op, blezl_op, bgtzl_op, 23 beql_op, bnel_op, blezl_op, bgtzl_op,
23 daddi_op, daddiu_op, ldl_op, ldr_op, 24 daddi_op, daddiu_op, ldl_op, ldr_op,
24 major_1c_op, jalx_op, major_1e_op, major_1f_op, 25 spec2_op, jalx_op, mdmx_op, spec3_op,
25 lb_op, lh_op, lwl_op, lw_op, 26 lb_op, lh_op, lwl_op, lw_op,
26 lbu_op, lhu_op, lwr_op, lwu_op, 27 lbu_op, lhu_op, lwr_op, lwu_op,
27 sb_op, sh_op, swl_op, sw_op, 28 sb_op, sh_op, swl_op, sw_op,
28 sdl_op, sdr_op, swr_op, cache_op, 29 sdl_op, sdr_op, swr_op, cache_op,
29 ll_op, lwc1_op, lwc2_op, pref_op, 30 ll_op, lwc1_op, lwc2_op, pref_op,
30 lld_op, ldc1_op, ldc2_op, ld_op, 31 lld_op, ldc1_op, ldc2_op, ld_op,
31 sc_op, swc1_op, swc2_op, rdhwr_op, 32 sc_op, swc1_op, swc2_op, major_3b_op,
32 scd_op, sdc1_op, sdc2_op, sd_op 33 scd_op, sdc1_op, sdc2_op, sd_op
33}; 34};
34 35
@@ -37,7 +38,7 @@ enum major_op {
37 */ 38 */
38enum spec_op { 39enum spec_op {
39 sll_op, movc_op, srl_op, sra_op, 40 sll_op, movc_op, srl_op, sra_op,
40 sllv_op, srlv_op, srav_op, spec1_unused_op, /* Opcode 0x07 is unused */ 41 sllv_op, pmon_op, srlv_op, srav_op,
41 jr_op, jalr_op, movz_op, movn_op, 42 jr_op, jalr_op, movz_op, movn_op,
42 syscall_op, break_op, spim_op, sync_op, 43 syscall_op, break_op, spim_op, sync_op,
43 mfhi_op, mthi_op, mflo_op, mtlo_op, 44 mfhi_op, mthi_op, mflo_op, mtlo_op,
@@ -55,6 +56,28 @@ enum spec_op {
55}; 56};
56 57
57/* 58/*
59 * func field of spec2 opcode.
60 */
61enum spec2_op {
62 madd_op, maddu_op, mul_op, spec2_3_unused_op,
63 msub_op, msubu_op, /* more unused ops */
64 clz_op = 0x20, clo_op,
65 dclz_op = 0x24, dclo_op,
66 sdbpp_op = 0x3f
67};
68
69/*
70 * func field of spec3 opcode.
71 */
72enum spec3_op {
73 ext_op, dextm_op, dextu_op, dext_op,
74 ins_op, dinsm_op, dinsu_op, dins_op,
75 bshfl_op = 0x20,
76 dbshfl_op = 0x24,
77 rdhwr_op = 0x3f
78};
79
80/*
58 * rt field of bcond opcodes. 81 * rt field of bcond opcodes.
59 */ 82 */
60enum rt_op { 83enum rt_op {
@@ -151,8 +174,8 @@ enum cop1x_func {
151 * func field for mad opcodes (MIPS IV). 174 * func field for mad opcodes (MIPS IV).
152 */ 175 */
153enum mad_func { 176enum mad_func {
154 madd_op = 0x08, msub_op = 0x0a, 177 madd_fp_op = 0x08, msub_fp_op = 0x0a,
155 nmadd_op = 0x0c, nmsub_op = 0x0e 178 nmadd_fp_op = 0x0c, nmsub_fp_op = 0x0e
156}; 179};
157 180
158/* 181/*
diff --git a/include/asm-mips/mipsregs.h b/include/asm-mips/mipsregs.h
index a2ef579f6b1a..5af7517fce8a 100644
--- a/include/asm-mips/mipsregs.h
+++ b/include/asm-mips/mipsregs.h
@@ -291,7 +291,7 @@
291#define ST0_DL (_ULCAST_(1) << 24) 291#define ST0_DL (_ULCAST_(1) << 24)
292 292
293/* 293/*
294 * Enable the MIPS DSP ASE 294 * Enable the MIPS MDMX and DSP ASEs
295 */ 295 */
296#define ST0_MX 0x01000000 296#define ST0_MX 0x01000000
297 297
diff --git a/include/asm-mips/pgtable.h b/include/asm-mips/pgtable.h
index 702a28fa7a34..174a3cda8c26 100644
--- a/include/asm-mips/pgtable.h
+++ b/include/asm-mips/pgtable.h
@@ -82,10 +82,11 @@ extern void paging_init(void);
82#define pmd_page(pmd) (pfn_to_page(pmd_phys(pmd) >> PAGE_SHIFT)) 82#define pmd_page(pmd) (pfn_to_page(pmd_phys(pmd) >> PAGE_SHIFT))
83#define pmd_page_kernel(pmd) pmd_val(pmd) 83#define pmd_page_kernel(pmd) pmd_val(pmd)
84 84
85#define pte_none(pte) (!(pte_val(pte) & ~_PAGE_GLOBAL))
86#define pte_present(pte) (pte_val(pte) & _PAGE_PRESENT)
87
88#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32_R1) 85#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32_R1)
86
87#define pte_none(pte) (!(((pte).pte_low | (pte).pte_high) & ~_PAGE_GLOBAL))
88#define pte_present(pte) ((pte).pte_low & _PAGE_PRESENT)
89
89static inline void set_pte(pte_t *ptep, pte_t pte) 90static inline void set_pte(pte_t *ptep, pte_t pte)
90{ 91{
91 ptep->pte_high = pte.pte_high; 92 ptep->pte_high = pte.pte_high;
@@ -93,27 +94,35 @@ static inline void set_pte(pte_t *ptep, pte_t pte)
93 ptep->pte_low = pte.pte_low; 94 ptep->pte_low = pte.pte_low;
94 //printk("pte_high %x pte_low %x\n", ptep->pte_high, ptep->pte_low); 95 //printk("pte_high %x pte_low %x\n", ptep->pte_high, ptep->pte_low);
95 96
96 if (pte_val(pte) & _PAGE_GLOBAL) { 97 if (pte.pte_low & _PAGE_GLOBAL) {
97 pte_t *buddy = ptep_buddy(ptep); 98 pte_t *buddy = ptep_buddy(ptep);
98 /* 99 /*
99 * Make sure the buddy is global too (if it's !none, 100 * Make sure the buddy is global too (if it's !none,
100 * it better already be global) 101 * it better already be global)
101 */ 102 */
102 if (pte_none(*buddy)) 103 if (pte_none(*buddy)) {
103 buddy->pte_low |= _PAGE_GLOBAL; 104 buddy->pte_low |= _PAGE_GLOBAL;
105 buddy->pte_high |= _PAGE_GLOBAL;
106 }
104 } 107 }
105} 108}
106#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval) 109#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
107 110
108static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) 111static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
109{ 112{
113 pte_t null = __pte(0);
114
110 /* Preserve global status for the pair */ 115 /* Preserve global status for the pair */
111 if (pte_val(*ptep_buddy(ptep)) & _PAGE_GLOBAL) 116 if (ptep_buddy(ptep)->pte_low & _PAGE_GLOBAL)
112 set_pte_at(mm, addr, ptep, __pte(_PAGE_GLOBAL)); 117 null.pte_low = null.pte_high = _PAGE_GLOBAL;
113 else 118
114 set_pte_at(mm, addr, ptep, __pte(0)); 119 set_pte_at(mm, addr, ptep, null);
115} 120}
116#else 121#else
122
123#define pte_none(pte) (!(pte_val(pte) & ~_PAGE_GLOBAL))
124#define pte_present(pte) (pte_val(pte) & _PAGE_PRESENT)
125
117/* 126/*
118 * Certain architectures need to do special things when pte's 127 * Certain architectures need to do special things when pte's
119 * within a page table are directly modified. Thus, the following 128 * within a page table are directly modified. Thus, the following
@@ -174,75 +183,76 @@ extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
174 */ 183 */
175static inline int pte_user(pte_t pte) { BUG(); return 0; } 184static inline int pte_user(pte_t pte) { BUG(); return 0; }
176#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32_R1) 185#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32_R1)
177static inline int pte_read(pte_t pte) { return (pte).pte_low & _PAGE_READ; } 186static inline int pte_read(pte_t pte) { return pte.pte_low & _PAGE_READ; }
178static inline int pte_write(pte_t pte) { return (pte).pte_low & _PAGE_WRITE; } 187static inline int pte_write(pte_t pte) { return pte.pte_low & _PAGE_WRITE; }
179static inline int pte_dirty(pte_t pte) { return (pte).pte_low & _PAGE_MODIFIED; } 188static inline int pte_dirty(pte_t pte) { return pte.pte_low & _PAGE_MODIFIED; }
180static inline int pte_young(pte_t pte) { return (pte).pte_low & _PAGE_ACCESSED; } 189static inline int pte_young(pte_t pte) { return pte.pte_low & _PAGE_ACCESSED; }
181static inline int pte_file(pte_t pte) { return (pte).pte_low & _PAGE_FILE; } 190static inline int pte_file(pte_t pte) { return pte.pte_low & _PAGE_FILE; }
191
182static inline pte_t pte_wrprotect(pte_t pte) 192static inline pte_t pte_wrprotect(pte_t pte)
183{ 193{
184 (pte).pte_low &= ~(_PAGE_WRITE | _PAGE_SILENT_WRITE); 194 pte.pte_low &= ~(_PAGE_WRITE | _PAGE_SILENT_WRITE);
185 (pte).pte_high &= ~_PAGE_SILENT_WRITE; 195 pte.pte_high &= ~_PAGE_SILENT_WRITE;
186 return pte; 196 return pte;
187} 197}
188 198
189static inline pte_t pte_rdprotect(pte_t pte) 199static inline pte_t pte_rdprotect(pte_t pte)
190{ 200{
191 (pte).pte_low &= ~(_PAGE_READ | _PAGE_SILENT_READ); 201 pte.pte_low &= ~(_PAGE_READ | _PAGE_SILENT_READ);
192 (pte).pte_high &= ~_PAGE_SILENT_READ; 202 pte.pte_high &= ~_PAGE_SILENT_READ;
193 return pte; 203 return pte;
194} 204}
195 205
196static inline pte_t pte_mkclean(pte_t pte) 206static inline pte_t pte_mkclean(pte_t pte)
197{ 207{
198 (pte).pte_low &= ~(_PAGE_MODIFIED|_PAGE_SILENT_WRITE); 208 pte.pte_low &= ~(_PAGE_MODIFIED | _PAGE_SILENT_WRITE);
199 (pte).pte_high &= ~_PAGE_SILENT_WRITE; 209 pte.pte_high &= ~_PAGE_SILENT_WRITE;
200 return pte; 210 return pte;
201} 211}
202 212
203static inline pte_t pte_mkold(pte_t pte) 213static inline pte_t pte_mkold(pte_t pte)
204{ 214{
205 (pte).pte_low &= ~(_PAGE_ACCESSED|_PAGE_SILENT_READ); 215 pte.pte_low &= ~(_PAGE_ACCESSED | _PAGE_SILENT_READ);
206 (pte).pte_high &= ~_PAGE_SILENT_READ; 216 pte.pte_high &= ~_PAGE_SILENT_READ;
207 return pte; 217 return pte;
208} 218}
209 219
210static inline pte_t pte_mkwrite(pte_t pte) 220static inline pte_t pte_mkwrite(pte_t pte)
211{ 221{
212 (pte).pte_low |= _PAGE_WRITE; 222 pte.pte_low |= _PAGE_WRITE;
213 if ((pte).pte_low & _PAGE_MODIFIED) { 223 if (pte.pte_low & _PAGE_MODIFIED) {
214 (pte).pte_low |= _PAGE_SILENT_WRITE; 224 pte.pte_low |= _PAGE_SILENT_WRITE;
215 (pte).pte_high |= _PAGE_SILENT_WRITE; 225 pte.pte_high |= _PAGE_SILENT_WRITE;
216 } 226 }
217 return pte; 227 return pte;
218} 228}
219 229
220static inline pte_t pte_mkread(pte_t pte) 230static inline pte_t pte_mkread(pte_t pte)
221{ 231{
222 (pte).pte_low |= _PAGE_READ; 232 pte.pte_low |= _PAGE_READ;
223 if ((pte).pte_low & _PAGE_ACCESSED) { 233 if (pte.pte_low & _PAGE_ACCESSED) {
224 (pte).pte_low |= _PAGE_SILENT_READ; 234 pte.pte_low |= _PAGE_SILENT_READ;
225 (pte).pte_high |= _PAGE_SILENT_READ; 235 pte.pte_high |= _PAGE_SILENT_READ;
226 } 236 }
227 return pte; 237 return pte;
228} 238}
229 239
230static inline pte_t pte_mkdirty(pte_t pte) 240static inline pte_t pte_mkdirty(pte_t pte)
231{ 241{
232 (pte).pte_low |= _PAGE_MODIFIED; 242 pte.pte_low |= _PAGE_MODIFIED;
233 if ((pte).pte_low & _PAGE_WRITE) { 243 if (pte.pte_low & _PAGE_WRITE) {
234 (pte).pte_low |= _PAGE_SILENT_WRITE; 244 pte.pte_low |= _PAGE_SILENT_WRITE;
235 (pte).pte_high |= _PAGE_SILENT_WRITE; 245 pte.pte_high |= _PAGE_SILENT_WRITE;
236 } 246 }
237 return pte; 247 return pte;
238} 248}
239 249
240static inline pte_t pte_mkyoung(pte_t pte) 250static inline pte_t pte_mkyoung(pte_t pte)
241{ 251{
242 (pte).pte_low |= _PAGE_ACCESSED; 252 pte.pte_low |= _PAGE_ACCESSED;
243 if ((pte).pte_low & _PAGE_READ) 253 if (pte.pte_low & _PAGE_READ)
244 (pte).pte_low |= _PAGE_SILENT_READ; 254 pte.pte_low |= _PAGE_SILENT_READ;
245 (pte).pte_high |= _PAGE_SILENT_READ; 255 pte.pte_high |= _PAGE_SILENT_READ;
246 return pte; 256 return pte;
247} 257}
248#else 258#else
diff --git a/include/asm-mips/sigcontext.h b/include/asm-mips/sigcontext.h
index 8edabb0be23f..cefa657dd04a 100644
--- a/include/asm-mips/sigcontext.h
+++ b/include/asm-mips/sigcontext.h
@@ -55,8 +55,14 @@ struct sigcontext {
55struct sigcontext { 55struct sigcontext {
56 unsigned long sc_regs[32]; 56 unsigned long sc_regs[32];
57 unsigned long sc_fpregs[32]; 57 unsigned long sc_fpregs[32];
58 unsigned long sc_hi[4]; 58 unsigned long sc_mdhi;
59 unsigned long sc_lo[4]; 59 unsigned long sc_hi1;
60 unsigned long sc_hi2;
61 unsigned long sc_hi3;
62 unsigned long sc_mdlo;
63 unsigned long sc_lo1;
64 unsigned long sc_lo2;
65 unsigned long sc_lo3;
60 unsigned long sc_pc; 66 unsigned long sc_pc;
61 unsigned int sc_fpc_csr; 67 unsigned int sc_fpc_csr;
62 unsigned int sc_used_math; 68 unsigned int sc_used_math;
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-13 08:12:11 -0500