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authorJohn Rigby <jrigby@freescale.com>2008-10-07 15:00:18 -0400
committerKumar Gala <galak@kernel.crashing.org>2008-10-13 12:09:58 -0400
commit5b70a097052fff3831d8b94541452e7c29426777 (patch)
treea319e6f81c2ac7d50af76ce863118f515896c2ef
parent4a015c37409ead893b659c2f89f1aa1fdf512115 (diff)
powerpc: 83xx: pci: Remove need for get_immrbase from mpc83xx_add_bridge.
Modify mpc83xx_add_bridge to get config space register base address from the device tree instead of immr + hardcoded offset. 83xx pci nodes have this change: register properties now contain two address length tuples: First is the pci bridge register base, this has always been there. Second is the config base, this is new. This is documented in dts-bindings/fsl/83xx-512x-pci.txt The changes accomplish these things: mpc83xx_add_bridge no longer needs to call get_immrbase it uses hard coded addresses if the second register value is missing Signed-off-by: John Rigby <jrigby@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat
-rw-r--r--Documentation/powerpc/dts-bindings/fsl/83xx-512x-pci.txt40
-rw-r--r--arch/powerpc/boot/dts/mpc8313erdb.dts3
-rw-r--r--arch/powerpc/boot/dts/mpc8315erdb.dts3
-rw-r--r--arch/powerpc/boot/dts/mpc832x_mds.dts3
-rw-r--r--arch/powerpc/boot/dts/mpc832x_rdb.dts3
-rw-r--r--arch/powerpc/boot/dts/mpc8349emitx.dts6
-rw-r--r--arch/powerpc/boot/dts/mpc8349emitxgp.dts3
-rw-r--r--arch/powerpc/boot/dts/mpc834x_mds.dts6
-rw-r--r--arch/powerpc/boot/dts/mpc836x_mds.dts3
-rw-r--r--arch/powerpc/boot/dts/mpc836x_rdk.dts3
-rw-r--r--arch/powerpc/boot/dts/mpc8377_mds.dts3
-rw-r--r--arch/powerpc/boot/dts/mpc8377_rdb.dts3
-rw-r--r--arch/powerpc/boot/dts/mpc8378_mds.dts3
-rw-r--r--arch/powerpc/boot/dts/mpc8378_rdb.dts3
-rw-r--r--arch/powerpc/boot/dts/mpc8379_mds.dts3
-rw-r--r--arch/powerpc/boot/dts/mpc8379_rdb.dts3
-rw-r--r--arch/powerpc/boot/dts/sbc8349.dts3
-rw-r--r--arch/powerpc/sysdev/fsl_pci.c54
18 files changed, 111 insertions, 37 deletions
diff --git a/Documentation/powerpc/dts-bindings/fsl/83xx-512x-pci.txt b/Documentation/powerpc/dts-bindings/fsl/83xx-512x-pci.txt
new file mode 100644
index 000000000000..35a465362408
--- /dev/null
+++ b/Documentation/powerpc/dts-bindings/fsl/83xx-512x-pci.txt
@@ -0,0 +1,40 @@
1* Freescale 83xx and 512x PCI bridges
2
3Freescale 83xx and 512x SOCs include the same pci bridge core.
4
583xx/512x specific notes:
6- reg: should contain two address length tuples
7 The first is for the internal pci bridge registers
8 The second is for the pci config space access registers
9
10Example (MPC8313ERDB)
11 pci0: pci@e0008500 {
12 cell-index = <1>;
13 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
14 interrupt-map = <
15 /* IDSEL 0x0E -mini PCI */
16 0x7000 0x0 0x0 0x1 &ipic 18 0x8
17 0x7000 0x0 0x0 0x2 &ipic 18 0x8
18 0x7000 0x0 0x0 0x3 &ipic 18 0x8
19 0x7000 0x0 0x0 0x4 &ipic 18 0x8
20
21 /* IDSEL 0x0F - PCI slot */
22 0x7800 0x0 0x0 0x1 &ipic 17 0x8
23 0x7800 0x0 0x0 0x2 &ipic 18 0x8
24 0x7800 0x0 0x0 0x3 &ipic 17 0x8
25 0x7800 0x0 0x0 0x4 &ipic 18 0x8>;
26 interrupt-parent = <&ipic>;
27 interrupts = <66 0x8>;
28 bus-range = <0x0 0x0>;
29 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
30 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
31 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
32 clock-frequency = <66666666>;
33 #interrupt-cells = <1>;
34 #size-cells = <2>;
35 #address-cells = <3>;
36 reg = <0xe0008500 0x100 /* internal registers */
37 0xe0008300 0x8>; /* config space access registers */
38 compatible = "fsl,mpc8349-pci";
39 device_type = "pci";
40 };
diff --git a/arch/powerpc/boot/dts/mpc8313erdb.dts b/arch/powerpc/boot/dts/mpc8313erdb.dts
index 539085591e04..747f27676332 100644
--- a/arch/powerpc/boot/dts/mpc8313erdb.dts
+++ b/arch/powerpc/boot/dts/mpc8313erdb.dts
@@ -363,7 +363,8 @@
363 #interrupt-cells = <1>; 363 #interrupt-cells = <1>;
364 #size-cells = <2>; 364 #size-cells = <2>;
365 #address-cells = <3>; 365 #address-cells = <3>;
366 reg = <0xe0008500 0x100>; 366 reg = <0xe0008500 0x100 /* internal registers */
367 0xe0008300 0x8>; /* config space access registers */
367 compatible = "fsl,mpc8349-pci"; 368 compatible = "fsl,mpc8349-pci";
368 device_type = "pci"; 369 device_type = "pci";
369 }; 370 };
diff --git a/arch/powerpc/boot/dts/mpc8315erdb.dts b/arch/powerpc/boot/dts/mpc8315erdb.dts
index 94c9b4107a1d..7449e54c1a90 100644
--- a/arch/powerpc/boot/dts/mpc8315erdb.dts
+++ b/arch/powerpc/boot/dts/mpc8315erdb.dts
@@ -318,7 +318,8 @@
318 #interrupt-cells = <1>; 318 #interrupt-cells = <1>;
319 #size-cells = <2>; 319 #size-cells = <2>;
320 #address-cells = <3>; 320 #address-cells = <3>;
321 reg = <0xe0008500 0x100>; 321 reg = <0xe0008500 0x100 /* internal registers */
322 0xe0008300 0x8>; /* config space access registers */
322 compatible = "fsl,mpc8349-pci"; 323 compatible = "fsl,mpc8349-pci";
323 device_type = "pci"; 324 device_type = "pci";
324 }; 325 };
diff --git a/arch/powerpc/boot/dts/mpc832x_mds.dts b/arch/powerpc/boot/dts/mpc832x_mds.dts
index 015808ae1026..e4cc1768f241 100644
--- a/arch/powerpc/boot/dts/mpc832x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc832x_mds.dts
@@ -423,7 +423,8 @@
423 #interrupt-cells = <1>; 423 #interrupt-cells = <1>;
424 #size-cells = <2>; 424 #size-cells = <2>;
425 #address-cells = <3>; 425 #address-cells = <3>;
426 reg = <0xe0008500 0x100>; 426 reg = <0xe0008500 0x100 /* internal registers */
427 0xe0008300 0x8>; /* config space access registers */
427 compatible = "fsl,mpc8349-pci"; 428 compatible = "fsl,mpc8349-pci";
428 device_type = "pci"; 429 device_type = "pci";
429 }; 430 };
diff --git a/arch/powerpc/boot/dts/mpc832x_rdb.dts b/arch/powerpc/boot/dts/mpc832x_rdb.dts
index b5b0ec2eb88f..226ff066652b 100644
--- a/arch/powerpc/boot/dts/mpc832x_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc832x_rdb.dts
@@ -331,7 +331,8 @@
331 #interrupt-cells = <1>; 331 #interrupt-cells = <1>;
332 #size-cells = <2>; 332 #size-cells = <2>;
333 #address-cells = <3>; 333 #address-cells = <3>;
334 reg = <0xe0008500 0x100>; 334 reg = <0xe0008500 0x100 /* internal registers */
335 0xe0008300 0x8>; /* config space access registers */
335 compatible = "fsl,mpc8349-pci"; 336 compatible = "fsl,mpc8349-pci";
336 device_type = "pci"; 337 device_type = "pci";
337 }; 338 };
diff --git a/arch/powerpc/boot/dts/mpc8349emitx.dts b/arch/powerpc/boot/dts/mpc8349emitx.dts
index 1327a61d0538..5cedf373a1d8 100644
--- a/arch/powerpc/boot/dts/mpc8349emitx.dts
+++ b/arch/powerpc/boot/dts/mpc8349emitx.dts
@@ -254,7 +254,8 @@
254 #interrupt-cells = <1>; 254 #interrupt-cells = <1>;
255 #size-cells = <2>; 255 #size-cells = <2>;
256 #address-cells = <3>; 256 #address-cells = <3>;
257 reg = <0xe0008500 0x100>; 257 reg = <0xe0008500 0x100 /* internal registers */
258 0xe0008300 0x8>; /* config space access registers */
258 compatible = "fsl,mpc8349-pci"; 259 compatible = "fsl,mpc8349-pci";
259 device_type = "pci"; 260 device_type = "pci";
260 }; 261 };
@@ -280,7 +281,8 @@
280 #interrupt-cells = <1>; 281 #interrupt-cells = <1>;
281 #size-cells = <2>; 282 #size-cells = <2>;
282 #address-cells = <3>; 283 #address-cells = <3>;
283 reg = <0xe0008600 0x100>; 284 reg = <0xe0008600 0x100 /* internal registers */
285 0xe0008380 0x8>; /* config space access registers */
284 compatible = "fsl,mpc8349-pci"; 286 compatible = "fsl,mpc8349-pci";
285 device_type = "pci"; 287 device_type = "pci";
286 }; 288 };
diff --git a/arch/powerpc/boot/dts/mpc8349emitxgp.dts b/arch/powerpc/boot/dts/mpc8349emitxgp.dts
index f70d3a0a6eb9..81ae1d3e9440 100644
--- a/arch/powerpc/boot/dts/mpc8349emitxgp.dts
+++ b/arch/powerpc/boot/dts/mpc8349emitxgp.dts
@@ -228,7 +228,8 @@
228 #interrupt-cells = <1>; 228 #interrupt-cells = <1>;
229 #size-cells = <2>; 229 #size-cells = <2>;
230 #address-cells = <3>; 230 #address-cells = <3>;
231 reg = <0xe0008600 0x100>; 231 reg = <0xe0008600 0x100 /* internal registers */
232 0xe0008380 0x8>; /* config space access registers */
232 compatible = "fsl,mpc8349-pci"; 233 compatible = "fsl,mpc8349-pci";
233 device_type = "pci"; 234 device_type = "pci";
234 }; 235 };
diff --git a/arch/powerpc/boot/dts/mpc834x_mds.dts b/arch/powerpc/boot/dts/mpc834x_mds.dts
index e29739eee35e..04bfde3ea605 100644
--- a/arch/powerpc/boot/dts/mpc834x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc834x_mds.dts
@@ -315,7 +315,8 @@
315 #interrupt-cells = <1>; 315 #interrupt-cells = <1>;
316 #size-cells = <2>; 316 #size-cells = <2>;
317 #address-cells = <3>; 317 #address-cells = <3>;
318 reg = <0xe0008500 0x100>; 318 reg = <0xe0008500 0x100 /* internal registers */
319 0xe0008300 0x8>; /* config space access registers */
319 compatible = "fsl,mpc8349-pci"; 320 compatible = "fsl,mpc8349-pci";
320 device_type = "pci"; 321 device_type = "pci";
321 }; 322 };
@@ -376,7 +377,8 @@
376 #interrupt-cells = <1>; 377 #interrupt-cells = <1>;
377 #size-cells = <2>; 378 #size-cells = <2>;
378 #address-cells = <3>; 379 #address-cells = <3>;
379 reg = <0xe0008600 0x100>; 380 reg = <0xe0008600 0x100 /* internal registers */
381 0xe0008380 0x8>; /* config space access registers */
380 compatible = "fsl,mpc8349-pci"; 382 compatible = "fsl,mpc8349-pci";
381 device_type = "pci"; 383 device_type = "pci";
382 }; 384 };
diff --git a/arch/powerpc/boot/dts/mpc836x_mds.dts b/arch/powerpc/boot/dts/mpc836x_mds.dts
index 49aec71916e5..66a12d2631fb 100644
--- a/arch/powerpc/boot/dts/mpc836x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc836x_mds.dts
@@ -426,7 +426,8 @@
426 #interrupt-cells = <1>; 426 #interrupt-cells = <1>;
427 #size-cells = <2>; 427 #size-cells = <2>;
428 #address-cells = <3>; 428 #address-cells = <3>;
429 reg = <0xe0008500 0x100>; 429 reg = <0xe0008500 0x100 /* internal registers */
430 0xe0008300 0x8>; /* config space access registers */
430 compatible = "fsl,mpc8349-pci"; 431 compatible = "fsl,mpc8349-pci";
431 device_type = "pci"; 432 device_type = "pci";
432 }; 433 };
diff --git a/arch/powerpc/boot/dts/mpc836x_rdk.dts b/arch/powerpc/boot/dts/mpc836x_rdk.dts
index 69c9bd2acd82..f747747e5318 100644
--- a/arch/powerpc/boot/dts/mpc836x_rdk.dts
+++ b/arch/powerpc/boot/dts/mpc836x_rdk.dts
@@ -409,7 +409,8 @@
409 #interrupt-cells = <1>; 409 #interrupt-cells = <1>;
410 device_type = "pci"; 410 device_type = "pci";
411 compatible = "fsl,mpc8360-pci", "fsl,mpc8349-pci"; 411 compatible = "fsl,mpc8360-pci", "fsl,mpc8349-pci";
412 reg = <0xe0008500 0x100>; 412 reg = <0xe0008500 0x100 /* internal registers */
413 0xe0008300 0x8>; /* config space access registers */
413 ranges = <0x02000000 0 0x90000000 0x90000000 0 0x10000000 414 ranges = <0x02000000 0 0x90000000 0x90000000 0 0x10000000
414 0x42000000 0 0x80000000 0x80000000 0 0x10000000 415 0x42000000 0 0x80000000 0x80000000 0 0x10000000
415 0x01000000 0 0xe0300000 0xe0300000 0 0x00100000>; 416 0x01000000 0 0xe0300000 0xe0300000 0 0x00100000>;
diff --git a/arch/powerpc/boot/dts/mpc8377_mds.dts b/arch/powerpc/boot/dts/mpc8377_mds.dts
index 78f0f1124ffb..87314c78b47b 100644
--- a/arch/powerpc/boot/dts/mpc8377_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8377_mds.dts
@@ -378,7 +378,8 @@
378 #interrupt-cells = <1>; 378 #interrupt-cells = <1>;
379 #size-cells = <2>; 379 #size-cells = <2>;
380 #address-cells = <3>; 380 #address-cells = <3>;
381 reg = <0xe0008500 0x100>; 381 reg = <0xe0008500 0x100 /* internal registers */
382 0xe0008300 0x8>; /* config space access registers */
382 compatible = "fsl,mpc8349-pci"; 383 compatible = "fsl,mpc8349-pci";
383 device_type = "pci"; 384 device_type = "pci";
384 }; 385 };
diff --git a/arch/powerpc/boot/dts/mpc8377_rdb.dts b/arch/powerpc/boot/dts/mpc8377_rdb.dts
index d46327e8cb67..53191ba67aaa 100644
--- a/arch/powerpc/boot/dts/mpc8377_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8377_rdb.dts
@@ -319,7 +319,8 @@
319 #interrupt-cells = <1>; 319 #interrupt-cells = <1>;
320 #size-cells = <2>; 320 #size-cells = <2>;
321 #address-cells = <3>; 321 #address-cells = <3>;
322 reg = <0xe0008500 0x100>; 322 reg = <0xe0008500 0x100 /* internal registers */
323 0xe0008300 0x8>; /* config space access registers */
323 compatible = "fsl,mpc8349-pci"; 324 compatible = "fsl,mpc8349-pci";
324 device_type = "pci"; 325 device_type = "pci";
325 }; 326 };
diff --git a/arch/powerpc/boot/dts/mpc8378_mds.dts b/arch/powerpc/boot/dts/mpc8378_mds.dts
index c44f30f2f086..02941919598f 100644
--- a/arch/powerpc/boot/dts/mpc8378_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8378_mds.dts
@@ -364,7 +364,8 @@
364 #interrupt-cells = <1>; 364 #interrupt-cells = <1>;
365 #size-cells = <2>; 365 #size-cells = <2>;
366 #address-cells = <3>; 366 #address-cells = <3>;
367 reg = <0xe0008500 0x100>; 367 reg = <0xe0008500 0x100 /* internal registers */
368 0xe0008300 0x8>; /* config space access registers */
368 compatible = "fsl,mpc8349-pci"; 369 compatible = "fsl,mpc8349-pci";
369 device_type = "pci"; 370 device_type = "pci";
370 }; 371 };
diff --git a/arch/powerpc/boot/dts/mpc8378_rdb.dts b/arch/powerpc/boot/dts/mpc8378_rdb.dts
index b3e3bd7d550d..4a09153d160c 100644
--- a/arch/powerpc/boot/dts/mpc8378_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8378_rdb.dts
@@ -305,7 +305,8 @@
305 #interrupt-cells = <1>; 305 #interrupt-cells = <1>;
306 #size-cells = <2>; 306 #size-cells = <2>;
307 #address-cells = <3>; 307 #address-cells = <3>;
308 reg = <0xe0008500 0x100>; 308 reg = <0xe0008500 0x100 /* internal registers */
309 0xe0008300 0x8>; /* config space access registers */
309 compatible = "fsl,mpc8349-pci"; 310 compatible = "fsl,mpc8349-pci";
310 device_type = "pci"; 311 device_type = "pci";
311 }; 312 };
diff --git a/arch/powerpc/boot/dts/mpc8379_mds.dts b/arch/powerpc/boot/dts/mpc8379_mds.dts
index 653ed47c9a37..13a231144dcc 100644
--- a/arch/powerpc/boot/dts/mpc8379_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8379_mds.dts
@@ -392,7 +392,8 @@
392 #interrupt-cells = <1>; 392 #interrupt-cells = <1>;
393 #size-cells = <2>; 393 #size-cells = <2>;
394 #address-cells = <3>; 394 #address-cells = <3>;
395 reg = <0xe0008500 0x100>; 395 reg = <0xe0008500 0x100 /* internal registers */
396 0xe0008300 0x8>; /* config space access registers */
396 compatible = "fsl,mpc8349-pci"; 397 compatible = "fsl,mpc8349-pci";
397 device_type = "pci"; 398 device_type = "pci";
398 }; 399 };
diff --git a/arch/powerpc/boot/dts/mpc8379_rdb.dts b/arch/powerpc/boot/dts/mpc8379_rdb.dts
index 123c8df6f4f0..bbd884ac9dc0 100644
--- a/arch/powerpc/boot/dts/mpc8379_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8379_rdb.dts
@@ -333,7 +333,8 @@
333 #interrupt-cells = <1>; 333 #interrupt-cells = <1>;
334 #size-cells = <2>; 334 #size-cells = <2>;
335 #address-cells = <3>; 335 #address-cells = <3>;
336 reg = <0xe0008500 0x100>; 336 reg = <0xe0008500 0x100 /* internal registers */
337 0xe0008300 0x8>; /* config space access registers */
337 compatible = "fsl,mpc8349-pci"; 338 compatible = "fsl,mpc8349-pci";
338 device_type = "pci"; 339 device_type = "pci";
339 }; 340 };
diff --git a/arch/powerpc/boot/dts/sbc8349.dts b/arch/powerpc/boot/dts/sbc8349.dts
index c7f411f7a9a2..0f941f310e44 100644
--- a/arch/powerpc/boot/dts/sbc8349.dts
+++ b/arch/powerpc/boot/dts/sbc8349.dts
@@ -272,7 +272,8 @@
272 #interrupt-cells = <1>; 272 #interrupt-cells = <1>;
273 #size-cells = <2>; 273 #size-cells = <2>;
274 #address-cells = <3>; 274 #address-cells = <3>;
275 reg = <0xe0008500 0x100>; 275 reg = <0xe0008500 0x100 /* internal registers */
276 0xe0008300 0x8>; /* config space access registers */
276 compatible = "fsl,mpc8349-pci"; 277 compatible = "fsl,mpc8349-pci";
277 device_type = "pci"; 278 device_type = "pci";
278 }; 279 };
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 61e6d77efa4f..a3f4abadbade 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * MPC85xx/86xx PCI/PCIE support routing. 2 * MPC83xx/85xx/86xx PCI/PCIE support routing.
3 * 3 *
4 * Copyright 2007 Freescale Semiconductor, Inc 4 * Copyright 2007,2008 Freescale Semiconductor, Inc
5 * 5 *
6 * Initial author: Xianghua Xiao <x.xiao@freescale.com> 6 * Initial author: Xianghua Xiao <x.xiao@freescale.com>
7 * Recode: ZHANG WEI <wei.zhang@freescale.com> 7 * Recode: ZHANG WEI <wei.zhang@freescale.com>
@@ -256,15 +256,42 @@ int __init mpc83xx_add_bridge(struct device_node *dev)
256{ 256{
257 int len; 257 int len;
258 struct pci_controller *hose; 258 struct pci_controller *hose;
259 struct resource rsrc; 259 struct resource rsrc_reg;
260 struct resource rsrc_cfg;
260 const int *bus_range; 261 const int *bus_range;
261 int primary = 1, has_address = 0; 262 int primary;
262 phys_addr_t immr = get_immrbase();
263 263
264 pr_debug("Adding PCI host bridge %s\n", dev->full_name); 264 pr_debug("Adding PCI host bridge %s\n", dev->full_name);
265 265
266 /* Fetch host bridge registers address */ 266 /* Fetch host bridge registers address */
267 has_address = (of_address_to_resource(dev, 0, &rsrc) == 0); 267 if (of_address_to_resource(dev, 0, &rsrc_reg)) {
268 printk(KERN_WARNING "Can't get pci register base!\n");
269 return -ENOMEM;
270 }
271
272 memset(&rsrc_cfg, 0, sizeof(rsrc_cfg));
273
274 if (of_address_to_resource(dev, 1, &rsrc_cfg)) {
275 printk(KERN_WARNING
276 "No pci config register base in dev tree, "
277 "using default\n");
278 /*
279 * MPC83xx supports up to two host controllers
280 * one at 0x8500 has config space registers at 0x8300
281 * one at 0x8600 has config space registers at 0x8380
282 */
283 if ((rsrc_reg.start & 0xfffff) == 0x8500)
284 rsrc_cfg.start = (rsrc_reg.start & 0xfff00000) + 0x8300;
285 else if ((rsrc_reg.start & 0xfffff) == 0x8600)
286 rsrc_cfg.start = (rsrc_reg.start & 0xfff00000) + 0x8380;
287 }
288 /*
289 * Controller at offset 0x8500 is primary
290 */
291 if ((rsrc_reg.start & 0xfffff) == 0x8500)
292 primary = 1;
293 else
294 primary = 0;
268 295
269 /* Get bus range if any */ 296 /* Get bus range if any */
270 bus_range = of_get_property(dev, "bus-range", &len); 297 bus_range = of_get_property(dev, "bus-range", &len);
@@ -281,22 +308,11 @@ int __init mpc83xx_add_bridge(struct device_node *dev)
281 hose->first_busno = bus_range ? bus_range[0] : 0; 308 hose->first_busno = bus_range ? bus_range[0] : 0;
282 hose->last_busno = bus_range ? bus_range[1] : 0xff; 309 hose->last_busno = bus_range ? bus_range[1] : 0xff;
283 310
284 /* MPC83xx supports up to two host controllers one at 0x8500 from immrbar 311 setup_indirect_pci(hose, rsrc_cfg.start, rsrc_cfg.start + 4, 0);
285 * the other at 0x8600, we consider the 0x8500 the primary controller
286 */
287 /* PCI 1 */
288 if ((rsrc.start & 0xfffff) == 0x8500) {
289 setup_indirect_pci(hose, immr + 0x8300, immr + 0x8304, 0);
290 }
291 /* PCI 2 */
292 if ((rsrc.start & 0xfffff) == 0x8600) {
293 setup_indirect_pci(hose, immr + 0x8380, immr + 0x8384, 0);
294 primary = 0;
295 }
296 312
297 printk(KERN_INFO "Found MPC83xx PCI host bridge at 0x%016llx. " 313 printk(KERN_INFO "Found MPC83xx PCI host bridge at 0x%016llx. "
298 "Firmware bus number: %d->%d\n", 314 "Firmware bus number: %d->%d\n",
299 (unsigned long long)rsrc.start, hose->first_busno, 315 (unsigned long long)rsrc_reg.start, hose->first_busno,
300 hose->last_busno); 316 hose->last_busno);
301 317
302 pr_debug(" ->Hose at 0x%p, cfg_addr=0x%p,cfg_data=0x%p\n", 318 pr_debug(" ->Hose at 0x%p, cfg_addr=0x%p,cfg_data=0x%p\n",
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-11 15:40:28 -0500