diff options
author | Samuel Ortiz <samuel.ortiz@intel.com> | 2009-01-19 18:30:25 -0500 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2009-01-29 16:00:55 -0500 |
commit | 4f3602c8a3cf8d31e8b08b82d7ea9b0c30f28965 (patch) | |
tree | 16ac4e28a0844e97c167455bbdb7c2165c921a6b | |
parent | 638d0eb9197d1e285451f6594184fcfc9c2a5d44 (diff) |
iwl3945: Use iwl_txq_update_write_ptr
The iwl3945 and the iwl versions are identical.
Signed-off-by: Samuel Ortiz <samuel.ortiz@intel.com>
Acked-by: Tomas Winkler <tomas.winkler@intel.com>
Signed-off-by: Reinette Chatre <reinette.chatre@intel.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
-rw-r--r-- | drivers/net/wireless/iwlwifi/iwl3945-base.c | 67 |
1 files changed, 9 insertions, 58 deletions
diff --git a/drivers/net/wireless/iwlwifi/iwl3945-base.c b/drivers/net/wireless/iwlwifi/iwl3945-base.c index d1efdc7021b1..66b7e22d7e84 100644 --- a/drivers/net/wireless/iwlwifi/iwl3945-base.c +++ b/drivers/net/wireless/iwlwifi/iwl3945-base.c | |||
@@ -56,9 +56,6 @@ | |||
56 | #include "iwl-core.h" | 56 | #include "iwl-core.h" |
57 | #include "iwl-dev.h" | 57 | #include "iwl-dev.h" |
58 | 58 | ||
59 | static int iwl3945_tx_queue_update_write_ptr(struct iwl_priv *priv, | ||
60 | struct iwl_tx_queue *txq); | ||
61 | |||
62 | /* | 59 | /* |
63 | * module name, copyright, version, etc. | 60 | * module name, copyright, version, etc. |
64 | */ | 61 | */ |
@@ -527,7 +524,7 @@ static int iwl3945_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd) | |||
527 | 524 | ||
528 | /* Increment and update queue's write index */ | 525 | /* Increment and update queue's write index */ |
529 | q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd); | 526 | q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd); |
530 | ret = iwl3945_tx_queue_update_write_ptr(priv, txq); | 527 | ret = iwl_txq_update_write_ptr(priv, txq); |
531 | 528 | ||
532 | spin_unlock_irqrestore(&priv->hcmd_lock, flags); | 529 | spin_unlock_irqrestore(&priv->hcmd_lock, flags); |
533 | return ret ? ret : idx; | 530 | return ret ? ret : idx; |
@@ -2359,7 +2356,7 @@ static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb) | |||
2359 | 2356 | ||
2360 | /* Tell device the write index *just past* this latest filled TFD */ | 2357 | /* Tell device the write index *just past* this latest filled TFD */ |
2361 | q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd); | 2358 | q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd); |
2362 | rc = iwl3945_tx_queue_update_write_ptr(priv, txq); | 2359 | rc = iwl_txq_update_write_ptr(priv, txq); |
2363 | spin_unlock_irqrestore(&priv->lock, flags); | 2360 | spin_unlock_irqrestore(&priv->lock, flags); |
2364 | 2361 | ||
2365 | if (rc) | 2362 | if (rc) |
@@ -2370,7 +2367,7 @@ static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb) | |||
2370 | if (wait_write_ptr) { | 2367 | if (wait_write_ptr) { |
2371 | spin_lock_irqsave(&priv->lock, flags); | 2368 | spin_lock_irqsave(&priv->lock, flags); |
2372 | txq->need_update = 1; | 2369 | txq->need_update = 1; |
2373 | iwl3945_tx_queue_update_write_ptr(priv, txq); | 2370 | iwl_txq_update_write_ptr(priv, txq); |
2374 | spin_unlock_irqrestore(&priv->lock, flags); | 2371 | spin_unlock_irqrestore(&priv->lock, flags); |
2375 | } | 2372 | } |
2376 | 2373 | ||
@@ -3491,52 +3488,6 @@ static void iwl3945_rx_handle(struct iwl_priv *priv) | |||
3491 | iwl3945_rx_queue_restock(priv); | 3488 | iwl3945_rx_queue_restock(priv); |
3492 | } | 3489 | } |
3493 | 3490 | ||
3494 | /** | ||
3495 | * iwl3945_tx_queue_update_write_ptr - Send new write index to hardware | ||
3496 | */ | ||
3497 | static int iwl3945_tx_queue_update_write_ptr(struct iwl_priv *priv, | ||
3498 | struct iwl_tx_queue *txq) | ||
3499 | { | ||
3500 | u32 reg = 0; | ||
3501 | int rc = 0; | ||
3502 | int txq_id = txq->q.id; | ||
3503 | |||
3504 | if (txq->need_update == 0) | ||
3505 | return rc; | ||
3506 | |||
3507 | /* if we're trying to save power */ | ||
3508 | if (test_bit(STATUS_POWER_PMI, &priv->status)) { | ||
3509 | /* wake up nic if it's powered down ... | ||
3510 | * uCode will wake up, and interrupt us again, so next | ||
3511 | * time we'll skip this part. */ | ||
3512 | reg = iwl_read32(priv, CSR_UCODE_DRV_GP1); | ||
3513 | |||
3514 | if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) { | ||
3515 | IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg); | ||
3516 | iwl_set_bit(priv, CSR_GP_CNTRL, | ||
3517 | CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); | ||
3518 | return rc; | ||
3519 | } | ||
3520 | |||
3521 | /* restore this queue's parameters in nic hardware. */ | ||
3522 | rc = iwl_grab_nic_access(priv); | ||
3523 | if (rc) | ||
3524 | return rc; | ||
3525 | iwl_write_direct32(priv, HBUS_TARG_WRPTR, | ||
3526 | txq->q.write_ptr | (txq_id << 8)); | ||
3527 | iwl_release_nic_access(priv); | ||
3528 | |||
3529 | /* else not in power-save mode, uCode will never sleep when we're | ||
3530 | * trying to tx (during RFKILL, we're not trying to tx). */ | ||
3531 | } else | ||
3532 | iwl_write32(priv, HBUS_TARG_WRPTR, | ||
3533 | txq->q.write_ptr | (txq_id << 8)); | ||
3534 | |||
3535 | txq->need_update = 0; | ||
3536 | |||
3537 | return rc; | ||
3538 | } | ||
3539 | |||
3540 | #ifdef CONFIG_IWL3945_DEBUG | 3491 | #ifdef CONFIG_IWL3945_DEBUG |
3541 | static void iwl3945_print_rx_config_cmd(struct iwl_priv *priv, | 3492 | static void iwl3945_print_rx_config_cmd(struct iwl_priv *priv, |
3542 | struct iwl3945_rxon_cmd *rxon) | 3493 | struct iwl3945_rxon_cmd *rxon) |
@@ -3905,12 +3856,12 @@ static void iwl3945_irq_tasklet(struct iwl_priv *priv) | |||
3905 | if (inta & CSR_INT_BIT_WAKEUP) { | 3856 | if (inta & CSR_INT_BIT_WAKEUP) { |
3906 | IWL_DEBUG_ISR("Wakeup interrupt\n"); | 3857 | IWL_DEBUG_ISR("Wakeup interrupt\n"); |
3907 | iwl_rx_queue_update_write_ptr(priv, &priv->rxq); | 3858 | iwl_rx_queue_update_write_ptr(priv, &priv->rxq); |
3908 | iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[0]); | 3859 | iwl_txq_update_write_ptr(priv, &priv->txq[0]); |
3909 | iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[1]); | 3860 | iwl_txq_update_write_ptr(priv, &priv->txq[1]); |
3910 | iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[2]); | 3861 | iwl_txq_update_write_ptr(priv, &priv->txq[2]); |
3911 | iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[3]); | 3862 | iwl_txq_update_write_ptr(priv, &priv->txq[3]); |
3912 | iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[4]); | 3863 | iwl_txq_update_write_ptr(priv, &priv->txq[4]); |
3913 | iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[5]); | 3864 | iwl_txq_update_write_ptr(priv, &priv->txq[5]); |
3914 | 3865 | ||
3915 | handled |= CSR_INT_BIT_WAKEUP; | 3866 | handled |= CSR_INT_BIT_WAKEUP; |
3916 | } | 3867 | } |