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authorPaul Mundt <lethal@linux-sh.org>2009-08-23 05:02:59 -0400
committerPaul Mundt <lethal@linux-sh.org>2009-08-23 05:02:59 -0400
commit0858d9c0c591ce9baa1baf72eaf6f67823f3bc25 (patch)
tree1ea697a8e34ff1784572db22bcb5c9da7bbfb40c
parent9d7302299ee96ca954fe4ab8ca640333b6e19ad0 (diff)
parent963e04cafbf001ec431025a46ec246ae6d89daba (diff)
Merge branch 'sh/hwblk' into sh/pm-runtime
Diffstat
-rw-r--r--arch/sh/Kconfig7
-rw-r--r--arch/sh/Kconfig.debug22
-rw-r--r--arch/sh/Makefile25
-rw-r--r--arch/sh/boards/Kconfig7
-rw-r--r--arch/sh/boards/board-ap325rxa.c6
-rw-r--r--arch/sh/boards/mach-highlander/setup.c7
-rw-r--r--arch/sh/boards/mach-kfr2r09/Makefile2
-rw-r--r--arch/sh/boards/mach-kfr2r09/lcd_wqvga.c332
-rw-r--r--arch/sh/boards/mach-kfr2r09/setup.c276
-rw-r--r--arch/sh/boards/mach-migor/setup.c9
-rw-r--r--arch/sh/boards/mach-se/7722/setup.c4
-rw-r--r--arch/sh/boards/mach-se/7724/setup.c73
-rw-r--r--arch/sh/boards/mach-x3proto/setup.c7
-rw-r--r--arch/sh/boot/.gitignore5
-rw-r--r--arch/sh/boot/Makefile48
-rw-r--r--arch/sh/boot/compressed/.gitignore1
-rw-r--r--arch/sh/boot/compressed/Makefile21
-rw-r--r--arch/sh/boot/compressed/misc.c149
-rw-r--r--arch/sh/boot/compressed/misc_32.c206
-rw-r--r--arch/sh/boot/compressed/misc_64.c210
-rw-r--r--arch/sh/boot/compressed/piggy.S8
-rw-r--r--arch/sh/boot/compressed/vmlinux.scr10
-rw-r--r--arch/sh/boot/romimage/Makefile19
-rw-r--r--arch/sh/boot/romimage/head.S10
-rw-r--r--arch/sh/boot/romimage/vmlinux.scr6
-rw-r--r--arch/sh/configs/kfr2r09_defconfig877
-rw-r--r--arch/sh/include/asm/device.h7
-rw-r--r--arch/sh/include/asm/dma-sh.h1
-rw-r--r--arch/sh/include/asm/dwarf.h402
-rw-r--r--arch/sh/include/asm/entry-macros.S84
-rw-r--r--arch/sh/include/asm/ftrace.h7
-rw-r--r--arch/sh/include/asm/hardirq.h13
-rw-r--r--arch/sh/include/asm/hwblk.h70
-rw-r--r--arch/sh/include/asm/lmb.h6
-rw-r--r--arch/sh/include/asm/pgtable_32.h14
-rw-r--r--arch/sh/include/asm/sections.h1
-rw-r--r--arch/sh/include/asm/stacktrace.h25
-rw-r--r--arch/sh/include/asm/suspend.h9
-rw-r--r--arch/sh/include/asm/syscall_32.h1
-rw-r--r--arch/sh/include/asm/thread_info.h11
-rw-r--r--arch/sh/include/asm/unwinder.h25
-rw-r--r--arch/sh/include/asm/vmlinux.lds.h17
-rw-r--r--arch/sh/include/cpu-sh4/cpu/dma-sh4a.h3
-rw-r--r--arch/sh/include/cpu-sh4/cpu/sh7722.h14
-rw-r--r--arch/sh/include/cpu-sh4/cpu/sh7723.h17
-rw-r--r--arch/sh/include/cpu-sh4/cpu/sh7724.h17
-rw-r--r--arch/sh/include/mach-common/mach/migor.h64
-rw-r--r--arch/sh/include/mach-common/mach/romimage.h1
-rw-r--r--arch/sh/include/mach-kfr2r09/mach/kfr2r09.h21
-rw-r--r--arch/sh/include/mach-kfr2r09/mach/partner-jet-setup.txt134
-rw-r--r--arch/sh/include/mach-kfr2r09/mach/romimage.h75
-rw-r--r--arch/sh/include/mach-migor/mach/migor.h14
-rw-r--r--arch/sh/kernel/Makefile_329
-rw-r--r--arch/sh/kernel/Makefile_643
-rw-r--r--arch/sh/kernel/asm-offsets.c1
-rw-r--r--arch/sh/kernel/cpu/Makefile2
-rw-r--r--arch/sh/kernel/cpu/hwblk.c155
-rw-r--r--arch/sh/kernel/cpu/init.c34
-rw-r--r--arch/sh/kernel/cpu/sh2/entry.S3
-rw-r--r--arch/sh/kernel/cpu/sh2a/entry.S3
-rw-r--r--arch/sh/kernel/cpu/sh3/entry.S1
-rw-r--r--arch/sh/kernel/cpu/sh4a/Makefile6
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7722.c63
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7723.c113
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7724.c122
-rw-r--r--arch/sh/kernel/cpu/sh4a/hwblk-sh7722.c106
-rw-r--r--arch/sh/kernel/cpu/sh4a/hwblk-sh7723.c117
-rw-r--r--arch/sh/kernel/cpu/sh4a/hwblk-sh7724.c121
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7366.c2
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7722.c39
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7723.c42
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7724.c43
-rw-r--r--arch/sh/kernel/cpu/shmobile/Makefile1
-rw-r--r--arch/sh/kernel/cpu/shmobile/cpuidle.c102
-rw-r--r--arch/sh/kernel/cpu/shmobile/pm.c26
-rw-r--r--arch/sh/kernel/dumpstack.c123
-rw-r--r--arch/sh/kernel/dwarf.c902
-rw-r--r--arch/sh/kernel/early_printk.c5
-rw-r--r--arch/sh/kernel/entry-common.S89
-rw-r--r--arch/sh/kernel/ftrace.c190
-rw-r--r--arch/sh/kernel/io_trapped.c7
-rw-r--r--arch/sh/kernel/irq.c21
-rw-r--r--arch/sh/kernel/process_32.c5
-rw-r--r--arch/sh/kernel/ptrace_32.c8
-rw-r--r--arch/sh/kernel/setup.c71
-rw-r--r--arch/sh/kernel/sh_ksyms_32.c4
-rw-r--r--arch/sh/kernel/stacktrace.c98
-rw-r--r--arch/sh/kernel/time.c29
-rw-r--r--arch/sh/kernel/traps_32.c24
-rw-r--r--arch/sh/kernel/unwinder.c162
-rw-r--r--arch/sh/kernel/vmlinux.lds.S90
-rw-r--r--arch/sh/lib/Makefile2
-rw-r--r--arch/sh/lib/mcount.S228
-rw-r--r--arch/sh/mm/fault_32.c164
-rw-r--r--arch/sh/mm/ioremap_64.c6
-rw-r--r--arch/sh/mm/numa.c36
-rw-r--r--arch/sh/oprofile/backtrace.c84
-rw-r--r--arch/sh/tools/mach-types1
-rw-r--r--drivers/serial/sh-sci.c5
-rw-r--r--drivers/usb/gadget/Kconfig10
-rw-r--r--drivers/usb/gadget/m66592-udc.c284
-rw-r--r--drivers/usb/gadget/m66592-udc.h90
-rw-r--r--drivers/usb/host/Kconfig7
-rw-r--r--drivers/usb/host/r8a66597-hcd.c210
-rw-r--r--drivers/usb/host/r8a66597.h440
-rw-r--r--drivers/video/Kconfig2
-rw-r--r--drivers/video/sh_mobile_lcdcfb.c21
-rw-r--r--include/linux/usb/m66592.h44
-rw-r--r--include/linux/usb/r8a66597.h375
109 files changed, 6560 insertions, 1791 deletions
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index e2bdd7b94fd9..c4a955d25451 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -10,12 +10,16 @@ config SUPERH
10 select EMBEDDED 10 select EMBEDDED
11 select HAVE_CLK 11 select HAVE_CLK
12 select HAVE_IDE 12 select HAVE_IDE
13 select HAVE_LMB
13 select HAVE_OPROFILE 14 select HAVE_OPROFILE
14 select HAVE_GENERIC_DMA_COHERENT 15 select HAVE_GENERIC_DMA_COHERENT
15 select HAVE_IOREMAP_PROT if MMU 16 select HAVE_IOREMAP_PROT if MMU
16 select HAVE_ARCH_TRACEHOOK 17 select HAVE_ARCH_TRACEHOOK
17 select HAVE_DMA_API_DEBUG 18 select HAVE_DMA_API_DEBUG
18 select HAVE_PERF_COUNTERS 19 select HAVE_PERF_COUNTERS
20 select HAVE_KERNEL_GZIP
21 select HAVE_KERNEL_BZIP2
22 select HAVE_KERNEL_LZMA
19 select RTC_LIB 23 select RTC_LIB
20 select GENERIC_ATOMIC64 24 select GENERIC_ATOMIC64
21 help 25 help
@@ -31,6 +35,9 @@ config SUPERH32
31 select HAVE_FUNCTION_TRACER 35 select HAVE_FUNCTION_TRACER
32 select HAVE_FTRACE_MCOUNT_RECORD 36 select HAVE_FTRACE_MCOUNT_RECORD
33 select HAVE_DYNAMIC_FTRACE 37 select HAVE_DYNAMIC_FTRACE
38 select HAVE_FUNCTION_TRACE_MCOUNT_TEST
39 select HAVE_FTRACE_SYSCALLS
40 select HAVE_FUNCTION_GRAPH_TRACER
34 select HAVE_ARCH_KGDB 41 select HAVE_ARCH_KGDB
35 select ARCH_HIBERNATION_POSSIBLE if MMU 42 select ARCH_HIBERNATION_POSSIBLE if MMU
36 43
diff --git a/arch/sh/Kconfig.debug b/arch/sh/Kconfig.debug
index 39224b57c6ef..741d20fab2e1 100644
--- a/arch/sh/Kconfig.debug
+++ b/arch/sh/Kconfig.debug
@@ -38,11 +38,12 @@ config EARLY_SCIF_CONSOLE_PORT
38 default "0xffe00000" if CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7763 || \ 38 default "0xffe00000" if CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7763 || \
39 CPU_SUBTYPE_SH7722 || CPU_SUBTYPE_SH7366 || \ 39 CPU_SUBTYPE_SH7722 || CPU_SUBTYPE_SH7366 || \
40 CPU_SUBTYPE_SH7343 40 CPU_SUBTYPE_SH7343
41 default "0xffea0000" if CPU_SUBTYPE_SH7785 41 default "0xffeb0000" if CPU_SUBTYPE_SH7785
42 default "0xffeb0000" if CPU_SUBTYPE_SH7786 42 default "0xffeb0000" if CPU_SUBTYPE_SH7786
43 default "0xfffe8000" if CPU_SUBTYPE_SH7203 43 default "0xfffe8000" if CPU_SUBTYPE_SH7203
44 default "0xfffe9800" if CPU_SUBTYPE_SH7206 || CPU_SUBTYPE_SH7263 44 default "0xfffe9800" if CPU_SUBTYPE_SH7206 || CPU_SUBTYPE_SH7263
45 default "0xffe80000" if CPU_SH4 45 default "0xffe80000" if CPU_SH4
46 default "0xa4000150" if CPU_SH3
46 default "0x00000000" 47 default "0x00000000"
47 48
48config EARLY_PRINTK 49config EARLY_PRINTK
@@ -61,12 +62,14 @@ config EARLY_PRINTK
61 select both the EARLY_SCIF_CONSOLE and SH_STANDARD_BIOS, using 62 select both the EARLY_SCIF_CONSOLE and SH_STANDARD_BIOS, using
62 the kernel command line option to toggle back and forth. 63 the kernel command line option to toggle back and forth.
63 64
64config DEBUG_STACKOVERFLOW 65config STACK_DEBUG
65 bool "Check for stack overflows" 66 bool "Check for stack overflows"
66 depends on DEBUG_KERNEL && SUPERH32 67 depends on DEBUG_KERNEL && SUPERH32
67 help 68 help
68 This option will cause messages to be printed if free stack space 69 This option will cause messages to be printed if free stack space
69 drops below a certain limit. 70 drops below a certain limit. Saying Y here will add overhead to
71 every function call and will therefore incur a major
72 performance hit. Most users should say N.
70 73
71config DEBUG_STACK_USAGE 74config DEBUG_STACK_USAGE
72 bool "Stack utilization instrumentation" 75 bool "Stack utilization instrumentation"
@@ -107,6 +110,14 @@ config DUMP_CODE
107 110
108 Those looking for more verbose debugging output should say Y. 111 Those looking for more verbose debugging output should say Y.
109 112
113config DWARF_UNWINDER
114 bool "Enable the DWARF unwinder for stacktraces"
115 select FRAME_POINTER
116 default n
117 help
118 Enabling this option will make stacktraces more accurate, at
119 the cost of an increase in overall kernel size.
120
110config SH_NO_BSS_INIT 121config SH_NO_BSS_INIT
111 bool "Avoid zeroing BSS (to speed-up startup on suitable platforms)" 122 bool "Avoid zeroing BSS (to speed-up startup on suitable platforms)"
112 depends on DEBUG_KERNEL 123 depends on DEBUG_KERNEL
@@ -123,4 +134,9 @@ config SH64_SR_WATCH
123 bool "Debug: set SR.WATCH to enable hardware watchpoints and trace" 134 bool "Debug: set SR.WATCH to enable hardware watchpoints and trace"
124 depends on SUPERH64 135 depends on SUPERH64
125 136
137config MCOUNT
138 def_bool y
139 depends on SUPERH32
140 depends on STACK_DEBUG || FUNCTION_TRACER
141
126endmenu 142endmenu
diff --git a/arch/sh/Makefile b/arch/sh/Makefile
index 75d049b03f7e..e26421bf9976 100644
--- a/arch/sh/Makefile
+++ b/arch/sh/Makefile
@@ -136,6 +136,7 @@ machdir-$(CONFIG_SH_7751_SYSTEMH) += mach-systemh
136machdir-$(CONFIG_SH_EDOSK7705) += mach-edosk7705 136machdir-$(CONFIG_SH_EDOSK7705) += mach-edosk7705
137machdir-$(CONFIG_SH_HIGHLANDER) += mach-highlander 137machdir-$(CONFIG_SH_HIGHLANDER) += mach-highlander
138machdir-$(CONFIG_SH_MIGOR) += mach-migor 138machdir-$(CONFIG_SH_MIGOR) += mach-migor
139machdir-$(CONFIG_SH_KFR2R09) += mach-kfr2r09
139machdir-$(CONFIG_SH_SDK7780) += mach-sdk7780 140machdir-$(CONFIG_SH_SDK7780) += mach-sdk7780
140machdir-$(CONFIG_SH_X3PROTO) += mach-x3proto 141machdir-$(CONFIG_SH_X3PROTO) += mach-x3proto
141machdir-$(CONFIG_SH_SH7763RDP) += mach-sh7763rdp 142machdir-$(CONFIG_SH_SH7763RDP) += mach-sh7763rdp
@@ -186,17 +187,27 @@ KBUILD_CFLAGS += -pipe $(cflags-y)
186KBUILD_CPPFLAGS += $(cflags-y) 187KBUILD_CPPFLAGS += $(cflags-y)
187KBUILD_AFLAGS += $(cflags-y) 188KBUILD_AFLAGS += $(cflags-y)
188 189
190ifeq ($(CONFIG_MCOUNT),y)
191 KBUILD_CFLAGS += -pg
192endif
193
194ifeq ($(CONFIG_DWARF_UNWINDER),y)
195 KBUILD_CFLAGS += -fasynchronous-unwind-tables
196endif
197
189libs-$(CONFIG_SUPERH32) := arch/sh/lib/ $(libs-y) 198libs-$(CONFIG_SUPERH32) := arch/sh/lib/ $(libs-y)
190libs-$(CONFIG_SUPERH64) := arch/sh/lib64/ $(libs-y) 199libs-$(CONFIG_SUPERH64) := arch/sh/lib64/ $(libs-y)
191 200
192PHONY += maketools FORCE 201BOOT_TARGETS = uImage uImage.bz2 uImage.gz uImage.lzma uImage.srec \
202 zImage vmlinux.srec romImage
203PHONY += maketools $(BOOT_TARGETS) FORCE
193 204
194maketools: include/linux/version.h FORCE 205maketools: include/linux/version.h FORCE
195 $(Q)$(MAKE) $(build)=arch/sh/tools include/asm-sh/machtypes.h 206 $(Q)$(MAKE) $(build)=arch/sh/tools include/asm-sh/machtypes.h
196 207
197all: $(KBUILD_IMAGE) 208all: $(KBUILD_IMAGE)
198 209
199zImage uImage uImage.srec vmlinux.srec: vmlinux 210$(BOOT_TARGETS): vmlinux
200 $(Q)$(MAKE) $(build)=$(boot) $(boot)/$@ 211 $(Q)$(MAKE) $(build)=$(boot) $(boot)/$@
201 212
202compressed: zImage 213compressed: zImage
@@ -208,10 +219,14 @@ archclean:
208 $(Q)$(MAKE) $(clean)=arch/sh/kernel/vsyscall 219 $(Q)$(MAKE) $(clean)=arch/sh/kernel/vsyscall
209 220
210define archhelp 221define archhelp
211 @echo '* zImage - Compressed kernel image' 222 @echo ' zImage - Compressed kernel image'
223 @echo ' romImage - Compressed ROM image, if supported'
212 @echo ' vmlinux.srec - Create an ELF S-record' 224 @echo ' vmlinux.srec - Create an ELF S-record'
213 @echo ' uImage - Create a bootable image for U-Boot' 225 @echo '* uImage - Alias to bootable U-Boot image'
214 @echo ' uImage.srec - Create an S-record for U-Boot' 226 @echo ' uImage.srec - Create an S-record for U-Boot'
227 @echo '* uImage.gz - Kernel-only image for U-Boot (gzip)'
228 @echo ' uImage.bz2 - Kernel-only image for U-Boot (bzip2)'
229 @echo ' uImage.lzma - Kernel-only image for U-Boot (lzma)'
215endef 230endef
216 231
217CLEAN_FILES += include/asm-sh/machtypes.h 232CLEAN_FILES += include/asm-sh/machtypes.h
diff --git a/arch/sh/boards/Kconfig b/arch/sh/boards/Kconfig
index 2b1af0eefa6a..db04c85971ad 100644
--- a/arch/sh/boards/Kconfig
+++ b/arch/sh/boards/Kconfig
@@ -193,6 +193,13 @@ config SH_AP325RXA
193 Renesas "AP-325RXA" support. 193 Renesas "AP-325RXA" support.
194 Compatible with ALGO SYSTEM CO.,LTD. "AP-320A" 194 Compatible with ALGO SYSTEM CO.,LTD. "AP-320A"
195 195
196config SH_KFR2R09
197 bool "KFR2R09"
198 depends on CPU_SUBTYPE_SH7724
199 select ARCH_REQUIRE_GPIOLIB
200 help
201 "Kit For R2R for 2009" support.
202
196config SH_SH7763RDP 203config SH_SH7763RDP
197 bool "SH7763RDP" 204 bool "SH7763RDP"
198 depends on CPU_SUBTYPE_SH7763 205 depends on CPU_SUBTYPE_SH7763
diff --git a/arch/sh/boards/board-ap325rxa.c b/arch/sh/boards/board-ap325rxa.c
index b9c88cc519e2..19eea4ab1ccc 100644
--- a/arch/sh/boards/board-ap325rxa.c
+++ b/arch/sh/boards/board-ap325rxa.c
@@ -227,6 +227,9 @@ static struct platform_device lcdc_device = {
227 .dev = { 227 .dev = {
228 .platform_data = &lcdc_info, 228 .platform_data = &lcdc_info,
229 }, 229 },
230 .archdata = {
231 .hwblk_id = HWBLK_LCDC,
232 },
230}; 233};
231 234
232static void camera_power(int val) 235static void camera_power(int val)
@@ -377,6 +380,9 @@ static struct platform_device ceu_device = {
377 .dev = { 380 .dev = {
378 .platform_data = &sh_mobile_ceu_info, 381 .platform_data = &sh_mobile_ceu_info,
379 }, 382 },
383 .archdata = {
384 .hwblk_id = HWBLK_CEU,
385 },
380}; 386};
381 387
382struct spi_gpio_platform_data sdcard_cn3_platform_data = { 388struct spi_gpio_platform_data sdcard_cn3_platform_data = {
diff --git a/arch/sh/boards/mach-highlander/setup.c b/arch/sh/boards/mach-highlander/setup.c
index 1639f8915000..566e69d8d729 100644
--- a/arch/sh/boards/mach-highlander/setup.c
+++ b/arch/sh/boards/mach-highlander/setup.c
@@ -22,6 +22,7 @@
22#include <linux/irq.h> 22#include <linux/irq.h>
23#include <linux/interrupt.h> 23#include <linux/interrupt.h>
24#include <linux/usb/r8a66597.h> 24#include <linux/usb/r8a66597.h>
25#include <linux/usb/m66592.h>
25#include <net/ax88796.h> 26#include <net/ax88796.h>
26#include <asm/machvec.h> 27#include <asm/machvec.h>
27#include <mach/highlander.h> 28#include <mach/highlander.h>
@@ -60,6 +61,11 @@ static struct platform_device r8a66597_usb_host_device = {
60 .resource = r8a66597_usb_host_resources, 61 .resource = r8a66597_usb_host_resources,
61}; 62};
62 63
64static struct m66592_platdata usbf_platdata = {
65 .xtal = M66592_PLATDATA_XTAL_24MHZ,
66 .vif = 1,
67};
68
63static struct resource m66592_usb_peripheral_resources[] = { 69static struct resource m66592_usb_peripheral_resources[] = {
64 [0] = { 70 [0] = {
65 .name = "m66592_udc", 71 .name = "m66592_udc",
@@ -81,6 +87,7 @@ static struct platform_device m66592_usb_peripheral_device = {
81 .dev = { 87 .dev = {
82 .dma_mask = NULL, /* don't use dma */ 88 .dma_mask = NULL, /* don't use dma */
83 .coherent_dma_mask = 0xffffffff, 89 .coherent_dma_mask = 0xffffffff,
90 .platform_data = &usbf_platdata,
84 }, 91 },
85 .num_resources = ARRAY_SIZE(m66592_usb_peripheral_resources), 92 .num_resources = ARRAY_SIZE(m66592_usb_peripheral_resources),
86 .resource = m66592_usb_peripheral_resources, 93 .resource = m66592_usb_peripheral_resources,
diff --git a/arch/sh/boards/mach-kfr2r09/Makefile b/arch/sh/boards/mach-kfr2r09/Makefile
new file mode 100644
index 000000000000..5d5867826e3b
--- /dev/null
+++ b/arch/sh/boards/mach-kfr2r09/Makefile
@@ -0,0 +1,2 @@
1obj-y := setup.o
2obj-$(CONFIG_FB_SH_MOBILE_LCDC) += lcd_wqvga.o
diff --git a/arch/sh/boards/mach-kfr2r09/lcd_wqvga.c b/arch/sh/boards/mach-kfr2r09/lcd_wqvga.c
new file mode 100644
index 000000000000..8ccb1cc8b589
--- /dev/null
+++ b/arch/sh/boards/mach-kfr2r09/lcd_wqvga.c
@@ -0,0 +1,332 @@
1/*
2 * KFR2R09 LCD panel support
3 *
4 * Copyright (C) 2009 Magnus Damm
5 *
6 * Register settings based on the out-of-tree t33fb.c driver
7 * Copyright (C) 2008 Lineo Solutions, Inc.
8 *
9 * This file is subject to the terms and conditions of the GNU General Public
10 * License. See the file COPYING in the main directory of this archive for
11 * more details.
12 */
13
14#include <linux/delay.h>
15#include <linux/err.h>
16#include <linux/fb.h>
17#include <linux/init.h>
18#include <linux/kernel.h>
19#include <linux/module.h>
20#include <linux/gpio.h>
21#include <video/sh_mobile_lcdc.h>
22#include <mach/kfr2r09.h>
23#include <cpu/sh7724.h>
24
25/* The on-board LCD module is a Hitachi TX07D34VM0AAA. This module is made
26 * up of a 240x400 LCD hooked up to a R61517 driver IC. The driver IC is
27 * communicating with the main port of the LCDC using an 18-bit SYS interface.
28 *
29 * The device code for this LCD module is 0x01221517.
30 */
31
32static const unsigned char data_frame_if[] = {
33 0x02, /* WEMODE: 1=cont, 0=one-shot */
34 0x00, 0x00,
35 0x00, /* EPF, DFM */
36 0x02, /* RIM[1] : 1 (18bpp) */
37};
38
39static const unsigned char data_panel[] = {
40 0x0b,
41 0x63, /* 400 lines */
42 0x04, 0x00, 0x00, 0x04, 0x11, 0x00, 0x00,
43};
44
45static const unsigned char data_timing[] = {
46 0x00, 0x00, 0x13, 0x08, 0x08,
47};
48
49static const unsigned char data_timing_src[] = {
50 0x11, 0x01, 0x00, 0x01,
51};
52
53static const unsigned char data_gamma[] = {
54 0x01, 0x02, 0x08, 0x23, 0x03, 0x0c, 0x00, 0x06, 0x00, 0x00,
55 0x01, 0x00, 0x0c, 0x23, 0x03, 0x08, 0x02, 0x06, 0x00, 0x00,
56};
57
58static const unsigned char data_power[] = {
59 0x07, 0xc5, 0xdc, 0x02, 0x33, 0x0a,
60};
61
62static unsigned long read_reg(void *sohandle,
63 struct sh_mobile_lcdc_sys_bus_ops *so)
64{
65 return so->read_data(sohandle);
66}
67
68static void write_reg(void *sohandle,
69 struct sh_mobile_lcdc_sys_bus_ops *so,
70 int i, unsigned long v)
71{
72 if (i)
73 so->write_data(sohandle, v); /* PTH4/LCDRS High [param, 17:0] */
74 else
75 so->write_index(sohandle, v); /* PTH4/LCDRS Low [cmd, 7:0] */
76}
77
78static void write_data(void *sohandle,
79 struct sh_mobile_lcdc_sys_bus_ops *so,
80 unsigned char const *data, int no_data)
81{
82 int i;
83
84 for (i = 0; i < no_data; i++)
85 write_reg(sohandle, so, 1, data[i]);
86}
87
88static unsigned long read_device_code(void *sohandle,
89 struct sh_mobile_lcdc_sys_bus_ops *so)
90{
91 unsigned long device_code;
92
93 /* access protect OFF */
94 write_reg(sohandle, so, 0, 0xb0);
95 write_reg(sohandle, so, 1, 0x00);
96
97 /* deep standby OFF */
98 write_reg(sohandle, so, 0, 0xb1);
99 write_reg(sohandle, so, 1, 0x00);
100
101 /* device code command */
102 write_reg(sohandle, so, 0, 0xbf);
103 mdelay(50);
104
105 /* dummy read */
106 read_reg(sohandle, so);
107
108 /* read device code */
109 device_code = ((read_reg(sohandle, so) & 0xff) << 24);
110 device_code |= ((read_reg(sohandle, so) & 0xff) << 16);
111 device_code |= ((read_reg(sohandle, so) & 0xff) << 8);
112 device_code |= (read_reg(sohandle, so) & 0xff);
113
114 return device_code;
115}
116
117static void write_memory_start(void *sohandle,
118 struct sh_mobile_lcdc_sys_bus_ops *so)
119{
120 write_reg(sohandle, so, 0, 0x2c);
121}
122
123static void clear_memory(void *sohandle,
124 struct sh_mobile_lcdc_sys_bus_ops *so)
125{
126 int i;
127
128 /* write start */
129 write_memory_start(sohandle, so);
130
131 /* paint it black */
132 for (i = 0; i < (240 * 400); i++)
133 write_reg(sohandle, so, 1, 0x00);
134}
135
136static void display_on(void *sohandle,
137 struct sh_mobile_lcdc_sys_bus_ops *so)
138{
139 /* access protect off */
140 write_reg(sohandle, so, 0, 0xb0);
141 write_reg(sohandle, so, 1, 0x00);
142
143 /* exit deep standby mode */
144 write_reg(sohandle, so, 0, 0xb1);
145 write_reg(sohandle, so, 1, 0x00);
146
147 /* frame memory I/F */
148 write_reg(sohandle, so, 0, 0xb3);
149 write_data(sohandle, so, data_frame_if, ARRAY_SIZE(data_frame_if));
150
151 /* display mode and frame memory write mode */
152 write_reg(sohandle, so, 0, 0xb4);
153 write_reg(sohandle, so, 1, 0x00); /* DBI, internal clock */
154
155 /* panel */
156 write_reg(sohandle, so, 0, 0xc0);
157 write_data(sohandle, so, data_panel, ARRAY_SIZE(data_panel));
158
159 /* timing (normal) */
160 write_reg(sohandle, so, 0, 0xc1);
161 write_data(sohandle, so, data_timing, ARRAY_SIZE(data_timing));
162
163 /* timing (partial) */
164 write_reg(sohandle, so, 0, 0xc2);
165 write_data(sohandle, so, data_timing, ARRAY_SIZE(data_timing));
166
167 /* timing (idle) */
168 write_reg(sohandle, so, 0, 0xc3);
169 write_data(sohandle, so, data_timing, ARRAY_SIZE(data_timing));
170
171 /* timing (source/VCOM/gate driving) */
172 write_reg(sohandle, so, 0, 0xc4);
173 write_data(sohandle, so, data_timing_src, ARRAY_SIZE(data_timing_src));
174
175 /* gamma (red) */
176 write_reg(sohandle, so, 0, 0xc8);
177 write_data(sohandle, so, data_gamma, ARRAY_SIZE(data_gamma));
178
179 /* gamma (green) */
180 write_reg(sohandle, so, 0, 0xc9);
181 write_data(sohandle, so, data_gamma, ARRAY_SIZE(data_gamma));
182
183 /* gamma (blue) */
184 write_reg(sohandle, so, 0, 0xca);
185 write_data(sohandle, so, data_gamma, ARRAY_SIZE(data_gamma));
186
187 /* power (common) */
188 write_reg(sohandle, so, 0, 0xd0);
189 write_data(sohandle, so, data_power, ARRAY_SIZE(data_power));
190
191 /* VCOM */
192 write_reg(sohandle, so, 0, 0xd1);
193 write_reg(sohandle, so, 1, 0x00);
194 write_reg(sohandle, so, 1, 0x0f);
195 write_reg(sohandle, so, 1, 0x02);
196
197 /* power (normal) */
198 write_reg(sohandle, so, 0, 0xd2);
199 write_reg(sohandle, so, 1, 0x63);
200 write_reg(sohandle, so, 1, 0x24);
201
202 /* power (partial) */
203 write_reg(sohandle, so, 0, 0xd3);
204 write_reg(sohandle, so, 1, 0x63);
205 write_reg(sohandle, so, 1, 0x24);
206
207 /* power (idle) */
208 write_reg(sohandle, so, 0, 0xd4);
209 write_reg(sohandle, so, 1, 0x63);
210 write_reg(sohandle, so, 1, 0x24);
211
212 write_reg(sohandle, so, 0, 0xd8);
213 write_reg(sohandle, so, 1, 0x77);
214 write_reg(sohandle, so, 1, 0x77);
215
216 /* TE signal */
217 write_reg(sohandle, so, 0, 0x35);
218 write_reg(sohandle, so, 1, 0x00);
219
220 /* TE signal line */
221 write_reg(sohandle, so, 0, 0x44);
222 write_reg(sohandle, so, 1, 0x00);
223 write_reg(sohandle, so, 1, 0x00);
224
225 /* column address */
226 write_reg(sohandle, so, 0, 0x2a);
227 write_reg(sohandle, so, 1, 0x00);
228 write_reg(sohandle, so, 1, 0x00);
229 write_reg(sohandle, so, 1, 0x00);
230 write_reg(sohandle, so, 1, 0xef);
231
232 /* page address */
233 write_reg(sohandle, so, 0, 0x2b);
234 write_reg(sohandle, so, 1, 0x00);
235 write_reg(sohandle, so, 1, 0x00);
236 write_reg(sohandle, so, 1, 0x01);
237 write_reg(sohandle, so, 1, 0x8f);
238
239 /* exit sleep mode */
240 write_reg(sohandle, so, 0, 0x11);
241
242 mdelay(120);
243
244 /* clear vram */
245 clear_memory(sohandle, so);
246
247 /* display ON */
248 write_reg(sohandle, so, 0, 0x29);
249 mdelay(1);
250
251 write_memory_start(sohandle, so);
252}
253
254int kfr2r09_lcd_setup(void *board_data, void *sohandle,
255 struct sh_mobile_lcdc_sys_bus_ops *so)
256{
257 /* power on */
258 gpio_set_value(GPIO_PTF4, 0); /* PROTECT/ -> L */
259 gpio_set_value(GPIO_PTE4, 0); /* LCD_RST/ -> L */
260 gpio_set_value(GPIO_PTF4, 1); /* PROTECT/ -> H */
261 udelay(1100);
262 gpio_set_value(GPIO_PTE4, 1); /* LCD_RST/ -> H */
263 udelay(10);
264 gpio_set_value(GPIO_PTF4, 0); /* PROTECT/ -> L */
265 mdelay(20);
266
267 if (read_device_code(sohandle, so) != 0x01221517)
268 return -ENODEV;
269
270 pr_info("KFR2R09 WQVGA LCD Module detected.\n");
271
272 display_on(sohandle, so);
273 return 0;
274}
275
276#define CTRL_CKSW 0x10
277#define CTRL_C10 0x20
278#define CTRL_CPSW 0x80
279#define MAIN_MLED4 0x40
280#define MAIN_MSW 0x80
281
282static int kfr2r09_lcd_backlight(int on)
283{
284 struct i2c_adapter *a;
285 struct i2c_msg msg;
286 unsigned char buf[2];
287 int ret;
288
289 a = i2c_get_adapter(0);
290 if (!a)
291 return -ENODEV;
292
293 buf[0] = 0x00;
294 if (on)
295 buf[1] = CTRL_CPSW | CTRL_C10 | CTRL_CKSW;
296 else
297 buf[1] = 0;
298
299 msg.addr = 0x75;
300 msg.buf = buf;
301 msg.len = 2;
302 msg.flags = 0;
303 ret = i2c_transfer(a, &msg, 1);
304 if (ret != 1)
305 return -ENODEV;
306
307 buf[0] = 0x01;
308 if (on)
309 buf[1] = MAIN_MSW | MAIN_MLED4 | 0x0c;
310 else
311 buf[1] = 0;
312
313 msg.addr = 0x75;
314 msg.buf = buf;
315 msg.len = 2;
316 msg.flags = 0;
317 ret = i2c_transfer(a, &msg, 1);
318 if (ret != 1)
319 return -ENODEV;
320
321 return 0;
322}
323
324void kfr2r09_lcd_on(void *board_data)
325{
326 kfr2r09_lcd_backlight(1);
327}
328
329void kfr2r09_lcd_off(void *board_data)
330{
331 kfr2r09_lcd_backlight(0);
332}
diff --git a/arch/sh/boards/mach-kfr2r09/setup.c b/arch/sh/boards/mach-kfr2r09/setup.c
new file mode 100644
index 000000000000..f9ba43635dc1
--- /dev/null
+++ b/arch/sh/boards/mach-kfr2r09/setup.c
@@ -0,0 +1,276 @@
1/*
2 * KFR2R09 board support code
3 *
4 * Copyright (C) 2009 Magnus Damm
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#include <linux/init.h>
11#include <linux/platform_device.h>
12#include <linux/interrupt.h>
13#include <linux/mtd/physmap.h>
14#include <linux/mtd/onenand.h>
15#include <linux/delay.h>
16#include <linux/clk.h>
17#include <linux/gpio.h>
18#include <linux/input.h>
19#include <video/sh_mobile_lcdc.h>
20#include <asm/clock.h>
21#include <asm/machvec.h>
22#include <asm/io.h>
23#include <asm/sh_keysc.h>
24#include <cpu/sh7724.h>
25#include <mach/kfr2r09.h>
26
27static struct mtd_partition kfr2r09_nor_flash_partitions[] =
28{
29 {
30 .name = "boot",
31 .offset = 0,
32 .size = (4 * 1024 * 1024),
33 .mask_flags = MTD_WRITEABLE, /* Read-only */
34 },
35 {
36 .name = "other",
37 .offset = MTDPART_OFS_APPEND,
38 .size = MTDPART_SIZ_FULL,
39 },
40};
41
42static struct physmap_flash_data kfr2r09_nor_flash_data = {
43 .width = 2,
44 .parts = kfr2r09_nor_flash_partitions,
45 .nr_parts = ARRAY_SIZE(kfr2r09_nor_flash_partitions),
46};
47
48static struct resource kfr2r09_nor_flash_resources[] = {
49 [0] = {
50 .name = "NOR Flash",
51 .start = 0x00000000,
52 .end = 0x03ffffff,
53 .flags = IORESOURCE_MEM,
54 }
55};
56
57static struct platform_device kfr2r09_nor_flash_device = {
58 .name = "physmap-flash",
59 .resource = kfr2r09_nor_flash_resources,
60 .num_resources = ARRAY_SIZE(kfr2r09_nor_flash_resources),
61 .dev = {
62 .platform_data = &kfr2r09_nor_flash_data,
63 },
64};
65
66static struct resource kfr2r09_nand_flash_resources[] = {
67 [0] = {
68 .name = "NAND Flash",
69 .start = 0x10000000,
70 .end = 0x1001ffff,
71 .flags = IORESOURCE_MEM,
72 }
73};
74
75static struct platform_device kfr2r09_nand_flash_device = {
76 .name = "onenand-flash",
77 .resource = kfr2r09_nand_flash_resources,
78 .num_resources = ARRAY_SIZE(kfr2r09_nand_flash_resources),
79};
80
81static struct sh_keysc_info kfr2r09_sh_keysc_info = {
82 .mode = SH_KEYSC_MODE_1, /* KEYOUT0->4, KEYIN0->4 */
83 .scan_timing = 3,
84 .delay = 10,
85 .keycodes = {
86 KEY_PHONE, KEY_CLEAR, KEY_MAIL, KEY_WWW, KEY_ENTER,
87 KEY_1, KEY_2, KEY_3, 0, KEY_UP,
88 KEY_4, KEY_5, KEY_6, 0, KEY_LEFT,
89 KEY_7, KEY_8, KEY_9, KEY_PROG1, KEY_RIGHT,
90 KEY_S, KEY_0, KEY_P, KEY_PROG2, KEY_DOWN,
91 0, 0, 0, 0, 0
92 },
93};
94
95static struct resource kfr2r09_sh_keysc_resources[] = {
96 [0] = {
97 .name = "KEYSC",
98 .start = 0x044b0000,
99 .end = 0x044b000f,
100 .flags = IORESOURCE_MEM,
101 },
102 [1] = {
103 .start = 79,
104 .flags = IORESOURCE_IRQ,
105 },
106};
107
108static struct platform_device kfr2r09_sh_keysc_device = {
109 .name = "sh_keysc",
110 .id = 0, /* "keysc0" clock */
111 .num_resources = ARRAY_SIZE(kfr2r09_sh_keysc_resources),
112 .resource = kfr2r09_sh_keysc_resources,
113 .dev = {
114 .platform_data = &kfr2r09_sh_keysc_info,
115 },
116 .archdata = {
117 .hwblk_id = HWBLK_KEYSC,
118 },
119};
120
121static struct sh_mobile_lcdc_info kfr2r09_sh_lcdc_info = {
122 .clock_source = LCDC_CLK_BUS,
123 .ch[0] = {
124 .chan = LCDC_CHAN_MAINLCD,
125 .bpp = 16,
126 .interface_type = SYS18,
127 .clock_divider = 6,
128 .flags = LCDC_FLAGS_DWPOL,
129 .lcd_cfg = {
130 .name = "TX07D34VM0AAA",
131 .xres = 240,
132 .yres = 400,
133 .left_margin = 0,
134 .right_margin = 16,
135 .hsync_len = 8,
136 .upper_margin = 0,
137 .lower_margin = 1,
138 .vsync_len = 1,
139 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
140 },
141 .lcd_size_cfg = {
142 .width = 35,
143 .height = 58,
144 },
145 .board_cfg = {
146 .setup_sys = kfr2r09_lcd_setup,
147 .display_on = kfr2r09_lcd_on,
148 .display_off = kfr2r09_lcd_off,
149 },
150 .sys_bus_cfg = {
151 .ldmt2r = 0x07010904,
152 .ldmt3r = 0x14012914,
153 /* set 1s delay to encourage fsync() */
154 .deferred_io_msec = 1000,
155 },
156 }
157};
158
159static struct resource kfr2r09_sh_lcdc_resources[] = {
160 [0] = {
161 .name = "LCDC",
162 .start = 0xfe940000, /* P4-only space */
163 .end = 0xfe941fff,
164 .flags = IORESOURCE_MEM,
165 },
166 [1] = {
167 .start = 106,
168 .flags = IORESOURCE_IRQ,
169 },
170};
171
172static struct platform_device kfr2r09_sh_lcdc_device = {
173 .name = "sh_mobile_lcdc_fb",
174 .num_resources = ARRAY_SIZE(kfr2r09_sh_lcdc_resources),
175 .resource = kfr2r09_sh_lcdc_resources,
176 .dev = {
177 .platform_data = &kfr2r09_sh_lcdc_info,
178 },
179 .archdata = {
180 .hwblk_id = HWBLK_LCDC,
181 },
182};
183
184static struct platform_device *kfr2r09_devices[] __initdata = {
185 &kfr2r09_nor_flash_device,
186 &kfr2r09_nand_flash_device,
187 &kfr2r09_sh_keysc_device,
188 &kfr2r09_sh_lcdc_device,
189};
190
191#define BSC_CS0BCR 0xfec10004
192#define BSC_CS0WCR 0xfec10024
193#define BSC_CS4BCR 0xfec10010
194#define BSC_CS4WCR 0xfec10030
195
196static int __init kfr2r09_devices_setup(void)
197{
198 /* enable SCIF1 serial port for YC401 console support */
199 gpio_request(GPIO_FN_SCIF1_RXD, NULL);
200 gpio_request(GPIO_FN_SCIF1_TXD, NULL);
201
202 /* setup NOR flash at CS0 */
203 ctrl_outl(0x36db0400, BSC_CS0BCR);
204 ctrl_outl(0x00000500, BSC_CS0WCR);
205
206 /* setup NAND flash at CS4 */
207 ctrl_outl(0x36db0400, BSC_CS4BCR);
208 ctrl_outl(0x00000500, BSC_CS4WCR);
209
210 /* setup KEYSC pins */
211 gpio_request(GPIO_FN_KEYOUT0, NULL);
212 gpio_request(GPIO_FN_KEYOUT1, NULL);
213 gpio_request(GPIO_FN_KEYOUT2, NULL);
214 gpio_request(GPIO_FN_KEYOUT3, NULL);
215 gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
216 gpio_request(GPIO_FN_KEYIN0, NULL);
217 gpio_request(GPIO_FN_KEYIN1, NULL);
218 gpio_request(GPIO_FN_KEYIN2, NULL);
219 gpio_request(GPIO_FN_KEYIN3, NULL);
220 gpio_request(GPIO_FN_KEYIN4, NULL);
221 gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
222
223 /* setup LCDC pins for SYS panel */
224 gpio_request(GPIO_FN_LCDD17, NULL);
225 gpio_request(GPIO_FN_LCDD16, NULL);
226 gpio_request(GPIO_FN_LCDD15, NULL);
227 gpio_request(GPIO_FN_LCDD14, NULL);
228 gpio_request(GPIO_FN_LCDD13, NULL);
229 gpio_request(GPIO_FN_LCDD12, NULL);
230 gpio_request(GPIO_FN_LCDD11, NULL);
231 gpio_request(GPIO_FN_LCDD10, NULL);
232 gpio_request(GPIO_FN_LCDD9, NULL);
233 gpio_request(GPIO_FN_LCDD8, NULL);
234 gpio_request(GPIO_FN_LCDD7, NULL);
235 gpio_request(GPIO_FN_LCDD6, NULL);
236 gpio_request(GPIO_FN_LCDD5, NULL);
237 gpio_request(GPIO_FN_LCDD4, NULL);
238 gpio_request(GPIO_FN_LCDD3, NULL);
239 gpio_request(GPIO_FN_LCDD2, NULL);
240 gpio_request(GPIO_FN_LCDD1, NULL);
241 gpio_request(GPIO_FN_LCDD0, NULL);
242 gpio_request(GPIO_FN_LCDRS, NULL); /* LCD_RS */
243 gpio_request(GPIO_FN_LCDCS, NULL); /* LCD_CS/ */
244 gpio_request(GPIO_FN_LCDRD, NULL); /* LCD_RD/ */
245 gpio_request(GPIO_FN_LCDWR, NULL); /* LCD_WR/ */
246 gpio_request(GPIO_FN_LCDVSYN, NULL); /* LCD_VSYNC */
247 gpio_request(GPIO_PTE4, NULL); /* LCD_RST/ */
248 gpio_direction_output(GPIO_PTE4, 1);
249 gpio_request(GPIO_PTF4, NULL); /* PROTECT/ */
250 gpio_direction_output(GPIO_PTF4, 1);
251 gpio_request(GPIO_PTU0, NULL); /* LEDSTDBY/ */
252 gpio_direction_output(GPIO_PTU0, 1);
253
254 return platform_add_devices(kfr2r09_devices,
255 ARRAY_SIZE(kfr2r09_devices));
256}
257device_initcall(kfr2r09_devices_setup);
258
259/* Return the board specific boot mode pin configuration */
260static int kfr2r09_mode_pins(void)
261{
262 /* MD0=1, MD1=1, MD2=0: Clock Mode 3
263 * MD3=0: 16-bit Area0 Bus Width
264 * MD5=1: Little Endian
265 * MD8=1: Test Mode Disabled
266 */
267 return MODE_PIN0 | MODE_PIN1 | MODE_PIN5 | MODE_PIN8;
268}
269
270/*
271 * The Machine Vector
272 */
273static struct sh_machine_vector mv_kfr2r09 __initmv = {
274 .mv_name = "kfr2r09",
275 .mv_mode_pins = kfr2r09_mode_pins,
276};
diff --git a/arch/sh/boards/mach-migor/setup.c b/arch/sh/boards/mach-migor/setup.c
index f9b2e4df35b9..be8f0d94f6f1 100644
--- a/arch/sh/boards/mach-migor/setup.c
+++ b/arch/sh/boards/mach-migor/setup.c
@@ -98,6 +98,9 @@ static struct platform_device sh_keysc_device = {
98 .dev = { 98 .dev = {
99 .platform_data = &sh_keysc_info, 99 .platform_data = &sh_keysc_info,
100 }, 100 },
101 .archdata = {
102 .hwblk_id = HWBLK_KEYSC,
103 },
101}; 104};
102 105
103static struct mtd_partition migor_nor_flash_partitions[] = 106static struct mtd_partition migor_nor_flash_partitions[] =
@@ -292,6 +295,9 @@ static struct platform_device migor_lcdc_device = {
292 .dev = { 295 .dev = {
293 .platform_data = &sh_mobile_lcdc_info, 296 .platform_data = &sh_mobile_lcdc_info,
294 }, 297 },
298 .archdata = {
299 .hwblk_id = HWBLK_LCDC,
300 },
295}; 301};
296 302
297static struct clk *camera_clk; 303static struct clk *camera_clk;
@@ -379,6 +385,9 @@ static struct platform_device migor_ceu_device = {
379 .dev = { 385 .dev = {
380 .platform_data = &sh_mobile_ceu_info, 386 .platform_data = &sh_mobile_ceu_info,
381 }, 387 },
388 .archdata = {
389 .hwblk_id = HWBLK_CEU,
390 },
382}; 391};
383 392
384struct spi_gpio_platform_data sdcard_cn9_platform_data = { 393struct spi_gpio_platform_data sdcard_cn9_platform_data = {
diff --git a/arch/sh/boards/mach-se/7722/setup.c b/arch/sh/boards/mach-se/7722/setup.c
index af84904ed86f..36374078e521 100644
--- a/arch/sh/boards/mach-se/7722/setup.c
+++ b/arch/sh/boards/mach-se/7722/setup.c
@@ -22,6 +22,7 @@
22#include <asm/io.h> 22#include <asm/io.h>
23#include <asm/heartbeat.h> 23#include <asm/heartbeat.h>
24#include <asm/sh_keysc.h> 24#include <asm/sh_keysc.h>
25#include <cpu/sh7722.h>
25 26
26/* Heartbeat */ 27/* Heartbeat */
27static struct heartbeat_data heartbeat_data = { 28static struct heartbeat_data heartbeat_data = {
@@ -137,6 +138,9 @@ static struct platform_device sh_keysc_device = {
137 .dev = { 138 .dev = {
138 .platform_data = &sh_keysc_info, 139 .platform_data = &sh_keysc_info,
139 }, 140 },
141 .archdata = {
142 .hwblk_id = HWBLK_KEYSC,
143 },
140}; 144};
141 145
142static struct platform_device *se7722_devices[] __initdata = { 146static struct platform_device *se7722_devices[] __initdata = {
diff --git a/arch/sh/boards/mach-se/7724/setup.c b/arch/sh/boards/mach-se/7724/setup.c
index 15456a0773bf..d922e1b71410 100644
--- a/arch/sh/boards/mach-se/7724/setup.c
+++ b/arch/sh/boards/mach-se/7724/setup.c
@@ -39,7 +39,15 @@
39 * SW41 : abxx xxxx -> a = 0 : Analog monitor 39 * SW41 : abxx xxxx -> a = 0 : Analog monitor
40 * 1 : Digital monitor 40 * 1 : Digital monitor
41 * b = 0 : VGA 41 * b = 0 : VGA
42 * 1 : SVGA 42 * 1 : 720p
43 */
44
45/*
46 * about 720p
47 *
48 * When you use 1280 x 720 lcdc output,
49 * you should change OSC6 lcdc clock from 25.175MHz to 74.25MHz,
50 * and change SW41 to use 720p
43 */ 51 */
44 52
45/* Heartbeat */ 53/* Heartbeat */
@@ -174,6 +182,9 @@ static struct platform_device lcdc_device = {
174 .dev = { 182 .dev = {
175 .platform_data = &lcdc_info, 183 .platform_data = &lcdc_info,
176 }, 184 },
185 .archdata = {
186 .hwblk_id = HWBLK_LCDC,
187 },
177}; 188};
178 189
179/* CEU0 */ 190/* CEU0 */
@@ -205,6 +216,9 @@ static struct platform_device ceu0_device = {
205 .dev = { 216 .dev = {
206 .platform_data = &sh_mobile_ceu0_info, 217 .platform_data = &sh_mobile_ceu0_info,
207 }, 218 },
219 .archdata = {
220 .hwblk_id = HWBLK_CEU0,
221 },
208}; 222};
209 223
210/* CEU1 */ 224/* CEU1 */
@@ -236,6 +250,9 @@ static struct platform_device ceu1_device = {
236 .dev = { 250 .dev = {
237 .platform_data = &sh_mobile_ceu1_info, 251 .platform_data = &sh_mobile_ceu1_info,
238 }, 252 },
253 .archdata = {
254 .hwblk_id = HWBLK_CEU1,
255 },
239}; 256};
240 257
241/* KEYSC in SoC (Needs SW33-2 set to ON) */ 258/* KEYSC in SoC (Needs SW33-2 set to ON) */
@@ -274,6 +291,9 @@ static struct platform_device keysc_device = {
274 .dev = { 291 .dev = {
275 .platform_data = &keysc_info, 292 .platform_data = &keysc_info,
276 }, 293 },
294 .archdata = {
295 .hwblk_id = HWBLK_KEYSC,
296 },
277}; 297};
278 298
279/* SH Eth */ 299/* SH Eth */
@@ -302,9 +322,13 @@ static struct platform_device sh_eth_device = {
302 }, 322 },
303 .num_resources = ARRAY_SIZE(sh_eth_resources), 323 .num_resources = ARRAY_SIZE(sh_eth_resources),
304 .resource = sh_eth_resources, 324 .resource = sh_eth_resources,
325 .archdata = {
326 .hwblk_id = HWBLK_ETHER,
327 },
305}; 328};
306 329
307static struct r8a66597_platdata sh7724_usb0_host_data = { 330static struct r8a66597_platdata sh7724_usb0_host_data = {
331 .on_chip = 1,
308}; 332};
309 333
310static struct resource sh7724_usb0_host_resources[] = { 334static struct resource sh7724_usb0_host_resources[] = {
@@ -330,6 +354,9 @@ static struct platform_device sh7724_usb0_host_device = {
330 }, 354 },
331 .num_resources = ARRAY_SIZE(sh7724_usb0_host_resources), 355 .num_resources = ARRAY_SIZE(sh7724_usb0_host_resources),
332 .resource = sh7724_usb0_host_resources, 356 .resource = sh7724_usb0_host_resources,
357 .archdata = {
358 .hwblk_id = HWBLK_USB0,
359 },
333}; 360};
334 361
335static struct platform_device *ms7724se_devices[] __initdata = { 362static struct platform_device *ms7724se_devices[] __initdata = {
@@ -421,6 +448,32 @@ static int __init devices_setup(void)
421 /* turn on USB clocks, use external clock */ 448 /* turn on USB clocks, use external clock */
422 ctrl_outw((ctrl_inw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB); 449 ctrl_outw((ctrl_inw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB);
423 450
451#ifdef CONFIG_PM
452 /* Let LED9 show STATUS2 */
453 gpio_request(GPIO_FN_STATUS2, NULL);
454
455 /* Lit LED10 show STATUS0 */
456 gpio_request(GPIO_FN_STATUS0, NULL);
457
458 /* Lit LED11 show PDSTATUS */
459 gpio_request(GPIO_FN_PDSTATUS, NULL);
460#else
461 /* Lit LED9 */
462 gpio_request(GPIO_PTJ6, NULL);
463 gpio_direction_output(GPIO_PTJ6, 1);
464 gpio_export(GPIO_PTJ6, 0);
465
466 /* Lit LED10 */
467 gpio_request(GPIO_PTJ5, NULL);
468 gpio_direction_output(GPIO_PTJ5, 1);
469 gpio_export(GPIO_PTJ5, 0);
470
471 /* Lit LED11 */
472 gpio_request(GPIO_PTJ7, NULL);
473 gpio_direction_output(GPIO_PTJ7, 1);
474 gpio_export(GPIO_PTJ7, 0);
475#endif
476
424 /* enable USB0 port */ 477 /* enable USB0 port */
425 ctrl_outw(0x0600, 0xa40501d4); 478 ctrl_outw(0x0600, 0xa40501d4);
426 479
@@ -546,15 +599,15 @@ static int __init devices_setup(void)
546 sh_eth_init(); 599 sh_eth_init();
547 600
548 if (sw & SW41_B) { 601 if (sw & SW41_B) {
549 /* SVGA */ 602 /* 720p */
550 lcdc_info.ch[0].lcd_cfg.xres = 800; 603 lcdc_info.ch[0].lcd_cfg.xres = 1280;
551 lcdc_info.ch[0].lcd_cfg.yres = 600; 604 lcdc_info.ch[0].lcd_cfg.yres = 720;
552 lcdc_info.ch[0].lcd_cfg.left_margin = 142; 605 lcdc_info.ch[0].lcd_cfg.left_margin = 220;
553 lcdc_info.ch[0].lcd_cfg.right_margin = 52; 606 lcdc_info.ch[0].lcd_cfg.right_margin = 110;
554 lcdc_info.ch[0].lcd_cfg.hsync_len = 96; 607 lcdc_info.ch[0].lcd_cfg.hsync_len = 40;
555 lcdc_info.ch[0].lcd_cfg.upper_margin = 24; 608 lcdc_info.ch[0].lcd_cfg.upper_margin = 20;
556 lcdc_info.ch[0].lcd_cfg.lower_margin = 2; 609 lcdc_info.ch[0].lcd_cfg.lower_margin = 5;
557 lcdc_info.ch[0].lcd_cfg.vsync_len = 2; 610 lcdc_info.ch[0].lcd_cfg.vsync_len = 5;
558 } else { 611 } else {
559 /* VGA */ 612 /* VGA */
560 lcdc_info.ch[0].lcd_cfg.xres = 640; 613 lcdc_info.ch[0].lcd_cfg.xres = 640;
diff --git a/arch/sh/boards/mach-x3proto/setup.c b/arch/sh/boards/mach-x3proto/setup.c
index 8913ae39a802..efe4cb9f8a77 100644
--- a/arch/sh/boards/mach-x3proto/setup.c
+++ b/arch/sh/boards/mach-x3proto/setup.c
@@ -17,6 +17,7 @@
17#include <linux/irq.h> 17#include <linux/irq.h>
18#include <linux/interrupt.h> 18#include <linux/interrupt.h>
19#include <linux/usb/r8a66597.h> 19#include <linux/usb/r8a66597.h>
20#include <linux/usb/m66592.h>
20#include <asm/ilsel.h> 21#include <asm/ilsel.h>
21 22
22static struct resource heartbeat_resources[] = { 23static struct resource heartbeat_resources[] = {
@@ -89,6 +90,11 @@ static struct platform_device r8a66597_usb_host_device = {
89 .resource = r8a66597_usb_host_resources, 90 .resource = r8a66597_usb_host_resources,
90}; 91};
91 92
93static struct m66592_platdata usbf_platdata = {
94 .xtal = M66592_PLATDATA_XTAL_24MHZ,
95 .vif = 1,
96};
97
92static struct resource m66592_usb_peripheral_resources[] = { 98static struct resource m66592_usb_peripheral_resources[] = {
93 [0] = { 99 [0] = {
94 .name = "m66592_udc", 100 .name = "m66592_udc",
@@ -109,6 +115,7 @@ static struct platform_device m66592_usb_peripheral_device = {
109 .dev = { 115 .dev = {
110 .dma_mask = NULL, /* don't use dma */ 116 .dma_mask = NULL, /* don't use dma */
111 .coherent_dma_mask = 0xffffffff, 117 .coherent_dma_mask = 0xffffffff,
118 .platform_data = &usbf_platdata,
112 }, 119 },
113 .num_resources = ARRAY_SIZE(m66592_usb_peripheral_resources), 120 .num_resources = ARRAY_SIZE(m66592_usb_peripheral_resources),
114 .resource = m66592_usb_peripheral_resources, 121 .resource = m66592_usb_peripheral_resources,
diff --git a/arch/sh/boot/.gitignore b/arch/sh/boot/.gitignore
index aad5edddf93b..541087d2029c 100644
--- a/arch/sh/boot/.gitignore
+++ b/arch/sh/boot/.gitignore
@@ -1,4 +1,3 @@
1zImage 1zImage
2vmlinux.srec 2vmlinux*
3uImage 3uImage*
4uImage.srec
diff --git a/arch/sh/boot/Makefile b/arch/sh/boot/Makefile
index 78efb04c28f3..a1316872be6f 100644
--- a/arch/sh/boot/Makefile
+++ b/arch/sh/boot/Makefile
@@ -20,8 +20,13 @@ CONFIG_BOOT_LINK_OFFSET ?= 0x00800000
20CONFIG_ZERO_PAGE_OFFSET ?= 0x00001000 20CONFIG_ZERO_PAGE_OFFSET ?= 0x00001000
21CONFIG_ENTRY_OFFSET ?= 0x00001000 21CONFIG_ENTRY_OFFSET ?= 0x00001000
22 22
23targets := zImage vmlinux.srec uImage uImage.srec 23suffix-$(CONFIG_KERNEL_GZIP) := gz
24subdir- := compressed 24suffix-$(CONFIG_KERNEL_BZIP2) := bz2
25suffix-$(CONFIG_KERNEL_LZMA) := lzma
26
27targets := zImage vmlinux.srec romImage uImage uImage.srec uImage.gz uImage.bz2 uImage.lzma
28extra-y += vmlinux.bin vmlinux.bin.gz vmlinux.bin.bz2 vmlinux.bin.lzma
29subdir- := compressed romimage
25 30
26$(obj)/zImage: $(obj)/compressed/vmlinux FORCE 31$(obj)/zImage: $(obj)/compressed/vmlinux FORCE
27 $(call if_changed,objcopy) 32 $(call if_changed,objcopy)
@@ -30,6 +35,13 @@ $(obj)/zImage: $(obj)/compressed/vmlinux FORCE
30$(obj)/compressed/vmlinux: FORCE 35$(obj)/compressed/vmlinux: FORCE
31 $(Q)$(MAKE) $(build)=$(obj)/compressed $@ 36 $(Q)$(MAKE) $(build)=$(obj)/compressed $@
32 37
38$(obj)/romImage: $(obj)/romimage/vmlinux FORCE
39 $(call if_changed,objcopy)
40 @echo ' Kernel: $@ is ready'
41
42$(obj)/romimage/vmlinux: $(obj)/zImage FORCE
43 $(Q)$(MAKE) $(build)=$(obj)/romimage $@
44
33KERNEL_MEMORY := 0x00000000 45KERNEL_MEMORY := 0x00000000
34ifeq ($(CONFIG_PMB_FIXED),y) 46ifeq ($(CONFIG_PMB_FIXED),y)
35KERNEL_MEMORY := $(shell /bin/bash -c 'printf "0x%08x" \ 47KERNEL_MEMORY := $(shell /bin/bash -c 'printf "0x%08x" \
@@ -40,9 +52,6 @@ KERNEL_MEMORY := $(shell /bin/bash -c 'printf "0x%08x" \
40 $$[$(CONFIG_MEMORY_START)]') 52 $$[$(CONFIG_MEMORY_START)]')
41endif 53endif
42 54
43export CONFIG_PAGE_OFFSET CONFIG_MEMORY_START CONFIG_BOOT_LINK_OFFSET \
44 CONFIG_ZERO_PAGE_OFFSET CONFIG_ENTRY_OFFSET KERNEL_MEMORY
45
46KERNEL_LOAD := $(shell /bin/bash -c 'printf "0x%08x" \ 55KERNEL_LOAD := $(shell /bin/bash -c 'printf "0x%08x" \
47 $$[$(CONFIG_PAGE_OFFSET) + \ 56 $$[$(CONFIG_PAGE_OFFSET) + \
48 $(KERNEL_MEMORY) + \ 57 $(KERNEL_MEMORY) + \
@@ -55,19 +64,30 @@ KERNEL_ENTRY := $(shell /bin/bash -c 'printf "0x%08x" \
55 64
56quiet_cmd_uimage = UIMAGE $@ 65quiet_cmd_uimage = UIMAGE $@
57 cmd_uimage = $(CONFIG_SHELL) $(MKIMAGE) -A sh -O linux -T kernel \ 66 cmd_uimage = $(CONFIG_SHELL) $(MKIMAGE) -A sh -O linux -T kernel \
58 -C gzip -a $(KERNEL_LOAD) -e $(KERNEL_ENTRY) \ 67 -C $(2) -a $(KERNEL_LOAD) -e $(KERNEL_ENTRY) \
59 -n 'Linux-$(KERNELRELEASE)' -d $< $@ 68 -n 'Linux-$(KERNELRELEASE)' -d $< $@
60 69
61$(obj)/uImage: $(obj)/vmlinux.bin.gz FORCE
62 $(call if_changed,uimage)
63 @echo ' Image $@ is ready'
64
65$(obj)/vmlinux.bin: vmlinux FORCE 70$(obj)/vmlinux.bin: vmlinux FORCE
66 $(call if_changed,objcopy) 71 $(call if_changed,objcopy)
67 72
68$(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE 73$(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE
69 $(call if_changed,gzip) 74 $(call if_changed,gzip)
70 75
76$(obj)/vmlinux.bin.bz2: $(obj)/vmlinux.bin FORCE
77 $(call if_changed,bzip2)
78
79$(obj)/vmlinux.bin.lzma: $(obj)/vmlinux.bin FORCE
80 $(call if_changed,lzma)
81
82$(obj)/uImage.bz2: $(obj)/vmlinux.bin.bz2
83 $(call if_changed,uimage,bzip2)
84
85$(obj)/uImage.gz: $(obj)/vmlinux.bin.gz
86 $(call if_changed,uimage,gzip)
87
88$(obj)/uImage.lzma: $(obj)/vmlinux.bin.lzma
89 $(call if_changed,uimage,lzma)
90
71OBJCOPYFLAGS_vmlinux.srec := -I binary -O srec 91OBJCOPYFLAGS_vmlinux.srec := -I binary -O srec
72$(obj)/vmlinux.srec: $(obj)/compressed/vmlinux 92$(obj)/vmlinux.srec: $(obj)/compressed/vmlinux
73 $(call if_changed,objcopy) 93 $(call if_changed,objcopy)
@@ -76,5 +96,9 @@ OBJCOPYFLAGS_uImage.srec := -I binary -O srec
76$(obj)/uImage.srec: $(obj)/uImage 96$(obj)/uImage.srec: $(obj)/uImage
77 $(call if_changed,objcopy) 97 $(call if_changed,objcopy)
78 98
79clean-files += uImage uImage.srec vmlinux.srec \ 99$(obj)/uImage: $(obj)/uImage.$(suffix-y)
80 vmlinux.bin vmlinux.bin.gz 100 @ln -sf $(notdir $<) $@
101 @echo ' Image $@ is ready'
102
103export CONFIG_PAGE_OFFSET CONFIG_MEMORY_START CONFIG_BOOT_LINK_OFFSET \
104 CONFIG_ZERO_PAGE_OFFSET CONFIG_ENTRY_OFFSET KERNEL_MEMORY suffix-y
diff --git a/arch/sh/boot/compressed/.gitignore b/arch/sh/boot/compressed/.gitignore
new file mode 100644
index 000000000000..2374a83d87b2
--- /dev/null
+++ b/arch/sh/boot/compressed/.gitignore
@@ -0,0 +1 @@
vmlinux.bin.*
diff --git a/arch/sh/boot/compressed/Makefile b/arch/sh/boot/compressed/Makefile
index 9531bf1b7c2f..6182eca5180a 100644
--- a/arch/sh/boot/compressed/Makefile
+++ b/arch/sh/boot/compressed/Makefile
@@ -5,9 +5,10 @@
5# 5#
6 6
7targets := vmlinux vmlinux.bin vmlinux.bin.gz \ 7targets := vmlinux vmlinux.bin vmlinux.bin.gz \
8 head_$(BITS).o misc_$(BITS).o piggy.o 8 vmlinux.bin.bz2 vmlinux.bin.lzma \
9 head_$(BITS).o misc.o piggy.o
9 10
10OBJECTS = $(obj)/head_$(BITS).o $(obj)/misc_$(BITS).o $(obj)/cache.o 11OBJECTS = $(obj)/head_$(BITS).o $(obj)/misc.o $(obj)/cache.o
11 12
12ifdef CONFIG_SH_STANDARD_BIOS 13ifdef CONFIG_SH_STANDARD_BIOS
13OBJECTS += $(obj)/../../kernel/sh_bios.o 14OBJECTS += $(obj)/../../kernel/sh_bios.o
@@ -23,7 +24,7 @@ IMAGE_OFFSET := $(shell /bin/bash -c 'printf "0x%08x" \
23 24
24LIBGCC := $(shell $(CC) $(KBUILD_CFLAGS) -print-libgcc-file-name) 25LIBGCC := $(shell $(CC) $(KBUILD_CFLAGS) -print-libgcc-file-name)
25 26
26ifeq ($(CONFIG_FUNCTION_TRACER),y) 27ifeq ($(CONFIG_MCOUNT),y)
27ORIG_CFLAGS := $(KBUILD_CFLAGS) 28ORIG_CFLAGS := $(KBUILD_CFLAGS)
28KBUILD_CFLAGS = $(subst -pg, , $(ORIG_CFLAGS)) 29KBUILD_CFLAGS = $(subst -pg, , $(ORIG_CFLAGS))
29endif 30endif
@@ -38,10 +39,18 @@ $(obj)/vmlinux: $(OBJECTS) $(obj)/piggy.o $(LIBGCC) FORCE
38$(obj)/vmlinux.bin: vmlinux FORCE 39$(obj)/vmlinux.bin: vmlinux FORCE
39 $(call if_changed,objcopy) 40 $(call if_changed,objcopy)
40 41
41$(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE 42vmlinux.bin.all-y := $(obj)/vmlinux.bin
43
44$(obj)/vmlinux.bin.gz: $(vmlinux.bin.all-y) FORCE
42 $(call if_changed,gzip) 45 $(call if_changed,gzip)
46$(obj)/vmlinux.bin.bz2: $(vmlinux.bin.all-y) FORCE
47 $(call if_changed,bzip2)
48$(obj)/vmlinux.bin.lzma: $(vmlinux.bin.all-y) FORCE
49 $(call if_changed,lzma)
43 50
44OBJCOPYFLAGS += -R .empty_zero_page 51OBJCOPYFLAGS += -R .empty_zero_page
45 52
46$(obj)/piggy.o: $(obj)/piggy.S $(obj)/vmlinux.bin.gz FORCE 53LDFLAGS_piggy.o := -r --format binary --oformat $(ld-bfd) -T
47 $(call if_changed,as_o_S) 54
55$(obj)/piggy.o: $(obj)/vmlinux.scr $(obj)/vmlinux.bin.$(suffix-y) FORCE
56 $(call if_changed,ld)
diff --git a/arch/sh/boot/compressed/misc.c b/arch/sh/boot/compressed/misc.c
new file mode 100644
index 000000000000..fd56a71ca9d9
--- /dev/null
+++ b/arch/sh/boot/compressed/misc.c
@@ -0,0 +1,149 @@
1/*
2 * arch/sh/boot/compressed/misc.c
3 *
4 * This is a collection of several routines from gzip-1.0.3
5 * adapted for Linux.
6 *
7 * malloc by Hannu Savolainen 1993 and Matthias Urlichs 1994
8 *
9 * Adapted for SH by Stuart Menefy, Aug 1999
10 *
11 * Modified to use standard LinuxSH BIOS by Greg Banks 7Jul2000
12 */
13
14#include <asm/uaccess.h>
15#include <asm/addrspace.h>
16#include <asm/page.h>
17#include <asm/sh_bios.h>
18
19/*
20 * gzip declarations
21 */
22
23#define STATIC static
24
25#undef memset
26#undef memcpy
27#define memzero(s, n) memset ((s), 0, (n))
28
29/* cache.c */
30#define CACHE_ENABLE 0
31#define CACHE_DISABLE 1
32int cache_control(unsigned int command);
33
34extern char input_data[];
35extern int input_len;
36static unsigned char *output;
37
38static void error(char *m);
39
40int puts(const char *);
41
42extern int _text; /* Defined in vmlinux.lds.S */
43extern int _end;
44static unsigned long free_mem_ptr;
45static unsigned long free_mem_end_ptr;
46
47#ifdef CONFIG_HAVE_KERNEL_BZIP2
48#define HEAP_SIZE 0x400000
49#else
50#define HEAP_SIZE 0x10000
51#endif
52
53#ifdef CONFIG_KERNEL_GZIP
54#include "../../../../lib/decompress_inflate.c"
55#endif
56
57#ifdef CONFIG_KERNEL_BZIP2
58#include "../../../../lib/decompress_bunzip2.c"
59#endif
60
61#ifdef CONFIG_KERNEL_LZMA
62#include "../../../../lib/decompress_unlzma.c"
63#endif
64
65#ifdef CONFIG_SH_STANDARD_BIOS
66size_t strlen(const char *s)
67{
68 int i = 0;
69
70 while (*s++)
71 i++;
72 return i;
73}
74
75int puts(const char *s)
76{
77 int len = strlen(s);
78 sh_bios_console_write(s, len);
79 return len;
80}
81#else
82int puts(const char *s)
83{
84 /* This should be updated to use the sh-sci routines */
85 return 0;
86}
87#endif
88
89void* memset(void* s, int c, size_t n)
90{
91 int i;
92 char *ss = (char*)s;
93
94 for (i=0;i<n;i++) ss[i] = c;
95 return s;
96}
97
98void* memcpy(void* __dest, __const void* __src,
99 size_t __n)
100{
101 int i;
102 char *d = (char *)__dest, *s = (char *)__src;
103
104 for (i=0;i<__n;i++) d[i] = s[i];
105 return __dest;
106}
107
108static void error(char *x)
109{
110 puts("\n\n");
111 puts(x);
112 puts("\n\n -- System halted");
113
114 while(1); /* Halt */
115}
116
117#ifdef CONFIG_SUPERH64
118#define stackalign 8
119#else
120#define stackalign 4
121#endif
122
123#define STACK_SIZE (4096)
124long __attribute__ ((aligned(stackalign))) user_stack[STACK_SIZE];
125long *stack_start = &user_stack[STACK_SIZE];
126
127void decompress_kernel(void)
128{
129 unsigned long output_addr;
130
131#ifdef CONFIG_SUPERH64
132 output_addr = (CONFIG_MEMORY_START + 0x2000);
133#else
134 output_addr = PHYSADDR((unsigned long)&_text+PAGE_SIZE);
135#ifdef CONFIG_29BIT
136 output_addr |= P2SEG;
137#endif
138#endif
139
140 output = (unsigned char *)output_addr;
141 free_mem_ptr = (unsigned long)&_end;
142 free_mem_end_ptr = free_mem_ptr + HEAP_SIZE;
143
144 puts("Uncompressing Linux... ");
145 cache_control(CACHE_ENABLE);
146 decompress(input_data, input_len, NULL, NULL, output, NULL, error);
147 cache_control(CACHE_DISABLE);
148 puts("Ok, booting the kernel.\n");
149}
diff --git a/arch/sh/boot/compressed/misc_32.c b/arch/sh/boot/compressed/misc_32.c
deleted file mode 100644
index efdba6b29572..000000000000
--- a/arch/sh/boot/compressed/misc_32.c
+++ /dev/null
@@ -1,206 +0,0 @@
1/*
2 * arch/sh/boot/compressed/misc.c
3 *
4 * This is a collection of several routines from gzip-1.0.3
5 * adapted for Linux.
6 *
7 * malloc by Hannu Savolainen 1993 and Matthias Urlichs 1994
8 *
9 * Adapted for SH by Stuart Menefy, Aug 1999
10 *
11 * Modified to use standard LinuxSH BIOS by Greg Banks 7Jul2000
12 */
13
14#include <asm/uaccess.h>
15#include <asm/addrspace.h>
16#include <asm/page.h>
17#ifdef CONFIG_SH_STANDARD_BIOS
18#include <asm/sh_bios.h>
19#endif
20
21/*
22 * gzip declarations
23 */
24
25#define OF(args) args
26#define STATIC static
27
28#undef memset
29#undef memcpy
30#define memzero(s, n) memset ((s), 0, (n))
31
32typedef unsigned char uch;
33typedef unsigned short ush;
34typedef unsigned long ulg;
35
36#define WSIZE 0x8000 /* Window size must be at least 32k, */
37 /* and a power of two */
38
39static uch *inbuf; /* input buffer */
40static uch window[WSIZE]; /* Sliding window buffer */
41
42static unsigned insize = 0; /* valid bytes in inbuf */
43static unsigned inptr = 0; /* index of next byte to be processed in inbuf */
44static unsigned outcnt = 0; /* bytes in output buffer */
45
46/* gzip flag byte */
47#define ASCII_FLAG 0x01 /* bit 0 set: file probably ASCII text */
48#define CONTINUATION 0x02 /* bit 1 set: continuation of multi-part gzip file */
49#define EXTRA_FIELD 0x04 /* bit 2 set: extra field present */
50#define ORIG_NAME 0x08 /* bit 3 set: original file name present */
51#define COMMENT 0x10 /* bit 4 set: file comment present */
52#define ENCRYPTED 0x20 /* bit 5 set: file is encrypted */
53#define RESERVED 0xC0 /* bit 6,7: reserved */
54
55#define get_byte() (inptr < insize ? inbuf[inptr++] : fill_inbuf())
56
57/* Diagnostic functions */
58#ifdef DEBUG
59# define Assert(cond,msg) {if(!(cond)) error(msg);}
60# define Trace(x) fprintf x
61# define Tracev(x) {if (verbose) fprintf x ;}
62# define Tracevv(x) {if (verbose>1) fprintf x ;}
63# define Tracec(c,x) {if (verbose && (c)) fprintf x ;}
64# define Tracecv(c,x) {if (verbose>1 && (c)) fprintf x ;}
65#else
66# define Assert(cond,msg)
67# define Trace(x)
68# define Tracev(x)
69# define Tracevv(x)
70# define Tracec(c,x)
71# define Tracecv(c,x)
72#endif
73
74static int fill_inbuf(void);
75static void flush_window(void);
76static void error(char *m);
77
78extern char input_data[];
79extern int input_len;
80
81static long bytes_out = 0;
82static uch *output_data;
83static unsigned long output_ptr = 0;
84
85static void error(char *m);
86
87int puts(const char *);
88
89extern int _text; /* Defined in vmlinux.lds.S */
90extern int _end;
91static unsigned long free_mem_ptr;
92static unsigned long free_mem_end_ptr;
93
94#define HEAP_SIZE 0x10000
95
96#include "../../../../lib/inflate.c"
97
98#ifdef CONFIG_SH_STANDARD_BIOS
99size_t strlen(const char *s)
100{
101 int i = 0;
102
103 while (*s++)
104 i++;
105 return i;
106}
107
108int puts(const char *s)
109{
110 int len = strlen(s);
111 sh_bios_console_write(s, len);
112 return len;
113}
114#else
115int puts(const char *s)
116{
117 /* This should be updated to use the sh-sci routines */
118 return 0;
119}
120#endif
121
122void* memset(void* s, int c, size_t n)
123{
124 int i;
125 char *ss = (char*)s;
126
127 for (i=0;i<n;i++) ss[i] = c;
128 return s;
129}
130
131void* memcpy(void* __dest, __const void* __src,
132 size_t __n)
133{
134 int i;
135 char *d = (char *)__dest, *s = (char *)__src;
136
137 for (i=0;i<__n;i++) d[i] = s[i];
138 return __dest;
139}
140
141/* ===========================================================================
142 * Fill the input buffer. This is called only when the buffer is empty
143 * and at least one byte is really needed.
144 */
145static int fill_inbuf(void)
146{
147 if (insize != 0) {
148 error("ran out of input data");
149 }
150
151 inbuf = input_data;
152 insize = input_len;
153 inptr = 1;
154 return inbuf[0];
155}
156
157/* ===========================================================================
158 * Write the output window window[0..outcnt-1] and update crc and bytes_out.
159 * (Used for the decompressed data only.)
160 */
161static void flush_window(void)
162{
163 ulg c = crc; /* temporary variable */
164 unsigned n;
165 uch *in, *out, ch;
166
167 in = window;
168 out = &output_data[output_ptr];
169 for (n = 0; n < outcnt; n++) {
170 ch = *out++ = *in++;
171 c = crc_32_tab[((int)c ^ ch) & 0xff] ^ (c >> 8);
172 }
173 crc = c;
174 bytes_out += (ulg)outcnt;
175 output_ptr += (ulg)outcnt;
176 outcnt = 0;
177}
178
179static void error(char *x)
180{
181 puts("\n\n");
182 puts(x);
183 puts("\n\n -- System halted");
184
185 while(1); /* Halt */
186}
187
188#define STACK_SIZE (4096)
189long user_stack [STACK_SIZE];
190long* stack_start = &user_stack[STACK_SIZE];
191
192void decompress_kernel(void)
193{
194 output_data = NULL;
195 output_ptr = PHYSADDR((unsigned long)&_text+PAGE_SIZE);
196#ifdef CONFIG_29BIT
197 output_ptr |= P2SEG;
198#endif
199 free_mem_ptr = (unsigned long)&_end;
200 free_mem_end_ptr = free_mem_ptr + HEAP_SIZE;
201
202 makecrc();
203 puts("Uncompressing Linux... ");
204 gunzip();
205 puts("Ok, booting the kernel.\n");
206}
diff --git a/arch/sh/boot/compressed/misc_64.c b/arch/sh/boot/compressed/misc_64.c
deleted file mode 100644
index 2941657e18aa..000000000000
--- a/arch/sh/boot/compressed/misc_64.c
+++ /dev/null
@@ -1,210 +0,0 @@
1/*
2 * arch/sh/boot/compressed/misc_64.c
3 *
4 * This is a collection of several routines from gzip-1.0.3
5 * adapted for Linux.
6 *
7 * malloc by Hannu Savolainen 1993 and Matthias Urlichs 1994
8 *
9 * Adapted for SHmedia from sh by Stuart Menefy, May 2002
10 */
11
12#include <asm/uaccess.h>
13
14/* cache.c */
15#define CACHE_ENABLE 0
16#define CACHE_DISABLE 1
17int cache_control(unsigned int command);
18
19/*
20 * gzip declarations
21 */
22
23#define OF(args) args
24#define STATIC static
25
26#undef memset
27#undef memcpy
28#define memzero(s, n) memset ((s), 0, (n))
29
30typedef unsigned char uch;
31typedef unsigned short ush;
32typedef unsigned long ulg;
33
34#define WSIZE 0x8000 /* Window size must be at least 32k, */
35 /* and a power of two */
36
37static uch *inbuf; /* input buffer */
38static uch window[WSIZE]; /* Sliding window buffer */
39
40static unsigned insize = 0; /* valid bytes in inbuf */
41static unsigned inptr = 0; /* index of next byte to be processed in inbuf */
42static unsigned outcnt = 0; /* bytes in output buffer */
43
44/* gzip flag byte */
45#define ASCII_FLAG 0x01 /* bit 0 set: file probably ASCII text */
46#define CONTINUATION 0x02 /* bit 1 set: continuation of multi-part gzip file */
47#define EXTRA_FIELD 0x04 /* bit 2 set: extra field present */
48#define ORIG_NAME 0x08 /* bit 3 set: original file name present */
49#define COMMENT 0x10 /* bit 4 set: file comment present */
50#define ENCRYPTED 0x20 /* bit 5 set: file is encrypted */
51#define RESERVED 0xC0 /* bit 6,7: reserved */
52
53#define get_byte() (inptr < insize ? inbuf[inptr++] : fill_inbuf())
54
55/* Diagnostic functions */
56#ifdef DEBUG
57# define Assert(cond,msg) {if(!(cond)) error(msg);}
58# define Trace(x) fprintf x
59# define Tracev(x) {if (verbose) fprintf x ;}
60# define Tracevv(x) {if (verbose>1) fprintf x ;}
61# define Tracec(c,x) {if (verbose && (c)) fprintf x ;}
62# define Tracecv(c,x) {if (verbose>1 && (c)) fprintf x ;}
63#else
64# define Assert(cond,msg)
65# define Trace(x)
66# define Tracev(x)
67# define Tracevv(x)
68# define Tracec(c,x)
69# define Tracecv(c,x)
70#endif
71
72static int fill_inbuf(void);
73static void flush_window(void);
74static void error(char *m);
75
76extern char input_data[];
77extern int input_len;
78
79static long bytes_out = 0;
80static uch *output_data;
81static unsigned long output_ptr = 0;
82
83static void error(char *m);
84
85static void puts(const char *);
86
87extern int _text; /* Defined in vmlinux.lds.S */
88extern int _end;
89static unsigned long free_mem_ptr;
90static unsigned long free_mem_end_ptr;
91
92#define HEAP_SIZE 0x10000
93
94#include "../../../../lib/inflate.c"
95
96void puts(const char *s)
97{
98}
99
100void *memset(void *s, int c, size_t n)
101{
102 int i;
103 char *ss = (char *) s;
104
105 for (i = 0; i < n; i++)
106 ss[i] = c;
107 return s;
108}
109
110void *memcpy(void *__dest, __const void *__src, size_t __n)
111{
112 int i;
113 char *d = (char *) __dest, *s = (char *) __src;
114
115 for (i = 0; i < __n; i++)
116 d[i] = s[i];
117 return __dest;
118}
119
120/* ===========================================================================
121 * Fill the input buffer. This is called only when the buffer is empty
122 * and at least one byte is really needed.
123 */
124static int fill_inbuf(void)
125{
126 if (insize != 0) {
127 error("ran out of input data\n");
128 }
129
130 inbuf = input_data;
131 insize = input_len;
132 inptr = 1;
133 return inbuf[0];
134}
135
136/* ===========================================================================
137 * Write the output window window[0..outcnt-1] and update crc and bytes_out.
138 * (Used for the decompressed data only.)
139 */
140static void flush_window(void)
141{
142 ulg c = crc; /* temporary variable */
143 unsigned n;
144 uch *in, *out, ch;
145
146 in = window;
147 out = &output_data[output_ptr];
148 for (n = 0; n < outcnt; n++) {
149 ch = *out++ = *in++;
150 c = crc_32_tab[((int) c ^ ch) & 0xff] ^ (c >> 8);
151 }
152 crc = c;
153 bytes_out += (ulg) outcnt;
154 output_ptr += (ulg) outcnt;
155 outcnt = 0;
156 puts(".");
157}
158
159static void error(char *x)
160{
161 puts("\n\n");
162 puts(x);
163 puts("\n\n -- System halted");
164
165 while (1) ; /* Halt */
166}
167
168#define STACK_SIZE (4096)
169long __attribute__ ((aligned(8))) user_stack[STACK_SIZE];
170long *stack_start = &user_stack[STACK_SIZE];
171
172void decompress_kernel(void)
173{
174 output_data = (uch *) (CONFIG_MEMORY_START + 0x2000);
175 free_mem_ptr = (unsigned long) &_end;
176 free_mem_end_ptr = free_mem_ptr + HEAP_SIZE;
177
178 makecrc();
179 puts("Uncompressing Linux... ");
180 cache_control(CACHE_ENABLE);
181 gunzip();
182 puts("\n");
183
184#if 0
185 /* When booting from ROM may want to do something like this if the
186 * boot loader doesn't.
187 */
188
189 /* Set up the parameters and command line */
190 {
191 volatile unsigned int *parambase =
192 (int *) (CONFIG_MEMORY_START + 0x1000);
193
194 parambase[0] = 0x1; /* MOUNT_ROOT_RDONLY */
195 parambase[1] = 0x0; /* RAMDISK_FLAGS */
196 parambase[2] = 0x0200; /* ORIG_ROOT_DEV */
197 parambase[3] = 0x0; /* LOADER_TYPE */
198 parambase[4] = 0x0; /* INITRD_START */
199 parambase[5] = 0x0; /* INITRD_SIZE */
200 parambase[6] = 0;
201
202 strcpy((char *) ((int) parambase + 0x100),
203 "console=ttySC0,38400");
204 }
205#endif
206
207 puts("Ok, booting the kernel.\n");
208
209 cache_control(CACHE_DISABLE);
210}
diff --git a/arch/sh/boot/compressed/piggy.S b/arch/sh/boot/compressed/piggy.S
deleted file mode 100644
index 566071926b13..000000000000
--- a/arch/sh/boot/compressed/piggy.S
+++ /dev/null
@@ -1,8 +0,0 @@
1 .global input_len, input_data
2 .data
3input_len:
4 .long input_data_end - input_data
5input_data:
6 .incbin "arch/sh/boot/compressed/vmlinux.bin.gz"
7input_data_end:
8 .end
diff --git a/arch/sh/boot/compressed/vmlinux.scr b/arch/sh/boot/compressed/vmlinux.scr
new file mode 100644
index 000000000000..f02382ae5c48
--- /dev/null
+++ b/arch/sh/boot/compressed/vmlinux.scr
@@ -0,0 +1,10 @@
1SECTIONS
2{
3 .rodata.compressed : {
4 input_len = .;
5 LONG(input_data_end - input_data) input_data = .;
6 *(.data)
7 output_len = . - 4;
8 input_data_end = .;
9 }
10}
diff --git a/arch/sh/boot/romimage/Makefile b/arch/sh/boot/romimage/Makefile
new file mode 100644
index 000000000000..5806eee84f6f
--- /dev/null
+++ b/arch/sh/boot/romimage/Makefile
@@ -0,0 +1,19 @@
1#
2# linux/arch/sh/boot/romimage/Makefile
3#
4# create an image suitable for burning to flash from zImage
5#
6
7targets := vmlinux head.o
8
9OBJECTS = $(obj)/head.o
10LDFLAGS_vmlinux := --oformat $(ld-bfd) -Ttext 0 -e romstart
11
12$(obj)/vmlinux: $(OBJECTS) $(obj)/piggy.o FORCE
13 $(call if_changed,ld)
14 @:
15
16LDFLAGS_piggy.o := -r --format binary --oformat $(ld-bfd) -T
17
18$(obj)/piggy.o: $(obj)/vmlinux.scr arch/sh/boot/zImage FORCE
19 $(call if_changed,ld)
diff --git a/arch/sh/boot/romimage/head.S b/arch/sh/boot/romimage/head.S
new file mode 100644
index 000000000000..219bc626dd71
--- /dev/null
+++ b/arch/sh/boot/romimage/head.S
@@ -0,0 +1,10 @@
1/*
2 * linux/arch/sh/boot/romimage/head.S
3 *
4 * Board specific setup code, executed before zImage loader
5 */
6
7.text
8 .global romstart
9romstart:
10#include <mach/romimage.h>
diff --git a/arch/sh/boot/romimage/vmlinux.scr b/arch/sh/boot/romimage/vmlinux.scr
new file mode 100644
index 000000000000..287c08f8b4bb
--- /dev/null
+++ b/arch/sh/boot/romimage/vmlinux.scr
@@ -0,0 +1,6 @@
1SECTIONS
2{
3 .text : {
4 *(.data)
5 }
6}
diff --git a/arch/sh/configs/kfr2r09_defconfig b/arch/sh/configs/kfr2r09_defconfig
new file mode 100644
index 000000000000..90e575c34d58
--- /dev/null
+++ b/arch/sh/configs/kfr2r09_defconfig
@@ -0,0 +1,877 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.31-rc3
4# Thu Jul 23 17:45:09 2009
5#
6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y
8# CONFIG_SUPERH64 is not set
9CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
10CONFIG_RWSEM_GENERIC_SPINLOCK=y
11CONFIG_GENERIC_BUG=y
12CONFIG_GENERIC_FIND_NEXT_BIT=y
13CONFIG_GENERIC_HWEIGHT=y
14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
16CONFIG_GENERIC_IRQ_PROBE=y
17CONFIG_IRQ_PER_CPU=y
18CONFIG_GENERIC_GPIO=y
19CONFIG_GENERIC_TIME=y
20CONFIG_GENERIC_CLOCKEVENTS=y
21CONFIG_ARCH_SUSPEND_POSSIBLE=y
22CONFIG_ARCH_HIBERNATION_POSSIBLE=y
23CONFIG_SYS_SUPPORTS_CMT=y
24CONFIG_SYS_SUPPORTS_TMU=y
25CONFIG_STACKTRACE_SUPPORT=y
26CONFIG_LOCKDEP_SUPPORT=y
27CONFIG_HAVE_LATENCYTOP_SUPPORT=y
28# CONFIG_ARCH_HAS_ILOG2_U32 is not set
29# CONFIG_ARCH_HAS_ILOG2_U64 is not set
30CONFIG_ARCH_NO_VIRT_TO_BUS=y
31CONFIG_ARCH_HAS_DEFAULT_IDLE=y
32CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
33CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
34CONFIG_CONSTRUCTORS=y
35
36#
37# General setup
38#
39CONFIG_EXPERIMENTAL=y
40CONFIG_BROKEN_ON_SMP=y
41CONFIG_INIT_ENV_ARG_LIMIT=32
42CONFIG_LOCALVERSION=""
43# CONFIG_LOCALVERSION_AUTO is not set
44CONFIG_HAVE_KERNEL_GZIP=y
45CONFIG_HAVE_KERNEL_BZIP2=y
46CONFIG_HAVE_KERNEL_LZMA=y
47CONFIG_KERNEL_GZIP=y
48# CONFIG_KERNEL_BZIP2 is not set
49# CONFIG_KERNEL_LZMA is not set
50CONFIG_SWAP=y
51CONFIG_SYSVIPC=y
52CONFIG_SYSVIPC_SYSCTL=y
53# CONFIG_POSIX_MQUEUE is not set
54CONFIG_BSD_PROCESS_ACCT=y
55# CONFIG_BSD_PROCESS_ACCT_V3 is not set
56# CONFIG_TASKSTATS is not set
57# CONFIG_AUDIT is not set
58
59#
60# RCU Subsystem
61#
62CONFIG_CLASSIC_RCU=y
63# CONFIG_TREE_RCU is not set
64# CONFIG_PREEMPT_RCU is not set
65# CONFIG_TREE_RCU_TRACE is not set
66# CONFIG_PREEMPT_RCU_TRACE is not set
67CONFIG_IKCONFIG=y
68CONFIG_IKCONFIG_PROC=y
69CONFIG_LOG_BUF_SHIFT=14
70CONFIG_GROUP_SCHED=y
71CONFIG_FAIR_GROUP_SCHED=y
72# CONFIG_RT_GROUP_SCHED is not set
73CONFIG_USER_SCHED=y
74# CONFIG_CGROUP_SCHED is not set
75# CONFIG_CGROUPS is not set
76CONFIG_SYSFS_DEPRECATED=y
77CONFIG_SYSFS_DEPRECATED_V2=y
78# CONFIG_RELAY is not set
79# CONFIG_NAMESPACES is not set
80CONFIG_BLK_DEV_INITRD=y
81CONFIG_INITRAMFS_SOURCE=""
82CONFIG_RD_GZIP=y
83# CONFIG_RD_BZIP2 is not set
84# CONFIG_RD_LZMA is not set
85CONFIG_CC_OPTIMIZE_FOR_SIZE=y
86CONFIG_SYSCTL=y
87CONFIG_ANON_INODES=y
88CONFIG_EMBEDDED=y
89CONFIG_UID16=y
90CONFIG_SYSCTL_SYSCALL=y
91# CONFIG_KALLSYMS is not set
92CONFIG_HOTPLUG=y
93CONFIG_PRINTK=y
94CONFIG_BUG=y
95CONFIG_ELF_CORE=y
96CONFIG_BASE_FULL=y
97CONFIG_FUTEX=y
98CONFIG_EPOLL=y
99CONFIG_SIGNALFD=y
100CONFIG_TIMERFD=y
101CONFIG_EVENTFD=y
102CONFIG_SHMEM=y
103CONFIG_AIO=y
104CONFIG_HAVE_PERF_COUNTERS=y
105
106#
107# Performance Counters
108#
109# CONFIG_PERF_COUNTERS is not set
110CONFIG_VM_EVENT_COUNTERS=y
111# CONFIG_STRIP_ASM_SYMS is not set
112CONFIG_COMPAT_BRK=y
113CONFIG_SLAB=y
114# CONFIG_SLUB is not set
115# CONFIG_SLOB is not set
116# CONFIG_PROFILING is not set
117# CONFIG_MARKERS is not set
118CONFIG_HAVE_OPROFILE=y
119CONFIG_HAVE_IOREMAP_PROT=y
120CONFIG_HAVE_KPROBES=y
121CONFIG_HAVE_KRETPROBES=y
122CONFIG_HAVE_ARCH_TRACEHOOK=y
123CONFIG_HAVE_CLK=y
124CONFIG_HAVE_DMA_API_DEBUG=y
125
126#
127# GCOV-based kernel profiling
128#
129# CONFIG_GCOV_KERNEL is not set
130# CONFIG_SLOW_WORK is not set
131CONFIG_HAVE_GENERIC_DMA_COHERENT=y
132CONFIG_SLABINFO=y
133CONFIG_RT_MUTEXES=y
134CONFIG_BASE_SMALL=0
135# CONFIG_MODULES is not set
136CONFIG_BLOCK=y
137CONFIG_LBDAF=y
138# CONFIG_BLK_DEV_BSG is not set
139# CONFIG_BLK_DEV_INTEGRITY is not set
140
141#
142# IO Schedulers
143#
144CONFIG_IOSCHED_NOOP=y
145# CONFIG_IOSCHED_AS is not set
146# CONFIG_IOSCHED_DEADLINE is not set
147# CONFIG_IOSCHED_CFQ is not set
148# CONFIG_DEFAULT_AS is not set
149# CONFIG_DEFAULT_DEADLINE is not set
150# CONFIG_DEFAULT_CFQ is not set
151CONFIG_DEFAULT_NOOP=y
152CONFIG_DEFAULT_IOSCHED="noop"
153# CONFIG_FREEZER is not set
154
155#
156# System type
157#
158CONFIG_CPU_SH4=y
159CONFIG_CPU_SH4A=y
160CONFIG_CPU_SHX2=y
161CONFIG_ARCH_SHMOBILE=y
162# CONFIG_CPU_SUBTYPE_SH7619 is not set
163# CONFIG_CPU_SUBTYPE_SH7201 is not set
164# CONFIG_CPU_SUBTYPE_SH7203 is not set
165# CONFIG_CPU_SUBTYPE_SH7206 is not set
166# CONFIG_CPU_SUBTYPE_SH7263 is not set
167# CONFIG_CPU_SUBTYPE_MXG is not set
168# CONFIG_CPU_SUBTYPE_SH7705 is not set
169# CONFIG_CPU_SUBTYPE_SH7706 is not set
170# CONFIG_CPU_SUBTYPE_SH7707 is not set
171# CONFIG_CPU_SUBTYPE_SH7708 is not set
172# CONFIG_CPU_SUBTYPE_SH7709 is not set
173# CONFIG_CPU_SUBTYPE_SH7710 is not set
174# CONFIG_CPU_SUBTYPE_SH7712 is not set
175# CONFIG_CPU_SUBTYPE_SH7720 is not set
176# CONFIG_CPU_SUBTYPE_SH7721 is not set
177# CONFIG_CPU_SUBTYPE_SH7750 is not set
178# CONFIG_CPU_SUBTYPE_SH7091 is not set
179# CONFIG_CPU_SUBTYPE_SH7750R is not set
180# CONFIG_CPU_SUBTYPE_SH7750S is not set
181# CONFIG_CPU_SUBTYPE_SH7751 is not set
182# CONFIG_CPU_SUBTYPE_SH7751R is not set
183# CONFIG_CPU_SUBTYPE_SH7760 is not set
184# CONFIG_CPU_SUBTYPE_SH4_202 is not set
185# CONFIG_CPU_SUBTYPE_SH7723 is not set
186CONFIG_CPU_SUBTYPE_SH7724=y
187# CONFIG_CPU_SUBTYPE_SH7763 is not set
188# CONFIG_CPU_SUBTYPE_SH7770 is not set
189# CONFIG_CPU_SUBTYPE_SH7780 is not set
190# CONFIG_CPU_SUBTYPE_SH7785 is not set
191# CONFIG_CPU_SUBTYPE_SH7786 is not set
192# CONFIG_CPU_SUBTYPE_SHX3 is not set
193# CONFIG_CPU_SUBTYPE_SH7343 is not set
194# CONFIG_CPU_SUBTYPE_SH7722 is not set
195# CONFIG_CPU_SUBTYPE_SH7366 is not set
196
197#
198# Memory management options
199#
200CONFIG_QUICKLIST=y
201CONFIG_MMU=y
202CONFIG_PAGE_OFFSET=0x80000000
203CONFIG_FORCE_MAX_ZONEORDER=11
204CONFIG_MEMORY_START=0x08000000
205CONFIG_MEMORY_SIZE=0x08000000
206CONFIG_29BIT=y
207# CONFIG_X2TLB is not set
208CONFIG_VSYSCALL=y
209CONFIG_ARCH_FLATMEM_ENABLE=y
210CONFIG_ARCH_SPARSEMEM_ENABLE=y
211CONFIG_ARCH_SPARSEMEM_DEFAULT=y
212CONFIG_MAX_ACTIVE_REGIONS=1
213CONFIG_ARCH_POPULATES_NODE_MAP=y
214CONFIG_ARCH_SELECT_MEMORY_MODEL=y
215CONFIG_PAGE_SIZE_4KB=y
216# CONFIG_PAGE_SIZE_8KB is not set
217# CONFIG_PAGE_SIZE_16KB is not set
218# CONFIG_PAGE_SIZE_64KB is not set
219CONFIG_SELECT_MEMORY_MODEL=y
220CONFIG_FLATMEM_MANUAL=y
221# CONFIG_DISCONTIGMEM_MANUAL is not set
222# CONFIG_SPARSEMEM_MANUAL is not set
223CONFIG_FLATMEM=y
224CONFIG_FLAT_NODE_MEM_MAP=y
225CONFIG_SPARSEMEM_STATIC=y
226CONFIG_PAGEFLAGS_EXTENDED=y
227CONFIG_SPLIT_PTLOCK_CPUS=4
228# CONFIG_PHYS_ADDR_T_64BIT is not set
229CONFIG_ZONE_DMA_FLAG=0
230CONFIG_NR_QUICK=2
231CONFIG_HAVE_MLOCK=y
232CONFIG_HAVE_MLOCKED_PAGE_BIT=y
233CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
234
235#
236# Cache configuration
237#
238CONFIG_CACHE_WRITEBACK=y
239# CONFIG_CACHE_WRITETHROUGH is not set
240# CONFIG_CACHE_OFF is not set
241
242#
243# Processor features
244#
245CONFIG_CPU_LITTLE_ENDIAN=y
246# CONFIG_CPU_BIG_ENDIAN is not set
247CONFIG_SH_FPU=y
248# CONFIG_SH_STORE_QUEUES is not set
249CONFIG_CPU_HAS_INTEVT=y
250CONFIG_CPU_HAS_SR_RB=y
251CONFIG_CPU_HAS_FPU=y
252
253#
254# Board support
255#
256# CONFIG_SH_7724_SOLUTION_ENGINE is not set
257CONFIG_SH_KFR2R09=y
258
259#
260# Timer and clock configuration
261#
262# CONFIG_SH_TIMER_TMU is not set
263CONFIG_SH_TIMER_CMT=y
264CONFIG_SH_PCLK_FREQ=33333333
265CONFIG_SH_CLK_CPG=y
266CONFIG_TICK_ONESHOT=y
267CONFIG_NO_HZ=y
268# CONFIG_HIGH_RES_TIMERS is not set
269CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
270
271#
272# CPU Frequency scaling
273#
274# CONFIG_CPU_FREQ is not set
275
276#
277# DMA support
278#
279# CONFIG_SH_DMA is not set
280
281#
282# Companion Chips
283#
284
285#
286# Additional SuperH Device Drivers
287#
288# CONFIG_HEARTBEAT is not set
289# CONFIG_PUSH_SWITCH is not set
290
291#
292# Kernel features
293#
294# CONFIG_HZ_100 is not set
295# CONFIG_HZ_250 is not set
296# CONFIG_HZ_300 is not set
297CONFIG_HZ_1000=y
298CONFIG_HZ=1000
299# CONFIG_SCHED_HRTICK is not set
300CONFIG_KEXEC=y
301# CONFIG_CRASH_DUMP is not set
302# CONFIG_SECCOMP is not set
303# CONFIG_PREEMPT_NONE is not set
304CONFIG_PREEMPT_VOLUNTARY=y
305# CONFIG_PREEMPT is not set
306CONFIG_GUSA=y
307# CONFIG_SPARSE_IRQ is not set
308
309#
310# Boot options
311#
312CONFIG_ZERO_PAGE_OFFSET=0x00001000
313CONFIG_BOOT_LINK_OFFSET=0x00800000
314CONFIG_ENTRY_OFFSET=0x00001000
315CONFIG_CMDLINE_BOOL=y
316CONFIG_CMDLINE="console=ttySC1,115200"
317
318#
319# Bus options
320#
321# CONFIG_ARCH_SUPPORTS_MSI is not set
322# CONFIG_PCCARD is not set
323
324#
325# Executable file formats
326#
327CONFIG_BINFMT_ELF=y
328# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
329# CONFIG_HAVE_AOUT is not set
330# CONFIG_BINFMT_MISC is not set
331
332#
333# Power management options (EXPERIMENTAL)
334#
335CONFIG_PM=y
336# CONFIG_PM_DEBUG is not set
337# CONFIG_SUSPEND is not set
338# CONFIG_HIBERNATION is not set
339CONFIG_CPU_IDLE=y
340CONFIG_CPU_IDLE_GOV_LADDER=y
341CONFIG_CPU_IDLE_GOV_MENU=y
342CONFIG_NET=y
343
344#
345# Networking options
346#
347CONFIG_PACKET=y
348CONFIG_PACKET_MMAP=y
349CONFIG_UNIX=y
350# CONFIG_NET_KEY is not set
351CONFIG_INET=y
352# CONFIG_IP_MULTICAST is not set
353# CONFIG_IP_ADVANCED_ROUTER is not set
354CONFIG_IP_FIB_HASH=y
355# CONFIG_IP_PNP is not set
356# CONFIG_NET_IPIP is not set
357# CONFIG_NET_IPGRE is not set
358# CONFIG_ARPD is not set
359# CONFIG_SYN_COOKIES is not set
360# CONFIG_INET_AH is not set
361# CONFIG_INET_ESP is not set
362# CONFIG_INET_IPCOMP is not set
363# CONFIG_INET_XFRM_TUNNEL is not set
364# CONFIG_INET_TUNNEL is not set
365# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
366# CONFIG_INET_XFRM_MODE_TUNNEL is not set
367# CONFIG_INET_XFRM_MODE_BEET is not set
368# CONFIG_INET_LRO is not set
369# CONFIG_INET_DIAG is not set
370# CONFIG_TCP_CONG_ADVANCED is not set
371CONFIG_TCP_CONG_CUBIC=y
372CONFIG_DEFAULT_TCP_CONG="cubic"
373# CONFIG_TCP_MD5SIG is not set
374# CONFIG_IPV6 is not set
375# CONFIG_NETWORK_SECMARK is not set
376# CONFIG_NETFILTER is not set
377# CONFIG_IP_DCCP is not set
378# CONFIG_IP_SCTP is not set
379# CONFIG_TIPC is not set
380# CONFIG_ATM is not set
381# CONFIG_BRIDGE is not set
382# CONFIG_NET_DSA is not set
383# CONFIG_VLAN_8021Q is not set
384# CONFIG_DECNET is not set
385# CONFIG_LLC2 is not set
386# CONFIG_IPX is not set
387# CONFIG_ATALK is not set
388# CONFIG_X25 is not set
389# CONFIG_LAPB is not set
390# CONFIG_ECONET is not set
391# CONFIG_WAN_ROUTER is not set
392# CONFIG_PHONET is not set
393# CONFIG_IEEE802154 is not set
394# CONFIG_NET_SCHED is not set
395# CONFIG_DCB is not set
396
397#
398# Network testing
399#
400# CONFIG_NET_PKTGEN is not set
401# CONFIG_HAMRADIO is not set
402# CONFIG_CAN is not set
403# CONFIG_IRDA is not set
404# CONFIG_BT is not set
405# CONFIG_AF_RXRPC is not set
406# CONFIG_WIRELESS is not set
407# CONFIG_WIMAX is not set
408# CONFIG_RFKILL is not set
409# CONFIG_NET_9P is not set
410
411#
412# Device Drivers
413#
414
415#
416# Generic Driver Options
417#
418CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
419CONFIG_STANDALONE=y
420CONFIG_PREVENT_FIRMWARE_BUILD=y
421CONFIG_FW_LOADER=y
422CONFIG_FIRMWARE_IN_KERNEL=y
423CONFIG_EXTRA_FIRMWARE=""
424# CONFIG_SYS_HYPERVISOR is not set
425# CONFIG_CONNECTOR is not set
426CONFIG_MTD=y
427# CONFIG_MTD_DEBUG is not set
428CONFIG_MTD_CONCAT=y
429CONFIG_MTD_PARTITIONS=y
430# CONFIG_MTD_REDBOOT_PARTS is not set
431CONFIG_MTD_CMDLINE_PARTS=y
432# CONFIG_MTD_AR7_PARTS is not set
433
434#
435# User Modules And Translation Layers
436#
437CONFIG_MTD_CHAR=y
438CONFIG_MTD_BLKDEVS=y
439CONFIG_MTD_BLOCK=y
440# CONFIG_FTL is not set
441# CONFIG_NFTL is not set
442# CONFIG_INFTL is not set
443# CONFIG_RFD_FTL is not set
444# CONFIG_SSFDC is not set
445# CONFIG_MTD_OOPS is not set
446
447#
448# RAM/ROM/Flash chip drivers
449#
450CONFIG_MTD_CFI=y
451# CONFIG_MTD_JEDECPROBE is not set
452CONFIG_MTD_GEN_PROBE=y
453# CONFIG_MTD_CFI_ADV_OPTIONS is not set
454CONFIG_MTD_MAP_BANK_WIDTH_1=y
455CONFIG_MTD_MAP_BANK_WIDTH_2=y
456CONFIG_MTD_MAP_BANK_WIDTH_4=y
457# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
458# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
459# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
460CONFIG_MTD_CFI_I1=y
461CONFIG_MTD_CFI_I2=y
462# CONFIG_MTD_CFI_I4 is not set
463# CONFIG_MTD_CFI_I8 is not set
464CONFIG_MTD_CFI_INTELEXT=y
465# CONFIG_MTD_CFI_AMDSTD is not set
466# CONFIG_MTD_CFI_STAA is not set
467CONFIG_MTD_CFI_UTIL=y
468# CONFIG_MTD_RAM is not set
469# CONFIG_MTD_ROM is not set
470# CONFIG_MTD_ABSENT is not set
471
472#
473# Mapping drivers for chip access
474#
475# CONFIG_MTD_COMPLEX_MAPPINGS is not set
476CONFIG_MTD_PHYSMAP=y
477# CONFIG_MTD_PHYSMAP_COMPAT is not set
478# CONFIG_MTD_PLATRAM is not set
479
480#
481# Self-contained MTD device drivers
482#
483# CONFIG_MTD_SLRAM is not set
484# CONFIG_MTD_PHRAM is not set
485# CONFIG_MTD_MTDRAM is not set
486# CONFIG_MTD_BLOCK2MTD is not set
487
488#
489# Disk-On-Chip Device Drivers
490#
491# CONFIG_MTD_DOC2000 is not set
492# CONFIG_MTD_DOC2001 is not set
493# CONFIG_MTD_DOC2001PLUS is not set
494# CONFIG_MTD_NAND is not set
495# CONFIG_MTD_ONENAND is not set
496
497#
498# LPDDR flash memory drivers
499#
500# CONFIG_MTD_LPDDR is not set
501
502#
503# UBI - Unsorted block images
504#
505CONFIG_MTD_UBI=y
506CONFIG_MTD_UBI_WL_THRESHOLD=4096
507CONFIG_MTD_UBI_BEB_RESERVE=1
508# CONFIG_MTD_UBI_GLUEBI is not set
509
510#
511# UBI debugging options
512#
513# CONFIG_MTD_UBI_DEBUG is not set
514# CONFIG_PARPORT is not set
515CONFIG_BLK_DEV=y
516# CONFIG_BLK_DEV_COW_COMMON is not set
517# CONFIG_BLK_DEV_LOOP is not set
518# CONFIG_BLK_DEV_NBD is not set
519# CONFIG_BLK_DEV_RAM is not set
520# CONFIG_CDROM_PKTCDVD is not set
521# CONFIG_ATA_OVER_ETH is not set
522# CONFIG_BLK_DEV_HD is not set
523# CONFIG_MISC_DEVICES is not set
524CONFIG_HAVE_IDE=y
525# CONFIG_IDE is not set
526
527#
528# SCSI device support
529#
530# CONFIG_RAID_ATTRS is not set
531# CONFIG_SCSI is not set
532# CONFIG_SCSI_DMA is not set
533# CONFIG_SCSI_NETLINK is not set
534# CONFIG_ATA is not set
535# CONFIG_MD is not set
536# CONFIG_NETDEVICES is not set
537# CONFIG_ISDN is not set
538# CONFIG_PHONE is not set
539
540#
541# Input device support
542#
543CONFIG_INPUT=y
544# CONFIG_INPUT_FF_MEMLESS is not set
545# CONFIG_INPUT_POLLDEV is not set
546
547#
548# Userland interfaces
549#
550# CONFIG_INPUT_MOUSEDEV is not set
551# CONFIG_INPUT_JOYDEV is not set
552CONFIG_INPUT_EVDEV=y
553# CONFIG_INPUT_EVBUG is not set
554
555#
556# Input Device Drivers
557#
558CONFIG_INPUT_KEYBOARD=y
559# CONFIG_KEYBOARD_ATKBD is not set
560# CONFIG_KEYBOARD_LKKBD is not set
561# CONFIG_KEYBOARD_GPIO is not set
562# CONFIG_KEYBOARD_MATRIX is not set
563# CONFIG_KEYBOARD_NEWTON is not set
564# CONFIG_KEYBOARD_STOWAWAY is not set
565# CONFIG_KEYBOARD_SUNKBD is not set
566CONFIG_KEYBOARD_SH_KEYSC=y
567# CONFIG_KEYBOARD_XTKBD is not set
568# CONFIG_INPUT_MOUSE is not set
569# CONFIG_INPUT_JOYSTICK is not set
570# CONFIG_INPUT_TABLET is not set
571# CONFIG_INPUT_TOUCHSCREEN is not set
572# CONFIG_INPUT_MISC is not set
573
574#
575# Hardware I/O ports
576#
577# CONFIG_SERIO is not set
578# CONFIG_GAMEPORT is not set
579
580#
581# Character devices
582#
583CONFIG_VT=y
584CONFIG_CONSOLE_TRANSLATIONS=y
585CONFIG_VT_CONSOLE=y
586CONFIG_HW_CONSOLE=y
587CONFIG_VT_HW_CONSOLE_BINDING=y
588CONFIG_DEVKMEM=y
589# CONFIG_SERIAL_NONSTANDARD is not set
590
591#
592# Serial drivers
593#
594# CONFIG_SERIAL_8250 is not set
595
596#
597# Non-8250 serial port support
598#
599CONFIG_SERIAL_SH_SCI=y
600CONFIG_SERIAL_SH_SCI_NR_UARTS=6
601CONFIG_SERIAL_SH_SCI_CONSOLE=y
602CONFIG_SERIAL_CORE=y
603CONFIG_SERIAL_CORE_CONSOLE=y
604CONFIG_UNIX98_PTYS=y
605# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
606CONFIG_LEGACY_PTYS=y
607CONFIG_LEGACY_PTY_COUNT=256
608# CONFIG_IPMI_HANDLER is not set
609CONFIG_HW_RANDOM=y
610# CONFIG_HW_RANDOM_TIMERIOMEM is not set
611# CONFIG_R3964 is not set
612# CONFIG_RAW_DRIVER is not set
613# CONFIG_TCG_TPM is not set
614CONFIG_I2C=y
615CONFIG_I2C_BOARDINFO=y
616# CONFIG_I2C_CHARDEV is not set
617CONFIG_I2C_HELPER_AUTO=y
618
619#
620# I2C Hardware Bus support
621#
622
623#
624# I2C system bus drivers (mostly embedded / system-on-chip)
625#
626# CONFIG_I2C_DESIGNWARE is not set
627# CONFIG_I2C_GPIO is not set
628# CONFIG_I2C_OCORES is not set
629CONFIG_I2C_SH_MOBILE=y
630# CONFIG_I2C_SIMTEC is not set
631
632#
633# External I2C/SMBus adapter drivers
634#
635# CONFIG_I2C_PARPORT_LIGHT is not set
636# CONFIG_I2C_TAOS_EVM is not set
637
638#
639# Other I2C/SMBus bus drivers
640#
641# CONFIG_I2C_PCA_PLATFORM is not set
642
643#
644# Miscellaneous I2C Chip support
645#
646# CONFIG_DS1682 is not set
647# CONFIG_SENSORS_PCF8574 is not set
648# CONFIG_PCF8575 is not set
649# CONFIG_SENSORS_PCA9539 is not set
650# CONFIG_SENSORS_TSL2550 is not set
651# CONFIG_I2C_DEBUG_CORE is not set
652# CONFIG_I2C_DEBUG_ALGO is not set
653# CONFIG_I2C_DEBUG_BUS is not set
654# CONFIG_I2C_DEBUG_CHIP is not set
655# CONFIG_SPI is not set
656
657#
658# PPS support
659#
660# CONFIG_PPS is not set
661CONFIG_ARCH_REQUIRE_GPIOLIB=y
662CONFIG_GPIOLIB=y
663CONFIG_GPIO_SYSFS=y
664
665#
666# Memory mapped GPIO expanders:
667#
668
669#
670# I2C GPIO expanders:
671#
672# CONFIG_GPIO_MAX732X is not set
673# CONFIG_GPIO_PCA953X is not set
674# CONFIG_GPIO_PCF857X is not set
675
676#
677# PCI GPIO expanders:
678#
679
680#
681# SPI GPIO expanders:
682#
683# CONFIG_W1 is not set
684# CONFIG_POWER_SUPPLY is not set
685# CONFIG_HWMON is not set
686# CONFIG_THERMAL is not set
687# CONFIG_THERMAL_HWMON is not set
688# CONFIG_WATCHDOG is not set
689CONFIG_SSB_POSSIBLE=y
690
691#
692# Sonics Silicon Backplane
693#
694# CONFIG_SSB is not set
695
696#
697# Multifunction device drivers
698#
699# CONFIG_MFD_CORE is not set
700# CONFIG_MFD_SM501 is not set
701# CONFIG_HTC_PASIC3 is not set
702# CONFIG_TPS65010 is not set
703# CONFIG_TWL4030_CORE is not set
704# CONFIG_MFD_TMIO is not set
705# CONFIG_PMIC_DA903X is not set
706# CONFIG_MFD_WM8400 is not set
707# CONFIG_MFD_WM8350_I2C is not set
708# CONFIG_MFD_PCF50633 is not set
709# CONFIG_AB3100_CORE is not set
710# CONFIG_REGULATOR is not set
711# CONFIG_MEDIA_SUPPORT is not set
712
713#
714# Graphics support
715#
716# CONFIG_VGASTATE is not set
717# CONFIG_VIDEO_OUTPUT_CONTROL is not set
718# CONFIG_FB is not set
719# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
720
721#
722# Display device support
723#
724# CONFIG_DISPLAY_SUPPORT is not set
725
726#
727# Console display driver support
728#
729CONFIG_DUMMY_CONSOLE=y
730# CONFIG_SOUND is not set
731# CONFIG_HID_SUPPORT is not set
732# CONFIG_USB_SUPPORT is not set
733# CONFIG_MMC is not set
734# CONFIG_MEMSTICK is not set
735# CONFIG_NEW_LEDS is not set
736# CONFIG_ACCESSIBILITY is not set
737CONFIG_RTC_LIB=y
738# CONFIG_RTC_CLASS is not set
739# CONFIG_DMADEVICES is not set
740# CONFIG_AUXDISPLAY is not set
741CONFIG_UIO=y
742# CONFIG_UIO_PDRV is not set
743CONFIG_UIO_PDRV_GENIRQ=y
744# CONFIG_UIO_SMX is not set
745# CONFIG_UIO_SERCOS3 is not set
746
747#
748# TI VLYNQ
749#
750# CONFIG_STAGING is not set
751
752#
753# File systems
754#
755# CONFIG_EXT2_FS is not set
756# CONFIG_EXT3_FS is not set
757# CONFIG_EXT4_FS is not set
758# CONFIG_REISERFS_FS is not set
759# CONFIG_JFS_FS is not set
760# CONFIG_FS_POSIX_ACL is not set
761# CONFIG_XFS_FS is not set
762# CONFIG_GFS2_FS is not set
763# CONFIG_OCFS2_FS is not set
764# CONFIG_BTRFS_FS is not set
765CONFIG_FILE_LOCKING=y
766# CONFIG_FSNOTIFY is not set
767# CONFIG_INOTIFY is not set
768# CONFIG_QUOTA is not set
769# CONFIG_AUTOFS_FS is not set
770# CONFIG_AUTOFS4_FS is not set
771# CONFIG_FUSE_FS is not set
772
773#
774# Caches
775#
776# CONFIG_FSCACHE is not set
777
778#
779# CD-ROM/DVD Filesystems
780#
781# CONFIG_ISO9660_FS is not set
782# CONFIG_UDF_FS is not set
783
784#
785# DOS/FAT/NT Filesystems
786#
787# CONFIG_MSDOS_FS is not set
788# CONFIG_VFAT_FS is not set
789# CONFIG_NTFS_FS is not set
790
791#
792# Pseudo filesystems
793#
794CONFIG_PROC_FS=y
795CONFIG_PROC_KCORE=y
796CONFIG_PROC_SYSCTL=y
797CONFIG_PROC_PAGE_MONITOR=y
798CONFIG_SYSFS=y
799CONFIG_TMPFS=y
800# CONFIG_TMPFS_POSIX_ACL is not set
801# CONFIG_HUGETLBFS is not set
802# CONFIG_HUGETLB_PAGE is not set
803# CONFIG_CONFIGFS_FS is not set
804# CONFIG_MISC_FILESYSTEMS is not set
805# CONFIG_NETWORK_FILESYSTEMS is not set
806
807#
808# Partition Types
809#
810# CONFIG_PARTITION_ADVANCED is not set
811CONFIG_MSDOS_PARTITION=y
812# CONFIG_NLS is not set
813# CONFIG_DLM is not set
814
815#
816# Kernel hacking
817#
818CONFIG_TRACE_IRQFLAGS_SUPPORT=y
819# CONFIG_PRINTK_TIME is not set
820CONFIG_ENABLE_WARN_DEPRECATED=y
821# CONFIG_ENABLE_MUST_CHECK is not set
822CONFIG_FRAME_WARN=1024
823# CONFIG_MAGIC_SYSRQ is not set
824# CONFIG_UNUSED_SYMBOLS is not set
825CONFIG_DEBUG_FS=y
826# CONFIG_HEADERS_CHECK is not set
827# CONFIG_DEBUG_KERNEL is not set
828# CONFIG_DEBUG_BUGVERBOSE is not set
829# CONFIG_DEBUG_MEMORY_INIT is not set
830# CONFIG_RCU_CPU_STALL_DETECTOR is not set
831# CONFIG_LATENCYTOP is not set
832CONFIG_SYSCTL_SYSCALL_CHECK=y
833CONFIG_HAVE_FUNCTION_TRACER=y
834CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
835CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
836CONFIG_HAVE_DYNAMIC_FTRACE=y
837CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
838CONFIG_HAVE_FTRACE_SYSCALLS=y
839CONFIG_TRACING_SUPPORT=y
840# CONFIG_FTRACE is not set
841# CONFIG_DYNAMIC_DEBUG is not set
842# CONFIG_DMA_API_DEBUG is not set
843# CONFIG_SAMPLES is not set
844CONFIG_HAVE_ARCH_KGDB=y
845# CONFIG_SH_STANDARD_BIOS is not set
846# CONFIG_EARLY_SCIF_CONSOLE is not set
847
848#
849# Security options
850#
851# CONFIG_KEYS is not set
852# CONFIG_SECURITY is not set
853# CONFIG_SECURITYFS is not set
854# CONFIG_SECURITY_FILE_CAPABILITIES is not set
855# CONFIG_CRYPTO is not set
856# CONFIG_BINARY_PRINTF is not set
857
858#
859# Library routines
860#
861CONFIG_BITREVERSE=y
862CONFIG_GENERIC_FIND_LAST_BIT=y
863# CONFIG_CRC_CCITT is not set
864# CONFIG_CRC16 is not set
865CONFIG_CRC_T10DIF=y
866CONFIG_CRC_ITU_T=y
867CONFIG_CRC32=y
868CONFIG_CRC7=y
869# CONFIG_LIBCRC32C is not set
870CONFIG_ZLIB_INFLATE=y
871CONFIG_DECOMPRESS_GZIP=y
872CONFIG_HAS_IOMEM=y
873CONFIG_HAS_IOPORT=y
874CONFIG_HAS_DMA=y
875CONFIG_HAVE_LMB=y
876CONFIG_NLATTR=y
877CONFIG_GENERIC_ATOMIC64=y
diff --git a/arch/sh/include/asm/device.h b/arch/sh/include/asm/device.h
index 8688a88303ee..783ecdc64e25 100644
--- a/arch/sh/include/asm/device.h
+++ b/arch/sh/include/asm/device.h
@@ -3,7 +3,9 @@
3 * 3 *
4 * This file is released under the GPLv2 4 * This file is released under the GPLv2
5 */ 5 */
6#include <asm-generic/device.h> 6
7struct dev_archdata {
8};
7 9
8struct platform_device; 10struct platform_device;
9/* allocate contiguous memory chunk and fill in struct resource */ 11/* allocate contiguous memory chunk and fill in struct resource */
@@ -12,3 +14,6 @@ int platform_resource_setup_memory(struct platform_device *pdev,
12 14
13void plat_early_device_setup(void); 15void plat_early_device_setup(void);
14 16
17struct pdev_archdata {
18 int hwblk_id;
19};
diff --git a/arch/sh/include/asm/dma-sh.h b/arch/sh/include/asm/dma-sh.h
index 0c8f8e14622a..68a5f4cb0343 100644
--- a/arch/sh/include/asm/dma-sh.h
+++ b/arch/sh/include/asm/dma-sh.h
@@ -16,6 +16,7 @@
16 16
17/* DMAOR contorl: The DMAOR access size is different by CPU.*/ 17/* DMAOR contorl: The DMAOR access size is different by CPU.*/
18#if defined(CONFIG_CPU_SUBTYPE_SH7723) || \ 18#if defined(CONFIG_CPU_SUBTYPE_SH7723) || \
19 defined(CONFIG_CPU_SUBTYPE_SH7724) || \
19 defined(CONFIG_CPU_SUBTYPE_SH7780) || \ 20 defined(CONFIG_CPU_SUBTYPE_SH7780) || \
20 defined(CONFIG_CPU_SUBTYPE_SH7785) 21 defined(CONFIG_CPU_SUBTYPE_SH7785)
21#define dmaor_read_reg(n) \ 22#define dmaor_read_reg(n) \
diff --git a/arch/sh/include/asm/dwarf.h b/arch/sh/include/asm/dwarf.h
new file mode 100644
index 000000000000..60b180728d8d
--- /dev/null
+++ b/arch/sh/include/asm/dwarf.h
@@ -0,0 +1,402 @@
1/*
2 * Copyright (C) 2009 Matt Fleming <matt@console-pimps.org>
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 */
9#ifndef __ASM_SH_DWARF_H
10#define __ASM_SH_DWARF_H
11
12#ifdef CONFIG_DWARF_UNWINDER
13
14/*
15 * DWARF expression operations
16 */
17#define DW_OP_addr 0x03
18#define DW_OP_deref 0x06
19#define DW_OP_const1u 0x08
20#define DW_OP_const1s 0x09
21#define DW_OP_const2u 0x0a
22#define DW_OP_const2s 0x0b
23#define DW_OP_const4u 0x0c
24#define DW_OP_const4s 0x0d
25#define DW_OP_const8u 0x0e
26#define DW_OP_const8s 0x0f
27#define DW_OP_constu 0x10
28#define DW_OP_consts 0x11
29#define DW_OP_dup 0x12
30#define DW_OP_drop 0x13
31#define DW_OP_over 0x14
32#define DW_OP_pick 0x15
33#define DW_OP_swap 0x16
34#define DW_OP_rot 0x17
35#define DW_OP_xderef 0x18
36#define DW_OP_abs 0x19
37#define DW_OP_and 0x1a
38#define DW_OP_div 0x1b
39#define DW_OP_minus 0x1c
40#define DW_OP_mod 0x1d
41#define DW_OP_mul 0x1e
42#define DW_OP_neg 0x1f
43#define DW_OP_not 0x20
44#define DW_OP_or 0x21
45#define DW_OP_plus 0x22
46#define DW_OP_plus_uconst 0x23
47#define DW_OP_shl 0x24
48#define DW_OP_shr 0x25
49#define DW_OP_shra 0x26
50#define DW_OP_xor 0x27
51#define DW_OP_skip 0x2f
52#define DW_OP_bra 0x28
53#define DW_OP_eq 0x29
54#define DW_OP_ge 0x2a
55#define DW_OP_gt 0x2b
56#define DW_OP_le 0x2c
57#define DW_OP_lt 0x2d
58#define DW_OP_ne 0x2e
59#define DW_OP_lit0 0x30
60#define DW_OP_lit1 0x31
61#define DW_OP_lit2 0x32
62#define DW_OP_lit3 0x33
63#define DW_OP_lit4 0x34
64#define DW_OP_lit5 0x35
65#define DW_OP_lit6 0x36
66#define DW_OP_lit7 0x37
67#define DW_OP_lit8 0x38
68#define DW_OP_lit9 0x39
69#define DW_OP_lit10 0x3a
70#define DW_OP_lit11 0x3b
71#define DW_OP_lit12 0x3c
72#define DW_OP_lit13 0x3d
73#define DW_OP_lit14 0x3e
74#define DW_OP_lit15 0x3f
75#define DW_OP_lit16 0x40
76#define DW_OP_lit17 0x41
77#define DW_OP_lit18 0x42
78#define DW_OP_lit19 0x43
79#define DW_OP_lit20 0x44
80#define DW_OP_lit21 0x45
81#define DW_OP_lit22 0x46
82#define DW_OP_lit23 0x47
83#define DW_OP_lit24 0x48
84#define DW_OP_lit25 0x49
85#define DW_OP_lit26 0x4a
86#define DW_OP_lit27 0x4b
87#define DW_OP_lit28 0x4c
88#define DW_OP_lit29 0x4d
89#define DW_OP_lit30 0x4e
90#define DW_OP_lit31 0x4f
91#define DW_OP_reg0 0x50
92#define DW_OP_reg1 0x51
93#define DW_OP_reg2 0x52
94#define DW_OP_reg3 0x53
95#define DW_OP_reg4 0x54
96#define DW_OP_reg5 0x55
97#define DW_OP_reg6 0x56
98#define DW_OP_reg7 0x57
99#define DW_OP_reg8 0x58
100#define DW_OP_reg9 0x59
101#define DW_OP_reg10 0x5a
102#define DW_OP_reg11 0x5b
103#define DW_OP_reg12 0x5c
104#define DW_OP_reg13 0x5d
105#define DW_OP_reg14 0x5e
106#define DW_OP_reg15 0x5f
107#define DW_OP_reg16 0x60
108#define DW_OP_reg17 0x61
109#define DW_OP_reg18 0x62
110#define DW_OP_reg19 0x63
111#define DW_OP_reg20 0x64
112#define DW_OP_reg21 0x65
113#define DW_OP_reg22 0x66
114#define DW_OP_reg23 0x67
115#define DW_OP_reg24 0x68
116#define DW_OP_reg25 0x69
117#define DW_OP_reg26 0x6a
118#define DW_OP_reg27 0x6b
119#define DW_OP_reg28 0x6c
120#define DW_OP_reg29 0x6d
121#define DW_OP_reg30 0x6e
122#define DW_OP_reg31 0x6f
123#define DW_OP_breg0 0x70
124#define DW_OP_breg1 0x71
125#define DW_OP_breg2 0x72
126#define DW_OP_breg3 0x73
127#define DW_OP_breg4 0x74
128#define DW_OP_breg5 0x75
129#define DW_OP_breg6 0x76
130#define DW_OP_breg7 0x77
131#define DW_OP_breg8 0x78
132#define DW_OP_breg9 0x79
133#define DW_OP_breg10 0x7a
134#define DW_OP_breg11 0x7b
135#define DW_OP_breg12 0x7c
136#define DW_OP_breg13 0x7d
137#define DW_OP_breg14 0x7e
138#define DW_OP_breg15 0x7f
139#define DW_OP_breg16 0x80
140#define DW_OP_breg17 0x81
141#define DW_OP_breg18 0x82
142#define DW_OP_breg19 0x83
143#define DW_OP_breg20 0x84
144#define DW_OP_breg21 0x85
145#define DW_OP_breg22 0x86
146#define DW_OP_breg23 0x87
147#define DW_OP_breg24 0x88
148#define DW_OP_breg25 0x89
149#define DW_OP_breg26 0x8a
150#define DW_OP_breg27 0x8b
151#define DW_OP_breg28 0x8c
152#define DW_OP_breg29 0x8d
153#define DW_OP_breg30 0x8e
154#define DW_OP_breg31 0x8f
155#define DW_OP_regx 0x90
156#define DW_OP_fbreg 0x91
157#define DW_OP_bregx 0x92
158#define DW_OP_piece 0x93
159#define DW_OP_deref_size 0x94
160#define DW_OP_xderef_size 0x95
161#define DW_OP_nop 0x96
162#define DW_OP_push_object_address 0x97
163#define DW_OP_call2 0x98
164#define DW_OP_call4 0x99
165#define DW_OP_call_ref 0x9a
166#define DW_OP_form_tls_address 0x9b
167#define DW_OP_call_frame_cfa 0x9c
168#define DW_OP_bit_piece 0x9d
169#define DW_OP_lo_user 0xe0
170#define DW_OP_hi_user 0xff
171
172/*
173 * Addresses used in FDE entries in the .eh_frame section may be encoded
174 * using one of the following encodings.
175 */
176#define DW_EH_PE_absptr 0x00
177#define DW_EH_PE_omit 0xff
178#define DW_EH_PE_uleb128 0x01
179#define DW_EH_PE_udata2 0x02
180#define DW_EH_PE_udata4 0x03
181#define DW_EH_PE_udata8 0x04
182#define DW_EH_PE_sleb128 0x09
183#define DW_EH_PE_sdata2 0x0a
184#define DW_EH_PE_sdata4 0x0b
185#define DW_EH_PE_sdata8 0x0c
186#define DW_EH_PE_signed 0x09
187
188#define DW_EH_PE_pcrel 0x10
189
190/*
191 * The architecture-specific register number that contains the return
192 * address in the .debug_frame table.
193 */
194#define DWARF_ARCH_RA_REG 17
195
196#ifndef __ASSEMBLY__
197/*
198 * Read either the frame pointer (r14) or the stack pointer (r15).
199 * NOTE: this MUST be inlined.
200 */
201static __always_inline unsigned long dwarf_read_arch_reg(unsigned int reg)
202{
203 unsigned long value;
204
205 switch (reg) {
206 case 14:
207 __asm__ __volatile__("mov r14, %0\n" : "=r" (value));
208 break;
209 case 15:
210 __asm__ __volatile__("mov r15, %0\n" : "=r" (value));
211 break;
212 default:
213 BUG();
214 }
215
216 return value;
217}
218
219/**
220 * dwarf_cie - Common Information Entry
221 */
222struct dwarf_cie {
223 unsigned long length;
224 unsigned long cie_id;
225 unsigned char version;
226 const char *augmentation;
227 unsigned int code_alignment_factor;
228 int data_alignment_factor;
229
230 /* Which column in the rule table represents return addr of func. */
231 unsigned int return_address_reg;
232
233 unsigned char *initial_instructions;
234 unsigned char *instructions_end;
235
236 unsigned char encoding;
237
238 unsigned long cie_pointer;
239
240 struct list_head link;
241
242 unsigned long flags;
243#define DWARF_CIE_Z_AUGMENTATION (1 << 0)
244};
245
246/**
247 * dwarf_fde - Frame Description Entry
248 */
249struct dwarf_fde {
250 unsigned long length;
251 unsigned long cie_pointer;
252 struct dwarf_cie *cie;
253 unsigned long initial_location;
254 unsigned long address_range;
255 unsigned char *instructions;
256 unsigned char *end;
257 struct list_head link;
258};
259
260/**
261 * dwarf_frame - DWARF information for a frame in the call stack
262 */
263struct dwarf_frame {
264 struct dwarf_frame *prev, *next;
265
266 unsigned long pc;
267
268 struct dwarf_reg *regs;
269 unsigned int num_regs; /* how many regs are allocated? */
270
271 unsigned int depth; /* what level are we in the callstack? */
272
273 unsigned long cfa;
274
275 /* Valid when DW_FRAME_CFA_REG_OFFSET is set in flags */
276 unsigned int cfa_register;
277 unsigned int cfa_offset;
278
279 /* Valid when DW_FRAME_CFA_REG_EXP is set in flags */
280 unsigned char *cfa_expr;
281 unsigned int cfa_expr_len;
282
283 unsigned long flags;
284#define DWARF_FRAME_CFA_REG_OFFSET (1 << 0)
285#define DWARF_FRAME_CFA_REG_EXP (1 << 1)
286
287 unsigned long return_addr;
288};
289
290/**
291 * dwarf_reg - DWARF register
292 * @flags: Describes how to calculate the value of this register
293 */
294struct dwarf_reg {
295 unsigned long addr;
296 unsigned long flags;
297#define DWARF_REG_OFFSET (1 << 0)
298};
299
300/**
301 * dwarf_stack - a DWARF stack contains a collection of DWARF frames
302 * @depth: the number of frames in the stack
303 * @level: an array of DWARF frames, indexed by stack level
304 *
305 */
306struct dwarf_stack {
307 unsigned int depth;
308 struct dwarf_frame **level;
309};
310
311/*
312 * Call Frame instruction opcodes.
313 */
314#define DW_CFA_advance_loc 0x40
315#define DW_CFA_offset 0x80
316#define DW_CFA_restore 0xc0
317#define DW_CFA_nop 0x00
318#define DW_CFA_set_loc 0x01
319#define DW_CFA_advance_loc1 0x02
320#define DW_CFA_advance_loc2 0x03
321#define DW_CFA_advance_loc4 0x04
322#define DW_CFA_offset_extended 0x05
323#define DW_CFA_restore_extended 0x06
324#define DW_CFA_undefined 0x07
325#define DW_CFA_same_value 0x08
326#define DW_CFA_register 0x09
327#define DW_CFA_remember_state 0x0a
328#define DW_CFA_restore_state 0x0b
329#define DW_CFA_def_cfa 0x0c
330#define DW_CFA_def_cfa_register 0x0d
331#define DW_CFA_def_cfa_offset 0x0e
332#define DW_CFA_def_cfa_expression 0x0f
333#define DW_CFA_expression 0x10
334#define DW_CFA_offset_extended_sf 0x11
335#define DW_CFA_def_cfa_sf 0x12
336#define DW_CFA_def_cfa_offset_sf 0x13
337#define DW_CFA_val_offset 0x14
338#define DW_CFA_val_offset_sf 0x15
339#define DW_CFA_val_expression 0x16
340#define DW_CFA_lo_user 0x1c
341#define DW_CFA_hi_user 0x3f
342
343/*
344 * Some call frame instructions encode their operands in the opcode. We
345 * need some helper functions to extract both the opcode and operands
346 * from an instruction.
347 */
348static inline unsigned int DW_CFA_opcode(unsigned long insn)
349{
350 return (insn & 0xc0);
351}
352
353static inline unsigned int DW_CFA_operand(unsigned long insn)
354{
355 return (insn & 0x3f);
356}
357
358#define DW_EH_FRAME_CIE 0 /* .eh_frame CIE IDs are 0 */
359#define DW_CIE_ID 0xffffffff
360#define DW64_CIE_ID 0xffffffffffffffffULL
361
362/*
363 * DWARF FDE/CIE length field values.
364 */
365#define DW_EXT_LO 0xfffffff0
366#define DW_EXT_HI 0xffffffff
367#define DW_EXT_DWARF64 DW_EXT_HI
368
369extern void dwarf_unwinder_init(void);
370
371extern struct dwarf_frame *dwarf_unwind_stack(unsigned long,
372 struct dwarf_frame *);
373#endif /* __ASSEMBLY__ */
374
375#define CFI_STARTPROC .cfi_startproc
376#define CFI_ENDPROC .cfi_endproc
377#define CFI_DEF_CFA .cfi_def_cfa
378#define CFI_REGISTER .cfi_register
379#define CFI_REL_OFFSET .cfi_rel_offset
380
381#else
382
383/*
384 * Use the asm comment character to ignore the rest of the line.
385 */
386#define CFI_IGNORE !
387
388#define CFI_STARTPROC CFI_IGNORE
389#define CFI_ENDPROC CFI_IGNORE
390#define CFI_DEF_CFA CFI_IGNORE
391#define CFI_REGISTER CFI_IGNORE
392#define CFI_REL_OFFSET CFI_IGNORE
393
394#ifndef __ASSEMBLY__
395static inline void dwarf_unwinder_init(void)
396{
397}
398#endif
399
400#endif /* CONFIG_DWARF_UNWINDER */
401
402#endif /* __ASM_SH_DWARF_H */
diff --git a/arch/sh/include/asm/entry-macros.S b/arch/sh/include/asm/entry-macros.S
index 3a4752a65722..64fd0de24daf 100644
--- a/arch/sh/include/asm/entry-macros.S
+++ b/arch/sh/include/asm/entry-macros.S
@@ -31,8 +31,92 @@
31#endif 31#endif
32 .endm 32 .endm
33 33
34#ifdef CONFIG_TRACE_IRQFLAGS
35
36 .macro TRACE_IRQS_ON
37 mov.l r0, @-r15
38 mov.l r1, @-r15
39 mov.l r2, @-r15
40 mov.l r3, @-r15
41 mov.l r4, @-r15
42 mov.l r5, @-r15
43 mov.l r6, @-r15
44 mov.l r7, @-r15
45
46 mov.l 7834f, r0
47 jsr @r0
48 nop
49
50 mov.l @r15+, r7
51 mov.l @r15+, r6
52 mov.l @r15+, r5
53 mov.l @r15+, r4
54 mov.l @r15+, r3
55 mov.l @r15+, r2
56 mov.l @r15+, r1
57 mov.l @r15+, r0
58 mov.l 7834f, r0
59
60 bra 7835f
61 nop
62 .balign 4
637834: .long trace_hardirqs_on
647835:
65 .endm
66 .macro TRACE_IRQS_OFF
67
68 mov.l r0, @-r15
69 mov.l r1, @-r15
70 mov.l r2, @-r15
71 mov.l r3, @-r15
72 mov.l r4, @-r15
73 mov.l r5, @-r15
74 mov.l r6, @-r15
75 mov.l r7, @-r15
76
77 mov.l 7834f, r0
78 jsr @r0
79 nop
80
81 mov.l @r15+, r7
82 mov.l @r15+, r6
83 mov.l @r15+, r5
84 mov.l @r15+, r4
85 mov.l @r15+, r3
86 mov.l @r15+, r2
87 mov.l @r15+, r1
88 mov.l @r15+, r0
89 mov.l 7834f, r0
90
91 bra 7835f
92 nop
93 .balign 4
947834: .long trace_hardirqs_off
957835:
96 .endm
97
98#else
99 .macro TRACE_IRQS_ON
100 .endm
101
102 .macro TRACE_IRQS_OFF
103 .endm
104#endif
105
34#if defined(CONFIG_CPU_SH2A) || defined(CONFIG_CPU_SH4) 106#if defined(CONFIG_CPU_SH2A) || defined(CONFIG_CPU_SH4)
35# define PREF(x) pref @x 107# define PREF(x) pref @x
36#else 108#else
37# define PREF(x) nop 109# define PREF(x) nop
38#endif 110#endif
111
112 /*
113 * Macro for use within assembly. Because the DWARF unwinder
114 * needs to use the frame register to unwind the stack, we
115 * need to setup r14 with the value of the stack pointer as
116 * the return address is usually on the stack somewhere.
117 */
118 .macro setup_frame_reg
119#ifdef CONFIG_DWARF_UNWINDER
120 mov r15, r14
121#endif
122 .endm
diff --git a/arch/sh/include/asm/ftrace.h b/arch/sh/include/asm/ftrace.h
index 8fea7d8c8258..7e0bcc4d4a96 100644
--- a/arch/sh/include/asm/ftrace.h
+++ b/arch/sh/include/asm/ftrace.h
@@ -11,10 +11,13 @@ extern void mcount(void);
11#define MCOUNT_ADDR ((long)(mcount)) 11#define MCOUNT_ADDR ((long)(mcount))
12 12
13#ifdef CONFIG_DYNAMIC_FTRACE 13#ifdef CONFIG_DYNAMIC_FTRACE
14#define CALLER_ADDR ((long)(ftrace_caller)) 14#define CALL_ADDR ((long)(ftrace_call))
15#define STUB_ADDR ((long)(ftrace_stub)) 15#define STUB_ADDR ((long)(ftrace_stub))
16#define GRAPH_ADDR ((long)(ftrace_graph_call))
17#define CALLER_ADDR ((long)(ftrace_caller))
16 18
17#define MCOUNT_INSN_OFFSET ((STUB_ADDR - CALLER_ADDR) >> 1) 19#define MCOUNT_INSN_OFFSET ((STUB_ADDR - CALL_ADDR) - 4)
20#define GRAPH_INSN_OFFSET ((CALLER_ADDR - GRAPH_ADDR) - 4)
18 21
19struct dyn_arch_ftrace { 22struct dyn_arch_ftrace {
20 /* No extra data needed on sh */ 23 /* No extra data needed on sh */
diff --git a/arch/sh/include/asm/hardirq.h b/arch/sh/include/asm/hardirq.h
index 715ee237fc77..a5be4afa790b 100644
--- a/arch/sh/include/asm/hardirq.h
+++ b/arch/sh/include/asm/hardirq.h
@@ -1,16 +1,9 @@
1#ifndef __ASM_SH_HARDIRQ_H 1#ifndef __ASM_SH_HARDIRQ_H
2#define __ASM_SH_HARDIRQ_H 2#define __ASM_SH_HARDIRQ_H
3 3
4#include <linux/threads.h>
5#include <linux/irq.h>
6
7/* entry.S is sensitive to the offsets of these fields */
8typedef struct {
9 unsigned int __softirq_pending;
10} ____cacheline_aligned irq_cpustat_t;
11
12#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
13
14extern void ack_bad_irq(unsigned int irq); 4extern void ack_bad_irq(unsigned int irq);
5#define ack_bad_irq ack_bad_irq
6
7#include <asm-generic/hardirq.h>
15 8
16#endif /* __ASM_SH_HARDIRQ_H */ 9#endif /* __ASM_SH_HARDIRQ_H */
diff --git a/arch/sh/include/asm/hwblk.h b/arch/sh/include/asm/hwblk.h
new file mode 100644
index 000000000000..c01d72cb6757
--- /dev/null
+++ b/arch/sh/include/asm/hwblk.h
@@ -0,0 +1,70 @@
1#ifndef __ASM_SH_HWBLK_H
2#define __ASM_SH_HWBLK_H
3
4#include <asm/clock.h>
5#include <asm/io.h>
6
7#define HWBLK_CNT_USAGE 0
8#define HWBLK_CNT_NR 1
9
10#define HWBLK_AREA_FLAG_PARENT (1 << 0) /* valid parent */
11
12#define HWBLK_AREA(_flags, _parent) \
13{ \
14 .flags = _flags, \
15 .parent = _parent, \
16}
17
18struct hwblk_area {
19 int cnt[HWBLK_CNT_NR];
20 unsigned char parent;
21 unsigned char flags;
22};
23
24#define HWBLK(_mstp, _bit, _area) \
25{ \
26 .mstp = (void __iomem *)_mstp, \
27 .bit = _bit, \
28 .area = _area, \
29}
30
31struct hwblk {
32 void __iomem *mstp;
33 unsigned char bit;
34 unsigned char area;
35 int cnt[HWBLK_CNT_NR];
36};
37
38struct hwblk_info {
39 struct hwblk_area *areas;
40 int nr_areas;
41 struct hwblk *hwblks;
42 int nr_hwblks;
43};
44
45/* Should be defined by processor-specific code */
46int arch_hwblk_init(void);
47int arch_hwblk_sleep_mode(void);
48
49int hwblk_register(struct hwblk_info *info);
50int hwblk_init(void);
51
52void hwblk_enable(struct hwblk_info *info, int hwblk);
53void hwblk_disable(struct hwblk_info *info, int hwblk);
54
55void hwblk_cnt_inc(struct hwblk_info *info, int hwblk, int cnt);
56void hwblk_cnt_dec(struct hwblk_info *info, int hwblk, int cnt);
57
58/* allow clocks to enable and disable hardware blocks */
59#define SH_HWBLK_CLK(_name, _id, _parent, _hwblk, _flags) \
60{ \
61 .name = _name, \
62 .id = _id, \
63 .parent = _parent, \
64 .arch_flags = _hwblk, \
65 .flags = _flags, \
66}
67
68int sh_hwblk_clk_register(struct clk *clks, int nr);
69
70#endif /* __ASM_SH_HWBLK_H */
diff --git a/arch/sh/include/asm/lmb.h b/arch/sh/include/asm/lmb.h
new file mode 100644
index 000000000000..9b437f657ffa
--- /dev/null
+++ b/arch/sh/include/asm/lmb.h
@@ -0,0 +1,6 @@
1#ifndef __ASM_SH_LMB_H
2#define __ASM_SH_LMB_H
3
4#define LMB_REAL_LIMIT 0
5
6#endif /* __ASM_SH_LMB_H */
diff --git a/arch/sh/include/asm/pgtable_32.h b/arch/sh/include/asm/pgtable_32.h
index 72ea209195bd..0db19db913c7 100644
--- a/arch/sh/include/asm/pgtable_32.h
+++ b/arch/sh/include/asm/pgtable_32.h
@@ -20,7 +20,7 @@
20 * - Bit 9 is reserved by everyone and used by _PAGE_PROTNONE. 20 * - Bit 9 is reserved by everyone and used by _PAGE_PROTNONE.
21 * 21 *
22 * - Bits 10 and 11 are low bits of the PPN that are reserved on >= 4K pages. 22 * - Bits 10 and 11 are low bits of the PPN that are reserved on >= 4K pages.
23 * Bit 10 is used for _PAGE_ACCESSED, bit 11 remains unused. 23 * Bit 10 is used for _PAGE_ACCESSED, and bit 11 is used for _PAGE_SPECIAL.
24 * 24 *
25 * - On 29 bit platforms, bits 31 to 29 are used for the space attributes 25 * - On 29 bit platforms, bits 31 to 29 are used for the space attributes
26 * and timing control which (together with bit 0) are moved into the 26 * and timing control which (together with bit 0) are moved into the
@@ -52,6 +52,7 @@
52#define _PAGE_PROTNONE 0x200 /* software: if not present */ 52#define _PAGE_PROTNONE 0x200 /* software: if not present */
53#define _PAGE_ACCESSED 0x400 /* software: page referenced */ 53#define _PAGE_ACCESSED 0x400 /* software: page referenced */
54#define _PAGE_FILE _PAGE_WT /* software: pagecache or swap? */ 54#define _PAGE_FILE _PAGE_WT /* software: pagecache or swap? */
55#define _PAGE_SPECIAL 0x800 /* software: special page */
55 56
56#define _PAGE_SZ_MASK (_PAGE_SZ0 | _PAGE_SZ1) 57#define _PAGE_SZ_MASK (_PAGE_SZ0 | _PAGE_SZ1)
57#define _PAGE_PR_MASK (_PAGE_RW | _PAGE_USER) 58#define _PAGE_PR_MASK (_PAGE_RW | _PAGE_USER)
@@ -148,8 +149,12 @@
148# define _PAGE_SZHUGE (_PAGE_FLAGS_HARD) 149# define _PAGE_SZHUGE (_PAGE_FLAGS_HARD)
149#endif 150#endif
150 151
152/*
153 * Mask of bits that are to be preserved accross pgprot changes.
154 */
151#define _PAGE_CHG_MASK \ 155#define _PAGE_CHG_MASK \
152 (PTE_MASK | _PAGE_ACCESSED | _PAGE_CACHABLE | _PAGE_DIRTY) 156 (PTE_MASK | _PAGE_ACCESSED | _PAGE_CACHABLE | \
157 _PAGE_DIRTY | _PAGE_SPECIAL)
153 158
154#ifndef __ASSEMBLY__ 159#ifndef __ASSEMBLY__
155 160
@@ -328,7 +333,7 @@ static inline void set_pte(pte_t *ptep, pte_t pte)
328#define pte_dirty(pte) ((pte).pte_low & _PAGE_DIRTY) 333#define pte_dirty(pte) ((pte).pte_low & _PAGE_DIRTY)
329#define pte_young(pte) ((pte).pte_low & _PAGE_ACCESSED) 334#define pte_young(pte) ((pte).pte_low & _PAGE_ACCESSED)
330#define pte_file(pte) ((pte).pte_low & _PAGE_FILE) 335#define pte_file(pte) ((pte).pte_low & _PAGE_FILE)
331#define pte_special(pte) (0) 336#define pte_special(pte) ((pte).pte_low & _PAGE_SPECIAL)
332 337
333#ifdef CONFIG_X2TLB 338#ifdef CONFIG_X2TLB
334#define pte_write(pte) ((pte).pte_high & _PAGE_EXT_USER_WRITE) 339#define pte_write(pte) ((pte).pte_high & _PAGE_EXT_USER_WRITE)
@@ -358,8 +363,9 @@ PTE_BIT_FUNC(low, mkclean, &= ~_PAGE_DIRTY);
358PTE_BIT_FUNC(low, mkdirty, |= _PAGE_DIRTY); 363PTE_BIT_FUNC(low, mkdirty, |= _PAGE_DIRTY);
359PTE_BIT_FUNC(low, mkold, &= ~_PAGE_ACCESSED); 364PTE_BIT_FUNC(low, mkold, &= ~_PAGE_ACCESSED);
360PTE_BIT_FUNC(low, mkyoung, |= _PAGE_ACCESSED); 365PTE_BIT_FUNC(low, mkyoung, |= _PAGE_ACCESSED);
366PTE_BIT_FUNC(low, mkspecial, |= _PAGE_SPECIAL);
361 367
362static inline pte_t pte_mkspecial(pte_t pte) { return pte; } 368#define __HAVE_ARCH_PTE_SPECIAL
363 369
364/* 370/*
365 * Macro and implementation to make a page protection as uncachable. 371 * Macro and implementation to make a page protection as uncachable.
diff --git a/arch/sh/include/asm/sections.h b/arch/sh/include/asm/sections.h
index 01a4076a3719..a78701da775b 100644
--- a/arch/sh/include/asm/sections.h
+++ b/arch/sh/include/asm/sections.h
@@ -7,6 +7,7 @@ extern void __nosave_begin, __nosave_end;
7extern long __machvec_start, __machvec_end; 7extern long __machvec_start, __machvec_end;
8extern char __uncached_start, __uncached_end; 8extern char __uncached_start, __uncached_end;
9extern char _ebss[]; 9extern char _ebss[];
10extern char __start_eh_frame[], __stop_eh_frame[];
10 11
11#endif /* __ASM_SH_SECTIONS_H */ 12#endif /* __ASM_SH_SECTIONS_H */
12 13
diff --git a/arch/sh/include/asm/stacktrace.h b/arch/sh/include/asm/stacktrace.h
new file mode 100644
index 000000000000..797018213718
--- /dev/null
+++ b/arch/sh/include/asm/stacktrace.h
@@ -0,0 +1,25 @@
1/*
2 * Copyright (C) 2009 Matt Fleming
3 *
4 * Based on:
5 * The x86 implementation - arch/x86/include/asm/stacktrace.h
6 */
7#ifndef _ASM_SH_STACKTRACE_H
8#define _ASM_SH_STACKTRACE_H
9
10/* Generic stack tracer with callbacks */
11
12struct stacktrace_ops {
13 void (*warning)(void *data, char *msg);
14 /* msg must contain %s for the symbol */
15 void (*warning_symbol)(void *data, char *msg, unsigned long symbol);
16 void (*address)(void *data, unsigned long address, int reliable);
17 /* On negative return stop dumping */
18 int (*stack)(void *data, char *name);
19};
20
21void dump_trace(struct task_struct *tsk, struct pt_regs *regs,
22 unsigned long *stack,
23 const struct stacktrace_ops *ops, void *data);
24
25#endif /* _ASM_SH_STACKTRACE_H */
diff --git a/arch/sh/include/asm/suspend.h b/arch/sh/include/asm/suspend.h
index b1b995370e79..5c8ea28ff7a4 100644
--- a/arch/sh/include/asm/suspend.h
+++ b/arch/sh/include/asm/suspend.h
@@ -10,6 +10,15 @@ struct swsusp_arch_regs {
10 struct pt_regs user_regs; 10 struct pt_regs user_regs;
11 unsigned long bank1_regs[8]; 11 unsigned long bank1_regs[8];
12}; 12};
13
14void sh_mobile_call_standby(unsigned long mode);
15
16#ifdef CONFIG_CPU_IDLE
17void sh_mobile_setup_cpuidle(void);
18#else
19static inline void sh_mobile_setup_cpuidle(void) {}
20#endif
21
13#endif 22#endif
14 23
15/* flags passed to assembly suspend code */ 24/* flags passed to assembly suspend code */
diff --git a/arch/sh/include/asm/syscall_32.h b/arch/sh/include/asm/syscall_32.h
index 6f83f2cc45c1..7d80df4f09cb 100644
--- a/arch/sh/include/asm/syscall_32.h
+++ b/arch/sh/include/asm/syscall_32.h
@@ -65,6 +65,7 @@ static inline void syscall_get_arguments(struct task_struct *task,
65 case 3: args[2] = regs->regs[6]; 65 case 3: args[2] = regs->regs[6];
66 case 2: args[1] = regs->regs[5]; 66 case 2: args[1] = regs->regs[5];
67 case 1: args[0] = regs->regs[4]; 67 case 1: args[0] = regs->regs[4];
68 case 0:
68 break; 69 break;
69 default: 70 default:
70 BUG(); 71 BUG();
diff --git a/arch/sh/include/asm/thread_info.h b/arch/sh/include/asm/thread_info.h
index d570ac2e5cb9..5123bcaa8509 100644
--- a/arch/sh/include/asm/thread_info.h
+++ b/arch/sh/include/asm/thread_info.h
@@ -97,7 +97,7 @@ static inline struct thread_info *current_thread_info(void)
97 97
98extern struct thread_info *alloc_thread_info(struct task_struct *tsk); 98extern struct thread_info *alloc_thread_info(struct task_struct *tsk);
99extern void free_thread_info(struct thread_info *ti); 99extern void free_thread_info(struct thread_info *ti);
100 100
101#endif /* THREAD_SHIFT < PAGE_SHIFT */ 101#endif /* THREAD_SHIFT < PAGE_SHIFT */
102 102
103#endif /* __ASSEMBLY__ */ 103#endif /* __ASSEMBLY__ */
@@ -116,6 +116,7 @@ extern void free_thread_info(struct thread_info *ti);
116#define TIF_SYSCALL_AUDIT 5 /* syscall auditing active */ 116#define TIF_SYSCALL_AUDIT 5 /* syscall auditing active */
117#define TIF_SECCOMP 6 /* secure computing */ 117#define TIF_SECCOMP 6 /* secure computing */
118#define TIF_NOTIFY_RESUME 7 /* callback before returning to user */ 118#define TIF_NOTIFY_RESUME 7 /* callback before returning to user */
119#define TIF_SYSCALL_FTRACE 8 /* for ftrace syscall instrumentation */
119#define TIF_USEDFPU 16 /* FPU was used by this task this quantum (SMP) */ 120#define TIF_USEDFPU 16 /* FPU was used by this task this quantum (SMP) */
120#define TIF_POLLING_NRFLAG 17 /* true if poll_idle() is polling TIF_NEED_RESCHED */ 121#define TIF_POLLING_NRFLAG 17 /* true if poll_idle() is polling TIF_NEED_RESCHED */
121#define TIF_MEMDIE 18 122#define TIF_MEMDIE 18
@@ -129,25 +130,27 @@ extern void free_thread_info(struct thread_info *ti);
129#define _TIF_SYSCALL_AUDIT (1 << TIF_SYSCALL_AUDIT) 130#define _TIF_SYSCALL_AUDIT (1 << TIF_SYSCALL_AUDIT)
130#define _TIF_SECCOMP (1 << TIF_SECCOMP) 131#define _TIF_SECCOMP (1 << TIF_SECCOMP)
131#define _TIF_NOTIFY_RESUME (1 << TIF_NOTIFY_RESUME) 132#define _TIF_NOTIFY_RESUME (1 << TIF_NOTIFY_RESUME)
133#define _TIF_SYSCALL_FTRACE (1 << TIF_SYSCALL_FTRACE)
132#define _TIF_USEDFPU (1 << TIF_USEDFPU) 134#define _TIF_USEDFPU (1 << TIF_USEDFPU)
133#define _TIF_POLLING_NRFLAG (1 << TIF_POLLING_NRFLAG) 135#define _TIF_POLLING_NRFLAG (1 << TIF_POLLING_NRFLAG)
134#define _TIF_FREEZE (1 << TIF_FREEZE) 136#define _TIF_FREEZE (1 << TIF_FREEZE)
135 137
136/* 138/*
137 * _TIF_ALLWORK_MASK and _TIF_WORK_MASK need to fit within a byte, or we 139 * _TIF_ALLWORK_MASK and _TIF_WORK_MASK need to fit within 2 bytes, or we
138 * blow the tst immediate size constraints and need to fix up 140 * blow the tst immediate size constraints and need to fix up
139 * arch/sh/kernel/entry-common.S. 141 * arch/sh/kernel/entry-common.S.
140 */ 142 */
141 143
142/* work to do in syscall trace */ 144/* work to do in syscall trace */
143#define _TIF_WORK_SYSCALL_MASK (_TIF_SYSCALL_TRACE | _TIF_SINGLESTEP | \ 145#define _TIF_WORK_SYSCALL_MASK (_TIF_SYSCALL_TRACE | _TIF_SINGLESTEP | \
144 _TIF_SYSCALL_AUDIT | _TIF_SECCOMP) 146 _TIF_SYSCALL_AUDIT | _TIF_SECCOMP | \
147 _TIF_SYSCALL_FTRACE)
145 148
146/* work to do on any return to u-space */ 149/* work to do on any return to u-space */
147#define _TIF_ALLWORK_MASK (_TIF_SYSCALL_TRACE | _TIF_SIGPENDING | \ 150#define _TIF_ALLWORK_MASK (_TIF_SYSCALL_TRACE | _TIF_SIGPENDING | \
148 _TIF_NEED_RESCHED | _TIF_SYSCALL_AUDIT | \ 151 _TIF_NEED_RESCHED | _TIF_SYSCALL_AUDIT | \
149 _TIF_SINGLESTEP | _TIF_RESTORE_SIGMASK | \ 152 _TIF_SINGLESTEP | _TIF_RESTORE_SIGMASK | \
150 _TIF_NOTIFY_RESUME) 153 _TIF_NOTIFY_RESUME | _TIF_SYSCALL_FTRACE)
151 154
152/* work to do on interrupt/exception return */ 155/* work to do on interrupt/exception return */
153#define _TIF_WORK_MASK (_TIF_ALLWORK_MASK & ~(_TIF_SYSCALL_TRACE | \ 156#define _TIF_WORK_MASK (_TIF_ALLWORK_MASK & ~(_TIF_SYSCALL_TRACE | \
diff --git a/arch/sh/include/asm/unwinder.h b/arch/sh/include/asm/unwinder.h
new file mode 100644
index 000000000000..3dc551453e28
--- /dev/null
+++ b/arch/sh/include/asm/unwinder.h
@@ -0,0 +1,25 @@
1#ifndef _LINUX_UNWINDER_H
2#define _LINUX_UNWINDER_H
3
4#include <asm/stacktrace.h>
5
6struct unwinder {
7 const char *name;
8 struct list_head list;
9 int rating;
10 void (*dump)(struct task_struct *, struct pt_regs *,
11 unsigned long *, const struct stacktrace_ops *, void *);
12};
13
14extern int unwinder_init(void);
15extern int unwinder_register(struct unwinder *);
16
17extern void unwind_stack(struct task_struct *, struct pt_regs *,
18 unsigned long *, const struct stacktrace_ops *,
19 void *);
20
21extern void stack_reader_dump(struct task_struct *, struct pt_regs *,
22 unsigned long *, const struct stacktrace_ops *,
23 void *);
24
25#endif /* _LINUX_UNWINDER_H */
diff --git a/arch/sh/include/asm/vmlinux.lds.h b/arch/sh/include/asm/vmlinux.lds.h
new file mode 100644
index 000000000000..244ec4ad9a79
--- /dev/null
+++ b/arch/sh/include/asm/vmlinux.lds.h
@@ -0,0 +1,17 @@
1#ifndef __ASM_SH_VMLINUX_LDS_H
2#define __ASM_SH_VMLINUX_LDS_H
3
4#include <asm-generic/vmlinux.lds.h>
5
6#ifdef CONFIG_DWARF_UNWINDER
7#define DWARF_EH_FRAME \
8 .eh_frame : AT(ADDR(.eh_frame) - LOAD_OFFSET) { \
9 VMLINUX_SYMBOL(__start_eh_frame) = .; \
10 *(.eh_frame) \
11 VMLINUX_SYMBOL(__stop_eh_frame) = .; \
12 }
13#else
14#define DWARF_EH_FRAME
15#endif
16
17#endif /* __ASM_SH_VMLINUX_LDS_H */
diff --git a/arch/sh/include/cpu-sh4/cpu/dma-sh4a.h b/arch/sh/include/cpu-sh4/cpu/dma-sh4a.h
index 0ed5178fed69..f0886bc880e0 100644
--- a/arch/sh/include/cpu-sh4/cpu/dma-sh4a.h
+++ b/arch/sh/include/cpu-sh4/cpu/dma-sh4a.h
@@ -16,7 +16,8 @@
16#define DMAE0_IRQ 38 16#define DMAE0_IRQ 38
17#define SH_DMAC_BASE0 0xFF608020 17#define SH_DMAC_BASE0 0xFF608020
18#define SH_DMARS_BASE 0xFF609000 18#define SH_DMARS_BASE 0xFF609000
19#elif defined(CONFIG_CPU_SUBTYPE_SH7723) 19#elif defined(CONFIG_CPU_SUBTYPE_SH7723) || \
20 defined(CONFIG_CPU_SUBTYPE_SH7724)
20#define DMTE0_IRQ 48 /* DMAC0A*/ 21#define DMTE0_IRQ 48 /* DMAC0A*/
21#define DMTE4_IRQ 40 /* DMAC0B */ 22#define DMTE4_IRQ 40 /* DMAC0B */
22#define DMTE6_IRQ 42 23#define DMTE6_IRQ 42
diff --git a/arch/sh/include/cpu-sh4/cpu/sh7722.h b/arch/sh/include/cpu-sh4/cpu/sh7722.h
index 738ea43c5038..48560407cbe1 100644
--- a/arch/sh/include/cpu-sh4/cpu/sh7722.h
+++ b/arch/sh/include/cpu-sh4/cpu/sh7722.h
@@ -221,4 +221,18 @@ enum {
221 GPIO_FN_KEYOUT3, GPIO_FN_KEYOUT4_IN6, GPIO_FN_KEYOUT5_IN5, 221 GPIO_FN_KEYOUT3, GPIO_FN_KEYOUT4_IN6, GPIO_FN_KEYOUT5_IN5,
222}; 222};
223 223
224enum {
225 HWBLK_UNKNOWN = 0,
226 HWBLK_TLB, HWBLK_IC, HWBLK_OC, HWBLK_URAM, HWBLK_XYMEM,
227 HWBLK_INTC, HWBLK_DMAC, HWBLK_SHYWAY, HWBLK_HUDI,
228 HWBLK_UBC, HWBLK_TMU, HWBLK_CMT, HWBLK_RWDT, HWBLK_FLCTL,
229 HWBLK_SCIF0, HWBLK_SCIF1, HWBLK_SCIF2, HWBLK_SIO,
230 HWBLK_SIOF0, HWBLK_SIOF1, HWBLK_IIC, HWBLK_RTC,
231 HWBLK_TPU, HWBLK_IRDA, HWBLK_SDHI, HWBLK_SIM, HWBLK_KEYSC,
232 HWBLK_TSIF, HWBLK_USBF, HWBLK_2DG, HWBLK_SIU, HWBLK_VOU,
233 HWBLK_JPU, HWBLK_BEU, HWBLK_CEU, HWBLK_VEU, HWBLK_VPU,
234 HWBLK_LCDC,
235 HWBLK_NR,
236};
237
224#endif /* __ASM_SH7722_H__ */ 238#endif /* __ASM_SH7722_H__ */
diff --git a/arch/sh/include/cpu-sh4/cpu/sh7723.h b/arch/sh/include/cpu-sh4/cpu/sh7723.h
index 14c8ca936781..9b36fae72324 100644
--- a/arch/sh/include/cpu-sh4/cpu/sh7723.h
+++ b/arch/sh/include/cpu-sh4/cpu/sh7723.h
@@ -265,4 +265,21 @@ enum {
265 GPIO_FN_IDEA1, GPIO_FN_IDEA0, 265 GPIO_FN_IDEA1, GPIO_FN_IDEA0,
266}; 266};
267 267
268enum {
269 HWBLK_UNKNOWN = 0,
270 HWBLK_TLB, HWBLK_IC, HWBLK_OC, HWBLK_L2C, HWBLK_ILMEM, HWBLK_FPU,
271 HWBLK_INTC, HWBLK_DMAC0, HWBLK_SHYWAY,
272 HWBLK_HUDI, HWBLK_DBG, HWBLK_UBC, HWBLK_SUBC,
273 HWBLK_TMU0, HWBLK_CMT, HWBLK_RWDT, HWBLK_DMAC1, HWBLK_TMU1,
274 HWBLK_FLCTL,
275 HWBLK_SCIF0, HWBLK_SCIF1, HWBLK_SCIF2,
276 HWBLK_SCIF3, HWBLK_SCIF4, HWBLK_SCIF5,
277 HWBLK_MSIOF0, HWBLK_MSIOF1, HWBLK_MERAM, HWBLK_IIC, HWBLK_RTC,
278 HWBLK_ATAPI, HWBLK_ADC, HWBLK_TPU, HWBLK_IRDA, HWBLK_TSIF, HWBLK_ICB,
279 HWBLK_SDHI0, HWBLK_SDHI1, HWBLK_KEYSC, HWBLK_USB,
280 HWBLK_2DG, HWBLK_SIU, HWBLK_VEU2H1, HWBLK_VOU, HWBLK_BEU, HWBLK_CEU,
281 HWBLK_VEU2H0, HWBLK_VPU, HWBLK_LCDC,
282 HWBLK_NR,
283};
284
268#endif /* __ASM_SH7723_H__ */ 285#endif /* __ASM_SH7723_H__ */
diff --git a/arch/sh/include/cpu-sh4/cpu/sh7724.h b/arch/sh/include/cpu-sh4/cpu/sh7724.h
index 66fd1184359e..0cd1f71a1116 100644
--- a/arch/sh/include/cpu-sh4/cpu/sh7724.h
+++ b/arch/sh/include/cpu-sh4/cpu/sh7724.h
@@ -266,4 +266,21 @@ enum {
266 GPIO_FN_INTC_IRQ1, GPIO_FN_INTC_IRQ0, 266 GPIO_FN_INTC_IRQ1, GPIO_FN_INTC_IRQ0,
267}; 267};
268 268
269enum {
270 HWBLK_UNKNOWN = 0,
271 HWBLK_TLB, HWBLK_IC, HWBLK_OC, HWBLK_RSMEM, HWBLK_ILMEM, HWBLK_L2C,
272 HWBLK_FPU, HWBLK_INTC, HWBLK_DMAC0, HWBLK_SHYWAY,
273 HWBLK_HUDI, HWBLK_DBG, HWBLK_UBC,
274 HWBLK_TMU0, HWBLK_CMT, HWBLK_RWDT, HWBLK_DMAC1, HWBLK_TMU1,
275 HWBLK_SCIF0, HWBLK_SCIF1, HWBLK_SCIF2, HWBLK_SCIF3,
276 HWBLK_SCIF4, HWBLK_SCIF5, HWBLK_MSIOF0, HWBLK_MSIOF1,
277 HWBLK_KEYSC, HWBLK_RTC, HWBLK_IIC0, HWBLK_IIC1,
278 HWBLK_MMC, HWBLK_ETHER, HWBLK_ATAPI, HWBLK_TPU, HWBLK_IRDA,
279 HWBLK_TSIF, HWBLK_USB1, HWBLK_USB0, HWBLK_2DG,
280 HWBLK_SDHI0, HWBLK_SDHI1, HWBLK_VEU1, HWBLK_CEU1, HWBLK_BEU1,
281 HWBLK_2DDMAC, HWBLK_SPU, HWBLK_JPU, HWBLK_VOU,
282 HWBLK_BEU0, HWBLK_CEU0, HWBLK_VEU0, HWBLK_VPU, HWBLK_LCDC,
283 HWBLK_NR,
284};
285
269#endif /* __ASM_SH7724_H__ */ 286#endif /* __ASM_SH7724_H__ */
diff --git a/arch/sh/include/mach-common/mach/migor.h b/arch/sh/include/mach-common/mach/migor.h
deleted file mode 100644
index e451f0229e00..000000000000
--- a/arch/sh/include/mach-common/mach/migor.h
+++ /dev/null
@@ -1,64 +0,0 @@
1#ifndef __ASM_SH_MIGOR_H
2#define __ASM_SH_MIGOR_H
3
4/*
5 * linux/include/asm-sh/migor.h
6 *
7 * Copyright (C) 2008 Renesas Solutions
8 *
9 * Portions Copyright (C) 2007 Nobuhiro Iwamatsu
10 *
11 * This file is subject to the terms and conditions of the GNU General Public
12 * License. See the file "COPYING" in the main directory of this archive
13 * for more details.
14 *
15 */
16#include <asm/addrspace.h>
17
18/* GPIO */
19#define PORT_PACR 0xa4050100
20#define PORT_PDCR 0xa4050106
21#define PORT_PECR 0xa4050108
22#define PORT_PHCR 0xa405010e
23#define PORT_PJCR 0xa4050110
24#define PORT_PKCR 0xa4050112
25#define PORT_PLCR 0xa4050114
26#define PORT_PMCR 0xa4050116
27#define PORT_PRCR 0xa405011c
28#define PORT_PTCR 0xa4050140
29#define PORT_PUCR 0xa4050142
30#define PORT_PVCR 0xa4050144
31#define PORT_PWCR 0xa4050146
32#define PORT_PXCR 0xa4050148
33#define PORT_PYCR 0xa405014a
34#define PORT_PZCR 0xa405014c
35#define PORT_PADR 0xa4050120
36#define PORT_PHDR 0xa405012e
37#define PORT_PTDR 0xa4050160
38#define PORT_PWDR 0xa4050166
39
40#define PORT_HIZCRA 0xa4050158
41#define PORT_HIZCRC 0xa405015c
42
43#define PORT_MSELCRB 0xa4050182
44
45#define PORT_PSELA 0xa405014e
46#define PORT_PSELB 0xa4050150
47#define PORT_PSELC 0xa4050152
48#define PORT_PSELD 0xa4050154
49#define PORT_PSELE 0xa4050156
50
51#define PORT_HIZCRA 0xa4050158
52#define PORT_HIZCRB 0xa405015a
53#define PORT_HIZCRC 0xa405015c
54
55#define BSC_CS4BCR 0xfec10010
56#define BSC_CS6ABCR 0xfec1001c
57#define BSC_CS4WCR 0xfec10030
58
59#include <video/sh_mobile_lcdc.h>
60
61int migor_lcd_qvga_setup(void *board_data, void *sys_ops_handle,
62 struct sh_mobile_lcdc_sys_bus_ops *sys_ops);
63
64#endif /* __ASM_SH_MIGOR_H */
diff --git a/arch/sh/include/mach-common/mach/romimage.h b/arch/sh/include/mach-common/mach/romimage.h
new file mode 100644
index 000000000000..267e24112d82
--- /dev/null
+++ b/arch/sh/include/mach-common/mach/romimage.h
@@ -0,0 +1 @@
/* do nothing here by default */
diff --git a/arch/sh/include/mach-kfr2r09/mach/kfr2r09.h b/arch/sh/include/mach-kfr2r09/mach/kfr2r09.h
new file mode 100644
index 000000000000..174374e19547
--- /dev/null
+++ b/arch/sh/include/mach-kfr2r09/mach/kfr2r09.h
@@ -0,0 +1,21 @@
1#ifndef __ASM_SH_KFR2R09_H
2#define __ASM_SH_KFR2R09_H
3
4#include <video/sh_mobile_lcdc.h>
5
6#ifdef CONFIG_FB_SH_MOBILE_LCDC
7void kfr2r09_lcd_on(void *board_data);
8void kfr2r09_lcd_off(void *board_data);
9int kfr2r09_lcd_setup(void *board_data, void *sys_ops_handle,
10 struct sh_mobile_lcdc_sys_bus_ops *sys_ops);
11#else
12static inline void kfr2r09_lcd_on(void *board_data) {}
13static inline void kfr2r09_lcd_off(void *board_data) {}
14static inline int kfr2r09_lcd_setup(void *board_data, void *sys_ops_handle,
15 struct sh_mobile_lcdc_sys_bus_ops *sys_ops)
16{
17 return -ENODEV;
18}
19#endif
20
21#endif /* __ASM_SH_KFR2R09_H */
diff --git a/arch/sh/include/mach-kfr2r09/mach/partner-jet-setup.txt b/arch/sh/include/mach-kfr2r09/mach/partner-jet-setup.txt
new file mode 100644
index 000000000000..9c85088728a7
--- /dev/null
+++ b/arch/sh/include/mach-kfr2r09/mach/partner-jet-setup.txt
@@ -0,0 +1,134 @@
1LIST "partner-jet-setup.txt - 20090729 Magnus Damm"
2LIST "set up enough of the kfr2r09 hardware to boot the kernel"
3
4LIST "zImage (RAM boot)"
5LIST "This script can be used to boot the kernel from RAM via JTAG:"
6LIST "> < partner-jet-setup.txt"
7LIST "> RD zImage, 0xa8800000"
8LIST "> G=0xa8800000"
9
10LIST "romImage (Flash boot)"
11LIST "Use the following command to burn the zImage to flash via JTAG:"
12LIST "> RD romImage, 0"
13
14LIST "--------------------------------"
15
16LIST "disable watchdog"
17EW 0xa4520004, 0xa507
18
19LIST "select mode for cs5 + cs6"
20ED 0xff800020, 0xa5a50001
21ED 0xfec10000, 0x0000001b
22
23LIST "setup clocks"
24ED 0xa4150004, 0x00000050
25ED 0xa4150000, 0x91053508
26WAIT 1
27ED 0xa4150024, 0x00005000
28
29LIST "setup pins"
30EB 0xa4050120, 0x00
31EB 0xa4050122, 0x00
32EB 0xa4050124, 0x00
33EB 0xa4050126, 0x00
34EB 0xa4050128, 0xA0
35EB 0xa405012A, 0x10
36EB 0xa405012C, 0x00
37EB 0xa405012E, 0x00
38EB 0xa4050130, 0x00
39EB 0xa4050132, 0x00
40EB 0xa4050134, 0x01
41EB 0xa4050136, 0x40
42EB 0xa4050138, 0x00
43EB 0xa405013A, 0x00
44EB 0xa405013C, 0x00
45EB 0xa405013E, 0x20
46EB 0xa4050160, 0x00
47EB 0xa4050162, 0x40
48EB 0xa4050164, 0x03
49EB 0xa4050166, 0x00
50EB 0xa4050168, 0x00
51EB 0xa405016A, 0x00
52EB 0xa405016C, 0x00
53
54EW 0xa405014E, 0x5660
55EW 0xa4050150, 0x0145
56EW 0xa4050152, 0x1550
57EW 0xa4050154, 0x0200
58EW 0xa4050156, 0x0040
59
60EW 0xa4050158, 0x0000
61EW 0xa405015a, 0x0000
62EW 0xa405015c, 0x0000
63EW 0xa405015e, 0x0000
64
65EW 0xa4050180, 0x0000
66EW 0xa4050182, 0x8002
67EW 0xa4050184, 0x0000
68
69EW 0xa405018a, 0x9991
70EW 0xa405018c, 0x8011
71EW 0xa405018e, 0x9550
72
73EW 0xa4050100, 0x0000
74EW 0xa4050102, 0x5540
75EW 0xa4050104, 0x0000
76EW 0xa4050106, 0x0000
77EW 0xa4050108, 0x4550
78EW 0xa405010a, 0x0130
79EW 0xa405010c, 0x0555
80EW 0xa405010e, 0x0000
81EW 0xa4050110, 0x0000
82EW 0xa4050112, 0xAAA8
83EW 0xa4050114, 0x8305
84EW 0xa4050116, 0x10F0
85EW 0xa4050118, 0x0F50
86EW 0xa405011a, 0x0000
87EW 0xa405011c, 0x0000
88EW 0xa405011e, 0x0555
89EW 0xa4050140, 0x0000
90EW 0xa4050142, 0x5141
91EW 0xa4050144, 0x5005
92EW 0xa4050146, 0xAAA9
93EW 0xa4050148, 0xFAA9
94EW 0xa405014a, 0x3000
95EW 0xa405014c, 0x0000
96
97LIST "setup sdram"
98ED 0xFD000108, 0x40000301
99ED 0xFD000020, 0x011B0002
100ED 0xFD000030, 0x03060E02
101ED 0xFD000034, 0x01020102
102ED 0xFD000038, 0x01090406
103ED 0xFD000008, 0x00000004
104ED 0xFD000040, 0x00000001
105ED 0xFD000040, 0x00000000
106ED 0xFD000018, 0x00000001
107
108WAIT 1
109
110ED 0xFD000014, 0x00000002
111ED 0xFD000060, 0x00000032
112ED 0xFD000060, 0x00020000
113ED 0xFD000014, 0x00000004
114ED 0xFD000014, 0x00000004
115ED 0xFD000010, 0x00000001
116ED 0xFD000044, 0x000004AF
117ED 0xFD000048, 0x20CF0037
118
119LIST "read 16 bytes from sdram"
120DD 0xa8000000, 0xa8000000, 1
121DD 0xa8000004, 0xa8000004, 1
122DD 0xa8000008, 0xa8000008, 1
123DD 0xa800000c, 0xa800000c, 1
124
125ED 0xFD000014, 0x00000002
126ED 0xFD000014, 0x00000004
127ED 0xFD000108, 0x40000300
128ED 0xFD000040, 0x00010000
129
130LIST "write to internal ram"
131ED 0xfd8007fc, 0
132
133LIST "setup cache"
134ED 0xff00001c, 0x0000090b
diff --git a/arch/sh/include/mach-kfr2r09/mach/romimage.h b/arch/sh/include/mach-kfr2r09/mach/romimage.h
new file mode 100644
index 000000000000..f5aa8e16770c
--- /dev/null
+++ b/arch/sh/include/mach-kfr2r09/mach/romimage.h
@@ -0,0 +1,75 @@
1/* kfr2r09 board specific boot code:
2 * converts the "partner-jet-script.txt" script into assembly
3 * the assembly code is the first code to be executed in the romImage
4 */
5
6/* The LIST command is used to include comments in the script */
7.macro LIST comment
8.endm
9
10/* The ED command is used to write a 32-bit word */
11.macro ED, addr, data
12 mov.l 1f ,r1
13 mov.l 2f ,r0
14 mov.l r0, @r1
15 bra 3f
16 nop
17 .align 2
181: .long \addr
192: .long \data
203:
21.endm
22
23/* The EW command is used to write a 16-bit word */
24.macro EW, addr, data
25 mov.l 1f ,r1
26 mov.l 2f ,r0
27 mov.w r0, @r1
28 bra 3f
29 nop
30 .align 2
311: .long \addr
322: .long \data
333:
34.endm
35
36/* The EB command is used to write an 8-bit word */
37.macro EB, addr, data
38 mov.l 1f ,r1
39 mov.l 2f ,r0
40 mov.b r0, @r1
41 bra 3f
42 nop
43 .align 2
441: .long \addr
452: .long \data
463:
47.endm
48
49/* The WAIT command is used to delay the execution */
50.macro WAIT, time
51 mov.l 2f ,r3
521:
53 nop
54 tst r3, r3
55 bf/s 1b
56 dt r3
57 bra 3f
58 nop
59 .align 2
602: .long \time * 100
613:
62.endm
63
64/* The DD command is used to read a 32-bit word */
65.macro DD, addr, addr2, nr
66 mov.l 1f ,r1
67 mov.l @r1, r0
68 bra 2f
69 nop
70 .align 2
711: .long \addr
722:
73.endm
74
75#include "partner-jet-setup.txt"
diff --git a/arch/sh/include/mach-migor/mach/migor.h b/arch/sh/include/mach-migor/mach/migor.h
new file mode 100644
index 000000000000..cee6cb88e020
--- /dev/null
+++ b/arch/sh/include/mach-migor/mach/migor.h
@@ -0,0 +1,14 @@
1#ifndef __ASM_SH_MIGOR_H
2#define __ASM_SH_MIGOR_H
3
4#define PORT_MSELCRB 0xa4050182
5#define BSC_CS4BCR 0xfec10010
6#define BSC_CS6ABCR 0xfec1001c
7#define BSC_CS4WCR 0xfec10030
8
9#include <video/sh_mobile_lcdc.h>
10
11int migor_lcd_qvga_setup(void *board_data, void *sys_ops_handle,
12 struct sh_mobile_lcdc_sys_bus_ops *sys_ops);
13
14#endif /* __ASM_SH_MIGOR_H */
diff --git a/arch/sh/kernel/Makefile_32 b/arch/sh/kernel/Makefile_32
index 9411e3e31e68..f2245ebf0b31 100644
--- a/arch/sh/kernel/Makefile_32
+++ b/arch/sh/kernel/Makefile_32
@@ -9,10 +9,10 @@ ifdef CONFIG_FUNCTION_TRACER
9CFLAGS_REMOVE_ftrace.o = -pg 9CFLAGS_REMOVE_ftrace.o = -pg
10endif 10endif
11 11
12obj-y := debugtraps.o idle.o io.o io_generic.o irq.o \ 12obj-y := debugtraps.o dumpstack.o idle.o io.o io_generic.o irq.o \
13 machvec.o process_32.o ptrace_32.o setup.o signal_32.o \ 13 machvec.o process_32.o ptrace_32.o setup.o signal_32.o \
14 sys_sh.o sys_sh32.o syscalls_32.o time.o topology.o \ 14 sys_sh.o sys_sh32.o syscalls_32.o time.o topology.o \
15 traps.o traps_32.o 15 traps.o traps_32.o unwinder.o
16 16
17obj-y += cpu/ 17obj-y += cpu/
18obj-$(CONFIG_VSYSCALL) += vsyscall/ 18obj-$(CONFIG_VSYSCALL) += vsyscall/
@@ -29,8 +29,11 @@ obj-$(CONFIG_IO_TRAPPED) += io_trapped.o
29obj-$(CONFIG_KPROBES) += kprobes.o 29obj-$(CONFIG_KPROBES) += kprobes.o
30obj-$(CONFIG_GENERIC_GPIO) += gpio.o 30obj-$(CONFIG_GENERIC_GPIO) += gpio.o
31obj-$(CONFIG_DYNAMIC_FTRACE) += ftrace.o 31obj-$(CONFIG_DYNAMIC_FTRACE) += ftrace.o
32obj-$(CONFIG_FTRACE_SYSCALLS) += ftrace.o
33obj-$(CONFIG_FUNCTION_GRAPH_TRACER) += ftrace.o
32obj-$(CONFIG_DUMP_CODE) += disassemble.o 34obj-$(CONFIG_DUMP_CODE) += disassemble.o
33obj-$(CONFIG_HIBERNATION) += swsusp.o 35obj-$(CONFIG_HIBERNATION) += swsusp.o
36obj-$(CONFIG_DWARF_UNWINDER) += dwarf.o
34 37
35obj-$(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST) += localtimer.o 38obj-$(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST) += localtimer.o
36 39
diff --git a/arch/sh/kernel/Makefile_64 b/arch/sh/kernel/Makefile_64
index 67b9f6c6326b..639ee514266c 100644
--- a/arch/sh/kernel/Makefile_64
+++ b/arch/sh/kernel/Makefile_64
@@ -2,7 +2,7 @@ extra-y := head_64.o init_task.o vmlinux.lds
2 2
3obj-y := debugtraps.o idle.o io.o io_generic.o irq.o machvec.o process_64.o \ 3obj-y := debugtraps.o idle.o io.o io_generic.o irq.o machvec.o process_64.o \
4 ptrace_64.o setup.o signal_64.o sys_sh.o sys_sh64.o \ 4 ptrace_64.o setup.o signal_64.o sys_sh.o sys_sh64.o \
5 syscalls_64.o time.o topology.o traps.o traps_64.o 5 syscalls_64.o time.o topology.o traps.o traps_64.o unwinder.o
6 6
7obj-y += cpu/ 7obj-y += cpu/
8obj-$(CONFIG_SMP) += smp.o 8obj-$(CONFIG_SMP) += smp.o
@@ -13,6 +13,7 @@ obj-$(CONFIG_CRASH_DUMP) += crash_dump.o
13obj-$(CONFIG_STACKTRACE) += stacktrace.o 13obj-$(CONFIG_STACKTRACE) += stacktrace.o
14obj-$(CONFIG_IO_TRAPPED) += io_trapped.o 14obj-$(CONFIG_IO_TRAPPED) += io_trapped.o
15obj-$(CONFIG_GENERIC_GPIO) += gpio.o 15obj-$(CONFIG_GENERIC_GPIO) += gpio.o
16obj-$(CONFIG_DWARF_UNWINDER) += dwarf.o
16 17
17obj-$(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST) += localtimer.o 18obj-$(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST) += localtimer.o
18 19
diff --git a/arch/sh/kernel/asm-offsets.c b/arch/sh/kernel/asm-offsets.c
index 99aceb28ee24..d218e808294e 100644
--- a/arch/sh/kernel/asm-offsets.c
+++ b/arch/sh/kernel/asm-offsets.c
@@ -26,6 +26,7 @@ int main(void)
26 DEFINE(TI_CPU, offsetof(struct thread_info, cpu)); 26 DEFINE(TI_CPU, offsetof(struct thread_info, cpu));
27 DEFINE(TI_PRE_COUNT, offsetof(struct thread_info, preempt_count)); 27 DEFINE(TI_PRE_COUNT, offsetof(struct thread_info, preempt_count));
28 DEFINE(TI_RESTART_BLOCK,offsetof(struct thread_info, restart_block)); 28 DEFINE(TI_RESTART_BLOCK,offsetof(struct thread_info, restart_block));
29 DEFINE(TI_SIZE, sizeof(struct thread_info));
29 30
30#ifdef CONFIG_HIBERNATION 31#ifdef CONFIG_HIBERNATION
31 DEFINE(PBE_ADDRESS, offsetof(struct pbe, address)); 32 DEFINE(PBE_ADDRESS, offsetof(struct pbe, address));
diff --git a/arch/sh/kernel/cpu/Makefile b/arch/sh/kernel/cpu/Makefile
index eecad7cbd61e..3d6b9312dc47 100644
--- a/arch/sh/kernel/cpu/Makefile
+++ b/arch/sh/kernel/cpu/Makefile
@@ -19,4 +19,4 @@ obj-$(CONFIG_UBC_WAKEUP) += ubc.o
19obj-$(CONFIG_SH_ADC) += adc.o 19obj-$(CONFIG_SH_ADC) += adc.o
20obj-$(CONFIG_SH_CLK_CPG) += clock-cpg.o 20obj-$(CONFIG_SH_CLK_CPG) += clock-cpg.o
21 21
22obj-y += irq/ init.o clock.o 22obj-y += irq/ init.o clock.o hwblk.o
diff --git a/arch/sh/kernel/cpu/hwblk.c b/arch/sh/kernel/cpu/hwblk.c
new file mode 100644
index 000000000000..c0ad7d46e784
--- /dev/null
+++ b/arch/sh/kernel/cpu/hwblk.c
@@ -0,0 +1,155 @@
1#include <linux/clk.h>
2#include <linux/compiler.h>
3#include <linux/slab.h>
4#include <linux/io.h>
5#include <linux/spinlock.h>
6#include <asm/suspend.h>
7#include <asm/hwblk.h>
8#include <asm/clock.h>
9
10static DEFINE_SPINLOCK(hwblk_lock);
11
12static void hwblk_area_mod_cnt(struct hwblk_info *info,
13 int area, int counter, int value, int goal)
14{
15 struct hwblk_area *hap = info->areas + area;
16
17 hap->cnt[counter] += value;
18
19 if (hap->cnt[counter] != goal)
20 return;
21
22 if (hap->flags & HWBLK_AREA_FLAG_PARENT)
23 hwblk_area_mod_cnt(info, hap->parent, counter, value, goal);
24}
25
26
27static int __hwblk_mod_cnt(struct hwblk_info *info, int hwblk,
28 int counter, int value, int goal)
29{
30 struct hwblk *hp = info->hwblks + hwblk;
31
32 hp->cnt[counter] += value;
33 if (hp->cnt[counter] == goal)
34 hwblk_area_mod_cnt(info, hp->area, counter, value, goal);
35
36 return hp->cnt[counter];
37}
38
39static void hwblk_mod_cnt(struct hwblk_info *info, int hwblk,
40 int counter, int value, int goal)
41{
42 unsigned long flags;
43
44 spin_lock_irqsave(&hwblk_lock, flags);
45 __hwblk_mod_cnt(info, hwblk, counter, value, goal);
46 spin_unlock_irqrestore(&hwblk_lock, flags);
47}
48
49void hwblk_cnt_inc(struct hwblk_info *info, int hwblk, int counter)
50{
51 hwblk_mod_cnt(info, hwblk, counter, 1, 1);
52}
53
54void hwblk_cnt_dec(struct hwblk_info *info, int hwblk, int counter)
55{
56 hwblk_mod_cnt(info, hwblk, counter, -1, 0);
57}
58
59void hwblk_enable(struct hwblk_info *info, int hwblk)
60{
61 struct hwblk *hp = info->hwblks + hwblk;
62 unsigned long tmp;
63 unsigned long flags;
64 int ret;
65
66 spin_lock_irqsave(&hwblk_lock, flags);
67
68 ret = __hwblk_mod_cnt(info, hwblk, HWBLK_CNT_USAGE, 1, 1);
69 if (ret == 1) {
70 tmp = __raw_readl(hp->mstp);
71 tmp &= ~(1 << hp->bit);
72 __raw_writel(tmp, hp->mstp);
73 }
74
75 spin_unlock_irqrestore(&hwblk_lock, flags);
76}
77
78void hwblk_disable(struct hwblk_info *info, int hwblk)
79{
80 struct hwblk *hp = info->hwblks + hwblk;
81 unsigned long tmp;
82 unsigned long flags;
83 int ret;
84
85 spin_lock_irqsave(&hwblk_lock, flags);
86
87 ret = __hwblk_mod_cnt(info, hwblk, HWBLK_CNT_USAGE, -1, 0);
88 if (ret == 0) {
89 tmp = __raw_readl(hp->mstp);
90 tmp |= 1 << hp->bit;
91 __raw_writel(tmp, hp->mstp);
92 }
93
94 spin_unlock_irqrestore(&hwblk_lock, flags);
95}
96
97struct hwblk_info *hwblk_info;
98
99int __init hwblk_register(struct hwblk_info *info)
100{
101 hwblk_info = info;
102 return 0;
103}
104
105int __init __weak arch_hwblk_init(void)
106{
107 return 0;
108}
109
110int __weak arch_hwblk_sleep_mode(void)
111{
112 return SUSP_SH_SLEEP;
113}
114
115int __init hwblk_init(void)
116{
117 return arch_hwblk_init();
118}
119
120/* allow clocks to enable and disable hardware blocks */
121static int sh_hwblk_clk_enable(struct clk *clk)
122{
123 if (!hwblk_info)
124 return -ENOENT;
125
126 hwblk_enable(hwblk_info, clk->arch_flags);
127 return 0;
128}
129
130static void sh_hwblk_clk_disable(struct clk *clk)
131{
132 if (hwblk_info)
133 hwblk_disable(hwblk_info, clk->arch_flags);
134}
135
136static struct clk_ops sh_hwblk_clk_ops = {
137 .enable = sh_hwblk_clk_enable,
138 .disable = sh_hwblk_clk_disable,
139 .recalc = followparent_recalc,
140};
141
142int __init sh_hwblk_clk_register(struct clk *clks, int nr)
143{
144 struct clk *clkp;
145 int ret = 0;
146 int k;
147
148 for (k = 0; !ret && (k < nr); k++) {
149 clkp = clks + k;
150 clkp->ops = &sh_hwblk_clk_ops;
151 ret |= clk_register(clkp);
152 }
153
154 return ret;
155}
diff --git a/arch/sh/kernel/cpu/init.c b/arch/sh/kernel/cpu/init.c
index ad85421099cd..d40b9db5be03 100644
--- a/arch/sh/kernel/cpu/init.c
+++ b/arch/sh/kernel/cpu/init.c
@@ -3,7 +3,7 @@
3 * 3 *
4 * CPU init code 4 * CPU init code
5 * 5 *
6 * Copyright (C) 2002 - 2007 Paul Mundt 6 * Copyright (C) 2002 - 2009 Paul Mundt
7 * Copyright (C) 2003 Richard Curnow 7 * Copyright (C) 2003 Richard Curnow
8 * 8 *
9 * This file is subject to the terms and conditions of the GNU General Public 9 * This file is subject to the terms and conditions of the GNU General Public
@@ -62,6 +62,37 @@ static void __init speculative_execution_init(void)
62#define speculative_execution_init() do { } while (0) 62#define speculative_execution_init() do { } while (0)
63#endif 63#endif
64 64
65#ifdef CONFIG_CPU_SH4A
66#define EXPMASK 0xff2f0004
67#define EXPMASK_RTEDS (1 << 0)
68#define EXPMASK_BRDSSLP (1 << 1)
69#define EXPMASK_MMCAW (1 << 4)
70
71static void __init expmask_init(void)
72{
73 unsigned long expmask = __raw_readl(EXPMASK);
74
75 /*
76 * Future proofing.
77 *
78 * Disable support for slottable sleep instruction
79 * and non-nop instructions in the rte delay slot.
80 */
81 expmask &= ~(EXPMASK_RTEDS | EXPMASK_BRDSSLP);
82
83 /*
84 * Enable associative writes to the memory-mapped cache array
85 * until the cache flush ops have been rewritten.
86 */
87 expmask |= EXPMASK_MMCAW;
88
89 __raw_writel(expmask, EXPMASK);
90 ctrl_barrier();
91}
92#else
93#define expmask_init() do { } while (0)
94#endif
95
65/* 2nd-level cache init */ 96/* 2nd-level cache init */
66void __uses_jump_to_uncached __attribute__ ((weak)) l2_cache_init(void) 97void __uses_jump_to_uncached __attribute__ ((weak)) l2_cache_init(void)
67{ 98{
@@ -321,4 +352,5 @@ asmlinkage void __init sh_cpu_init(void)
321#endif 352#endif
322 353
323 speculative_execution_init(); 354 speculative_execution_init();
355 expmask_init();
324} 356}
diff --git a/arch/sh/kernel/cpu/sh2/entry.S b/arch/sh/kernel/cpu/sh2/entry.S
index becc54c45692..c8a4331d9b8d 100644
--- a/arch/sh/kernel/cpu/sh2/entry.S
+++ b/arch/sh/kernel/cpu/sh2/entry.S
@@ -227,8 +227,9 @@ ENTRY(sh_bios_handler)
227 mov.l @r15+, r14 227 mov.l @r15+, r14
228 add #8,r15 228 add #8,r15
229 lds.l @r15+, pr 229 lds.l @r15+, pr
230 mov.l @r15+,r15
230 rte 231 rte
231 mov.l @r15+,r15 232 nop
232 .align 2 233 .align 2
2331: .long gdb_vbr_vector 2341: .long gdb_vbr_vector
234#endif /* CONFIG_SH_STANDARD_BIOS */ 235#endif /* CONFIG_SH_STANDARD_BIOS */
diff --git a/arch/sh/kernel/cpu/sh2a/entry.S b/arch/sh/kernel/cpu/sh2a/entry.S
index ab3903eeda5c..222742ddc0d6 100644
--- a/arch/sh/kernel/cpu/sh2a/entry.S
+++ b/arch/sh/kernel/cpu/sh2a/entry.S
@@ -176,8 +176,9 @@ ENTRY(sh_bios_handler)
176 movml.l @r15+,r14 176 movml.l @r15+,r14
177 add #8,r15 177 add #8,r15
178 lds.l @r15+, pr 178 lds.l @r15+, pr
179 mov.l @r15+,r15
179 rte 180 rte
180 mov.l @r15+,r15 181 nop
181 .align 2 182 .align 2
1821: .long gdb_vbr_vector 1831: .long gdb_vbr_vector
183#endif /* CONFIG_SH_STANDARD_BIOS */ 184#endif /* CONFIG_SH_STANDARD_BIOS */
diff --git a/arch/sh/kernel/cpu/sh3/entry.S b/arch/sh/kernel/cpu/sh3/entry.S
index 3cb531f233f2..67ad6467c694 100644
--- a/arch/sh/kernel/cpu/sh3/entry.S
+++ b/arch/sh/kernel/cpu/sh3/entry.S
@@ -137,6 +137,7 @@ ENTRY(tlb_protection_violation_store)
137 mov #1, r5 137 mov #1, r5
138 138
139call_dpf: 139call_dpf:
140 setup_frame_reg
140 mov.l 1f, r0 141 mov.l 1f, r0
141 mov r5, r8 142 mov r5, r8
142 mov.l @r0, r6 143 mov.l @r0, r6
diff --git a/arch/sh/kernel/cpu/sh4a/Makefile b/arch/sh/kernel/cpu/sh4a/Makefile
index ebdd391d5f42..12cddf4c721d 100644
--- a/arch/sh/kernel/cpu/sh4a/Makefile
+++ b/arch/sh/kernel/cpu/sh4a/Makefile
@@ -25,9 +25,9 @@ clock-$(CONFIG_CPU_SUBTYPE_SH7780) := clock-sh7780.o
25clock-$(CONFIG_CPU_SUBTYPE_SH7785) := clock-sh7785.o 25clock-$(CONFIG_CPU_SUBTYPE_SH7785) := clock-sh7785.o
26clock-$(CONFIG_CPU_SUBTYPE_SH7786) := clock-sh7786.o 26clock-$(CONFIG_CPU_SUBTYPE_SH7786) := clock-sh7786.o
27clock-$(CONFIG_CPU_SUBTYPE_SH7343) := clock-sh7343.o 27clock-$(CONFIG_CPU_SUBTYPE_SH7343) := clock-sh7343.o
28clock-$(CONFIG_CPU_SUBTYPE_SH7722) := clock-sh7722.o 28clock-$(CONFIG_CPU_SUBTYPE_SH7722) := clock-sh7722.o hwblk-sh7722.o
29clock-$(CONFIG_CPU_SUBTYPE_SH7723) := clock-sh7723.o 29clock-$(CONFIG_CPU_SUBTYPE_SH7723) := clock-sh7723.o hwblk-sh7723.o
30clock-$(CONFIG_CPU_SUBTYPE_SH7724) := clock-sh7724.o 30clock-$(CONFIG_CPU_SUBTYPE_SH7724) := clock-sh7724.o hwblk-sh7724.o
31clock-$(CONFIG_CPU_SUBTYPE_SH7366) := clock-sh7366.o 31clock-$(CONFIG_CPU_SUBTYPE_SH7366) := clock-sh7366.o
32clock-$(CONFIG_CPU_SUBTYPE_SHX3) := clock-shx3.o 32clock-$(CONFIG_CPU_SUBTYPE_SHX3) := clock-shx3.o
33 33
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7722.c b/arch/sh/kernel/cpu/sh4a/clock-sh7722.c
index 40f859354f79..5b1bbbe63b1b 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7722.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7722.c
@@ -22,6 +22,8 @@
22#include <linux/kernel.h> 22#include <linux/kernel.h>
23#include <linux/io.h> 23#include <linux/io.h>
24#include <asm/clock.h> 24#include <asm/clock.h>
25#include <asm/hwblk.h>
26#include <cpu/sh7722.h>
25 27
26/* SH7722 registers */ 28/* SH7722 registers */
27#define FRQCR 0xa4150000 29#define FRQCR 0xa4150000
@@ -30,9 +32,6 @@
30#define SCLKBCR 0xa415000c 32#define SCLKBCR 0xa415000c
31#define IRDACLKCR 0xa4150018 33#define IRDACLKCR 0xa4150018
32#define PLLCR 0xa4150024 34#define PLLCR 0xa4150024
33#define MSTPCR0 0xa4150030
34#define MSTPCR1 0xa4150034
35#define MSTPCR2 0xa4150038
36#define DLLFRQ 0xa4150050 35#define DLLFRQ 0xa4150050
37 36
38/* Fixed 32 KHz root clock for RTC and Power Management purposes */ 37/* Fixed 32 KHz root clock for RTC and Power Management purposes */
@@ -140,35 +139,37 @@ struct clk div6_clks[] = {
140 SH_CLK_DIV6("video_clk", &pll_clk, VCLKCR, 0), 139 SH_CLK_DIV6("video_clk", &pll_clk, VCLKCR, 0),
141}; 140};
142 141
143#define MSTP(_str, _parent, _reg, _bit, _flags) \ 142#define R_CLK &r_clk
144 SH_CLK_MSTP32(_str, -1, _parent, _reg, _bit, _flags) 143#define P_CLK &div4_clks[DIV4_P]
144#define B_CLK &div4_clks[DIV4_B]
145#define U_CLK &div4_clks[DIV4_U]
145 146
146static struct clk mstp_clks[] = { 147static struct clk mstp_clks[] = {
147 MSTP("uram0", &div4_clks[DIV4_U], MSTPCR0, 28, CLK_ENABLE_ON_INIT), 148 SH_HWBLK_CLK("uram0", -1, U_CLK, HWBLK_URAM, CLK_ENABLE_ON_INIT),
148 MSTP("xymem0", &div4_clks[DIV4_B], MSTPCR0, 26, CLK_ENABLE_ON_INIT), 149 SH_HWBLK_CLK("xymem0", -1, B_CLK, HWBLK_XYMEM, CLK_ENABLE_ON_INIT),
149 MSTP("tmu0", &div4_clks[DIV4_P], MSTPCR0, 15, 0), 150 SH_HWBLK_CLK("tmu0", -1, P_CLK, HWBLK_TMU, 0),
150 MSTP("cmt0", &r_clk, MSTPCR0, 14, 0), 151 SH_HWBLK_CLK("cmt0", -1, R_CLK, HWBLK_CMT, 0),
151 MSTP("rwdt0", &r_clk, MSTPCR0, 13, 0), 152 SH_HWBLK_CLK("rwdt0", -1, R_CLK, HWBLK_RWDT, 0),
152 MSTP("flctl0", &div4_clks[DIV4_P], MSTPCR0, 10, 0), 153 SH_HWBLK_CLK("flctl0", -1, P_CLK, HWBLK_FLCTL, 0),
153 MSTP("scif0", &div4_clks[DIV4_P], MSTPCR0, 7, 0), 154 SH_HWBLK_CLK("scif0", -1, P_CLK, HWBLK_SCIF0, 0),
154 MSTP("scif1", &div4_clks[DIV4_P], MSTPCR0, 6, 0), 155 SH_HWBLK_CLK("scif1", -1, P_CLK, HWBLK_SCIF1, 0),
155 MSTP("scif2", &div4_clks[DIV4_P], MSTPCR0, 5, 0), 156 SH_HWBLK_CLK("scif2", -1, P_CLK, HWBLK_SCIF2, 0),
156 157
157 MSTP("i2c0", &div4_clks[DIV4_P], MSTPCR1, 9, 0), 158 SH_HWBLK_CLK("i2c0", -1, P_CLK, HWBLK_IIC, 0),
158 MSTP("rtc0", &r_clk, MSTPCR1, 8, 0), 159 SH_HWBLK_CLK("rtc0", -1, R_CLK, HWBLK_RTC, 0),
159 160
160 MSTP("sdhi0", &div4_clks[DIV4_P], MSTPCR2, 18, 0), 161 SH_HWBLK_CLK("sdhi0", -1, P_CLK, HWBLK_SDHI, 0),
161 MSTP("keysc0", &r_clk, MSTPCR2, 14, 0), 162 SH_HWBLK_CLK("keysc0", -1, R_CLK, HWBLK_KEYSC, 0),
162 MSTP("usbf0", &div4_clks[DIV4_P], MSTPCR2, 11, 0), 163 SH_HWBLK_CLK("usbf0", -1, P_CLK, HWBLK_USBF, 0),
163 MSTP("2dg0", &div4_clks[DIV4_B], MSTPCR2, 9, 0), 164 SH_HWBLK_CLK("2dg0", -1, B_CLK, HWBLK_2DG, 0),
164 MSTP("siu0", &div4_clks[DIV4_B], MSTPCR2, 8, 0), 165 SH_HWBLK_CLK("siu0", -1, B_CLK, HWBLK_SIU, 0),
165 MSTP("vou0", &div4_clks[DIV4_B], MSTPCR2, 5, 0), 166 SH_HWBLK_CLK("vou0", -1, B_CLK, HWBLK_VOU, 0),
166 MSTP("jpu0", &div4_clks[DIV4_B], MSTPCR2, 6, CLK_ENABLE_ON_INIT), 167 SH_HWBLK_CLK("jpu0", -1, B_CLK, HWBLK_JPU, CLK_ENABLE_ON_INIT),
167 MSTP("beu0", &div4_clks[DIV4_B], MSTPCR2, 4, 0), 168 SH_HWBLK_CLK("beu0", -1, B_CLK, HWBLK_BEU, 0),
168 MSTP("ceu0", &div4_clks[DIV4_B], MSTPCR2, 3, 0), 169 SH_HWBLK_CLK("ceu0", -1, B_CLK, HWBLK_CEU, 0),
169 MSTP("veu0", &div4_clks[DIV4_B], MSTPCR2, 2, CLK_ENABLE_ON_INIT), 170 SH_HWBLK_CLK("veu0", -1, B_CLK, HWBLK_VEU, CLK_ENABLE_ON_INIT),
170 MSTP("vpu0", &div4_clks[DIV4_B], MSTPCR2, 1, CLK_ENABLE_ON_INIT), 171 SH_HWBLK_CLK("vpu0", -1, B_CLK, HWBLK_VPU, CLK_ENABLE_ON_INIT),
171 MSTP("lcdc0", &div4_clks[DIV4_B], MSTPCR2, 0, 0), 172 SH_HWBLK_CLK("lcdc0", -1, P_CLK, HWBLK_LCDC, 0),
172}; 173};
173 174
174int __init arch_clk_init(void) 175int __init arch_clk_init(void)
@@ -191,7 +192,7 @@ int __init arch_clk_init(void)
191 ret = sh_clk_div6_register(div6_clks, ARRAY_SIZE(div6_clks)); 192 ret = sh_clk_div6_register(div6_clks, ARRAY_SIZE(div6_clks));
192 193
193 if (!ret) 194 if (!ret)
194 ret = sh_clk_mstp32_register(mstp_clks, ARRAY_SIZE(mstp_clks)); 195 ret = sh_hwblk_clk_register(mstp_clks, ARRAY_SIZE(mstp_clks));
195 196
196 return ret; 197 return ret;
197} 198}
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7723.c b/arch/sh/kernel/cpu/sh4a/clock-sh7723.c
index e67c2678b8ae..e5c63911403c 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7723.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7723.c
@@ -22,6 +22,8 @@
22#include <linux/kernel.h> 22#include <linux/kernel.h>
23#include <linux/io.h> 23#include <linux/io.h>
24#include <asm/clock.h> 24#include <asm/clock.h>
25#include <asm/hwblk.h>
26#include <cpu/sh7723.h>
25 27
26/* SH7723 registers */ 28/* SH7723 registers */
27#define FRQCR 0xa4150000 29#define FRQCR 0xa4150000
@@ -30,9 +32,6 @@
30#define SCLKBCR 0xa415000c 32#define SCLKBCR 0xa415000c
31#define IRDACLKCR 0xa4150018 33#define IRDACLKCR 0xa4150018
32#define PLLCR 0xa4150024 34#define PLLCR 0xa4150024
33#define MSTPCR0 0xa4150030
34#define MSTPCR1 0xa4150034
35#define MSTPCR2 0xa4150038
36#define DLLFRQ 0xa4150050 35#define DLLFRQ 0xa4150050
37 36
38/* Fixed 32 KHz root clock for RTC and Power Management purposes */ 37/* Fixed 32 KHz root clock for RTC and Power Management purposes */
@@ -140,60 +139,64 @@ struct clk div6_clks[] = {
140 SH_CLK_DIV6("video_clk", &pll_clk, VCLKCR, 0), 139 SH_CLK_DIV6("video_clk", &pll_clk, VCLKCR, 0),
141}; 140};
142 141
143#define MSTP(_str, _parent, _reg, _bit, _force_on, _need_cpg, _need_ram) \ 142#define R_CLK (&r_clk)
144 SH_CLK_MSTP32(_str, -1, _parent, _reg, _bit, _force_on * CLK_ENABLE_ON_INIT) 143#define P_CLK (&div4_clks[DIV4_P])
144#define B_CLK (&div4_clks[DIV4_B])
145#define U_CLK (&div4_clks[DIV4_U])
146#define I_CLK (&div4_clks[DIV4_I])
147#define SH_CLK (&div4_clks[DIV4_SH])
145 148
146static struct clk mstp_clks[] = { 149static struct clk mstp_clks[] = {
147 /* See page 60 of Datasheet V1.0: Overview -> Block Diagram */ 150 /* See page 60 of Datasheet V1.0: Overview -> Block Diagram */
148 MSTP("tlb0", &div4_clks[DIV4_I], MSTPCR0, 31, 1, 1, 0), 151 SH_HWBLK_CLK("tlb0", -1, I_CLK, HWBLK_TLB, CLK_ENABLE_ON_INIT),
149 MSTP("ic0", &div4_clks[DIV4_I], MSTPCR0, 30, 1, 1, 0), 152 SH_HWBLK_CLK("ic0", -1, I_CLK, HWBLK_IC, CLK_ENABLE_ON_INIT),
150 MSTP("oc0", &div4_clks[DIV4_I], MSTPCR0, 29, 1, 1, 0), 153 SH_HWBLK_CLK("oc0", -1, I_CLK, HWBLK_OC, CLK_ENABLE_ON_INIT),
151 MSTP("l2c0", &div4_clks[DIV4_SH], MSTPCR0, 28, 1, 1, 0), 154 SH_HWBLK_CLK("l2c0", -1, SH_CLK, HWBLK_L2C, CLK_ENABLE_ON_INIT),
152 MSTP("ilmem0", &div4_clks[DIV4_I], MSTPCR0, 27, 1, 1, 0), 155 SH_HWBLK_CLK("ilmem0", -1, I_CLK, HWBLK_ILMEM, CLK_ENABLE_ON_INIT),
153 MSTP("fpu0", &div4_clks[DIV4_I], MSTPCR0, 24, 1, 1, 0), 156 SH_HWBLK_CLK("fpu0", -1, I_CLK, HWBLK_FPU, CLK_ENABLE_ON_INIT),
154 MSTP("intc0", &div4_clks[DIV4_I], MSTPCR0, 22, 1, 1, 0), 157 SH_HWBLK_CLK("intc0", -1, I_CLK, HWBLK_INTC, CLK_ENABLE_ON_INIT),
155 MSTP("dmac0", &div4_clks[DIV4_B], MSTPCR0, 21, 0, 1, 1), 158 SH_HWBLK_CLK("dmac0", -1, B_CLK, HWBLK_DMAC0, 0),
156 MSTP("sh0", &div4_clks[DIV4_SH], MSTPCR0, 20, 0, 1, 0), 159 SH_HWBLK_CLK("sh0", -1, SH_CLK, HWBLK_SHYWAY, CLK_ENABLE_ON_INIT),
157 MSTP("hudi0", &div4_clks[DIV4_P], MSTPCR0, 19, 0, 1, 0), 160 SH_HWBLK_CLK("hudi0", -1, P_CLK, HWBLK_HUDI, 0),
158 MSTP("ubc0", &div4_clks[DIV4_I], MSTPCR0, 17, 0, 1, 0), 161 SH_HWBLK_CLK("ubc0", -1, I_CLK, HWBLK_UBC, 0),
159 MSTP("tmu0", &div4_clks[DIV4_P], MSTPCR0, 15, 0, 1, 0), 162 SH_HWBLK_CLK("tmu0", -1, P_CLK, HWBLK_TMU0, 0),
160 MSTP("cmt0", &r_clk, MSTPCR0, 14, 0, 0, 0), 163 SH_HWBLK_CLK("cmt0", -1, R_CLK, HWBLK_CMT, 0),
161 MSTP("rwdt0", &r_clk, MSTPCR0, 13, 0, 0, 0), 164 SH_HWBLK_CLK("rwdt0", -1, R_CLK, HWBLK_RWDT, 0),
162 MSTP("dmac1", &div4_clks[DIV4_B], MSTPCR0, 12, 0, 1, 1), 165 SH_HWBLK_CLK("dmac1", -1, B_CLK, HWBLK_DMAC1, 0),
163 MSTP("tmu1", &div4_clks[DIV4_P], MSTPCR0, 11, 0, 1, 0), 166 SH_HWBLK_CLK("tmu1", -1, P_CLK, HWBLK_TMU1, 0),
164 MSTP("flctl0", &div4_clks[DIV4_P], MSTPCR0, 10, 0, 1, 0), 167 SH_HWBLK_CLK("flctl0", -1, P_CLK, HWBLK_FLCTL, 0),
165 MSTP("scif0", &div4_clks[DIV4_P], MSTPCR0, 9, 0, 1, 0), 168 SH_HWBLK_CLK("scif0", -1, P_CLK, HWBLK_SCIF0, 0),
166 MSTP("scif1", &div4_clks[DIV4_P], MSTPCR0, 8, 0, 1, 0), 169 SH_HWBLK_CLK("scif1", -1, P_CLK, HWBLK_SCIF1, 0),
167 MSTP("scif2", &div4_clks[DIV4_P], MSTPCR0, 7, 0, 1, 0), 170 SH_HWBLK_CLK("scif2", -1, P_CLK, HWBLK_SCIF2, 0),
168 MSTP("scif3", &div4_clks[DIV4_B], MSTPCR0, 6, 0, 1, 0), 171 SH_HWBLK_CLK("scif3", -1, B_CLK, HWBLK_SCIF3, 0),
169 MSTP("scif4", &div4_clks[DIV4_B], MSTPCR0, 5, 0, 1, 0), 172 SH_HWBLK_CLK("scif4", -1, B_CLK, HWBLK_SCIF4, 0),
170 MSTP("scif5", &div4_clks[DIV4_B], MSTPCR0, 4, 0, 1, 0), 173 SH_HWBLK_CLK("scif5", -1, B_CLK, HWBLK_SCIF5, 0),
171 MSTP("msiof0", &div4_clks[DIV4_B], MSTPCR0, 2, 0, 1, 0), 174 SH_HWBLK_CLK("msiof0", -1, B_CLK, HWBLK_MSIOF0, 0),
172 MSTP("msiof1", &div4_clks[DIV4_B], MSTPCR0, 1, 0, 1, 0), 175 SH_HWBLK_CLK("msiof1", -1, B_CLK, HWBLK_MSIOF1, 0),
173 MSTP("meram0", &div4_clks[DIV4_SH], MSTPCR0, 0, 1, 1, 0), 176 SH_HWBLK_CLK("meram0", -1, SH_CLK, HWBLK_MERAM, 0),
174 177
175 MSTP("i2c0", &div4_clks[DIV4_P], MSTPCR1, 9, 0, 1, 0), 178 SH_HWBLK_CLK("i2c0", -1, P_CLK, HWBLK_IIC, 0),
176 MSTP("rtc0", &r_clk, MSTPCR1, 8, 0, 0, 0), 179 SH_HWBLK_CLK("rtc0", -1, R_CLK, HWBLK_RTC, 0),
177 180
178 MSTP("atapi0", &div4_clks[DIV4_SH], MSTPCR2, 28, 0, 1, 0), 181 SH_HWBLK_CLK("atapi0", -1, SH_CLK, HWBLK_ATAPI, 0),
179 MSTP("adc0", &div4_clks[DIV4_P], MSTPCR2, 27, 0, 1, 0), 182 SH_HWBLK_CLK("adc0", -1, P_CLK, HWBLK_ADC, 0),
180 MSTP("tpu0", &div4_clks[DIV4_B], MSTPCR2, 25, 0, 1, 0), 183 SH_HWBLK_CLK("tpu0", -1, B_CLK, HWBLK_TPU, 0),
181 MSTP("irda0", &div4_clks[DIV4_P], MSTPCR2, 24, 0, 1, 0), 184 SH_HWBLK_CLK("irda0", -1, P_CLK, HWBLK_IRDA, 0),
182 MSTP("tsif0", &div4_clks[DIV4_B], MSTPCR2, 22, 0, 1, 0), 185 SH_HWBLK_CLK("tsif0", -1, B_CLK, HWBLK_TSIF, 0),
183 MSTP("icb0", &div4_clks[DIV4_B], MSTPCR2, 21, 0, 1, 1), 186 SH_HWBLK_CLK("icb0", -1, B_CLK, HWBLK_ICB, CLK_ENABLE_ON_INIT),
184 MSTP("sdhi0", &div4_clks[DIV4_B], MSTPCR2, 18, 0, 1, 0), 187 SH_HWBLK_CLK("sdhi0", -1, B_CLK, HWBLK_SDHI0, 0),
185 MSTP("sdhi1", &div4_clks[DIV4_B], MSTPCR2, 17, 0, 1, 0), 188 SH_HWBLK_CLK("sdhi1", -1, B_CLK, HWBLK_SDHI1, 0),
186 MSTP("keysc0", &r_clk, MSTPCR2, 14, 0, 0, 0), 189 SH_HWBLK_CLK("keysc0", -1, R_CLK, HWBLK_KEYSC, 0),
187 MSTP("usb0", &div4_clks[DIV4_B], MSTPCR2, 11, 0, 1, 0), 190 SH_HWBLK_CLK("usb0", -1, B_CLK, HWBLK_USB, 0),
188 MSTP("2dg0", &div4_clks[DIV4_B], MSTPCR2, 10, 0, 1, 1), 191 SH_HWBLK_CLK("2dg0", -1, B_CLK, HWBLK_2DG, 0),
189 MSTP("siu0", &div4_clks[DIV4_B], MSTPCR2, 8, 0, 1, 0), 192 SH_HWBLK_CLK("siu0", -1, B_CLK, HWBLK_SIU, 0),
190 MSTP("veu1", &div4_clks[DIV4_B], MSTPCR2, 6, 1, 1, 1), 193 SH_HWBLK_CLK("veu1", -1, B_CLK, HWBLK_VEU2H1, CLK_ENABLE_ON_INIT),
191 MSTP("vou0", &div4_clks[DIV4_B], MSTPCR2, 5, 0, 1, 1), 194 SH_HWBLK_CLK("vou0", -1, B_CLK, HWBLK_VOU, 0),
192 MSTP("beu0", &div4_clks[DIV4_B], MSTPCR2, 4, 0, 1, 1), 195 SH_HWBLK_CLK("beu0", -1, B_CLK, HWBLK_BEU, 0),
193 MSTP("ceu0", &div4_clks[DIV4_B], MSTPCR2, 3, 0, 1, 1), 196 SH_HWBLK_CLK("ceu0", -1, B_CLK, HWBLK_CEU, 0),
194 MSTP("veu0", &div4_clks[DIV4_B], MSTPCR2, 2, 1, 1, 1), 197 SH_HWBLK_CLK("veu0", -1, B_CLK, HWBLK_VEU2H0, CLK_ENABLE_ON_INIT),
195 MSTP("vpu0", &div4_clks[DIV4_B], MSTPCR2, 1, 1, 1, 1), 198 SH_HWBLK_CLK("vpu0", -1, B_CLK, HWBLK_VPU, CLK_ENABLE_ON_INIT),
196 MSTP("lcdc0", &div4_clks[DIV4_B], MSTPCR2, 0, 0, 1, 1), 199 SH_HWBLK_CLK("lcdc0", -1, B_CLK, HWBLK_LCDC, 0),
197}; 200};
198 201
199int __init arch_clk_init(void) 202int __init arch_clk_init(void)
@@ -216,7 +219,7 @@ int __init arch_clk_init(void)
216 ret = sh_clk_div6_register(div6_clks, ARRAY_SIZE(div6_clks)); 219 ret = sh_clk_div6_register(div6_clks, ARRAY_SIZE(div6_clks));
217 220
218 if (!ret) 221 if (!ret)
219 ret = sh_clk_mstp32_register(mstp_clks, ARRAY_SIZE(mstp_clks)); 222 ret = sh_hwblk_clk_register(mstp_clks, ARRAY_SIZE(mstp_clks));
220 223
221 return ret; 224 return ret;
222} 225}
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
index 5d5c9b952883..34611d97378e 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
@@ -22,6 +22,8 @@
22#include <linux/kernel.h> 22#include <linux/kernel.h>
23#include <linux/io.h> 23#include <linux/io.h>
24#include <asm/clock.h> 24#include <asm/clock.h>
25#include <asm/hwblk.h>
26#include <cpu/sh7724.h>
25 27
26/* SH7724 registers */ 28/* SH7724 registers */
27#define FRQCRA 0xa4150000 29#define FRQCRA 0xa4150000
@@ -31,9 +33,6 @@
31#define FCLKBCR 0xa415000c 33#define FCLKBCR 0xa415000c
32#define IRDACLKCR 0xa4150018 34#define IRDACLKCR 0xa4150018
33#define PLLCR 0xa4150024 35#define PLLCR 0xa4150024
34#define MSTPCR0 0xa4150030
35#define MSTPCR1 0xa4150034
36#define MSTPCR2 0xa4150038
37#define SPUCLKCR 0xa415003c 36#define SPUCLKCR 0xa415003c
38#define FLLFRQ 0xa4150050 37#define FLLFRQ 0xa4150050
39#define LSTATS 0xa4150060 38#define LSTATS 0xa4150060
@@ -156,64 +155,67 @@ struct clk div6_clks[] = {
156 SH_CLK_DIV6("spu_clk", &div3_clk, SPUCLKCR, 0), 155 SH_CLK_DIV6("spu_clk", &div3_clk, SPUCLKCR, 0),
157}; 156};
158 157
159#define MSTP(_str, _parent, _reg, _bit, _force_on, _need_cpg, _need_ram) \ 158#define R_CLK (&r_clk)
160 SH_CLK_MSTP32(_str, -1, _parent, _reg, _bit, _force_on * CLK_ENABLE_ON_INIT) 159#define P_CLK (&div4_clks[DIV4_P])
160#define B_CLK (&div4_clks[DIV4_B])
161#define I_CLK (&div4_clks[DIV4_I])
162#define SH_CLK (&div4_clks[DIV4_SH])
161 163
162static struct clk mstp_clks[] = { 164static struct clk mstp_clks[] = {
163 MSTP("tlb0", &div4_clks[DIV4_I], MSTPCR0, 31, 1, 1, 0), 165 SH_HWBLK_CLK("tlb0", -1, I_CLK, HWBLK_TLB, CLK_ENABLE_ON_INIT),
164 MSTP("ic0", &div4_clks[DIV4_I], MSTPCR0, 30, 1, 1, 0), 166 SH_HWBLK_CLK("ic0", -1, I_CLK, HWBLK_IC, CLK_ENABLE_ON_INIT),
165 MSTP("oc0", &div4_clks[DIV4_I], MSTPCR0, 29, 1, 1, 0), 167 SH_HWBLK_CLK("oc0", -1, I_CLK, HWBLK_OC, CLK_ENABLE_ON_INIT),
166 MSTP("rs0", &div4_clks[DIV4_B], MSTPCR0, 28, 1, 1, 0), 168 SH_HWBLK_CLK("rs0", -1, B_CLK, HWBLK_RSMEM, CLK_ENABLE_ON_INIT),
167 MSTP("ilmem0", &div4_clks[DIV4_I], MSTPCR0, 27, 1, 1, 0), 169 SH_HWBLK_CLK("ilmem0", -1, I_CLK, HWBLK_ILMEM, CLK_ENABLE_ON_INIT),
168 MSTP("l2c0", &div4_clks[DIV4_SH], MSTPCR0, 26, 1, 1, 0), 170 SH_HWBLK_CLK("l2c0", -1, SH_CLK, HWBLK_L2C, CLK_ENABLE_ON_INIT),
169 MSTP("fpu0", &div4_clks[DIV4_I], MSTPCR0, 24, 1, 1, 0), 171 SH_HWBLK_CLK("fpu0", -1, I_CLK, HWBLK_FPU, CLK_ENABLE_ON_INIT),
170 MSTP("intc0", &div4_clks[DIV4_P], MSTPCR0, 22, 1, 1, 0), 172 SH_HWBLK_CLK("intc0", -1, P_CLK, HWBLK_INTC, CLK_ENABLE_ON_INIT),
171 MSTP("dmac0", &div4_clks[DIV4_B], MSTPCR0, 21, 0, 1, 1), 173 SH_HWBLK_CLK("dmac0", -1, B_CLK, HWBLK_DMAC0, 0),
172 MSTP("sh0", &div4_clks[DIV4_SH], MSTPCR0, 20, 0, 1, 0), 174 SH_HWBLK_CLK("sh0", -1, SH_CLK, HWBLK_SHYWAY, CLK_ENABLE_ON_INIT),
173 MSTP("hudi0", &div4_clks[DIV4_P], MSTPCR0, 19, 0, 1, 0), 175 SH_HWBLK_CLK("hudi0", -1, P_CLK, HWBLK_HUDI, 0),
174 MSTP("ubc0", &div4_clks[DIV4_I], MSTPCR0, 17, 0, 1, 0), 176 SH_HWBLK_CLK("ubc0", -1, I_CLK, HWBLK_UBC, 0),
175 MSTP("tmu0", &div4_clks[DIV4_P], MSTPCR0, 15, 0, 1, 0), 177 SH_HWBLK_CLK("tmu0", -1, P_CLK, HWBLK_TMU0, 0),
176 MSTP("cmt0", &r_clk, MSTPCR0, 14, 0, 0, 0), 178 SH_HWBLK_CLK("cmt0", -1, R_CLK, HWBLK_CMT, 0),
177 MSTP("rwdt0", &r_clk, MSTPCR0, 13, 0, 0, 0), 179 SH_HWBLK_CLK("rwdt0", -1, R_CLK, HWBLK_RWDT, 0),
178 MSTP("dmac1", &div4_clks[DIV4_B], MSTPCR0, 12, 0, 1, 1), 180 SH_HWBLK_CLK("dmac1", -1, B_CLK, HWBLK_DMAC1, 0),
179 MSTP("tmu1", &div4_clks[DIV4_P], MSTPCR0, 10, 0, 1, 0), 181 SH_HWBLK_CLK("tmu1", -1, P_CLK, HWBLK_TMU1, 0),
180 MSTP("scif0", &div4_clks[DIV4_P], MSTPCR0, 9, 0, 1, 0), 182 SH_HWBLK_CLK("scif0", -1, P_CLK, HWBLK_SCIF0, 0),
181 MSTP("scif1", &div4_clks[DIV4_P], MSTPCR0, 8, 0, 1, 0), 183 SH_HWBLK_CLK("scif1", -1, P_CLK, HWBLK_SCIF1, 0),
182 MSTP("scif2", &div4_clks[DIV4_P], MSTPCR0, 7, 0, 1, 0), 184 SH_HWBLK_CLK("scif2", -1, P_CLK, HWBLK_SCIF2, 0),
183 MSTP("scif3", &div4_clks[DIV4_B], MSTPCR0, 6, 0, 1, 0), 185 SH_HWBLK_CLK("scif3", -1, B_CLK, HWBLK_SCIF3, 0),
184 MSTP("scif4", &div4_clks[DIV4_B], MSTPCR0, 5, 0, 1, 0), 186 SH_HWBLK_CLK("scif4", -1, B_CLK, HWBLK_SCIF4, 0),
185 MSTP("scif5", &div4_clks[DIV4_B], MSTPCR0, 4, 0, 1, 0), 187 SH_HWBLK_CLK("scif5", -1, B_CLK, HWBLK_SCIF5, 0),
186 MSTP("msiof0", &div4_clks[DIV4_B], MSTPCR0, 2, 0, 1, 0), 188 SH_HWBLK_CLK("msiof0", -1, B_CLK, HWBLK_MSIOF0, 0),
187 MSTP("msiof1", &div4_clks[DIV4_B], MSTPCR0, 1, 0, 1, 0), 189 SH_HWBLK_CLK("msiof1", -1, B_CLK, HWBLK_MSIOF1, 0),
188 190
189 MSTP("keysc0", &r_clk, MSTPCR1, 12, 0, 0, 0), 191 SH_HWBLK_CLK("keysc0", -1, R_CLK, HWBLK_KEYSC, 0),
190 MSTP("rtc0", &r_clk, MSTPCR1, 11, 0, 0, 0), 192 SH_HWBLK_CLK("rtc0", -1, R_CLK, HWBLK_RTC, 0),
191 MSTP("i2c0", &div4_clks[DIV4_P], MSTPCR1, 9, 0, 1, 0), 193 SH_HWBLK_CLK("i2c0", -1, P_CLK, HWBLK_IIC0, 0),
192 MSTP("i2c1", &div4_clks[DIV4_P], MSTPCR1, 8, 0, 1, 0), 194 SH_HWBLK_CLK("i2c1", -1, P_CLK, HWBLK_IIC1, 0),
193 195
194 MSTP("mmc0", &div4_clks[DIV4_B], MSTPCR2, 29, 0, 1, 0), 196 SH_HWBLK_CLK("mmc0", -1, B_CLK, HWBLK_MMC, 0),
195 MSTP("eth0", &div4_clks[DIV4_B], MSTPCR2, 28, 0, 1, 0), 197 SH_HWBLK_CLK("eth0", -1, B_CLK, HWBLK_ETHER, 0),
196 MSTP("atapi0", &div4_clks[DIV4_B], MSTPCR2, 26, 0, 1, 0), 198 SH_HWBLK_CLK("atapi0", -1, B_CLK, HWBLK_ATAPI, 0),
197 MSTP("tpu0", &div4_clks[DIV4_B], MSTPCR2, 25, 0, 1, 0), 199 SH_HWBLK_CLK("tpu0", -1, B_CLK, HWBLK_TPU, 0),
198 MSTP("irda0", &div4_clks[DIV4_P], MSTPCR2, 24, 0, 1, 0), 200 SH_HWBLK_CLK("irda0", -1, P_CLK, HWBLK_IRDA, 0),
199 MSTP("tsif0", &div4_clks[DIV4_B], MSTPCR2, 22, 0, 1, 0), 201 SH_HWBLK_CLK("tsif0", -1, B_CLK, HWBLK_TSIF, 0),
200 MSTP("usb1", &div4_clks[DIV4_B], MSTPCR2, 21, 0, 1, 1), 202 SH_HWBLK_CLK("usb1", -1, B_CLK, HWBLK_USB1, 0),
201 MSTP("usb0", &div4_clks[DIV4_B], MSTPCR2, 20, 0, 1, 1), 203 SH_HWBLK_CLK("usb0", -1, B_CLK, HWBLK_USB0, 0),
202 MSTP("2dg0", &div4_clks[DIV4_B], MSTPCR2, 19, 0, 1, 1), 204 SH_HWBLK_CLK("2dg0", -1, B_CLK, HWBLK_2DG, 0),
203 MSTP("sdhi0", &div4_clks[DIV4_B], MSTPCR2, 18, 0, 1, 0), 205 SH_HWBLK_CLK("sdhi0", -1, B_CLK, HWBLK_SDHI0, 0),
204 MSTP("sdhi1", &div4_clks[DIV4_B], MSTPCR2, 17, 0, 1, 0), 206 SH_HWBLK_CLK("sdhi1", -1, B_CLK, HWBLK_SDHI1, 0),
205 MSTP("veu1", &div4_clks[DIV4_B], MSTPCR2, 15, 1, 1, 1), 207 SH_HWBLK_CLK("veu1", -1, B_CLK, HWBLK_VEU1, CLK_ENABLE_ON_INIT),
206 MSTP("ceu1", &div4_clks[DIV4_B], MSTPCR2, 13, 0, 1, 1), 208 SH_HWBLK_CLK("ceu1", -1, B_CLK, HWBLK_CEU1, 0),
207 MSTP("beu1", &div4_clks[DIV4_B], MSTPCR2, 12, 0, 1, 1), 209 SH_HWBLK_CLK("beu1", -1, B_CLK, HWBLK_BEU1, 0),
208 MSTP("2ddmac0", &div4_clks[DIV4_SH], MSTPCR2, 10, 0, 1, 1), 210 SH_HWBLK_CLK("2ddmac0", -1, SH_CLK, HWBLK_2DDMAC, 0),
209 MSTP("spu0", &div4_clks[DIV4_B], MSTPCR2, 9, 0, 1, 0), 211 SH_HWBLK_CLK("spu0", -1, B_CLK, HWBLK_SPU, 0),
210 MSTP("jpu0", &div4_clks[DIV4_B], MSTPCR2, 6, 1, 1, 1), 212 SH_HWBLK_CLK("jpu0", -1, B_CLK, HWBLK_JPU, CLK_ENABLE_ON_INIT),
211 MSTP("vou0", &div4_clks[DIV4_B], MSTPCR2, 5, 0, 1, 1), 213 SH_HWBLK_CLK("vou0", -1, B_CLK, HWBLK_VOU, 0),
212 MSTP("beu0", &div4_clks[DIV4_B], MSTPCR2, 4, 0, 1, 1), 214 SH_HWBLK_CLK("beu0", -1, B_CLK, HWBLK_BEU0, 0),
213 MSTP("ceu0", &div4_clks[DIV4_B], MSTPCR2, 3, 0, 1, 1), 215 SH_HWBLK_CLK("ceu0", -1, B_CLK, HWBLK_CEU0, 0),
214 MSTP("veu0", &div4_clks[DIV4_B], MSTPCR2, 2, 1, 1, 1), 216 SH_HWBLK_CLK("veu0", -1, B_CLK, HWBLK_VEU0, CLK_ENABLE_ON_INIT),
215 MSTP("vpu0", &div4_clks[DIV4_B], MSTPCR2, 1, 1, 1, 1), 217 SH_HWBLK_CLK("vpu0", -1, B_CLK, HWBLK_VPU, CLK_ENABLE_ON_INIT),
216 MSTP("lcdc0", &div4_clks[DIV4_B], MSTPCR2, 0, 0, 1, 1), 218 SH_HWBLK_CLK("lcdc0", -1, B_CLK, HWBLK_LCDC, 0),
217}; 219};
218 220
219int __init arch_clk_init(void) 221int __init arch_clk_init(void)
@@ -236,7 +238,7 @@ int __init arch_clk_init(void)
236 ret = sh_clk_div6_register(div6_clks, ARRAY_SIZE(div6_clks)); 238 ret = sh_clk_div6_register(div6_clks, ARRAY_SIZE(div6_clks));
237 239
238 if (!ret) 240 if (!ret)
239 ret = sh_clk_mstp32_register(mstp_clks, ARRAY_SIZE(mstp_clks)); 241 ret = sh_hwblk_clk_register(mstp_clks, ARRAY_SIZE(mstp_clks));
240 242
241 return ret; 243 return ret;
242} 244}
diff --git a/arch/sh/kernel/cpu/sh4a/hwblk-sh7722.c b/arch/sh/kernel/cpu/sh4a/hwblk-sh7722.c
new file mode 100644
index 000000000000..a288b5d92341
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh4a/hwblk-sh7722.c
@@ -0,0 +1,106 @@
1/*
2 * arch/sh/kernel/cpu/sh4a/hwblk-sh7722.c
3 *
4 * SH7722 hardware block support
5 *
6 * Copyright (C) 2009 Magnus Damm
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21#include <linux/init.h>
22#include <linux/kernel.h>
23#include <linux/io.h>
24#include <asm/suspend.h>
25#include <asm/hwblk.h>
26#include <cpu/sh7722.h>
27
28/* SH7722 registers */
29#define MSTPCR0 0xa4150030
30#define MSTPCR1 0xa4150034
31#define MSTPCR2 0xa4150038
32
33/* SH7722 Power Domains */
34enum { CORE_AREA, SUB_AREA, CORE_AREA_BM };
35static struct hwblk_area sh7722_hwblk_area[] = {
36 [CORE_AREA] = HWBLK_AREA(0, 0),
37 [CORE_AREA_BM] = HWBLK_AREA(HWBLK_AREA_FLAG_PARENT, CORE_AREA),
38 [SUB_AREA] = HWBLK_AREA(0, 0),
39};
40
41/* Table mapping HWBLK to Module Stop Bit and Power Domain */
42static struct hwblk sh7722_hwblk[HWBLK_NR] = {
43 [HWBLK_TLB] = HWBLK(MSTPCR0, 31, CORE_AREA),
44 [HWBLK_IC] = HWBLK(MSTPCR0, 30, CORE_AREA),
45 [HWBLK_OC] = HWBLK(MSTPCR0, 29, CORE_AREA),
46 [HWBLK_URAM] = HWBLK(MSTPCR0, 28, CORE_AREA),
47 [HWBLK_XYMEM] = HWBLK(MSTPCR0, 26, CORE_AREA),
48 [HWBLK_INTC] = HWBLK(MSTPCR0, 22, CORE_AREA),
49 [HWBLK_DMAC] = HWBLK(MSTPCR0, 21, CORE_AREA_BM),
50 [HWBLK_SHYWAY] = HWBLK(MSTPCR0, 20, CORE_AREA),
51 [HWBLK_HUDI] = HWBLK(MSTPCR0, 19, CORE_AREA),
52 [HWBLK_UBC] = HWBLK(MSTPCR0, 17, CORE_AREA),
53 [HWBLK_TMU] = HWBLK(MSTPCR0, 15, CORE_AREA),
54 [HWBLK_CMT] = HWBLK(MSTPCR0, 14, SUB_AREA),
55 [HWBLK_RWDT] = HWBLK(MSTPCR0, 13, SUB_AREA),
56 [HWBLK_FLCTL] = HWBLK(MSTPCR0, 10, CORE_AREA),
57 [HWBLK_SCIF0] = HWBLK(MSTPCR0, 7, CORE_AREA),
58 [HWBLK_SCIF1] = HWBLK(MSTPCR0, 6, CORE_AREA),
59 [HWBLK_SCIF2] = HWBLK(MSTPCR0, 5, CORE_AREA),
60 [HWBLK_SIO] = HWBLK(MSTPCR0, 3, CORE_AREA),
61 [HWBLK_SIOF0] = HWBLK(MSTPCR0, 2, CORE_AREA),
62 [HWBLK_SIOF1] = HWBLK(MSTPCR0, 1, CORE_AREA),
63
64 [HWBLK_IIC] = HWBLK(MSTPCR1, 9, CORE_AREA),
65 [HWBLK_RTC] = HWBLK(MSTPCR1, 8, SUB_AREA),
66
67 [HWBLK_TPU] = HWBLK(MSTPCR2, 25, CORE_AREA),
68 [HWBLK_IRDA] = HWBLK(MSTPCR2, 24, CORE_AREA),
69 [HWBLK_SDHI] = HWBLK(MSTPCR2, 18, CORE_AREA),
70 [HWBLK_SIM] = HWBLK(MSTPCR2, 16, CORE_AREA),
71 [HWBLK_KEYSC] = HWBLK(MSTPCR2, 14, SUB_AREA),
72 [HWBLK_TSIF] = HWBLK(MSTPCR2, 13, SUB_AREA),
73 [HWBLK_USBF] = HWBLK(MSTPCR2, 11, CORE_AREA),
74 [HWBLK_2DG] = HWBLK(MSTPCR2, 9, CORE_AREA_BM),
75 [HWBLK_SIU] = HWBLK(MSTPCR2, 8, CORE_AREA),
76 [HWBLK_JPU] = HWBLK(MSTPCR2, 6, CORE_AREA_BM),
77 [HWBLK_VOU] = HWBLK(MSTPCR2, 5, CORE_AREA_BM),
78 [HWBLK_BEU] = HWBLK(MSTPCR2, 4, CORE_AREA_BM),
79 [HWBLK_CEU] = HWBLK(MSTPCR2, 3, CORE_AREA_BM),
80 [HWBLK_VEU] = HWBLK(MSTPCR2, 2, CORE_AREA_BM),
81 [HWBLK_VPU] = HWBLK(MSTPCR2, 1, CORE_AREA_BM),
82 [HWBLK_LCDC] = HWBLK(MSTPCR2, 0, CORE_AREA_BM),
83};
84
85static struct hwblk_info sh7722_hwblk_info = {
86 .areas = sh7722_hwblk_area,
87 .nr_areas = ARRAY_SIZE(sh7722_hwblk_area),
88 .hwblks = sh7722_hwblk,
89 .nr_hwblks = ARRAY_SIZE(sh7722_hwblk),
90};
91
92int arch_hwblk_sleep_mode(void)
93{
94 if (!sh7722_hwblk_area[CORE_AREA].cnt[HWBLK_CNT_USAGE])
95 return SUSP_SH_STANDBY | SUSP_SH_SF;
96
97 if (!sh7722_hwblk_area[CORE_AREA_BM].cnt[HWBLK_CNT_USAGE])
98 return SUSP_SH_SLEEP | SUSP_SH_SF;
99
100 return SUSP_SH_SLEEP;
101}
102
103int __init arch_hwblk_init(void)
104{
105 return hwblk_register(&sh7722_hwblk_info);
106}
diff --git a/arch/sh/kernel/cpu/sh4a/hwblk-sh7723.c b/arch/sh/kernel/cpu/sh4a/hwblk-sh7723.c
new file mode 100644
index 000000000000..a7f4684d2032
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh4a/hwblk-sh7723.c
@@ -0,0 +1,117 @@
1/*
2 * arch/sh/kernel/cpu/sh4a/hwblk-sh7723.c
3 *
4 * SH7723 hardware block support
5 *
6 * Copyright (C) 2009 Magnus Damm
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21#include <linux/init.h>
22#include <linux/kernel.h>
23#include <linux/io.h>
24#include <asm/suspend.h>
25#include <asm/hwblk.h>
26#include <cpu/sh7723.h>
27
28/* SH7723 registers */
29#define MSTPCR0 0xa4150030
30#define MSTPCR1 0xa4150034
31#define MSTPCR2 0xa4150038
32
33/* SH7723 Power Domains */
34enum { CORE_AREA, SUB_AREA, CORE_AREA_BM };
35static struct hwblk_area sh7723_hwblk_area[] = {
36 [CORE_AREA] = HWBLK_AREA(0, 0),
37 [CORE_AREA_BM] = HWBLK_AREA(HWBLK_AREA_FLAG_PARENT, CORE_AREA),
38 [SUB_AREA] = HWBLK_AREA(0, 0),
39};
40
41/* Table mapping HWBLK to Module Stop Bit and Power Domain */
42static struct hwblk sh7723_hwblk[HWBLK_NR] = {
43 [HWBLK_TLB] = HWBLK(MSTPCR0, 31, CORE_AREA),
44 [HWBLK_IC] = HWBLK(MSTPCR0, 30, CORE_AREA),
45 [HWBLK_OC] = HWBLK(MSTPCR0, 29, CORE_AREA),
46 [HWBLK_L2C] = HWBLK(MSTPCR0, 28, CORE_AREA),
47 [HWBLK_ILMEM] = HWBLK(MSTPCR0, 27, CORE_AREA),
48 [HWBLK_FPU] = HWBLK(MSTPCR0, 24, CORE_AREA),
49 [HWBLK_INTC] = HWBLK(MSTPCR0, 22, CORE_AREA),
50 [HWBLK_DMAC0] = HWBLK(MSTPCR0, 21, CORE_AREA_BM),
51 [HWBLK_SHYWAY] = HWBLK(MSTPCR0, 20, CORE_AREA),
52 [HWBLK_HUDI] = HWBLK(MSTPCR0, 19, CORE_AREA),
53 [HWBLK_DBG] = HWBLK(MSTPCR0, 18, CORE_AREA),
54 [HWBLK_UBC] = HWBLK(MSTPCR0, 17, CORE_AREA),
55 [HWBLK_SUBC] = HWBLK(MSTPCR0, 16, CORE_AREA),
56 [HWBLK_TMU0] = HWBLK(MSTPCR0, 15, CORE_AREA),
57 [HWBLK_CMT] = HWBLK(MSTPCR0, 14, SUB_AREA),
58 [HWBLK_RWDT] = HWBLK(MSTPCR0, 13, SUB_AREA),
59 [HWBLK_DMAC1] = HWBLK(MSTPCR0, 12, CORE_AREA_BM),
60 [HWBLK_TMU1] = HWBLK(MSTPCR0, 11, CORE_AREA),
61 [HWBLK_FLCTL] = HWBLK(MSTPCR0, 10, CORE_AREA),
62 [HWBLK_SCIF0] = HWBLK(MSTPCR0, 9, CORE_AREA),
63 [HWBLK_SCIF1] = HWBLK(MSTPCR0, 8, CORE_AREA),
64 [HWBLK_SCIF2] = HWBLK(MSTPCR0, 7, CORE_AREA),
65 [HWBLK_SCIF3] = HWBLK(MSTPCR0, 6, CORE_AREA),
66 [HWBLK_SCIF4] = HWBLK(MSTPCR0, 5, CORE_AREA),
67 [HWBLK_SCIF5] = HWBLK(MSTPCR0, 4, CORE_AREA),
68 [HWBLK_MSIOF0] = HWBLK(MSTPCR0, 2, CORE_AREA),
69 [HWBLK_MSIOF1] = HWBLK(MSTPCR0, 1, CORE_AREA),
70 [HWBLK_MERAM] = HWBLK(MSTPCR0, 0, CORE_AREA),
71
72 [HWBLK_IIC] = HWBLK(MSTPCR1, 9, CORE_AREA),
73 [HWBLK_RTC] = HWBLK(MSTPCR1, 8, SUB_AREA),
74
75 [HWBLK_ATAPI] = HWBLK(MSTPCR2, 28, CORE_AREA_BM),
76 [HWBLK_ADC] = HWBLK(MSTPCR2, 27, CORE_AREA),
77 [HWBLK_TPU] = HWBLK(MSTPCR2, 25, CORE_AREA),
78 [HWBLK_IRDA] = HWBLK(MSTPCR2, 24, CORE_AREA),
79 [HWBLK_TSIF] = HWBLK(MSTPCR2, 22, CORE_AREA),
80 [HWBLK_ICB] = HWBLK(MSTPCR2, 21, CORE_AREA_BM),
81 [HWBLK_SDHI0] = HWBLK(MSTPCR2, 18, CORE_AREA),
82 [HWBLK_SDHI1] = HWBLK(MSTPCR2, 17, CORE_AREA),
83 [HWBLK_KEYSC] = HWBLK(MSTPCR2, 14, SUB_AREA),
84 [HWBLK_USB] = HWBLK(MSTPCR2, 11, CORE_AREA),
85 [HWBLK_2DG] = HWBLK(MSTPCR2, 10, CORE_AREA_BM),
86 [HWBLK_SIU] = HWBLK(MSTPCR2, 8, CORE_AREA),
87 [HWBLK_VEU2H1] = HWBLK(MSTPCR2, 6, CORE_AREA_BM),
88 [HWBLK_VOU] = HWBLK(MSTPCR2, 5, CORE_AREA_BM),
89 [HWBLK_BEU] = HWBLK(MSTPCR2, 4, CORE_AREA_BM),
90 [HWBLK_CEU] = HWBLK(MSTPCR2, 3, CORE_AREA_BM),
91 [HWBLK_VEU2H0] = HWBLK(MSTPCR2, 2, CORE_AREA_BM),
92 [HWBLK_VPU] = HWBLK(MSTPCR2, 1, CORE_AREA_BM),
93 [HWBLK_LCDC] = HWBLK(MSTPCR2, 0, CORE_AREA_BM),
94};
95
96static struct hwblk_info sh7723_hwblk_info = {
97 .areas = sh7723_hwblk_area,
98 .nr_areas = ARRAY_SIZE(sh7723_hwblk_area),
99 .hwblks = sh7723_hwblk,
100 .nr_hwblks = ARRAY_SIZE(sh7723_hwblk),
101};
102
103int arch_hwblk_sleep_mode(void)
104{
105 if (!sh7723_hwblk_area[CORE_AREA].cnt[HWBLK_CNT_USAGE])
106 return SUSP_SH_STANDBY | SUSP_SH_SF;
107
108 if (!sh7723_hwblk_area[CORE_AREA_BM].cnt[HWBLK_CNT_USAGE])
109 return SUSP_SH_SLEEP | SUSP_SH_SF;
110
111 return SUSP_SH_SLEEP;
112}
113
114int __init arch_hwblk_init(void)
115{
116 return hwblk_register(&sh7723_hwblk_info);
117}
diff --git a/arch/sh/kernel/cpu/sh4a/hwblk-sh7724.c b/arch/sh/kernel/cpu/sh4a/hwblk-sh7724.c
new file mode 100644
index 000000000000..1613ad6013c3
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh4a/hwblk-sh7724.c
@@ -0,0 +1,121 @@
1/*
2 * arch/sh/kernel/cpu/sh4a/hwblk-sh7724.c
3 *
4 * SH7724 hardware block support
5 *
6 * Copyright (C) 2009 Magnus Damm
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21#include <linux/init.h>
22#include <linux/kernel.h>
23#include <linux/io.h>
24#include <asm/suspend.h>
25#include <asm/hwblk.h>
26#include <cpu/sh7724.h>
27
28/* SH7724 registers */
29#define MSTPCR0 0xa4150030
30#define MSTPCR1 0xa4150034
31#define MSTPCR2 0xa4150038
32
33/* SH7724 Power Domains */
34enum { CORE_AREA, SUB_AREA, CORE_AREA_BM };
35static struct hwblk_area sh7724_hwblk_area[] = {
36 [CORE_AREA] = HWBLK_AREA(0, 0),
37 [CORE_AREA_BM] = HWBLK_AREA(HWBLK_AREA_FLAG_PARENT, CORE_AREA),
38 [SUB_AREA] = HWBLK_AREA(0, 0),
39};
40
41/* Table mapping HWBLK to Module Stop Bit and Power Domain */
42static struct hwblk sh7724_hwblk[HWBLK_NR] = {
43 [HWBLK_TLB] = HWBLK(MSTPCR0, 31, CORE_AREA),
44 [HWBLK_IC] = HWBLK(MSTPCR0, 30, CORE_AREA),
45 [HWBLK_OC] = HWBLK(MSTPCR0, 29, CORE_AREA),
46 [HWBLK_RSMEM] = HWBLK(MSTPCR0, 28, CORE_AREA),
47 [HWBLK_ILMEM] = HWBLK(MSTPCR0, 27, CORE_AREA),
48 [HWBLK_L2C] = HWBLK(MSTPCR0, 26, CORE_AREA),
49 [HWBLK_FPU] = HWBLK(MSTPCR0, 24, CORE_AREA),
50 [HWBLK_INTC] = HWBLK(MSTPCR0, 22, CORE_AREA),
51 [HWBLK_DMAC0] = HWBLK(MSTPCR0, 21, CORE_AREA_BM),
52 [HWBLK_SHYWAY] = HWBLK(MSTPCR0, 20, CORE_AREA),
53 [HWBLK_HUDI] = HWBLK(MSTPCR0, 19, CORE_AREA),
54 [HWBLK_DBG] = HWBLK(MSTPCR0, 18, CORE_AREA),
55 [HWBLK_UBC] = HWBLK(MSTPCR0, 17, CORE_AREA),
56 [HWBLK_TMU0] = HWBLK(MSTPCR0, 15, CORE_AREA),
57 [HWBLK_CMT] = HWBLK(MSTPCR0, 14, SUB_AREA),
58 [HWBLK_RWDT] = HWBLK(MSTPCR0, 13, SUB_AREA),
59 [HWBLK_DMAC1] = HWBLK(MSTPCR0, 12, CORE_AREA_BM),
60 [HWBLK_TMU1] = HWBLK(MSTPCR0, 10, CORE_AREA),
61 [HWBLK_SCIF0] = HWBLK(MSTPCR0, 9, CORE_AREA),
62 [HWBLK_SCIF1] = HWBLK(MSTPCR0, 8, CORE_AREA),
63 [HWBLK_SCIF2] = HWBLK(MSTPCR0, 7, CORE_AREA),
64 [HWBLK_SCIF3] = HWBLK(MSTPCR0, 6, CORE_AREA),
65 [HWBLK_SCIF4] = HWBLK(MSTPCR0, 5, CORE_AREA),
66 [HWBLK_SCIF5] = HWBLK(MSTPCR0, 4, CORE_AREA),
67 [HWBLK_MSIOF0] = HWBLK(MSTPCR0, 2, CORE_AREA),
68 [HWBLK_MSIOF1] = HWBLK(MSTPCR0, 1, CORE_AREA),
69
70 [HWBLK_KEYSC] = HWBLK(MSTPCR1, 12, SUB_AREA),
71 [HWBLK_RTC] = HWBLK(MSTPCR1, 11, SUB_AREA),
72 [HWBLK_IIC0] = HWBLK(MSTPCR1, 9, CORE_AREA),
73 [HWBLK_IIC1] = HWBLK(MSTPCR1, 8, CORE_AREA),
74
75 [HWBLK_MMC] = HWBLK(MSTPCR2, 29, CORE_AREA),
76 [HWBLK_ETHER] = HWBLK(MSTPCR2, 28, CORE_AREA_BM),
77 [HWBLK_ATAPI] = HWBLK(MSTPCR2, 26, CORE_AREA_BM),
78 [HWBLK_TPU] = HWBLK(MSTPCR2, 25, CORE_AREA),
79 [HWBLK_IRDA] = HWBLK(MSTPCR2, 24, CORE_AREA),
80 [HWBLK_TSIF] = HWBLK(MSTPCR2, 22, CORE_AREA),
81 [HWBLK_USB1] = HWBLK(MSTPCR2, 21, CORE_AREA),
82 [HWBLK_USB0] = HWBLK(MSTPCR2, 20, CORE_AREA),
83 [HWBLK_2DG] = HWBLK(MSTPCR2, 19, CORE_AREA_BM),
84 [HWBLK_SDHI0] = HWBLK(MSTPCR2, 18, CORE_AREA),
85 [HWBLK_SDHI1] = HWBLK(MSTPCR2, 17, CORE_AREA),
86 [HWBLK_VEU1] = HWBLK(MSTPCR2, 15, CORE_AREA_BM),
87 [HWBLK_CEU1] = HWBLK(MSTPCR2, 13, CORE_AREA_BM),
88 [HWBLK_BEU1] = HWBLK(MSTPCR2, 12, CORE_AREA_BM),
89 [HWBLK_2DDMAC] = HWBLK(MSTPCR2, 10, CORE_AREA_BM),
90 [HWBLK_SPU] = HWBLK(MSTPCR2, 9, CORE_AREA_BM),
91 [HWBLK_JPU] = HWBLK(MSTPCR2, 6, CORE_AREA_BM),
92 [HWBLK_VOU] = HWBLK(MSTPCR2, 5, CORE_AREA_BM),
93 [HWBLK_BEU0] = HWBLK(MSTPCR2, 4, CORE_AREA_BM),
94 [HWBLK_CEU0] = HWBLK(MSTPCR2, 3, CORE_AREA_BM),
95 [HWBLK_VEU0] = HWBLK(MSTPCR2, 2, CORE_AREA_BM),
96 [HWBLK_VPU] = HWBLK(MSTPCR2, 1, CORE_AREA_BM),
97 [HWBLK_LCDC] = HWBLK(MSTPCR2, 0, CORE_AREA_BM),
98};
99
100static struct hwblk_info sh7724_hwblk_info = {
101 .areas = sh7724_hwblk_area,
102 .nr_areas = ARRAY_SIZE(sh7724_hwblk_area),
103 .hwblks = sh7724_hwblk,
104 .nr_hwblks = ARRAY_SIZE(sh7724_hwblk),
105};
106
107int arch_hwblk_sleep_mode(void)
108{
109 if (!sh7724_hwblk_area[CORE_AREA].cnt[HWBLK_CNT_USAGE])
110 return SUSP_SH_STANDBY | SUSP_SH_SF;
111
112 if (!sh7724_hwblk_area[CORE_AREA_BM].cnt[HWBLK_CNT_USAGE])
113 return SUSP_SH_SLEEP | SUSP_SH_SF;
114
115 return SUSP_SH_SLEEP;
116}
117
118int __init arch_hwblk_init(void)
119{
120 return hwblk_register(&sh7724_hwblk_info);
121}
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
index 1a956b1beccc..4a9010bf4fd3 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
@@ -40,7 +40,7 @@ static struct platform_device iic_device = {
40}; 40};
41 41
42static struct r8a66597_platdata r8a66597_data = { 42static struct r8a66597_platdata r8a66597_data = {
43 /* This set zero to all members */ 43 .on_chip = 1,
44}; 44};
45 45
46static struct resource usb_host_resources[] = { 46static struct resource usb_host_resources[] = {
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
index cda76ebf87c3..35097753456c 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
@@ -13,9 +13,11 @@
13#include <linux/serial_sci.h> 13#include <linux/serial_sci.h>
14#include <linux/mm.h> 14#include <linux/mm.h>
15#include <linux/uio_driver.h> 15#include <linux/uio_driver.h>
16#include <linux/usb/m66592.h>
16#include <linux/sh_timer.h> 17#include <linux/sh_timer.h>
17#include <asm/clock.h> 18#include <asm/clock.h>
18#include <asm/mmzone.h> 19#include <asm/mmzone.h>
20#include <cpu/sh7722.h>
19 21
20static struct resource rtc_resources[] = { 22static struct resource rtc_resources[] = {
21 [0] = { 23 [0] = {
@@ -45,11 +47,18 @@ static struct platform_device rtc_device = {
45 .id = -1, 47 .id = -1,
46 .num_resources = ARRAY_SIZE(rtc_resources), 48 .num_resources = ARRAY_SIZE(rtc_resources),
47 .resource = rtc_resources, 49 .resource = rtc_resources,
50 .archdata = {
51 .hwblk_id = HWBLK_RTC,
52 },
53};
54
55static struct m66592_platdata usbf_platdata = {
56 .on_chip = 1,
48}; 57};
49 58
50static struct resource usbf_resources[] = { 59static struct resource usbf_resources[] = {
51 [0] = { 60 [0] = {
52 .name = "m66592_udc", 61 .name = "USBF",
53 .start = 0x04480000, 62 .start = 0x04480000,
54 .end = 0x044800FF, 63 .end = 0x044800FF,
55 .flags = IORESOURCE_MEM, 64 .flags = IORESOURCE_MEM,
@@ -67,9 +76,13 @@ static struct platform_device usbf_device = {
67 .dev = { 76 .dev = {
68 .dma_mask = NULL, 77 .dma_mask = NULL,
69 .coherent_dma_mask = 0xffffffff, 78 .coherent_dma_mask = 0xffffffff,
79 .platform_data = &usbf_platdata,
70 }, 80 },
71 .num_resources = ARRAY_SIZE(usbf_resources), 81 .num_resources = ARRAY_SIZE(usbf_resources),
72 .resource = usbf_resources, 82 .resource = usbf_resources,
83 .archdata = {
84 .hwblk_id = HWBLK_USBF,
85 },
73}; 86};
74 87
75static struct resource iic_resources[] = { 88static struct resource iic_resources[] = {
@@ -91,6 +104,9 @@ static struct platform_device iic_device = {
91 .id = 0, /* "i2c0" clock */ 104 .id = 0, /* "i2c0" clock */
92 .num_resources = ARRAY_SIZE(iic_resources), 105 .num_resources = ARRAY_SIZE(iic_resources),
93 .resource = iic_resources, 106 .resource = iic_resources,
107 .archdata = {
108 .hwblk_id = HWBLK_IIC,
109 },
94}; 110};
95 111
96static struct uio_info vpu_platform_data = { 112static struct uio_info vpu_platform_data = {
@@ -119,6 +135,9 @@ static struct platform_device vpu_device = {
119 }, 135 },
120 .resource = vpu_resources, 136 .resource = vpu_resources,
121 .num_resources = ARRAY_SIZE(vpu_resources), 137 .num_resources = ARRAY_SIZE(vpu_resources),
138 .archdata = {
139 .hwblk_id = HWBLK_VPU,
140 },
122}; 141};
123 142
124static struct uio_info veu_platform_data = { 143static struct uio_info veu_platform_data = {
@@ -147,6 +166,9 @@ static struct platform_device veu_device = {
147 }, 166 },
148 .resource = veu_resources, 167 .resource = veu_resources,
149 .num_resources = ARRAY_SIZE(veu_resources), 168 .num_resources = ARRAY_SIZE(veu_resources),
169 .archdata = {
170 .hwblk_id = HWBLK_VEU,
171 },
150}; 172};
151 173
152static struct uio_info jpu_platform_data = { 174static struct uio_info jpu_platform_data = {
@@ -175,6 +197,9 @@ static struct platform_device jpu_device = {
175 }, 197 },
176 .resource = jpu_resources, 198 .resource = jpu_resources,
177 .num_resources = ARRAY_SIZE(jpu_resources), 199 .num_resources = ARRAY_SIZE(jpu_resources),
200 .archdata = {
201 .hwblk_id = HWBLK_JPU,
202 },
178}; 203};
179 204
180static struct sh_timer_config cmt_platform_data = { 205static struct sh_timer_config cmt_platform_data = {
@@ -207,6 +232,9 @@ static struct platform_device cmt_device = {
207 }, 232 },
208 .resource = cmt_resources, 233 .resource = cmt_resources,
209 .num_resources = ARRAY_SIZE(cmt_resources), 234 .num_resources = ARRAY_SIZE(cmt_resources),
235 .archdata = {
236 .hwblk_id = HWBLK_CMT,
237 },
210}; 238};
211 239
212static struct sh_timer_config tmu0_platform_data = { 240static struct sh_timer_config tmu0_platform_data = {
@@ -238,6 +266,9 @@ static struct platform_device tmu0_device = {
238 }, 266 },
239 .resource = tmu0_resources, 267 .resource = tmu0_resources,
240 .num_resources = ARRAY_SIZE(tmu0_resources), 268 .num_resources = ARRAY_SIZE(tmu0_resources),
269 .archdata = {
270 .hwblk_id = HWBLK_TMU,
271 },
241}; 272};
242 273
243static struct sh_timer_config tmu1_platform_data = { 274static struct sh_timer_config tmu1_platform_data = {
@@ -269,6 +300,9 @@ static struct platform_device tmu1_device = {
269 }, 300 },
270 .resource = tmu1_resources, 301 .resource = tmu1_resources,
271 .num_resources = ARRAY_SIZE(tmu1_resources), 302 .num_resources = ARRAY_SIZE(tmu1_resources),
303 .archdata = {
304 .hwblk_id = HWBLK_TMU,
305 },
272}; 306};
273 307
274static struct sh_timer_config tmu2_platform_data = { 308static struct sh_timer_config tmu2_platform_data = {
@@ -299,6 +333,9 @@ static struct platform_device tmu2_device = {
299 }, 333 },
300 .resource = tmu2_resources, 334 .resource = tmu2_resources,
301 .num_resources = ARRAY_SIZE(tmu2_resources), 335 .num_resources = ARRAY_SIZE(tmu2_resources),
336 .archdata = {
337 .hwblk_id = HWBLK_TMU,
338 },
302}; 339};
303 340
304static struct plat_sci_port sci_platform_data[] = { 341static struct plat_sci_port sci_platform_data[] = {
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
index b45dace9539f..4caa5a7ca86e 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
@@ -18,6 +18,7 @@
18#include <linux/io.h> 18#include <linux/io.h>
19#include <asm/clock.h> 19#include <asm/clock.h>
20#include <asm/mmzone.h> 20#include <asm/mmzone.h>
21#include <cpu/sh7723.h>
21 22
22static struct uio_info vpu_platform_data = { 23static struct uio_info vpu_platform_data = {
23 .name = "VPU5", 24 .name = "VPU5",
@@ -45,6 +46,9 @@ static struct platform_device vpu_device = {
45 }, 46 },
46 .resource = vpu_resources, 47 .resource = vpu_resources,
47 .num_resources = ARRAY_SIZE(vpu_resources), 48 .num_resources = ARRAY_SIZE(vpu_resources),
49 .archdata = {
50 .hwblk_id = HWBLK_VPU,
51 },
48}; 52};
49 53
50static struct uio_info veu0_platform_data = { 54static struct uio_info veu0_platform_data = {
@@ -73,6 +77,9 @@ static struct platform_device veu0_device = {
73 }, 77 },
74 .resource = veu0_resources, 78 .resource = veu0_resources,
75 .num_resources = ARRAY_SIZE(veu0_resources), 79 .num_resources = ARRAY_SIZE(veu0_resources),
80 .archdata = {
81 .hwblk_id = HWBLK_VEU2H0,
82 },
76}; 83};
77 84
78static struct uio_info veu1_platform_data = { 85static struct uio_info veu1_platform_data = {
@@ -101,6 +108,9 @@ static struct platform_device veu1_device = {
101 }, 108 },
102 .resource = veu1_resources, 109 .resource = veu1_resources,
103 .num_resources = ARRAY_SIZE(veu1_resources), 110 .num_resources = ARRAY_SIZE(veu1_resources),
111 .archdata = {
112 .hwblk_id = HWBLK_VEU2H1,
113 },
104}; 114};
105 115
106static struct sh_timer_config cmt_platform_data = { 116static struct sh_timer_config cmt_platform_data = {
@@ -133,6 +143,9 @@ static struct platform_device cmt_device = {
133 }, 143 },
134 .resource = cmt_resources, 144 .resource = cmt_resources,
135 .num_resources = ARRAY_SIZE(cmt_resources), 145 .num_resources = ARRAY_SIZE(cmt_resources),
146 .archdata = {
147 .hwblk_id = HWBLK_CMT,
148 },
136}; 149};
137 150
138static struct sh_timer_config tmu0_platform_data = { 151static struct sh_timer_config tmu0_platform_data = {
@@ -164,6 +177,9 @@ static struct platform_device tmu0_device = {
164 }, 177 },
165 .resource = tmu0_resources, 178 .resource = tmu0_resources,
166 .num_resources = ARRAY_SIZE(tmu0_resources), 179 .num_resources = ARRAY_SIZE(tmu0_resources),
180 .archdata = {
181 .hwblk_id = HWBLK_TMU0,
182 },
167}; 183};
168 184
169static struct sh_timer_config tmu1_platform_data = { 185static struct sh_timer_config tmu1_platform_data = {
@@ -195,6 +211,9 @@ static struct platform_device tmu1_device = {
195 }, 211 },
196 .resource = tmu1_resources, 212 .resource = tmu1_resources,
197 .num_resources = ARRAY_SIZE(tmu1_resources), 213 .num_resources = ARRAY_SIZE(tmu1_resources),
214 .archdata = {
215 .hwblk_id = HWBLK_TMU0,
216 },
198}; 217};
199 218
200static struct sh_timer_config tmu2_platform_data = { 219static struct sh_timer_config tmu2_platform_data = {
@@ -225,6 +244,9 @@ static struct platform_device tmu2_device = {
225 }, 244 },
226 .resource = tmu2_resources, 245 .resource = tmu2_resources,
227 .num_resources = ARRAY_SIZE(tmu2_resources), 246 .num_resources = ARRAY_SIZE(tmu2_resources),
247 .archdata = {
248 .hwblk_id = HWBLK_TMU0,
249 },
228}; 250};
229 251
230static struct sh_timer_config tmu3_platform_data = { 252static struct sh_timer_config tmu3_platform_data = {
@@ -255,6 +277,9 @@ static struct platform_device tmu3_device = {
255 }, 277 },
256 .resource = tmu3_resources, 278 .resource = tmu3_resources,
257 .num_resources = ARRAY_SIZE(tmu3_resources), 279 .num_resources = ARRAY_SIZE(tmu3_resources),
280 .archdata = {
281 .hwblk_id = HWBLK_TMU1,
282 },
258}; 283};
259 284
260static struct sh_timer_config tmu4_platform_data = { 285static struct sh_timer_config tmu4_platform_data = {
@@ -285,6 +310,9 @@ static struct platform_device tmu4_device = {
285 }, 310 },
286 .resource = tmu4_resources, 311 .resource = tmu4_resources,
287 .num_resources = ARRAY_SIZE(tmu4_resources), 312 .num_resources = ARRAY_SIZE(tmu4_resources),
313 .archdata = {
314 .hwblk_id = HWBLK_TMU1,
315 },
288}; 316};
289 317
290static struct sh_timer_config tmu5_platform_data = { 318static struct sh_timer_config tmu5_platform_data = {
@@ -315,6 +343,9 @@ static struct platform_device tmu5_device = {
315 }, 343 },
316 .resource = tmu5_resources, 344 .resource = tmu5_resources,
317 .num_resources = ARRAY_SIZE(tmu5_resources), 345 .num_resources = ARRAY_SIZE(tmu5_resources),
346 .archdata = {
347 .hwblk_id = HWBLK_TMU1,
348 },
318}; 349};
319 350
320static struct plat_sci_port sci_platform_data[] = { 351static struct plat_sci_port sci_platform_data[] = {
@@ -395,10 +426,13 @@ static struct platform_device rtc_device = {
395 .id = -1, 426 .id = -1,
396 .num_resources = ARRAY_SIZE(rtc_resources), 427 .num_resources = ARRAY_SIZE(rtc_resources),
397 .resource = rtc_resources, 428 .resource = rtc_resources,
429 .archdata = {
430 .hwblk_id = HWBLK_RTC,
431 },
398}; 432};
399 433
400static struct r8a66597_platdata r8a66597_data = { 434static struct r8a66597_platdata r8a66597_data = {
401 /* This set zero to all members */ 435 .on_chip = 1,
402}; 436};
403 437
404static struct resource sh7723_usb_host_resources[] = { 438static struct resource sh7723_usb_host_resources[] = {
@@ -424,6 +458,9 @@ static struct platform_device sh7723_usb_host_device = {
424 }, 458 },
425 .num_resources = ARRAY_SIZE(sh7723_usb_host_resources), 459 .num_resources = ARRAY_SIZE(sh7723_usb_host_resources),
426 .resource = sh7723_usb_host_resources, 460 .resource = sh7723_usb_host_resources,
461 .archdata = {
462 .hwblk_id = HWBLK_USB,
463 },
427}; 464};
428 465
429static struct resource iic_resources[] = { 466static struct resource iic_resources[] = {
@@ -445,6 +482,9 @@ static struct platform_device iic_device = {
445 .id = 0, /* "i2c0" clock */ 482 .id = 0, /* "i2c0" clock */
446 .num_resources = ARRAY_SIZE(iic_resources), 483 .num_resources = ARRAY_SIZE(iic_resources),
447 .resource = iic_resources, 484 .resource = iic_resources,
485 .archdata = {
486 .hwblk_id = HWBLK_IIC,
487 },
448}; 488};
449 489
450static struct platform_device *sh7723_devices[] __initdata = { 490static struct platform_device *sh7723_devices[] __initdata = {
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
index a04edaab9a29..f3851fd757ec 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
@@ -22,6 +22,7 @@
22#include <linux/io.h> 22#include <linux/io.h>
23#include <asm/clock.h> 23#include <asm/clock.h>
24#include <asm/mmzone.h> 24#include <asm/mmzone.h>
25#include <cpu/sh7724.h>
25 26
26/* Serial */ 27/* Serial */
27static struct plat_sci_port sci_platform_data[] = { 28static struct plat_sci_port sci_platform_data[] = {
@@ -103,6 +104,9 @@ static struct platform_device rtc_device = {
103 .id = -1, 104 .id = -1,
104 .num_resources = ARRAY_SIZE(rtc_resources), 105 .num_resources = ARRAY_SIZE(rtc_resources),
105 .resource = rtc_resources, 106 .resource = rtc_resources,
107 .archdata = {
108 .hwblk_id = HWBLK_RTC,
109 },
106}; 110};
107 111
108/* I2C0 */ 112/* I2C0 */
@@ -125,6 +129,9 @@ static struct platform_device iic0_device = {
125 .id = 0, /* "i2c0" clock */ 129 .id = 0, /* "i2c0" clock */
126 .num_resources = ARRAY_SIZE(iic0_resources), 130 .num_resources = ARRAY_SIZE(iic0_resources),
127 .resource = iic0_resources, 131 .resource = iic0_resources,
132 .archdata = {
133 .hwblk_id = HWBLK_IIC0,
134 },
128}; 135};
129 136
130/* I2C1 */ 137/* I2C1 */
@@ -147,6 +154,9 @@ static struct platform_device iic1_device = {
147 .id = 1, /* "i2c1" clock */ 154 .id = 1, /* "i2c1" clock */
148 .num_resources = ARRAY_SIZE(iic1_resources), 155 .num_resources = ARRAY_SIZE(iic1_resources),
149 .resource = iic1_resources, 156 .resource = iic1_resources,
157 .archdata = {
158 .hwblk_id = HWBLK_IIC1,
159 },
150}; 160};
151 161
152/* VPU */ 162/* VPU */
@@ -176,6 +186,9 @@ static struct platform_device vpu_device = {
176 }, 186 },
177 .resource = vpu_resources, 187 .resource = vpu_resources,
178 .num_resources = ARRAY_SIZE(vpu_resources), 188 .num_resources = ARRAY_SIZE(vpu_resources),
189 .archdata = {
190 .hwblk_id = HWBLK_VPU,
191 },
179}; 192};
180 193
181/* VEU0 */ 194/* VEU0 */
@@ -205,6 +218,9 @@ static struct platform_device veu0_device = {
205 }, 218 },
206 .resource = veu0_resources, 219 .resource = veu0_resources,
207 .num_resources = ARRAY_SIZE(veu0_resources), 220 .num_resources = ARRAY_SIZE(veu0_resources),
221 .archdata = {
222 .hwblk_id = HWBLK_VEU0,
223 },
208}; 224};
209 225
210/* VEU1 */ 226/* VEU1 */
@@ -234,6 +250,9 @@ static struct platform_device veu1_device = {
234 }, 250 },
235 .resource = veu1_resources, 251 .resource = veu1_resources,
236 .num_resources = ARRAY_SIZE(veu1_resources), 252 .num_resources = ARRAY_SIZE(veu1_resources),
253 .archdata = {
254 .hwblk_id = HWBLK_VEU1,
255 },
237}; 256};
238 257
239static struct sh_timer_config cmt_platform_data = { 258static struct sh_timer_config cmt_platform_data = {
@@ -266,6 +285,9 @@ static struct platform_device cmt_device = {
266 }, 285 },
267 .resource = cmt_resources, 286 .resource = cmt_resources,
268 .num_resources = ARRAY_SIZE(cmt_resources), 287 .num_resources = ARRAY_SIZE(cmt_resources),
288 .archdata = {
289 .hwblk_id = HWBLK_CMT,
290 },
269}; 291};
270 292
271static struct sh_timer_config tmu0_platform_data = { 293static struct sh_timer_config tmu0_platform_data = {
@@ -297,6 +319,9 @@ static struct platform_device tmu0_device = {
297 }, 319 },
298 .resource = tmu0_resources, 320 .resource = tmu0_resources,
299 .num_resources = ARRAY_SIZE(tmu0_resources), 321 .num_resources = ARRAY_SIZE(tmu0_resources),
322 .archdata = {
323 .hwblk_id = HWBLK_TMU0,
324 },
300}; 325};
301 326
302static struct sh_timer_config tmu1_platform_data = { 327static struct sh_timer_config tmu1_platform_data = {
@@ -328,6 +353,9 @@ static struct platform_device tmu1_device = {
328 }, 353 },
329 .resource = tmu1_resources, 354 .resource = tmu1_resources,
330 .num_resources = ARRAY_SIZE(tmu1_resources), 355 .num_resources = ARRAY_SIZE(tmu1_resources),
356 .archdata = {
357 .hwblk_id = HWBLK_TMU0,
358 },
331}; 359};
332 360
333static struct sh_timer_config tmu2_platform_data = { 361static struct sh_timer_config tmu2_platform_data = {
@@ -358,6 +386,9 @@ static struct platform_device tmu2_device = {
358 }, 386 },
359 .resource = tmu2_resources, 387 .resource = tmu2_resources,
360 .num_resources = ARRAY_SIZE(tmu2_resources), 388 .num_resources = ARRAY_SIZE(tmu2_resources),
389 .archdata = {
390 .hwblk_id = HWBLK_TMU0,
391 },
361}; 392};
362 393
363 394
@@ -389,6 +420,9 @@ static struct platform_device tmu3_device = {
389 }, 420 },
390 .resource = tmu3_resources, 421 .resource = tmu3_resources,
391 .num_resources = ARRAY_SIZE(tmu3_resources), 422 .num_resources = ARRAY_SIZE(tmu3_resources),
423 .archdata = {
424 .hwblk_id = HWBLK_TMU1,
425 },
392}; 426};
393 427
394static struct sh_timer_config tmu4_platform_data = { 428static struct sh_timer_config tmu4_platform_data = {
@@ -419,6 +453,9 @@ static struct platform_device tmu4_device = {
419 }, 453 },
420 .resource = tmu4_resources, 454 .resource = tmu4_resources,
421 .num_resources = ARRAY_SIZE(tmu4_resources), 455 .num_resources = ARRAY_SIZE(tmu4_resources),
456 .archdata = {
457 .hwblk_id = HWBLK_TMU1,
458 },
422}; 459};
423 460
424static struct sh_timer_config tmu5_platform_data = { 461static struct sh_timer_config tmu5_platform_data = {
@@ -449,6 +486,9 @@ static struct platform_device tmu5_device = {
449 }, 486 },
450 .resource = tmu5_resources, 487 .resource = tmu5_resources,
451 .num_resources = ARRAY_SIZE(tmu5_resources), 488 .num_resources = ARRAY_SIZE(tmu5_resources),
489 .archdata = {
490 .hwblk_id = HWBLK_TMU1,
491 },
452}; 492};
453 493
454/* JPU */ 494/* JPU */
@@ -478,6 +518,9 @@ static struct platform_device jpu_device = {
478 }, 518 },
479 .resource = jpu_resources, 519 .resource = jpu_resources,
480 .num_resources = ARRAY_SIZE(jpu_resources), 520 .num_resources = ARRAY_SIZE(jpu_resources),
521 .archdata = {
522 .hwblk_id = HWBLK_JPU,
523 },
481}; 524};
482 525
483static struct platform_device *sh7724_devices[] __initdata = { 526static struct platform_device *sh7724_devices[] __initdata = {
diff --git a/arch/sh/kernel/cpu/shmobile/Makefile b/arch/sh/kernel/cpu/shmobile/Makefile
index 08bfa7c7db29..e8a5111e848a 100644
--- a/arch/sh/kernel/cpu/shmobile/Makefile
+++ b/arch/sh/kernel/cpu/shmobile/Makefile
@@ -4,3 +4,4 @@
4 4
5# Power Management & Sleep mode 5# Power Management & Sleep mode
6obj-$(CONFIG_PM) += pm.o sleep.o 6obj-$(CONFIG_PM) += pm.o sleep.o
7obj-$(CONFIG_CPU_IDLE) += cpuidle.o
diff --git a/arch/sh/kernel/cpu/shmobile/cpuidle.c b/arch/sh/kernel/cpu/shmobile/cpuidle.c
new file mode 100644
index 000000000000..4afdd975cc66
--- /dev/null
+++ b/arch/sh/kernel/cpu/shmobile/cpuidle.c
@@ -0,0 +1,102 @@
1/*
2 * arch/sh/kernel/cpu/shmobile/cpuidle.c
3 *
4 * Cpuidle support code for SuperH Mobile
5 *
6 * Copyright (C) 2009 Magnus Damm
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12#include <linux/init.h>
13#include <linux/kernel.h>
14#include <linux/io.h>
15#include <linux/suspend.h>
16#include <linux/cpuidle.h>
17#include <asm/suspend.h>
18#include <asm/uaccess.h>
19#include <asm/hwblk.h>
20
21static unsigned long cpuidle_mode[] = {
22 SUSP_SH_SLEEP, /* regular sleep mode */
23 SUSP_SH_SLEEP | SUSP_SH_SF, /* sleep mode + self refresh */
24};
25
26static int cpuidle_sleep_enter(struct cpuidle_device *dev,
27 struct cpuidle_state *state)
28{
29 unsigned long allowed_mode = arch_hwblk_sleep_mode();
30 ktime_t before, after;
31 int requested_state = state - &dev->states[0];
32 int allowed_state;
33 int k;
34
35 /* convert allowed mode to allowed state */
36 for (k = ARRAY_SIZE(cpuidle_mode) - 1; k > 0; k--)
37 if (cpuidle_mode[k] == allowed_mode)
38 break;
39
40 allowed_state = k;
41
42 /* take the following into account for sleep mode selection:
43 * - allowed_state: best mode allowed by hardware (clock deps)
44 * - requested_state: best mode allowed by software (latencies)
45 */
46 k = min_t(int, allowed_state, requested_state);
47
48 dev->last_state = &dev->states[k];
49 before = ktime_get();
50 sh_mobile_call_standby(cpuidle_mode[k]);
51 after = ktime_get();
52 return ktime_to_ns(ktime_sub(after, before)) >> 10;
53}
54
55static struct cpuidle_device cpuidle_dev;
56static struct cpuidle_driver cpuidle_driver = {
57 .name = "sh_idle",
58 .owner = THIS_MODULE,
59};
60
61void sh_mobile_setup_cpuidle(void)
62{
63 struct cpuidle_device *dev = &cpuidle_dev;
64 struct cpuidle_state *state;
65 int i;
66
67 cpuidle_register_driver(&cpuidle_driver);
68
69 for (i = 0; i < CPUIDLE_STATE_MAX; i++) {
70 dev->states[i].name[0] = '\0';
71 dev->states[i].desc[0] = '\0';
72 }
73
74 i = CPUIDLE_DRIVER_STATE_START;
75
76 state = &dev->states[i++];
77 snprintf(state->name, CPUIDLE_NAME_LEN, "C0");
78 strncpy(state->desc, "SuperH Sleep Mode", CPUIDLE_DESC_LEN);
79 state->exit_latency = 1;
80 state->target_residency = 1 * 2;
81 state->power_usage = 3;
82 state->flags = 0;
83 state->flags |= CPUIDLE_FLAG_SHALLOW;
84 state->flags |= CPUIDLE_FLAG_TIME_VALID;
85 state->enter = cpuidle_sleep_enter;
86
87 dev->safe_state = state;
88
89 state = &dev->states[i++];
90 snprintf(state->name, CPUIDLE_NAME_LEN, "C1");
91 strncpy(state->desc, "SuperH Sleep Mode [SF]", CPUIDLE_DESC_LEN);
92 state->exit_latency = 100;
93 state->target_residency = 1 * 2;
94 state->power_usage = 1;
95 state->flags = 0;
96 state->flags |= CPUIDLE_FLAG_TIME_VALID;
97 state->enter = cpuidle_sleep_enter;
98
99 dev->state_count = i;
100
101 cpuidle_register_device(dev);
102}
diff --git a/arch/sh/kernel/cpu/shmobile/pm.c b/arch/sh/kernel/cpu/shmobile/pm.c
index 8c067adf6830..de078d24ce56 100644
--- a/arch/sh/kernel/cpu/shmobile/pm.c
+++ b/arch/sh/kernel/cpu/shmobile/pm.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * arch/sh/kernel/cpu/sh4a/pm-sh_mobile.c 2 * arch/sh/kernel/cpu/shmobile/pm.c
3 * 3 *
4 * Power management support code for SuperH Mobile 4 * Power management support code for SuperH Mobile
5 * 5 *
@@ -32,20 +32,17 @@
32 * 32 *
33 * R-standby mode is unsupported, but will be added in the future 33 * R-standby mode is unsupported, but will be added in the future
34 * U-standby mode is low priority since it needs bootloader hacks 34 * U-standby mode is low priority since it needs bootloader hacks
35 *
36 * All modes should be tied in with cpuidle. But before that can
37 * happen we need to keep track of enabled hardware blocks so we
38 * can avoid entering sleep modes that stop clocks to hardware
39 * blocks that are in use even though the cpu core is idle.
40 */ 35 */
41 36
37#define ILRAM_BASE 0xe5200000
38
42extern const unsigned char sh_mobile_standby[]; 39extern const unsigned char sh_mobile_standby[];
43extern const unsigned int sh_mobile_standby_size; 40extern const unsigned int sh_mobile_standby_size;
44 41
45static void sh_mobile_call_standby(unsigned long mode) 42void sh_mobile_call_standby(unsigned long mode)
46{ 43{
47 extern void *vbr_base; 44 extern void *vbr_base;
48 void *onchip_mem = (void *)0xe5200000; /* ILRAM */ 45 void *onchip_mem = (void *)ILRAM_BASE;
49 void (*standby_onchip_mem)(unsigned long) = onchip_mem; 46 void (*standby_onchip_mem)(unsigned long) = onchip_mem;
50 47
51 /* Note: Wake up from sleep may generate exceptions! 48 /* Note: Wake up from sleep may generate exceptions!
@@ -55,11 +52,6 @@ static void sh_mobile_call_standby(unsigned long mode)
55 if (mode & SUSP_SH_SF) 52 if (mode & SUSP_SH_SF)
56 asm volatile("ldc %0, vbr" : : "r" (onchip_mem) : "memory"); 53 asm volatile("ldc %0, vbr" : : "r" (onchip_mem) : "memory");
57 54
58 /* Copy the assembly snippet to the otherwise ununsed ILRAM */
59 memcpy(onchip_mem, sh_mobile_standby, sh_mobile_standby_size);
60 wmb();
61 ctrl_barrier();
62
63 /* Let assembly snippet in on-chip memory handle the rest */ 55 /* Let assembly snippet in on-chip memory handle the rest */
64 standby_onchip_mem(mode); 56 standby_onchip_mem(mode);
65 57
@@ -85,7 +77,15 @@ static struct platform_suspend_ops sh_pm_ops = {
85 77
86static int __init sh_pm_init(void) 78static int __init sh_pm_init(void)
87{ 79{
80 void *onchip_mem = (void *)ILRAM_BASE;
81
82 /* Copy the assembly snippet to the otherwise ununsed ILRAM */
83 memcpy(onchip_mem, sh_mobile_standby, sh_mobile_standby_size);
84 wmb();
85 ctrl_barrier();
86
88 suspend_set_ops(&sh_pm_ops); 87 suspend_set_ops(&sh_pm_ops);
88 sh_mobile_setup_cpuidle();
89 return 0; 89 return 0;
90} 90}
91 91
diff --git a/arch/sh/kernel/dumpstack.c b/arch/sh/kernel/dumpstack.c
new file mode 100644
index 000000000000..6f5ad1513409
--- /dev/null
+++ b/arch/sh/kernel/dumpstack.c
@@ -0,0 +1,123 @@
1/*
2 * Copyright (C) 1991, 1992 Linus Torvalds
3 * Copyright (C) 2000, 2001, 2002 Andi Kleen, SuSE Labs
4 * Copyright (C) 2009 Matt Fleming
5 */
6#include <linux/kallsyms.h>
7#include <linux/ftrace.h>
8#include <linux/debug_locks.h>
9#include <asm/unwinder.h>
10#include <asm/stacktrace.h>
11
12void printk_address(unsigned long address, int reliable)
13{
14 printk(" [<%p>] %s%pS\n", (void *) address,
15 reliable ? "" : "? ", (void *) address);
16}
17
18#ifdef CONFIG_FUNCTION_GRAPH_TRACER
19static void
20print_ftrace_graph_addr(unsigned long addr, void *data,
21 const struct stacktrace_ops *ops,
22 struct thread_info *tinfo, int *graph)
23{
24 struct task_struct *task = tinfo->task;
25 unsigned long ret_addr;
26 int index = task->curr_ret_stack;
27
28 if (addr != (unsigned long)return_to_handler)
29 return;
30
31 if (!task->ret_stack || index < *graph)
32 return;
33
34 index -= *graph;
35 ret_addr = task->ret_stack[index].ret;
36
37 ops->address(data, ret_addr, 1);
38
39 (*graph)++;
40}
41#else
42static inline void
43print_ftrace_graph_addr(unsigned long addr, void *data,
44 const struct stacktrace_ops *ops,
45 struct thread_info *tinfo, int *graph)
46{ }
47#endif
48
49void
50stack_reader_dump(struct task_struct *task, struct pt_regs *regs,
51 unsigned long *sp, const struct stacktrace_ops *ops,
52 void *data)
53{
54 struct thread_info *context;
55 int graph = 0;
56
57 context = (struct thread_info *)
58 ((unsigned long)sp & (~(THREAD_SIZE - 1)));
59
60 while (!kstack_end(sp)) {
61 unsigned long addr = *sp++;
62
63 if (__kernel_text_address(addr)) {
64 ops->address(data, addr, 1);
65
66 print_ftrace_graph_addr(addr, data, ops,
67 context, &graph);
68 }
69 }
70}
71
72static void
73print_trace_warning_symbol(void *data, char *msg, unsigned long symbol)
74{
75 printk(data);
76 print_symbol(msg, symbol);
77 printk("\n");
78}
79
80static void print_trace_warning(void *data, char *msg)
81{
82 printk("%s%s\n", (char *)data, msg);
83}
84
85static int print_trace_stack(void *data, char *name)
86{
87 printk("%s <%s> ", (char *)data, name);
88 return 0;
89}
90
91/*
92 * Print one address/symbol entries per line.
93 */
94static void print_trace_address(void *data, unsigned long addr, int reliable)
95{
96 printk(data);
97 printk_address(addr, reliable);
98}
99
100static const struct stacktrace_ops print_trace_ops = {
101 .warning = print_trace_warning,
102 .warning_symbol = print_trace_warning_symbol,
103 .stack = print_trace_stack,
104 .address = print_trace_address,
105};
106
107void show_trace(struct task_struct *tsk, unsigned long *sp,
108 struct pt_regs *regs)
109{
110 if (regs && user_mode(regs))
111 return;
112
113 printk("\nCall trace:\n");
114
115 unwind_stack(tsk, regs, sp, &print_trace_ops, "");
116
117 printk("\n");
118
119 if (!tsk)
120 tsk = current;
121
122 debug_show_held_locks(tsk);
123}
diff --git a/arch/sh/kernel/dwarf.c b/arch/sh/kernel/dwarf.c
new file mode 100644
index 000000000000..c6c5764a8ab1
--- /dev/null
+++ b/arch/sh/kernel/dwarf.c
@@ -0,0 +1,902 @@
1/*
2 * Copyright (C) 2009 Matt Fleming <matt@console-pimps.org>
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * This is an implementation of a DWARF unwinder. Its main purpose is
9 * for generating stacktrace information. Based on the DWARF 3
10 * specification from http://www.dwarfstd.org.
11 *
12 * TODO:
13 * - DWARF64 doesn't work.
14 */
15
16/* #define DEBUG */
17#include <linux/kernel.h>
18#include <linux/io.h>
19#include <linux/list.h>
20#include <linux/mm.h>
21#include <asm/dwarf.h>
22#include <asm/unwinder.h>
23#include <asm/sections.h>
24#include <asm/unaligned.h>
25#include <asm/dwarf.h>
26#include <asm/stacktrace.h>
27
28static LIST_HEAD(dwarf_cie_list);
29DEFINE_SPINLOCK(dwarf_cie_lock);
30
31static LIST_HEAD(dwarf_fde_list);
32DEFINE_SPINLOCK(dwarf_fde_lock);
33
34static struct dwarf_cie *cached_cie;
35
36/*
37 * Figure out whether we need to allocate some dwarf registers. If dwarf
38 * registers have already been allocated then we may need to realloc
39 * them. "reg" is a register number that we need to be able to access
40 * after this call.
41 *
42 * Register numbers start at zero, therefore we need to allocate space
43 * for "reg" + 1 registers.
44 */
45static void dwarf_frame_alloc_regs(struct dwarf_frame *frame,
46 unsigned int reg)
47{
48 struct dwarf_reg *regs;
49 unsigned int num_regs = reg + 1;
50 size_t new_size;
51 size_t old_size;
52
53 new_size = num_regs * sizeof(*regs);
54 old_size = frame->num_regs * sizeof(*regs);
55
56 /* Fast path: don't allocate any regs if we've already got enough. */
57 if (frame->num_regs >= num_regs)
58 return;
59
60 regs = kzalloc(new_size, GFP_ATOMIC);
61 if (!regs) {
62 printk(KERN_WARNING "Unable to allocate DWARF registers\n");
63 /*
64 * Let's just bomb hard here, we have no way to
65 * gracefully recover.
66 */
67 BUG();
68 }
69
70 if (frame->regs) {
71 memcpy(regs, frame->regs, old_size);
72 kfree(frame->regs);
73 }
74
75 frame->regs = regs;
76 frame->num_regs = num_regs;
77}
78
79/**
80 * dwarf_read_addr - read dwarf data
81 * @src: source address of data
82 * @dst: destination address to store the data to
83 *
84 * Read 'n' bytes from @src, where 'n' is the size of an address on
85 * the native machine. We return the number of bytes read, which
86 * should always be 'n'. We also have to be careful when reading
87 * from @src and writing to @dst, because they can be arbitrarily
88 * aligned. Return 'n' - the number of bytes read.
89 */
90static inline int dwarf_read_addr(unsigned long *src, unsigned long *dst)
91{
92 u32 val = get_unaligned(src);
93 put_unaligned(val, dst);
94 return sizeof(unsigned long *);
95}
96
97/**
98 * dwarf_read_uleb128 - read unsigned LEB128 data
99 * @addr: the address where the ULEB128 data is stored
100 * @ret: address to store the result
101 *
102 * Decode an unsigned LEB128 encoded datum. The algorithm is taken
103 * from Appendix C of the DWARF 3 spec. For information on the
104 * encodings refer to section "7.6 - Variable Length Data". Return
105 * the number of bytes read.
106 */
107static inline unsigned long dwarf_read_uleb128(char *addr, unsigned int *ret)
108{
109 unsigned int result;
110 unsigned char byte;
111 int shift, count;
112
113 result = 0;
114 shift = 0;
115 count = 0;
116
117 while (1) {
118 byte = __raw_readb(addr);
119 addr++;
120 count++;
121
122 result |= (byte & 0x7f) << shift;
123 shift += 7;
124
125 if (!(byte & 0x80))
126 break;
127 }
128
129 *ret = result;
130
131 return count;
132}
133
134/**
135 * dwarf_read_leb128 - read signed LEB128 data
136 * @addr: the address of the LEB128 encoded data
137 * @ret: address to store the result
138 *
139 * Decode signed LEB128 data. The algorithm is taken from Appendix
140 * C of the DWARF 3 spec. Return the number of bytes read.
141 */
142static inline unsigned long dwarf_read_leb128(char *addr, int *ret)
143{
144 unsigned char byte;
145 int result, shift;
146 int num_bits;
147 int count;
148
149 result = 0;
150 shift = 0;
151 count = 0;
152
153 while (1) {
154 byte = __raw_readb(addr);
155 addr++;
156 result |= (byte & 0x7f) << shift;
157 shift += 7;
158 count++;
159
160 if (!(byte & 0x80))
161 break;
162 }
163
164 /* The number of bits in a signed integer. */
165 num_bits = 8 * sizeof(result);
166
167 if ((shift < num_bits) && (byte & 0x40))
168 result |= (-1 << shift);
169
170 *ret = result;
171
172 return count;
173}
174
175/**
176 * dwarf_read_encoded_value - return the decoded value at @addr
177 * @addr: the address of the encoded value
178 * @val: where to write the decoded value
179 * @encoding: the encoding with which we can decode @addr
180 *
181 * GCC emits encoded address in the .eh_frame FDE entries. Decode
182 * the value at @addr using @encoding. The decoded value is written
183 * to @val and the number of bytes read is returned.
184 */
185static int dwarf_read_encoded_value(char *addr, unsigned long *val,
186 char encoding)
187{
188 unsigned long decoded_addr = 0;
189 int count = 0;
190
191 switch (encoding & 0x70) {
192 case DW_EH_PE_absptr:
193 break;
194 case DW_EH_PE_pcrel:
195 decoded_addr = (unsigned long)addr;
196 break;
197 default:
198 pr_debug("encoding=0x%x\n", (encoding & 0x70));
199 BUG();
200 }
201
202 if ((encoding & 0x07) == 0x00)
203 encoding |= DW_EH_PE_udata4;
204
205 switch (encoding & 0x0f) {
206 case DW_EH_PE_sdata4:
207 case DW_EH_PE_udata4:
208 count += 4;
209 decoded_addr += get_unaligned((u32 *)addr);
210 __raw_writel(decoded_addr, val);
211 break;
212 default:
213 pr_debug("encoding=0x%x\n", encoding);
214 BUG();
215 }
216
217 return count;
218}
219
220/**
221 * dwarf_entry_len - return the length of an FDE or CIE
222 * @addr: the address of the entry
223 * @len: the length of the entry
224 *
225 * Read the initial_length field of the entry and store the size of
226 * the entry in @len. We return the number of bytes read. Return a
227 * count of 0 on error.
228 */
229static inline int dwarf_entry_len(char *addr, unsigned long *len)
230{
231 u32 initial_len;
232 int count;
233
234 initial_len = get_unaligned((u32 *)addr);
235 count = 4;
236
237 /*
238 * An initial length field value in the range DW_LEN_EXT_LO -
239 * DW_LEN_EXT_HI indicates an extension, and should not be
240 * interpreted as a length. The only extension that we currently
241 * understand is the use of DWARF64 addresses.
242 */
243 if (initial_len >= DW_EXT_LO && initial_len <= DW_EXT_HI) {
244 /*
245 * The 64-bit length field immediately follows the
246 * compulsory 32-bit length field.
247 */
248 if (initial_len == DW_EXT_DWARF64) {
249 *len = get_unaligned((u64 *)addr + 4);
250 count = 12;
251 } else {
252 printk(KERN_WARNING "Unknown DWARF extension\n");
253 count = 0;
254 }
255 } else
256 *len = initial_len;
257
258 return count;
259}
260
261/**
262 * dwarf_lookup_cie - locate the cie
263 * @cie_ptr: pointer to help with lookup
264 */
265static struct dwarf_cie *dwarf_lookup_cie(unsigned long cie_ptr)
266{
267 struct dwarf_cie *cie, *n;
268 unsigned long flags;
269
270 spin_lock_irqsave(&dwarf_cie_lock, flags);
271
272 /*
273 * We've cached the last CIE we looked up because chances are
274 * that the FDE wants this CIE.
275 */
276 if (cached_cie && cached_cie->cie_pointer == cie_ptr) {
277 cie = cached_cie;
278 goto out;
279 }
280
281 list_for_each_entry_safe(cie, n, &dwarf_cie_list, link) {
282 if (cie->cie_pointer == cie_ptr) {
283 cached_cie = cie;
284 break;
285 }
286 }
287
288 /* Couldn't find the entry in the list. */
289 if (&cie->link == &dwarf_cie_list)
290 cie = NULL;
291out:
292 spin_unlock_irqrestore(&dwarf_cie_lock, flags);
293 return cie;
294}
295
296/**
297 * dwarf_lookup_fde - locate the FDE that covers pc
298 * @pc: the program counter
299 */
300struct dwarf_fde *dwarf_lookup_fde(unsigned long pc)
301{
302 unsigned long flags;
303 struct dwarf_fde *fde, *n;
304
305 spin_lock_irqsave(&dwarf_fde_lock, flags);
306 list_for_each_entry_safe(fde, n, &dwarf_fde_list, link) {
307 unsigned long start, end;
308
309 start = fde->initial_location;
310 end = fde->initial_location + fde->address_range;
311
312 if (pc >= start && pc < end)
313 break;
314 }
315
316 /* Couldn't find the entry in the list. */
317 if (&fde->link == &dwarf_fde_list)
318 fde = NULL;
319
320 spin_unlock_irqrestore(&dwarf_fde_lock, flags);
321
322 return fde;
323}
324
325/**
326 * dwarf_cfa_execute_insns - execute instructions to calculate a CFA
327 * @insn_start: address of the first instruction
328 * @insn_end: address of the last instruction
329 * @cie: the CIE for this function
330 * @fde: the FDE for this function
331 * @frame: the instructions calculate the CFA for this frame
332 * @pc: the program counter of the address we're interested in
333 * @define_ra: keep executing insns until the return addr reg is defined?
334 *
335 * Execute the Call Frame instruction sequence starting at
336 * @insn_start and ending at @insn_end. The instructions describe
337 * how to calculate the Canonical Frame Address of a stackframe.
338 * Store the results in @frame.
339 */
340static int dwarf_cfa_execute_insns(unsigned char *insn_start,
341 unsigned char *insn_end,
342 struct dwarf_cie *cie,
343 struct dwarf_fde *fde,
344 struct dwarf_frame *frame,
345 unsigned long pc,
346 bool define_ra)
347{
348 unsigned char insn;
349 unsigned char *current_insn;
350 unsigned int count, delta, reg, expr_len, offset;
351 bool seen_ra_reg;
352
353 current_insn = insn_start;
354
355 /*
356 * If we're executing instructions for the dwarf_unwind_stack()
357 * FDE we need to keep executing instructions until the value of
358 * DWARF_ARCH_RA_REG is defined. See the comment in
359 * dwarf_unwind_stack() for more details.
360 */
361 if (define_ra)
362 seen_ra_reg = false;
363 else
364 seen_ra_reg = true;
365
366 while (current_insn < insn_end && (frame->pc <= pc || !seen_ra_reg) ) {
367 insn = __raw_readb(current_insn++);
368
369 if (!seen_ra_reg) {
370 if (frame->num_regs >= DWARF_ARCH_RA_REG &&
371 frame->regs[DWARF_ARCH_RA_REG].flags)
372 seen_ra_reg = true;
373 }
374
375 /*
376 * Firstly, handle the opcodes that embed their operands
377 * in the instructions.
378 */
379 switch (DW_CFA_opcode(insn)) {
380 case DW_CFA_advance_loc:
381 delta = DW_CFA_operand(insn);
382 delta *= cie->code_alignment_factor;
383 frame->pc += delta;
384 continue;
385 /* NOTREACHED */
386 case DW_CFA_offset:
387 reg = DW_CFA_operand(insn);
388 count = dwarf_read_uleb128(current_insn, &offset);
389 current_insn += count;
390 offset *= cie->data_alignment_factor;
391 dwarf_frame_alloc_regs(frame, reg);
392 frame->regs[reg].addr = offset;
393 frame->regs[reg].flags |= DWARF_REG_OFFSET;
394 continue;
395 /* NOTREACHED */
396 case DW_CFA_restore:
397 reg = DW_CFA_operand(insn);
398 continue;
399 /* NOTREACHED */
400 }
401
402 /*
403 * Secondly, handle the opcodes that don't embed their
404 * operands in the instruction.
405 */
406 switch (insn) {
407 case DW_CFA_nop:
408 continue;
409 case DW_CFA_advance_loc1:
410 delta = *current_insn++;
411 frame->pc += delta * cie->code_alignment_factor;
412 break;
413 case DW_CFA_advance_loc2:
414 delta = get_unaligned((u16 *)current_insn);
415 current_insn += 2;
416 frame->pc += delta * cie->code_alignment_factor;
417 break;
418 case DW_CFA_advance_loc4:
419 delta = get_unaligned((u32 *)current_insn);
420 current_insn += 4;
421 frame->pc += delta * cie->code_alignment_factor;
422 break;
423 case DW_CFA_offset_extended:
424 count = dwarf_read_uleb128(current_insn, &reg);
425 current_insn += count;
426 count = dwarf_read_uleb128(current_insn, &offset);
427 current_insn += count;
428 offset *= cie->data_alignment_factor;
429 break;
430 case DW_CFA_restore_extended:
431 count = dwarf_read_uleb128(current_insn, &reg);
432 current_insn += count;
433 break;
434 case DW_CFA_undefined:
435 count = dwarf_read_uleb128(current_insn, &reg);
436 current_insn += count;
437 break;
438 case DW_CFA_def_cfa:
439 count = dwarf_read_uleb128(current_insn,
440 &frame->cfa_register);
441 current_insn += count;
442 count = dwarf_read_uleb128(current_insn,
443 &frame->cfa_offset);
444 current_insn += count;
445
446 frame->flags |= DWARF_FRAME_CFA_REG_OFFSET;
447 break;
448 case DW_CFA_def_cfa_register:
449 count = dwarf_read_uleb128(current_insn,
450 &frame->cfa_register);
451 current_insn += count;
452 frame->cfa_offset = 0;
453 frame->flags |= DWARF_FRAME_CFA_REG_OFFSET;
454 break;
455 case DW_CFA_def_cfa_offset:
456 count = dwarf_read_uleb128(current_insn, &offset);
457 current_insn += count;
458 frame->cfa_offset = offset;
459 break;
460 case DW_CFA_def_cfa_expression:
461 count = dwarf_read_uleb128(current_insn, &expr_len);
462 current_insn += count;
463
464 frame->cfa_expr = current_insn;
465 frame->cfa_expr_len = expr_len;
466 current_insn += expr_len;
467
468 frame->flags |= DWARF_FRAME_CFA_REG_EXP;
469 break;
470 case DW_CFA_offset_extended_sf:
471 count = dwarf_read_uleb128(current_insn, &reg);
472 current_insn += count;
473 count = dwarf_read_leb128(current_insn, &offset);
474 current_insn += count;
475 offset *= cie->data_alignment_factor;
476 dwarf_frame_alloc_regs(frame, reg);
477 frame->regs[reg].flags |= DWARF_REG_OFFSET;
478 frame->regs[reg].addr = offset;
479 break;
480 case DW_CFA_val_offset:
481 count = dwarf_read_uleb128(current_insn, &reg);
482 current_insn += count;
483 count = dwarf_read_leb128(current_insn, &offset);
484 offset *= cie->data_alignment_factor;
485 frame->regs[reg].flags |= DWARF_REG_OFFSET;
486 frame->regs[reg].addr = offset;
487 break;
488 default:
489 pr_debug("unhandled DWARF instruction 0x%x\n", insn);
490 break;
491 }
492 }
493
494 return 0;
495}
496
497/**
498 * dwarf_unwind_stack - recursively unwind the stack
499 * @pc: address of the function to unwind
500 * @prev: struct dwarf_frame of the previous stackframe on the callstack
501 *
502 * Return a struct dwarf_frame representing the most recent frame
503 * on the callstack. Each of the lower (older) stack frames are
504 * linked via the "prev" member.
505 */
506struct dwarf_frame *dwarf_unwind_stack(unsigned long pc,
507 struct dwarf_frame *prev)
508{
509 struct dwarf_frame *frame;
510 struct dwarf_cie *cie;
511 struct dwarf_fde *fde;
512 unsigned long addr;
513 int i, offset;
514 bool define_ra = false;
515
516 /*
517 * If this is the first invocation of this recursive function we
518 * need get the contents of a physical register to get the CFA
519 * in order to begin the virtual unwinding of the stack.
520 *
521 * Setting "define_ra" to true indictates that we want
522 * dwarf_cfa_execute_insns() to continue executing instructions
523 * until we know how to calculate the value of DWARF_ARCH_RA_REG
524 * (which we need in order to kick off the whole unwinding
525 * process).
526 *
527 * NOTE: the return address is guaranteed to be setup by the
528 * time this function makes its first function call.
529 */
530 if (!pc && !prev) {
531 pc = (unsigned long)&dwarf_unwind_stack;
532 define_ra = true;
533 }
534
535 frame = kzalloc(sizeof(*frame), GFP_ATOMIC);
536 if (!frame)
537 return NULL;
538
539 frame->prev = prev;
540
541 fde = dwarf_lookup_fde(pc);
542 if (!fde) {
543 /*
544 * This is our normal exit path - the one that stops the
545 * recursion. There's two reasons why we might exit
546 * here,
547 *
548 * a) pc has no asscociated DWARF frame info and so
549 * we don't know how to unwind this frame. This is
550 * usually the case when we're trying to unwind a
551 * frame that was called from some assembly code
552 * that has no DWARF info, e.g. syscalls.
553 *
554 * b) the DEBUG info for pc is bogus. There's
555 * really no way to distinguish this case from the
556 * case above, which sucks because we could print a
557 * warning here.
558 */
559 return NULL;
560 }
561
562 cie = dwarf_lookup_cie(fde->cie_pointer);
563
564 frame->pc = fde->initial_location;
565
566 /* CIE initial instructions */
567 dwarf_cfa_execute_insns(cie->initial_instructions,
568 cie->instructions_end, cie, fde,
569 frame, pc, false);
570
571 /* FDE instructions */
572 dwarf_cfa_execute_insns(fde->instructions, fde->end, cie,
573 fde, frame, pc, define_ra);
574
575 /* Calculate the CFA */
576 switch (frame->flags) {
577 case DWARF_FRAME_CFA_REG_OFFSET:
578 if (prev) {
579 BUG_ON(!prev->regs[frame->cfa_register].flags);
580
581 addr = prev->cfa;
582 addr += prev->regs[frame->cfa_register].addr;
583 frame->cfa = __raw_readl(addr);
584
585 } else {
586 /*
587 * Again, this is the first invocation of this
588 * recurisve function. We need to physically
589 * read the contents of a register in order to
590 * get the Canonical Frame Address for this
591 * function.
592 */
593 frame->cfa = dwarf_read_arch_reg(frame->cfa_register);
594 }
595
596 frame->cfa += frame->cfa_offset;
597 break;
598 default:
599 BUG();
600 }
601
602 /* If we haven't seen the return address reg, we're screwed. */
603 BUG_ON(!frame->regs[DWARF_ARCH_RA_REG].flags);
604
605 for (i = 0; i <= frame->num_regs; i++) {
606 struct dwarf_reg *reg = &frame->regs[i];
607
608 if (!reg->flags)
609 continue;
610
611 offset = reg->addr;
612 offset += frame->cfa;
613 }
614
615 addr = frame->cfa + frame->regs[DWARF_ARCH_RA_REG].addr;
616 frame->return_addr = __raw_readl(addr);
617
618 frame->next = dwarf_unwind_stack(frame->return_addr, frame);
619 return frame;
620}
621
622static int dwarf_parse_cie(void *entry, void *p, unsigned long len,
623 unsigned char *end)
624{
625 struct dwarf_cie *cie;
626 unsigned long flags;
627 int count;
628
629 cie = kzalloc(sizeof(*cie), GFP_KERNEL);
630 if (!cie)
631 return -ENOMEM;
632
633 cie->length = len;
634
635 /*
636 * Record the offset into the .eh_frame section
637 * for this CIE. It allows this CIE to be
638 * quickly and easily looked up from the
639 * corresponding FDE.
640 */
641 cie->cie_pointer = (unsigned long)entry;
642
643 cie->version = *(char *)p++;
644 BUG_ON(cie->version != 1);
645
646 cie->augmentation = p;
647 p += strlen(cie->augmentation) + 1;
648
649 count = dwarf_read_uleb128(p, &cie->code_alignment_factor);
650 p += count;
651
652 count = dwarf_read_leb128(p, &cie->data_alignment_factor);
653 p += count;
654
655 /*
656 * Which column in the rule table contains the
657 * return address?
658 */
659 if (cie->version == 1) {
660 cie->return_address_reg = __raw_readb(p);
661 p++;
662 } else {
663 count = dwarf_read_uleb128(p, &cie->return_address_reg);
664 p += count;
665 }
666
667 if (cie->augmentation[0] == 'z') {
668 unsigned int length, count;
669 cie->flags |= DWARF_CIE_Z_AUGMENTATION;
670
671 count = dwarf_read_uleb128(p, &length);
672 p += count;
673
674 BUG_ON((unsigned char *)p > end);
675
676 cie->initial_instructions = p + length;
677 cie->augmentation++;
678 }
679
680 while (*cie->augmentation) {
681 /*
682 * "L" indicates a byte showing how the
683 * LSDA pointer is encoded. Skip it.
684 */
685 if (*cie->augmentation == 'L') {
686 p++;
687 cie->augmentation++;
688 } else if (*cie->augmentation == 'R') {
689 /*
690 * "R" indicates a byte showing
691 * how FDE addresses are
692 * encoded.
693 */
694 cie->encoding = *(char *)p++;
695 cie->augmentation++;
696 } else if (*cie->augmentation == 'P') {
697 /*
698 * "R" indicates a personality
699 * routine in the CIE
700 * augmentation.
701 */
702 BUG();
703 } else if (*cie->augmentation == 'S') {
704 BUG();
705 } else {
706 /*
707 * Unknown augmentation. Assume
708 * 'z' augmentation.
709 */
710 p = cie->initial_instructions;
711 BUG_ON(!p);
712 break;
713 }
714 }
715
716 cie->initial_instructions = p;
717 cie->instructions_end = end;
718
719 /* Add to list */
720 spin_lock_irqsave(&dwarf_cie_lock, flags);
721 list_add_tail(&cie->link, &dwarf_cie_list);
722 spin_unlock_irqrestore(&dwarf_cie_lock, flags);
723
724 return 0;
725}
726
727static int dwarf_parse_fde(void *entry, u32 entry_type,
728 void *start, unsigned long len)
729{
730 struct dwarf_fde *fde;
731 struct dwarf_cie *cie;
732 unsigned long flags;
733 int count;
734 void *p = start;
735
736 fde = kzalloc(sizeof(*fde), GFP_KERNEL);
737 if (!fde)
738 return -ENOMEM;
739
740 fde->length = len;
741
742 /*
743 * In a .eh_frame section the CIE pointer is the
744 * delta between the address within the FDE
745 */
746 fde->cie_pointer = (unsigned long)(p - entry_type - 4);
747
748 cie = dwarf_lookup_cie(fde->cie_pointer);
749 fde->cie = cie;
750
751 if (cie->encoding)
752 count = dwarf_read_encoded_value(p, &fde->initial_location,
753 cie->encoding);
754 else
755 count = dwarf_read_addr(p, &fde->initial_location);
756
757 p += count;
758
759 if (cie->encoding)
760 count = dwarf_read_encoded_value(p, &fde->address_range,
761 cie->encoding & 0x0f);
762 else
763 count = dwarf_read_addr(p, &fde->address_range);
764
765 p += count;
766
767 if (fde->cie->flags & DWARF_CIE_Z_AUGMENTATION) {
768 unsigned int length;
769 count = dwarf_read_uleb128(p, &length);
770 p += count + length;
771 }
772
773 /* Call frame instructions. */
774 fde->instructions = p;
775 fde->end = start + len;
776
777 /* Add to list. */
778 spin_lock_irqsave(&dwarf_fde_lock, flags);
779 list_add_tail(&fde->link, &dwarf_fde_list);
780 spin_unlock_irqrestore(&dwarf_fde_lock, flags);
781
782 return 0;
783}
784
785static void dwarf_unwinder_dump(struct task_struct *task, struct pt_regs *regs,
786 unsigned long *sp,
787 const struct stacktrace_ops *ops, void *data)
788{
789 struct dwarf_frame *frame;
790
791 frame = dwarf_unwind_stack(0, NULL);
792
793 while (frame && frame->return_addr) {
794 ops->address(data, frame->return_addr, 1);
795 frame = frame->next;
796 }
797}
798
799static struct unwinder dwarf_unwinder = {
800 .name = "dwarf-unwinder",
801 .dump = dwarf_unwinder_dump,
802 .rating = 150,
803};
804
805static void dwarf_unwinder_cleanup(void)
806{
807 struct dwarf_cie *cie, *m;
808 struct dwarf_fde *fde, *n;
809 unsigned long flags;
810
811 /*
812 * Deallocate all the memory allocated for the DWARF unwinder.
813 * Traverse all the FDE/CIE lists and remove and free all the
814 * memory associated with those data structures.
815 */
816 spin_lock_irqsave(&dwarf_cie_lock, flags);
817 list_for_each_entry_safe(cie, m, &dwarf_cie_list, link)
818 kfree(cie);
819 spin_unlock_irqrestore(&dwarf_cie_lock, flags);
820
821 spin_lock_irqsave(&dwarf_fde_lock, flags);
822 list_for_each_entry_safe(fde, n, &dwarf_fde_list, link)
823 kfree(fde);
824 spin_unlock_irqrestore(&dwarf_fde_lock, flags);
825}
826
827/**
828 * dwarf_unwinder_init - initialise the dwarf unwinder
829 *
830 * Build the data structures describing the .dwarf_frame section to
831 * make it easier to lookup CIE and FDE entries. Because the
832 * .eh_frame section is packed as tightly as possible it is not
833 * easy to lookup the FDE for a given PC, so we build a list of FDE
834 * and CIE entries that make it easier.
835 */
836void dwarf_unwinder_init(void)
837{
838 u32 entry_type;
839 void *p, *entry;
840 int count, err;
841 unsigned long len;
842 unsigned int c_entries, f_entries;
843 unsigned char *end;
844 INIT_LIST_HEAD(&dwarf_cie_list);
845 INIT_LIST_HEAD(&dwarf_fde_list);
846
847 c_entries = 0;
848 f_entries = 0;
849 entry = &__start_eh_frame;
850
851 while ((char *)entry < __stop_eh_frame) {
852 p = entry;
853
854 count = dwarf_entry_len(p, &len);
855 if (count == 0) {
856 /*
857 * We read a bogus length field value. There is
858 * nothing we can do here apart from disabling
859 * the DWARF unwinder. We can't even skip this
860 * entry and move to the next one because 'len'
861 * tells us where our next entry is.
862 */
863 goto out;
864 } else
865 p += count;
866
867 /* initial length does not include itself */
868 end = p + len;
869
870 entry_type = get_unaligned((u32 *)p);
871 p += 4;
872
873 if (entry_type == DW_EH_FRAME_CIE) {
874 err = dwarf_parse_cie(entry, p, len, end);
875 if (err < 0)
876 goto out;
877 else
878 c_entries++;
879 } else {
880 err = dwarf_parse_fde(entry, entry_type, p, len);
881 if (err < 0)
882 goto out;
883 else
884 f_entries++;
885 }
886
887 entry = (char *)entry + len + 4;
888 }
889
890 printk(KERN_INFO "DWARF unwinder initialised: read %u CIEs, %u FDEs\n",
891 c_entries, f_entries);
892
893 err = unwinder_register(&dwarf_unwinder);
894 if (err)
895 goto out;
896
897 return;
898
899out:
900 printk(KERN_ERR "Failed to initialise DWARF unwinder: %d\n", err);
901 dwarf_unwinder_cleanup();
902}
diff --git a/arch/sh/kernel/early_printk.c b/arch/sh/kernel/early_printk.c
index a952dcf9999d..81a46145ffa5 100644
--- a/arch/sh/kernel/early_printk.c
+++ b/arch/sh/kernel/early_printk.c
@@ -134,7 +134,7 @@ static void scif_sercon_init(char *s)
134 sci_out(&scif_port, SCFCR, 0x0030); /* TTRG=b'11 */ 134 sci_out(&scif_port, SCFCR, 0x0030); /* TTRG=b'11 */
135 sci_out(&scif_port, SCSCR, 0x0030); /* TE, RE */ 135 sci_out(&scif_port, SCSCR, 0x0030); /* TE, RE */
136} 136}
137#elif defined(CONFIG_CPU_SH4) 137#elif defined(CONFIG_CPU_SH4) || defined(CONFIG_CPU_SH3)
138#define DEFAULT_BAUD 115200 138#define DEFAULT_BAUD 115200
139/* 139/*
140 * Simple SCIF init, primarily aimed at SH7750 and other similar SH-4 140 * Simple SCIF init, primarily aimed at SH7750 and other similar SH-4
@@ -220,8 +220,7 @@ static int __init setup_early_printk(char *buf)
220 early_console = &scif_console; 220 early_console = &scif_console;
221 221
222#if !defined(CONFIG_SH_STANDARD_BIOS) 222#if !defined(CONFIG_SH_STANDARD_BIOS)
223#if defined(CONFIG_CPU_SH4) || defined(CONFIG_CPU_SUBTYPE_SH7720) || \ 223#if defined(CONFIG_CPU_SH4) || defined(CONFIG_CPU_SH3)
224 defined(CONFIG_CPU_SUBTYPE_SH7721)
225 scif_sercon_init(buf + 6); 224 scif_sercon_init(buf + 6);
226#endif 225#endif
227#endif 226#endif
diff --git a/arch/sh/kernel/entry-common.S b/arch/sh/kernel/entry-common.S
index d62359cfbbe2..e63178fefb9b 100644
--- a/arch/sh/kernel/entry-common.S
+++ b/arch/sh/kernel/entry-common.S
@@ -43,9 +43,10 @@
43 * syscall # 43 * syscall #
44 * 44 *
45 */ 45 */
46#include <asm/dwarf.h>
46 47
47#if defined(CONFIG_PREEMPT) 48#if defined(CONFIG_PREEMPT)
48# define preempt_stop() cli 49# define preempt_stop() cli ; TRACE_IRQS_OFF
49#else 50#else
50# define preempt_stop() 51# define preempt_stop()
51# define resume_kernel __restore_all 52# define resume_kernel __restore_all
@@ -55,11 +56,7 @@
55 .align 2 56 .align 2
56ENTRY(exception_error) 57ENTRY(exception_error)
57 ! 58 !
58#ifdef CONFIG_TRACE_IRQFLAGS 59 TRACE_IRQS_ON
59 mov.l 2f, r0
60 jsr @r0
61 nop
62#endif
63 sti 60 sti
64 mov.l 1f, r0 61 mov.l 1f, r0
65 jmp @r0 62 jmp @r0
@@ -67,22 +64,28 @@ ENTRY(exception_error)
67 64
68 .align 2 65 .align 2
691: .long do_exception_error 661: .long do_exception_error
70#ifdef CONFIG_TRACE_IRQFLAGS
712: .long trace_hardirqs_on
72#endif
73 67
74 .align 2 68 .align 2
75ret_from_exception: 69ret_from_exception:
70 CFI_STARTPROC simple
71 CFI_DEF_CFA r14, 0
72 CFI_REL_OFFSET 17, 64
73 CFI_REL_OFFSET 15, 0
74 CFI_REL_OFFSET 14, 56
76 preempt_stop() 75 preempt_stop()
77#ifdef CONFIG_TRACE_IRQFLAGS
78 mov.l 4f, r0
79 jsr @r0
80 nop
81#endif
82ENTRY(ret_from_irq) 76ENTRY(ret_from_irq)
83 ! 77 !
84 mov #OFF_SR, r0 78 mov #OFF_SR, r0
85 mov.l @(r0,r15), r0 ! get status register 79 mov.l @(r0,r15), r0 ! get status register
80
81 shlr2 r0
82 and #0x3c, r0
83 cmp/eq #0x3c, r0
84 bt 9f
85 TRACE_IRQS_ON
869:
87 mov #OFF_SR, r0
88 mov.l @(r0,r15), r0 ! get status register
86 shll r0 89 shll r0
87 shll r0 ! kernel space? 90 shll r0 ! kernel space?
88 get_current_thread_info r8, r0 91 get_current_thread_info r8, r0
@@ -125,13 +128,9 @@ noresched:
125ENTRY(resume_userspace) 128ENTRY(resume_userspace)
126 ! r8: current_thread_info 129 ! r8: current_thread_info
127 cli 130 cli
128#ifdef CONFIG_TRACE_IRQFLAGS 131 TRACE_IRQS_OfF
129 mov.l 5f, r0
130 jsr @r0
131 nop
132#endif
133 mov.l @(TI_FLAGS,r8), r0 ! current_thread_info->flags 132 mov.l @(TI_FLAGS,r8), r0 ! current_thread_info->flags
134 tst #_TIF_WORK_MASK, r0 133 tst #(_TIF_WORK_MASK & 0xff), r0
135 bt/s __restore_all 134 bt/s __restore_all
136 tst #_TIF_NEED_RESCHED, r0 135 tst #_TIF_NEED_RESCHED, r0
137 136
@@ -156,14 +155,10 @@ work_resched:
156 jsr @r1 ! schedule 155 jsr @r1 ! schedule
157 nop 156 nop
158 cli 157 cli
159#ifdef CONFIG_TRACE_IRQFLAGS 158 TRACE_IRQS_OFF
160 mov.l 5f, r0
161 jsr @r0
162 nop
163#endif
164 ! 159 !
165 mov.l @(TI_FLAGS,r8), r0 ! current_thread_info->flags 160 mov.l @(TI_FLAGS,r8), r0 ! current_thread_info->flags
166 tst #_TIF_WORK_MASK, r0 161 tst #(_TIF_WORK_MASK & 0xff), r0
167 bt __restore_all 162 bt __restore_all
168 bra work_pending 163 bra work_pending
169 tst #_TIF_NEED_RESCHED, r0 164 tst #_TIF_NEED_RESCHED, r0
@@ -172,23 +167,15 @@ work_resched:
1721: .long schedule 1671: .long schedule
1732: .long do_notify_resume 1682: .long do_notify_resume
1743: .long resume_userspace 1693: .long resume_userspace
175#ifdef CONFIG_TRACE_IRQFLAGS
1764: .long trace_hardirqs_on
1775: .long trace_hardirqs_off
178#endif
179 170
180 .align 2 171 .align 2
181syscall_exit_work: 172syscall_exit_work:
182 ! r0: current_thread_info->flags 173 ! r0: current_thread_info->flags
183 ! r8: current_thread_info 174 ! r8: current_thread_info
184 tst #_TIF_WORK_SYSCALL_MASK, r0 175 tst #(_TIF_WORK_SYSCALL_MASK & 0xff), r0
185 bt/s work_pending 176 bt/s work_pending
186 tst #_TIF_NEED_RESCHED, r0 177 tst #_TIF_NEED_RESCHED, r0
187#ifdef CONFIG_TRACE_IRQFLAGS 178 TRACE_IRQS_ON
188 mov.l 5f, r0
189 jsr @r0
190 nop
191#endif
192 sti 179 sti
193 mov r15, r4 180 mov r15, r4
194 mov.l 8f, r0 ! do_syscall_trace_leave 181 mov.l 8f, r0 ! do_syscall_trace_leave
@@ -259,6 +246,7 @@ debug_trap:
259 nop 246 nop
260 bra __restore_all 247 bra __restore_all
261 nop 248 nop
249 CFI_ENDPROC
262 250
263 .align 2 251 .align 2
2641: .long debug_trap_table 2521: .long debug_trap_table
@@ -304,6 +292,7 @@ ret_from_fork:
304 * system calls and debug traps through their respective jump tables. 292 * system calls and debug traps through their respective jump tables.
305 */ 293 */
306ENTRY(system_call) 294ENTRY(system_call)
295 setup_frame_reg
307#if !defined(CONFIG_CPU_SH2) 296#if !defined(CONFIG_CPU_SH2)
308 mov.l 1f, r9 297 mov.l 1f, r9
309 mov.l @r9, r8 ! Read from TRA (Trap Address) Register 298 mov.l @r9, r8 ! Read from TRA (Trap Address) Register
@@ -321,18 +310,18 @@ ENTRY(system_call)
321 bt/s debug_trap ! it's a debug trap.. 310 bt/s debug_trap ! it's a debug trap..
322 nop 311 nop
323 312
324#ifdef CONFIG_TRACE_IRQFLAGS 313 TRACE_IRQS_ON
325 mov.l 5f, r10
326 jsr @r10
327 nop
328#endif
329 sti 314 sti
330 315
331 ! 316 !
332 get_current_thread_info r8, r10 317 get_current_thread_info r8, r10
333 mov.l @(TI_FLAGS,r8), r8 318 mov.l @(TI_FLAGS,r8), r8
334 mov #_TIF_WORK_SYSCALL_MASK, r10 319 mov #(_TIF_WORK_SYSCALL_MASK & 0xff), r10
320 mov #(_TIF_WORK_SYSCALL_MASK >> 8), r9
335 tst r10, r8 321 tst r10, r8
322 shll8 r9
323 bf syscall_trace_entry
324 tst r9, r8
336 bf syscall_trace_entry 325 bf syscall_trace_entry
337 ! 326 !
338 mov.l 2f, r8 ! Number of syscalls 327 mov.l 2f, r8 ! Number of syscalls
@@ -351,15 +340,15 @@ syscall_call:
351 ! 340 !
352syscall_exit: 341syscall_exit:
353 cli 342 cli
354#ifdef CONFIG_TRACE_IRQFLAGS 343 TRACE_IRQS_OFF
355 mov.l 6f, r0
356 jsr @r0
357 nop
358#endif
359 ! 344 !
360 get_current_thread_info r8, r0 345 get_current_thread_info r8, r0
361 mov.l @(TI_FLAGS,r8), r0 ! current_thread_info->flags 346 mov.l @(TI_FLAGS,r8), r0 ! current_thread_info->flags
362 tst #_TIF_ALLWORK_MASK, r0 347 tst #(_TIF_ALLWORK_MASK & 0xff), r0
348 mov #(_TIF_ALLWORK_MASK >> 8), r1
349 bf syscall_exit_work
350 shlr8 r0
351 tst r0, r1
363 bf syscall_exit_work 352 bf syscall_exit_work
364 bra __restore_all 353 bra __restore_all
365 nop 354 nop
@@ -369,9 +358,5 @@ syscall_exit:
369#endif 358#endif
3702: .long NR_syscalls 3592: .long NR_syscalls
3713: .long sys_call_table 3603: .long sys_call_table
372#ifdef CONFIG_TRACE_IRQFLAGS
3735: .long trace_hardirqs_on
3746: .long trace_hardirqs_off
375#endif
3767: .long do_syscall_trace_enter 3617: .long do_syscall_trace_enter
3778: .long do_syscall_trace_leave 3628: .long do_syscall_trace_leave
diff --git a/arch/sh/kernel/ftrace.c b/arch/sh/kernel/ftrace.c
index 066f37dc32a9..6647dfcb781d 100644
--- a/arch/sh/kernel/ftrace.c
+++ b/arch/sh/kernel/ftrace.c
@@ -16,9 +16,13 @@
16#include <linux/string.h> 16#include <linux/string.h>
17#include <linux/init.h> 17#include <linux/init.h>
18#include <linux/io.h> 18#include <linux/io.h>
19#include <linux/kernel.h>
19#include <asm/ftrace.h> 20#include <asm/ftrace.h>
20#include <asm/cacheflush.h> 21#include <asm/cacheflush.h>
22#include <asm/unistd.h>
23#include <trace/syscall.h>
21 24
25#ifdef CONFIG_DYNAMIC_FTRACE
22static unsigned char ftrace_replaced_code[MCOUNT_INSN_SIZE]; 26static unsigned char ftrace_replaced_code[MCOUNT_INSN_SIZE];
23 27
24static unsigned char ftrace_nop[4]; 28static unsigned char ftrace_nop[4];
@@ -131,3 +135,189 @@ int __init ftrace_dyn_arch_init(void *data)
131 135
132 return 0; 136 return 0;
133} 137}
138#endif /* CONFIG_DYNAMIC_FTRACE */
139
140#ifdef CONFIG_FUNCTION_GRAPH_TRACER
141#ifdef CONFIG_DYNAMIC_FTRACE
142extern void ftrace_graph_call(void);
143
144static int ftrace_mod(unsigned long ip, unsigned long old_addr,
145 unsigned long new_addr)
146{
147 unsigned char code[MCOUNT_INSN_SIZE];
148
149 if (probe_kernel_read(code, (void *)ip, MCOUNT_INSN_SIZE))
150 return -EFAULT;
151
152 if (old_addr != __raw_readl((unsigned long *)code))
153 return -EINVAL;
154
155 __raw_writel(new_addr, ip);
156 return 0;
157}
158
159int ftrace_enable_ftrace_graph_caller(void)
160{
161 unsigned long ip, old_addr, new_addr;
162
163 ip = (unsigned long)(&ftrace_graph_call) + GRAPH_INSN_OFFSET;
164 old_addr = (unsigned long)(&skip_trace);
165 new_addr = (unsigned long)(&ftrace_graph_caller);
166
167 return ftrace_mod(ip, old_addr, new_addr);
168}
169
170int ftrace_disable_ftrace_graph_caller(void)
171{
172 unsigned long ip, old_addr, new_addr;
173
174 ip = (unsigned long)(&ftrace_graph_call) + GRAPH_INSN_OFFSET;
175 old_addr = (unsigned long)(&ftrace_graph_caller);
176 new_addr = (unsigned long)(&skip_trace);
177
178 return ftrace_mod(ip, old_addr, new_addr);
179}
180#endif /* CONFIG_DYNAMIC_FTRACE */
181
182/*
183 * Hook the return address and push it in the stack of return addrs
184 * in the current thread info.
185 *
186 * This is the main routine for the function graph tracer. The function
187 * graph tracer essentially works like this:
188 *
189 * parent is the stack address containing self_addr's return address.
190 * We pull the real return address out of parent and store it in
191 * current's ret_stack. Then, we replace the return address on the stack
192 * with the address of return_to_handler. self_addr is the function that
193 * called mcount.
194 *
195 * When self_addr returns, it will jump to return_to_handler which calls
196 * ftrace_return_to_handler. ftrace_return_to_handler will pull the real
197 * return address off of current's ret_stack and jump to it.
198 */
199void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr)
200{
201 unsigned long old;
202 int faulted, err;
203 struct ftrace_graph_ent trace;
204 unsigned long return_hooker = (unsigned long)&return_to_handler;
205
206 if (unlikely(atomic_read(&current->tracing_graph_pause)))
207 return;
208
209 /*
210 * Protect against fault, even if it shouldn't
211 * happen. This tool is too much intrusive to
212 * ignore such a protection.
213 */
214 __asm__ __volatile__(
215 "1: \n\t"
216 "mov.l @%2, %0 \n\t"
217 "2: \n\t"
218 "mov.l %3, @%2 \n\t"
219 "mov #0, %1 \n\t"
220 "3: \n\t"
221 ".section .fixup, \"ax\" \n\t"
222 "4: \n\t"
223 "mov.l 5f, %0 \n\t"
224 "jmp @%0 \n\t"
225 " mov #1, %1 \n\t"
226 ".balign 4 \n\t"
227 "5: .long 3b \n\t"
228 ".previous \n\t"
229 ".section __ex_table,\"a\" \n\t"
230 ".long 1b, 4b \n\t"
231 ".long 2b, 4b \n\t"
232 ".previous \n\t"
233 : "=&r" (old), "=r" (faulted)
234 : "r" (parent), "r" (return_hooker)
235 );
236
237 if (unlikely(faulted)) {
238 ftrace_graph_stop();
239 WARN_ON(1);
240 return;
241 }
242
243 err = ftrace_push_return_trace(old, self_addr, &trace.depth, 0);
244 if (err == -EBUSY) {
245 __raw_writel(old, parent);
246 return;
247 }
248
249 trace.func = self_addr;
250
251 /* Only trace if the calling function expects to */
252 if (!ftrace_graph_entry(&trace)) {
253 current->curr_ret_stack--;
254 __raw_writel(old, parent);
255 }
256}
257#endif /* CONFIG_FUNCTION_GRAPH_TRACER */
258
259#ifdef CONFIG_FTRACE_SYSCALLS
260
261extern unsigned long __start_syscalls_metadata[];
262extern unsigned long __stop_syscalls_metadata[];
263extern unsigned long *sys_call_table;
264
265static struct syscall_metadata **syscalls_metadata;
266
267static struct syscall_metadata *find_syscall_meta(unsigned long *syscall)
268{
269 struct syscall_metadata *start;
270 struct syscall_metadata *stop;
271 char str[KSYM_SYMBOL_LEN];
272
273
274 start = (struct syscall_metadata *)__start_syscalls_metadata;
275 stop = (struct syscall_metadata *)__stop_syscalls_metadata;
276 kallsyms_lookup((unsigned long) syscall, NULL, NULL, NULL, str);
277
278 for ( ; start < stop; start++) {
279 if (start->name && !strcmp(start->name, str))
280 return start;
281 }
282
283 return NULL;
284}
285
286#define FTRACE_SYSCALL_MAX (NR_syscalls - 1)
287
288struct syscall_metadata *syscall_nr_to_meta(int nr)
289{
290 if (!syscalls_metadata || nr >= FTRACE_SYSCALL_MAX || nr < 0)
291 return NULL;
292
293 return syscalls_metadata[nr];
294}
295
296void arch_init_ftrace_syscalls(void)
297{
298 int i;
299 struct syscall_metadata *meta;
300 unsigned long **psys_syscall_table = &sys_call_table;
301 static atomic_t refs;
302
303 if (atomic_inc_return(&refs) != 1)
304 goto end;
305
306 syscalls_metadata = kzalloc(sizeof(*syscalls_metadata) *
307 FTRACE_SYSCALL_MAX, GFP_KERNEL);
308 if (!syscalls_metadata) {
309 WARN_ON(1);
310 return;
311 }
312
313 for (i = 0; i < FTRACE_SYSCALL_MAX; i++) {
314 meta = find_syscall_meta(psys_syscall_table[i]);
315 syscalls_metadata[i] = meta;
316 }
317 return;
318
319 /* Paranoid: avoid overflow */
320end:
321 atomic_dec(&refs);
322}
323#endif /* CONFIG_FTRACE_SYSCALLS */
diff --git a/arch/sh/kernel/io_trapped.c b/arch/sh/kernel/io_trapped.c
index 77dfecb64373..e27a19e1f46e 100644
--- a/arch/sh/kernel/io_trapped.c
+++ b/arch/sh/kernel/io_trapped.c
@@ -112,14 +112,15 @@ void __iomem *match_trapped_io_handler(struct list_head *list,
112 struct trapped_io *tiop; 112 struct trapped_io *tiop;
113 struct resource *res; 113 struct resource *res;
114 int k, len; 114 int k, len;
115 unsigned long flags;
115 116
116 spin_lock_irq(&trapped_lock); 117 spin_lock_irqsave(&trapped_lock, flags);
117 list_for_each_entry(tiop, list, list) { 118 list_for_each_entry(tiop, list, list) {
118 voffs = 0; 119 voffs = 0;
119 for (k = 0; k < tiop->num_resources; k++) { 120 for (k = 0; k < tiop->num_resources; k++) {
120 res = tiop->resource + k; 121 res = tiop->resource + k;
121 if (res->start == offset) { 122 if (res->start == offset) {
122 spin_unlock_irq(&trapped_lock); 123 spin_unlock_irqrestore(&trapped_lock, flags);
123 return tiop->virt_base + voffs; 124 return tiop->virt_base + voffs;
124 } 125 }
125 126
@@ -127,7 +128,7 @@ void __iomem *match_trapped_io_handler(struct list_head *list,
127 voffs += roundup(len, PAGE_SIZE); 128 voffs += roundup(len, PAGE_SIZE);
128 } 129 }
129 } 130 }
130 spin_unlock_irq(&trapped_lock); 131 spin_unlock_irqrestore(&trapped_lock, flags);
131 return NULL; 132 return NULL;
132} 133}
133EXPORT_SYMBOL_GPL(match_trapped_io_handler); 134EXPORT_SYMBOL_GPL(match_trapped_io_handler);
diff --git a/arch/sh/kernel/irq.c b/arch/sh/kernel/irq.c
index 3d09062f4682..2bb43dc74f22 100644
--- a/arch/sh/kernel/irq.c
+++ b/arch/sh/kernel/irq.c
@@ -14,6 +14,7 @@
14#include <asm/processor.h> 14#include <asm/processor.h>
15#include <asm/machvec.h> 15#include <asm/machvec.h>
16#include <asm/uaccess.h> 16#include <asm/uaccess.h>
17#include <asm/dwarf.h>
17#include <asm/thread_info.h> 18#include <asm/thread_info.h>
18#include <cpu/mmu_context.h> 19#include <cpu/mmu_context.h>
19 20
@@ -114,23 +115,6 @@ asmlinkage int do_IRQ(unsigned int irq, struct pt_regs *regs)
114#endif 115#endif
115 116
116 irq_enter(); 117 irq_enter();
117
118#ifdef CONFIG_DEBUG_STACKOVERFLOW
119 /* Debugging check for stack overflow: is there less than 1KB free? */
120 {
121 long sp;
122
123 __asm__ __volatile__ ("and r15, %0" :
124 "=r" (sp) : "0" (THREAD_SIZE - 1));
125
126 if (unlikely(sp < (sizeof(struct thread_info) + STACK_WARN))) {
127 printk("do_IRQ: stack overflow: %ld\n",
128 sp - sizeof(struct thread_info));
129 dump_stack();
130 }
131 }
132#endif
133
134 irq = irq_demux(intc_evt2irq(irq)); 118 irq = irq_demux(intc_evt2irq(irq));
135 119
136#ifdef CONFIG_IRQSTACKS 120#ifdef CONFIG_IRQSTACKS
@@ -278,6 +262,9 @@ void __init init_IRQ(void)
278 sh_mv.mv_init_irq(); 262 sh_mv.mv_init_irq();
279 263
280 irq_ctx_init(smp_processor_id()); 264 irq_ctx_init(smp_processor_id());
265
266 /* This needs to be early, but not too early.. */
267 dwarf_unwinder_init();
281} 268}
282 269
283#ifdef CONFIG_SPARSE_IRQ 270#ifdef CONFIG_SPARSE_IRQ
diff --git a/arch/sh/kernel/process_32.c b/arch/sh/kernel/process_32.c
index 92d7740faab1..9fee977f176b 100644
--- a/arch/sh/kernel/process_32.c
+++ b/arch/sh/kernel/process_32.c
@@ -23,6 +23,7 @@
23#include <linux/tick.h> 23#include <linux/tick.h>
24#include <linux/reboot.h> 24#include <linux/reboot.h>
25#include <linux/fs.h> 25#include <linux/fs.h>
26#include <linux/ftrace.h>
26#include <linux/preempt.h> 27#include <linux/preempt.h>
27#include <asm/uaccess.h> 28#include <asm/uaccess.h>
28#include <asm/mmu_context.h> 29#include <asm/mmu_context.h>
@@ -264,8 +265,8 @@ static void ubc_set_tracing(int asid, unsigned long pc)
264 * switch_to(x,y) should switch tasks from x to y. 265 * switch_to(x,y) should switch tasks from x to y.
265 * 266 *
266 */ 267 */
267struct task_struct *__switch_to(struct task_struct *prev, 268__notrace_funcgraph struct task_struct *
268 struct task_struct *next) 269__switch_to(struct task_struct *prev, struct task_struct *next)
269{ 270{
270#if defined(CONFIG_SH_FPU) 271#if defined(CONFIG_SH_FPU)
271 unlazy_fpu(prev, task_pt_regs(prev)); 272 unlazy_fpu(prev, task_pt_regs(prev));
diff --git a/arch/sh/kernel/ptrace_32.c b/arch/sh/kernel/ptrace_32.c
index 3392e835a374..c198eceaee94 100644
--- a/arch/sh/kernel/ptrace_32.c
+++ b/arch/sh/kernel/ptrace_32.c
@@ -34,6 +34,8 @@
34#include <asm/syscalls.h> 34#include <asm/syscalls.h>
35#include <asm/fpu.h> 35#include <asm/fpu.h>
36 36
37#include <trace/syscall.h>
38
37/* 39/*
38 * This routine will get a word off of the process kernel stack. 40 * This routine will get a word off of the process kernel stack.
39 */ 41 */
@@ -459,6 +461,9 @@ asmlinkage long do_syscall_trace_enter(struct pt_regs *regs)
459 */ 461 */
460 ret = -1L; 462 ret = -1L;
461 463
464 if (unlikely(test_thread_flag(TIF_SYSCALL_FTRACE)))
465 ftrace_syscall_enter(regs);
466
462 if (unlikely(current->audit_context)) 467 if (unlikely(current->audit_context))
463 audit_syscall_entry(audit_arch(), regs->regs[3], 468 audit_syscall_entry(audit_arch(), regs->regs[3],
464 regs->regs[4], regs->regs[5], 469 regs->regs[4], regs->regs[5],
@@ -475,6 +480,9 @@ asmlinkage void do_syscall_trace_leave(struct pt_regs *regs)
475 audit_syscall_exit(AUDITSC_RESULT(regs->regs[0]), 480 audit_syscall_exit(AUDITSC_RESULT(regs->regs[0]),
476 regs->regs[0]); 481 regs->regs[0]);
477 482
483 if (unlikely(test_thread_flag(TIF_SYSCALL_FTRACE)))
484 ftrace_syscall_exit(regs);
485
478 step = test_thread_flag(TIF_SINGLESTEP); 486 step = test_thread_flag(TIF_SINGLESTEP);
479 if (step || test_thread_flag(TIF_SYSCALL_TRACE)) 487 if (step || test_thread_flag(TIF_SYSCALL_TRACE))
480 tracehook_report_syscall_exit(regs, step); 488 tracehook_report_syscall_exit(regs, step);
diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c
index dd38338553ef..ceb409bf7741 100644
--- a/arch/sh/kernel/setup.c
+++ b/arch/sh/kernel/setup.c
@@ -30,6 +30,7 @@
30#include <linux/clk.h> 30#include <linux/clk.h>
31#include <linux/delay.h> 31#include <linux/delay.h>
32#include <linux/platform_device.h> 32#include <linux/platform_device.h>
33#include <linux/lmb.h>
33#include <asm/uaccess.h> 34#include <asm/uaccess.h>
34#include <asm/io.h> 35#include <asm/io.h>
35#include <asm/page.h> 36#include <asm/page.h>
@@ -233,39 +234,45 @@ void __init __add_active_range(unsigned int nid, unsigned long start_pfn,
233void __init setup_bootmem_allocator(unsigned long free_pfn) 234void __init setup_bootmem_allocator(unsigned long free_pfn)
234{ 235{
235 unsigned long bootmap_size; 236 unsigned long bootmap_size;
237 unsigned long bootmap_pages, bootmem_paddr;
238 u64 total_pages = (lmb_end_of_DRAM() - __MEMORY_START) >> PAGE_SHIFT;
239 int i;
240
241 bootmap_pages = bootmem_bootmap_pages(total_pages);
242
243 bootmem_paddr = lmb_alloc(bootmap_pages << PAGE_SHIFT, PAGE_SIZE);
236 244
237 /* 245 /*
238 * Find a proper area for the bootmem bitmap. After this 246 * Find a proper area for the bootmem bitmap. After this
239 * bootstrap step all allocations (until the page allocator 247 * bootstrap step all allocations (until the page allocator
240 * is intact) must be done via bootmem_alloc(). 248 * is intact) must be done via bootmem_alloc().
241 */ 249 */
242 bootmap_size = init_bootmem_node(NODE_DATA(0), free_pfn, 250 bootmap_size = init_bootmem_node(NODE_DATA(0),
251 bootmem_paddr >> PAGE_SHIFT,
243 min_low_pfn, max_low_pfn); 252 min_low_pfn, max_low_pfn);
244 253
245 __add_active_range(0, min_low_pfn, max_low_pfn); 254 /* Add active regions with valid PFNs. */
246 register_bootmem_low_pages(); 255 for (i = 0; i < lmb.memory.cnt; i++) {
247 256 unsigned long start_pfn, end_pfn;
248 node_set_online(0); 257 start_pfn = lmb.memory.region[i].base >> PAGE_SHIFT;
258 end_pfn = start_pfn + lmb_size_pages(&lmb.memory, i);
259 __add_active_range(0, start_pfn, end_pfn);
260 }
249 261
250 /* 262 /*
251 * Reserve the kernel text and 263 * Add all physical memory to the bootmem map and mark each
252 * Reserve the bootmem bitmap. We do this in two steps (first step 264 * area as present.
253 * was init_bootmem()), because this catches the (definitely buggy)
254 * case of us accidentally initializing the bootmem allocator with
255 * an invalid RAM area.
256 */ 265 */
257 reserve_bootmem(__MEMORY_START + CONFIG_ZERO_PAGE_OFFSET, 266 register_bootmem_low_pages();
258 (PFN_PHYS(free_pfn) + bootmap_size + PAGE_SIZE - 1) -
259 (__MEMORY_START + CONFIG_ZERO_PAGE_OFFSET),
260 BOOTMEM_DEFAULT);
261 267
262 /* 268 /* Reserve the sections we're already using. */
263 * Reserve physical pages below CONFIG_ZERO_PAGE_OFFSET. 269 for (i = 0; i < lmb.reserved.cnt; i++)
264 */ 270 reserve_bootmem(lmb.reserved.region[i].base,
265 if (CONFIG_ZERO_PAGE_OFFSET != 0) 271 lmb_size_bytes(&lmb.reserved, i),
266 reserve_bootmem(__MEMORY_START, CONFIG_ZERO_PAGE_OFFSET,
267 BOOTMEM_DEFAULT); 272 BOOTMEM_DEFAULT);
268 273
274 node_set_online(0);
275
269 sparse_memory_present_with_active_regions(0); 276 sparse_memory_present_with_active_regions(0);
270 277
271#ifdef CONFIG_BLK_DEV_INITRD 278#ifdef CONFIG_BLK_DEV_INITRD
@@ -296,12 +303,37 @@ void __init setup_bootmem_allocator(unsigned long free_pfn)
296static void __init setup_memory(void) 303static void __init setup_memory(void)
297{ 304{
298 unsigned long start_pfn; 305 unsigned long start_pfn;
306 u64 base = min_low_pfn << PAGE_SHIFT;
307 u64 size = (max_low_pfn << PAGE_SHIFT) - base;
299 308
300 /* 309 /*
301 * Partially used pages are not usable - thus 310 * Partially used pages are not usable - thus
302 * we are rounding upwards: 311 * we are rounding upwards:
303 */ 312 */
304 start_pfn = PFN_UP(__pa(_end)); 313 start_pfn = PFN_UP(__pa(_end));
314
315 lmb_add(base, size);
316
317 /*
318 * Reserve the kernel text and
319 * Reserve the bootmem bitmap. We do this in two steps (first step
320 * was init_bootmem()), because this catches the (definitely buggy)
321 * case of us accidentally initializing the bootmem allocator with
322 * an invalid RAM area.
323 */
324 lmb_reserve(__MEMORY_START + CONFIG_ZERO_PAGE_OFFSET,
325 (PFN_PHYS(start_pfn) + PAGE_SIZE - 1) -
326 (__MEMORY_START + CONFIG_ZERO_PAGE_OFFSET));
327
328 /*
329 * Reserve physical pages below CONFIG_ZERO_PAGE_OFFSET.
330 */
331 if (CONFIG_ZERO_PAGE_OFFSET != 0)
332 lmb_reserve(__MEMORY_START, CONFIG_ZERO_PAGE_OFFSET);
333
334 lmb_analyze();
335 lmb_dump_all();
336
305 setup_bootmem_allocator(start_pfn); 337 setup_bootmem_allocator(start_pfn);
306} 338}
307#else 339#else
@@ -402,6 +434,7 @@ void __init setup_arch(char **cmdline_p)
402 nodes_clear(node_online_map); 434 nodes_clear(node_online_map);
403 435
404 /* Setup bootmem with available RAM */ 436 /* Setup bootmem with available RAM */
437 lmb_init();
405 setup_memory(); 438 setup_memory();
406 sparse_init(); 439 sparse_init();
407 440
diff --git a/arch/sh/kernel/sh_ksyms_32.c b/arch/sh/kernel/sh_ksyms_32.c
index fcc5de31f83b..cec610888e28 100644
--- a/arch/sh/kernel/sh_ksyms_32.c
+++ b/arch/sh/kernel/sh_ksyms_32.c
@@ -106,8 +106,8 @@ EXPORT_SYMBOL(flush_dcache_page);
106EXPORT_SYMBOL(clear_user_page); 106EXPORT_SYMBOL(clear_user_page);
107#endif 107#endif
108 108
109#ifdef CONFIG_FUNCTION_TRACER 109#ifdef CONFIG_MCOUNT
110EXPORT_SYMBOL(mcount); 110DECLARE_EXPORT(mcount);
111#endif 111#endif
112EXPORT_SYMBOL(csum_partial); 112EXPORT_SYMBOL(csum_partial);
113EXPORT_SYMBOL(csum_partial_copy_generic); 113EXPORT_SYMBOL(csum_partial_copy_generic);
diff --git a/arch/sh/kernel/stacktrace.c b/arch/sh/kernel/stacktrace.c
index 1a2a5eb76e41..c2e45c48409c 100644
--- a/arch/sh/kernel/stacktrace.c
+++ b/arch/sh/kernel/stacktrace.c
@@ -13,47 +13,93 @@
13#include <linux/stacktrace.h> 13#include <linux/stacktrace.h>
14#include <linux/thread_info.h> 14#include <linux/thread_info.h>
15#include <linux/module.h> 15#include <linux/module.h>
16#include <asm/unwinder.h>
16#include <asm/ptrace.h> 17#include <asm/ptrace.h>
18#include <asm/stacktrace.h>
19
20static void save_stack_warning(void *data, char *msg)
21{
22}
23
24static void
25save_stack_warning_symbol(void *data, char *msg, unsigned long symbol)
26{
27}
28
29static int save_stack_stack(void *data, char *name)
30{
31 return 0;
32}
17 33
18/* 34/*
19 * Save stack-backtrace addresses into a stack_trace buffer. 35 * Save stack-backtrace addresses into a stack_trace buffer.
20 */ 36 */
37static void save_stack_address(void *data, unsigned long addr, int reliable)
38{
39 struct stack_trace *trace = data;
40
41 if (!reliable)
42 return;
43
44 if (trace->skip > 0) {
45 trace->skip--;
46 return;
47 }
48
49 if (trace->nr_entries < trace->max_entries)
50 trace->entries[trace->nr_entries++] = addr;
51}
52
53static const struct stacktrace_ops save_stack_ops = {
54 .warning = save_stack_warning,
55 .warning_symbol = save_stack_warning_symbol,
56 .stack = save_stack_stack,
57 .address = save_stack_address,
58};
59
21void save_stack_trace(struct stack_trace *trace) 60void save_stack_trace(struct stack_trace *trace)
22{ 61{
23 unsigned long *sp = (unsigned long *)current_stack_pointer; 62 unsigned long *sp = (unsigned long *)current_stack_pointer;
24 63
25 while (!kstack_end(sp)) { 64 unwind_stack(current, NULL, sp, &save_stack_ops, trace);
26 unsigned long addr = *sp++; 65 if (trace->nr_entries < trace->max_entries)
27 66 trace->entries[trace->nr_entries++] = ULONG_MAX;
28 if (__kernel_text_address(addr)) {
29 if (trace->skip > 0)
30 trace->skip--;
31 else
32 trace->entries[trace->nr_entries++] = addr;
33 if (trace->nr_entries >= trace->max_entries)
34 break;
35 }
36 }
37} 67}
38EXPORT_SYMBOL_GPL(save_stack_trace); 68EXPORT_SYMBOL_GPL(save_stack_trace);
39 69
70static void
71save_stack_address_nosched(void *data, unsigned long addr, int reliable)
72{
73 struct stack_trace *trace = (struct stack_trace *)data;
74
75 if (!reliable)
76 return;
77
78 if (in_sched_functions(addr))
79 return;
80
81 if (trace->skip > 0) {
82 trace->skip--;
83 return;
84 }
85
86 if (trace->nr_entries < trace->max_entries)
87 trace->entries[trace->nr_entries++] = addr;
88}
89
90static const struct stacktrace_ops save_stack_ops_nosched = {
91 .warning = save_stack_warning,
92 .warning_symbol = save_stack_warning_symbol,
93 .stack = save_stack_stack,
94 .address = save_stack_address_nosched,
95};
96
40void save_stack_trace_tsk(struct task_struct *tsk, struct stack_trace *trace) 97void save_stack_trace_tsk(struct task_struct *tsk, struct stack_trace *trace)
41{ 98{
42 unsigned long *sp = (unsigned long *)tsk->thread.sp; 99 unsigned long *sp = (unsigned long *)tsk->thread.sp;
43 100
44 while (!kstack_end(sp)) { 101 unwind_stack(current, NULL, sp, &save_stack_ops_nosched, trace);
45 unsigned long addr = *sp++; 102 if (trace->nr_entries < trace->max_entries)
46 103 trace->entries[trace->nr_entries++] = ULONG_MAX;
47 if (__kernel_text_address(addr)) {
48 if (in_sched_functions(addr))
49 break;
50 if (trace->skip > 0)
51 trace->skip--;
52 else
53 trace->entries[trace->nr_entries++] = addr;
54 if (trace->nr_entries >= trace->max_entries)
55 break;
56 }
57 }
58} 104}
59EXPORT_SYMBOL_GPL(save_stack_trace_tsk); 105EXPORT_SYMBOL_GPL(save_stack_trace_tsk);
diff --git a/arch/sh/kernel/time.c b/arch/sh/kernel/time.c
index 9b352a1e3fb4..7f95f479060f 100644
--- a/arch/sh/kernel/time.c
+++ b/arch/sh/kernel/time.c
@@ -21,6 +21,7 @@
21#include <linux/smp.h> 21#include <linux/smp.h>
22#include <linux/rtc.h> 22#include <linux/rtc.h>
23#include <asm/clock.h> 23#include <asm/clock.h>
24#include <asm/hwblk.h>
24#include <asm/rtc.h> 25#include <asm/rtc.h>
25 26
26/* Dummy RTC ops */ 27/* Dummy RTC ops */
@@ -91,11 +92,27 @@ module_init(rtc_generic_init);
91 92
92void (*board_time_init)(void); 93void (*board_time_init)(void);
93 94
95static void __init sh_late_time_init(void)
96{
97 /*
98 * Make sure all compiled-in early timers register themselves.
99 *
100 * Run probe() for two "earlytimer" devices, these will be the
101 * clockevents and clocksource devices respectively. In the event
102 * that only a clockevents device is available, we -ENODEV on the
103 * clocksource and the jiffies clocksource is used transparently
104 * instead. No error handling is necessary here.
105 */
106 early_platform_driver_register_all("earlytimer");
107 early_platform_driver_probe("earlytimer", 2, 0);
108}
109
94void __init time_init(void) 110void __init time_init(void)
95{ 111{
96 if (board_time_init) 112 if (board_time_init)
97 board_time_init(); 113 board_time_init();
98 114
115 hwblk_init();
99 clk_init(); 116 clk_init();
100 117
101 rtc_sh_get_time(&xtime); 118 rtc_sh_get_time(&xtime);
@@ -106,15 +123,5 @@ void __init time_init(void)
106 local_timer_setup(smp_processor_id()); 123 local_timer_setup(smp_processor_id());
107#endif 124#endif
108 125
109 /* 126 late_time_init = sh_late_time_init;
110 * Make sure all compiled-in early timers register themselves.
111 *
112 * Run probe() for two "earlytimer" devices, these will be the
113 * clockevents and clocksource devices respectively. In the event
114 * that only a clockevents device is available, we -ENODEV on the
115 * clocksource and the jiffies clocksource is used transparently
116 * instead. No error handling is necessary here.
117 */
118 early_platform_driver_register_all("earlytimer");
119 early_platform_driver_probe("earlytimer", 2, 0);
120} 127}
diff --git a/arch/sh/kernel/traps_32.c b/arch/sh/kernel/traps_32.c
index 2b772776fcda..563426487c6b 100644
--- a/arch/sh/kernel/traps_32.c
+++ b/arch/sh/kernel/traps_32.c
@@ -858,30 +858,6 @@ void __init trap_init(void)
858 per_cpu_trap_init(); 858 per_cpu_trap_init();
859} 859}
860 860
861void show_trace(struct task_struct *tsk, unsigned long *sp,
862 struct pt_regs *regs)
863{
864 unsigned long addr;
865
866 if (regs && user_mode(regs))
867 return;
868
869 printk("\nCall trace:\n");
870
871 while (!kstack_end(sp)) {
872 addr = *sp++;
873 if (kernel_text_address(addr))
874 print_ip_sym(addr);
875 }
876
877 printk("\n");
878
879 if (!tsk)
880 tsk = current;
881
882 debug_show_held_locks(tsk);
883}
884
885void show_stack(struct task_struct *tsk, unsigned long *sp) 861void show_stack(struct task_struct *tsk, unsigned long *sp)
886{ 862{
887 unsigned long stack; 863 unsigned long stack;
diff --git a/arch/sh/kernel/unwinder.c b/arch/sh/kernel/unwinder.c
new file mode 100644
index 000000000000..2b30fa28b440
--- /dev/null
+++ b/arch/sh/kernel/unwinder.c
@@ -0,0 +1,162 @@
1/*
2 * Copyright (C) 2009 Matt Fleming
3 *
4 * Based, in part, on kernel/time/clocksource.c.
5 *
6 * This file provides arbitration code for stack unwinders.
7 *
8 * Multiple stack unwinders can be available on a system, usually with
9 * the most accurate unwinder being the currently active one.
10 */
11#include <linux/errno.h>
12#include <linux/list.h>
13#include <linux/spinlock.h>
14#include <asm/unwinder.h>
15#include <asm/atomic.h>
16
17/*
18 * This is the most basic stack unwinder an architecture can
19 * provide. For architectures without reliable frame pointers, e.g.
20 * RISC CPUs, it can be implemented by looking through the stack for
21 * addresses that lie within the kernel text section.
22 *
23 * Other CPUs, e.g. x86, can use their frame pointer register to
24 * construct more accurate stack traces.
25 */
26static struct list_head unwinder_list;
27static struct unwinder stack_reader = {
28 .name = "stack-reader",
29 .dump = stack_reader_dump,
30 .rating = 50,
31 .list = {
32 .next = &unwinder_list,
33 .prev = &unwinder_list,
34 },
35};
36
37/*
38 * "curr_unwinder" points to the stack unwinder currently in use. This
39 * is the unwinder with the highest rating.
40 *
41 * "unwinder_list" is a linked-list of all available unwinders, sorted
42 * by rating.
43 *
44 * All modifications of "curr_unwinder" and "unwinder_list" must be
45 * performed whilst holding "unwinder_lock".
46 */
47static struct unwinder *curr_unwinder = &stack_reader;
48
49static struct list_head unwinder_list = {
50 .next = &stack_reader.list,
51 .prev = &stack_reader.list,
52};
53
54static DEFINE_SPINLOCK(unwinder_lock);
55
56static atomic_t unwinder_running = ATOMIC_INIT(0);
57
58/**
59 * select_unwinder - Select the best registered stack unwinder.
60 *
61 * Private function. Must hold unwinder_lock when called.
62 *
63 * Select the stack unwinder with the best rating. This is useful for
64 * setting up curr_unwinder.
65 */
66static struct unwinder *select_unwinder(void)
67{
68 struct unwinder *best;
69
70 if (list_empty(&unwinder_list))
71 return NULL;
72
73 best = list_entry(unwinder_list.next, struct unwinder, list);
74 if (best == curr_unwinder)
75 return NULL;
76
77 return best;
78}
79
80/*
81 * Enqueue the stack unwinder sorted by rating.
82 */
83static int unwinder_enqueue(struct unwinder *ops)
84{
85 struct list_head *tmp, *entry = &unwinder_list;
86
87 list_for_each(tmp, &unwinder_list) {
88 struct unwinder *o;
89
90 o = list_entry(tmp, struct unwinder, list);
91 if (o == ops)
92 return -EBUSY;
93 /* Keep track of the place, where to insert */
94 if (o->rating >= ops->rating)
95 entry = tmp;
96 }
97 list_add(&ops->list, entry);
98
99 return 0;
100}
101
102/**
103 * unwinder_register - Used to install new stack unwinder
104 * @u: unwinder to be registered
105 *
106 * Install the new stack unwinder on the unwinder list, which is sorted
107 * by rating.
108 *
109 * Returns -EBUSY if registration fails, zero otherwise.
110 */
111int unwinder_register(struct unwinder *u)
112{
113 unsigned long flags;
114 int ret;
115
116 spin_lock_irqsave(&unwinder_lock, flags);
117 ret = unwinder_enqueue(u);
118 if (!ret)
119 curr_unwinder = select_unwinder();
120 spin_unlock_irqrestore(&unwinder_lock, flags);
121
122 return ret;
123}
124
125/*
126 * Unwind the call stack and pass information to the stacktrace_ops
127 * functions. Also handle the case where we need to switch to a new
128 * stack dumper because the current one faulted unexpectedly.
129 */
130void unwind_stack(struct task_struct *task, struct pt_regs *regs,
131 unsigned long *sp, const struct stacktrace_ops *ops,
132 void *data)
133{
134 unsigned long flags;
135
136 /*
137 * The problem with unwinders with high ratings is that they are
138 * inherently more complicated than the simple ones with lower
139 * ratings. We are therefore more likely to fault in the
140 * complicated ones, e.g. hitting BUG()s. If we fault in the
141 * code for the current stack unwinder we try to downgrade to
142 * one with a lower rating.
143 *
144 * Hopefully this will give us a semi-reliable stacktrace so we
145 * can diagnose why curr_unwinder->dump() faulted.
146 */
147 if (atomic_inc_return(&unwinder_running) != 1) {
148 spin_lock_irqsave(&unwinder_lock, flags);
149
150 if (!list_is_singular(&unwinder_list)) {
151 list_del(&curr_unwinder->list);
152 curr_unwinder = select_unwinder();
153 }
154
155 spin_unlock_irqrestore(&unwinder_lock, flags);
156 atomic_dec(&unwinder_running);
157 }
158
159 curr_unwinder->dump(task, regs, sp, ops, data);
160
161 atomic_dec(&unwinder_running);
162}
diff --git a/arch/sh/kernel/vmlinux.lds.S b/arch/sh/kernel/vmlinux.lds.S
index f53c76acaede..1b7d9d541e01 100644
--- a/arch/sh/kernel/vmlinux.lds.S
+++ b/arch/sh/kernel/vmlinux.lds.S
@@ -12,7 +12,7 @@ OUTPUT_ARCH(sh)
12 12
13#include <asm/thread_info.h> 13#include <asm/thread_info.h>
14#include <asm/cache.h> 14#include <asm/cache.h>
15#include <asm-generic/vmlinux.lds.h> 15#include <asm/vmlinux.lds.h>
16 16
17ENTRY(_start) 17ENTRY(_start)
18SECTIONS 18SECTIONS
@@ -50,12 +50,7 @@ SECTIONS
50 _etext = .; /* End of text section */ 50 _etext = .; /* End of text section */
51 } = 0x0009 51 } = 0x0009
52 52
53 . = ALIGN(16); /* Exception table */ 53 EXCEPTION_TABLE(16)
54 __ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET) {
55 __start___ex_table = .;
56 *(__ex_table)
57 __stop___ex_table = .;
58 }
59 54
60 NOTES 55 NOTES
61 RO_DATA(PAGE_SIZE) 56 RO_DATA(PAGE_SIZE)
@@ -71,69 +66,16 @@ SECTIONS
71 __uncached_end = .; 66 __uncached_end = .;
72 } 67 }
73 68
74 . = ALIGN(THREAD_SIZE); 69 RW_DATA_SECTION(L1_CACHE_BYTES, PAGE_SIZE, THREAD_SIZE)
75 .data : AT(ADDR(.data) - LOAD_OFFSET) { /* Data */
76 *(.data.init_task)
77
78 . = ALIGN(L1_CACHE_BYTES);
79 *(.data.cacheline_aligned)
80
81 . = ALIGN(L1_CACHE_BYTES);
82 *(.data.read_mostly)
83
84 . = ALIGN(PAGE_SIZE);
85 *(.data.page_aligned)
86
87 __nosave_begin = .;
88 *(.data.nosave)
89 . = ALIGN(PAGE_SIZE);
90 __nosave_end = .;
91
92 DATA_DATA
93 CONSTRUCTORS
94 }
95 70
96 _edata = .; /* End of data section */ 71 _edata = .; /* End of data section */
97 72
98 . = ALIGN(PAGE_SIZE); /* Init code and data */ 73 DWARF_EH_FRAME
99 .init.text : AT(ADDR(.init.text) - LOAD_OFFSET) {
100 __init_begin = .;
101 _sinittext = .;
102 INIT_TEXT
103 _einittext = .;
104 }
105
106 .init.data : AT(ADDR(.init.data) - LOAD_OFFSET) { INIT_DATA }
107
108 . = ALIGN(16);
109 .init.setup : AT(ADDR(.init.setup) - LOAD_OFFSET) {
110 __setup_start = .;
111 *(.init.setup)
112 __setup_end = .;
113 }
114
115 .initcall.init : AT(ADDR(.initcall.init) - LOAD_OFFSET) {
116 __initcall_start = .;
117 INITCALLS
118 __initcall_end = .;
119 }
120
121 .con_initcall.init : AT(ADDR(.con_initcall.init) - LOAD_OFFSET) {
122 __con_initcall_start = .;
123 *(.con_initcall.init)
124 __con_initcall_end = .;
125 }
126
127 SECURITY_INIT
128 74
129#ifdef CONFIG_BLK_DEV_INITRD 75 . = ALIGN(PAGE_SIZE); /* Init code and data */
130 . = ALIGN(PAGE_SIZE); 76 __init_begin = .;
131 .init.ramfs : AT(ADDR(.init.ramfs) - LOAD_OFFSET) { 77 INIT_TEXT_SECTION(PAGE_SIZE)
132 __initramfs_start = .; 78 INIT_DATA_SECTION(16)
133 *(.init.ramfs)
134 __initramfs_end = .;
135 }
136#endif
137 79
138 . = ALIGN(4); 80 . = ALIGN(4);
139 .machvec.init : AT(ADDR(.machvec.init) - LOAD_OFFSET) { 81 .machvec.init : AT(ADDR(.machvec.init) - LOAD_OFFSET) {
@@ -152,16 +94,10 @@ SECTIONS
152 .exit.data : AT(ADDR(.exit.data) - LOAD_OFFSET) { EXIT_DATA } 94 .exit.data : AT(ADDR(.exit.data) - LOAD_OFFSET) { EXIT_DATA }
153 95
154 . = ALIGN(PAGE_SIZE); 96 . = ALIGN(PAGE_SIZE);
155 .bss : AT(ADDR(.bss) - LOAD_OFFSET) { 97 __init_end = .;
156 __init_end = .; 98 BSS_SECTION(0, PAGE_SIZE, 4)
157 __bss_start = .; /* BSS */ 99 _ebss = .; /* uClinux MTD sucks */
158 *(.bss.page_aligned) 100 _end = . ;
159 *(.bss)
160 *(COMMON)
161 . = ALIGN(4);
162 _ebss = .; /* uClinux MTD sucks */
163 _end = . ;
164 }
165 101
166 /* 102 /*
167 * When something in the kernel is NOT compiled as a module, the 103 * When something in the kernel is NOT compiled as a module, the
@@ -170,7 +106,7 @@ SECTIONS
170 * it's a module. 106 * it's a module.
171 */ 107 */
172 /DISCARD/ : { 108 /DISCARD/ : {
173 *(.exitcall.exit) 109 EXIT_CALL
174 } 110 }
175 111
176 STABS_DEBUG 112 STABS_DEBUG
diff --git a/arch/sh/lib/Makefile b/arch/sh/lib/Makefile
index aaea580b65bb..c2b28d8b2dd1 100644
--- a/arch/sh/lib/Makefile
+++ b/arch/sh/lib/Makefile
@@ -24,7 +24,7 @@ memcpy-y := memcpy.o
24memcpy-$(CONFIG_CPU_SH4) := memcpy-sh4.o 24memcpy-$(CONFIG_CPU_SH4) := memcpy-sh4.o
25 25
26lib-$(CONFIG_MMU) += copy_page.o clear_page.o 26lib-$(CONFIG_MMU) += copy_page.o clear_page.o
27lib-$(CONFIG_FUNCTION_TRACER) += mcount.o 27lib-$(CONFIG_MCOUNT) += mcount.o
28lib-y += $(memcpy-y) $(udivsi3-y) 28lib-y += $(memcpy-y) $(udivsi3-y)
29 29
30EXTRA_CFLAGS += -Werror 30EXTRA_CFLAGS += -Werror
diff --git a/arch/sh/lib/mcount.S b/arch/sh/lib/mcount.S
index 110fbfe1831f..84a57761f17e 100644
--- a/arch/sh/lib/mcount.S
+++ b/arch/sh/lib/mcount.S
@@ -1,14 +1,16 @@
1/* 1/*
2 * arch/sh/lib/mcount.S 2 * arch/sh/lib/mcount.S
3 * 3 *
4 * Copyright (C) 2008 Paul Mundt 4 * Copyright (C) 2008, 2009 Paul Mundt
5 * Copyright (C) 2008 Matt Fleming 5 * Copyright (C) 2008, 2009 Matt Fleming
6 * 6 *
7 * This file is subject to the terms and conditions of the GNU General Public 7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive 8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details. 9 * for more details.
10 */ 10 */
11#include <asm/ftrace.h> 11#include <asm/ftrace.h>
12#include <asm/thread_info.h>
13#include <asm/asm-offsets.h>
12 14
13#define MCOUNT_ENTER() \ 15#define MCOUNT_ENTER() \
14 mov.l r4, @-r15; \ 16 mov.l r4, @-r15; \
@@ -28,6 +30,55 @@
28 rts; \ 30 rts; \
29 mov.l @r15+, r4 31 mov.l @r15+, r4
30 32
33#ifdef CONFIG_STACK_DEBUG
34/*
35 * Perform diagnostic checks on the state of the kernel stack.
36 *
37 * Check for stack overflow. If there is less than 1KB free
38 * then it has overflowed.
39 *
40 * Make sure the stack pointer contains a valid address. Valid
41 * addresses for kernel stacks are anywhere after the bss
42 * (after _ebss) and anywhere in init_thread_union (init_stack).
43 */
44#define STACK_CHECK() \
45 mov #(THREAD_SIZE >> 10), r0; \
46 shll8 r0; \
47 shll2 r0; \
48 \
49 /* r1 = sp & (THREAD_SIZE - 1) */ \
50 mov #-1, r1; \
51 add r0, r1; \
52 and r15, r1; \
53 \
54 mov #TI_SIZE, r3; \
55 mov #(STACK_WARN >> 8), r2; \
56 shll8 r2; \
57 add r3, r2; \
58 \
59 /* Is the stack overflowing? */ \
60 cmp/hi r2, r1; \
61 bf stack_panic; \
62 \
63 /* If sp > _ebss then we're OK. */ \
64 mov.l .L_ebss, r1; \
65 cmp/hi r1, r15; \
66 bt 1f; \
67 \
68 /* If sp < init_stack, we're not OK. */ \
69 mov.l .L_init_thread_union, r1; \
70 cmp/hs r1, r15; \
71 bf stack_panic; \
72 \
73 /* If sp > init_stack && sp < _ebss, not OK. */ \
74 add r0, r1; \
75 cmp/hs r1, r15; \
76 bt stack_panic; \
771:
78#else
79#define STACK_CHECK()
80#endif /* CONFIG_STACK_DEBUG */
81
31 .align 2 82 .align 2
32 .globl _mcount 83 .globl _mcount
33 .type _mcount,@function 84 .type _mcount,@function
@@ -35,6 +86,19 @@
35 .type mcount,@function 86 .type mcount,@function
36_mcount: 87_mcount:
37mcount: 88mcount:
89 STACK_CHECK()
90
91#ifndef CONFIG_FUNCTION_TRACER
92 rts
93 nop
94#else
95#ifndef CONFIG_DYNAMIC_FTRACE
96 mov.l .Lfunction_trace_stop, r0
97 mov.l @r0, r0
98 tst r0, r0
99 bf ftrace_stub
100#endif
101
38 MCOUNT_ENTER() 102 MCOUNT_ENTER()
39 103
40#ifdef CONFIG_DYNAMIC_FTRACE 104#ifdef CONFIG_DYNAMIC_FTRACE
@@ -52,16 +116,69 @@ mcount_call:
52 jsr @r6 116 jsr @r6
53 nop 117 nop
54 118
119#ifdef CONFIG_FUNCTION_GRAPH_TRACER
120 mov.l .Lftrace_graph_return, r6
121 mov.l .Lftrace_stub, r7
122 cmp/eq r6, r7
123 bt 1f
124
125 mov.l .Lftrace_graph_caller, r0
126 jmp @r0
127 nop
128
1291:
130 mov.l .Lftrace_graph_entry, r6
131 mov.l .Lftrace_graph_entry_stub, r7
132 cmp/eq r6, r7
133 bt skip_trace
134
135 mov.l .Lftrace_graph_caller, r0
136 jmp @r0
137 nop
138
139 .align 2
140.Lftrace_graph_return:
141 .long ftrace_graph_return
142.Lftrace_graph_entry:
143 .long ftrace_graph_entry
144.Lftrace_graph_entry_stub:
145 .long ftrace_graph_entry_stub
146.Lftrace_graph_caller:
147 .long ftrace_graph_caller
148#endif /* CONFIG_FUNCTION_GRAPH_TRACER */
149
150 .globl skip_trace
55skip_trace: 151skip_trace:
56 MCOUNT_LEAVE() 152 MCOUNT_LEAVE()
57 153
58 .align 2 154 .align 2
59.Lftrace_trace_function: 155.Lftrace_trace_function:
60 .long ftrace_trace_function 156 .long ftrace_trace_function
61 157
62#ifdef CONFIG_DYNAMIC_FTRACE 158#ifdef CONFIG_DYNAMIC_FTRACE
159#ifdef CONFIG_FUNCTION_GRAPH_TRACER
160/*
161 * NOTE: Do not move either ftrace_graph_call or ftrace_caller
162 * as this will affect the calculation of GRAPH_INSN_OFFSET.
163 */
164 .globl ftrace_graph_call
165ftrace_graph_call:
166 mov.l .Lskip_trace, r0
167 jmp @r0
168 nop
169
170 .align 2
171.Lskip_trace:
172 .long skip_trace
173#endif /* CONFIG_FUNCTION_GRAPH_TRACER */
174
63 .globl ftrace_caller 175 .globl ftrace_caller
64ftrace_caller: 176ftrace_caller:
177 mov.l .Lfunction_trace_stop, r0
178 mov.l @r0, r0
179 tst r0, r0
180 bf ftrace_stub
181
65 MCOUNT_ENTER() 182 MCOUNT_ENTER()
66 183
67 .globl ftrace_call 184 .globl ftrace_call
@@ -70,9 +187,18 @@ ftrace_call:
70 jsr @r6 187 jsr @r6
71 nop 188 nop
72 189
190#ifdef CONFIG_FUNCTION_GRAPH_TRACER
191 bra ftrace_graph_call
192 nop
193#else
73 MCOUNT_LEAVE() 194 MCOUNT_LEAVE()
195#endif /* CONFIG_FUNCTION_GRAPH_TRACER */
74#endif /* CONFIG_DYNAMIC_FTRACE */ 196#endif /* CONFIG_DYNAMIC_FTRACE */
75 197
198 .align 2
199.Lfunction_trace_stop:
200 .long function_trace_stop
201
76/* 202/*
77 * NOTE: From here on the locations of the .Lftrace_stub label and 203 * NOTE: From here on the locations of the .Lftrace_stub label and
78 * ftrace_stub itself are fixed. Adding additional data here will skew 204 * ftrace_stub itself are fixed. Adding additional data here will skew
@@ -80,7 +206,6 @@ ftrace_call:
80 * Place new labels either after the ftrace_stub body, or before 206 * Place new labels either after the ftrace_stub body, or before
81 * ftrace_caller. You have been warned. 207 * ftrace_caller. You have been warned.
82 */ 208 */
83 .align 2
84.Lftrace_stub: 209.Lftrace_stub:
85 .long ftrace_stub 210 .long ftrace_stub
86 211
@@ -88,3 +213,98 @@ ftrace_call:
88ftrace_stub: 213ftrace_stub:
89 rts 214 rts
90 nop 215 nop
216
217#ifdef CONFIG_FUNCTION_GRAPH_TRACER
218 .globl ftrace_graph_caller
219ftrace_graph_caller:
220 mov.l 2f, r0
221 mov.l @r0, r0
222 tst r0, r0
223 bt 1f
224
225 mov.l 3f, r1
226 jmp @r1
227 nop
2281:
229 /*
230 * MCOUNT_ENTER() pushed 5 registers onto the stack, so
231 * the stack address containing our return address is
232 * r15 + 20.
233 */
234 mov #20, r0
235 add r15, r0
236 mov r0, r4
237
238 mov.l .Lprepare_ftrace_return, r0
239 jsr @r0
240 nop
241
242 MCOUNT_LEAVE()
243
244 .align 2
2452: .long function_trace_stop
2463: .long skip_trace
247.Lprepare_ftrace_return:
248 .long prepare_ftrace_return
249
250 .globl return_to_handler
251return_to_handler:
252 /*
253 * Save the return values.
254 */
255 mov.l r0, @-r15
256 mov.l r1, @-r15
257
258 mov #0, r4
259
260 mov.l .Lftrace_return_to_handler, r0
261 jsr @r0
262 nop
263
264 /*
265 * The return value from ftrace_return_handler has the real
266 * address that we should return to.
267 */
268 lds r0, pr
269 mov.l @r15+, r1
270 rts
271 mov.l @r15+, r0
272
273
274 .align 2
275.Lftrace_return_to_handler:
276 .long ftrace_return_to_handler
277#endif /* CONFIG_FUNCTION_GRAPH_TRACER */
278#endif /* CONFIG_FUNCTION_TRACER */
279
280#ifdef CONFIG_STACK_DEBUG
281 .globl stack_panic
282stack_panic:
283 mov.l .Ldump_stack, r0
284 jsr @r0
285 nop
286
287 mov.l .Lpanic, r0
288 jsr @r0
289 mov.l .Lpanic_s, r4
290
291 rts
292 nop
293
294 .align 2
295.L_ebss:
296 .long _ebss
297.L_init_thread_union:
298 .long init_thread_union
299.Lpanic:
300 .long panic
301.Lpanic_s:
302 .long .Lpanic_str
303.Ldump_stack:
304 .long dump_stack
305
306 .section .rodata
307 .align 2
308.Lpanic_str:
309 .string "Stack error"
310#endif /* CONFIG_STACK_DEBUG */
diff --git a/arch/sh/mm/fault_32.c b/arch/sh/mm/fault_32.c
index 71925946f1e1..dbbdeba2cee5 100644
--- a/arch/sh/mm/fault_32.c
+++ b/arch/sh/mm/fault_32.c
@@ -2,7 +2,7 @@
2 * Page fault handler for SH with an MMU. 2 * Page fault handler for SH with an MMU.
3 * 3 *
4 * Copyright (C) 1999 Niibe Yutaka 4 * Copyright (C) 1999 Niibe Yutaka
5 * Copyright (C) 2003 - 2008 Paul Mundt 5 * Copyright (C) 2003 - 2009 Paul Mundt
6 * 6 *
7 * Based on linux/arch/i386/mm/fault.c: 7 * Based on linux/arch/i386/mm/fault.c:
8 * Copyright (C) 1995 Linus Torvalds 8 * Copyright (C) 1995 Linus Torvalds
@@ -25,18 +25,91 @@ static inline int notify_page_fault(struct pt_regs *regs, int trap)
25{ 25{
26 int ret = 0; 26 int ret = 0;
27 27
28#ifdef CONFIG_KPROBES 28 if (kprobes_built_in() && !user_mode(regs)) {
29 if (!user_mode(regs)) {
30 preempt_disable(); 29 preempt_disable();
31 if (kprobe_running() && kprobe_fault_handler(regs, trap)) 30 if (kprobe_running() && kprobe_fault_handler(regs, trap))
32 ret = 1; 31 ret = 1;
33 preempt_enable(); 32 preempt_enable();
34 } 33 }
35#endif
36 34
37 return ret; 35 return ret;
38} 36}
39 37
38static inline pmd_t *vmalloc_sync_one(pgd_t *pgd, unsigned long address)
39{
40 unsigned index = pgd_index(address);
41 pgd_t *pgd_k;
42 pud_t *pud, *pud_k;
43 pmd_t *pmd, *pmd_k;
44
45 pgd += index;
46 pgd_k = init_mm.pgd + index;
47
48 if (!pgd_present(*pgd_k))
49 return NULL;
50
51 pud = pud_offset(pgd, address);
52 pud_k = pud_offset(pgd_k, address);
53 if (!pud_present(*pud_k))
54 return NULL;
55
56 pmd = pmd_offset(pud, address);
57 pmd_k = pmd_offset(pud_k, address);
58 if (!pmd_present(*pmd_k))
59 return NULL;
60
61 if (!pmd_present(*pmd))
62 set_pmd(pmd, *pmd_k);
63 else {
64 /*
65 * The page tables are fully synchronised so there must
66 * be another reason for the fault. Return NULL here to
67 * signal that we have not taken care of the fault.
68 */
69 BUG_ON(pmd_page(*pmd) != pmd_page(*pmd_k));
70 return NULL;
71 }
72
73 return pmd_k;
74}
75
76/*
77 * Handle a fault on the vmalloc or module mapping area
78 */
79static noinline int vmalloc_fault(unsigned long address)
80{
81 pgd_t *pgd_k;
82 pmd_t *pmd_k;
83 pte_t *pte_k;
84
85 /* Make sure we are in vmalloc area: */
86 if (!(address >= VMALLOC_START && address < VMALLOC_END))
87 return -1;
88
89 /*
90 * Synchronize this task's top level page-table
91 * with the 'reference' page table.
92 *
93 * Do _not_ use "current" here. We might be inside
94 * an interrupt in the middle of a task switch..
95 */
96 pgd_k = get_TTB();
97 pmd_k = vmalloc_sync_one(pgd_k, address);
98 if (!pmd_k)
99 return -1;
100
101 pte_k = pte_offset_kernel(pmd_k, address);
102 if (!pte_present(*pte_k))
103 return -1;
104
105 return 0;
106}
107
108static int fault_in_kernel_space(unsigned long address)
109{
110 return address >= TASK_SIZE;
111}
112
40/* 113/*
41 * This routine handles page faults. It determines the address, 114 * This routine handles page faults. It determines the address,
42 * and the problem, and then passes it off to one of the appropriate 115 * and the problem, and then passes it off to one of the appropriate
@@ -46,6 +119,7 @@ asmlinkage void __kprobes do_page_fault(struct pt_regs *regs,
46 unsigned long writeaccess, 119 unsigned long writeaccess,
47 unsigned long address) 120 unsigned long address)
48{ 121{
122 unsigned long vec;
49 struct task_struct *tsk; 123 struct task_struct *tsk;
50 struct mm_struct *mm; 124 struct mm_struct *mm;
51 struct vm_area_struct * vma; 125 struct vm_area_struct * vma;
@@ -53,59 +127,30 @@ asmlinkage void __kprobes do_page_fault(struct pt_regs *regs,
53 int fault; 127 int fault;
54 siginfo_t info; 128 siginfo_t info;
55 129
56 /*
57 * We don't bother with any notifier callbacks here, as they are
58 * all handled through the __do_page_fault() fast-path.
59 */
60
61 tsk = current; 130 tsk = current;
131 mm = tsk->mm;
62 si_code = SEGV_MAPERR; 132 si_code = SEGV_MAPERR;
133 vec = lookup_exception_vector();
63 134
64 if (unlikely(address >= TASK_SIZE)) { 135 /*
65 /* 136 * We fault-in kernel-space virtual memory on-demand. The
66 * Synchronize this task's top level page-table 137 * 'reference' page table is init_mm.pgd.
67 * with the 'reference' page table. 138 *
68 * 139 * NOTE! We MUST NOT take any locks for this case. We may
69 * Do _not_ use "tsk" here. We might be inside 140 * be in an interrupt or a critical region, and should
70 * an interrupt in the middle of a task switch.. 141 * only copy the information from the master page table,
71 */ 142 * nothing more.
72 int offset = pgd_index(address); 143 */
73 pgd_t *pgd, *pgd_k; 144 if (unlikely(fault_in_kernel_space(address))) {
74 pud_t *pud, *pud_k; 145 if (vmalloc_fault(address) >= 0)
75 pmd_t *pmd, *pmd_k;
76
77 pgd = get_TTB() + offset;
78 pgd_k = swapper_pg_dir + offset;
79
80 if (!pgd_present(*pgd)) {
81 if (!pgd_present(*pgd_k))
82 goto bad_area_nosemaphore;
83 set_pgd(pgd, *pgd_k);
84 return; 146 return;
85 } 147 if (notify_page_fault(regs, vec))
86
87 pud = pud_offset(pgd, address);
88 pud_k = pud_offset(pgd_k, address);
89
90 if (!pud_present(*pud)) {
91 if (!pud_present(*pud_k))
92 goto bad_area_nosemaphore;
93 set_pud(pud, *pud_k);
94 return; 148 return;
95 }
96 149
97 pmd = pmd_offset(pud, address); 150 goto bad_area_nosemaphore;
98 pmd_k = pmd_offset(pud_k, address);
99 if (pmd_present(*pmd) || !pmd_present(*pmd_k))
100 goto bad_area_nosemaphore;
101 set_pmd(pmd, *pmd_k);
102
103 return;
104 } 151 }
105 152
106 mm = tsk->mm; 153 if (unlikely(notify_page_fault(regs, vec)))
107
108 if (unlikely(notify_page_fault(regs, lookup_exception_vector())))
109 return; 154 return;
110 155
111 /* Only enable interrupts if they were on before the fault */ 156 /* Only enable interrupts if they were on before the fault */
@@ -115,8 +160,8 @@ asmlinkage void __kprobes do_page_fault(struct pt_regs *regs,
115 perf_swcounter_event(PERF_COUNT_SW_PAGE_FAULTS, 1, 0, regs, address); 160 perf_swcounter_event(PERF_COUNT_SW_PAGE_FAULTS, 1, 0, regs, address);
116 161
117 /* 162 /*
118 * If we're in an interrupt or have no user 163 * If we're in an interrupt, have no user context or are running
119 * context, we must not take the fault.. 164 * in an atomic region then we must not take the fault:
120 */ 165 */
121 if (in_atomic() || !mm) 166 if (in_atomic() || !mm)
122 goto no_context; 167 goto no_context;
@@ -132,10 +177,11 @@ asmlinkage void __kprobes do_page_fault(struct pt_regs *regs,
132 goto bad_area; 177 goto bad_area;
133 if (expand_stack(vma, address)) 178 if (expand_stack(vma, address))
134 goto bad_area; 179 goto bad_area;
135/* 180
136 * Ok, we have a good vm_area for this memory access, so 181 /*
137 * we can handle it.. 182 * Ok, we have a good vm_area for this memory access, so
138 */ 183 * we can handle it..
184 */
139good_area: 185good_area:
140 si_code = SEGV_ACCERR; 186 si_code = SEGV_ACCERR;
141 if (writeaccess) { 187 if (writeaccess) {
@@ -173,10 +219,10 @@ survive:
173 up_read(&mm->mmap_sem); 219 up_read(&mm->mmap_sem);
174 return; 220 return;
175 221
176/* 222 /*
177 * Something tried to access memory that isn't in our memory map.. 223 * Something tried to access memory that isn't in our memory map..
178 * Fix it, but check if it's kernel or user first.. 224 * Fix it, but check if it's kernel or user first..
179 */ 225 */
180bad_area: 226bad_area:
181 up_read(&mm->mmap_sem); 227 up_read(&mm->mmap_sem);
182 228
diff --git a/arch/sh/mm/ioremap_64.c b/arch/sh/mm/ioremap_64.c
index 828c8597219d..b16843d02b76 100644
--- a/arch/sh/mm/ioremap_64.c
+++ b/arch/sh/mm/ioremap_64.c
@@ -94,7 +94,6 @@ static struct resource *shmedia_find_resource(struct resource *root,
94static void __iomem *shmedia_alloc_io(unsigned long phys, unsigned long size, 94static void __iomem *shmedia_alloc_io(unsigned long phys, unsigned long size,
95 const char *name, unsigned long flags) 95 const char *name, unsigned long flags)
96{ 96{
97 static int printed_full;
98 struct xresource *xres; 97 struct xresource *xres;
99 struct resource *res; 98 struct resource *res;
100 char *tack; 99 char *tack;
@@ -108,11 +107,8 @@ static void __iomem *shmedia_alloc_io(unsigned long phys, unsigned long size,
108 tack = xres->xname; 107 tack = xres->xname;
109 res = &xres->xres; 108 res = &xres->xres;
110 } else { 109 } else {
111 if (!printed_full) { 110 printk_once(KERN_NOTICE "%s: done with statics, "
112 printk(KERN_NOTICE "%s: done with statics, "
113 "switching to kmalloc\n", __func__); 111 "switching to kmalloc\n", __func__);
114 printed_full = 1;
115 }
116 tlen = strlen(name); 112 tlen = strlen(name);
117 tack = kmalloc(sizeof(struct resource) + tlen + 1, GFP_KERNEL); 113 tack = kmalloc(sizeof(struct resource) + tlen + 1, GFP_KERNEL);
118 if (!tack) 114 if (!tack)
diff --git a/arch/sh/mm/numa.c b/arch/sh/mm/numa.c
index 095d93bec7cd..9b784fdb947c 100644
--- a/arch/sh/mm/numa.c
+++ b/arch/sh/mm/numa.c
@@ -9,6 +9,7 @@
9 */ 9 */
10#include <linux/module.h> 10#include <linux/module.h>
11#include <linux/bootmem.h> 11#include <linux/bootmem.h>
12#include <linux/lmb.h>
12#include <linux/mm.h> 13#include <linux/mm.h>
13#include <linux/numa.h> 14#include <linux/numa.h>
14#include <linux/pfn.h> 15#include <linux/pfn.h>
@@ -26,6 +27,15 @@ EXPORT_SYMBOL_GPL(node_data);
26void __init setup_memory(void) 27void __init setup_memory(void)
27{ 28{
28 unsigned long free_pfn = PFN_UP(__pa(_end)); 29 unsigned long free_pfn = PFN_UP(__pa(_end));
30 u64 base = min_low_pfn << PAGE_SHIFT;
31 u64 size = (max_low_pfn << PAGE_SHIFT) - min_low_pfn;
32
33 lmb_add(base, size);
34
35 /* Reserve the LMB regions used by the kernel, initrd, etc.. */
36 lmb_reserve(__MEMORY_START + CONFIG_ZERO_PAGE_OFFSET,
37 (PFN_PHYS(free_pfn) + PAGE_SIZE - 1) -
38 (__MEMORY_START + CONFIG_ZERO_PAGE_OFFSET));
29 39
30 /* 40 /*
31 * Node 0 sets up its pgdat at the first available pfn, 41 * Node 0 sets up its pgdat at the first available pfn,
@@ -45,24 +55,23 @@ void __init setup_memory(void)
45 55
46void __init setup_bootmem_node(int nid, unsigned long start, unsigned long end) 56void __init setup_bootmem_node(int nid, unsigned long start, unsigned long end)
47{ 57{
48 unsigned long bootmap_pages, bootmap_start, bootmap_size; 58 unsigned long bootmap_pages;
49 unsigned long start_pfn, free_pfn, end_pfn; 59 unsigned long start_pfn, end_pfn;
60 unsigned long bootmem_paddr;
50 61
51 /* Don't allow bogus node assignment */ 62 /* Don't allow bogus node assignment */
52 BUG_ON(nid > MAX_NUMNODES || nid == 0); 63 BUG_ON(nid > MAX_NUMNODES || nid == 0);
53 64
54 /* 65 start_pfn = start >> PAGE_SHIFT;
55 * The free pfn starts at the beginning of the range, and is
56 * advanced as necessary for pgdat and node map allocations.
57 */
58 free_pfn = start_pfn = start >> PAGE_SHIFT;
59 end_pfn = end >> PAGE_SHIFT; 66 end_pfn = end >> PAGE_SHIFT;
60 67
68 lmb_add(start, end - start);
69
61 __add_active_range(nid, start_pfn, end_pfn); 70 __add_active_range(nid, start_pfn, end_pfn);
62 71
63 /* Node-local pgdat */ 72 /* Node-local pgdat */
64 NODE_DATA(nid) = pfn_to_kaddr(free_pfn); 73 NODE_DATA(nid) = __va(lmb_alloc_base(sizeof(struct pglist_data),
65 free_pfn += PFN_UP(sizeof(struct pglist_data)); 74 SMP_CACHE_BYTES, end_pfn));
66 memset(NODE_DATA(nid), 0, sizeof(struct pglist_data)); 75 memset(NODE_DATA(nid), 0, sizeof(struct pglist_data));
67 76
68 NODE_DATA(nid)->bdata = &bootmem_node_data[nid]; 77 NODE_DATA(nid)->bdata = &bootmem_node_data[nid];
@@ -71,16 +80,17 @@ void __init setup_bootmem_node(int nid, unsigned long start, unsigned long end)
71 80
72 /* Node-local bootmap */ 81 /* Node-local bootmap */
73 bootmap_pages = bootmem_bootmap_pages(end_pfn - start_pfn); 82 bootmap_pages = bootmem_bootmap_pages(end_pfn - start_pfn);
74 bootmap_start = (unsigned long)pfn_to_kaddr(free_pfn); 83 bootmem_paddr = lmb_alloc_base(bootmap_pages << PAGE_SHIFT,
75 bootmap_size = init_bootmem_node(NODE_DATA(nid), free_pfn, start_pfn, 84 PAGE_SIZE, end_pfn);
76 end_pfn); 85 init_bootmem_node(NODE_DATA(nid), bootmem_paddr >> PAGE_SHIFT,
86 start_pfn, end_pfn);
77 87
78 free_bootmem_with_active_regions(nid, end_pfn); 88 free_bootmem_with_active_regions(nid, end_pfn);
79 89
80 /* Reserve the pgdat and bootmap space with the bootmem allocator */ 90 /* Reserve the pgdat and bootmap space with the bootmem allocator */
81 reserve_bootmem_node(NODE_DATA(nid), start_pfn << PAGE_SHIFT, 91 reserve_bootmem_node(NODE_DATA(nid), start_pfn << PAGE_SHIFT,
82 sizeof(struct pglist_data), BOOTMEM_DEFAULT); 92 sizeof(struct pglist_data), BOOTMEM_DEFAULT);
83 reserve_bootmem_node(NODE_DATA(nid), free_pfn << PAGE_SHIFT, 93 reserve_bootmem_node(NODE_DATA(nid), bootmem_paddr,
84 bootmap_pages << PAGE_SHIFT, BOOTMEM_DEFAULT); 94 bootmap_pages << PAGE_SHIFT, BOOTMEM_DEFAULT);
85 95
86 /* It's up */ 96 /* It's up */
diff --git a/arch/sh/oprofile/backtrace.c b/arch/sh/oprofile/backtrace.c
index 9499a2914f89..2bc74de23f08 100644
--- a/arch/sh/oprofile/backtrace.c
+++ b/arch/sh/oprofile/backtrace.c
@@ -17,9 +17,43 @@
17#include <linux/sched.h> 17#include <linux/sched.h>
18#include <linux/kallsyms.h> 18#include <linux/kallsyms.h>
19#include <linux/mm.h> 19#include <linux/mm.h>
20#include <asm/unwinder.h>
20#include <asm/ptrace.h> 21#include <asm/ptrace.h>
21#include <asm/uaccess.h> 22#include <asm/uaccess.h>
22#include <asm/sections.h> 23#include <asm/sections.h>
24#include <asm/stacktrace.h>
25
26static void backtrace_warning_symbol(void *data, char *msg,
27 unsigned long symbol)
28{
29 /* Ignore warnings */
30}
31
32static void backtrace_warning(void *data, char *msg)
33{
34 /* Ignore warnings */
35}
36
37static int backtrace_stack(void *data, char *name)
38{
39 /* Yes, we want all stacks */
40 return 0;
41}
42
43static void backtrace_address(void *data, unsigned long addr, int reliable)
44{
45 unsigned int *depth = data;
46
47 if ((*depth)--)
48 oprofile_add_trace(addr);
49}
50
51static struct stacktrace_ops backtrace_ops = {
52 .warning = backtrace_warning,
53 .warning_symbol = backtrace_warning_symbol,
54 .stack = backtrace_stack,
55 .address = backtrace_address,
56};
23 57
24/* Limit to stop backtracing too far. */ 58/* Limit to stop backtracing too far. */
25static int backtrace_limit = 20; 59static int backtrace_limit = 20;
@@ -47,50 +81,6 @@ user_backtrace(unsigned long *stackaddr, struct pt_regs *regs)
47 return stackaddr; 81 return stackaddr;
48} 82}
49 83
50/*
51 * | | /\ Higher addresses
52 * | |
53 * --------------- stack base (address of current_thread_info)
54 * | thread info |
55 * . .
56 * | stack |
57 * --------------- saved regs->regs[15] value if valid
58 * . .
59 * --------------- struct pt_regs stored on stack (struct pt_regs *)
60 * | |
61 * . .
62 * | |
63 * --------------- ???
64 * | |
65 * | | \/ Lower addresses
66 *
67 * Thus, &pt_regs <-> stack base restricts the valid(ish) fp values
68 */
69static int valid_kernel_stack(unsigned long *stackaddr, struct pt_regs *regs)
70{
71 unsigned long stack = (unsigned long)regs;
72 unsigned long stack_base = (stack & ~(THREAD_SIZE - 1)) + THREAD_SIZE;
73
74 return ((unsigned long)stackaddr > stack) && ((unsigned long)stackaddr < stack_base);
75}
76
77static unsigned long *
78kernel_backtrace(unsigned long *stackaddr, struct pt_regs *regs)
79{
80 unsigned long addr;
81
82 /*
83 * If not a valid kernel address, keep going till we find one
84 * or the SP stops being a valid address.
85 */
86 do {
87 addr = *stackaddr++;
88 oprofile_add_trace(addr);
89 } while (valid_kernel_stack(stackaddr, regs));
90
91 return stackaddr;
92}
93
94void sh_backtrace(struct pt_regs * const regs, unsigned int depth) 84void sh_backtrace(struct pt_regs * const regs, unsigned int depth)
95{ 85{
96 unsigned long *stackaddr; 86 unsigned long *stackaddr;
@@ -103,9 +93,9 @@ void sh_backtrace(struct pt_regs * const regs, unsigned int depth)
103 93
104 stackaddr = (unsigned long *)regs->regs[15]; 94 stackaddr = (unsigned long *)regs->regs[15];
105 if (!user_mode(regs)) { 95 if (!user_mode(regs)) {
106 while (depth-- && valid_kernel_stack(stackaddr, regs)) 96 if (depth)
107 stackaddr = kernel_backtrace(stackaddr, regs); 97 unwind_stack(NULL, regs, stackaddr,
108 98 &backtrace_ops, &depth);
109 return; 99 return;
110 } 100 }
111 101
diff --git a/arch/sh/tools/mach-types b/arch/sh/tools/mach-types
index fec3a53b8650..09eef360dde1 100644
--- a/arch/sh/tools/mach-types
+++ b/arch/sh/tools/mach-types
@@ -56,3 +56,4 @@ SH7785LCR SH_SH7785LCR
56URQUELL SH_URQUELL 56URQUELL SH_URQUELL
57ESPT SH_ESPT 57ESPT SH_ESPT
58POLARIS SH_POLARIS 58POLARIS SH_POLARIS
59KFR2R09 SH_KFR2R09
diff --git a/drivers/serial/sh-sci.c b/drivers/serial/sh-sci.c
index 8e2feb563347..4cbb87ad070a 100644
--- a/drivers/serial/sh-sci.c
+++ b/drivers/serial/sh-sci.c
@@ -662,10 +662,11 @@ static irqreturn_t sci_rx_interrupt(int irq, void *port)
662static irqreturn_t sci_tx_interrupt(int irq, void *ptr) 662static irqreturn_t sci_tx_interrupt(int irq, void *ptr)
663{ 663{
664 struct uart_port *port = ptr; 664 struct uart_port *port = ptr;
665 unsigned long flags;
665 666
666 spin_lock_irq(&port->lock); 667 spin_lock_irqsave(&port->lock, flags);
667 sci_transmit_chars(port); 668 sci_transmit_chars(port);
668 spin_unlock_irq(&port->lock); 669 spin_unlock_irqrestore(&port->lock, flags);
669 670
670 return IRQ_HANDLED; 671 return IRQ_HANDLED;
671} 672}
diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
index 7f8e83a954ac..b7f10bc25c2c 100644
--- a/drivers/usb/gadget/Kconfig
+++ b/drivers/usb/gadget/Kconfig
@@ -360,16 +360,6 @@ config USB_M66592
360 default USB_GADGET 360 default USB_GADGET
361 select USB_GADGET_SELECTED 361 select USB_GADGET_SELECTED
362 362
363config SUPERH_BUILT_IN_M66592
364 boolean "Enable SuperH built-in USB like the M66592"
365 depends on USB_GADGET_M66592 && CPU_SUBTYPE_SH7722
366 help
367 SH7722 has USB like the M66592.
368
369 The transfer rate is very slow when use "Ethernet Gadget".
370 However, this problem is improved if change a value of
371 NET_IP_ALIGN to 4.
372
373# 363#
374# Controllers available only in discrete form (and all PCI controllers) 364# Controllers available only in discrete form (and all PCI controllers)
375# 365#
diff --git a/drivers/usb/gadget/m66592-udc.c b/drivers/usb/gadget/m66592-udc.c
index 43dcf9e1af6b..a61c70caff12 100644
--- a/drivers/usb/gadget/m66592-udc.c
+++ b/drivers/usb/gadget/m66592-udc.c
@@ -31,38 +31,12 @@
31 31
32#include "m66592-udc.h" 32#include "m66592-udc.h"
33 33
34
35MODULE_DESCRIPTION("M66592 USB gadget driver"); 34MODULE_DESCRIPTION("M66592 USB gadget driver");
36MODULE_LICENSE("GPL"); 35MODULE_LICENSE("GPL");
37MODULE_AUTHOR("Yoshihiro Shimoda"); 36MODULE_AUTHOR("Yoshihiro Shimoda");
38MODULE_ALIAS("platform:m66592_udc"); 37MODULE_ALIAS("platform:m66592_udc");
39 38
40#define DRIVER_VERSION "18 Oct 2007" 39#define DRIVER_VERSION "21 July 2009"
41
42/* module parameters */
43#if defined(CONFIG_SUPERH_BUILT_IN_M66592)
44static unsigned short endian = M66592_LITTLE;
45module_param(endian, ushort, 0644);
46MODULE_PARM_DESC(endian, "data endian: big=0, little=0 (default=0)");
47#else
48static unsigned short clock = M66592_XTAL24;
49module_param(clock, ushort, 0644);
50MODULE_PARM_DESC(clock, "input clock: 48MHz=32768, 24MHz=16384, 12MHz=0 "
51 "(default=16384)");
52
53static unsigned short vif = M66592_LDRV;
54module_param(vif, ushort, 0644);
55MODULE_PARM_DESC(vif, "input VIF: 3.3V=32768, 1.5V=0 (default=32768)");
56
57static unsigned short endian;
58module_param(endian, ushort, 0644);
59MODULE_PARM_DESC(endian, "data endian: big=256, little=0 (default=0)");
60
61static unsigned short irq_sense = M66592_INTL;
62module_param(irq_sense, ushort, 0644);
63MODULE_PARM_DESC(irq_sense, "IRQ sense: low level=2, falling edge=0 "
64 "(default=2)");
65#endif
66 40
67static const char udc_name[] = "m66592_udc"; 41static const char udc_name[] = "m66592_udc";
68static const char *m66592_ep_name[] = { 42static const char *m66592_ep_name[] = {
@@ -244,6 +218,7 @@ static inline int get_buffer_size(struct m66592 *m66592, u16 pipenum)
244static inline void pipe_change(struct m66592 *m66592, u16 pipenum) 218static inline void pipe_change(struct m66592 *m66592, u16 pipenum)
245{ 219{
246 struct m66592_ep *ep = m66592->pipenum2ep[pipenum]; 220 struct m66592_ep *ep = m66592->pipenum2ep[pipenum];
221 unsigned short mbw;
247 222
248 if (ep->use_dma) 223 if (ep->use_dma)
249 return; 224 return;
@@ -252,7 +227,12 @@ static inline void pipe_change(struct m66592 *m66592, u16 pipenum)
252 227
253 ndelay(450); 228 ndelay(450);
254 229
255 m66592_bset(m66592, M66592_MBW, ep->fifosel); 230 if (m66592->pdata->on_chip)
231 mbw = M66592_MBW_32;
232 else
233 mbw = M66592_MBW_16;
234
235 m66592_bset(m66592, mbw, ep->fifosel);
256} 236}
257 237
258static int pipe_buffer_setting(struct m66592 *m66592, 238static int pipe_buffer_setting(struct m66592 *m66592,
@@ -276,24 +256,27 @@ static int pipe_buffer_setting(struct m66592 *m66592,
276 buf_bsize = 0; 256 buf_bsize = 0;
277 break; 257 break;
278 case M66592_BULK: 258 case M66592_BULK:
279 bufnum = m66592->bi_bufnum + 259 /* isochronous pipes may be used as bulk pipes */
280 (info->pipe - M66592_BASE_PIPENUM_BULK) * 16; 260 if (info->pipe > M66592_BASE_PIPENUM_BULK)
281 m66592->bi_bufnum += 16; 261 bufnum = info->pipe - M66592_BASE_PIPENUM_BULK;
262 else
263 bufnum = info->pipe - M66592_BASE_PIPENUM_ISOC;
264
265 bufnum = M66592_BASE_BUFNUM + (bufnum * 16);
282 buf_bsize = 7; 266 buf_bsize = 7;
283 pipecfg |= M66592_DBLB; 267 pipecfg |= M66592_DBLB;
284 if (!info->dir_in) 268 if (!info->dir_in)
285 pipecfg |= M66592_SHTNAK; 269 pipecfg |= M66592_SHTNAK;
286 break; 270 break;
287 case M66592_ISO: 271 case M66592_ISO:
288 bufnum = m66592->bi_bufnum + 272 bufnum = M66592_BASE_BUFNUM +
289 (info->pipe - M66592_BASE_PIPENUM_ISOC) * 16; 273 (info->pipe - M66592_BASE_PIPENUM_ISOC) * 16;
290 m66592->bi_bufnum += 16;
291 buf_bsize = 7; 274 buf_bsize = 7;
292 break; 275 break;
293 } 276 }
294 if (m66592->bi_bufnum > M66592_MAX_BUFNUM) { 277
295 pr_err("m66592 pipe memory is insufficient(%d)\n", 278 if (buf_bsize && ((bufnum + 16) >= M66592_MAX_BUFNUM)) {
296 m66592->bi_bufnum); 279 pr_err("m66592 pipe memory is insufficient\n");
297 return -ENOMEM; 280 return -ENOMEM;
298 } 281 }
299 282
@@ -313,17 +296,6 @@ static void pipe_buffer_release(struct m66592 *m66592,
313 if (info->pipe == 0) 296 if (info->pipe == 0)
314 return; 297 return;
315 298
316 switch (info->type) {
317 case M66592_BULK:
318 if (is_bulk_pipe(info->pipe))
319 m66592->bi_bufnum -= 16;
320 break;
321 case M66592_ISO:
322 if (is_isoc_pipe(info->pipe))
323 m66592->bi_bufnum -= 16;
324 break;
325 }
326
327 if (is_bulk_pipe(info->pipe)) { 299 if (is_bulk_pipe(info->pipe)) {
328 m66592->bulk--; 300 m66592->bulk--;
329 } else if (is_interrupt_pipe(info->pipe)) 301 } else if (is_interrupt_pipe(info->pipe))
@@ -340,6 +312,7 @@ static void pipe_buffer_release(struct m66592 *m66592,
340static void pipe_initialize(struct m66592_ep *ep) 312static void pipe_initialize(struct m66592_ep *ep)
341{ 313{
342 struct m66592 *m66592 = ep->m66592; 314 struct m66592 *m66592 = ep->m66592;
315 unsigned short mbw;
343 316
344 m66592_mdfy(m66592, 0, M66592_CURPIPE, ep->fifosel); 317 m66592_mdfy(m66592, 0, M66592_CURPIPE, ep->fifosel);
345 318
@@ -351,7 +324,12 @@ static void pipe_initialize(struct m66592_ep *ep)
351 324
352 ndelay(450); 325 ndelay(450);
353 326
354 m66592_bset(m66592, M66592_MBW, ep->fifosel); 327 if (m66592->pdata->on_chip)
328 mbw = M66592_MBW_32;
329 else
330 mbw = M66592_MBW_16;
331
332 m66592_bset(m66592, mbw, ep->fifosel);
355 } 333 }
356} 334}
357 335
@@ -367,15 +345,13 @@ static void m66592_ep_setting(struct m66592 *m66592, struct m66592_ep *ep,
367 ep->fifosel = M66592_D0FIFOSEL; 345 ep->fifosel = M66592_D0FIFOSEL;
368 ep->fifoctr = M66592_D0FIFOCTR; 346 ep->fifoctr = M66592_D0FIFOCTR;
369 ep->fifotrn = M66592_D0FIFOTRN; 347 ep->fifotrn = M66592_D0FIFOTRN;
370#if !defined(CONFIG_SUPERH_BUILT_IN_M66592) 348 } else if (!m66592->pdata->on_chip && m66592->num_dma == 1) {
371 } else if (m66592->num_dma == 1) {
372 m66592->num_dma++; 349 m66592->num_dma++;
373 ep->use_dma = 1; 350 ep->use_dma = 1;
374 ep->fifoaddr = M66592_D1FIFO; 351 ep->fifoaddr = M66592_D1FIFO;
375 ep->fifosel = M66592_D1FIFOSEL; 352 ep->fifosel = M66592_D1FIFOSEL;
376 ep->fifoctr = M66592_D1FIFOCTR; 353 ep->fifoctr = M66592_D1FIFOCTR;
377 ep->fifotrn = M66592_D1FIFOTRN; 354 ep->fifotrn = M66592_D1FIFOTRN;
378#endif
379 } else { 355 } else {
380 ep->use_dma = 0; 356 ep->use_dma = 0;
381 ep->fifoaddr = M66592_CFIFO; 357 ep->fifoaddr = M66592_CFIFO;
@@ -620,76 +596,120 @@ static void start_ep0(struct m66592_ep *ep, struct m66592_request *req)
620 } 596 }
621} 597}
622 598
623#if defined(CONFIG_SUPERH_BUILT_IN_M66592)
624static void init_controller(struct m66592 *m66592) 599static void init_controller(struct m66592 *m66592)
625{ 600{
626 m66592_bset(m66592, M66592_HSE, M66592_SYSCFG); /* High spd */ 601 unsigned int endian;
627 m66592_bclr(m66592, M66592_USBE, M66592_SYSCFG);
628 m66592_bclr(m66592, M66592_DPRPU, M66592_SYSCFG);
629 m66592_bset(m66592, M66592_USBE, M66592_SYSCFG);
630 602
631 /* This is a workaound for SH7722 2nd cut */ 603 if (m66592->pdata->on_chip) {
632 m66592_bset(m66592, 0x8000, M66592_DVSTCTR); 604 if (m66592->pdata->endian)
633 m66592_bset(m66592, 0x1000, M66592_TESTMODE); 605 endian = 0; /* big endian */
634 m66592_bclr(m66592, 0x8000, M66592_DVSTCTR); 606 else
607 endian = M66592_LITTLE; /* little endian */
635 608
636 m66592_bset(m66592, M66592_INTL, M66592_INTENB1); 609 m66592_bset(m66592, M66592_HSE, M66592_SYSCFG); /* High spd */
610 m66592_bclr(m66592, M66592_USBE, M66592_SYSCFG);
611 m66592_bclr(m66592, M66592_DPRPU, M66592_SYSCFG);
612 m66592_bset(m66592, M66592_USBE, M66592_SYSCFG);
637 613
638 m66592_write(m66592, 0, M66592_CFBCFG); 614 /* This is a workaound for SH7722 2nd cut */
639 m66592_write(m66592, 0, M66592_D0FBCFG); 615 m66592_bset(m66592, 0x8000, M66592_DVSTCTR);
640 m66592_bset(m66592, endian, M66592_CFBCFG); 616 m66592_bset(m66592, 0x1000, M66592_TESTMODE);
641 m66592_bset(m66592, endian, M66592_D0FBCFG); 617 m66592_bclr(m66592, 0x8000, M66592_DVSTCTR);
642}
643#else /* #if defined(CONFIG_SUPERH_BUILT_IN_M66592) */
644static void init_controller(struct m66592 *m66592)
645{
646 m66592_bset(m66592, (vif & M66592_LDRV) | (endian & M66592_BIGEND),
647 M66592_PINCFG);
648 m66592_bset(m66592, M66592_HSE, M66592_SYSCFG); /* High spd */
649 m66592_mdfy(m66592, clock & M66592_XTAL, M66592_XTAL, M66592_SYSCFG);
650 618
651 m66592_bclr(m66592, M66592_USBE, M66592_SYSCFG); 619 m66592_bset(m66592, M66592_INTL, M66592_INTENB1);
652 m66592_bclr(m66592, M66592_DPRPU, M66592_SYSCFG);
653 m66592_bset(m66592, M66592_USBE, M66592_SYSCFG);
654 620
655 m66592_bset(m66592, M66592_XCKE, M66592_SYSCFG); 621 m66592_write(m66592, 0, M66592_CFBCFG);
622 m66592_write(m66592, 0, M66592_D0FBCFG);
623 m66592_bset(m66592, endian, M66592_CFBCFG);
624 m66592_bset(m66592, endian, M66592_D0FBCFG);
625 } else {
626 unsigned int clock, vif, irq_sense;
656 627
657 msleep(3); 628 if (m66592->pdata->endian)
629 endian = M66592_BIGEND; /* big endian */
630 else
631 endian = 0; /* little endian */
658 632
659 m66592_bset(m66592, M66592_RCKE | M66592_PLLC, M66592_SYSCFG); 633 if (m66592->pdata->vif)
634 vif = M66592_LDRV; /* 3.3v */
635 else
636 vif = 0; /* 1.5v */
660 637
661 msleep(1); 638 switch (m66592->pdata->xtal) {
639 case M66592_PLATDATA_XTAL_12MHZ:
640 clock = M66592_XTAL12;
641 break;
642 case M66592_PLATDATA_XTAL_24MHZ:
643 clock = M66592_XTAL24;
644 break;
645 case M66592_PLATDATA_XTAL_48MHZ:
646 clock = M66592_XTAL48;
647 break;
648 default:
649 pr_warning("m66592-udc: xtal configuration error\n");
650 clock = 0;
651 }
662 652
663 m66592_bset(m66592, M66592_SCKE, M66592_SYSCFG); 653 switch (m66592->irq_trigger) {
654 case IRQF_TRIGGER_LOW:
655 irq_sense = M66592_INTL;
656 break;
657 case IRQF_TRIGGER_FALLING:
658 irq_sense = 0;
659 break;
660 default:
661 pr_warning("m66592-udc: irq trigger config error\n");
662 irq_sense = 0;
663 }
664
665 m66592_bset(m66592,
666 (vif & M66592_LDRV) | (endian & M66592_BIGEND),
667 M66592_PINCFG);
668 m66592_bset(m66592, M66592_HSE, M66592_SYSCFG); /* High spd */
669 m66592_mdfy(m66592, clock & M66592_XTAL, M66592_XTAL,
670 M66592_SYSCFG);
671 m66592_bclr(m66592, M66592_USBE, M66592_SYSCFG);
672 m66592_bclr(m66592, M66592_DPRPU, M66592_SYSCFG);
673 m66592_bset(m66592, M66592_USBE, M66592_SYSCFG);
674
675 m66592_bset(m66592, M66592_XCKE, M66592_SYSCFG);
676
677 msleep(3);
664 678
665 m66592_bset(m66592, irq_sense & M66592_INTL, M66592_INTENB1); 679 m66592_bset(m66592, M66592_RCKE | M66592_PLLC, M66592_SYSCFG);
666 m66592_write(m66592, M66592_BURST | M66592_CPU_ADR_RD_WR, 680
667 M66592_DMA0CFG); 681 msleep(1);
682
683 m66592_bset(m66592, M66592_SCKE, M66592_SYSCFG);
684
685 m66592_bset(m66592, irq_sense & M66592_INTL, M66592_INTENB1);
686 m66592_write(m66592, M66592_BURST | M66592_CPU_ADR_RD_WR,
687 M66592_DMA0CFG);
688 }
668} 689}
669#endif /* #if defined(CONFIG_SUPERH_BUILT_IN_M66592) */
670 690
671static void disable_controller(struct m66592 *m66592) 691static void disable_controller(struct m66592 *m66592)
672{ 692{
673#if !defined(CONFIG_SUPERH_BUILT_IN_M66592) 693 if (!m66592->pdata->on_chip) {
674 m66592_bclr(m66592, M66592_SCKE, M66592_SYSCFG); 694 m66592_bclr(m66592, M66592_SCKE, M66592_SYSCFG);
675 udelay(1); 695 udelay(1);
676 m66592_bclr(m66592, M66592_PLLC, M66592_SYSCFG); 696 m66592_bclr(m66592, M66592_PLLC, M66592_SYSCFG);
677 udelay(1); 697 udelay(1);
678 m66592_bclr(m66592, M66592_RCKE, M66592_SYSCFG); 698 m66592_bclr(m66592, M66592_RCKE, M66592_SYSCFG);
679 udelay(1); 699 udelay(1);
680 m66592_bclr(m66592, M66592_XCKE, M66592_SYSCFG); 700 m66592_bclr(m66592, M66592_XCKE, M66592_SYSCFG);
681#endif 701 }
682} 702}
683 703
684static void m66592_start_xclock(struct m66592 *m66592) 704static void m66592_start_xclock(struct m66592 *m66592)
685{ 705{
686#if !defined(CONFIG_SUPERH_BUILT_IN_M66592)
687 u16 tmp; 706 u16 tmp;
688 707
689 tmp = m66592_read(m66592, M66592_SYSCFG); 708 if (!m66592->pdata->on_chip) {
690 if (!(tmp & M66592_XCKE)) 709 tmp = m66592_read(m66592, M66592_SYSCFG);
691 m66592_bset(m66592, M66592_XCKE, M66592_SYSCFG); 710 if (!(tmp & M66592_XCKE))
692#endif 711 m66592_bset(m66592, M66592_XCKE, M66592_SYSCFG);
712 }
693} 713}
694 714
695/*-------------------------------------------------------------------------*/ 715/*-------------------------------------------------------------------------*/
@@ -1177,8 +1197,7 @@ static irqreturn_t m66592_irq(int irq, void *_m66592)
1177 intsts0 = m66592_read(m66592, M66592_INTSTS0); 1197 intsts0 = m66592_read(m66592, M66592_INTSTS0);
1178 intenb0 = m66592_read(m66592, M66592_INTENB0); 1198 intenb0 = m66592_read(m66592, M66592_INTENB0);
1179 1199
1180#if defined(CONFIG_SUPERH_BUILT_IN_M66592) 1200 if (m66592->pdata->on_chip && !intsts0 && !intenb0) {
1181 if (!intsts0 && !intenb0) {
1182 /* 1201 /*
1183 * When USB clock stops, it cannot read register. Even if a 1202 * When USB clock stops, it cannot read register. Even if a
1184 * clock stops, the interrupt occurs. So this driver turn on 1203 * clock stops, the interrupt occurs. So this driver turn on
@@ -1188,7 +1207,6 @@ static irqreturn_t m66592_irq(int irq, void *_m66592)
1188 intsts0 = m66592_read(m66592, M66592_INTSTS0); 1207 intsts0 = m66592_read(m66592, M66592_INTSTS0);
1189 intenb0 = m66592_read(m66592, M66592_INTENB0); 1208 intenb0 = m66592_read(m66592, M66592_INTENB0);
1190 } 1209 }
1191#endif
1192 1210
1193 savepipe = m66592_read(m66592, M66592_CFIFOSEL); 1211 savepipe = m66592_read(m66592, M66592_CFIFOSEL);
1194 1212
@@ -1534,9 +1552,11 @@ static int __exit m66592_remove(struct platform_device *pdev)
1534 iounmap(m66592->reg); 1552 iounmap(m66592->reg);
1535 free_irq(platform_get_irq(pdev, 0), m66592); 1553 free_irq(platform_get_irq(pdev, 0), m66592);
1536 m66592_free_request(&m66592->ep[0].ep, m66592->ep0_req); 1554 m66592_free_request(&m66592->ep[0].ep, m66592->ep0_req);
1537#if defined(CONFIG_SUPERH_BUILT_IN_M66592) && defined(CONFIG_HAVE_CLK) 1555#ifdef CONFIG_HAVE_CLK
1538 clk_disable(m66592->clk); 1556 if (m66592->pdata->on_chip) {
1539 clk_put(m66592->clk); 1557 clk_disable(m66592->clk);
1558 clk_put(m66592->clk);
1559 }
1540#endif 1560#endif
1541 kfree(m66592); 1561 kfree(m66592);
1542 return 0; 1562 return 0;
@@ -1548,11 +1568,10 @@ static void nop_completion(struct usb_ep *ep, struct usb_request *r)
1548 1568
1549static int __init m66592_probe(struct platform_device *pdev) 1569static int __init m66592_probe(struct platform_device *pdev)
1550{ 1570{
1551 struct resource *res; 1571 struct resource *res, *ires;
1552 int irq;
1553 void __iomem *reg = NULL; 1572 void __iomem *reg = NULL;
1554 struct m66592 *m66592 = NULL; 1573 struct m66592 *m66592 = NULL;
1555#if defined(CONFIG_SUPERH_BUILT_IN_M66592) && defined(CONFIG_HAVE_CLK) 1574#ifdef CONFIG_HAVE_CLK
1556 char clk_name[8]; 1575 char clk_name[8];
1557#endif 1576#endif
1558 int ret = 0; 1577 int ret = 0;
@@ -1565,10 +1584,11 @@ static int __init m66592_probe(struct platform_device *pdev)
1565 goto clean_up; 1584 goto clean_up;
1566 } 1585 }
1567 1586
1568 irq = platform_get_irq(pdev, 0); 1587 ires = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1569 if (irq < 0) { 1588 if (!ires) {
1570 ret = -ENODEV; 1589 ret = -ENODEV;
1571 pr_err("platform_get_irq error.\n"); 1590 dev_err(&pdev->dev,
1591 "platform_get_resource IORESOURCE_IRQ error.\n");
1572 goto clean_up; 1592 goto clean_up;
1573 } 1593 }
1574 1594
@@ -1579,6 +1599,12 @@ static int __init m66592_probe(struct platform_device *pdev)
1579 goto clean_up; 1599 goto clean_up;
1580 } 1600 }
1581 1601
1602 if (pdev->dev.platform_data == NULL) {
1603 dev_err(&pdev->dev, "no platform data\n");
1604 ret = -ENODEV;
1605 goto clean_up;
1606 }
1607
1582 /* initialize ucd */ 1608 /* initialize ucd */
1583 m66592 = kzalloc(sizeof(struct m66592), GFP_KERNEL); 1609 m66592 = kzalloc(sizeof(struct m66592), GFP_KERNEL);
1584 if (m66592 == NULL) { 1610 if (m66592 == NULL) {
@@ -1586,6 +1612,9 @@ static int __init m66592_probe(struct platform_device *pdev)
1586 goto clean_up; 1612 goto clean_up;
1587 } 1613 }
1588 1614
1615 m66592->pdata = pdev->dev.platform_data;
1616 m66592->irq_trigger = ires->flags & IRQF_TRIGGER_MASK;
1617
1589 spin_lock_init(&m66592->lock); 1618 spin_lock_init(&m66592->lock);
1590 dev_set_drvdata(&pdev->dev, m66592); 1619 dev_set_drvdata(&pdev->dev, m66592);
1591 1620
@@ -1603,24 +1632,25 @@ static int __init m66592_probe(struct platform_device *pdev)
1603 m66592->timer.data = (unsigned long)m66592; 1632 m66592->timer.data = (unsigned long)m66592;
1604 m66592->reg = reg; 1633 m66592->reg = reg;
1605 1634
1606 m66592->bi_bufnum = M66592_BASE_BUFNUM; 1635 ret = request_irq(ires->start, m66592_irq, IRQF_DISABLED | IRQF_SHARED,
1607
1608 ret = request_irq(irq, m66592_irq, IRQF_DISABLED | IRQF_SHARED,
1609 udc_name, m66592); 1636 udc_name, m66592);
1610 if (ret < 0) { 1637 if (ret < 0) {
1611 pr_err("request_irq error (%d)\n", ret); 1638 pr_err("request_irq error (%d)\n", ret);
1612 goto clean_up; 1639 goto clean_up;
1613 } 1640 }
1614 1641
1615#if defined(CONFIG_SUPERH_BUILT_IN_M66592) && defined(CONFIG_HAVE_CLK) 1642#ifdef CONFIG_HAVE_CLK
1616 snprintf(clk_name, sizeof(clk_name), "usbf%d", pdev->id); 1643 if (m66592->pdata->on_chip) {
1617 m66592->clk = clk_get(&pdev->dev, clk_name); 1644 snprintf(clk_name, sizeof(clk_name), "usbf%d", pdev->id);
1618 if (IS_ERR(m66592->clk)) { 1645 m66592->clk = clk_get(&pdev->dev, clk_name);
1619 dev_err(&pdev->dev, "cannot get clock \"%s\"\n", clk_name); 1646 if (IS_ERR(m66592->clk)) {
1620 ret = PTR_ERR(m66592->clk); 1647 dev_err(&pdev->dev, "cannot get clock \"%s\"\n",
1621 goto clean_up2; 1648 clk_name);
1649 ret = PTR_ERR(m66592->clk);
1650 goto clean_up2;
1651 }
1652 clk_enable(m66592->clk);
1622 } 1653 }
1623 clk_enable(m66592->clk);
1624#endif 1654#endif
1625 INIT_LIST_HEAD(&m66592->gadget.ep_list); 1655 INIT_LIST_HEAD(&m66592->gadget.ep_list);
1626 m66592->gadget.ep0 = &m66592->ep[0].ep; 1656 m66592->gadget.ep0 = &m66592->ep[0].ep;
@@ -1662,12 +1692,14 @@ static int __init m66592_probe(struct platform_device *pdev)
1662 return 0; 1692 return 0;
1663 1693
1664clean_up3: 1694clean_up3:
1665#if defined(CONFIG_SUPERH_BUILT_IN_M66592) && defined(CONFIG_HAVE_CLK) 1695#ifdef CONFIG_HAVE_CLK
1666 clk_disable(m66592->clk); 1696 if (m66592->pdata->on_chip) {
1667 clk_put(m66592->clk); 1697 clk_disable(m66592->clk);
1698 clk_put(m66592->clk);
1699 }
1668clean_up2: 1700clean_up2:
1669#endif 1701#endif
1670 free_irq(irq, m66592); 1702 free_irq(ires->start, m66592);
1671clean_up: 1703clean_up:
1672 if (m66592) { 1704 if (m66592) {
1673 if (m66592->ep0_req) 1705 if (m66592->ep0_req)
diff --git a/drivers/usb/gadget/m66592-udc.h b/drivers/usb/gadget/m66592-udc.h
index 286ce07e7960..8b960deed680 100644
--- a/drivers/usb/gadget/m66592-udc.h
+++ b/drivers/usb/gadget/m66592-udc.h
@@ -23,10 +23,12 @@
23#ifndef __M66592_UDC_H__ 23#ifndef __M66592_UDC_H__
24#define __M66592_UDC_H__ 24#define __M66592_UDC_H__
25 25
26#if defined(CONFIG_SUPERH_BUILT_IN_M66592) && defined(CONFIG_HAVE_CLK) 26#ifdef CONFIG_HAVE_CLK
27#include <linux/clk.h> 27#include <linux/clk.h>
28#endif 28#endif
29 29
30#include <linux/usb/m66592.h>
31
30#define M66592_SYSCFG 0x00 32#define M66592_SYSCFG 0x00
31#define M66592_XTAL 0xC000 /* b15-14: Crystal selection */ 33#define M66592_XTAL 0xC000 /* b15-14: Crystal selection */
32#define M66592_XTAL48 0x8000 /* 48MHz */ 34#define M66592_XTAL48 0x8000 /* 48MHz */
@@ -76,11 +78,11 @@
76#define M66592_P_TST_J 0x0001 /* PERI TEST J */ 78#define M66592_P_TST_J 0x0001 /* PERI TEST J */
77#define M66592_P_TST_NORMAL 0x0000 /* PERI Normal Mode */ 79#define M66592_P_TST_NORMAL 0x0000 /* PERI Normal Mode */
78 80
79#if defined(CONFIG_SUPERH_BUILT_IN_M66592) 81/* built-in registers */
80#define M66592_CFBCFG 0x0A 82#define M66592_CFBCFG 0x0A
81#define M66592_D0FBCFG 0x0C 83#define M66592_D0FBCFG 0x0C
82#define M66592_LITTLE 0x0100 /* b8: Little endian mode */ 84#define M66592_LITTLE 0x0100 /* b8: Little endian mode */
83#else 85/* external chip case */
84#define M66592_PINCFG 0x0A 86#define M66592_PINCFG 0x0A
85#define M66592_LDRV 0x8000 /* b15: Drive Current Adjust */ 87#define M66592_LDRV 0x8000 /* b15: Drive Current Adjust */
86#define M66592_BIGEND 0x0100 /* b8: Big endian mode */ 88#define M66592_BIGEND 0x0100 /* b8: Big endian mode */
@@ -100,8 +102,8 @@
100#define M66592_PKTM 0x0020 /* b5: Packet mode */ 102#define M66592_PKTM 0x0020 /* b5: Packet mode */
101#define M66592_DENDE 0x0010 /* b4: Dend enable */ 103#define M66592_DENDE 0x0010 /* b4: Dend enable */
102#define M66592_OBUS 0x0004 /* b2: OUTbus mode */ 104#define M66592_OBUS 0x0004 /* b2: OUTbus mode */
103#endif /* #if defined(CONFIG_SUPERH_BUILT_IN_M66592) */
104 105
106/* common case */
105#define M66592_CFIFO 0x10 107#define M66592_CFIFO 0x10
106#define M66592_D0FIFO 0x14 108#define M66592_D0FIFO 0x14
107#define M66592_D1FIFO 0x18 109#define M66592_D1FIFO 0x18
@@ -113,13 +115,9 @@
113#define M66592_REW 0x4000 /* b14: Buffer rewind */ 115#define M66592_REW 0x4000 /* b14: Buffer rewind */
114#define M66592_DCLRM 0x2000 /* b13: DMA buffer clear mode */ 116#define M66592_DCLRM 0x2000 /* b13: DMA buffer clear mode */
115#define M66592_DREQE 0x1000 /* b12: DREQ output enable */ 117#define M66592_DREQE 0x1000 /* b12: DREQ output enable */
116#if defined(CONFIG_SUPERH_BUILT_IN_M66592) 118#define M66592_MBW_8 0x0000 /* 8bit */
117#define M66592_MBW 0x0800 /* b11: Maximum bit width for FIFO */ 119#define M66592_MBW_16 0x0400 /* 16bit */
118#else 120#define M66592_MBW_32 0x0800 /* 32bit */
119#define M66592_MBW 0x0400 /* b10: Maximum bit width for FIFO */
120#define M66592_MBW_8 0x0000 /* 8bit */
121#define M66592_MBW_16 0x0400 /* 16bit */
122#endif /* #if defined(CONFIG_SUPERH_BUILT_IN_M66592) */
123#define M66592_TRENB 0x0200 /* b9: Transaction counter enable */ 121#define M66592_TRENB 0x0200 /* b9: Transaction counter enable */
124#define M66592_TRCLR 0x0100 /* b8: Transaction counter clear */ 122#define M66592_TRCLR 0x0100 /* b8: Transaction counter clear */
125#define M66592_DEZPM 0x0080 /* b7: Zero-length packet mode */ 123#define M66592_DEZPM 0x0080 /* b7: Zero-length packet mode */
@@ -480,9 +478,11 @@ struct m66592_ep {
480struct m66592 { 478struct m66592 {
481 spinlock_t lock; 479 spinlock_t lock;
482 void __iomem *reg; 480 void __iomem *reg;
483#if defined(CONFIG_SUPERH_BUILT_IN_M66592) && defined(CONFIG_HAVE_CLK) 481#ifdef CONFIG_HAVE_CLK
484 struct clk *clk; 482 struct clk *clk;
485#endif 483#endif
484 struct m66592_platdata *pdata;
485 unsigned long irq_trigger;
486 486
487 struct usb_gadget gadget; 487 struct usb_gadget gadget;
488 struct usb_gadget_driver *driver; 488 struct usb_gadget_driver *driver;
@@ -506,7 +506,6 @@ struct m66592 {
506 int interrupt; 506 int interrupt;
507 int isochronous; 507 int isochronous;
508 int num_dma; 508 int num_dma;
509 int bi_bufnum; /* bulk and isochronous's bufnum */
510}; 509};
511 510
512#define gadget_to_m66592(_gadget) container_of(_gadget, struct m66592, gadget) 511#define gadget_to_m66592(_gadget) container_of(_gadget, struct m66592, gadget)
@@ -547,13 +546,13 @@ static inline void m66592_read_fifo(struct m66592 *m66592,
547{ 546{
548 unsigned long fifoaddr = (unsigned long)m66592->reg + offset; 547 unsigned long fifoaddr = (unsigned long)m66592->reg + offset;
549 548
550#if defined(CONFIG_SUPERH_BUILT_IN_M66592) 549 if (m66592->pdata->on_chip) {
551 len = (len + 3) / 4; 550 len = (len + 3) / 4;
552 insl(fifoaddr, buf, len); 551 insl(fifoaddr, buf, len);
553#else 552 } else {
554 len = (len + 1) / 2; 553 len = (len + 1) / 2;
555 insw(fifoaddr, buf, len); 554 insw(fifoaddr, buf, len);
556#endif 555 }
557} 556}
558 557
559static inline void m66592_write(struct m66592 *m66592, u16 val, 558static inline void m66592_write(struct m66592 *m66592, u16 val,
@@ -567,33 +566,34 @@ static inline void m66592_write_fifo(struct m66592 *m66592,
567 void *buf, unsigned long len) 566 void *buf, unsigned long len)
568{ 567{
569 unsigned long fifoaddr = (unsigned long)m66592->reg + offset; 568 unsigned long fifoaddr = (unsigned long)m66592->reg + offset;
570#if defined(CONFIG_SUPERH_BUILT_IN_M66592) 569
571 unsigned long count; 570 if (m66592->pdata->on_chip) {
572 unsigned char *pb; 571 unsigned long count;
573 int i; 572 unsigned char *pb;
574 573 int i;
575 count = len / 4; 574
576 outsl(fifoaddr, buf, count); 575 count = len / 4;
577 576 outsl(fifoaddr, buf, count);
578 if (len & 0x00000003) { 577
579 pb = buf + count * 4; 578 if (len & 0x00000003) {
580 for (i = 0; i < (len & 0x00000003); i++) { 579 pb = buf + count * 4;
581 if (m66592_read(m66592, M66592_CFBCFG)) /* little */ 580 for (i = 0; i < (len & 0x00000003); i++) {
582 outb(pb[i], fifoaddr + (3 - i)); 581 if (m66592_read(m66592, M66592_CFBCFG)) /* le */
583 else 582 outb(pb[i], fifoaddr + (3 - i));
584 outb(pb[i], fifoaddr + i); 583 else
584 outb(pb[i], fifoaddr + i);
585 }
586 }
587 } else {
588 unsigned long odd = len & 0x0001;
589
590 len = len / 2;
591 outsw(fifoaddr, buf, len);
592 if (odd) {
593 unsigned char *p = buf + len*2;
594 outb(*p, fifoaddr);
585 } 595 }
586 } 596 }
587#else
588 unsigned long odd = len & 0x0001;
589
590 len = len / 2;
591 outsw(fifoaddr, buf, len);
592 if (odd) {
593 unsigned char *p = buf + len*2;
594 outb(*p, fifoaddr);
595 }
596#endif /* #if defined(CONFIG_SUPERH_BUILT_IN_M66592) */
597} 597}
598 598
599static inline void m66592_mdfy(struct m66592 *m66592, u16 val, u16 pat, 599static inline void m66592_mdfy(struct m66592 *m66592, u16 val, u16 pat,
diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index 1a920c70b5a1..f21ca7d27a43 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -336,13 +336,6 @@ config USB_R8A66597_HCD
336 To compile this driver as a module, choose M here: the 336 To compile this driver as a module, choose M here: the
337 module will be called r8a66597-hcd. 337 module will be called r8a66597-hcd.
338 338
339config SUPERH_ON_CHIP_R8A66597
340 boolean "Enable SuperH on-chip R8A66597 USB"
341 depends on USB_R8A66597_HCD && (CPU_SUBTYPE_SH7366 || CPU_SUBTYPE_SH7723 || CPU_SUBTYPE_SH7724)
342 help
343 This driver enables support for the on-chip R8A66597 in the
344 SH7366, SH7723 and SH7724 processors.
345
346config USB_WHCI_HCD 339config USB_WHCI_HCD
347 tristate "Wireless USB Host Controller Interface (WHCI) driver (EXPERIMENTAL)" 340 tristate "Wireless USB Host Controller Interface (WHCI) driver (EXPERIMENTAL)"
348 depends on EXPERIMENTAL 341 depends on EXPERIMENTAL
diff --git a/drivers/usb/host/r8a66597-hcd.c b/drivers/usb/host/r8a66597-hcd.c
index e18f74946e68..749b53742828 100644
--- a/drivers/usb/host/r8a66597-hcd.c
+++ b/drivers/usb/host/r8a66597-hcd.c
@@ -91,43 +91,43 @@ static int r8a66597_clock_enable(struct r8a66597 *r8a66597)
91 u16 tmp; 91 u16 tmp;
92 int i = 0; 92 int i = 0;
93 93
94#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) 94 if (r8a66597->pdata->on_chip) {
95#if defined(CONFIG_HAVE_CLK) 95#ifdef CONFIG_HAVE_CLK
96 clk_enable(r8a66597->clk); 96 clk_enable(r8a66597->clk);
97#endif 97#endif
98 do { 98 do {
99 r8a66597_write(r8a66597, SCKE, SYSCFG0); 99 r8a66597_write(r8a66597, SCKE, SYSCFG0);
100 tmp = r8a66597_read(r8a66597, SYSCFG0); 100 tmp = r8a66597_read(r8a66597, SYSCFG0);
101 if (i++ > 1000) { 101 if (i++ > 1000) {
102 printk(KERN_ERR "r8a66597: register access fail.\n"); 102 printk(KERN_ERR "r8a66597: reg access fail.\n");
103 return -ENXIO; 103 return -ENXIO;
104 } 104 }
105 } while ((tmp & SCKE) != SCKE); 105 } while ((tmp & SCKE) != SCKE);
106 r8a66597_write(r8a66597, 0x04, 0x02); 106 r8a66597_write(r8a66597, 0x04, 0x02);
107#else 107 } else {
108 do { 108 do {
109 r8a66597_write(r8a66597, USBE, SYSCFG0); 109 r8a66597_write(r8a66597, USBE, SYSCFG0);
110 tmp = r8a66597_read(r8a66597, SYSCFG0); 110 tmp = r8a66597_read(r8a66597, SYSCFG0);
111 if (i++ > 1000) { 111 if (i++ > 1000) {
112 printk(KERN_ERR "r8a66597: register access fail.\n"); 112 printk(KERN_ERR "r8a66597: reg access fail.\n");
113 return -ENXIO; 113 return -ENXIO;
114 } 114 }
115 } while ((tmp & USBE) != USBE); 115 } while ((tmp & USBE) != USBE);
116 r8a66597_bclr(r8a66597, USBE, SYSCFG0); 116 r8a66597_bclr(r8a66597, USBE, SYSCFG0);
117 r8a66597_mdfy(r8a66597, get_xtal_from_pdata(r8a66597->pdata), XTAL, 117 r8a66597_mdfy(r8a66597, get_xtal_from_pdata(r8a66597->pdata),
118 SYSCFG0); 118 XTAL, SYSCFG0);
119 119
120 i = 0; 120 i = 0;
121 r8a66597_bset(r8a66597, XCKE, SYSCFG0); 121 r8a66597_bset(r8a66597, XCKE, SYSCFG0);
122 do { 122 do {
123 msleep(1); 123 msleep(1);
124 tmp = r8a66597_read(r8a66597, SYSCFG0); 124 tmp = r8a66597_read(r8a66597, SYSCFG0);
125 if (i++ > 500) { 125 if (i++ > 500) {
126 printk(KERN_ERR "r8a66597: register access fail.\n"); 126 printk(KERN_ERR "r8a66597: reg access fail.\n");
127 return -ENXIO; 127 return -ENXIO;
128 } 128 }
129 } while ((tmp & SCKE) != SCKE); 129 } while ((tmp & SCKE) != SCKE);
130#endif /* #if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) */ 130 }
131 131
132 return 0; 132 return 0;
133} 133}
@@ -136,15 +136,16 @@ static void r8a66597_clock_disable(struct r8a66597 *r8a66597)
136{ 136{
137 r8a66597_bclr(r8a66597, SCKE, SYSCFG0); 137 r8a66597_bclr(r8a66597, SCKE, SYSCFG0);
138 udelay(1); 138 udelay(1);
139#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) 139
140#if defined(CONFIG_HAVE_CLK) 140 if (r8a66597->pdata->on_chip) {
141 clk_disable(r8a66597->clk); 141#ifdef CONFIG_HAVE_CLK
142#endif 142 clk_disable(r8a66597->clk);
143#else
144 r8a66597_bclr(r8a66597, PLLC, SYSCFG0);
145 r8a66597_bclr(r8a66597, XCKE, SYSCFG0);
146 r8a66597_bclr(r8a66597, USBE, SYSCFG0);
147#endif 143#endif
144 } else {
145 r8a66597_bclr(r8a66597, PLLC, SYSCFG0);
146 r8a66597_bclr(r8a66597, XCKE, SYSCFG0);
147 r8a66597_bclr(r8a66597, USBE, SYSCFG0);
148 }
148} 149}
149 150
150static void r8a66597_enable_port(struct r8a66597 *r8a66597, int port) 151static void r8a66597_enable_port(struct r8a66597 *r8a66597, int port)
@@ -205,7 +206,7 @@ static int enable_controller(struct r8a66597 *r8a66597)
205 206
206 r8a66597_bset(r8a66597, SIGNE | SACKE, INTENB1); 207 r8a66597_bset(r8a66597, SIGNE | SACKE, INTENB1);
207 208
208 for (port = 0; port < R8A66597_MAX_ROOT_HUB; port++) 209 for (port = 0; port < r8a66597->max_root_hub; port++)
209 r8a66597_enable_port(r8a66597, port); 210 r8a66597_enable_port(r8a66597, port);
210 211
211 return 0; 212 return 0;
@@ -218,7 +219,7 @@ static void disable_controller(struct r8a66597 *r8a66597)
218 r8a66597_write(r8a66597, 0, INTENB0); 219 r8a66597_write(r8a66597, 0, INTENB0);
219 r8a66597_write(r8a66597, 0, INTSTS0); 220 r8a66597_write(r8a66597, 0, INTSTS0);
220 221
221 for (port = 0; port < R8A66597_MAX_ROOT_HUB; port++) 222 for (port = 0; port < r8a66597->max_root_hub; port++)
222 r8a66597_disable_port(r8a66597, port); 223 r8a66597_disable_port(r8a66597, port);
223 224
224 r8a66597_clock_disable(r8a66597); 225 r8a66597_clock_disable(r8a66597);
@@ -249,11 +250,12 @@ static int is_hub_limit(char *devpath)
249 return ((strlen(devpath) >= 4) ? 1 : 0); 250 return ((strlen(devpath) >= 4) ? 1 : 0);
250} 251}
251 252
252static void get_port_number(char *devpath, u16 *root_port, u16 *hub_port) 253static void get_port_number(struct r8a66597 *r8a66597,
254 char *devpath, u16 *root_port, u16 *hub_port)
253{ 255{
254 if (root_port) { 256 if (root_port) {
255 *root_port = (devpath[0] & 0x0F) - 1; 257 *root_port = (devpath[0] & 0x0F) - 1;
256 if (*root_port >= R8A66597_MAX_ROOT_HUB) 258 if (*root_port >= r8a66597->max_root_hub)
257 printk(KERN_ERR "r8a66597: Illegal root port number.\n"); 259 printk(KERN_ERR "r8a66597: Illegal root port number.\n");
258 } 260 }
259 if (hub_port) 261 if (hub_port)
@@ -355,7 +357,8 @@ static int make_r8a66597_device(struct r8a66597 *r8a66597,
355 INIT_LIST_HEAD(&dev->device_list); 357 INIT_LIST_HEAD(&dev->device_list);
356 list_add_tail(&dev->device_list, &r8a66597->child_device); 358 list_add_tail(&dev->device_list, &r8a66597->child_device);
357 359
358 get_port_number(urb->dev->devpath, &dev->root_port, &dev->hub_port); 360 get_port_number(r8a66597, urb->dev->devpath,
361 &dev->root_port, &dev->hub_port);
359 if (!is_child_device(urb->dev->devpath)) 362 if (!is_child_device(urb->dev->devpath))
360 r8a66597->root_hub[dev->root_port].dev = dev; 363 r8a66597->root_hub[dev->root_port].dev = dev;
361 364
@@ -420,7 +423,7 @@ static void free_usb_address(struct r8a66597 *r8a66597,
420 list_del(&dev->device_list); 423 list_del(&dev->device_list);
421 kfree(dev); 424 kfree(dev);
422 425
423 for (port = 0; port < R8A66597_MAX_ROOT_HUB; port++) { 426 for (port = 0; port < r8a66597->max_root_hub; port++) {
424 if (r8a66597->root_hub[port].dev == dev) { 427 if (r8a66597->root_hub[port].dev == dev) {
425 r8a66597->root_hub[port].dev = NULL; 428 r8a66597->root_hub[port].dev = NULL;
426 break; 429 break;
@@ -495,10 +498,20 @@ static void r8a66597_pipe_toggle(struct r8a66597 *r8a66597,
495 r8a66597_bset(r8a66597, SQCLR, pipe->pipectr); 498 r8a66597_bset(r8a66597, SQCLR, pipe->pipectr);
496} 499}
497 500
501static inline unsigned short mbw_value(struct r8a66597 *r8a66597)
502{
503 if (r8a66597->pdata->on_chip)
504 return MBW_32;
505 else
506 return MBW_16;
507}
508
498/* this function must be called with interrupt disabled */ 509/* this function must be called with interrupt disabled */
499static inline void cfifo_change(struct r8a66597 *r8a66597, u16 pipenum) 510static inline void cfifo_change(struct r8a66597 *r8a66597, u16 pipenum)
500{ 511{
501 r8a66597_mdfy(r8a66597, MBW | pipenum, MBW | CURPIPE, CFIFOSEL); 512 unsigned short mbw = mbw_value(r8a66597);
513
514 r8a66597_mdfy(r8a66597, mbw | pipenum, mbw | CURPIPE, CFIFOSEL);
502 r8a66597_reg_wait(r8a66597, CFIFOSEL, CURPIPE, pipenum); 515 r8a66597_reg_wait(r8a66597, CFIFOSEL, CURPIPE, pipenum);
503} 516}
504 517
@@ -506,11 +519,13 @@ static inline void cfifo_change(struct r8a66597 *r8a66597, u16 pipenum)
506static inline void fifo_change_from_pipe(struct r8a66597 *r8a66597, 519static inline void fifo_change_from_pipe(struct r8a66597 *r8a66597,
507 struct r8a66597_pipe *pipe) 520 struct r8a66597_pipe *pipe)
508{ 521{
522 unsigned short mbw = mbw_value(r8a66597);
523
509 cfifo_change(r8a66597, 0); 524 cfifo_change(r8a66597, 0);
510 r8a66597_mdfy(r8a66597, MBW | 0, MBW | CURPIPE, D0FIFOSEL); 525 r8a66597_mdfy(r8a66597, mbw | 0, mbw | CURPIPE, D0FIFOSEL);
511 r8a66597_mdfy(r8a66597, MBW | 0, MBW | CURPIPE, D1FIFOSEL); 526 r8a66597_mdfy(r8a66597, mbw | 0, mbw | CURPIPE, D1FIFOSEL);
512 527
513 r8a66597_mdfy(r8a66597, MBW | pipe->info.pipenum, MBW | CURPIPE, 528 r8a66597_mdfy(r8a66597, mbw | pipe->info.pipenum, mbw | CURPIPE,
514 pipe->fifosel); 529 pipe->fifosel);
515 r8a66597_reg_wait(r8a66597, pipe->fifosel, CURPIPE, pipe->info.pipenum); 530 r8a66597_reg_wait(r8a66597, pipe->fifosel, CURPIPE, pipe->info.pipenum);
516} 531}
@@ -742,9 +757,13 @@ static void enable_r8a66597_pipe_dma(struct r8a66597 *r8a66597,
742 struct r8a66597_pipe *pipe, 757 struct r8a66597_pipe *pipe,
743 struct urb *urb) 758 struct urb *urb)
744{ 759{
745#if !defined(CONFIG_SUPERH_ON_CHIP_R8A66597)
746 int i; 760 int i;
747 struct r8a66597_pipe_info *info = &pipe->info; 761 struct r8a66597_pipe_info *info = &pipe->info;
762 unsigned short mbw = mbw_value(r8a66597);
763
764 /* pipe dma is only for external controlles */
765 if (r8a66597->pdata->on_chip)
766 return;
748 767
749 if ((pipe->info.pipenum != 0) && (info->type != R8A66597_INT)) { 768 if ((pipe->info.pipenum != 0) && (info->type != R8A66597_INT)) {
750 for (i = 0; i < R8A66597_MAX_DMA_CHANNEL; i++) { 769 for (i = 0; i < R8A66597_MAX_DMA_CHANNEL; i++) {
@@ -763,8 +782,8 @@ static void enable_r8a66597_pipe_dma(struct r8a66597 *r8a66597,
763 set_pipe_reg_addr(pipe, i); 782 set_pipe_reg_addr(pipe, i);
764 783
765 cfifo_change(r8a66597, 0); 784 cfifo_change(r8a66597, 0);
766 r8a66597_mdfy(r8a66597, MBW | pipe->info.pipenum, 785 r8a66597_mdfy(r8a66597, mbw | pipe->info.pipenum,
767 MBW | CURPIPE, pipe->fifosel); 786 mbw | CURPIPE, pipe->fifosel);
768 787
769 r8a66597_reg_wait(r8a66597, pipe->fifosel, CURPIPE, 788 r8a66597_reg_wait(r8a66597, pipe->fifosel, CURPIPE,
770 pipe->info.pipenum); 789 pipe->info.pipenum);
@@ -772,7 +791,6 @@ static void enable_r8a66597_pipe_dma(struct r8a66597 *r8a66597,
772 break; 791 break;
773 } 792 }
774 } 793 }
775#endif /* #if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) */
776} 794}
777 795
778/* this function must be called with interrupt disabled */ 796/* this function must be called with interrupt disabled */
@@ -1769,7 +1787,7 @@ static void r8a66597_timer(unsigned long _r8a66597)
1769 1787
1770 spin_lock_irqsave(&r8a66597->lock, flags); 1788 spin_lock_irqsave(&r8a66597->lock, flags);
1771 1789
1772 for (port = 0; port < R8A66597_MAX_ROOT_HUB; port++) 1790 for (port = 0; port < r8a66597->max_root_hub; port++)
1773 r8a66597_root_hub_control(r8a66597, port); 1791 r8a66597_root_hub_control(r8a66597, port);
1774 1792
1775 spin_unlock_irqrestore(&r8a66597->lock, flags); 1793 spin_unlock_irqrestore(&r8a66597->lock, flags);
@@ -1807,7 +1825,7 @@ static void set_address_zero(struct r8a66597 *r8a66597, struct urb *urb)
1807 u16 root_port, hub_port; 1825 u16 root_port, hub_port;
1808 1826
1809 if (usb_address == 0) { 1827 if (usb_address == 0) {
1810 get_port_number(urb->dev->devpath, 1828 get_port_number(r8a66597, urb->dev->devpath,
1811 &root_port, &hub_port); 1829 &root_port, &hub_port);
1812 set_devadd_reg(r8a66597, 0, 1830 set_devadd_reg(r8a66597, 0,
1813 get_r8a66597_usb_speed(urb->dev->speed), 1831 get_r8a66597_usb_speed(urb->dev->speed),
@@ -2082,7 +2100,7 @@ static int r8a66597_hub_status_data(struct usb_hcd *hcd, char *buf)
2082 2100
2083 *buf = 0; /* initialize (no change) */ 2101 *buf = 0; /* initialize (no change) */
2084 2102
2085 for (i = 0; i < R8A66597_MAX_ROOT_HUB; i++) { 2103 for (i = 0; i < r8a66597->max_root_hub; i++) {
2086 if (r8a66597->root_hub[i].port & 0xffff0000) 2104 if (r8a66597->root_hub[i].port & 0xffff0000)
2087 *buf |= 1 << (i + 1); 2105 *buf |= 1 << (i + 1);
2088 } 2106 }
@@ -2097,11 +2115,11 @@ static void r8a66597_hub_descriptor(struct r8a66597 *r8a66597,
2097{ 2115{
2098 desc->bDescriptorType = 0x29; 2116 desc->bDescriptorType = 0x29;
2099 desc->bHubContrCurrent = 0; 2117 desc->bHubContrCurrent = 0;
2100 desc->bNbrPorts = R8A66597_MAX_ROOT_HUB; 2118 desc->bNbrPorts = r8a66597->max_root_hub;
2101 desc->bDescLength = 9; 2119 desc->bDescLength = 9;
2102 desc->bPwrOn2PwrGood = 0; 2120 desc->bPwrOn2PwrGood = 0;
2103 desc->wHubCharacteristics = cpu_to_le16(0x0011); 2121 desc->wHubCharacteristics = cpu_to_le16(0x0011);
2104 desc->bitmap[0] = ((1 << R8A66597_MAX_ROOT_HUB) - 1) << 1; 2122 desc->bitmap[0] = ((1 << r8a66597->max_root_hub) - 1) << 1;
2105 desc->bitmap[1] = ~0; 2123 desc->bitmap[1] = ~0;
2106} 2124}
2107 2125
@@ -2129,7 +2147,7 @@ static int r8a66597_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
2129 } 2147 }
2130 break; 2148 break;
2131 case ClearPortFeature: 2149 case ClearPortFeature:
2132 if (wIndex > R8A66597_MAX_ROOT_HUB) 2150 if (wIndex > r8a66597->max_root_hub)
2133 goto error; 2151 goto error;
2134 if (wLength != 0) 2152 if (wLength != 0)
2135 goto error; 2153 goto error;
@@ -2162,12 +2180,12 @@ static int r8a66597_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
2162 *buf = 0x00; 2180 *buf = 0x00;
2163 break; 2181 break;
2164 case GetPortStatus: 2182 case GetPortStatus:
2165 if (wIndex > R8A66597_MAX_ROOT_HUB) 2183 if (wIndex > r8a66597->max_root_hub)
2166 goto error; 2184 goto error;
2167 *(__le32 *)buf = cpu_to_le32(rh->port); 2185 *(__le32 *)buf = cpu_to_le32(rh->port);
2168 break; 2186 break;
2169 case SetPortFeature: 2187 case SetPortFeature:
2170 if (wIndex > R8A66597_MAX_ROOT_HUB) 2188 if (wIndex > r8a66597->max_root_hub)
2171 goto error; 2189 goto error;
2172 if (wLength != 0) 2190 if (wLength != 0)
2173 goto error; 2191 goto error;
@@ -2216,7 +2234,7 @@ static int r8a66597_bus_suspend(struct usb_hcd *hcd)
2216 2234
2217 dbg("%s", __func__); 2235 dbg("%s", __func__);
2218 2236
2219 for (port = 0; port < R8A66597_MAX_ROOT_HUB; port++) { 2237 for (port = 0; port < r8a66597->max_root_hub; port++) {
2220 struct r8a66597_root_hub *rh = &r8a66597->root_hub[port]; 2238 struct r8a66597_root_hub *rh = &r8a66597->root_hub[port];
2221 unsigned long dvstctr_reg = get_dvstctr_reg(port); 2239 unsigned long dvstctr_reg = get_dvstctr_reg(port);
2222 2240
@@ -2247,7 +2265,7 @@ static int r8a66597_bus_resume(struct usb_hcd *hcd)
2247 2265
2248 dbg("%s", __func__); 2266 dbg("%s", __func__);
2249 2267
2250 for (port = 0; port < R8A66597_MAX_ROOT_HUB; port++) { 2268 for (port = 0; port < r8a66597->max_root_hub; port++) {
2251 struct r8a66597_root_hub *rh = &r8a66597->root_hub[port]; 2269 struct r8a66597_root_hub *rh = &r8a66597->root_hub[port];
2252 unsigned long dvstctr_reg = get_dvstctr_reg(port); 2270 unsigned long dvstctr_reg = get_dvstctr_reg(port);
2253 2271
@@ -2305,16 +2323,16 @@ static struct hc_driver r8a66597_hc_driver = {
2305}; 2323};
2306 2324
2307#if defined(CONFIG_PM) 2325#if defined(CONFIG_PM)
2308static int r8a66597_suspend(struct platform_device *pdev, pm_message_t state) 2326static int r8a66597_suspend(struct device *dev)
2309{ 2327{
2310 struct r8a66597 *r8a66597 = dev_get_drvdata(&pdev->dev); 2328 struct r8a66597 *r8a66597 = dev_get_drvdata(dev);
2311 int port; 2329 int port;
2312 2330
2313 dbg("%s", __func__); 2331 dbg("%s", __func__);
2314 2332
2315 disable_controller(r8a66597); 2333 disable_controller(r8a66597);
2316 2334
2317 for (port = 0; port < R8A66597_MAX_ROOT_HUB; port++) { 2335 for (port = 0; port < r8a66597->max_root_hub; port++) {
2318 struct r8a66597_root_hub *rh = &r8a66597->root_hub[port]; 2336 struct r8a66597_root_hub *rh = &r8a66597->root_hub[port];
2319 2337
2320 rh->port = 0x00000000; 2338 rh->port = 0x00000000;
@@ -2323,9 +2341,9 @@ static int r8a66597_suspend(struct platform_device *pdev, pm_message_t state)
2323 return 0; 2341 return 0;
2324} 2342}
2325 2343
2326static int r8a66597_resume(struct platform_device *pdev) 2344static int r8a66597_resume(struct device *dev)
2327{ 2345{
2328 struct r8a66597 *r8a66597 = dev_get_drvdata(&pdev->dev); 2346 struct r8a66597 *r8a66597 = dev_get_drvdata(dev);
2329 struct usb_hcd *hcd = r8a66597_to_hcd(r8a66597); 2347 struct usb_hcd *hcd = r8a66597_to_hcd(r8a66597);
2330 2348
2331 dbg("%s", __func__); 2349 dbg("%s", __func__);
@@ -2335,9 +2353,17 @@ static int r8a66597_resume(struct platform_device *pdev)
2335 2353
2336 return 0; 2354 return 0;
2337} 2355}
2356
2357static struct dev_pm_ops r8a66597_dev_pm_ops = {
2358 .suspend = r8a66597_suspend,
2359 .resume = r8a66597_resume,
2360 .poweroff = r8a66597_suspend,
2361 .restore = r8a66597_resume,
2362};
2363
2364#define R8A66597_DEV_PM_OPS (&r8a66597_dev_pm_ops)
2338#else /* if defined(CONFIG_PM) */ 2365#else /* if defined(CONFIG_PM) */
2339#define r8a66597_suspend NULL 2366#define R8A66597_DEV_PM_OPS NULL
2340#define r8a66597_resume NULL
2341#endif 2367#endif
2342 2368
2343static int __init_or_module r8a66597_remove(struct platform_device *pdev) 2369static int __init_or_module r8a66597_remove(struct platform_device *pdev)
@@ -2348,8 +2374,9 @@ static int __init_or_module r8a66597_remove(struct platform_device *pdev)
2348 del_timer_sync(&r8a66597->rh_timer); 2374 del_timer_sync(&r8a66597->rh_timer);
2349 usb_remove_hcd(hcd); 2375 usb_remove_hcd(hcd);
2350 iounmap((void *)r8a66597->reg); 2376 iounmap((void *)r8a66597->reg);
2351#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) && defined(CONFIG_HAVE_CLK) 2377#ifdef CONFIG_HAVE_CLK
2352 clk_put(r8a66597->clk); 2378 if (r8a66597->pdata->on_chip)
2379 clk_put(r8a66597->clk);
2353#endif 2380#endif
2354 usb_put_hcd(hcd); 2381 usb_put_hcd(hcd);
2355 return 0; 2382 return 0;
@@ -2357,7 +2384,7 @@ static int __init_or_module r8a66597_remove(struct platform_device *pdev)
2357 2384
2358static int __devinit r8a66597_probe(struct platform_device *pdev) 2385static int __devinit r8a66597_probe(struct platform_device *pdev)
2359{ 2386{
2360#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) && defined(CONFIG_HAVE_CLK) 2387#ifdef CONFIG_HAVE_CLK
2361 char clk_name[8]; 2388 char clk_name[8];
2362#endif 2389#endif
2363 struct resource *res = NULL, *ires; 2390 struct resource *res = NULL, *ires;
@@ -2419,15 +2446,20 @@ static int __devinit r8a66597_probe(struct platform_device *pdev)
2419 r8a66597->pdata = pdev->dev.platform_data; 2446 r8a66597->pdata = pdev->dev.platform_data;
2420 r8a66597->irq_sense_low = irq_trigger == IRQF_TRIGGER_LOW; 2447 r8a66597->irq_sense_low = irq_trigger == IRQF_TRIGGER_LOW;
2421 2448
2422#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) && defined(CONFIG_HAVE_CLK) 2449 if (r8a66597->pdata->on_chip) {
2423 snprintf(clk_name, sizeof(clk_name), "usb%d", pdev->id); 2450#ifdef CONFIG_HAVE_CLK
2424 r8a66597->clk = clk_get(&pdev->dev, clk_name); 2451 snprintf(clk_name, sizeof(clk_name), "usb%d", pdev->id);
2425 if (IS_ERR(r8a66597->clk)) { 2452 r8a66597->clk = clk_get(&pdev->dev, clk_name);
2426 dev_err(&pdev->dev, "cannot get clock \"%s\"\n", clk_name); 2453 if (IS_ERR(r8a66597->clk)) {
2427 ret = PTR_ERR(r8a66597->clk); 2454 dev_err(&pdev->dev, "cannot get clock \"%s\"\n",
2428 goto clean_up2; 2455 clk_name);
2429 } 2456 ret = PTR_ERR(r8a66597->clk);
2457 goto clean_up2;
2458 }
2430#endif 2459#endif
2460 r8a66597->max_root_hub = 1;
2461 } else
2462 r8a66597->max_root_hub = 2;
2431 2463
2432 spin_lock_init(&r8a66597->lock); 2464 spin_lock_init(&r8a66597->lock);
2433 init_timer(&r8a66597->rh_timer); 2465 init_timer(&r8a66597->rh_timer);
@@ -2457,8 +2489,9 @@ static int __devinit r8a66597_probe(struct platform_device *pdev)
2457 return 0; 2489 return 0;
2458 2490
2459clean_up3: 2491clean_up3:
2460#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) && defined(CONFIG_HAVE_CLK) 2492#ifdef CONFIG_HAVE_CLK
2461 clk_put(r8a66597->clk); 2493 if (r8a66597->pdata->on_chip)
2494 clk_put(r8a66597->clk);
2462clean_up2: 2495clean_up2:
2463#endif 2496#endif
2464 usb_put_hcd(hcd); 2497 usb_put_hcd(hcd);
@@ -2473,11 +2506,10 @@ clean_up:
2473static struct platform_driver r8a66597_driver = { 2506static struct platform_driver r8a66597_driver = {
2474 .probe = r8a66597_probe, 2507 .probe = r8a66597_probe,
2475 .remove = r8a66597_remove, 2508 .remove = r8a66597_remove,
2476 .suspend = r8a66597_suspend,
2477 .resume = r8a66597_resume,
2478 .driver = { 2509 .driver = {
2479 .name = (char *) hcd_name, 2510 .name = (char *) hcd_name,
2480 .owner = THIS_MODULE, 2511 .owner = THIS_MODULE,
2512 .pm = R8A66597_DEV_PM_OPS,
2481 }, 2513 },
2482}; 2514};
2483 2515
diff --git a/drivers/usb/host/r8a66597.h b/drivers/usb/host/r8a66597.h
index d72680b433f9..228e3fb23854 100644
--- a/drivers/usb/host/r8a66597.h
+++ b/drivers/usb/host/r8a66597.h
@@ -26,390 +26,16 @@
26#ifndef __R8A66597_H__ 26#ifndef __R8A66597_H__
27#define __R8A66597_H__ 27#define __R8A66597_H__
28 28
29#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) && defined(CONFIG_HAVE_CLK) 29#ifdef CONFIG_HAVE_CLK
30#include <linux/clk.h> 30#include <linux/clk.h>
31#endif 31#endif
32 32
33#include <linux/usb/r8a66597.h> 33#include <linux/usb/r8a66597.h>
34 34
35#define SYSCFG0 0x00
36#define SYSCFG1 0x02
37#define SYSSTS0 0x04
38#define SYSSTS1 0x06
39#define DVSTCTR0 0x08
40#define DVSTCTR1 0x0A
41#define TESTMODE 0x0C
42#define PINCFG 0x0E
43#define DMA0CFG 0x10
44#define DMA1CFG 0x12
45#define CFIFO 0x14
46#define D0FIFO 0x18
47#define D1FIFO 0x1C
48#define CFIFOSEL 0x20
49#define CFIFOCTR 0x22
50#define CFIFOSIE 0x24
51#define D0FIFOSEL 0x28
52#define D0FIFOCTR 0x2A
53#define D1FIFOSEL 0x2C
54#define D1FIFOCTR 0x2E
55#define INTENB0 0x30
56#define INTENB1 0x32
57#define INTENB2 0x34
58#define BRDYENB 0x36
59#define NRDYENB 0x38
60#define BEMPENB 0x3A
61#define SOFCFG 0x3C
62#define INTSTS0 0x40
63#define INTSTS1 0x42
64#define INTSTS2 0x44
65#define BRDYSTS 0x46
66#define NRDYSTS 0x48
67#define BEMPSTS 0x4A
68#define FRMNUM 0x4C
69#define UFRMNUM 0x4E
70#define USBADDR 0x50
71#define USBREQ 0x54
72#define USBVAL 0x56
73#define USBINDX 0x58
74#define USBLENG 0x5A
75#define DCPCFG 0x5C
76#define DCPMAXP 0x5E
77#define DCPCTR 0x60
78#define PIPESEL 0x64
79#define PIPECFG 0x68
80#define PIPEBUF 0x6A
81#define PIPEMAXP 0x6C
82#define PIPEPERI 0x6E
83#define PIPE1CTR 0x70
84#define PIPE2CTR 0x72
85#define PIPE3CTR 0x74
86#define PIPE4CTR 0x76
87#define PIPE5CTR 0x78
88#define PIPE6CTR 0x7A
89#define PIPE7CTR 0x7C
90#define PIPE8CTR 0x7E
91#define PIPE9CTR 0x80
92#define PIPE1TRE 0x90
93#define PIPE1TRN 0x92
94#define PIPE2TRE 0x94
95#define PIPE2TRN 0x96
96#define PIPE3TRE 0x98
97#define PIPE3TRN 0x9A
98#define PIPE4TRE 0x9C
99#define PIPE4TRN 0x9E
100#define PIPE5TRE 0xA0
101#define PIPE5TRN 0xA2
102#define DEVADD0 0xD0
103#define DEVADD1 0xD2
104#define DEVADD2 0xD4
105#define DEVADD3 0xD6
106#define DEVADD4 0xD8
107#define DEVADD5 0xDA
108#define DEVADD6 0xDC
109#define DEVADD7 0xDE
110#define DEVADD8 0xE0
111#define DEVADD9 0xE2
112#define DEVADDA 0xE4
113
114/* System Configuration Control Register */
115#define XTAL 0xC000 /* b15-14: Crystal selection */
116#define XTAL48 0x8000 /* 48MHz */
117#define XTAL24 0x4000 /* 24MHz */
118#define XTAL12 0x0000 /* 12MHz */
119#define XCKE 0x2000 /* b13: External clock enable */
120#define PLLC 0x0800 /* b11: PLL control */
121#define SCKE 0x0400 /* b10: USB clock enable */
122#define PCSDIS 0x0200 /* b9: not CS wakeup */
123#define LPSME 0x0100 /* b8: Low power sleep mode */
124#define HSE 0x0080 /* b7: Hi-speed enable */
125#define DCFM 0x0040 /* b6: Controller function select */
126#define DRPD 0x0020 /* b5: D+/- pull down control */
127#define DPRPU 0x0010 /* b4: D+ pull up control */
128#define USBE 0x0001 /* b0: USB module operation enable */
129
130/* System Configuration Status Register */
131#define OVCBIT 0x8000 /* b15-14: Over-current bit */
132#define OVCMON 0xC000 /* b15-14: Over-current monitor */
133#define SOFEA 0x0020 /* b5: SOF monitor */
134#define IDMON 0x0004 /* b3: ID-pin monitor */
135#define LNST 0x0003 /* b1-0: D+, D- line status */
136#define SE1 0x0003 /* SE1 */
137#define FS_KSTS 0x0002 /* Full-Speed K State */
138#define FS_JSTS 0x0001 /* Full-Speed J State */
139#define LS_JSTS 0x0002 /* Low-Speed J State */
140#define LS_KSTS 0x0001 /* Low-Speed K State */
141#define SE0 0x0000 /* SE0 */
142
143/* Device State Control Register */
144#define EXTLP0 0x0400 /* b10: External port */
145#define VBOUT 0x0200 /* b9: VBUS output */
146#define WKUP 0x0100 /* b8: Remote wakeup */
147#define RWUPE 0x0080 /* b7: Remote wakeup sense */
148#define USBRST 0x0040 /* b6: USB reset enable */
149#define RESUME 0x0020 /* b5: Resume enable */
150#define UACT 0x0010 /* b4: USB bus enable */
151#define RHST 0x0007 /* b1-0: Reset handshake status */
152#define HSPROC 0x0004 /* HS handshake is processing */
153#define HSMODE 0x0003 /* Hi-Speed mode */
154#define FSMODE 0x0002 /* Full-Speed mode */
155#define LSMODE 0x0001 /* Low-Speed mode */
156#define UNDECID 0x0000 /* Undecided */
157
158/* Test Mode Register */
159#define UTST 0x000F /* b3-0: Test select */
160#define H_TST_PACKET 0x000C /* HOST TEST Packet */
161#define H_TST_SE0_NAK 0x000B /* HOST TEST SE0 NAK */
162#define H_TST_K 0x000A /* HOST TEST K */
163#define H_TST_J 0x0009 /* HOST TEST J */
164#define H_TST_NORMAL 0x0000 /* HOST Normal Mode */
165#define P_TST_PACKET 0x0004 /* PERI TEST Packet */
166#define P_TST_SE0_NAK 0x0003 /* PERI TEST SE0 NAK */
167#define P_TST_K 0x0002 /* PERI TEST K */
168#define P_TST_J 0x0001 /* PERI TEST J */
169#define P_TST_NORMAL 0x0000 /* PERI Normal Mode */
170
171/* Data Pin Configuration Register */
172#define LDRV 0x8000 /* b15: Drive Current Adjust */
173#define VIF1 0x0000 /* VIF = 1.8V */
174#define VIF3 0x8000 /* VIF = 3.3V */
175#define INTA 0x0001 /* b1: USB INT-pin active */
176
177/* DMAx Pin Configuration Register */
178#define DREQA 0x4000 /* b14: Dreq active select */
179#define BURST 0x2000 /* b13: Burst mode */
180#define DACKA 0x0400 /* b10: Dack active select */
181#define DFORM 0x0380 /* b9-7: DMA mode select */
182#define CPU_ADR_RD_WR 0x0000 /* Address + RD/WR mode (CPU bus) */
183#define CPU_DACK_RD_WR 0x0100 /* DACK + RD/WR mode (CPU bus) */
184#define CPU_DACK_ONLY 0x0180 /* DACK only mode (CPU bus) */
185#define SPLIT_DACK_ONLY 0x0200 /* DACK only mode (SPLIT bus) */
186#define DENDA 0x0040 /* b6: Dend active select */
187#define PKTM 0x0020 /* b5: Packet mode */
188#define DENDE 0x0010 /* b4: Dend enable */
189#define OBUS 0x0004 /* b2: OUTbus mode */
190
191/* CFIFO/DxFIFO Port Select Register */
192#define RCNT 0x8000 /* b15: Read count mode */
193#define REW 0x4000 /* b14: Buffer rewind */
194#define DCLRM 0x2000 /* b13: DMA buffer clear mode */
195#define DREQE 0x1000 /* b12: DREQ output enable */
196#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597)
197#define MBW 0x0800
198#else
199#define MBW 0x0400 /* b10: Maximum bit width for FIFO access */
200#endif
201#define MBW_8 0x0000 /* 8bit */
202#define MBW_16 0x0400 /* 16bit */
203#define BIGEND 0x0100 /* b8: Big endian mode */
204#define BYTE_LITTLE 0x0000 /* little dendian */
205#define BYTE_BIG 0x0100 /* big endifan */
206#define ISEL 0x0020 /* b5: DCP FIFO port direction select */
207#define CURPIPE 0x000F /* b2-0: PIPE select */
208
209/* CFIFO/DxFIFO Port Control Register */
210#define BVAL 0x8000 /* b15: Buffer valid flag */
211#define BCLR 0x4000 /* b14: Buffer clear */
212#define FRDY 0x2000 /* b13: FIFO ready */
213#define DTLN 0x0FFF /* b11-0: FIFO received data length */
214
215/* Interrupt Enable Register 0 */
216#define VBSE 0x8000 /* b15: VBUS interrupt */
217#define RSME 0x4000 /* b14: Resume interrupt */
218#define SOFE 0x2000 /* b13: Frame update interrupt */
219#define DVSE 0x1000 /* b12: Device state transition interrupt */
220#define CTRE 0x0800 /* b11: Control transfer stage transition interrupt */
221#define BEMPE 0x0400 /* b10: Buffer empty interrupt */
222#define NRDYE 0x0200 /* b9: Buffer not ready interrupt */
223#define BRDYE 0x0100 /* b8: Buffer ready interrupt */
224
225/* Interrupt Enable Register 1 */
226#define OVRCRE 0x8000 /* b15: Over-current interrupt */
227#define BCHGE 0x4000 /* b14: USB us chenge interrupt */
228#define DTCHE 0x1000 /* b12: Detach sense interrupt */
229#define ATTCHE 0x0800 /* b11: Attach sense interrupt */
230#define EOFERRE 0x0040 /* b6: EOF error interrupt */
231#define SIGNE 0x0020 /* b5: SETUP IGNORE interrupt */
232#define SACKE 0x0010 /* b4: SETUP ACK interrupt */
233
234/* BRDY Interrupt Enable/Status Register */
235#define BRDY9 0x0200 /* b9: PIPE9 */
236#define BRDY8 0x0100 /* b8: PIPE8 */
237#define BRDY7 0x0080 /* b7: PIPE7 */
238#define BRDY6 0x0040 /* b6: PIPE6 */
239#define BRDY5 0x0020 /* b5: PIPE5 */
240#define BRDY4 0x0010 /* b4: PIPE4 */
241#define BRDY3 0x0008 /* b3: PIPE3 */
242#define BRDY2 0x0004 /* b2: PIPE2 */
243#define BRDY1 0x0002 /* b1: PIPE1 */
244#define BRDY0 0x0001 /* b1: PIPE0 */
245
246/* NRDY Interrupt Enable/Status Register */
247#define NRDY9 0x0200 /* b9: PIPE9 */
248#define NRDY8 0x0100 /* b8: PIPE8 */
249#define NRDY7 0x0080 /* b7: PIPE7 */
250#define NRDY6 0x0040 /* b6: PIPE6 */
251#define NRDY5 0x0020 /* b5: PIPE5 */
252#define NRDY4 0x0010 /* b4: PIPE4 */
253#define NRDY3 0x0008 /* b3: PIPE3 */
254#define NRDY2 0x0004 /* b2: PIPE2 */
255#define NRDY1 0x0002 /* b1: PIPE1 */
256#define NRDY0 0x0001 /* b1: PIPE0 */
257
258/* BEMP Interrupt Enable/Status Register */
259#define BEMP9 0x0200 /* b9: PIPE9 */
260#define BEMP8 0x0100 /* b8: PIPE8 */
261#define BEMP7 0x0080 /* b7: PIPE7 */
262#define BEMP6 0x0040 /* b6: PIPE6 */
263#define BEMP5 0x0020 /* b5: PIPE5 */
264#define BEMP4 0x0010 /* b4: PIPE4 */
265#define BEMP3 0x0008 /* b3: PIPE3 */
266#define BEMP2 0x0004 /* b2: PIPE2 */
267#define BEMP1 0x0002 /* b1: PIPE1 */
268#define BEMP0 0x0001 /* b0: PIPE0 */
269
270/* SOF Pin Configuration Register */
271#define TRNENSEL 0x0100 /* b8: Select transaction enable period */
272#define BRDYM 0x0040 /* b6: BRDY clear timing */
273#define INTL 0x0020 /* b5: Interrupt sense select */
274#define EDGESTS 0x0010 /* b4: */
275#define SOFMODE 0x000C /* b3-2: SOF pin select */
276#define SOF_125US 0x0008 /* SOF OUT 125us Frame Signal */
277#define SOF_1MS 0x0004 /* SOF OUT 1ms Frame Signal */
278#define SOF_DISABLE 0x0000 /* SOF OUT Disable */
279
280/* Interrupt Status Register 0 */
281#define VBINT 0x8000 /* b15: VBUS interrupt */
282#define RESM 0x4000 /* b14: Resume interrupt */
283#define SOFR 0x2000 /* b13: SOF frame update interrupt */
284#define DVST 0x1000 /* b12: Device state transition interrupt */
285#define CTRT 0x0800 /* b11: Control transfer stage transition interrupt */
286#define BEMP 0x0400 /* b10: Buffer empty interrupt */
287#define NRDY 0x0200 /* b9: Buffer not ready interrupt */
288#define BRDY 0x0100 /* b8: Buffer ready interrupt */
289#define VBSTS 0x0080 /* b7: VBUS input port */
290#define DVSQ 0x0070 /* b6-4: Device state */
291#define DS_SPD_CNFG 0x0070 /* Suspend Configured */
292#define DS_SPD_ADDR 0x0060 /* Suspend Address */
293#define DS_SPD_DFLT 0x0050 /* Suspend Default */
294#define DS_SPD_POWR 0x0040 /* Suspend Powered */
295#define DS_SUSP 0x0040 /* Suspend */
296#define DS_CNFG 0x0030 /* Configured */
297#define DS_ADDS 0x0020 /* Address */
298#define DS_DFLT 0x0010 /* Default */
299#define DS_POWR 0x0000 /* Powered */
300#define DVSQS 0x0030 /* b5-4: Device state */
301#define VALID 0x0008 /* b3: Setup packet detected flag */
302#define CTSQ 0x0007 /* b2-0: Control transfer stage */
303#define CS_SQER 0x0006 /* Sequence error */
304#define CS_WRND 0x0005 /* Control write nodata status stage */
305#define CS_WRSS 0x0004 /* Control write status stage */
306#define CS_WRDS 0x0003 /* Control write data stage */
307#define CS_RDSS 0x0002 /* Control read status stage */
308#define CS_RDDS 0x0001 /* Control read data stage */
309#define CS_IDST 0x0000 /* Idle or setup stage */
310
311/* Interrupt Status Register 1 */
312#define OVRCR 0x8000 /* b15: Over-current interrupt */
313#define BCHG 0x4000 /* b14: USB bus chenge interrupt */
314#define DTCH 0x1000 /* b12: Detach sense interrupt */
315#define ATTCH 0x0800 /* b11: Attach sense interrupt */
316#define EOFERR 0x0040 /* b6: EOF-error interrupt */
317#define SIGN 0x0020 /* b5: Setup ignore interrupt */
318#define SACK 0x0010 /* b4: Setup acknowledge interrupt */
319
320/* Frame Number Register */
321#define OVRN 0x8000 /* b15: Overrun error */
322#define CRCE 0x4000 /* b14: Received data error */
323#define FRNM 0x07FF /* b10-0: Frame number */
324
325/* Micro Frame Number Register */
326#define UFRNM 0x0007 /* b2-0: Micro frame number */
327
328/* Default Control Pipe Maxpacket Size Register */
329/* Pipe Maxpacket Size Register */
330#define DEVSEL 0xF000 /* b15-14: Device address select */
331#define MAXP 0x007F /* b6-0: Maxpacket size of default control pipe */
332
333/* Default Control Pipe Control Register */
334#define BSTS 0x8000 /* b15: Buffer status */
335#define SUREQ 0x4000 /* b14: Send USB request */
336#define CSCLR 0x2000 /* b13: complete-split status clear */
337#define CSSTS 0x1000 /* b12: complete-split status */
338#define SUREQCLR 0x0800 /* b11: stop setup request */
339#define SQCLR 0x0100 /* b8: Sequence toggle bit clear */
340#define SQSET 0x0080 /* b7: Sequence toggle bit set */
341#define SQMON 0x0040 /* b6: Sequence toggle bit monitor */
342#define PBUSY 0x0020 /* b5: pipe busy */
343#define PINGE 0x0010 /* b4: ping enable */
344#define CCPL 0x0004 /* b2: Enable control transfer complete */
345#define PID 0x0003 /* b1-0: Response PID */
346#define PID_STALL11 0x0003 /* STALL */
347#define PID_STALL 0x0002 /* STALL */
348#define PID_BUF 0x0001 /* BUF */
349#define PID_NAK 0x0000 /* NAK */
350
351/* Pipe Window Select Register */
352#define PIPENM 0x0007 /* b2-0: Pipe select */
353
354/* Pipe Configuration Register */
355#define R8A66597_TYP 0xC000 /* b15-14: Transfer type */
356#define R8A66597_ISO 0xC000 /* Isochronous */
357#define R8A66597_INT 0x8000 /* Interrupt */
358#define R8A66597_BULK 0x4000 /* Bulk */
359#define R8A66597_BFRE 0x0400 /* b10: Buffer ready interrupt mode select */
360#define R8A66597_DBLB 0x0200 /* b9: Double buffer mode select */
361#define R8A66597_CNTMD 0x0100 /* b8: Continuous transfer mode select */
362#define R8A66597_SHTNAK 0x0080 /* b7: Transfer end NAK */
363#define R8A66597_DIR 0x0010 /* b4: Transfer direction select */
364#define R8A66597_EPNUM 0x000F /* b3-0: Eendpoint number select */
365
366/* Pipe Buffer Configuration Register */
367#define BUFSIZE 0x7C00 /* b14-10: Pipe buffer size */
368#define BUFNMB 0x007F /* b6-0: Pipe buffer number */
369#define PIPE0BUF 256
370#define PIPExBUF 64
371
372/* Pipe Maxpacket Size Register */
373#define MXPS 0x07FF /* b10-0: Maxpacket size */
374
375/* Pipe Cycle Configuration Register */
376#define IFIS 0x1000 /* b12: Isochronous in-buffer flush mode select */
377#define IITV 0x0007 /* b2-0: Isochronous interval */
378
379/* Pipex Control Register */
380#define BSTS 0x8000 /* b15: Buffer status */
381#define INBUFM 0x4000 /* b14: IN buffer monitor (Only for PIPE1 to 5) */
382#define CSCLR 0x2000 /* b13: complete-split status clear */
383#define CSSTS 0x1000 /* b12: complete-split status */
384#define ATREPM 0x0400 /* b10: Auto repeat mode */
385#define ACLRM 0x0200 /* b9: Out buffer auto clear mode */
386#define SQCLR 0x0100 /* b8: Sequence toggle bit clear */
387#define SQSET 0x0080 /* b7: Sequence toggle bit set */
388#define SQMON 0x0040 /* b6: Sequence toggle bit monitor */
389#define PBUSY 0x0020 /* b5: pipe busy */
390#define PID 0x0003 /* b1-0: Response PID */
391
392/* PIPExTRE */
393#define TRENB 0x0200 /* b9: Transaction counter enable */
394#define TRCLR 0x0100 /* b8: Transaction counter clear */
395
396/* PIPExTRN */
397#define TRNCNT 0xFFFF /* b15-0: Transaction counter */
398
399/* DEVADDx */
400#define UPPHUB 0x7800
401#define HUBPORT 0x0700
402#define USBSPD 0x00C0
403#define RTPORT 0x0001
404
405#define R8A66597_MAX_NUM_PIPE 10 35#define R8A66597_MAX_NUM_PIPE 10
406#define R8A66597_BUF_BSIZE 8 36#define R8A66597_BUF_BSIZE 8
407#define R8A66597_MAX_DEVICE 10 37#define R8A66597_MAX_DEVICE 10
408#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597)
409#define R8A66597_MAX_ROOT_HUB 1
410#else
411#define R8A66597_MAX_ROOT_HUB 2 38#define R8A66597_MAX_ROOT_HUB 2
412#endif
413#define R8A66597_MAX_SAMPLING 5 39#define R8A66597_MAX_SAMPLING 5
414#define R8A66597_RH_POLL_TIME 10 40#define R8A66597_RH_POLL_TIME 10
415#define R8A66597_MAX_DMA_CHANNEL 2 41#define R8A66597_MAX_DMA_CHANNEL 2
@@ -487,7 +113,7 @@ struct r8a66597_root_hub {
487struct r8a66597 { 113struct r8a66597 {
488 spinlock_t lock; 114 spinlock_t lock;
489 unsigned long reg; 115 unsigned long reg;
490#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) && defined(CONFIG_HAVE_CLK) 116#ifdef CONFIG_HAVE_CLK
491 struct clk *clk; 117 struct clk *clk;
492#endif 118#endif
493 struct r8a66597_platdata *pdata; 119 struct r8a66597_platdata *pdata;
@@ -504,6 +130,7 @@ struct r8a66597 {
504 unsigned short interval_map; 130 unsigned short interval_map;
505 unsigned char pipe_cnt[R8A66597_MAX_NUM_PIPE]; 131 unsigned char pipe_cnt[R8A66597_MAX_NUM_PIPE];
506 unsigned char dma_map; 132 unsigned char dma_map;
133 unsigned int max_root_hub;
507 134
508 struct list_head child_device; 135 struct list_head child_device;
509 unsigned long child_connect_map[4]; 136 unsigned long child_connect_map[4];
@@ -550,21 +177,22 @@ static inline void r8a66597_read_fifo(struct r8a66597 *r8a66597,
550 unsigned long offset, u16 *buf, 177 unsigned long offset, u16 *buf,
551 int len) 178 int len)
552{ 179{
553#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597)
554 unsigned long fifoaddr = r8a66597->reg + offset; 180 unsigned long fifoaddr = r8a66597->reg + offset;
555 unsigned long count; 181 unsigned long count;
556 182
557 count = len / 4; 183 if (r8a66597->pdata->on_chip) {
558 insl(fifoaddr, buf, count); 184 count = len / 4;
185 insl(fifoaddr, buf, count);
559 186
560 if (len & 0x00000003) { 187 if (len & 0x00000003) {
561 unsigned long tmp = inl(fifoaddr); 188 unsigned long tmp = inl(fifoaddr);
562 memcpy((unsigned char *)buf + count * 4, &tmp, len & 0x03); 189 memcpy((unsigned char *)buf + count * 4, &tmp,
190 len & 0x03);
191 }
192 } else {
193 len = (len + 1) / 2;
194 insw(fifoaddr, buf, len);
563 } 195 }
564#else
565 len = (len + 1) / 2;
566 insw(r8a66597->reg + offset, buf, len);
567#endif
568} 196}
569 197
570static inline void r8a66597_write(struct r8a66597 *r8a66597, u16 val, 198static inline void r8a66597_write(struct r8a66597 *r8a66597, u16 val,
@@ -578,33 +206,33 @@ static inline void r8a66597_write_fifo(struct r8a66597 *r8a66597,
578 int len) 206 int len)
579{ 207{
580 unsigned long fifoaddr = r8a66597->reg + offset; 208 unsigned long fifoaddr = r8a66597->reg + offset;
581#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597)
582 unsigned long count; 209 unsigned long count;
583 unsigned char *pb; 210 unsigned char *pb;
584 int i; 211 int i;
585 212
586 count = len / 4; 213 if (r8a66597->pdata->on_chip) {
587 outsl(fifoaddr, buf, count); 214 count = len / 4;
215 outsl(fifoaddr, buf, count);
216
217 if (len & 0x00000003) {
218 pb = (unsigned char *)buf + count * 4;
219 for (i = 0; i < (len & 0x00000003); i++) {
220 if (r8a66597_read(r8a66597, CFIFOSEL) & BIGEND)
221 outb(pb[i], fifoaddr + i);
222 else
223 outb(pb[i], fifoaddr + 3 - i);
224 }
225 }
226 } else {
227 int odd = len & 0x0001;
588 228
589 if (len & 0x00000003) { 229 len = len / 2;
590 pb = (unsigned char *)buf + count * 4; 230 outsw(fifoaddr, buf, len);
591 for (i = 0; i < (len & 0x00000003); i++) { 231 if (unlikely(odd)) {
592 if (r8a66597_read(r8a66597, CFIFOSEL) & BIGEND) 232 buf = &buf[len];
593 outb(pb[i], fifoaddr + i); 233 outb((unsigned char)*buf, fifoaddr);
594 else
595 outb(pb[i], fifoaddr + 3 - i);
596 } 234 }
597 } 235 }
598#else
599 int odd = len & 0x0001;
600
601 len = len / 2;
602 outsw(fifoaddr, buf, len);
603 if (unlikely(odd)) {
604 buf = &buf[len];
605 outb((unsigned char)*buf, fifoaddr);
606 }
607#endif
608} 236}
609 237
610static inline void r8a66597_mdfy(struct r8a66597 *r8a66597, 238static inline void r8a66597_mdfy(struct r8a66597 *r8a66597,
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 3b54b3940178..7e2c9774f08f 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -1867,7 +1867,7 @@ config FB_W100
1867 1867
1868config FB_SH_MOBILE_LCDC 1868config FB_SH_MOBILE_LCDC
1869 tristate "SuperH Mobile LCDC framebuffer support" 1869 tristate "SuperH Mobile LCDC framebuffer support"
1870 depends on FB && SUPERH 1870 depends on FB && SUPERH && HAVE_CLK
1871 select FB_SYS_FILLRECT 1871 select FB_SYS_FILLRECT
1872 select FB_SYS_COPYAREA 1872 select FB_SYS_COPYAREA
1873 select FB_SYS_IMAGEBLIT 1873 select FB_SYS_IMAGEBLIT
diff --git a/drivers/video/sh_mobile_lcdcfb.c b/drivers/video/sh_mobile_lcdcfb.c
index 07f22b625632..fc3f9662ceae 100644
--- a/drivers/video/sh_mobile_lcdcfb.c
+++ b/drivers/video/sh_mobile_lcdcfb.c
@@ -42,11 +42,9 @@ struct sh_mobile_lcdc_chan {
42struct sh_mobile_lcdc_priv { 42struct sh_mobile_lcdc_priv {
43 void __iomem *base; 43 void __iomem *base;
44 int irq; 44 int irq;
45#ifdef CONFIG_HAVE_CLK
46 atomic_t clk_usecnt; 45 atomic_t clk_usecnt;
47 struct clk *dot_clk; 46 struct clk *dot_clk;
48 struct clk *clk; 47 struct clk *clk;
49#endif
50 unsigned long lddckr; 48 unsigned long lddckr;
51 struct sh_mobile_lcdc_chan ch[2]; 49 struct sh_mobile_lcdc_chan ch[2];
52 int started; 50 int started;
@@ -156,6 +154,7 @@ static void lcdc_sys_write_index(void *handle, unsigned long data)
156 lcdc_write(ch->lcdc, _LDDWD0R, data | 0x10000000); 154 lcdc_write(ch->lcdc, _LDDWD0R, data | 0x10000000);
157 lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0); 155 lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0);
158 lcdc_write(ch->lcdc, _LDDWAR, 1 | (lcdc_chan_is_sublcd(ch) ? 2 : 0)); 156 lcdc_write(ch->lcdc, _LDDWAR, 1 | (lcdc_chan_is_sublcd(ch) ? 2 : 0));
157 lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0);
159} 158}
160 159
161static void lcdc_sys_write_data(void *handle, unsigned long data) 160static void lcdc_sys_write_data(void *handle, unsigned long data)
@@ -165,6 +164,7 @@ static void lcdc_sys_write_data(void *handle, unsigned long data)
165 lcdc_write(ch->lcdc, _LDDWD0R, data | 0x11000000); 164 lcdc_write(ch->lcdc, _LDDWD0R, data | 0x11000000);
166 lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0); 165 lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0);
167 lcdc_write(ch->lcdc, _LDDWAR, 1 | (lcdc_chan_is_sublcd(ch) ? 2 : 0)); 166 lcdc_write(ch->lcdc, _LDDWAR, 1 | (lcdc_chan_is_sublcd(ch) ? 2 : 0));
167 lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0);
168} 168}
169 169
170static unsigned long lcdc_sys_read_data(void *handle) 170static unsigned long lcdc_sys_read_data(void *handle)
@@ -175,8 +175,9 @@ static unsigned long lcdc_sys_read_data(void *handle)
175 lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0); 175 lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0);
176 lcdc_write(ch->lcdc, _LDDRAR, 1 | (lcdc_chan_is_sublcd(ch) ? 2 : 0)); 176 lcdc_write(ch->lcdc, _LDDRAR, 1 | (lcdc_chan_is_sublcd(ch) ? 2 : 0));
177 udelay(1); 177 udelay(1);
178 lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0);
178 179
179 return lcdc_read(ch->lcdc, _LDDRDR) & 0xffff; 180 return lcdc_read(ch->lcdc, _LDDRDR) & 0x3ffff;
180} 181}
181 182
182struct sh_mobile_lcdc_sys_bus_ops sh_mobile_lcdc_sys_bus_ops = { 183struct sh_mobile_lcdc_sys_bus_ops sh_mobile_lcdc_sys_bus_ops = {
@@ -185,7 +186,6 @@ struct sh_mobile_lcdc_sys_bus_ops sh_mobile_lcdc_sys_bus_ops = {
185 lcdc_sys_read_data, 186 lcdc_sys_read_data,
186}; 187};
187 188
188#ifdef CONFIG_HAVE_CLK
189static void sh_mobile_lcdc_clk_on(struct sh_mobile_lcdc_priv *priv) 189static void sh_mobile_lcdc_clk_on(struct sh_mobile_lcdc_priv *priv)
190{ 190{
191 if (atomic_inc_and_test(&priv->clk_usecnt)) { 191 if (atomic_inc_and_test(&priv->clk_usecnt)) {
@@ -203,10 +203,6 @@ static void sh_mobile_lcdc_clk_off(struct sh_mobile_lcdc_priv *priv)
203 clk_disable(priv->clk); 203 clk_disable(priv->clk);
204 } 204 }
205} 205}
206#else
207static void sh_mobile_lcdc_clk_on(struct sh_mobile_lcdc_priv *priv) {}
208static void sh_mobile_lcdc_clk_off(struct sh_mobile_lcdc_priv *priv) {}
209#endif
210 206
211static int sh_mobile_lcdc_sginit(struct fb_info *info, 207static int sh_mobile_lcdc_sginit(struct fb_info *info,
212 struct list_head *pagelist) 208 struct list_head *pagelist)
@@ -520,7 +516,6 @@ static void sh_mobile_lcdc_stop(struct sh_mobile_lcdc_priv *priv)
520 board_cfg = &ch->cfg.board_cfg; 516 board_cfg = &ch->cfg.board_cfg;
521 if (board_cfg->display_off) 517 if (board_cfg->display_off)
522 board_cfg->display_off(board_cfg->board_data); 518 board_cfg->display_off(board_cfg->board_data);
523
524 } 519 }
525 520
526 /* stop the lcdc */ 521 /* stop the lcdc */
@@ -579,9 +574,7 @@ static int sh_mobile_lcdc_setup_clocks(struct platform_device *pdev,
579 int clock_source, 574 int clock_source,
580 struct sh_mobile_lcdc_priv *priv) 575 struct sh_mobile_lcdc_priv *priv)
581{ 576{
582#ifdef CONFIG_HAVE_CLK
583 char clk_name[8]; 577 char clk_name[8];
584#endif
585 char *str; 578 char *str;
586 int icksel; 579 int icksel;
587 580
@@ -595,7 +588,6 @@ static int sh_mobile_lcdc_setup_clocks(struct platform_device *pdev,
595 588
596 priv->lddckr = icksel << 16; 589 priv->lddckr = icksel << 16;
597 590
598#ifdef CONFIG_HAVE_CLK
599 atomic_set(&priv->clk_usecnt, -1); 591 atomic_set(&priv->clk_usecnt, -1);
600 snprintf(clk_name, sizeof(clk_name), "lcdc%d", pdev->id); 592 snprintf(clk_name, sizeof(clk_name), "lcdc%d", pdev->id);
601 priv->clk = clk_get(&pdev->dev, clk_name); 593 priv->clk = clk_get(&pdev->dev, clk_name);
@@ -603,7 +595,7 @@ static int sh_mobile_lcdc_setup_clocks(struct platform_device *pdev,
603 dev_err(&pdev->dev, "cannot get clock \"%s\"\n", clk_name); 595 dev_err(&pdev->dev, "cannot get clock \"%s\"\n", clk_name);
604 return PTR_ERR(priv->clk); 596 return PTR_ERR(priv->clk);
605 } 597 }
606 598
607 if (str) { 599 if (str) {
608 priv->dot_clk = clk_get(&pdev->dev, str); 600 priv->dot_clk = clk_get(&pdev->dev, str);
609 if (IS_ERR(priv->dot_clk)) { 601 if (IS_ERR(priv->dot_clk)) {
@@ -612,7 +604,6 @@ static int sh_mobile_lcdc_setup_clocks(struct platform_device *pdev,
612 return PTR_ERR(priv->dot_clk); 604 return PTR_ERR(priv->dot_clk);
613 } 605 }
614 } 606 }
615#endif
616 607
617 return 0; 608 return 0;
618} 609}
@@ -947,11 +938,9 @@ static int sh_mobile_lcdc_remove(struct platform_device *pdev)
947 framebuffer_release(info); 938 framebuffer_release(info);
948 } 939 }
949 940
950#ifdef CONFIG_HAVE_CLK
951 if (priv->dot_clk) 941 if (priv->dot_clk)
952 clk_put(priv->dot_clk); 942 clk_put(priv->dot_clk);
953 clk_put(priv->clk); 943 clk_put(priv->clk);
954#endif
955 944
956 if (priv->base) 945 if (priv->base)
957 iounmap(priv->base); 946 iounmap(priv->base);
diff --git a/include/linux/usb/m66592.h b/include/linux/usb/m66592.h
new file mode 100644
index 000000000000..cda9625e7df0
--- /dev/null
+++ b/include/linux/usb/m66592.h
@@ -0,0 +1,44 @@
1/*
2 * M66592 driver platform data
3 *
4 * Copyright (C) 2009 Renesas Solutions Corp.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
18 *
19 */
20
21#ifndef __LINUX_USB_M66592_H
22#define __LINUX_USB_M66592_H
23
24#define M66592_PLATDATA_XTAL_12MHZ 0x01
25#define M66592_PLATDATA_XTAL_24MHZ 0x02
26#define M66592_PLATDATA_XTAL_48MHZ 0x03
27
28struct m66592_platdata {
29 /* one = on chip controller, zero = external controller */
30 unsigned on_chip:1;
31
32 /* one = big endian, zero = little endian */
33 unsigned endian:1;
34
35 /* (external controller only) M66592_PLATDATA_XTAL_nnMHZ */
36 unsigned xtal:2;
37
38 /* (external controller only) one = 3.3V, zero = 1.5V */
39 unsigned vif:1;
40
41};
42
43#endif /* __LINUX_USB_M66592_H */
44
diff --git a/include/linux/usb/r8a66597.h b/include/linux/usb/r8a66597.h
index e9f0384fa20c..26d216734057 100644
--- a/include/linux/usb/r8a66597.h
+++ b/include/linux/usb/r8a66597.h
@@ -28,9 +28,12 @@
28#define R8A66597_PLATDATA_XTAL_48MHZ 0x03 28#define R8A66597_PLATDATA_XTAL_48MHZ 0x03
29 29
30struct r8a66597_platdata { 30struct r8a66597_platdata {
31 /* This ops can controll port power instead of DVSTCTR register. */ 31 /* This callback can control port power instead of DVSTCTR register. */
32 void (*port_power)(int port, int power); 32 void (*port_power)(int port, int power);
33 33
34 /* set one = on chip controller, set zero = external controller */
35 unsigned on_chip:1;
36
34 /* (external controller only) set R8A66597_PLATDATA_XTAL_nnMHZ */ 37 /* (external controller only) set R8A66597_PLATDATA_XTAL_nnMHZ */
35 unsigned xtal:2; 38 unsigned xtal:2;
36 39
@@ -40,5 +43,373 @@ struct r8a66597_platdata {
40 /* set one = big endian, set zero = little endian */ 43 /* set one = big endian, set zero = little endian */
41 unsigned endian:1; 44 unsigned endian:1;
42}; 45};
43#endif 46
47/* Register definitions */
48#define SYSCFG0 0x00
49#define SYSCFG1 0x02
50#define SYSSTS0 0x04
51#define SYSSTS1 0x06
52#define DVSTCTR0 0x08
53#define DVSTCTR1 0x0A
54#define TESTMODE 0x0C
55#define PINCFG 0x0E
56#define DMA0CFG 0x10
57#define DMA1CFG 0x12
58#define CFIFO 0x14
59#define D0FIFO 0x18
60#define D1FIFO 0x1C
61#define CFIFOSEL 0x20
62#define CFIFOCTR 0x22
63#define CFIFOSIE 0x24
64#define D0FIFOSEL 0x28
65#define D0FIFOCTR 0x2A
66#define D1FIFOSEL 0x2C
67#define D1FIFOCTR 0x2E
68#define INTENB0 0x30
69#define INTENB1 0x32
70#define INTENB2 0x34
71#define BRDYENB 0x36
72#define NRDYENB 0x38
73#define BEMPENB 0x3A
74#define SOFCFG 0x3C
75#define INTSTS0 0x40
76#define INTSTS1 0x42
77#define INTSTS2 0x44
78#define BRDYSTS 0x46
79#define NRDYSTS 0x48
80#define BEMPSTS 0x4A
81#define FRMNUM 0x4C
82#define UFRMNUM 0x4E
83#define USBADDR 0x50
84#define USBREQ 0x54
85#define USBVAL 0x56
86#define USBINDX 0x58
87#define USBLENG 0x5A
88#define DCPCFG 0x5C
89#define DCPMAXP 0x5E
90#define DCPCTR 0x60
91#define PIPESEL 0x64
92#define PIPECFG 0x68
93#define PIPEBUF 0x6A
94#define PIPEMAXP 0x6C
95#define PIPEPERI 0x6E
96#define PIPE1CTR 0x70
97#define PIPE2CTR 0x72
98#define PIPE3CTR 0x74
99#define PIPE4CTR 0x76
100#define PIPE5CTR 0x78
101#define PIPE6CTR 0x7A
102#define PIPE7CTR 0x7C
103#define PIPE8CTR 0x7E
104#define PIPE9CTR 0x80
105#define PIPE1TRE 0x90
106#define PIPE1TRN 0x92
107#define PIPE2TRE 0x94
108#define PIPE2TRN 0x96
109#define PIPE3TRE 0x98
110#define PIPE3TRN 0x9A
111#define PIPE4TRE 0x9C
112#define PIPE4TRN 0x9E
113#define PIPE5TRE 0xA0
114#define PIPE5TRN 0xA2
115#define DEVADD0 0xD0
116#define DEVADD1 0xD2
117#define DEVADD2 0xD4
118#define DEVADD3 0xD6
119#define DEVADD4 0xD8
120#define DEVADD5 0xDA
121#define DEVADD6 0xDC
122#define DEVADD7 0xDE
123#define DEVADD8 0xE0
124#define DEVADD9 0xE2
125#define DEVADDA 0xE4
126
127/* System Configuration Control Register */
128#define XTAL 0xC000 /* b15-14: Crystal selection */
129#define XTAL48 0x8000 /* 48MHz */
130#define XTAL24 0x4000 /* 24MHz */
131#define XTAL12 0x0000 /* 12MHz */
132#define XCKE 0x2000 /* b13: External clock enable */
133#define PLLC 0x0800 /* b11: PLL control */
134#define SCKE 0x0400 /* b10: USB clock enable */
135#define PCSDIS 0x0200 /* b9: not CS wakeup */
136#define LPSME 0x0100 /* b8: Low power sleep mode */
137#define HSE 0x0080 /* b7: Hi-speed enable */
138#define DCFM 0x0040 /* b6: Controller function select */
139#define DRPD 0x0020 /* b5: D+/- pull down control */
140#define DPRPU 0x0010 /* b4: D+ pull up control */
141#define USBE 0x0001 /* b0: USB module operation enable */
142
143/* System Configuration Status Register */
144#define OVCBIT 0x8000 /* b15-14: Over-current bit */
145#define OVCMON 0xC000 /* b15-14: Over-current monitor */
146#define SOFEA 0x0020 /* b5: SOF monitor */
147#define IDMON 0x0004 /* b3: ID-pin monitor */
148#define LNST 0x0003 /* b1-0: D+, D- line status */
149#define SE1 0x0003 /* SE1 */
150#define FS_KSTS 0x0002 /* Full-Speed K State */
151#define FS_JSTS 0x0001 /* Full-Speed J State */
152#define LS_JSTS 0x0002 /* Low-Speed J State */
153#define LS_KSTS 0x0001 /* Low-Speed K State */
154#define SE0 0x0000 /* SE0 */
155
156/* Device State Control Register */
157#define EXTLP0 0x0400 /* b10: External port */
158#define VBOUT 0x0200 /* b9: VBUS output */
159#define WKUP 0x0100 /* b8: Remote wakeup */
160#define RWUPE 0x0080 /* b7: Remote wakeup sense */
161#define USBRST 0x0040 /* b6: USB reset enable */
162#define RESUME 0x0020 /* b5: Resume enable */
163#define UACT 0x0010 /* b4: USB bus enable */
164#define RHST 0x0007 /* b1-0: Reset handshake status */
165#define HSPROC 0x0004 /* HS handshake is processing */
166#define HSMODE 0x0003 /* Hi-Speed mode */
167#define FSMODE 0x0002 /* Full-Speed mode */
168#define LSMODE 0x0001 /* Low-Speed mode */
169#define UNDECID 0x0000 /* Undecided */
170
171/* Test Mode Register */
172#define UTST 0x000F /* b3-0: Test select */
173#define H_TST_PACKET 0x000C /* HOST TEST Packet */
174#define H_TST_SE0_NAK 0x000B /* HOST TEST SE0 NAK */
175#define H_TST_K 0x000A /* HOST TEST K */
176#define H_TST_J 0x0009 /* HOST TEST J */
177#define H_TST_NORMAL 0x0000 /* HOST Normal Mode */
178#define P_TST_PACKET 0x0004 /* PERI TEST Packet */
179#define P_TST_SE0_NAK 0x0003 /* PERI TEST SE0 NAK */
180#define P_TST_K 0x0002 /* PERI TEST K */
181#define P_TST_J 0x0001 /* PERI TEST J */
182#define P_TST_NORMAL 0x0000 /* PERI Normal Mode */
183
184/* Data Pin Configuration Register */
185#define LDRV 0x8000 /* b15: Drive Current Adjust */
186#define VIF1 0x0000 /* VIF = 1.8V */
187#define VIF3 0x8000 /* VIF = 3.3V */
188#define INTA 0x0001 /* b1: USB INT-pin active */
189
190/* DMAx Pin Configuration Register */
191#define DREQA 0x4000 /* b14: Dreq active select */
192#define BURST 0x2000 /* b13: Burst mode */
193#define DACKA 0x0400 /* b10: Dack active select */
194#define DFORM 0x0380 /* b9-7: DMA mode select */
195#define CPU_ADR_RD_WR 0x0000 /* Address + RD/WR mode (CPU bus) */
196#define CPU_DACK_RD_WR 0x0100 /* DACK + RD/WR mode (CPU bus) */
197#define CPU_DACK_ONLY 0x0180 /* DACK only mode (CPU bus) */
198#define SPLIT_DACK_ONLY 0x0200 /* DACK only mode (SPLIT bus) */
199#define DENDA 0x0040 /* b6: Dend active select */
200#define PKTM 0x0020 /* b5: Packet mode */
201#define DENDE 0x0010 /* b4: Dend enable */
202#define OBUS 0x0004 /* b2: OUTbus mode */
203
204/* CFIFO/DxFIFO Port Select Register */
205#define RCNT 0x8000 /* b15: Read count mode */
206#define REW 0x4000 /* b14: Buffer rewind */
207#define DCLRM 0x2000 /* b13: DMA buffer clear mode */
208#define DREQE 0x1000 /* b12: DREQ output enable */
209#define MBW_8 0x0000 /* 8bit */
210#define MBW_16 0x0400 /* 16bit */
211#define MBW_32 0x0800 /* 32bit */
212#define BIGEND 0x0100 /* b8: Big endian mode */
213#define BYTE_LITTLE 0x0000 /* little dendian */
214#define BYTE_BIG 0x0100 /* big endifan */
215#define ISEL 0x0020 /* b5: DCP FIFO port direction select */
216#define CURPIPE 0x000F /* b2-0: PIPE select */
217
218/* CFIFO/DxFIFO Port Control Register */
219#define BVAL 0x8000 /* b15: Buffer valid flag */
220#define BCLR 0x4000 /* b14: Buffer clear */
221#define FRDY 0x2000 /* b13: FIFO ready */
222#define DTLN 0x0FFF /* b11-0: FIFO received data length */
223
224/* Interrupt Enable Register 0 */
225#define VBSE 0x8000 /* b15: VBUS interrupt */
226#define RSME 0x4000 /* b14: Resume interrupt */
227#define SOFE 0x2000 /* b13: Frame update interrupt */
228#define DVSE 0x1000 /* b12: Device state transition interrupt */
229#define CTRE 0x0800 /* b11: Control transfer stage transition interrupt */
230#define BEMPE 0x0400 /* b10: Buffer empty interrupt */
231#define NRDYE 0x0200 /* b9: Buffer not ready interrupt */
232#define BRDYE 0x0100 /* b8: Buffer ready interrupt */
233
234/* Interrupt Enable Register 1 */
235#define OVRCRE 0x8000 /* b15: Over-current interrupt */
236#define BCHGE 0x4000 /* b14: USB us chenge interrupt */
237#define DTCHE 0x1000 /* b12: Detach sense interrupt */
238#define ATTCHE 0x0800 /* b11: Attach sense interrupt */
239#define EOFERRE 0x0040 /* b6: EOF error interrupt */
240#define SIGNE 0x0020 /* b5: SETUP IGNORE interrupt */
241#define SACKE 0x0010 /* b4: SETUP ACK interrupt */
242
243/* BRDY Interrupt Enable/Status Register */
244#define BRDY9 0x0200 /* b9: PIPE9 */
245#define BRDY8 0x0100 /* b8: PIPE8 */
246#define BRDY7 0x0080 /* b7: PIPE7 */
247#define BRDY6 0x0040 /* b6: PIPE6 */
248#define BRDY5 0x0020 /* b5: PIPE5 */
249#define BRDY4 0x0010 /* b4: PIPE4 */
250#define BRDY3 0x0008 /* b3: PIPE3 */
251#define BRDY2 0x0004 /* b2: PIPE2 */
252#define BRDY1 0x0002 /* b1: PIPE1 */
253#define BRDY0 0x0001 /* b1: PIPE0 */
254
255/* NRDY Interrupt Enable/Status Register */
256#define NRDY9 0x0200 /* b9: PIPE9 */
257#define NRDY8 0x0100 /* b8: PIPE8 */
258#define NRDY7 0x0080 /* b7: PIPE7 */
259#define NRDY6 0x0040 /* b6: PIPE6 */
260#define NRDY5 0x0020 /* b5: PIPE5 */
261#define NRDY4 0x0010 /* b4: PIPE4 */
262#define NRDY3 0x0008 /* b3: PIPE3 */
263#define NRDY2 0x0004 /* b2: PIPE2 */
264#define NRDY1 0x0002 /* b1: PIPE1 */
265#define NRDY0 0x0001 /* b1: PIPE0 */
266
267/* BEMP Interrupt Enable/Status Register */
268#define BEMP9 0x0200 /* b9: PIPE9 */
269#define BEMP8 0x0100 /* b8: PIPE8 */
270#define BEMP7 0x0080 /* b7: PIPE7 */
271#define BEMP6 0x0040 /* b6: PIPE6 */
272#define BEMP5 0x0020 /* b5: PIPE5 */
273#define BEMP4 0x0010 /* b4: PIPE4 */
274#define BEMP3 0x0008 /* b3: PIPE3 */
275#define BEMP2 0x0004 /* b2: PIPE2 */
276#define BEMP1 0x0002 /* b1: PIPE1 */
277#define BEMP0 0x0001 /* b0: PIPE0 */
278
279/* SOF Pin Configuration Register */
280#define TRNENSEL 0x0100 /* b8: Select transaction enable period */
281#define BRDYM 0x0040 /* b6: BRDY clear timing */
282#define INTL 0x0020 /* b5: Interrupt sense select */
283#define EDGESTS 0x0010 /* b4: */
284#define SOFMODE 0x000C /* b3-2: SOF pin select */
285#define SOF_125US 0x0008 /* SOF OUT 125us Frame Signal */
286#define SOF_1MS 0x0004 /* SOF OUT 1ms Frame Signal */
287#define SOF_DISABLE 0x0000 /* SOF OUT Disable */
288
289/* Interrupt Status Register 0 */
290#define VBINT 0x8000 /* b15: VBUS interrupt */
291#define RESM 0x4000 /* b14: Resume interrupt */
292#define SOFR 0x2000 /* b13: SOF frame update interrupt */
293#define DVST 0x1000 /* b12: Device state transition interrupt */
294#define CTRT 0x0800 /* b11: Control transfer stage transition interrupt */
295#define BEMP 0x0400 /* b10: Buffer empty interrupt */
296#define NRDY 0x0200 /* b9: Buffer not ready interrupt */
297#define BRDY 0x0100 /* b8: Buffer ready interrupt */
298#define VBSTS 0x0080 /* b7: VBUS input port */
299#define DVSQ 0x0070 /* b6-4: Device state */
300#define DS_SPD_CNFG 0x0070 /* Suspend Configured */
301#define DS_SPD_ADDR 0x0060 /* Suspend Address */
302#define DS_SPD_DFLT 0x0050 /* Suspend Default */
303#define DS_SPD_POWR 0x0040 /* Suspend Powered */
304#define DS_SUSP 0x0040 /* Suspend */
305#define DS_CNFG 0x0030 /* Configured */
306#define DS_ADDS 0x0020 /* Address */
307#define DS_DFLT 0x0010 /* Default */
308#define DS_POWR 0x0000 /* Powered */
309#define DVSQS 0x0030 /* b5-4: Device state */
310#define VALID 0x0008 /* b3: Setup packet detected flag */
311#define CTSQ 0x0007 /* b2-0: Control transfer stage */
312#define CS_SQER 0x0006 /* Sequence error */
313#define CS_WRND 0x0005 /* Control write nodata status stage */
314#define CS_WRSS 0x0004 /* Control write status stage */
315#define CS_WRDS 0x0003 /* Control write data stage */
316#define CS_RDSS 0x0002 /* Control read status stage */
317#define CS_RDDS 0x0001 /* Control read data stage */
318#define CS_IDST 0x0000 /* Idle or setup stage */
319
320/* Interrupt Status Register 1 */
321#define OVRCR 0x8000 /* b15: Over-current interrupt */
322#define BCHG 0x4000 /* b14: USB bus chenge interrupt */
323#define DTCH 0x1000 /* b12: Detach sense interrupt */
324#define ATTCH 0x0800 /* b11: Attach sense interrupt */
325#define EOFERR 0x0040 /* b6: EOF-error interrupt */
326#define SIGN 0x0020 /* b5: Setup ignore interrupt */
327#define SACK 0x0010 /* b4: Setup acknowledge interrupt */
328
329/* Frame Number Register */
330#define OVRN 0x8000 /* b15: Overrun error */
331#define CRCE 0x4000 /* b14: Received data error */
332#define FRNM 0x07FF /* b10-0: Frame number */
333
334/* Micro Frame Number Register */
335#define UFRNM 0x0007 /* b2-0: Micro frame number */
336
337/* Default Control Pipe Maxpacket Size Register */
338/* Pipe Maxpacket Size Register */
339#define DEVSEL 0xF000 /* b15-14: Device address select */
340#define MAXP 0x007F /* b6-0: Maxpacket size of default control pipe */
341
342/* Default Control Pipe Control Register */
343#define BSTS 0x8000 /* b15: Buffer status */
344#define SUREQ 0x4000 /* b14: Send USB request */
345#define CSCLR 0x2000 /* b13: complete-split status clear */
346#define CSSTS 0x1000 /* b12: complete-split status */
347#define SUREQCLR 0x0800 /* b11: stop setup request */
348#define SQCLR 0x0100 /* b8: Sequence toggle bit clear */
349#define SQSET 0x0080 /* b7: Sequence toggle bit set */
350#define SQMON 0x0040 /* b6: Sequence toggle bit monitor */
351#define PBUSY 0x0020 /* b5: pipe busy */
352#define PINGE 0x0010 /* b4: ping enable */
353#define CCPL 0x0004 /* b2: Enable control transfer complete */
354#define PID 0x0003 /* b1-0: Response PID */
355#define PID_STALL11 0x0003 /* STALL */
356#define PID_STALL 0x0002 /* STALL */
357#define PID_BUF 0x0001 /* BUF */
358#define PID_NAK 0x0000 /* NAK */
359
360/* Pipe Window Select Register */
361#define PIPENM 0x0007 /* b2-0: Pipe select */
362
363/* Pipe Configuration Register */
364#define R8A66597_TYP 0xC000 /* b15-14: Transfer type */
365#define R8A66597_ISO 0xC000 /* Isochronous */
366#define R8A66597_INT 0x8000 /* Interrupt */
367#define R8A66597_BULK 0x4000 /* Bulk */
368#define R8A66597_BFRE 0x0400 /* b10: Buffer ready interrupt mode select */
369#define R8A66597_DBLB 0x0200 /* b9: Double buffer mode select */
370#define R8A66597_CNTMD 0x0100 /* b8: Continuous transfer mode select */
371#define R8A66597_SHTNAK 0x0080 /* b7: Transfer end NAK */
372#define R8A66597_DIR 0x0010 /* b4: Transfer direction select */
373#define R8A66597_EPNUM 0x000F /* b3-0: Eendpoint number select */
374
375/* Pipe Buffer Configuration Register */
376#define BUFSIZE 0x7C00 /* b14-10: Pipe buffer size */
377#define BUFNMB 0x007F /* b6-0: Pipe buffer number */
378#define PIPE0BUF 256
379#define PIPExBUF 64
380
381/* Pipe Maxpacket Size Register */
382#define MXPS 0x07FF /* b10-0: Maxpacket size */
383
384/* Pipe Cycle Configuration Register */
385#define IFIS 0x1000 /* b12: Isochronous in-buffer flush mode select */
386#define IITV 0x0007 /* b2-0: Isochronous interval */
387
388/* Pipex Control Register */
389#define BSTS 0x8000 /* b15: Buffer status */
390#define INBUFM 0x4000 /* b14: IN buffer monitor (Only for PIPE1 to 5) */
391#define CSCLR 0x2000 /* b13: complete-split status clear */
392#define CSSTS 0x1000 /* b12: complete-split status */
393#define ATREPM 0x0400 /* b10: Auto repeat mode */
394#define ACLRM 0x0200 /* b9: Out buffer auto clear mode */
395#define SQCLR 0x0100 /* b8: Sequence toggle bit clear */
396#define SQSET 0x0080 /* b7: Sequence toggle bit set */
397#define SQMON 0x0040 /* b6: Sequence toggle bit monitor */
398#define PBUSY 0x0020 /* b5: pipe busy */
399#define PID 0x0003 /* b1-0: Response PID */
400
401/* PIPExTRE */
402#define TRENB 0x0200 /* b9: Transaction counter enable */
403#define TRCLR 0x0100 /* b8: Transaction counter clear */
404
405/* PIPExTRN */
406#define TRNCNT 0xFFFF /* b15-0: Transaction counter */
407
408/* DEVADDx */
409#define UPPHUB 0x7800
410#define HUBPORT 0x0700
411#define USBSPD 0x00C0
412#define RTPORT 0x0001
413
414#endif /* __LINUX_USB_R8A66597_H */
44 415
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-10 03:01:46 -0500