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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2006-06-23 14:57:48 -0400
committerPaul Mackerras <paulus@samba.org>2006-06-27 21:59:48 -0400
commit910ab66b1c94a2758725874d389136cf9acdc04c (patch)
tree79d35d7b83af309e13e4e028b72bd893e0433695
parent23cc770107c2d27dd1f5dee53177ea1163ee9295 (diff)
[POWERPC] spufs: fix MFC command queue purge
In the context save/restore code, the SPU MFC command queue purge code has a bug: static inline void wait_purge_complete(struct spu_state *csa, struct spu *spu) { struct spu_priv2 __iomem *priv2 = spu->priv2; /* Save, Step 28: * Poll MFC_CNTL[Ps] until value '11' is * read * (purge complete). */ POLL_WHILE_FALSE(in_be64(&priv2->mfc_control_RW) & MFC_CNTL_PURGE_DMA_COMPLETE); } This will exit as soon as _one_ of the 2 bits that compose MFC_CNTL_PURGE_DMA_COMPLETE is set, and one of them happens to be "purge in progress"... which means that we'll happily continue restoring the MFC while it's being purged at the same time. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
-rw-r--r--arch/powerpc/platforms/cell/spufs/switch.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/powerpc/platforms/cell/spufs/switch.c b/arch/powerpc/platforms/cell/spufs/switch.c
index 3068b429b031..015a51787009 100644
--- a/arch/powerpc/platforms/cell/spufs/switch.c
+++ b/arch/powerpc/platforms/cell/spufs/switch.c
@@ -464,7 +464,8 @@ static inline void wait_purge_complete(struct spu_state *csa, struct spu *spu)
464 * Poll MFC_CNTL[Ps] until value '11' is read 464 * Poll MFC_CNTL[Ps] until value '11' is read
465 * (purge complete). 465 * (purge complete).
466 */ 466 */
467 POLL_WHILE_FALSE(in_be64(&priv2->mfc_control_RW) & 467 POLL_WHILE_FALSE((in_be64(&priv2->mfc_control_RW) &
468 MFC_CNTL_PURGE_DMA_STATUS_MASK) ==
468 MFC_CNTL_PURGE_DMA_COMPLETE); 469 MFC_CNTL_PURGE_DMA_COMPLETE);
469} 470}
470 471
@@ -1028,7 +1029,8 @@ static inline void wait_suspend_mfc_complete(struct spu_state *csa,
1028 * Restore, Step 47. 1029 * Restore, Step 47.
1029 * Poll MFC_CNTL[Ss] until 11 is returned. 1030 * Poll MFC_CNTL[Ss] until 11 is returned.
1030 */ 1031 */
1031 POLL_WHILE_FALSE(in_be64(&priv2->mfc_control_RW) & 1032 POLL_WHILE_FALSE((in_be64(&priv2->mfc_control_RW) &
1033 MFC_CNTL_SUSPEND_DMA_STATUS_MASK) ==
1032 MFC_CNTL_SUSPEND_COMPLETE); 1034 MFC_CNTL_SUSPEND_COMPLETE);
1033} 1035}
1034 1036