diff options
author | Zhang, Yanmin <yanmin.zhang@intel.com> | 2006-07-11 21:41:47 -0400 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@suse.de> | 2006-07-12 19:05:48 -0400 |
commit | 6f0312fd7e0e6f96fd847b0b2e1e0d2d2e8ef89d (patch) | |
tree | 0acb72443d142459c76d0bd57c54f8e98291de8f | |
parent | 709cf5ea7a8bea1b956d361ee7cef1945423200c (diff) |
[PATCH] PCI: add PCI Express AER register definitions to pci_regs.h
Add new defines of PCI-Express AER registers and their bits into file
include/linux/pci_regs.h.
Signed-off-by: Zhang Yanmin <yanmin.zhang@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
-rw-r--r-- | include/linux/pci_regs.h | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/include/linux/pci_regs.h b/include/linux/pci_regs.h index 6bce4a240364..96930cb5927c 100644 --- a/include/linux/pci_regs.h +++ b/include/linux/pci_regs.h | |||
@@ -422,7 +422,23 @@ | |||
422 | #define PCI_ERR_CAP_ECRC_CHKE 0x00000100 /* ECRC Check Enable */ | 422 | #define PCI_ERR_CAP_ECRC_CHKE 0x00000100 /* ECRC Check Enable */ |
423 | #define PCI_ERR_HEADER_LOG 28 /* Header Log Register (16 bytes) */ | 423 | #define PCI_ERR_HEADER_LOG 28 /* Header Log Register (16 bytes) */ |
424 | #define PCI_ERR_ROOT_COMMAND 44 /* Root Error Command */ | 424 | #define PCI_ERR_ROOT_COMMAND 44 /* Root Error Command */ |
425 | /* Correctable Err Reporting Enable */ | ||
426 | #define PCI_ERR_ROOT_CMD_COR_EN 0x00000001 | ||
427 | /* Non-fatal Err Reporting Enable */ | ||
428 | #define PCI_ERR_ROOT_CMD_NONFATAL_EN 0x00000002 | ||
429 | /* Fatal Err Reporting Enable */ | ||
430 | #define PCI_ERR_ROOT_CMD_FATAL_EN 0x00000004 | ||
425 | #define PCI_ERR_ROOT_STATUS 48 | 431 | #define PCI_ERR_ROOT_STATUS 48 |
432 | #define PCI_ERR_ROOT_COR_RCV 0x00000001 /* ERR_COR Received */ | ||
433 | /* Multi ERR_COR Received */ | ||
434 | #define PCI_ERR_ROOT_MULTI_COR_RCV 0x00000002 | ||
435 | /* ERR_FATAL/NONFATAL Recevied */ | ||
436 | #define PCI_ERR_ROOT_UNCOR_RCV 0x00000004 | ||
437 | /* Multi ERR_FATAL/NONFATAL Recevied */ | ||
438 | #define PCI_ERR_ROOT_MULTI_UNCOR_RCV 0x00000008 | ||
439 | #define PCI_ERR_ROOT_FIRST_FATAL 0x00000010 /* First Fatal */ | ||
440 | #define PCI_ERR_ROOT_NONFATAL_RCV 0x00000020 /* Non-Fatal Received */ | ||
441 | #define PCI_ERR_ROOT_FATAL_RCV 0x00000040 /* Fatal Received */ | ||
426 | #define PCI_ERR_ROOT_COR_SRC 52 | 442 | #define PCI_ERR_ROOT_COR_SRC 52 |
427 | #define PCI_ERR_ROOT_SRC 54 | 443 | #define PCI_ERR_ROOT_SRC 54 |
428 | 444 | ||