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authorAlex Deucher <alexdeucher@gmail.com>2009-09-25 16:39:24 -0400
committerDave Airlie <airlied@linux.ie>2009-09-25 17:48:59 -0400
commit90ebd0655ac1a19e591f2fe8b9a871cc03cc3989 (patch)
treebcaf5d33e1c57634b1f6e3e2140521011a2bc819
parent974b16e33ea626c9854f0f34fa5455a18822e159 (diff)
drm/radeon/kms: fix some bugs in vline reloc
- fix offset of NOP packet for parsing - fix p->idx increments - fix bad mask when updating crtc vline info Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@linux.ie>
-rw-r--r--drivers/gpu/drm/radeon/r100.c11
1 files changed, 5 insertions, 6 deletions
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
index 9ab976d97e91..d2099146fc40 100644
--- a/drivers/gpu/drm/radeon/r100.c
+++ b/drivers/gpu/drm/radeon/r100.c
@@ -968,13 +968,13 @@ int r100_cs_packet_parse_vline(struct radeon_cs_parser *p)
968 } 968 }
969 969
970 /* jump over the NOP */ 970 /* jump over the NOP */
971 r = r100_cs_packet_parse(p, &p3reloc, p->idx); 971 r = r100_cs_packet_parse(p, &p3reloc, p->idx + waitreloc.count + 2);
972 if (r) 972 if (r)
973 return r; 973 return r;
974 974
975 h_idx = p->idx - 2; 975 h_idx = p->idx - 2;
976 p->idx += waitreloc.count; 976 p->idx += waitreloc.count + 2;
977 p->idx += p3reloc.count; 977 p->idx += p3reloc.count + 2;
978 978
979 header = radeon_get_ib_value(p, h_idx); 979 header = radeon_get_ib_value(p, h_idx);
980 crtc_id = radeon_get_ib_value(p, h_idx + 5); 980 crtc_id = radeon_get_ib_value(p, h_idx + 5);
@@ -992,17 +992,16 @@ int r100_cs_packet_parse_vline(struct radeon_cs_parser *p)
992 992
993 if (!crtc->enabled) { 993 if (!crtc->enabled) {
994 /* if the CRTC isn't enabled - we need to nop out the wait until */ 994 /* if the CRTC isn't enabled - we need to nop out the wait until */
995
996 ib[h_idx + 2] = PACKET2(0); 995 ib[h_idx + 2] = PACKET2(0);
997 ib[h_idx + 3] = PACKET2(0); 996 ib[h_idx + 3] = PACKET2(0);
998 } else if (crtc_id == 1) { 997 } else if (crtc_id == 1) {
999 switch (reg) { 998 switch (reg) {
1000 case AVIVO_D1MODE_VLINE_START_END: 999 case AVIVO_D1MODE_VLINE_START_END:
1001 header &= R300_CP_PACKET0_REG_MASK; 1000 header &= ~R300_CP_PACKET0_REG_MASK;
1002 header |= AVIVO_D2MODE_VLINE_START_END >> 2; 1001 header |= AVIVO_D2MODE_VLINE_START_END >> 2;
1003 break; 1002 break;
1004 case RADEON_CRTC_GUI_TRIG_VLINE: 1003 case RADEON_CRTC_GUI_TRIG_VLINE:
1005 header &= R300_CP_PACKET0_REG_MASK; 1004 header &= ~R300_CP_PACKET0_REG_MASK;
1006 header |= RADEON_CRTC2_GUI_TRIG_VLINE >> 2; 1005 header |= RADEON_CRTC2_GUI_TRIG_VLINE >> 2;
1007 break; 1006 break;
1008 default: 1007 default: