diff options
author | Rajendra Nayak <rnayak@ti.com> | 2008-09-26 08:18:46 -0400 |
---|---|---|
committer | Kevin Hilman <khilman@deeprootsystems.com> | 2009-11-11 17:42:24 -0500 |
commit | 8014078684377257e3a83ac45db95711929850c5 (patch) | |
tree | 91f6210079b82bcc5dd22511fb29a5ebbbb8f7d1 | |
parent | c171a2586161c623253186c394ca456947ec6a66 (diff) |
OMAP3: PM: Populate scratchpad contents
This patch populates the scratchpad contents as expected by the
bootROM code.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
-rw-r--r-- | arch/arm/mach-omap2/control.c | 203 | ||||
-rw-r--r-- | arch/arm/plat-omap/include/plat/control.h | 10 |
2 files changed, 213 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c index 6adb360c6d45..03e1bce3b3bb 100644 --- a/arch/arm/mach-omap2/control.c +++ b/arch/arm/mach-omap2/control.c | |||
@@ -17,9 +17,81 @@ | |||
17 | 17 | ||
18 | #include <plat/common.h> | 18 | #include <plat/common.h> |
19 | #include <plat/control.h> | 19 | #include <plat/control.h> |
20 | #include <plat/sdrc.h> | ||
21 | #include "cm-regbits-34xx.h" | ||
22 | #include "prm-regbits-34xx.h" | ||
23 | #include "cm.h" | ||
24 | #include "prm.h" | ||
25 | #include "sdrc.h" | ||
20 | 26 | ||
21 | static void __iomem *omap2_ctrl_base; | 27 | static void __iomem *omap2_ctrl_base; |
22 | 28 | ||
29 | struct omap3_scratchpad { | ||
30 | u32 boot_config_ptr; | ||
31 | u32 public_restore_ptr; | ||
32 | u32 secure_ram_restore_ptr; | ||
33 | u32 sdrc_module_semaphore; | ||
34 | u32 prcm_block_offset; | ||
35 | u32 sdrc_block_offset; | ||
36 | }; | ||
37 | |||
38 | struct omap3_scratchpad_prcm_block { | ||
39 | u32 prm_clksrc_ctrl; | ||
40 | u32 prm_clksel; | ||
41 | u32 cm_clksel_core; | ||
42 | u32 cm_clksel_wkup; | ||
43 | u32 cm_clken_pll; | ||
44 | u32 cm_autoidle_pll; | ||
45 | u32 cm_clksel1_pll; | ||
46 | u32 cm_clksel2_pll; | ||
47 | u32 cm_clksel3_pll; | ||
48 | u32 cm_clken_pll_mpu; | ||
49 | u32 cm_autoidle_pll_mpu; | ||
50 | u32 cm_clksel1_pll_mpu; | ||
51 | u32 cm_clksel2_pll_mpu; | ||
52 | u32 prcm_block_size; | ||
53 | }; | ||
54 | |||
55 | struct omap3_scratchpad_sdrc_block { | ||
56 | u16 sysconfig; | ||
57 | u16 cs_cfg; | ||
58 | u16 sharing; | ||
59 | u16 err_type; | ||
60 | u32 dll_a_ctrl; | ||
61 | u32 dll_b_ctrl; | ||
62 | u32 power; | ||
63 | u32 cs_0; | ||
64 | u32 mcfg_0; | ||
65 | u16 mr_0; | ||
66 | u16 emr_1_0; | ||
67 | u16 emr_2_0; | ||
68 | u16 emr_3_0; | ||
69 | u32 actim_ctrla_0; | ||
70 | u32 actim_ctrlb_0; | ||
71 | u32 rfr_ctrl_0; | ||
72 | u32 cs_1; | ||
73 | u32 mcfg_1; | ||
74 | u16 mr_1; | ||
75 | u16 emr_1_1; | ||
76 | u16 emr_2_1; | ||
77 | u16 emr_3_1; | ||
78 | u32 actim_ctrla_1; | ||
79 | u32 actim_ctrlb_1; | ||
80 | u32 rfr_ctrl_1; | ||
81 | u16 dcdl_1_ctrl; | ||
82 | u16 dcdl_2_ctrl; | ||
83 | u32 flags; | ||
84 | u32 block_size; | ||
85 | }; | ||
86 | |||
87 | /* | ||
88 | * This is used to store ARM registers in SDRAM before attempting | ||
89 | * an MPU OFF. The save and restore happens from the SRAM sleep code. | ||
90 | * The address is stored in scratchpad, so that it can be used | ||
91 | * during the restore path. | ||
92 | */ | ||
93 | u32 omap3_arm_context[128]; | ||
94 | |||
23 | #define OMAP_CTRL_REGADDR(reg) (omap2_ctrl_base + (reg)) | 95 | #define OMAP_CTRL_REGADDR(reg) (omap2_ctrl_base + (reg)) |
24 | 96 | ||
25 | void __init omap2_set_globals_control(struct omap_globals *omap2_globals) | 97 | void __init omap2_set_globals_control(struct omap_globals *omap2_globals) |
@@ -62,3 +134,134 @@ void omap_ctrl_writel(u32 val, u16 offset) | |||
62 | __raw_writel(val, OMAP_CTRL_REGADDR(offset)); | 134 | __raw_writel(val, OMAP_CTRL_REGADDR(offset)); |
63 | } | 135 | } |
64 | 136 | ||
137 | #ifdef CONFIG_ARCH_OMAP3 | ||
138 | /* | ||
139 | * Clears the scratchpad contents in case of cold boot- | ||
140 | * called during bootup | ||
141 | */ | ||
142 | void omap3_clear_scratchpad_contents(void) | ||
143 | { | ||
144 | u32 max_offset = OMAP343X_SCRATCHPAD_ROM_OFFSET; | ||
145 | u32 *v_addr; | ||
146 | u32 offset = 0; | ||
147 | v_addr = OMAP2_L4_IO_ADDRESS(OMAP343X_SCRATCHPAD_ROM); | ||
148 | if (prm_read_mod_reg(OMAP3430_GR_MOD, OMAP3_PRM_RSTST_OFFSET) & | ||
149 | OMAP3430_GLOBAL_COLD_RST) { | ||
150 | for ( ; offset <= max_offset; offset += 0x4) | ||
151 | __raw_writel(0x0, (v_addr + offset)); | ||
152 | prm_set_mod_reg_bits(OMAP3430_GLOBAL_COLD_RST, OMAP3430_GR_MOD, | ||
153 | OMAP3_PRM_RSTST_OFFSET); | ||
154 | } | ||
155 | } | ||
156 | |||
157 | /* Populate the scratchpad structure with restore structure */ | ||
158 | void omap3_save_scratchpad_contents(void) | ||
159 | { | ||
160 | void * __iomem scratchpad_address; | ||
161 | u32 arm_context_addr; | ||
162 | struct omap3_scratchpad scratchpad_contents; | ||
163 | struct omap3_scratchpad_prcm_block prcm_block_contents; | ||
164 | struct omap3_scratchpad_sdrc_block sdrc_block_contents; | ||
165 | |||
166 | /* Populate the Scratchpad contents */ | ||
167 | scratchpad_contents.boot_config_ptr = 0x0; | ||
168 | scratchpad_contents.public_restore_ptr = | ||
169 | virt_to_phys(get_restore_pointer()); | ||
170 | scratchpad_contents.secure_ram_restore_ptr = 0x0; | ||
171 | scratchpad_contents.sdrc_module_semaphore = 0x0; | ||
172 | scratchpad_contents.prcm_block_offset = 0x2C; | ||
173 | scratchpad_contents.sdrc_block_offset = 0x64; | ||
174 | |||
175 | /* Populate the PRCM block contents */ | ||
176 | prcm_block_contents.prm_clksrc_ctrl = prm_read_mod_reg(OMAP3430_GR_MOD, | ||
177 | OMAP3_PRM_CLKSRC_CTRL_OFFSET); | ||
178 | prcm_block_contents.prm_clksel = prm_read_mod_reg(OMAP3430_CCR_MOD, | ||
179 | OMAP3_PRM_CLKSEL_OFFSET); | ||
180 | prcm_block_contents.cm_clksel_core = | ||
181 | cm_read_mod_reg(CORE_MOD, CM_CLKSEL); | ||
182 | prcm_block_contents.cm_clksel_wkup = | ||
183 | cm_read_mod_reg(WKUP_MOD, CM_CLKSEL); | ||
184 | prcm_block_contents.cm_clken_pll = | ||
185 | cm_read_mod_reg(PLL_MOD, OMAP3430_CM_CLKEN_PLL); | ||
186 | prcm_block_contents.cm_autoidle_pll = | ||
187 | cm_read_mod_reg(PLL_MOD, OMAP3430_CM_AUTOIDLE_PLL); | ||
188 | prcm_block_contents.cm_clksel1_pll = | ||
189 | cm_read_mod_reg(PLL_MOD, OMAP3430_CM_CLKSEL1_PLL); | ||
190 | prcm_block_contents.cm_clksel2_pll = | ||
191 | cm_read_mod_reg(PLL_MOD, OMAP3430_CM_CLKSEL2_PLL); | ||
192 | prcm_block_contents.cm_clksel3_pll = | ||
193 | cm_read_mod_reg(PLL_MOD, OMAP3430_CM_CLKSEL3); | ||
194 | prcm_block_contents.cm_clken_pll_mpu = | ||
195 | cm_read_mod_reg(MPU_MOD, OMAP3430_CM_CLKEN_PLL); | ||
196 | prcm_block_contents.cm_autoidle_pll_mpu = | ||
197 | cm_read_mod_reg(MPU_MOD, OMAP3430_CM_AUTOIDLE_PLL); | ||
198 | prcm_block_contents.cm_clksel1_pll_mpu = | ||
199 | cm_read_mod_reg(MPU_MOD, OMAP3430_CM_CLKSEL1_PLL); | ||
200 | prcm_block_contents.cm_clksel2_pll_mpu = | ||
201 | cm_read_mod_reg(MPU_MOD, OMAP3430_CM_CLKSEL2_PLL); | ||
202 | prcm_block_contents.prcm_block_size = 0x0; | ||
203 | |||
204 | /* Populate the SDRC block contents */ | ||
205 | sdrc_block_contents.sysconfig = | ||
206 | (sdrc_read_reg(SDRC_SYSCONFIG) & 0xFFFF); | ||
207 | sdrc_block_contents.cs_cfg = | ||
208 | (sdrc_read_reg(SDRC_CS_CFG) & 0xFFFF); | ||
209 | sdrc_block_contents.sharing = | ||
210 | (sdrc_read_reg(SDRC_SHARING) & 0xFFFF); | ||
211 | sdrc_block_contents.err_type = | ||
212 | (sdrc_read_reg(SDRC_ERR_TYPE) & 0xFFFF); | ||
213 | sdrc_block_contents.dll_a_ctrl = sdrc_read_reg(SDRC_DLLA_CTRL); | ||
214 | sdrc_block_contents.dll_b_ctrl = 0x0; | ||
215 | sdrc_block_contents.power = sdrc_read_reg(SDRC_POWER); | ||
216 | sdrc_block_contents.cs_0 = 0x0; | ||
217 | sdrc_block_contents.mcfg_0 = sdrc_read_reg(SDRC_MCFG_0); | ||
218 | sdrc_block_contents.mr_0 = (sdrc_read_reg(SDRC_MR_0) & 0xFFFF); | ||
219 | sdrc_block_contents.emr_1_0 = 0x0; | ||
220 | sdrc_block_contents.emr_2_0 = 0x0; | ||
221 | sdrc_block_contents.emr_3_0 = 0x0; | ||
222 | sdrc_block_contents.actim_ctrla_0 = | ||
223 | sdrc_read_reg(SDRC_ACTIM_CTRL_A_0); | ||
224 | sdrc_block_contents.actim_ctrlb_0 = | ||
225 | sdrc_read_reg(SDRC_ACTIM_CTRL_B_0); | ||
226 | sdrc_block_contents.rfr_ctrl_0 = | ||
227 | sdrc_read_reg(SDRC_RFR_CTRL_0); | ||
228 | sdrc_block_contents.cs_1 = 0x0; | ||
229 | sdrc_block_contents.mcfg_1 = sdrc_read_reg(SDRC_MCFG_1); | ||
230 | sdrc_block_contents.mr_1 = sdrc_read_reg(SDRC_MR_1) & 0xFFFF; | ||
231 | sdrc_block_contents.emr_1_1 = 0x0; | ||
232 | sdrc_block_contents.emr_2_1 = 0x0; | ||
233 | sdrc_block_contents.emr_3_1 = 0x0; | ||
234 | sdrc_block_contents.actim_ctrla_1 = | ||
235 | sdrc_read_reg(SDRC_ACTIM_CTRL_A_1); | ||
236 | sdrc_block_contents.actim_ctrlb_1 = | ||
237 | sdrc_read_reg(SDRC_ACTIM_CTRL_B_1); | ||
238 | sdrc_block_contents.rfr_ctrl_1 = | ||
239 | sdrc_read_reg(SDRC_RFR_CTRL_1); | ||
240 | sdrc_block_contents.dcdl_1_ctrl = 0x0; | ||
241 | sdrc_block_contents.dcdl_2_ctrl = 0x0; | ||
242 | sdrc_block_contents.flags = 0x0; | ||
243 | sdrc_block_contents.block_size = 0x0; | ||
244 | |||
245 | arm_context_addr = virt_to_phys(omap3_arm_context); | ||
246 | |||
247 | /* Copy all the contents to the scratchpad location */ | ||
248 | scratchpad_address = OMAP2_L4_IO_ADDRESS(OMAP343X_SCRATCHPAD); | ||
249 | memcpy_toio(scratchpad_address, &scratchpad_contents, | ||
250 | sizeof(scratchpad_contents)); | ||
251 | /* Scratchpad contents being 32 bits, a divide by 4 done here */ | ||
252 | memcpy_toio(scratchpad_address + | ||
253 | scratchpad_contents.prcm_block_offset, | ||
254 | &prcm_block_contents, sizeof(prcm_block_contents)); | ||
255 | memcpy_toio(scratchpad_address + | ||
256 | scratchpad_contents.sdrc_block_offset, | ||
257 | &sdrc_block_contents, sizeof(sdrc_block_contents)); | ||
258 | /* | ||
259 | * Copies the address of the location in SDRAM where ARM | ||
260 | * registers get saved during a MPU OFF transition. | ||
261 | */ | ||
262 | memcpy_toio(scratchpad_address + | ||
263 | scratchpad_contents.sdrc_block_offset + | ||
264 | sizeof(sdrc_block_contents), &arm_context_addr, 4); | ||
265 | } | ||
266 | |||
267 | #endif /* CONFIG_ARCH_OMAP3 */ | ||
diff --git a/arch/arm/plat-omap/include/plat/control.h b/arch/arm/plat-omap/include/plat/control.h index 835f5b7aa4b6..1076dd967390 100644 --- a/arch/arm/plat-omap/include/plat/control.h +++ b/arch/arm/plat-omap/include/plat/control.h | |||
@@ -207,6 +207,10 @@ | |||
207 | #define OMAP3_PADCONF_WAKEUPEVENT0 (1 << 15) | 207 | #define OMAP3_PADCONF_WAKEUPEVENT0 (1 << 15) |
208 | #define OMAP3_PADCONF_WAKEUPENABLE0 (1 << 14) | 208 | #define OMAP3_PADCONF_WAKEUPENABLE0 (1 << 14) |
209 | 209 | ||
210 | #define OMAP343X_SCRATCHPAD_ROM (OMAP343X_CTRL_BASE + 0x860) | ||
211 | #define OMAP343X_SCRATCHPAD (OMAP343X_CTRL_BASE + 0x910) | ||
212 | #define OMAP343X_SCRATCHPAD_ROM_OFFSET 0x19C | ||
213 | |||
210 | #ifndef __ASSEMBLY__ | 214 | #ifndef __ASSEMBLY__ |
211 | #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \ | 215 | #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \ |
212 | defined(CONFIG_ARCH_OMAP4) | 216 | defined(CONFIG_ARCH_OMAP4) |
@@ -217,6 +221,12 @@ extern u32 omap_ctrl_readl(u16 offset); | |||
217 | extern void omap_ctrl_writeb(u8 val, u16 offset); | 221 | extern void omap_ctrl_writeb(u8 val, u16 offset); |
218 | extern void omap_ctrl_writew(u16 val, u16 offset); | 222 | extern void omap_ctrl_writew(u16 val, u16 offset); |
219 | extern void omap_ctrl_writel(u32 val, u16 offset); | 223 | extern void omap_ctrl_writel(u32 val, u16 offset); |
224 | |||
225 | extern void omap3_save_scratchpad_contents(void); | ||
226 | extern void omap3_clear_scratchpad_contents(void); | ||
227 | extern u32 *get_restore_pointer(void); | ||
228 | extern u32 omap3_arm_context[128]; | ||
229 | |||
220 | #else | 230 | #else |
221 | #define omap_ctrl_base_get() 0 | 231 | #define omap_ctrl_base_get() 0 |
222 | #define omap_ctrl_readb(x) 0 | 232 | #define omap_ctrl_readb(x) 0 |