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authorDan Williams <dan.j.williams@intel.com>2009-11-19 19:11:03 -0500
committerDan Williams <dan.j.williams@intel.com>2009-11-20 01:21:03 -0500
commit49954c1567cb0d70d28bb5512d471dc5bd4e2c3f (patch)
treec64b4585518028b5c8ae749b93d9f560d536f649
parent7b3cc2b1fc2066391e498f3387204908c4eced21 (diff)
ioat3: fix pq completion versus channel deallocation race
The completion of a pq operation is notified with a null descriptor appended to the end of the chain. This descriptor needs to be visible to dma clients otherwise the client is precluded from ensuring all operations are quiesced before freeing channel resources, i.e. due to descriptor polling it may get the completion notification ahead of the interrupt delivered by the null descriptor. Signed-off-by: Dan Williams <dan.j.williams@intel.com>
-rw-r--r--drivers/dma/ioat/dma_v3.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/dma/ioat/dma_v3.c b/drivers/dma/ioat/dma_v3.c
index 189788f6351e..42f6f10fb0cc 100644
--- a/drivers/dma/ioat/dma_v3.c
+++ b/drivers/dma/ioat/dma_v3.c
@@ -571,7 +571,7 @@ __ioat3_prep_xor_lock(struct dma_chan *c, enum sum_check_flags *result,
571 dump_desc_dbg(ioat, compl_desc); 571 dump_desc_dbg(ioat, compl_desc);
572 572
573 /* we leave the channel locked to ensure in order submission */ 573 /* we leave the channel locked to ensure in order submission */
574 return &desc->txd; 574 return &compl_desc->txd;
575} 575}
576 576
577static struct dma_async_tx_descriptor * 577static struct dma_async_tx_descriptor *
@@ -730,7 +730,7 @@ __ioat3_prep_pq_lock(struct dma_chan *c, enum sum_check_flags *result,
730 dump_desc_dbg(ioat, compl_desc); 730 dump_desc_dbg(ioat, compl_desc);
731 731
732 /* we leave the channel locked to ensure in order submission */ 732 /* we leave the channel locked to ensure in order submission */
733 return &desc->txd; 733 return &compl_desc->txd;
734} 734}
735 735
736static struct dma_async_tx_descriptor * 736static struct dma_async_tx_descriptor *