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authorJoerg Roedel <joerg.roedel@amd.com>2008-09-08 09:55:10 -0400
committerIngo Molnar <mingo@elte.hu>2008-09-19 06:59:13 -0400
commit3eaf28a1cd2686aaa185b54d5a5e18e91b41f7f2 (patch)
tree8635314b3369734431435fb735979435a06329a2
parentee893c24edb8ebab9a3fb66566855572579ad616 (diff)
AMD IOMMU: save pci_dev instead of devid
We need the pci_dev later anyways to enable MSI for the IOMMU hardware. So remove the devid pointing to the BDF and replace it with the pci_dev structure where the IOMMU is implemented. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
-rw-r--r--arch/x86/kernel/amd_iommu_init.c25
-rw-r--r--include/asm-x86/amd_iommu_types.h5
2 files changed, 19 insertions, 11 deletions
diff --git a/arch/x86/kernel/amd_iommu_init.c b/arch/x86/kernel/amd_iommu_init.c
index b50234ef91ed..a7eb89d8923d 100644
--- a/arch/x86/kernel/amd_iommu_init.c
+++ b/arch/x86/kernel/amd_iommu_init.c
@@ -242,9 +242,12 @@ static void __init iommu_feature_disable(struct amd_iommu *iommu, u8 bit)
242/* Function to enable the hardware */ 242/* Function to enable the hardware */
243void __init iommu_enable(struct amd_iommu *iommu) 243void __init iommu_enable(struct amd_iommu *iommu)
244{ 244{
245 printk(KERN_INFO "AMD IOMMU: Enabling IOMMU at "); 245 printk(KERN_INFO "AMD IOMMU: Enabling IOMMU "
246 print_devid(iommu->devid, 0); 246 "at %02x:%02x.%x cap 0x%hx\n",
247 printk(" cap 0x%hx\n", iommu->cap_ptr); 247 iommu->dev->bus->number,
248 PCI_SLOT(iommu->dev->devfn),
249 PCI_FUNC(iommu->dev->devfn),
250 iommu->cap_ptr);
248 251
249 iommu_feature_enable(iommu, CONTROL_IOMMU_EN); 252 iommu_feature_enable(iommu, CONTROL_IOMMU_EN);
250} 253}
@@ -511,15 +514,14 @@ static void __init set_device_exclusion_range(u16 devid, struct ivmd_header *m)
511 */ 514 */
512static void __init init_iommu_from_pci(struct amd_iommu *iommu) 515static void __init init_iommu_from_pci(struct amd_iommu *iommu)
513{ 516{
514 int bus = PCI_BUS(iommu->devid);
515 int dev = PCI_SLOT(iommu->devid);
516 int fn = PCI_FUNC(iommu->devid);
517 int cap_ptr = iommu->cap_ptr; 517 int cap_ptr = iommu->cap_ptr;
518 u32 range; 518 u32 range;
519 519
520 iommu->cap = read_pci_config(bus, dev, fn, cap_ptr+MMIO_CAP_HDR_OFFSET); 520 pci_read_config_dword(iommu->dev, cap_ptr + MMIO_CAP_HDR_OFFSET,
521 &iommu->cap);
522 pci_read_config_dword(iommu->dev, cap_ptr + MMIO_RANGE_OFFSET,
523 &range);
521 524
522 range = read_pci_config(bus, dev, fn, cap_ptr+MMIO_RANGE_OFFSET);
523 iommu->first_device = calc_devid(MMIO_GET_BUS(range), 525 iommu->first_device = calc_devid(MMIO_GET_BUS(range),
524 MMIO_GET_FD(range)); 526 MMIO_GET_FD(range));
525 iommu->last_device = calc_devid(MMIO_GET_BUS(range), 527 iommu->last_device = calc_devid(MMIO_GET_BUS(range),
@@ -674,7 +676,10 @@ static int __init init_iommu_one(struct amd_iommu *iommu, struct ivhd_header *h)
674 /* 676 /*
675 * Copy data from ACPI table entry to the iommu struct 677 * Copy data from ACPI table entry to the iommu struct
676 */ 678 */
677 iommu->devid = h->devid; 679 iommu->dev = pci_get_bus_and_slot(PCI_BUS(h->devid), h->devid & 0xff);
680 if (!iommu->dev)
681 return 1;
682
678 iommu->cap_ptr = h->cap_ptr; 683 iommu->cap_ptr = h->cap_ptr;
679 iommu->pci_seg = h->pci_seg; 684 iommu->pci_seg = h->pci_seg;
680 iommu->mmio_phys = h->mmio_phys; 685 iommu->mmio_phys = h->mmio_phys;
@@ -695,6 +700,8 @@ static int __init init_iommu_one(struct amd_iommu *iommu, struct ivhd_header *h)
695 init_iommu_from_acpi(iommu, h); 700 init_iommu_from_acpi(iommu, h);
696 init_iommu_devices(iommu); 701 init_iommu_devices(iommu);
697 702
703 pci_enable_device(iommu->dev);
704
698 return 0; 705 return 0;
699} 706}
700 707
diff --git a/include/asm-x86/amd_iommu_types.h b/include/asm-x86/amd_iommu_types.h
index 20814b85bbc3..a5629a21557c 100644
--- a/include/asm-x86/amd_iommu_types.h
+++ b/include/asm-x86/amd_iommu_types.h
@@ -215,8 +215,9 @@ struct amd_iommu {
215 /* locks the accesses to the hardware */ 215 /* locks the accesses to the hardware */
216 spinlock_t lock; 216 spinlock_t lock;
217 217
218 /* device id of this IOMMU */ 218 /* Pointer to PCI device of this IOMMU */
219 u16 devid; 219 struct pci_dev *dev;
220
220 /* 221 /*
221 * Capability pointer. There could be more than one IOMMU per PCI 222 * Capability pointer. There could be more than one IOMMU per PCI
222 * device function if there are more than one AMD IOMMU capability 223 * device function if there are more than one AMD IOMMU capability