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authorJoerg Roedel <joerg.roedel@amd.com>2008-09-11 04:38:32 -0400
committerIngo Molnar <mingo@elte.hu>2008-09-19 06:59:22 -0400
commit38ddf41b198e21d3ecbe5752e875857b7ce7589e (patch)
tree5c20869c5f66a92087627853e742c2af5176b7c6
parentbd60b735c658e6e8c656e89771d281bcfcf51279 (diff)
AMD IOMMU: some set_device_domain cleanups
Remove some magic numbers and split the pte_root using standard functions. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
-rw-r--r--arch/x86/kernel/amd_iommu.c9
-rw-r--r--include/asm-x86/amd_iommu_types.h3
2 files changed, 8 insertions, 4 deletions
diff --git a/arch/x86/kernel/amd_iommu.c b/arch/x86/kernel/amd_iommu.c
index 7c1791447451..a34d8e915e3a 100644
--- a/arch/x86/kernel/amd_iommu.c
+++ b/arch/x86/kernel/amd_iommu.c
@@ -739,12 +739,13 @@ static void set_device_domain(struct amd_iommu *iommu,
739 739
740 u64 pte_root = virt_to_phys(domain->pt_root); 740 u64 pte_root = virt_to_phys(domain->pt_root);
741 741
742 pte_root |= (domain->mode & 0x07) << 9; 742 pte_root |= (domain->mode & DEV_ENTRY_MODE_MASK)
743 pte_root |= IOMMU_PTE_IR | IOMMU_PTE_IW | IOMMU_PTE_P | 2; 743 << DEV_ENTRY_MODE_SHIFT;
744 pte_root |= IOMMU_PTE_IR | IOMMU_PTE_IW | IOMMU_PTE_P | IOMMU_PTE_TV;
744 745
745 write_lock_irqsave(&amd_iommu_devtable_lock, flags); 746 write_lock_irqsave(&amd_iommu_devtable_lock, flags);
746 amd_iommu_dev_table[devid].data[0] = pte_root; 747 amd_iommu_dev_table[devid].data[0] = lower_32_bits(pte_root);
747 amd_iommu_dev_table[devid].data[1] = pte_root >> 32; 748 amd_iommu_dev_table[devid].data[1] = upper_32_bits(pte_root);
748 amd_iommu_dev_table[devid].data[2] = domain->id; 749 amd_iommu_dev_table[devid].data[2] = domain->id;
749 750
750 amd_iommu_pd_table[devid] = domain; 751 amd_iommu_pd_table[devid] = domain;
diff --git a/include/asm-x86/amd_iommu_types.h b/include/asm-x86/amd_iommu_types.h
index 9aa22ead22f3..f953309a636e 100644
--- a/include/asm-x86/amd_iommu_types.h
+++ b/include/asm-x86/amd_iommu_types.h
@@ -130,6 +130,8 @@
130#define DEV_ENTRY_NMI_PASS 0xba 130#define DEV_ENTRY_NMI_PASS 0xba
131#define DEV_ENTRY_LINT0_PASS 0xbe 131#define DEV_ENTRY_LINT0_PASS 0xbe
132#define DEV_ENTRY_LINT1_PASS 0xbf 132#define DEV_ENTRY_LINT1_PASS 0xbf
133#define DEV_ENTRY_MODE_MASK 0x07
134#define DEV_ENTRY_MODE_SHIFT 0x09
133 135
134/* constants to configure the command buffer */ 136/* constants to configure the command buffer */
135#define CMD_BUFFER_SIZE 8192 137#define CMD_BUFFER_SIZE 8192
@@ -159,6 +161,7 @@
159#define IOMMU_MAP_SIZE_L3 (1ULL << 39) 161#define IOMMU_MAP_SIZE_L3 (1ULL << 39)
160 162
161#define IOMMU_PTE_P (1ULL << 0) 163#define IOMMU_PTE_P (1ULL << 0)
164#define IOMMU_PTE_TV (1ULL << 1)
162#define IOMMU_PTE_U (1ULL << 59) 165#define IOMMU_PTE_U (1ULL << 59)
163#define IOMMU_PTE_FC (1ULL << 60) 166#define IOMMU_PTE_FC (1ULL << 60)
164#define IOMMU_PTE_IR (1ULL << 61) 167#define IOMMU_PTE_IR (1ULL << 61)