diff options
author | Nick Kossifidis <mickflemm@gmail.com> | 2008-02-28 14:43:51 -0500 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2008-03-07 16:02:57 -0500 |
commit | f714dd6d452af8fda700d67dc67163c6ad9d4569 (patch) | |
tree | e369236c8df81c1b1aa12220b55570114fb96ecf | |
parent | 8daeef9717598f638e6fa8ea12770173d2dea771 (diff) |
ath5k: Add RF2413 initial settings
* Add initial settings for RF2413
Changes-licensed-under: ISC
Signed-off-by: Nick Kossifidis <mickflemm@gmail.com>
Signed-off-by: Luis R. Rodriguez <mcgrof@winlab.rutgers.edu>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
-rw-r--r-- | drivers/net/wireless/ath5k/initvals.c | 233 | ||||
-rw-r--r-- | drivers/net/wireless/ath5k/phy.c | 163 |
2 files changed, 392 insertions, 4 deletions
diff --git a/drivers/net/wireless/ath5k/initvals.c b/drivers/net/wireless/ath5k/initvals.c index cfcb1fe7bd34..fdbab2f08178 100644 --- a/drivers/net/wireless/ath5k/initvals.c +++ b/drivers/net/wireless/ath5k/initvals.c | |||
@@ -678,8 +678,8 @@ static const struct ath5k_ini ar5212_ini[] = { | |||
678 | { AR5K_PHY(644), 0x00806333 }, | 678 | { AR5K_PHY(644), 0x00806333 }, |
679 | { AR5K_PHY(645), 0x00106c10 }, | 679 | { AR5K_PHY(645), 0x00106c10 }, |
680 | { AR5K_PHY(646), 0x009c4060 }, | 680 | { AR5K_PHY(646), 0x009c4060 }, |
681 | /*{ AR5K_PHY(647), 0x1483800a },*/ /* Old value */ | ||
682 | { AR5K_PHY(647), 0x1483800a }, | 681 | { AR5K_PHY(647), 0x1483800a }, |
682 | /* { AR5K_PHY(648), 0x018830c6 },*/ /* 2413 */ | ||
683 | { AR5K_PHY(648), 0x01831061 }, | 683 | { AR5K_PHY(648), 0x01831061 }, |
684 | { AR5K_PHY(649), 0x00000400 }, | 684 | { AR5K_PHY(649), 0x00000400 }, |
685 | /*{ AR5K_PHY(650), 0x000001b5 },*/ | 685 | /*{ AR5K_PHY(650), 0x000001b5 },*/ |
@@ -1081,6 +1081,207 @@ static const struct ath5k_ini_mode rf5413_ini_mode_end[] = { | |||
1081 | { 0xf3307ff0, 0xf3307ff0, 0xf3307ff0, 0xf3307ff0, 0xf3307ff0 } }, | 1081 | { 0xf3307ff0, 0xf3307ff0, 0xf3307ff0, 0xf3307ff0, 0xf3307ff0 } }, |
1082 | }; | 1082 | }; |
1083 | 1083 | ||
1084 | /* Initial mode-specific settings for RF2413/2414 (Written after ar5212_ini) */ | ||
1085 | /* XXX: No dumps for turbog yet, so turbog is the same with g here with some | ||
1086 | * minor tweaking based on dumps from other chips */ | ||
1087 | static const struct ath5k_ini_mode rf2413_ini_mode_end[] = { | ||
1088 | { AR5K_TXCFG, | ||
1089 | /* b g gTurbo */ | ||
1090 | { 0x00000015, 0x00000015, 0x00000015 } }, | ||
1091 | { AR5K_USEC_5211, | ||
1092 | { 0x04e01395, 0x12e013ab, 0x098813cf } }, | ||
1093 | { AR5K_PHY(10), | ||
1094 | { 0x05020000, 0x0a020001, 0x0a020001 } }, | ||
1095 | { AR5K_PHY(13), | ||
1096 | { 0x00000e00, 0x00000e00, 0x00000e00 } }, | ||
1097 | { AR5K_PHY(14), | ||
1098 | { 0x0000000a, 0x0000000a, 0x0000000a } }, | ||
1099 | { AR5K_PHY(18), | ||
1100 | { 0x001a6a64, 0x001a6a64, 0x001a6a64 } }, | ||
1101 | { AR5K_PHY(20), | ||
1102 | { 0x0de8b0da, 0x0c98b0da, 0x0c98b0da } }, | ||
1103 | { AR5K_PHY_SIG, | ||
1104 | { 0x7ee80d2e, 0x7ec80d2e, 0x7ec80d2e } }, | ||
1105 | { AR5K_PHY_AGCCOARSE, | ||
1106 | { 0x3137665e, 0x3139605e, 0x3139605e } }, | ||
1107 | { AR5K_PHY(27), | ||
1108 | { 0x050cb081, 0x050cb081, 0x050cb081 } }, | ||
1109 | { AR5K_PHY_RX_DELAY, | ||
1110 | { 0x0000044c, 0x00000898, 0x000007d0 } }, | ||
1111 | { AR5K_PHY_FRAME_CTL_5211, | ||
1112 | { 0xf7b80d00, 0xf7b81000, 0xf7b81000 } }, | ||
1113 | { AR5K_PHY_CCKTXCTL, | ||
1114 | { 0x00000000, 0x00000000, 0x00000000 } }, | ||
1115 | { AR5K_PHY(642), | ||
1116 | { 0xd03e6788, 0xd03e6788, 0xd03e6788 } }, | ||
1117 | { AR5K_PHY_GAIN_2GHZ, | ||
1118 | { 0x0042c140, 0x0042c140, 0x0042c140 } }, | ||
1119 | { 0xa21c, | ||
1120 | { 0x1863800a, 0x1883800a, 0x1883800a } }, | ||
1121 | { AR5K_DCU_FP, | ||
1122 | { 0x000003e0, 0x000003e0, 0x000003e0 } }, | ||
1123 | { 0x8060, | ||
1124 | { 0x0000000f, 0x0000000f, 0x0000000f } }, | ||
1125 | { 0x8118, | ||
1126 | { 0x00000000, 0x00000000, 0x00000000 } }, | ||
1127 | { 0x811c, | ||
1128 | { 0x00000000, 0x00000000, 0x00000000 } }, | ||
1129 | { 0x8120, | ||
1130 | { 0x00000000, 0x00000000, 0x00000000 } }, | ||
1131 | { 0x8124, | ||
1132 | { 0x00000000, 0x00000000, 0x00000000 } }, | ||
1133 | { 0x8128, | ||
1134 | { 0x00000000, 0x00000000, 0x00000000 } }, | ||
1135 | { 0x812c, | ||
1136 | { 0x00000000, 0x00000000, 0x00000000 } }, | ||
1137 | { 0x8130, | ||
1138 | { 0x00000000, 0x00000000, 0x00000000 } }, | ||
1139 | { 0x8134, | ||
1140 | { 0x00000000, 0x00000000, 0x00000000 } }, | ||
1141 | { 0x8138, | ||
1142 | { 0x00000000, 0x00000000, 0x00000000 } }, | ||
1143 | { 0x813c, | ||
1144 | { 0x00000000, 0x00000000, 0x00000000 } }, | ||
1145 | { 0x8140, | ||
1146 | { 0x800000a8, 0x800000a8, 0x800000a8 } }, | ||
1147 | { 0x8144, | ||
1148 | { 0x00000000, 0x00000000, 0x00000000 } }, | ||
1149 | { AR5K_PHY_AGC, | ||
1150 | { 0x00000000, 0x00000000, 0x00000000 } }, | ||
1151 | { AR5K_PHY(11), | ||
1152 | { 0x0000a000, 0x0000a000, 0x0000a000 } }, | ||
1153 | { AR5K_PHY(15), | ||
1154 | { 0x00200400, 0x00200400, 0x00200400 } }, | ||
1155 | { AR5K_PHY(19), | ||
1156 | { 0x1284233c, 0x1284233c, 0x1284233c } }, | ||
1157 | { AR5K_PHY_SCR, | ||
1158 | { 0x0000001f, 0x0000001f, 0x0000001f } }, | ||
1159 | { AR5K_PHY_SLMT, | ||
1160 | { 0x00000080, 0x00000080, 0x00000080 } }, | ||
1161 | { AR5K_PHY_SCAL, | ||
1162 | { 0x0000000e, 0x0000000e, 0x0000000e } }, | ||
1163 | { AR5K_PHY(86), | ||
1164 | { 0x000000ff, 0x000000ff, 0x000000ff } }, | ||
1165 | { AR5K_PHY(96), | ||
1166 | { 0x00000000, 0x00000000, 0x00000000 } }, | ||
1167 | { AR5K_PHY(97), | ||
1168 | { 0x02800000, 0x02800000, 0x02800000 } }, | ||
1169 | { AR5K_PHY(104), | ||
1170 | { 0x00000000, 0x00000000, 0x00000000 } }, | ||
1171 | { AR5K_PHY(120), | ||
1172 | { 0x00000000, 0x00000000, 0x00000000 } }, | ||
1173 | { AR5K_PHY(121), | ||
1174 | { 0xaaaaaaaa, 0xaaaaaaaa, 0xaaaaaaaa } }, | ||
1175 | { AR5K_PHY(122), | ||
1176 | { 0x3c466478, 0x3c466478, 0x3c466478 } }, | ||
1177 | { AR5K_PHY(123), | ||
1178 | { 0x000000aa, 0x000000aa, 0x000000aa } }, | ||
1179 | { AR5K_PHY_SCLOCK, | ||
1180 | { 0x0000000c, 0x0000000c, 0x0000000c } }, | ||
1181 | { AR5K_PHY_SDELAY, | ||
1182 | { 0x000000ff, 0x000000ff, 0x000000ff } }, | ||
1183 | { AR5K_PHY_SPENDING, | ||
1184 | { 0x00000014, 0x00000014, 0x00000014 } }, | ||
1185 | { 0xa228, | ||
1186 | { 0x000009b5, 0x000009b5, 0x000009b5 } }, | ||
1187 | { 0xa23c, | ||
1188 | { 0x93c889af, 0x93c889af, 0x93c889af } }, | ||
1189 | { 0xa24c, | ||
1190 | { 0x00000001, 0x00000001, 0x00000001 } }, | ||
1191 | { 0xa250, | ||
1192 | { 0x0000a000, 0x0000a000, 0x0000a000 } }, | ||
1193 | { 0xa254, | ||
1194 | { 0x00000000, 0x00000000, 0x00000000 } }, | ||
1195 | { 0xa258, | ||
1196 | { 0x0cc75380, 0x0cc75380, 0x0cc75380 } }, | ||
1197 | { 0xa25c, | ||
1198 | { 0x0f0f0f01, 0x0f0f0f01, 0x0f0f0f01 } }, | ||
1199 | { 0xa260, | ||
1200 | { 0x5f690f01, 0x5f690f01, 0x5f690f01 } }, | ||
1201 | { 0xa264, | ||
1202 | { 0x00418a11, 0x00418a11, 0x00418a11 } }, | ||
1203 | { 0xa268, | ||
1204 | { 0x00000000, 0x00000000, 0x00000000 } }, | ||
1205 | { 0xa26c, | ||
1206 | { 0x0c30c16a, 0x0c30c16a, 0x0c30c16a } }, | ||
1207 | { 0xa270, | ||
1208 | { 0x00820820, 0x00820820, 0x00820820 } }, | ||
1209 | { 0xa274, | ||
1210 | { 0x001b7caa, 0x001b7caa, 0x001b7caa } }, | ||
1211 | { 0xa278, | ||
1212 | { 0x1ce739ce, 0x1ce739ce, 0x1ce739ce } }, | ||
1213 | { 0xa27c, | ||
1214 | { 0x051701ce, 0x051701ce, 0x051701ce } }, | ||
1215 | { 0xa300, | ||
1216 | { 0x18010000, 0x18010000, 0x18010000 } }, | ||
1217 | { 0xa304, | ||
1218 | { 0x30032602, 0x30032602, 0x30032602 } }, | ||
1219 | { 0xa308, | ||
1220 | { 0x48073e06, 0x48073e06, 0x48073e06 } }, | ||
1221 | { 0xa30c, | ||
1222 | { 0x560b4c0a, 0x560b4c0a, 0x560b4c0a } }, | ||
1223 | { 0xa310, | ||
1224 | { 0x641a600f, 0x641a600f, 0x641a600f } }, | ||
1225 | { 0xa314, | ||
1226 | { 0x784f6e1b, 0x784f6e1b, 0x784f6e1b } }, | ||
1227 | { 0xa318, | ||
1228 | { 0x868f7c5a, 0x868f7c5a, 0x868f7c5a } }, | ||
1229 | { 0xa31c, | ||
1230 | { 0x8ecf865b, 0x8ecf865b, 0x8ecf865b } }, | ||
1231 | { 0xa320, | ||
1232 | { 0x9d4f970f, 0x9d4f970f, 0x9d4f970f } }, | ||
1233 | { 0xa324, | ||
1234 | { 0xa5cfa18f, 0xa5cfa18f, 0xa5cfa18f } }, | ||
1235 | { 0xa328, | ||
1236 | { 0xb55faf1f, 0xb55faf1f, 0xb55faf1f } }, | ||
1237 | { 0xa32c, | ||
1238 | { 0xbddfb99f, 0xbddfb99f, 0xbddfb99f } }, | ||
1239 | { 0xa330, | ||
1240 | { 0xcd7fc73f, 0xcd7fc73f, 0xcd7fc73f } }, | ||
1241 | { 0xa334, | ||
1242 | { 0xd5ffd1bf, 0xd5ffd1bf, 0xd5ffd1bf } }, | ||
1243 | { 0xa338, | ||
1244 | { 0x00000000, 0x00000000, 0x00000000 } }, | ||
1245 | { 0xa33c, | ||
1246 | { 0x00000000, 0x00000000, 0x00000000 } }, | ||
1247 | { 0xa340, | ||
1248 | { 0x00000000, 0x00000000, 0x00000000 } }, | ||
1249 | { 0xa344, | ||
1250 | { 0x00000000, 0x00000000, 0x00000000 } }, | ||
1251 | { 0xa348, | ||
1252 | { 0x3fffffff, 0x3fffffff, 0x3fffffff } }, | ||
1253 | { 0xa34c, | ||
1254 | { 0x3fffffff, 0x3fffffff, 0x3fffffff } }, | ||
1255 | { 0xa350, | ||
1256 | { 0x3fffffff, 0x3fffffff, 0x3fffffff } }, | ||
1257 | { 0xa354, | ||
1258 | { 0x0003ffff, 0x0003ffff, 0x0003ffff } }, | ||
1259 | { 0xa358, | ||
1260 | { 0x79a8aa1f, 0x79a8aa1f, 0x79a8aa1f } }, | ||
1261 | { 0xa35c, | ||
1262 | { 0x066c420f, 0x066c420f, 0x066c420f } }, | ||
1263 | { 0xa360, | ||
1264 | { 0x0f282207, 0x0f282207, 0x0f282207 } }, | ||
1265 | { 0xa364, | ||
1266 | { 0x17601685, 0x17601685, 0x17601685 } }, | ||
1267 | { 0xa368, | ||
1268 | { 0x1f801104, 0x1f801104, 0x1f801104 } }, | ||
1269 | { 0xa36c, | ||
1270 | { 0x37a00c03, 0x37a00c03, 0x37a00c03 } }, | ||
1271 | { 0xa370, | ||
1272 | { 0x3fc40883, 0x3fc40883, 0x3fc40883 } }, | ||
1273 | { 0xa374, | ||
1274 | { 0x57c00803, 0x57c00803, 0x57c00803 } }, | ||
1275 | { 0xa378, | ||
1276 | { 0x5fd80682, 0x5fd80682, 0x5fd80682 } }, | ||
1277 | { 0xa37c, | ||
1278 | { 0x7fe00482, 0x7fe00482, 0x7fe00482 } }, | ||
1279 | { 0xa380, | ||
1280 | { 0x7f3c7bba, 0x7f3c7bba, 0x7f3c7bba } }, | ||
1281 | { 0xa384, | ||
1282 | { 0xf3307ff0, 0xf3307ff0, 0xf3307ff0 } }, | ||
1283 | }; | ||
1284 | |||
1084 | /* | 1285 | /* |
1085 | * Initial BaseBand Gain settings for RF5111/5112 (AR5210 comes with | 1286 | * Initial BaseBand Gain settings for RF5111/5112 (AR5210 comes with |
1086 | * RF5110 only so initial BB Gain settings are included in AR5K_AR5210_INI) | 1287 | * RF5110 only so initial BB Gain settings are included in AR5K_AR5210_INI) |
@@ -1290,29 +1491,57 @@ int ath5k_hw_write_initvals(struct ath5k_hw *ah, u8 mode, bool change_channel) | |||
1290 | 1491 | ||
1291 | /* Second set of mode-specific settings */ | 1492 | /* Second set of mode-specific settings */ |
1292 | if (ah->ah_radio == AR5K_RF5111){ | 1493 | if (ah->ah_radio == AR5K_RF5111){ |
1494 | |||
1293 | ath5k_hw_ini_mode_registers(ah, | 1495 | ath5k_hw_ini_mode_registers(ah, |
1294 | ARRAY_SIZE(ar5212_rf5111_ini_mode_end), | 1496 | ARRAY_SIZE(ar5212_rf5111_ini_mode_end), |
1295 | ar5212_rf5111_ini_mode_end, mode); | 1497 | ar5212_rf5111_ini_mode_end, mode); |
1498 | |||
1296 | /* Baseband gain table */ | 1499 | /* Baseband gain table */ |
1297 | ath5k_hw_ini_registers(ah, | 1500 | ath5k_hw_ini_registers(ah, |
1298 | ARRAY_SIZE(rf5111_ini_bbgain), | 1501 | ARRAY_SIZE(rf5111_ini_bbgain), |
1299 | rf5111_ini_bbgain, change_channel); | 1502 | rf5111_ini_bbgain, change_channel); |
1503 | |||
1300 | } else if (ah->ah_radio == AR5K_RF5112){ | 1504 | } else if (ah->ah_radio == AR5K_RF5112){ |
1505 | |||
1301 | ath5k_hw_ini_mode_registers(ah, | 1506 | ath5k_hw_ini_mode_registers(ah, |
1302 | ARRAY_SIZE(ar5212_rf5112_ini_mode_end), | 1507 | ARRAY_SIZE(ar5212_rf5112_ini_mode_end), |
1303 | ar5212_rf5112_ini_mode_end, mode); | 1508 | ar5212_rf5112_ini_mode_end, mode); |
1304 | /* Baseband gain table */ | 1509 | |
1305 | ath5k_hw_ini_registers(ah, | 1510 | ath5k_hw_ini_registers(ah, |
1306 | ARRAY_SIZE(rf5112_ini_bbgain), | 1511 | ARRAY_SIZE(rf5112_ini_bbgain), |
1307 | rf5112_ini_bbgain, change_channel); | 1512 | rf5112_ini_bbgain, change_channel); |
1513 | |||
1308 | } else if (ah->ah_radio == AR5K_RF5413){ | 1514 | } else if (ah->ah_radio == AR5K_RF5413){ |
1515 | |||
1309 | ath5k_hw_ini_mode_registers(ah, | 1516 | ath5k_hw_ini_mode_registers(ah, |
1310 | ARRAY_SIZE(rf5413_ini_mode_end), | 1517 | ARRAY_SIZE(rf5413_ini_mode_end), |
1311 | rf5413_ini_mode_end, mode); | 1518 | rf5413_ini_mode_end, mode); |
1519 | |||
1520 | ath5k_hw_ini_registers(ah, | ||
1521 | ARRAY_SIZE(rf5112_ini_bbgain), | ||
1522 | rf5112_ini_bbgain, change_channel); | ||
1523 | |||
1524 | } else if (ah->ah_radio == AR5K_RF2413) { | ||
1525 | |||
1526 | if (mode < 2) { | ||
1527 | ATH5K_ERR(ah->ah_sc, | ||
1528 | "unsupported channel mode: %d\n", mode); | ||
1529 | return -EINVAL; | ||
1530 | } | ||
1531 | mode = mode - 2; | ||
1532 | |||
1533 | /* Override a setting from ar5212_ini */ | ||
1534 | ath5k_hw_reg_write(ah, 0x018830c6, AR5K_PHY(648)); | ||
1535 | |||
1536 | ath5k_hw_ini_mode_registers(ah, | ||
1537 | ARRAY_SIZE(rf2413_ini_mode_end), | ||
1538 | rf2413_ini_mode_end, mode); | ||
1539 | |||
1312 | /* Baseband gain table */ | 1540 | /* Baseband gain table */ |
1313 | ath5k_hw_ini_registers(ah, | 1541 | ath5k_hw_ini_registers(ah, |
1314 | ARRAY_SIZE(rf5112_ini_bbgain), | 1542 | ARRAY_SIZE(rf5112_ini_bbgain), |
1315 | rf5112_ini_bbgain, change_channel); | 1543 | rf5112_ini_bbgain, change_channel); |
1544 | |||
1316 | } | 1545 | } |
1317 | /* For AR5211 */ | 1546 | /* For AR5211 */ |
1318 | } else if (ah->ah_version == AR5K_AR5211) { | 1547 | } else if (ah->ah_version == AR5K_AR5211) { |
diff --git a/drivers/net/wireless/ath5k/phy.c b/drivers/net/wireless/ath5k/phy.c index 405195ffb24d..f108b08ff4af 100644 --- a/drivers/net/wireless/ath5k/phy.c +++ b/drivers/net/wireless/ath5k/phy.c | |||
@@ -666,6 +666,75 @@ static const struct ath5k_ini_rf rfregs_5413[] = { | |||
666 | { 0x0000000e, 0x0000000e, 0x0000000e, 0x0000000e, 0x0000000e } }, | 666 | { 0x0000000e, 0x0000000e, 0x0000000e, 0x0000000e, 0x0000000e } }, |
667 | }; | 667 | }; |
668 | 668 | ||
669 | /* RF2413/2414 mode-specific init registers */ | ||
670 | static const struct ath5k_ini_rf rfregs_2413[] = { | ||
671 | { 1, AR5K_RF_BUFFER_CONTROL_4, | ||
672 | { 0x00000020, 0x00000020, 0x00000020 } }, | ||
673 | { 2, AR5K_RF_BUFFER_CONTROL_3, | ||
674 | { 0x02001408, 0x02001408, 0x02001408 } }, | ||
675 | { 3, AR5K_RF_BUFFER_CONTROL_6, | ||
676 | { 0x00e020c0, 0x00e020c0, 0x00e020c0 } }, | ||
677 | { 6, AR5K_RF_BUFFER, | ||
678 | { 0xf0000000, 0xf0000000, 0xf0000000 } }, | ||
679 | { 6, AR5K_RF_BUFFER, | ||
680 | { 0x00000000, 0x00000000, 0x00000000 } }, | ||
681 | { 6, AR5K_RF_BUFFER, | ||
682 | { 0x03000000, 0x03000000, 0x03000000 } }, | ||
683 | { 6, AR5K_RF_BUFFER, | ||
684 | { 0x00000000, 0x00000000, 0x00000000 } }, | ||
685 | { 6, AR5K_RF_BUFFER, | ||
686 | { 0x00000000, 0x00000000, 0x00000000 } }, | ||
687 | { 6, AR5K_RF_BUFFER, | ||
688 | { 0x00000000, 0x00000000, 0x00000000 } }, | ||
689 | { 6, AR5K_RF_BUFFER, | ||
690 | { 0x00000000, 0x00000000, 0x00000000 } }, | ||
691 | { 6, AR5K_RF_BUFFER, | ||
692 | { 0x00000000, 0x00000000, 0x00000000 } }, | ||
693 | { 6, AR5K_RF_BUFFER, | ||
694 | { 0x40400000, 0x40400000, 0x40400000 } }, | ||
695 | { 6, AR5K_RF_BUFFER, | ||
696 | { 0x65050000, 0x65050000, 0x65050000 } }, | ||
697 | { 6, AR5K_RF_BUFFER, | ||
698 | { 0x00000000, 0x00000000, 0x00000000 } }, | ||
699 | { 6, AR5K_RF_BUFFER, | ||
700 | { 0x00000000, 0x00000000, 0x00000000 } }, | ||
701 | { 6, AR5K_RF_BUFFER, | ||
702 | { 0x00420000, 0x00420000, 0x00420000 } }, | ||
703 | { 6, AR5K_RF_BUFFER, | ||
704 | { 0x00b50000, 0x00b50000, 0x00b50000 } }, | ||
705 | { 6, AR5K_RF_BUFFER, | ||
706 | { 0x00030000, 0x00030000, 0x00030000 } }, | ||
707 | { 6, AR5K_RF_BUFFER, | ||
708 | { 0x00f70000, 0x00f70000, 0x00f70000 } }, | ||
709 | { 6, AR5K_RF_BUFFER, | ||
710 | { 0x009d0000, 0x009d0000, 0x009d0000 } }, | ||
711 | { 6, AR5K_RF_BUFFER, | ||
712 | { 0x00220000, 0x00220000, 0x00220000 } }, | ||
713 | { 6, AR5K_RF_BUFFER, | ||
714 | { 0x04220000, 0x04220000, 0x04220000 } }, | ||
715 | { 6, AR5K_RF_BUFFER, | ||
716 | { 0x00230018, 0x00230018, 0x00230018 } }, | ||
717 | { 6, AR5K_RF_BUFFER, | ||
718 | { 0x00280050, 0x00280050, 0x00280050 } }, | ||
719 | { 6, AR5K_RF_BUFFER, | ||
720 | { 0x005000c3, 0x005000c3, 0x005000c3 } }, | ||
721 | { 6, AR5K_RF_BUFFER, | ||
722 | { 0x0004007f, 0x0004007f, 0x0004007f } }, | ||
723 | { 6, AR5K_RF_BUFFER, | ||
724 | { 0x00000458, 0x00000458, 0x00000458 } }, | ||
725 | { 6, AR5K_RF_BUFFER, | ||
726 | { 0x00000000, 0x00000000, 0x00000000 } }, | ||
727 | { 6, AR5K_RF_BUFFER, | ||
728 | { 0x0000c000, 0x0000c000, 0x0000c000 } }, | ||
729 | { 6, AR5K_RF_BUFFER_CONTROL_5, | ||
730 | { 0x00400230, 0x00400230, 0x00400230 } }, | ||
731 | { 7, AR5K_RF_BUFFER, | ||
732 | { 0x00006400, 0x00006400, 0x00006400 } }, | ||
733 | { 7, AR5K_RF_BUFFER, | ||
734 | { 0x00000800, 0x00000800, 0x00000800 } }, | ||
735 | { 7, AR5K_RF_BUFFER_CONTROL_2, | ||
736 | { 0x0000000e, 0x0000000e, 0x0000000e } }, | ||
737 | }; | ||
669 | 738 | ||
670 | /* Initial RF Gain settings for RF5112 */ | 739 | /* Initial RF Gain settings for RF5112 */ |
671 | static const struct ath5k_ini_rfgain rfgain_5112[] = { | 740 | static const struct ath5k_ini_rfgain rfgain_5112[] = { |
@@ -805,6 +874,74 @@ static const struct ath5k_ini_rfgain rfgain_5413[] = { | |||
805 | { AR5K_RF_GAIN(63), { 0x000000f9, 0x000000f9 } }, | 874 | { AR5K_RF_GAIN(63), { 0x000000f9, 0x000000f9 } }, |
806 | }; | 875 | }; |
807 | 876 | ||
877 | /* Initial RF Gain settings for RF2413 */ | ||
878 | static const struct ath5k_ini_rfgain rfgain_2413[] = { | ||
879 | { AR5K_RF_GAIN(0), { 0x00000000 } }, | ||
880 | { AR5K_RF_GAIN(1), { 0x00000040 } }, | ||
881 | { AR5K_RF_GAIN(2), { 0x00000080 } }, | ||
882 | { AR5K_RF_GAIN(3), { 0x00000181 } }, | ||
883 | { AR5K_RF_GAIN(4), { 0x000001c1 } }, | ||
884 | { AR5K_RF_GAIN(5), { 0x00000001 } }, | ||
885 | { AR5K_RF_GAIN(6), { 0x00000041 } }, | ||
886 | { AR5K_RF_GAIN(7), { 0x00000081 } }, | ||
887 | { AR5K_RF_GAIN(8), { 0x00000168 } }, | ||
888 | { AR5K_RF_GAIN(9), { 0x000001a8 } }, | ||
889 | { AR5K_RF_GAIN(10), { 0x000001e8 } }, | ||
890 | { AR5K_RF_GAIN(11), { 0x00000028 } }, | ||
891 | { AR5K_RF_GAIN(12), { 0x00000068 } }, | ||
892 | { AR5K_RF_GAIN(13), { 0x00000189 } }, | ||
893 | { AR5K_RF_GAIN(14), { 0x000001c9 } }, | ||
894 | { AR5K_RF_GAIN(15), { 0x00000009 } }, | ||
895 | { AR5K_RF_GAIN(16), { 0x00000049 } }, | ||
896 | { AR5K_RF_GAIN(17), { 0x00000089 } }, | ||
897 | { AR5K_RF_GAIN(18), { 0x00000190 } }, | ||
898 | { AR5K_RF_GAIN(19), { 0x000001d0 } }, | ||
899 | { AR5K_RF_GAIN(20), { 0x00000010 } }, | ||
900 | { AR5K_RF_GAIN(21), { 0x00000050 } }, | ||
901 | { AR5K_RF_GAIN(22), { 0x00000090 } }, | ||
902 | { AR5K_RF_GAIN(23), { 0x00000191 } }, | ||
903 | { AR5K_RF_GAIN(24), { 0x000001d1 } }, | ||
904 | { AR5K_RF_GAIN(25), { 0x00000011 } }, | ||
905 | { AR5K_RF_GAIN(26), { 0x00000051 } }, | ||
906 | { AR5K_RF_GAIN(27), { 0x00000091 } }, | ||
907 | { AR5K_RF_GAIN(28), { 0x00000178 } }, | ||
908 | { AR5K_RF_GAIN(29), { 0x000001b8 } }, | ||
909 | { AR5K_RF_GAIN(30), { 0x000001f8 } }, | ||
910 | { AR5K_RF_GAIN(31), { 0x00000038 } }, | ||
911 | { AR5K_RF_GAIN(32), { 0x00000078 } }, | ||
912 | { AR5K_RF_GAIN(33), { 0x00000199 } }, | ||
913 | { AR5K_RF_GAIN(34), { 0x000001d9 } }, | ||
914 | { AR5K_RF_GAIN(35), { 0x00000019 } }, | ||
915 | { AR5K_RF_GAIN(36), { 0x00000059 } }, | ||
916 | { AR5K_RF_GAIN(37), { 0x00000099 } }, | ||
917 | { AR5K_RF_GAIN(38), { 0x000000d9 } }, | ||
918 | { AR5K_RF_GAIN(39), { 0x000000f9 } }, | ||
919 | { AR5K_RF_GAIN(40), { 0x000000f9 } }, | ||
920 | { AR5K_RF_GAIN(41), { 0x000000f9 } }, | ||
921 | { AR5K_RF_GAIN(42), { 0x000000f9 } }, | ||
922 | { AR5K_RF_GAIN(43), { 0x000000f9 } }, | ||
923 | { AR5K_RF_GAIN(44), { 0x000000f9 } }, | ||
924 | { AR5K_RF_GAIN(45), { 0x000000f9 } }, | ||
925 | { AR5K_RF_GAIN(46), { 0x000000f9 } }, | ||
926 | { AR5K_RF_GAIN(47), { 0x000000f9 } }, | ||
927 | { AR5K_RF_GAIN(48), { 0x000000f9 } }, | ||
928 | { AR5K_RF_GAIN(49), { 0x000000f9 } }, | ||
929 | { AR5K_RF_GAIN(50), { 0x000000f9 } }, | ||
930 | { AR5K_RF_GAIN(51), { 0x000000f9 } }, | ||
931 | { AR5K_RF_GAIN(52), { 0x000000f9 } }, | ||
932 | { AR5K_RF_GAIN(53), { 0x000000f9 } }, | ||
933 | { AR5K_RF_GAIN(54), { 0x000000f9 } }, | ||
934 | { AR5K_RF_GAIN(55), { 0x000000f9 } }, | ||
935 | { AR5K_RF_GAIN(56), { 0x000000f9 } }, | ||
936 | { AR5K_RF_GAIN(57), { 0x000000f9 } }, | ||
937 | { AR5K_RF_GAIN(58), { 0x000000f9 } }, | ||
938 | { AR5K_RF_GAIN(59), { 0x000000f9 } }, | ||
939 | { AR5K_RF_GAIN(60), { 0x000000f9 } }, | ||
940 | { AR5K_RF_GAIN(61), { 0x000000f9 } }, | ||
941 | { AR5K_RF_GAIN(62), { 0x000000f9 } }, | ||
942 | { AR5K_RF_GAIN(63), { 0x000000f9 } }, | ||
943 | }; | ||
944 | |||
808 | static const struct ath5k_gain_opt rfgain_opt_5112 = { | 945 | static const struct ath5k_gain_opt rfgain_opt_5112 = { |
809 | 1, | 946 | 1, |
810 | 8, | 947 | 8, |
@@ -1226,8 +1363,21 @@ static int ath5k_hw_rf5413_rfregs(struct ath5k_hw *ah, | |||
1226 | 1363 | ||
1227 | rf = ah->ah_rf_banks; | 1364 | rf = ah->ah_rf_banks; |
1228 | 1365 | ||
1229 | rf_ini = rfregs_5413; | 1366 | if (ah->ah_radio == AR5K_RF5413) { |
1230 | rf_size = ARRAY_SIZE(rfregs_5413); | 1367 | rf_ini = rfregs_5413; |
1368 | rf_size = ARRAY_SIZE(rfregs_5413); | ||
1369 | } else if (ah->ah_radio == AR5K_RF2413) { | ||
1370 | rf_ini = rfregs_2413; | ||
1371 | rf_size = ARRAY_SIZE(rfregs_2413); | ||
1372 | if (mode < 2) { | ||
1373 | ATH5K_ERR(ah->ah_sc, | ||
1374 | "invalid channel mode: %i\n", mode); | ||
1375 | return -EINVAL; | ||
1376 | } | ||
1377 | mode = mode - 2; | ||
1378 | } else { | ||
1379 | return -EINVAL; | ||
1380 | } | ||
1231 | 1381 | ||
1232 | /* Copy values to modify them */ | 1382 | /* Copy values to modify them */ |
1233 | for (i = 0; i < rf_size; i++) { | 1383 | for (i = 0; i < rf_size; i++) { |
@@ -1286,6 +1436,10 @@ int ath5k_hw_rfregs(struct ath5k_hw *ah, struct ieee80211_channel *channel, | |||
1286 | ah->ah_rf_banks_size = sizeof(rfregs_5413); | 1436 | ah->ah_rf_banks_size = sizeof(rfregs_5413); |
1287 | func = ath5k_hw_rf5413_rfregs; | 1437 | func = ath5k_hw_rf5413_rfregs; |
1288 | break; | 1438 | break; |
1439 | case AR5K_RF2413: | ||
1440 | ah->ah_rf_banks_size = sizeof(rfregs_2413); | ||
1441 | func = ath5k_hw_rf5413_rfregs; | ||
1442 | break; | ||
1289 | default: | 1443 | default: |
1290 | return -EINVAL; | 1444 | return -EINVAL; |
1291 | } | 1445 | } |
@@ -1324,6 +1478,11 @@ int ath5k_hw_rfgain(struct ath5k_hw *ah, unsigned int freq) | |||
1324 | ath5k_rfg = rfgain_5413; | 1478 | ath5k_rfg = rfgain_5413; |
1325 | size = ARRAY_SIZE(rfgain_5413); | 1479 | size = ARRAY_SIZE(rfgain_5413); |
1326 | break; | 1480 | break; |
1481 | case AR5K_RF2413: | ||
1482 | ath5k_rfg = rfgain_2413; | ||
1483 | size = ARRAY_SIZE(rfgain_2413); | ||
1484 | freq = 0; /* only 2Ghz */ | ||
1485 | break; | ||
1327 | default: | 1486 | default: |
1328 | return -EINVAL; | 1487 | return -EINVAL; |
1329 | } | 1488 | } |