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authorAlan Cox <alan@lxorguk.ukuu.org.uk>2010-01-06 09:01:26 -0500
committerGreg Kroah-Hartman <gregkh@suse.de>2010-01-20 18:05:26 -0500
commitd31a2ff03f31cbecb92bdc5b1ab9d62fb70971d7 (patch)
treec77b41d5661978dcecbeea057458e8af86081dba
parent20633bf0141c5e93e3396770d5eb7d200ee4068a (diff)
Staging: et131x: Fix 2.6.33rc1 regression in et131x
et131x: Fix 12bit wrapping From: Alan Cox <alan@linux.intel.com> The 12bit wrap logic conversion is wrong and this shows up for some memory sizes and layouts of card. Patch it up for now, once the kernel view of status is cleaned up it'll become two variables and a lot saner. Signed-off-by: Alan Cox <alan@linux.intel.com> Cc: stable <stable@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
-rw-r--r--drivers/staging/et131x/et1310_address_map.h18
-rw-r--r--drivers/staging/et131x/et1310_rx.c6
2 files changed, 16 insertions, 8 deletions
diff --git a/drivers/staging/et131x/et1310_address_map.h b/drivers/staging/et131x/et1310_address_map.h
index 6da843cc343c..e715e4dcb523 100644
--- a/drivers/staging/et131x/et1310_address_map.h
+++ b/drivers/staging/et131x/et1310_address_map.h
@@ -203,11 +203,14 @@ typedef struct _GLOBAL_t { /* Location: */
203 * 9-0: pr ndes 203 * 9-0: pr ndes
204 */ 204 */
205 205
206#define ET_DMA10_MASK 0x3FF /* 10 bit mask for DMA10W types */ 206#define ET_DMA12_MASK 0x0FFF /* 12 bit mask for DMA12W types */
207#define ET_DMA10_WRAP 0x400 207#define ET_DMA12_WRAP 0x1000
208#define ET_DMA4_MASK 0x00F /* 4 bit mask for DMA4W types */ 208#define ET_DMA10_MASK 0x03FF /* 10 bit mask for DMA10W types */
209#define ET_DMA4_WRAP 0x010 209#define ET_DMA10_WRAP 0x0400
210 210#define ET_DMA4_MASK 0x000F /* 4 bit mask for DMA4W types */
211#define ET_DMA4_WRAP 0x0010
212
213#define INDEX12(x) ((x) & ET_DMA12_MASK)
211#define INDEX10(x) ((x) & ET_DMA10_MASK) 214#define INDEX10(x) ((x) & ET_DMA10_MASK)
212#define INDEX4(x) ((x) & ET_DMA4_MASK) 215#define INDEX4(x) ((x) & ET_DMA4_MASK)
213 216
@@ -216,6 +219,11 @@ extern inline void add_10bit(u32 *v, int n)
216 *v = INDEX10(*v + n) | (*v & ET_DMA10_WRAP); 219 *v = INDEX10(*v + n) | (*v & ET_DMA10_WRAP);
217} 220}
218 221
222extern inline void add_12bit(u32 *v, int n)
223{
224 *v = INDEX12(*v + n) | (*v & ET_DMA12_WRAP);
225}
226
219/* 227/*
220 * 10bit DMA with wrap 228 * 10bit DMA with wrap
221 * txdma tx queue write address reg in txdma address map at 0x1010 229 * txdma tx queue write address reg in txdma address map at 0x1010
diff --git a/drivers/staging/et131x/et1310_rx.c b/drivers/staging/et131x/et1310_rx.c
index 3ddc9b12b8db..81c1a7478ad6 100644
--- a/drivers/staging/et131x/et1310_rx.c
+++ b/drivers/staging/et131x/et1310_rx.c
@@ -831,10 +831,10 @@ PMP_RFD nic_rx_pkts(struct et131x_adapter *etdev)
831 831
832 /* Indicate that we have used this PSR entry. */ 832 /* Indicate that we have used this PSR entry. */
833 /* FIXME wrap 12 */ 833 /* FIXME wrap 12 */
834 rx_local->local_psr_full = (rx_local->local_psr_full + 1) & 0xFFF; 834 add_12bit(&rx_local->local_psr_full, 1);
835 if (rx_local->local_psr_full > rx_local->PsrNumEntries - 1) { 835 if ((rx_local->local_psr_full & 0xFFF) > rx_local->PsrNumEntries - 1) {
836 /* Clear psr full and toggle the wrap bit */ 836 /* Clear psr full and toggle the wrap bit */
837 rx_local->local_psr_full &= 0xFFF; 837 rx_local->local_psr_full &= ~0xFFF;
838 rx_local->local_psr_full ^= 0x1000; 838 rx_local->local_psr_full ^= 0x1000;
839 } 839 }
840 840