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authorStefan Richter <stefanr@s5r6.in-berlin.de>2008-04-07 16:33:35 -0400
committerStefan Richter <stefanr@s5r6.in-berlin.de>2008-04-18 11:55:35 -0400
commita007bb857e0b26f5d8b73c2ff90782d9c0972620 (patch)
tree118f54e70b99dd1315cce57796f7d0a7bbb9c3df
parent76f73ca1b291a8d014ff0d2d802c817404dd9887 (diff)
firewire: fw-ohci: conditionally log busReset interrupts
Add a debug option to watch bus reset interrupt events. Half of this patch is taken from Jarod Wilson's first version of the JMicron fix. BusReset interrupts are only generated if the respective module parameter flag was set before the controller is being initialized. Else we keep this event masked to reduce IRQ load in normal operation and to avoid potential problems with buggy chips. Note, this is unlike the other IRQ events whose logging can be enabled any time after chip initialization. This and the influence on what interrupts the chip generates is why I added an extra flag for it. Also, reorder the debug parameter flags according to their perceived usefulness. Signed-off-by: Stefan Richter <stefanr@s5r6.in-berlin.de> Signed-off-by: Jarod Wilson <jwilson@redhat.com>
-rw-r--r--drivers/firewire/fw-ohci.c28
1 files changed, 20 insertions, 8 deletions
diff --git a/drivers/firewire/fw-ohci.c b/drivers/firewire/fw-ohci.c
index 4789300b8241..46660ac0dac5 100644
--- a/drivers/firewire/fw-ohci.c
+++ b/drivers/firewire/fw-ohci.c
@@ -240,24 +240,32 @@ static char ohci_driver_name[] = KBUILD_MODNAME;
240 240
241#ifdef CONFIG_FIREWIRE_OHCI_DEBUG 241#ifdef CONFIG_FIREWIRE_OHCI_DEBUG
242 242
243#define OHCI_PARAM_DEBUG_IRQS 1 243#define OHCI_PARAM_DEBUG_AT_AR 1
244#define OHCI_PARAM_DEBUG_SELFIDS 2 244#define OHCI_PARAM_DEBUG_SELFIDS 2
245#define OHCI_PARAM_DEBUG_AT_AR 4 245#define OHCI_PARAM_DEBUG_IRQS 4
246#define OHCI_PARAM_DEBUG_BUSRESETS 8 /* only effective before chip init */
246 247
247static int param_debug; 248static int param_debug;
248module_param_named(debug, param_debug, int, 0644); 249module_param_named(debug, param_debug, int, 0644);
249MODULE_PARM_DESC(debug, "Verbose logging (default = 0" 250MODULE_PARM_DESC(debug, "Verbose logging (default = 0"
250 ", IRQs = " __stringify(OHCI_PARAM_DEBUG_IRQS)
251 ", self-IDs = " __stringify(OHCI_PARAM_DEBUG_SELFIDS)
252 ", AT/AR events = " __stringify(OHCI_PARAM_DEBUG_AT_AR) 251 ", AT/AR events = " __stringify(OHCI_PARAM_DEBUG_AT_AR)
252 ", self-IDs = " __stringify(OHCI_PARAM_DEBUG_SELFIDS)
253 ", IRQs = " __stringify(OHCI_PARAM_DEBUG_IRQS)
254 ", busReset events = " __stringify(OHCI_PARAM_DEBUG_BUSRESETS)
253 ", or a combination, or all = -1)"); 255 ", or a combination, or all = -1)");
254 256
255static void log_irqs(u32 evt) 257static void log_irqs(u32 evt)
256{ 258{
257 if (likely(!(param_debug & OHCI_PARAM_DEBUG_IRQS))) 259 if (likely(!(param_debug &
260 (OHCI_PARAM_DEBUG_IRQS | OHCI_PARAM_DEBUG_BUSRESETS))))
261 return;
262
263 if (!(param_debug & OHCI_PARAM_DEBUG_IRQS) &&
264 !(evt & OHCI1394_busReset))
258 return; 265 return;
259 266
260 printk(KERN_DEBUG KBUILD_MODNAME ": IRQ %08x%s%s%s%s%s%s%s%s%s%s%s%s\n", 267 printk(KERN_DEBUG KBUILD_MODNAME ": IRQ "
268 "%08x%s%s%s%s%s%s%s%s%s%s%s%s%s\n",
261 evt, 269 evt,
262 evt & OHCI1394_selfIDComplete ? " selfID" : "", 270 evt & OHCI1394_selfIDComplete ? " selfID" : "",
263 evt & OHCI1394_RQPkt ? " AR_req" : "", 271 evt & OHCI1394_RQPkt ? " AR_req" : "",
@@ -270,12 +278,13 @@ static void log_irqs(u32 evt)
270 evt & OHCI1394_cycleTooLong ? " cycleTooLong" : "", 278 evt & OHCI1394_cycleTooLong ? " cycleTooLong" : "",
271 evt & OHCI1394_cycle64Seconds ? " cycle64Seconds" : "", 279 evt & OHCI1394_cycle64Seconds ? " cycle64Seconds" : "",
272 evt & OHCI1394_regAccessFail ? " regAccessFail" : "", 280 evt & OHCI1394_regAccessFail ? " regAccessFail" : "",
281 evt & OHCI1394_busReset ? " busReset" : "",
273 evt & ~(OHCI1394_selfIDComplete | OHCI1394_RQPkt | 282 evt & ~(OHCI1394_selfIDComplete | OHCI1394_RQPkt |
274 OHCI1394_RSPkt | OHCI1394_reqTxComplete | 283 OHCI1394_RSPkt | OHCI1394_reqTxComplete |
275 OHCI1394_respTxComplete | OHCI1394_isochRx | 284 OHCI1394_respTxComplete | OHCI1394_isochRx |
276 OHCI1394_isochTx | OHCI1394_postedWriteErr | 285 OHCI1394_isochTx | OHCI1394_postedWriteErr |
277 OHCI1394_cycleTooLong | OHCI1394_cycle64Seconds | 286 OHCI1394_cycleTooLong | OHCI1394_cycle64Seconds |
278 OHCI1394_regAccessFail) 287 OHCI1394_regAccessFail | OHCI1394_busReset)
279 ? " ?" : ""); 288 ? " ?" : "");
280} 289}
281 290
@@ -1328,7 +1337,8 @@ static irqreturn_t irq_handler(int irq, void *data)
1328 if (!event || !~event) 1337 if (!event || !~event)
1329 return IRQ_NONE; 1338 return IRQ_NONE;
1330 1339
1331 reg_write(ohci, OHCI1394_IntEventClear, event); 1340 /* busReset must not be cleared yet, see OHCI 1.1 clause 7.2.3.2 */
1341 reg_write(ohci, OHCI1394_IntEventClear, event & ~OHCI1394_busReset);
1332 log_irqs(event); 1342 log_irqs(event);
1333 1343
1334 if (event & OHCI1394_selfIDComplete) 1344 if (event & OHCI1394_selfIDComplete)
@@ -1467,6 +1477,8 @@ static int ohci_enable(struct fw_card *card, u32 *config_rom, size_t length)
1467 OHCI1394_postedWriteErr | OHCI1394_cycleTooLong | 1477 OHCI1394_postedWriteErr | OHCI1394_cycleTooLong |
1468 OHCI1394_cycle64Seconds | OHCI1394_regAccessFail | 1478 OHCI1394_cycle64Seconds | OHCI1394_regAccessFail |
1469 OHCI1394_masterIntEnable); 1479 OHCI1394_masterIntEnable);
1480 if (param_debug & OHCI_PARAM_DEBUG_BUSRESETS)
1481 reg_write(ohci, OHCI1394_IntMaskSet, OHCI1394_busReset);
1470 1482
1471 /* Activate link_on bit and contender bit in our self ID packets.*/ 1483 /* Activate link_on bit and contender bit in our self ID packets.*/
1472 if (ohci_update_phy_reg(card, 4, 0, 1484 if (ohci_update_phy_reg(card, 4, 0,