diff options
author | Mike Frysinger <vapier.adi@gmail.com> | 2009-04-06 22:00:36 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2009-04-07 11:31:04 -0400 |
commit | 7aec35661733c651f616f9b3f69d758f6bfe2a7f (patch) | |
tree | 9c8a77b7b9195d1b1aab1ae48cccace95da96702 | |
parent | 04b95d2f7453d64f89ca1d8c3e70bcc7cc38320f (diff) |
Blackfin SPI Driver: unify duplicated code in dma read/write paths
For DMA TX/RX operation in pump_transfers, DMA contriguration code in TX
and RX paths are almost the same. This patch unify the duplicated DMA
code to make it more readable.
Signed-off-by: Mike Frysinger <vapier.adi@gmail.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
Acked-by: David Brownell <dbrownell@users.sourceforge.net>
Cc: David Brownell <david-b@pacbell.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
-rw-r--r-- | drivers/spi/spi_bfin5xx.c | 47 |
1 files changed, 21 insertions, 26 deletions
diff --git a/drivers/spi/spi_bfin5xx.c b/drivers/spi/spi_bfin5xx.c index 2e0c024bbde7..4e45a3f7c15e 100644 --- a/drivers/spi/spi_bfin5xx.c +++ b/drivers/spi/spi_bfin5xx.c | |||
@@ -756,18 +756,19 @@ static void pump_transfers(unsigned long data) | |||
756 | if (!full_duplex && drv_data->cur_chip->enable_dma | 756 | if (!full_duplex && drv_data->cur_chip->enable_dma |
757 | && drv_data->len > 6) { | 757 | && drv_data->len > 6) { |
758 | 758 | ||
759 | unsigned long dma_start_addr; | ||
760 | |||
759 | disable_dma(drv_data->dma_channel); | 761 | disable_dma(drv_data->dma_channel); |
760 | clear_dma_irqstat(drv_data->dma_channel); | 762 | clear_dma_irqstat(drv_data->dma_channel); |
761 | bfin_spi_disable(drv_data); | 763 | bfin_spi_disable(drv_data); |
762 | 764 | ||
763 | /* config dma channel */ | 765 | /* config dma channel */ |
764 | dev_dbg(&drv_data->pdev->dev, "doing dma transfer\n"); | 766 | dev_dbg(&drv_data->pdev->dev, "doing dma transfer\n"); |
767 | set_dma_x_count(drv_data->dma_channel, drv_data->len); | ||
765 | if (width == CFG_SPI_WORDSIZE16) { | 768 | if (width == CFG_SPI_WORDSIZE16) { |
766 | set_dma_x_count(drv_data->dma_channel, drv_data->len); | ||
767 | set_dma_x_modify(drv_data->dma_channel, 2); | 769 | set_dma_x_modify(drv_data->dma_channel, 2); |
768 | dma_width = WDSIZE_16; | 770 | dma_width = WDSIZE_16; |
769 | } else { | 771 | } else { |
770 | set_dma_x_count(drv_data->dma_channel, drv_data->len); | ||
771 | set_dma_x_modify(drv_data->dma_channel, 1); | 772 | set_dma_x_modify(drv_data->dma_channel, 1); |
772 | dma_width = WDSIZE_8; | 773 | dma_width = WDSIZE_8; |
773 | } | 774 | } |
@@ -802,6 +803,7 @@ static void pump_transfers(unsigned long data) | |||
802 | } | 803 | } |
803 | 804 | ||
804 | /* In dma mode, rx or tx must be NULL in one transfer */ | 805 | /* In dma mode, rx or tx must be NULL in one transfer */ |
806 | dma_config = (RESTART | dma_width | DI_EN); | ||
805 | if (drv_data->rx != NULL) { | 807 | if (drv_data->rx != NULL) { |
806 | /* set transfer mode, and enable SPI */ | 808 | /* set transfer mode, and enable SPI */ |
807 | dev_dbg(&drv_data->pdev->dev, "doing DMA in.\n"); | 809 | dev_dbg(&drv_data->pdev->dev, "doing DMA in.\n"); |
@@ -815,19 +817,9 @@ static void pump_transfers(unsigned long data) | |||
815 | /* clear tx reg soformer data is not shifted out */ | 817 | /* clear tx reg soformer data is not shifted out */ |
816 | write_TDBR(drv_data, 0xFFFF); | 818 | write_TDBR(drv_data, 0xFFFF); |
817 | 819 | ||
818 | set_dma_x_count(drv_data->dma_channel, drv_data->len); | 820 | dma_config |= WNR; |
819 | 821 | dma_start_addr = (unsigned long)drv_data->rx; | |
820 | /* start dma */ | 822 | cr |= CFG_SPI_DMAREAD; |
821 | dma_enable_irq(drv_data->dma_channel); | ||
822 | dma_config = (WNR | RESTART | dma_width | DI_EN); | ||
823 | set_dma_config(drv_data->dma_channel, dma_config); | ||
824 | set_dma_start_addr(drv_data->dma_channel, | ||
825 | (unsigned long)drv_data->rx); | ||
826 | enable_dma(drv_data->dma_channel); | ||
827 | |||
828 | /* start SPI transfer */ | ||
829 | write_CTRL(drv_data, | ||
830 | (cr | CFG_SPI_DMAREAD | BIT_CTL_ENABLE)); | ||
831 | 823 | ||
832 | } else if (drv_data->tx != NULL) { | 824 | } else if (drv_data->tx != NULL) { |
833 | dev_dbg(&drv_data->pdev->dev, "doing DMA out.\n"); | 825 | dev_dbg(&drv_data->pdev->dev, "doing DMA out.\n"); |
@@ -838,18 +830,21 @@ static void pump_transfers(unsigned long data) | |||
838 | (unsigned long) (drv_data->tx + | 830 | (unsigned long) (drv_data->tx + |
839 | drv_data->len_in_bytes)); | 831 | drv_data->len_in_bytes)); |
840 | 832 | ||
841 | /* start dma */ | 833 | dma_start_addr = (unsigned long)drv_data->tx; |
842 | dma_enable_irq(drv_data->dma_channel); | 834 | cr |= CFG_SPI_DMAWRITE; |
843 | dma_config = (RESTART | dma_width | DI_EN); | 835 | |
844 | set_dma_config(drv_data->dma_channel, dma_config); | 836 | } else |
845 | set_dma_start_addr(drv_data->dma_channel, | 837 | BUG(); |
846 | (unsigned long)drv_data->tx); | 838 | |
847 | enable_dma(drv_data->dma_channel); | 839 | /* start dma */ |
840 | dma_enable_irq(drv_data->dma_channel); | ||
841 | set_dma_config(drv_data->dma_channel, dma_config); | ||
842 | set_dma_start_addr(drv_data->dma_channel, dma_start_addr); | ||
843 | enable_dma(drv_data->dma_channel); | ||
844 | |||
845 | /* start SPI transfer */ | ||
846 | write_CTRL(drv_data, (cr | BIT_CTL_ENABLE)); | ||
848 | 847 | ||
849 | /* start SPI transfer */ | ||
850 | write_CTRL(drv_data, | ||
851 | (cr | CFG_SPI_DMAWRITE | BIT_CTL_ENABLE)); | ||
852 | } | ||
853 | } else { | 848 | } else { |
854 | /* IO mode write then read */ | 849 | /* IO mode write then read */ |
855 | dev_dbg(&drv_data->pdev->dev, "doing IO transfer\n"); | 850 | dev_dbg(&drv_data->pdev->dev, "doing IO transfer\n"); |