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authorJames Smart <James.Smart@Emulex.Com>2006-07-06 15:50:50 -0400
committerJames Bottomley <jejb@mulgrave.il.steeleye.com>2006-07-09 11:49:14 -0400
commit65a29c166fe331574880a375559405ac802b027a (patch)
treec1dc8856dd84347d900aa4b11bdffde685529f04
parentb4c026520ff0a4cb838a941bb0ed8996075e3d8c (diff)
[SCSI] lpfc 8.1.7: Misc Fixes
Misc Fixes: - Fix some sparse warnings - casts of address space - Fix handling of the adapter registration string. Each invocation was byteswapping, so every other adapter init attempt failed. - Correct comments and default value for the lpfc_max_luns parameter Signed-off-by: James Smart <James.Smart@emulex.com> Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
-rw-r--r--drivers/scsi/lpfc/lpfc_attr.c10
-rw-r--r--drivers/scsi/lpfc/lpfc_init.c10
-rw-r--r--drivers/scsi/lpfc/lpfc_sli.c10
3 files changed, 17 insertions, 13 deletions
diff --git a/drivers/scsi/lpfc/lpfc_attr.c b/drivers/scsi/lpfc/lpfc_attr.c
index 48379c606124..5c68cdd8736f 100644
--- a/drivers/scsi/lpfc/lpfc_attr.c
+++ b/drivers/scsi/lpfc/lpfc_attr.c
@@ -706,12 +706,12 @@ LPFC_ATTR(discovery_threads, 32, 1, 64, "Maximum number of ELS commands "
706 "during discovery"); 706 "during discovery");
707 707
708/* 708/*
709# lpfc_max_luns: maximum number of LUNs per target driver will support 709# lpfc_max_luns: maximum allowed LUN.
710# Value range is [1,32768]. Default value is 256. 710# Value range is [0,65535]. Default value is 255.
711# NOTE: The SCSI layer will scan each target for this many luns 711# NOTE: The SCSI layer might probe all allowed LUN on some old targets.
712*/ 712*/
713LPFC_ATTR_R(max_luns, 256, 1, 32768, 713LPFC_ATTR_R(max_luns, 255, 0, 65535,
714 "Maximum number of LUNs per target driver will support"); 714 "Maximum allowed LUN");
715 715
716/* 716/*
717# lpfc_poll_tmo: .Milliseconds driver will wait between polling FCP ring. 717# lpfc_poll_tmo: .Milliseconds driver will wait between polling FCP ring.
diff --git a/drivers/scsi/lpfc/lpfc_init.c b/drivers/scsi/lpfc/lpfc_init.c
index ee591c107e1c..ef47b824cbed 100644
--- a/drivers/scsi/lpfc/lpfc_init.c
+++ b/drivers/scsi/lpfc/lpfc_init.c
@@ -71,6 +71,7 @@ lpfc_config_port_prep(struct lpfc_hba * phba)
71 uint16_t offset = 0; 71 uint16_t offset = 0;
72 static char licensed[56] = 72 static char licensed[56] =
73 "key unlock for use with gnu public licensed code only\0"; 73 "key unlock for use with gnu public licensed code only\0";
74 static int init_key = 1;
74 75
75 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 76 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
76 if (!pmb) { 77 if (!pmb) {
@@ -82,10 +83,13 @@ lpfc_config_port_prep(struct lpfc_hba * phba)
82 phba->hba_state = LPFC_INIT_MBX_CMDS; 83 phba->hba_state = LPFC_INIT_MBX_CMDS;
83 84
84 if (lpfc_is_LC_HBA(phba->pcidev->device)) { 85 if (lpfc_is_LC_HBA(phba->pcidev->device)) {
85 uint32_t *ptext = (uint32_t *) licensed; 86 if (init_key) {
87 uint32_t *ptext = (uint32_t *) licensed;
86 88
87 for (i = 0; i < 56; i += sizeof (uint32_t), ptext++) 89 for (i = 0; i < 56; i += sizeof (uint32_t), ptext++)
88 *ptext = cpu_to_be32(*ptext); 90 *ptext = cpu_to_be32(*ptext);
91 init_key = 0;
92 }
89 93
90 lpfc_read_nv(phba, pmb); 94 lpfc_read_nv(phba, pmb);
91 memset((char*)mb->un.varRDnvp.rsvd3, 0, 95 memset((char*)mb->un.varRDnvp.rsvd3, 0,
diff --git a/drivers/scsi/lpfc/lpfc_sli.c b/drivers/scsi/lpfc/lpfc_sli.c
index c441e37eb053..350a625fa224 100644
--- a/drivers/scsi/lpfc/lpfc_sli.c
+++ b/drivers/scsi/lpfc/lpfc_sli.c
@@ -1547,8 +1547,8 @@ lpfc_sli_brdready(struct lpfc_hba * phba, uint32_t mask)
1547 1547
1548void lpfc_reset_barrier(struct lpfc_hba * phba) 1548void lpfc_reset_barrier(struct lpfc_hba * phba)
1549{ 1549{
1550 uint32_t * resp_buf; 1550 uint32_t __iomem *resp_buf;
1551 uint32_t * mbox_buf; 1551 uint32_t __iomem *mbox_buf;
1552 volatile uint32_t mbox; 1552 volatile uint32_t mbox;
1553 uint32_t hc_copy; 1553 uint32_t hc_copy;
1554 int i; 1554 int i;
@@ -1564,7 +1564,7 @@ void lpfc_reset_barrier(struct lpfc_hba * phba)
1564 * Tell the other part of the chip to suspend temporarily all 1564 * Tell the other part of the chip to suspend temporarily all
1565 * its DMA activity. 1565 * its DMA activity.
1566 */ 1566 */
1567 resp_buf = (uint32_t *)phba->MBslimaddr; 1567 resp_buf = phba->MBslimaddr;
1568 1568
1569 /* Disable the error attention */ 1569 /* Disable the error attention */
1570 hc_copy = readl(phba->HCregaddr); 1570 hc_copy = readl(phba->HCregaddr);
@@ -1582,7 +1582,7 @@ void lpfc_reset_barrier(struct lpfc_hba * phba)
1582 ((MAILBOX_t *)&mbox)->mbxOwner = OWN_CHIP; 1582 ((MAILBOX_t *)&mbox)->mbxOwner = OWN_CHIP;
1583 1583
1584 writel(BARRIER_TEST_PATTERN, (resp_buf + 1)); 1584 writel(BARRIER_TEST_PATTERN, (resp_buf + 1));
1585 mbox_buf = (uint32_t *)phba->MBslimaddr; 1585 mbox_buf = phba->MBslimaddr;
1586 writel(mbox, mbox_buf); 1586 writel(mbox, mbox_buf);
1587 1587
1588 for (i = 0; 1588 for (i = 0;
@@ -1782,7 +1782,7 @@ lpfc_sli_brdrestart(struct lpfc_hba * phba)
1782 skip_post = 0; 1782 skip_post = 0;
1783 word0 = 0; /* This is really setting up word1 */ 1783 word0 = 0; /* This is really setting up word1 */
1784 } 1784 }
1785 to_slim = (uint8_t *) phba->MBslimaddr + sizeof (uint32_t); 1785 to_slim = phba->MBslimaddr + sizeof (uint32_t);
1786 writel(*(uint32_t *) mb, to_slim); 1786 writel(*(uint32_t *) mb, to_slim);
1787 readl(to_slim); /* flush */ 1787 readl(to_slim); /* flush */
1788 1788