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authorOndrej Zajicek <santiago@crfreenet.org>2007-05-08 03:39:41 -0400
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-05-08 14:15:32 -0400
commit0449359f053829ec89c026b5fb80bbe7190a5fe8 (patch)
treece02a85341dfb2b6d1b50d6b9ed91437d9690cc9
parent56c7554938e5945b770365e326f0c3d031ca231f (diff)
vga: vgastate fix
1) sets 'palette access disabled' during read from AR10. This is usually documented as needed for access AR01-AR0F, but on ARK Logic card it is needed for AR10 (otherwise read returns some nonsence and save_vga_text() returns before do anything). 2) do not restore AR10, because it was not changed during 3) remove modification of misc reg: /* force graphics mode */ vga_w(state->vgabase, VGA_MIS_W, misc | 1); as comment is misleading - LSB of misc reg does not set/reset graphics mode, but set color/mono adresses of CRT and some other regs. but these regs are not used during save/restore fonts. (it worked even when (misc | 1) was replaced by (misc & ~1) ). Signed-off-by: Ondrej Zajicek <santiago@crfreenet.org> Signed-off-by: Antonino Daplas <adaplas@gmail.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
-rw-r--r--drivers/video/vgastate.c26
1 files changed, 11 insertions, 15 deletions
diff --git a/drivers/video/vgastate.c b/drivers/video/vgastate.c
index d94efafc77b5..b91c466225b9 100644
--- a/drivers/video/vgastate.c
+++ b/drivers/video/vgastate.c
@@ -50,23 +50,28 @@ static void save_vga_text(struct vgastate *state, void __iomem *fbbase)
50 struct regstate *saved = (struct regstate *) state->vidstate; 50 struct regstate *saved = (struct regstate *) state->vidstate;
51 int i; 51 int i;
52 u8 misc, attr10, gr4, gr5, gr6, seq1, seq2, seq4; 52 u8 misc, attr10, gr4, gr5, gr6, seq1, seq2, seq4;
53 unsigned short iobase;
53 54
54 /* if in graphics mode, no need to save */ 55 /* if in graphics mode, no need to save */
56 misc = vga_r(state->vgabase, VGA_MIS_R);
57 iobase = (misc & 1) ? 0x3d0 : 0x3b0;
58
59 vga_r(state->vgabase, iobase + 0xa);
60 vga_w(state->vgabase, VGA_ATT_W, 0x00);
55 attr10 = vga_rattr(state->vgabase, 0x10); 61 attr10 = vga_rattr(state->vgabase, 0x10);
62 vga_r(state->vgabase, iobase + 0xa);
63 vga_w(state->vgabase, VGA_ATT_W, 0x20);
64
56 if (attr10 & 1) 65 if (attr10 & 1)
57 return; 66 return;
58 67
59 /* save regs */ 68 /* save regs */
60 misc = vga_r(state->vgabase, VGA_MIS_R);
61 gr4 = vga_rgfx(state->vgabase, VGA_GFX_PLANE_READ); 69 gr4 = vga_rgfx(state->vgabase, VGA_GFX_PLANE_READ);
62 gr5 = vga_rgfx(state->vgabase, VGA_GFX_MODE); 70 gr5 = vga_rgfx(state->vgabase, VGA_GFX_MODE);
63 gr6 = vga_rgfx(state->vgabase, VGA_GFX_MISC); 71 gr6 = vga_rgfx(state->vgabase, VGA_GFX_MISC);
64 seq2 = vga_rseq(state->vgabase, VGA_SEQ_PLANE_WRITE); 72 seq2 = vga_rseq(state->vgabase, VGA_SEQ_PLANE_WRITE);
65 seq4 = vga_rseq(state->vgabase, VGA_SEQ_MEMORY_MODE); 73 seq4 = vga_rseq(state->vgabase, VGA_SEQ_MEMORY_MODE);
66 74
67 /* force graphics mode */
68 vga_w(state->vgabase, VGA_MIS_W, misc | 1);
69
70 /* blank screen */ 75 /* blank screen */
71 seq1 = vga_rseq(state->vgabase, VGA_SEQ_CLOCK_MODE); 76 seq1 = vga_rseq(state->vgabase, VGA_SEQ_CLOCK_MODE);
72 vga_wseq(state->vgabase, VGA_SEQ_RESET, 0x1); 77 vga_wseq(state->vgabase, VGA_SEQ_RESET, 0x1);
@@ -115,15 +120,12 @@ static void save_vga_text(struct vgastate *state, void __iomem *fbbase)
115 } 120 }
116 121
117 /* restore regs */ 122 /* restore regs */
118 vga_wattr(state->vgabase, 0x10, attr10);
119
120 vga_wseq(state->vgabase, VGA_SEQ_PLANE_WRITE, seq2); 123 vga_wseq(state->vgabase, VGA_SEQ_PLANE_WRITE, seq2);
121 vga_wseq(state->vgabase, VGA_SEQ_MEMORY_MODE, seq4); 124 vga_wseq(state->vgabase, VGA_SEQ_MEMORY_MODE, seq4);
122 125
123 vga_wgfx(state->vgabase, VGA_GFX_PLANE_READ, gr4); 126 vga_wgfx(state->vgabase, VGA_GFX_PLANE_READ, gr4);
124 vga_wgfx(state->vgabase, VGA_GFX_MODE, gr5); 127 vga_wgfx(state->vgabase, VGA_GFX_MODE, gr5);
125 vga_wgfx(state->vgabase, VGA_GFX_MISC, gr6); 128 vga_wgfx(state->vgabase, VGA_GFX_MISC, gr6);
126 vga_w(state->vgabase, VGA_MIS_W, misc);
127 129
128 /* unblank screen */ 130 /* unblank screen */
129 vga_wseq(state->vgabase, VGA_SEQ_RESET, 0x1); 131 vga_wseq(state->vgabase, VGA_SEQ_RESET, 0x1);
@@ -137,11 +139,10 @@ static void restore_vga_text(struct vgastate *state, void __iomem *fbbase)
137{ 139{
138 struct regstate *saved = (struct regstate *) state->vidstate; 140 struct regstate *saved = (struct regstate *) state->vidstate;
139 int i; 141 int i;
140 u8 misc, gr1, gr3, gr4, gr5, gr6, gr8; 142 u8 gr1, gr3, gr4, gr5, gr6, gr8;
141 u8 seq1, seq2, seq4; 143 u8 seq1, seq2, seq4;
142 144
143 /* save regs */ 145 /* save regs */
144 misc = vga_r(state->vgabase, VGA_MIS_R);
145 gr1 = vga_rgfx(state->vgabase, VGA_GFX_SR_ENABLE); 146 gr1 = vga_rgfx(state->vgabase, VGA_GFX_SR_ENABLE);
146 gr3 = vga_rgfx(state->vgabase, VGA_GFX_DATA_ROTATE); 147 gr3 = vga_rgfx(state->vgabase, VGA_GFX_DATA_ROTATE);
147 gr4 = vga_rgfx(state->vgabase, VGA_GFX_PLANE_READ); 148 gr4 = vga_rgfx(state->vgabase, VGA_GFX_PLANE_READ);
@@ -151,9 +152,6 @@ static void restore_vga_text(struct vgastate *state, void __iomem *fbbase)
151 seq2 = vga_rseq(state->vgabase, VGA_SEQ_PLANE_WRITE); 152 seq2 = vga_rseq(state->vgabase, VGA_SEQ_PLANE_WRITE);
152 seq4 = vga_rseq(state->vgabase, VGA_SEQ_MEMORY_MODE); 153 seq4 = vga_rseq(state->vgabase, VGA_SEQ_MEMORY_MODE);
153 154
154 /* force graphics mode */
155 vga_w(state->vgabase, VGA_MIS_W, misc | 1);
156
157 /* blank screen */ 155 /* blank screen */
158 seq1 = vga_rseq(state->vgabase, VGA_SEQ_CLOCK_MODE); 156 seq1 = vga_rseq(state->vgabase, VGA_SEQ_CLOCK_MODE);
159 vga_wseq(state->vgabase, VGA_SEQ_RESET, 0x1); 157 vga_wseq(state->vgabase, VGA_SEQ_RESET, 0x1);
@@ -213,8 +211,6 @@ static void restore_vga_text(struct vgastate *state, void __iomem *fbbase)
213 vga_wseq(state->vgabase, VGA_SEQ_RESET, 0x3); 211 vga_wseq(state->vgabase, VGA_SEQ_RESET, 0x3);
214 212
215 /* restore regs */ 213 /* restore regs */
216 vga_w(state->vgabase, VGA_MIS_W, misc);
217
218 vga_wgfx(state->vgabase, VGA_GFX_SR_ENABLE, gr1); 214 vga_wgfx(state->vgabase, VGA_GFX_SR_ENABLE, gr1);
219 vga_wgfx(state->vgabase, VGA_GFX_DATA_ROTATE, gr3); 215 vga_wgfx(state->vgabase, VGA_GFX_DATA_ROTATE, gr3);
220 vga_wgfx(state->vgabase, VGA_GFX_PLANE_READ, gr4); 216 vga_wgfx(state->vgabase, VGA_GFX_PLANE_READ, gr4);