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authorBen Dooks <ben-linux@fluff.org>2008-10-31 12:14:31 -0400
committerBen Dooks <ben-linux@fluff.org>2008-12-15 18:33:20 -0500
commit7db6c82a37beabef7b76d232e3d20efacd74bd3a (patch)
treedcd673614883eba53a207aca9f136c6e7b490c4e
parentefd3a8eb150e383305c36eedc78c29cab910158e (diff)
[ARM] S3C: Move common GPIO code from plat-s3c24xx
Move the common parts of the GPIO code into plat-s3c for use with both the s3c24xx and s3c64xx systems. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
-rw-r--r--arch/arm/mach-s3c6400/include/mach/gpio.h4
-rw-r--r--arch/arm/plat-s3c/Makefile1
-rw-r--r--arch/arm/plat-s3c/gpio.c128
-rw-r--r--arch/arm/plat-s3c/include/plat/gpio-core.h49
-rw-r--r--arch/arm/plat-s3c24xx/gpiolib.c123
5 files changed, 187 insertions, 118 deletions
diff --git a/arch/arm/mach-s3c6400/include/mach/gpio.h b/arch/arm/mach-s3c6400/include/mach/gpio.h
index 8600c818a46f..e8e35e8fe731 100644
--- a/arch/arm/mach-s3c6400/include/mach/gpio.h
+++ b/arch/arm/mach-s3c6400/include/mach/gpio.h
@@ -86,6 +86,10 @@ enum s3c_gpio_number {
86#define S3C64XX_GPP(_nr) (S3C64XX_GPIO_P_START + (_nr)) 86#define S3C64XX_GPP(_nr) (S3C64XX_GPIO_P_START + (_nr))
87#define S3C64XX_GPQ(_nr) (S3C64XX_GPIO_Q_START + (_nr)) 87#define S3C64XX_GPQ(_nr) (S3C64XX_GPIO_Q_START + (_nr))
88 88
89/* the end of the S3C64XX specific gpios */
90#define S3C64XX_GPIO_END (S3C64XX_GPQ(S3C64XX_GPIO_Q_NR) + 1)
91#define S3C_GPIO_END S3C64XX_GPIO_END
92
89/* define the number of gpios we need to the one after the GPQ() range */ 93/* define the number of gpios we need to the one after the GPQ() range */
90#define ARCH_NR_GPIOS (S3C64XX_GPQ(S3C64XX_GPIO_Q_NR) + 1) 94#define ARCH_NR_GPIOS (S3C64XX_GPQ(S3C64XX_GPIO_Q_NR) + 1)
91 95
diff --git a/arch/arm/plat-s3c/Makefile b/arch/arm/plat-s3c/Makefile
index b95a9c106467..4d0299aef7ca 100644
--- a/arch/arm/plat-s3c/Makefile
+++ b/arch/arm/plat-s3c/Makefile
@@ -15,6 +15,7 @@ obj-y += init.o
15obj-y += time.o 15obj-y += time.o
16obj-y += clock.o 16obj-y += clock.o
17obj-y += pwm-clock.o 17obj-y += pwm-clock.o
18obj-y += gpio.o
18 19
19# devices 20# devices
20 21
diff --git a/arch/arm/plat-s3c/gpio.c b/arch/arm/plat-s3c/gpio.c
new file mode 100644
index 000000000000..f035d4550c43
--- /dev/null
+++ b/arch/arm/plat-s3c/gpio.c
@@ -0,0 +1,128 @@
1/* linux/arch/arm/plat-s3c/gpio.c
2 *
3 * Copyright 2008 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 * http://armlinux.simtec.co.uk/
6 *
7 * S3C series GPIO core
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12*/
13
14#include <linux/kernel.h>
15#include <linux/init.h>
16#include <linux/io.h>
17#include <linux/gpio.h>
18
19#include <plat/gpio-core.h>
20
21/* Default routines for controlling GPIO, based on the original S3C24XX
22 * GPIO functions which deal with the case where each gpio bank of the
23 * chip is as following:
24 *
25 * base + 0x00: Control register, 2 bits per gpio
26 * gpio n: 2 bits starting at (2*n)
27 * 00 = input, 01 = output, others mean special-function
28 * base + 0x04: Data register, 1 bit per gpio
29 * bit n: data bit n
30*/
31
32static int s3c_gpiolib_input(struct gpio_chip *chip, unsigned offset)
33{
34 struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
35 void __iomem *base = ourchip->base;
36 unsigned long flags;
37 unsigned long con;
38
39 local_irq_save(flags);
40
41 con = __raw_readl(base + 0x00);
42 con &= ~(3 << (offset * 2));
43
44 __raw_writel(con, base + 0x00);
45
46 local_irq_restore(flags);
47 return 0;
48}
49
50static int s3c_gpiolib_output(struct gpio_chip *chip,
51 unsigned offset, int value)
52{
53 struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
54 void __iomem *base = ourchip->base;
55 unsigned long flags;
56 unsigned long dat;
57 unsigned long con;
58
59 local_irq_save(flags);
60
61 dat = __raw_readl(base + 0x04);
62 dat &= ~(1 << offset);
63 if (value)
64 dat |= 1 << offset;
65 __raw_writel(dat, base + 0x04);
66
67 con = __raw_readl(base + 0x00);
68 con &= ~(3 << (offset * 2));
69 con |= 1 << (offset * 2);
70
71 __raw_writel(con, base + 0x00);
72 __raw_writel(dat, base + 0x04);
73
74 local_irq_restore(flags);
75 return 0;
76}
77
78static void s3c_gpiolib_set(struct gpio_chip *chip,
79 unsigned offset, int value)
80{
81 struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
82 void __iomem *base = ourchip->base;
83 unsigned long flags;
84 unsigned long dat;
85
86 local_irq_save(flags);
87
88 dat = __raw_readl(base + 0x04);
89 dat &= ~(1 << offset);
90 if (value)
91 dat |= 1 << offset;
92 __raw_writel(dat, base + 0x04);
93
94 local_irq_restore(flags);
95}
96
97static int s3c_gpiolib_get(struct gpio_chip *chip, unsigned offset)
98{
99 struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
100 unsigned long val;
101
102 val = __raw_readl(ourchip->base + 0x04);
103 val >>= offset;
104 val &= 1;
105
106 return val;
107}
108
109__init void s3c_gpiolib_add(struct s3c_gpio_chip *chip)
110{
111 struct gpio_chip *gc = &chip->chip;
112
113 BUG_ON(!chip->base);
114 BUG_ON(!gc->label);
115 BUG_ON(!gc->ngpio);
116
117 if (!gc->direction_input)
118 gc->direction_input = s3c_gpiolib_input;
119 if (!gc->direction_output)
120 gc->direction_output = s3c_gpiolib_output;
121 if (!gc->set)
122 gc->set = s3c_gpiolib_set;
123 if (!gc->get)
124 gc->get = s3c_gpiolib_get;
125
126 /* gpiochip_add() prints own failure message on error. */
127 gpiochip_add(gc);
128}
diff --git a/arch/arm/plat-s3c/include/plat/gpio-core.h b/arch/arm/plat-s3c/include/plat/gpio-core.h
new file mode 100644
index 000000000000..3cb9105c4811
--- /dev/null
+++ b/arch/arm/plat-s3c/include/plat/gpio-core.h
@@ -0,0 +1,49 @@
1/* linux/arch/arm/plat-s3c/include/plat/gpio-core.h
2 *
3 * Copyright 2008 Simtec Electronics
4 * http://armlinux.simtec.co.uk/
5 * Ben Dooks <ben@simtec.co.uk>
6 *
7 * S3C Platform - GPIO core
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12*/
13
14/* Define the core gpiolib support functions that the s3c platforms may
15 * need to extend or change depending on the hardware and the s3c chip
16 * selected at build or found at run time.
17 *
18 * These definitions are not intended for driver inclusion, there is
19 * nothing here that should not live outside the platform and core
20 * specific code.
21*/
22
23/**
24 * struct s3c_gpio_chip - wrapper for specific implementation of gpio
25 * @chip: The chip structure to be exported via gpiolib.
26 * @base: The base pointer to the gpio configuration registers.
27 *
28 * This wrapper provides the necessary information for the Samsung
29 * specific gpios being registered with gpiolib.
30 */
31struct s3c_gpio_chip {
32 struct gpio_chip chip;
33 void __iomem *base;
34};
35
36static inline struct s3c_gpio_chip *to_s3c_gpio(struct gpio_chip *gpc)
37{
38 return container_of(gpc, struct s3c_gpio_chip, chip);
39}
40
41/** s3c_gpiolib_add() - add the s3c specific version of a gpio_chip.
42 * @chip: The chip to register
43 *
44 * This is a wrapper to gpiochip_add() that takes our specific gpio chip
45 * information and makes the necessary alterations for the platform and
46 * notes the information for use with the configuration systems and any
47 * other parts of the system.
48 */
49extern void s3c_gpiolib_add(struct s3c_gpio_chip *chip);
diff --git a/arch/arm/plat-s3c24xx/gpiolib.c b/arch/arm/plat-s3c24xx/gpiolib.c
index b07c2d0dd533..9785a8fb4809 100644
--- a/arch/arm/plat-s3c24xx/gpiolib.c
+++ b/arch/arm/plat-s3c24xx/gpiolib.c
@@ -19,104 +19,12 @@
19#include <linux/io.h> 19#include <linux/io.h>
20#include <linux/gpio.h> 20#include <linux/gpio.h>
21 21
22#include <plat/gpio-core.h>
22#include <mach/hardware.h> 23#include <mach/hardware.h>
23#include <asm/irq.h> 24#include <asm/irq.h>
24 25
25#include <mach/regs-gpio.h> 26#include <mach/regs-gpio.h>
26 27
27struct s3c24xx_gpio_chip {
28 struct gpio_chip chip;
29 void __iomem *base;
30};
31
32static inline struct s3c24xx_gpio_chip *to_s3c_chip(struct gpio_chip *gpc)
33{
34 return container_of(gpc, struct s3c24xx_gpio_chip, chip);
35}
36
37/* these routines are exported for use by other parts of the platform
38 * and system support, but are not intended to be used directly by the
39 * drivers themsevles.
40 */
41
42static int s3c24xx_gpiolib_input(struct gpio_chip *chip, unsigned offset)
43{
44 struct s3c24xx_gpio_chip *ourchip = to_s3c_chip(chip);
45 void __iomem *base = ourchip->base;
46 unsigned long flags;
47 unsigned long con;
48
49 local_irq_save(flags);
50
51 con = __raw_readl(base + 0x00);
52 con &= ~(3 << (offset * 2));
53 con |= (S3C2410_GPIO_OUTPUT & 0xf) << (offset * 2);
54
55 __raw_writel(con, base + 0x00);
56
57 local_irq_restore(flags);
58 return 0;
59}
60
61static int s3c24xx_gpiolib_output(struct gpio_chip *chip,
62 unsigned offset, int value)
63{
64 struct s3c24xx_gpio_chip *ourchip = to_s3c_chip(chip);
65 void __iomem *base = ourchip->base;
66 unsigned long flags;
67 unsigned long dat;
68 unsigned long con;
69
70 local_irq_save(flags);
71
72 dat = __raw_readl(base + 0x04);
73 dat &= ~(1 << offset);
74 if (value)
75 dat |= 1 << offset;
76 __raw_writel(dat, base + 0x04);
77
78 con = __raw_readl(base + 0x00);
79 con &= ~(3 << (offset * 2));
80 con |= (S3C2410_GPIO_OUTPUT & 0xf) << (offset * 2);
81
82 __raw_writel(con, base + 0x00);
83 __raw_writel(dat, base + 0x04);
84
85 local_irq_restore(flags);
86 return 0;
87}
88
89static void s3c24xx_gpiolib_set(struct gpio_chip *chip,
90 unsigned offset, int value)
91{
92 struct s3c24xx_gpio_chip *ourchip = to_s3c_chip(chip);
93 void __iomem *base = ourchip->base;
94 unsigned long flags;
95 unsigned long dat;
96
97 local_irq_save(flags);
98
99 dat = __raw_readl(base + 0x04);
100 dat &= ~(1 << offset);
101 if (value)
102 dat |= 1 << offset;
103 __raw_writel(dat, base + 0x04);
104
105 local_irq_restore(flags);
106}
107
108static int s3c24xx_gpiolib_get(struct gpio_chip *chip, unsigned offset)
109{
110 struct s3c24xx_gpio_chip *ourchip = to_s3c_chip(chip);
111 unsigned long val;
112
113 val = __raw_readl(ourchip->base + 0x04);
114 val >>= offset;
115 val &= 1;
116
117 return val;
118}
119
120static int s3c24xx_gpiolib_banka_input(struct gpio_chip *chip, unsigned offset) 28static int s3c24xx_gpiolib_banka_input(struct gpio_chip *chip, unsigned offset)
121{ 29{
122 return -EINVAL; 30 return -EINVAL;
@@ -125,7 +33,7 @@ static int s3c24xx_gpiolib_banka_input(struct gpio_chip *chip, unsigned offset)
125static int s3c24xx_gpiolib_banka_output(struct gpio_chip *chip, 33static int s3c24xx_gpiolib_banka_output(struct gpio_chip *chip,
126 unsigned offset, int value) 34 unsigned offset, int value)
127{ 35{
128 struct s3c24xx_gpio_chip *ourchip = to_s3c_chip(chip); 36 struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
129 void __iomem *base = ourchip->base; 37 void __iomem *base = ourchip->base;
130 unsigned long flags; 38 unsigned long flags;
131 unsigned long dat; 39 unsigned long dat;
@@ -151,7 +59,7 @@ static int s3c24xx_gpiolib_banka_output(struct gpio_chip *chip,
151 return 0; 59 return 0;
152} 60}
153 61
154static struct s3c24xx_gpio_chip gpios[] = { 62static struct s3c_gpio_chip gpios[] = {
155 [0] = { 63 [0] = {
156 .base = S3C24XX_GPIO_BASE(S3C2410_GPA0), 64 .base = S3C24XX_GPIO_BASE(S3C2410_GPA0),
157 .chip = { 65 .chip = {
@@ -219,34 +127,13 @@ static struct s3c24xx_gpio_chip gpios[] = {
219 }, 127 },
220}; 128};
221 129
222static __init void s3c24xx_gpiolib_add(struct s3c24xx_gpio_chip *chip)
223{
224 struct gpio_chip *gc = &chip->chip;
225
226 BUG_ON(!chip->base);
227 BUG_ON(!gc->label);
228 BUG_ON(!gc->ngpio);
229
230 if (!gc->direction_input)
231 gc->direction_input = s3c24xx_gpiolib_input;
232 if (!gc->direction_output)
233 gc->direction_output = s3c24xx_gpiolib_output;
234 if (!gc->set)
235 gc->set = s3c24xx_gpiolib_set;
236 if (!gc->get)
237 gc->get = s3c24xx_gpiolib_get;
238
239 /* gpiochip_add() prints own failure message on error. */
240 gpiochip_add(gc);
241}
242
243static __init int s3c24xx_gpiolib_init(void) 130static __init int s3c24xx_gpiolib_init(void)
244{ 131{
245 struct s3c24xx_gpio_chip *chip = gpios; 132 struct s3c_gpio_chip *chip = gpios;
246 int gpn; 133 int gpn;
247 134
248 for (gpn = 0; gpn < ARRAY_SIZE(gpios); gpn++, chip++) 135 for (gpn = 0; gpn < ARRAY_SIZE(gpios); gpn++, chip++)
249 s3c24xx_gpiolib_add(chip); 136 s3c_gpiolib_add(chip);
250 137
251 return 0; 138 return 0;
252} 139}