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authorRobert Schedel <r.schedel@yahoo.de>2008-05-03 11:58:36 -0400
committerMauro Carvalho Chehab <mchehab@infradead.org>2008-05-14 01:54:02 -0400
commit71a35fe2a345eb3704e1f1b4da65451d3e2b8c2e (patch)
tree5222b0da35875a3351af2990f333a181030a09c9
parentfa146c6dceffa68fa12f8d0b797ab9753fa1c792 (diff)
V4L/DVB (7830): dvb_ca_en50221: Fix High CPU load in 'top' due to budget_av slot polling
This change addresses kernel bug #10459: In kernel 2.6.25 the budget_av driver polls for an CI slot in 100ms intervals (because no interrupt solution for budget_av cards is feasible due to HW reasons). If no CI/CAM is connected to the DVB card, polling times out only after 250ms. This periodic polling leads to high CPU load. The change increases the polling interval for empty slots from 100ms to 5s. Intervals for remaining slot states (invalid, in progress, ready) are unchanged, as they are either temporary conditions or no timeout should occur. Signed-off-by: Robert Schedel <r.schedel@yahoo.de> Signed-off-by: Oliver Endriss <o.endriss@gmx.de> Signed-off-by: Mauro Carvalho Chehab <mchehab@infradead.org>
-rw-r--r--drivers/media/dvb/dvb-core/dvb_ca_en50221.c28
1 files changed, 16 insertions, 12 deletions
diff --git a/drivers/media/dvb/dvb-core/dvb_ca_en50221.c b/drivers/media/dvb/dvb-core/dvb_ca_en50221.c
index 8cbdb0ec67e2..588fbe105c27 100644
--- a/drivers/media/dvb/dvb-core/dvb_ca_en50221.c
+++ b/drivers/media/dvb/dvb-core/dvb_ca_en50221.c
@@ -910,15 +910,21 @@ static void dvb_ca_en50221_thread_update_delay(struct dvb_ca_private *ca)
910 int curdelay = 100000000; 910 int curdelay = 100000000;
911 int slot; 911 int slot;
912 912
913 /* Beware of too high polling frequency, because one polling
914 * call might take several hundred milliseconds until timeout!
915 */
913 for (slot = 0; slot < ca->slot_count; slot++) { 916 for (slot = 0; slot < ca->slot_count; slot++) {
914 switch (ca->slot_info[slot].slot_state) { 917 switch (ca->slot_info[slot].slot_state) {
915 default: 918 default:
916 case DVB_CA_SLOTSTATE_NONE: 919 case DVB_CA_SLOTSTATE_NONE:
920 delay = HZ * 60; /* 60s */
921 if (!(ca->flags & DVB_CA_EN50221_FLAG_IRQ_CAMCHANGE))
922 delay = HZ * 5; /* 5s */
923 break;
917 case DVB_CA_SLOTSTATE_INVALID: 924 case DVB_CA_SLOTSTATE_INVALID:
918 delay = HZ * 60; 925 delay = HZ * 60; /* 60s */
919 if (!(ca->flags & DVB_CA_EN50221_FLAG_IRQ_CAMCHANGE)) { 926 if (!(ca->flags & DVB_CA_EN50221_FLAG_IRQ_CAMCHANGE))
920 delay = HZ / 10; 927 delay = HZ / 10; /* 100ms */
921 }
922 break; 928 break;
923 929
924 case DVB_CA_SLOTSTATE_UNINITIALISED: 930 case DVB_CA_SLOTSTATE_UNINITIALISED:
@@ -926,19 +932,17 @@ static void dvb_ca_en50221_thread_update_delay(struct dvb_ca_private *ca)
926 case DVB_CA_SLOTSTATE_VALIDATE: 932 case DVB_CA_SLOTSTATE_VALIDATE:
927 case DVB_CA_SLOTSTATE_WAITFR: 933 case DVB_CA_SLOTSTATE_WAITFR:
928 case DVB_CA_SLOTSTATE_LINKINIT: 934 case DVB_CA_SLOTSTATE_LINKINIT:
929 delay = HZ / 10; 935 delay = HZ / 10; /* 100ms */
930 break; 936 break;
931 937
932 case DVB_CA_SLOTSTATE_RUNNING: 938 case DVB_CA_SLOTSTATE_RUNNING:
933 delay = HZ * 60; 939 delay = HZ * 60; /* 60s */
934 if (!(ca->flags & DVB_CA_EN50221_FLAG_IRQ_CAMCHANGE)) { 940 if (!(ca->flags & DVB_CA_EN50221_FLAG_IRQ_CAMCHANGE))
935 delay = HZ / 10; 941 delay = HZ / 10; /* 100ms */
936 }
937 if (ca->open) { 942 if (ca->open) {
938 if ((!ca->slot_info[slot].da_irq_supported) || 943 if ((!ca->slot_info[slot].da_irq_supported) ||
939 (!(ca->flags & DVB_CA_EN50221_FLAG_IRQ_DA))) { 944 (!(ca->flags & DVB_CA_EN50221_FLAG_IRQ_DA)))
940 delay = HZ / 10; 945 delay = HZ / 10; /* 100ms */
941 }
942 } 946 }
943 break; 947 break;
944 } 948 }