affs: do not zero ->i_op

it is already set to empty table and should never be NULL Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
author: Al Viro <viro@zeniv.linux.org.uk> 2008-12-04 09:50:55 -0500
committer: Al Viro <viro@zeniv.linux.org.uk> 2009-01-05 11:53:07 -0500
commit: c765d479037808532310212e9b3fa95760e975f2 (patch)
tree: 74c9f5570a9a5477522bdf203067303b2e9ef6d3
parent: 7f5ff766a7babd72fc192125e12ef5570effff4c (diff)
1 files changed, 1 insertions, 2 deletions
diff --git a/fs/affs/inode.c b/fs/affs/inode.c
index 415d9c67ac16..3c4ec7d864c4 100644
--- a/fs/affs/inode.c
+++ b/fs/affs/inode.c
@@ -119,8 +119,7 @@ struct inode *affs_iget(struct super_block *sb, unsigned long ino)
                goto bad_inode;
 #else
                inode->i_mode |= S_IFDIR;
-                inode->i_op = NULL;
+                /* ... and leave ->i_op and ->i_fop pointing to empty */
-                inode->i_fop = NULL;
                break;
 #endif
        case ST_LINKFILE:
diff --git a/drivers/Kconfig b/drivers/Kconfig
index bfc918633fd9..ece958d3762e 100644
--- a/drivers/Kconfig
+++ b/drivers/Kconfig
@@ -112,6 +112,8 @@ source "drivers/auxdisplay/Kconfig"
 source "drivers/uio/Kconfig"
+source "drivers/vfio/Kconfig"
 source "drivers/vlynq/Kconfig"
 source "drivers/virtio/Kconfig"
@@ -148,4 +150,6 @@ source "drivers/iio/Kconfig"
 source "drivers/vme/Kconfig"
+source "drivers/pwm/Kconfig"
 endmenu
diff --git a/drivers/Makefile b/drivers/Makefile
index 2ba29ffef2cb..5b421840c48d 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -8,6 +8,7 @@
 # GPIO must come after pinctrl as gpios may need to mux pins etc
 obj-y                           += pinctrl/
 obj-y                           += gpio/
+obj-y                           += pwm/
 obj-$(CONFIG_PCI)               += pci/
 obj-$(CONFIG_PARISC)            += parisc/
 obj-$(CONFIG_RAPIDIO)           += rapidio/
@@ -59,6 +60,7 @@ obj-$(CONFIG_ATM)		+= atm/
 obj-$(CONFIG_FUSION)            += message/
 obj-y                           += firewire/
 obj-$(CONFIG_UIO)               += uio/
+obj-$(CONFIG_VFIO)              += vfio/
 obj-y                           += cdrom/
 obj-y                           += auxdisplay/
 obj-$(CONFIG_PCCARD)            += pcmcia/
diff --git a/drivers/acpi/ac.c b/drivers/acpi/ac.c
index 6512b20aeccd..d5fdd36190cc 100644
--- a/drivers/acpi/ac.c
+++ b/drivers/acpi/ac.c
@@ -61,7 +61,6 @@ static int acpi_ac_open_fs(struct inode *inode, struct file *file);
 static int acpi_ac_add(struct acpi_device *device);
 static int acpi_ac_remove(struct acpi_device *device, int type);
-static int acpi_ac_resume(struct acpi_device *device);
 static void acpi_ac_notify(struct acpi_device *device, u32 event);
 static const struct acpi_device_id ac_device_ids[] = {
@@ -70,6 +69,11 @@ static const struct acpi_device_id ac_device_ids[] = {
 };
 MODULE_DEVICE_TABLE(acpi, ac_device_ids);
+#ifdef CONFIG_PM_SLEEP
+static int acpi_ac_resume(struct device *dev);
+#endif
+static SIMPLE_DEV_PM_OPS(acpi_ac_pm, NULL, acpi_ac_resume);
 static struct acpi_driver acpi_ac_driver = {
        .name = "ac",
        .class = ACPI_AC_CLASS,
@@ -78,9 +82,9 @@ static struct acpi_driver acpi_ac_driver = {
        .ops = {
                .add = acpi_ac_add,
                .remove = acpi_ac_remove,
-                .resume = acpi_ac_resume,
                .notify = acpi_ac_notify,
                },
+        .drv.pm = &acpi_ac_pm,
 };
 struct acpi_ac {
@@ -292,7 +296,9 @@ static int acpi_ac_add(struct acpi_device *device)
        ac->charger.properties = ac_props;
        ac->charger.num_properties = ARRAY_SIZE(ac_props);
        ac->charger.get_property = get_ac_property;
-        power_supply_register(&ac->device->dev, &ac->charger);
+        result = power_supply_register(&ac->device->dev, &ac->charger);
+        if (result)
+                goto end;
        printk(KERN_INFO PREFIX "%s [%s] (%s)\n",
               acpi_device_name(device), acpi_device_bid(device),
@@ -309,13 +315,19 @@ static int acpi_ac_add(struct acpi_device *device)
        return result;
 }
-static int acpi_ac_resume(struct acpi_device *device)
+#ifdef CONFIG_PM_SLEEP
+static int acpi_ac_resume(struct device *dev)
 {
        struct acpi_ac *ac;
        unsigned old_state;
-        if (!device || !acpi_driver_data(device))
+        if (!dev)
                return -EINVAL;
-        ac = acpi_driver_data(device);
+        ac = acpi_driver_data(to_acpi_device(dev));
+        if (!ac)
+                return -EINVAL;
        old_state = ac->state;
        if (acpi_ac_get_state(ac))
                return 0;
@@ -323,6 +335,7 @@ static int acpi_ac_resume(struct acpi_device *device)
                kobject_uevent(&ac->charger.dev->kobj, KOBJ_CHANGE);
        return 0;
 }
+#endif
 static int acpi_ac_remove(struct acpi_device *device, int type)
 {
diff --git a/drivers/acpi/acpi_memhotplug.c b/drivers/acpi/acpi_memhotplug.c
index d98571385656..24c807f96636 100644
--- a/drivers/acpi/acpi_memhotplug.c
+++ b/drivers/acpi/acpi_memhotplug.c
@@ -341,7 +341,7 @@ static void acpi_memory_device_notify(acpi_handle handle, u32 event, void *data)
 {
        struct acpi_memory_device *mem_device;
        struct acpi_device *device;
+        u32 ost_code = ACPI_OST_SC_NON_SPECIFIC_FAILURE; /* default */
        switch (event) {
        case ACPI_NOTIFY_BUS_CHECK:
@@ -354,15 +354,20 @@ static void acpi_memory_device_notify(acpi_handle handle, u32 event, void *data)
                                          "\nReceived DEVICE CHECK notification for device\n"));
                if (acpi_memory_get_device(handle, &mem_device)) {
                        printk(KERN_ERR PREFIX "Cannot find driver data\n");
-                        return;
+                        break;
                }
-                if (!acpi_memory_check_device(mem_device)) {
+                if (acpi_memory_check_device(mem_device))
-                        if (acpi_memory_enable_device(mem_device))
+                        break;
-                                printk(KERN_ERR PREFIX
-                                            "Cannot enable memory device\n");
+                if (acpi_memory_enable_device(mem_device)) {
+                        printk(KERN_ERR PREFIX "Cannot enable memory device\n");
+                        break;
                }
+                ost_code = ACPI_OST_SC_SUCCESS;
                break;
        case ACPI_NOTIFY_EJECT_REQUEST:
                ACPI_DEBUG_PRINT((ACPI_DB_INFO,
                                  "\nReceived EJECT REQUEST notification for device\n"));
@@ -383,19 +388,35 @@ static void acpi_memory_device_notify(acpi_handle handle, u32 event, void *data)
                 * TBD: Can also be disabled by Callback registration
                 *      with generic sysfs driver
                 */
-                if (acpi_memory_disable_device(mem_device))
+                if (acpi_memory_disable_device(mem_device)) {
-                        printk(KERN_ERR PREFIX
+                        printk(KERN_ERR PREFIX "Disable memory device\n");
-                                    "Disable memory device\n");
+                        /*
+                         * If _EJ0 was called but failed, _OST is not
+                         * necessary.
+                         */
+                        if (mem_device->state == MEMORY_INVALID_STATE)
+                                return;
+                        break;
+                }
                /*
                 * TBD: Invoke acpi_bus_remove to cleanup data structures
                 */
-                break;
+                /* _EJ0 succeeded; _OST is not necessary */
+                return;
        default:
                ACPI_DEBUG_PRINT((ACPI_DB_INFO,
                                  "Unsupported event [0x%x]\n", event));
-                break;
+                /* non-hotplug event; possibly handled by other handler */
+                return;
        }
+        /* Inform firmware that the hotplug operation has completed */
+        (void) acpi_evaluate_hotplug_ost(handle, event, ost_code, NULL);
        return;
 }
diff --git a/drivers/acpi/acpi_pad.c b/drivers/acpi/acpi_pad.c
index a43fa1a57d57..af4aad6ee2eb 100644
--- a/drivers/acpi/acpi_pad.c
+++ b/drivers/acpi/acpi_pad.c
@@ -36,6 +36,7 @@
 #define ACPI_PROCESSOR_AGGREGATOR_DEVICE_NAME "Processor Aggregator"
 #define ACPI_PROCESSOR_AGGREGATOR_NOTIFY 0x80
 static DEFINE_MUTEX(isolated_cpus_lock);
+static DEFINE_MUTEX(round_robin_lock);
 static unsigned long power_saving_mwait_eax;
@@ -107,7 +108,7 @@ static void round_robin_cpu(unsigned int tsk_index)
        if (!alloc_cpumask_var(&tmp, GFP_KERNEL))
                return;
-        mutex_lock(&isolated_cpus_lock);
+        mutex_lock(&round_robin_lock);
        cpumask_clear(tmp);
        for_each_cpu(cpu, pad_busy_cpus)
                cpumask_or(tmp, tmp, topology_thread_cpumask(cpu));
@@ -116,7 +117,7 @@ static void round_robin_cpu(unsigned int tsk_index)
        if (cpumask_empty(tmp))
                cpumask_andnot(tmp, cpu_online_mask, pad_busy_cpus);
        if (cpumask_empty(tmp)) {
-                mutex_unlock(&isolated_cpus_lock);
+                mutex_unlock(&round_robin_lock);
                return;
        }
        for_each_cpu(cpu, tmp) {
@@ -131,7 +132,7 @@ static void round_robin_cpu(unsigned int tsk_index)
        tsk_in_cpu[tsk_index] = preferred_cpu;
        cpumask_set_cpu(preferred_cpu, pad_busy_cpus);
        cpu_weight[preferred_cpu]++;
-        mutex_unlock(&isolated_cpus_lock);
+        mutex_unlock(&round_robin_lock);
        set_cpus_allowed_ptr(current, cpumask_of(preferred_cpu));
 }
@@ -144,7 +145,7 @@ static void exit_round_robin(unsigned int tsk_index)
 }
 static unsigned int idle_pct = 5; /* percentage */
-static unsigned int round_robin_time = 10; /* second */
+static unsigned int round_robin_time = 1; /* second */
 static int power_saving_thread(void *data)
 {
        struct sched_param param = {.sched_priority = 1};
@@ -234,7 +235,7 @@ static int create_power_saving_task(void)
        ps_tsks[ps_tsk_num] = kthread_run(power_saving_thread,
                (void *)(unsigned long)ps_tsk_num,
-                "power_saving/%d", ps_tsk_num);
+                "acpi_pad/%d", ps_tsk_num);
        rc = IS_ERR(ps_tsks[ps_tsk_num]) ? PTR_ERR(ps_tsks[ps_tsk_num]) : 0;
        if (!rc)
                ps_tsk_num++;
diff --git a/drivers/acpi/acpica/Makefile b/drivers/acpi/acpica/Makefile
index 793b8cc8e256..0a1b3435f920 100644
--- a/drivers/acpi/acpica/Makefile
+++ b/drivers/acpi/acpica/Makefile
@@ -134,12 +134,14 @@ acpi-y +=		\
        tbinstal.o      \
        tbutils.o       \
        tbxface.o       \
+        tbxfload.o      \
        tbxfroot.o
 acpi-y +=               \
        utaddress.o     \
        utalloc.o       \
        utcopy.o        \
+        utexcep.o       \
        utdebug.o       \
        utdecode.o      \
        utdelete.o      \
diff --git a/drivers/acpi/acpica/acevents.h b/drivers/acpi/acpica/acevents.h
index d700f63e4701..c0a43b38c6a3 100644
--- a/drivers/acpi/acpica/acevents.h
+++ b/drivers/acpi/acpica/acevents.h
@@ -237,7 +237,7 @@ u32 acpi_ev_install_sci_handler(void);
 acpi_status acpi_ev_remove_sci_handler(void);
-u32 acpi_ev_initialize_sCI(u32 program_sCI);
+u32 acpi_ev_initialize_SCI(u32 program_SCI);
 ACPI_HW_DEPENDENT_RETURN_VOID(void acpi_ev_terminate(void))
 #endif                          /* __ACEVENTS_H__  */
diff --git a/drivers/acpi/acpica/acglobal.h b/drivers/acpi/acpica/acglobal.h
index 4f7d3f57d05c..ce79100fb5eb 100644
--- a/drivers/acpi/acpica/acglobal.h
+++ b/drivers/acpi/acpica/acglobal.h
@@ -278,8 +278,7 @@ ACPI_EXTERN acpi_cache_t *acpi_gbl_operand_cache;
 /* Global handlers */
-ACPI_EXTERN struct acpi_object_notify_handler acpi_gbl_device_notify;
+ACPI_EXTERN struct acpi_global_notify_handler acpi_gbl_global_notify[2];
-ACPI_EXTERN struct acpi_object_notify_handler acpi_gbl_system_notify;
 ACPI_EXTERN acpi_exception_handler acpi_gbl_exception_handler;
 ACPI_EXTERN acpi_init_handler acpi_gbl_init_handler;
 ACPI_EXTERN acpi_tbl_handler acpi_gbl_table_handler;
@@ -327,14 +326,6 @@ extern const char *acpi_gbl_region_types[ACPI_NUM_PREDEFINED_REGIONS];
 #endif
-/* Exception codes */
-extern char const *acpi_gbl_exception_names_env[];
-extern char const *acpi_gbl_exception_names_pgm[];
-extern char const *acpi_gbl_exception_names_tbl[];
-extern char const *acpi_gbl_exception_names_aml[];
-extern char const *acpi_gbl_exception_names_ctrl[];
 /*****************************************************************************
 *
 * Namespace globals
@@ -463,4 +454,12 @@ ACPI_EXTERN u32 acpi_gbl_size_of_acpi_objects;
 #endif                          /* ACPI_DEBUGGER */
+/*****************************************************************************
+ *
+ * Info/help support
+ *
+ ****************************************************************************/
+extern const struct ah_predefined_name asl_predefined_info[];
 #endif                          /* __ACGLOBAL_H__ */
diff --git a/drivers/acpi/acpica/achware.h b/drivers/acpi/acpica/achware.h
index 5ccb99ae3a6f..5de4ec72766d 100644
--- a/drivers/acpi/acpica/achware.h
+++ b/drivers/acpi/acpica/achware.h
@@ -83,22 +83,22 @@ acpi_status acpi_hw_clear_acpi_status(void);
 /*
 * hwsleep - sleep/wake support (Legacy sleep registers)
 */
-acpi_status acpi_hw_legacy_sleep(u8 sleep_state, u8 flags);
+acpi_status acpi_hw_legacy_sleep(u8 sleep_state);
-acpi_status acpi_hw_legacy_wake_prep(u8 sleep_state, u8 flags);
+acpi_status acpi_hw_legacy_wake_prep(u8 sleep_state);
-acpi_status acpi_hw_legacy_wake(u8 sleep_state, u8 flags);
+acpi_status acpi_hw_legacy_wake(u8 sleep_state);
 /*
 * hwesleep - sleep/wake support (Extended FADT-V5 sleep registers)
 */
 void acpi_hw_execute_sleep_method(char *method_name, u32 integer_argument);
-acpi_status acpi_hw_extended_sleep(u8 sleep_state, u8 flags);
+acpi_status acpi_hw_extended_sleep(u8 sleep_state);
-acpi_status acpi_hw_extended_wake_prep(u8 sleep_state, u8 flags);
+acpi_status acpi_hw_extended_wake_prep(u8 sleep_state);
-acpi_status acpi_hw_extended_wake(u8 sleep_state, u8 flags);
+acpi_status acpi_hw_extended_wake(u8 sleep_state);
 /*
 * hwvalid - Port I/O with validation
diff --git a/drivers/acpi/acpica/aclocal.h b/drivers/acpi/acpica/aclocal.h
index e3922ca20e7f..cc80fe10e8ea 100644
--- a/drivers/acpi/acpica/aclocal.h
+++ b/drivers/acpi/acpica/aclocal.h
@@ -299,7 +299,7 @@ acpi_status(*ACPI_INTERNAL_METHOD) (struct acpi_walk_state * walk_state);
 * Information structure for ACPI predefined names.
 * Each entry in the table contains the following items:
 *
- * Name                 - The ACPI reserved name
+ * name                 - The ACPI reserved name
 * param_count          - Number of arguments to the method
 * expected_return_btypes - Allowed type(s) for the return value
 */
@@ -404,6 +404,13 @@ struct acpi_gpe_handler_info {
        u8 originally_enabled;  /* True if GPE was originally enabled */
 };
+/* Notify info for implicit notify, multiple device objects */
+struct acpi_gpe_notify_info {
+        struct acpi_namespace_node *device_node;        /* Device to be notified */
+        struct acpi_gpe_notify_info *next;
+};
 struct acpi_gpe_notify_object {
        struct acpi_namespace_node *node;
        struct acpi_gpe_notify_object *next;
@@ -412,7 +419,7 @@ struct acpi_gpe_notify_object {
 union acpi_gpe_dispatch_info {
        struct acpi_namespace_node *method_node;        /* Method node for this GPE level */
        struct acpi_gpe_handler_info *handler;  /* Installed GPE handler */
-        struct acpi_gpe_notify_object device;   /* List of _PRW devices for implicit notify */
+        struct acpi_gpe_notify_info *notify_list;       /* List of _PRW devices for implicit notifies */
 };
 /*
@@ -420,7 +427,7 @@ union acpi_gpe_dispatch_info {
 * NOTE: Important to keep this struct as small as possible.
 */
 struct acpi_gpe_event_info {
-        union acpi_gpe_dispatch_info dispatch;  /* Either Method or Handler */
+        union acpi_gpe_dispatch_info dispatch;  /* Either Method, Handler, or notify_list */
        struct acpi_gpe_register_info *register_info;   /* Backpointer to register info */
        u8 flags;               /* Misc info about this GPE */
        u8 gpe_number;          /* This GPE */
@@ -600,13 +607,22 @@ acpi_status(*acpi_parse_downwards) (struct acpi_walk_state * walk_state,
 typedef acpi_status(*acpi_parse_upwards) (struct acpi_walk_state * walk_state);
+/* Global handlers for AML Notifies */
+struct acpi_global_notify_handler {
+        acpi_notify_handler handler;
+        void *context;
+};
 /*
 * Notify info - used to pass info to the deferred notify
 * handler/dispatcher.
 */
 struct acpi_notify_info {
-        ACPI_STATE_COMMON struct acpi_namespace_node *node;
+        ACPI_STATE_COMMON u8 handler_list_id;
-        union acpi_operand_object *handler_obj;
+        struct acpi_namespace_node *node;
+        union acpi_operand_object *handler_list_head;
+        struct acpi_global_notify_handler *global;
 };
 /* Generic state is union of structs above */
@@ -718,7 +734,7 @@ struct acpi_parse_obj_named {
        u32 name;               /* 4-byte name or zero if no name */
 };
-/* This version is used by the i_aSL compiler only */
+/* This version is used by the iASL compiler only */
 #define ACPI_MAX_PARSEOP_NAME   20
@@ -787,6 +803,7 @@ struct acpi_parse_state {
 #define ACPI_PARSEOP_IGNORE             0x01
 #define ACPI_PARSEOP_PARAMLIST          0x02
 #define ACPI_PARSEOP_EMPTY_TERMLIST     0x04
+#define ACPI_PARSEOP_PREDEF_CHECKED     0x08
 #define ACPI_PARSEOP_SPECIAL            0x10
 /*****************************************************************************
@@ -1075,4 +1092,18 @@ struct acpi_debug_mem_block {
 #define ACPI_MEM_LIST_MAX               1
 #define ACPI_NUM_MEM_LISTS              2
+/*****************************************************************************
+ *
+ * Info/help support
+ *
+ ****************************************************************************/
+struct ah_predefined_name {
+        char *name;
+        char *description;
+#ifndef ACPI_ASL_COMPILER
+        char *action;
+#endif
+};
 #endif                          /* __ACLOCAL_H__ */
diff --git a/drivers/acpi/acpica/acmacros.h b/drivers/acpi/acpica/acmacros.h
index f119f473f71a..832b6198652e 100644
--- a/drivers/acpi/acpica/acmacros.h
+++ b/drivers/acpi/acpica/acmacros.h
@@ -62,7 +62,7 @@
 * printf() format helpers
 */
-/* Split 64-bit integer into two 32-bit values. Use with %8.8_x%8.8_x */
+/* Split 64-bit integer into two 32-bit values. Use with %8.8X%8.8X */
 #define ACPI_FORMAT_UINT64(i)           ACPI_HIDWORD(i), ACPI_LODWORD(i)
@@ -283,8 +283,8 @@
 #define ACPI_INSERT_BITS(target, mask, source)          target = ((target & (~(mask))) | (source & mask))
 /*
- * A struct acpi_namespace_node can appear in some contexts
+ * An object of type struct acpi_namespace_node can appear in some contexts
- * where a pointer to a union acpi_operand_object can also
+ * where a pointer to an object of type union acpi_operand_object can also
 * appear. This macro is used to distinguish them.
 *
 * The "Descriptor" field is the first field in both structures.
diff --git a/drivers/acpi/acpica/acobject.h b/drivers/acpi/acpica/acobject.h
index c065078ca83b..364a1303fb8f 100644
--- a/drivers/acpi/acpica/acobject.h
+++ b/drivers/acpi/acpica/acobject.h
@@ -113,8 +113,8 @@ struct acpi_object_integer {
 };
 /*
- * Note: The String and Buffer object must be identical through the Pointer
+ * Note: The String and Buffer object must be identical through the
- * and length elements.  There is code that depends on this.
+ * pointer and length elements. There is code that depends on this.
 *
 * Fields common to both Strings and Buffers
 */
@@ -206,8 +206,7 @@ struct acpi_object_method {
 * Common fields for objects that support ASL notifications
 */
 #define ACPI_COMMON_NOTIFY_INFO \
-        union acpi_operand_object       *system_notify;     /* Handler for system notifies */\
+        union acpi_operand_object       *notify_list[2];    /* Handlers for system/device notifies */\
-        union acpi_operand_object       *device_notify;     /* Handler for driver notifies */\
        union acpi_operand_object       *handler;       /* Handler for Address space */
 struct acpi_object_notify_common {      /* COMMON NOTIFY for POWER, PROCESSOR, DEVICE, and THERMAL */
@@ -296,10 +295,10 @@ struct acpi_object_buffer_field {
 struct acpi_object_notify_handler {
        ACPI_OBJECT_COMMON_HEADER struct acpi_namespace_node *node;     /* Parent device */
-        u32 handler_type;
+        u32 handler_type;       /* Type: Device/System/Both */
-        acpi_notify_handler handler;
+        acpi_notify_handler handler;    /* Handler address */
        void *context;
-        struct acpi_object_notify_handler *next;
+        union acpi_operand_object *next[2];     /* Device and System handler lists */
 };
 struct acpi_object_addr_handler {
@@ -382,7 +381,7 @@ struct acpi_object_cache_list {
 /******************************************************************************
 *
- * union acpi_operand_object Descriptor - a giant union of all of the above
+ * union acpi_operand_object descriptor - a giant union of all of the above
 *
 *****************************************************************************/
diff --git a/drivers/acpi/acpica/acpredef.h b/drivers/acpi/acpica/acpredef.h
index bbb34c9be4e8..3080c017f5ba 100644
--- a/drivers/acpi/acpica/acpredef.h
+++ b/drivers/acpi/acpica/acpredef.h
@@ -140,7 +140,7 @@ enum acpi_return_package_types {
 *
 * The main entries in the table each contain the following items:
 *
- * Name                 - The ACPI reserved name
+ * name                 - The ACPI reserved name
 * param_count          - Number of arguments to the method
 * expected_btypes      - Allowed type(s) for the return value.
 *                        0 means that no return value is expected.
@@ -511,14 +511,14 @@ static const union acpi_predefined_info predefined_names[] =
        {{"_TMP", 0, ACPI_RTYPE_INTEGER}},
        {{"_TPC", 0, ACPI_RTYPE_INTEGER}},
        {{"_TPT", 1, 0}},
-        {{"_TRT", 0, ACPI_RTYPE_PACKAGE}}, /* Variable-length (Pkgs) each 2_ref/6_int */
+        {{"_TRT", 0, ACPI_RTYPE_PACKAGE}}, /* Variable-length (Pkgs) each 2 Ref/6 Int */
                          {{{ACPI_PTYPE2, ACPI_RTYPE_REFERENCE, 2, ACPI_RTYPE_INTEGER}, 6, 0}},
-        {{"_TSD", 0, ACPI_RTYPE_PACKAGE}}, /* Variable-length (Pkgs) each 5_int with count */
+        {{"_TSD", 0, ACPI_RTYPE_PACKAGE}}, /* Variable-length (Pkgs) each 5 Int with count */
                          {{{ACPI_PTYPE2_COUNT,ACPI_RTYPE_INTEGER, 5,0}, 0,0}},
        {{"_TSP", 0, ACPI_RTYPE_INTEGER}},
-        {{"_TSS", 0, ACPI_RTYPE_PACKAGE}}, /* Variable-length (Pkgs) each 5_int */
+        {{"_TSS", 0, ACPI_RTYPE_PACKAGE}}, /* Variable-length (Pkgs) each 5 Int */
                          {{{ACPI_PTYPE2, ACPI_RTYPE_INTEGER, 5,0}, 0,0}},
        {{"_TST", 0, ACPI_RTYPE_INTEGER}},
diff --git a/drivers/acpi/acpica/acstruct.h b/drivers/acpi/acpica/acstruct.h
index 0404df605bc1..f196e2c9a71f 100644
--- a/drivers/acpi/acpica/acstruct.h
+++ b/drivers/acpi/acpica/acstruct.h
@@ -68,7 +68,7 @@
 #define ACPI_WALK_METHOD            0x01
 #define ACPI_WALK_METHOD_RESTART    0x02
-/* Flags for i_aSL compiler only */
+/* Flags for iASL compiler only */
 #define ACPI_WALK_CONST_REQUIRED    0x10
 #define ACPI_WALK_CONST_OPTIONAL    0x20
diff --git a/drivers/acpi/acpica/acutils.h b/drivers/acpi/acpica/acutils.h
index 925ccf22101b..5035327ebccc 100644
--- a/drivers/acpi/acpica/acutils.h
+++ b/drivers/acpi/acpica/acutils.h
@@ -460,6 +460,8 @@ acpi_ut_short_divide(u64 in_dividend,
 /*
 * utmisc
 */
+void ut_convert_backslashes(char *pathname);
 const char *acpi_ut_validate_exception(acpi_status status);
 u8 acpi_ut_is_pci_root_bridge(char *id);
diff --git a/drivers/acpi/acpica/amlcode.h b/drivers/acpi/acpica/amlcode.h
index 905280fec0fa..c26f8ff6c3b9 100644
--- a/drivers/acpi/acpica/amlcode.h
+++ b/drivers/acpi/acpica/amlcode.h
@@ -182,7 +182,7 @@
 /*
 * Combination opcodes (actually two one-byte opcodes)
- * Used by the disassembler and i_aSL compiler
+ * Used by the disassembler and iASL compiler
 */
 #define AML_LGREATEREQUAL_OP        (u16) 0x9295
 #define AML_LLESSEQUAL_OP           (u16) 0x9294
@@ -280,7 +280,7 @@
 /* Multiple/complex types */
-#define ARGI_DATAOBJECT             0x12        /* Buffer, String, package or reference to a Node - Used only by size_of operator */
+#define ARGI_DATAOBJECT             0x12        /* Buffer, String, package or reference to a node - Used only by size_of operator */
 #define ARGI_COMPLEXOBJ             0x13        /* Buffer, String, or package (Used by INDEX op only) */
 #define ARGI_REF_OR_STRING          0x14        /* Reference or String (Used by DEREFOF op only) */
 #define ARGI_REGION_OR_BUFFER       0x15        /* Used by LOAD op only */
diff --git a/drivers/acpi/acpica/amlresrc.h b/drivers/acpi/acpica/amlresrc.h
index 7b2128f274e7..af4947956ec2 100644
--- a/drivers/acpi/acpica/amlresrc.h
+++ b/drivers/acpi/acpica/amlresrc.h
@@ -98,7 +98,7 @@
 #define ACPI_RESTAG_TRANSLATION                 "_TRA"
 #define ACPI_RESTAG_TRANSTYPE                   "_TRS"  /* Sparse(1), Dense(0) */
 #define ACPI_RESTAG_TYPE                        "_TTP"  /* Translation(1), Static (0) */
-#define ACPI_RESTAG_XFERTYPE                    "_SIZ"  /* 8(0), 8_and16(1), 16(2) */
+#define ACPI_RESTAG_XFERTYPE                    "_SIZ"  /* 8(0), 8And16(1), 16(2) */
 #define ACPI_RESTAG_VENDORDATA                  "_VEN"
 /* Default sizes for "small" resource descriptors */
@@ -235,7 +235,7 @@ AML_RESOURCE_LARGE_HEADER_COMMON AML_RESOURCE_ADDRESS_COMMON};
 struct aml_resource_extended_address64 {
        AML_RESOURCE_LARGE_HEADER_COMMON
-            AML_RESOURCE_ADDRESS_COMMON u8 revision_iD;
+            AML_RESOURCE_ADDRESS_COMMON u8 revision_ID;
        u8 reserved;
        u64 granularity;
        u64 minimum;
diff --git a/drivers/acpi/acpica/dsargs.c b/drivers/acpi/acpica/dsargs.c
index 80eb1900297f..c8b5e2565b98 100644
--- a/drivers/acpi/acpica/dsargs.c
+++ b/drivers/acpi/acpica/dsargs.c
@@ -62,7 +62,7 @@ acpi_ds_execute_arguments(struct acpi_namespace_node *node,
 *
 * FUNCTION:    acpi_ds_execute_arguments
 *
- * PARAMETERS:  Node                - Object NS node
+ * PARAMETERS:  node                - Object NS node
 *              scope_node          - Parent NS node
 *              aml_length          - Length of executable AML
 *              aml_start           - Pointer to the AML
diff --git a/drivers/acpi/acpica/dscontrol.c b/drivers/acpi/acpica/dscontrol.c
index effe4ca1133f..465f02134b89 100644
--- a/drivers/acpi/acpica/dscontrol.c
+++ b/drivers/acpi/acpica/dscontrol.c
@@ -56,7 +56,7 @@ ACPI_MODULE_NAME("dscontrol")
 * FUNCTION:    acpi_ds_exec_begin_control_op
 *
 * PARAMETERS:  walk_list       - The list that owns the walk stack
- *              Op              - The control Op
+ *              op              - The control Op
 *
 * RETURN:      Status
 *
@@ -153,7 +153,7 @@ acpi_ds_exec_begin_control_op(struct acpi_walk_state *walk_state,
 * FUNCTION:    acpi_ds_exec_end_control_op
 *
 * PARAMETERS:  walk_list       - The list that owns the walk stack
- *              Op              - The control Op
+ *              op              - The control Op
 *
 * RETURN:      Status
 *
diff --git a/drivers/acpi/acpica/dsfield.c b/drivers/acpi/acpica/dsfield.c
index cd243cf2cab2..3da6fd8530c5 100644
--- a/drivers/acpi/acpica/dsfield.c
+++ b/drivers/acpi/acpica/dsfield.c
@@ -53,16 +53,84 @@
 ACPI_MODULE_NAME("dsfield")
 /* Local prototypes */
+#ifdef ACPI_ASL_COMPILER
+#include "acdisasm.h"
+static acpi_status
+acpi_ds_create_external_region(acpi_status lookup_status,
+                               union acpi_parse_object *op,
+                               char *path,
+                               struct acpi_walk_state *walk_state,
+                               struct acpi_namespace_node **node);
+#endif
 static acpi_status
 acpi_ds_get_field_names(struct acpi_create_field_info *info,
                        struct acpi_walk_state *walk_state,
                        union acpi_parse_object *arg);
+#ifdef ACPI_ASL_COMPILER
+/*******************************************************************************
+ *
+ * FUNCTION:    acpi_ds_create_external_region (iASL Disassembler only)
+ *
+ * PARAMETERS:  lookup_status   - Status from ns_lookup operation
+ *              op              - Op containing the Field definition and args
+ *              path            - Pathname of the region
+ *  `           walk_state      - Current method state
+ *              node            - Where the new region node is returned
+ *
+ * RETURN:      Status
+ *
+ * DESCRIPTION: Add region to the external list if NOT_FOUND. Create a new
+ *              region node/object.
+ *
+ ******************************************************************************/
+static acpi_status
+acpi_ds_create_external_region(acpi_status lookup_status,
+                               union acpi_parse_object *op,
+                               char *path,
+                               struct acpi_walk_state *walk_state,
+                               struct acpi_namespace_node **node)
+{
+        acpi_status status;
+        union acpi_operand_object *obj_desc;
+        if (lookup_status != AE_NOT_FOUND) {
+                return (lookup_status);
+        }
+        /*
+         * Table disassembly:
+         * operation_region not found. Generate an External for it, and
+         * insert the name into the namespace.
+         */
+        acpi_dm_add_to_external_list(op, path, ACPI_TYPE_REGION, 0);
+        status = acpi_ns_lookup(walk_state->scope_info, path, ACPI_TYPE_REGION,
+                                ACPI_IMODE_LOAD_PASS1, ACPI_NS_SEARCH_PARENT,
+                                walk_state, node);
+        if (ACPI_FAILURE(status)) {
+                return (status);
+        }
+        /* Must create and install a region object for the new node */
+        obj_desc = acpi_ut_create_internal_object(ACPI_TYPE_REGION);
+        if (!obj_desc) {
+                return (AE_NO_MEMORY);
+        }
+        obj_desc->region.node = *node;
+        status = acpi_ns_attach_object(*node, obj_desc, ACPI_TYPE_REGION);
+        return (status);
+}
+#endif
 /*******************************************************************************
 *
 * FUNCTION:    acpi_ds_create_buffer_field
 *
- * PARAMETERS:  Op                  - Current parse op (create_xXField)
+ * PARAMETERS:  op                  - Current parse op (create_XXField)
 *              walk_state          - Current state
 *
 * RETURN:      Status
@@ -99,7 +167,7 @@ acpi_ds_create_buffer_field(union acpi_parse_object *op,
                arg = acpi_ps_get_arg(op, 3);
        } else {
-                /* For all other create_xXXField operators, name is the 3rd argument */
+                /* For all other create_XXXField operators, name is the 3rd argument */
                arg = acpi_ps_get_arg(op, 2);
        }
@@ -203,9 +271,9 @@ acpi_ds_create_buffer_field(union acpi_parse_object *op,
 *
 * FUNCTION:    acpi_ds_get_field_names
 *
- * PARAMETERS:  Info            - create_field info structure
+ * PARAMETERS:  info            - create_field info structure
 *  `           walk_state      - Current method state
- *              Arg             - First parser arg for the field name list
+ *              arg             - First parser arg for the field name list
 *
 * RETURN:      Status
 *
@@ -234,10 +302,10 @@ acpi_ds_get_field_names(struct acpi_create_field_info *info,
        while (arg) {
                /*
                 * Four types of field elements are handled:
-                 * 1) Name - Enters a new named field into the namespace
+                 * 1) name - Enters a new named field into the namespace
-                 * 2) Offset - specifies a bit offset
+                 * 2) offset - specifies a bit offset
                 * 3) access_as - changes the access mode/attributes
-                 * 4) Connection - Associate a resource template with the field
+                 * 4) connection - Associate a resource template with the field
                 */
                switch (arg->common.aml_opcode) {
                case AML_INT_RESERVEDFIELD_OP:
@@ -389,7 +457,7 @@ acpi_ds_get_field_names(struct acpi_create_field_info *info,
 *
 * FUNCTION:    acpi_ds_create_field
 *
- * PARAMETERS:  Op              - Op containing the Field definition and args
+ * PARAMETERS:  op              - Op containing the Field definition and args
 *              region_node     - Object for the containing Operation Region
 *  `           walk_state      - Current method state
 *
@@ -413,12 +481,19 @@ acpi_ds_create_field(union acpi_parse_object *op,
        /* First arg is the name of the parent op_region (must already exist) */
        arg = op->common.value.arg;
        if (!region_node) {
                status =
                    acpi_ns_lookup(walk_state->scope_info,
                                   arg->common.value.name, ACPI_TYPE_REGION,
                                   ACPI_IMODE_EXECUTE, ACPI_NS_SEARCH_PARENT,
                                   walk_state, &region_node);
+#ifdef ACPI_ASL_COMPILER
+                status = acpi_ds_create_external_region(status, arg,
+                                                        arg->common.value.name,
+                                                        walk_state,
+                                                        &region_node);
+#endif
                if (ACPI_FAILURE(status)) {
                        ACPI_ERROR_NAMESPACE(arg->common.value.name, status);
                        return_ACPI_STATUS(status);
@@ -446,7 +521,7 @@ acpi_ds_create_field(union acpi_parse_object *op,
 *
 * FUNCTION:    acpi_ds_init_field_objects
 *
- * PARAMETERS:  Op              - Op containing the Field definition and args
+ * PARAMETERS:  op              - Op containing the Field definition and args
 *  `           walk_state      - Current method state
 *
 * RETURN:      Status
@@ -561,7 +636,7 @@ acpi_ds_init_field_objects(union acpi_parse_object *op,
 *
 * FUNCTION:    acpi_ds_create_bank_field
 *
- * PARAMETERS:  Op              - Op containing the Field definition and args
+ * PARAMETERS:  op              - Op containing the Field definition and args
 *              region_node     - Object for the containing Operation Region
 *              walk_state      - Current method state
 *
@@ -591,6 +666,12 @@ acpi_ds_create_bank_field(union acpi_parse_object *op,
                                   arg->common.value.name, ACPI_TYPE_REGION,
                                   ACPI_IMODE_EXECUTE, ACPI_NS_SEARCH_PARENT,
                                   walk_state, &region_node);
+#ifdef ACPI_ASL_COMPILER
+                status = acpi_ds_create_external_region(status, arg,
+                                                        arg->common.value.name,
+                                                        walk_state,
+                                                        &region_node);
+#endif
                if (ACPI_FAILURE(status)) {
                        ACPI_ERROR_NAMESPACE(arg->common.value.name, status);
                        return_ACPI_STATUS(status);
@@ -645,7 +726,7 @@ acpi_ds_create_bank_field(union acpi_parse_object *op,
 *
 * FUNCTION:    acpi_ds_create_index_field
 *
- * PARAMETERS:  Op              - Op containing the Field definition and args
+ * PARAMETERS:  op              - Op containing the Field definition and args
 *              region_node     - Object for the containing Operation Region
 *  `           walk_state      - Current method state
 *
diff --git a/drivers/acpi/acpica/dsinit.c b/drivers/acpi/acpica/dsinit.c
index 9e5ac7f780a7..87eff701ecfa 100644
--- a/drivers/acpi/acpica/dsinit.c
+++ b/drivers/acpi/acpica/dsinit.c
@@ -60,8 +60,8 @@ acpi_ds_init_one_object(acpi_handle obj_handle,
 * FUNCTION:    acpi_ds_init_one_object
 *
 * PARAMETERS:  obj_handle      - Node for the object
- *              Level           - Current nesting level
+ *              level           - Current nesting level
- *              Context         - Points to a init info struct
+ *              context         - Points to a init info struct
 *              return_value    - Not used
 *
 * RETURN:      Status
diff --git a/drivers/acpi/acpica/dsmethod.c b/drivers/acpi/acpica/dsmethod.c
index 00f5dab5bcc0..aa9a5d4e4052 100644
--- a/drivers/acpi/acpica/dsmethod.c
+++ b/drivers/acpi/acpica/dsmethod.c
@@ -61,7 +61,7 @@ acpi_ds_create_method_mutex(union acpi_operand_object *method_desc);
 *
 * FUNCTION:    acpi_ds_method_error
 *
- * PARAMETERS:  Status          - Execution status
+ * PARAMETERS:  status          - Execution status
 *              walk_state      - Current state
 *
 * RETURN:      Status
@@ -306,9 +306,9 @@ acpi_ds_begin_method_execution(struct acpi_namespace_node *method_node,
 *
 * FUNCTION:    acpi_ds_call_control_method
 *
- * PARAMETERS:  Thread              - Info for this thread
+ * PARAMETERS:  thread              - Info for this thread
 *              this_walk_state     - Current walk state
- *              Op                  - Current Op to be walked
+ *              op                  - Current Op to be walked
 *
 * RETURN:      Status
 *
diff --git a/drivers/acpi/acpica/dsmthdat.c b/drivers/acpi/acpica/dsmthdat.c
index b40bd507be5d..8d55cebaa656 100644
--- a/drivers/acpi/acpica/dsmthdat.c
+++ b/drivers/acpi/acpica/dsmthdat.c
@@ -177,7 +177,7 @@ void acpi_ds_method_data_delete_all(struct acpi_walk_state *walk_state)
 *
 * FUNCTION:    acpi_ds_method_data_init_args
 *
- * PARAMETERS:  *Params         - Pointer to a parameter list for the method
+ * PARAMETERS:  *params         - Pointer to a parameter list for the method
 *              max_param_count - The arg count for this method
 *              walk_state      - Current walk state object
 *
@@ -232,11 +232,11 @@ acpi_ds_method_data_init_args(union acpi_operand_object **params,
 *
 * FUNCTION:    acpi_ds_method_data_get_node
 *
- * PARAMETERS:  Type                - Either ACPI_REFCLASS_LOCAL or
+ * PARAMETERS:  type                - Either ACPI_REFCLASS_LOCAL or
 *                                    ACPI_REFCLASS_ARG
- *              Index               - Which Local or Arg whose type to get
+ *              index               - Which Local or Arg whose type to get
 *              walk_state          - Current walk state object
- *              Node                - Where the node is returned.
+ *              node                - Where the node is returned.
 *
 * RETURN:      Status and node
 *
@@ -296,10 +296,10 @@ acpi_ds_method_data_get_node(u8 type,
 *
 * FUNCTION:    acpi_ds_method_data_set_value
 *
- * PARAMETERS:  Type                - Either ACPI_REFCLASS_LOCAL or
+ * PARAMETERS:  type                - Either ACPI_REFCLASS_LOCAL or
 *                                    ACPI_REFCLASS_ARG
- *              Index               - Which Local or Arg to get
+ *              index               - Which Local or Arg to get
- *              Object              - Object to be inserted into the stack entry
+ *              object              - Object to be inserted into the stack entry
 *              walk_state          - Current walk state object
 *
 * RETURN:      Status
@@ -336,7 +336,7 @@ acpi_ds_method_data_set_value(u8 type,
         * Increment ref count so object can't be deleted while installed.
         * NOTE: We do not copy the object in order to preserve the call by
         * reference semantics of ACPI Control Method invocation.
-         * (See ACPI Specification 2.0_c)
+         * (See ACPI Specification 2.0C)
         */
        acpi_ut_add_reference(object);
@@ -350,9 +350,9 @@ acpi_ds_method_data_set_value(u8 type,
 *
 * FUNCTION:    acpi_ds_method_data_get_value
 *
- * PARAMETERS:  Type                - Either ACPI_REFCLASS_LOCAL or
+ * PARAMETERS:  type                - Either ACPI_REFCLASS_LOCAL or
 *                                    ACPI_REFCLASS_ARG
- *              Index               - Which local_var or argument to get
+ *              index               - Which localVar or argument to get
 *              walk_state          - Current walk state object
 *              dest_desc           - Where Arg or Local value is returned
 *
@@ -458,9 +458,9 @@ acpi_ds_method_data_get_value(u8 type,
 *
 * FUNCTION:    acpi_ds_method_data_delete_value
 *
- * PARAMETERS:  Type                - Either ACPI_REFCLASS_LOCAL or
+ * PARAMETERS:  type                - Either ACPI_REFCLASS_LOCAL or
 *                                    ACPI_REFCLASS_ARG
- *              Index               - Which local_var or argument to delete
+ *              index               - Which localVar or argument to delete
 *              walk_state          - Current walk state object
 *
 * RETURN:      None
@@ -515,9 +515,9 @@ acpi_ds_method_data_delete_value(u8 type,
 *
 * FUNCTION:    acpi_ds_store_object_to_local
 *
- * PARAMETERS:  Type                - Either ACPI_REFCLASS_LOCAL or
+ * PARAMETERS:  type                - Either ACPI_REFCLASS_LOCAL or
 *                                    ACPI_REFCLASS_ARG
- *              Index               - Which Local or Arg to set
+ *              index               - Which Local or Arg to set
 *              obj_desc            - Value to be stored
 *              walk_state          - Current walk state
 *
@@ -670,8 +670,8 @@ acpi_ds_store_object_to_local(u8 type,
 *
 * FUNCTION:    acpi_ds_method_data_get_type
 *
- * PARAMETERS:  Opcode              - Either AML_LOCAL_OP or AML_ARG_OP
+ * PARAMETERS:  opcode              - Either AML_LOCAL_OP or AML_ARG_OP
- *              Index               - Which Local or Arg whose type to get
+ *              index               - Which Local or Arg whose type to get
 *              walk_state          - Current walk state object
 *
 * RETURN:      Data type of current value of the selected Arg or Local
diff --git a/drivers/acpi/acpica/dsobject.c b/drivers/acpi/acpica/dsobject.c
index d7045ca3e32a..68592dd34960 100644
--- a/drivers/acpi/acpica/dsobject.c
+++ b/drivers/acpi/acpica/dsobject.c
@@ -64,7 +64,7 @@ acpi_ds_build_internal_object(struct acpi_walk_state *walk_state,
 * FUNCTION:    acpi_ds_build_internal_object
 *
 * PARAMETERS:  walk_state      - Current walk state
- *              Op              - Parser object to be translated
+ *              op              - Parser object to be translated
 *              obj_desc_ptr    - Where the ACPI internal object is returned
 *
 * RETURN:      Status
@@ -250,7 +250,7 @@ acpi_ds_build_internal_object(struct acpi_walk_state *walk_state,
 * FUNCTION:    acpi_ds_build_internal_buffer_obj
 *
 * PARAMETERS:  walk_state      - Current walk state
- *              Op              - Parser object to be translated
+ *              op              - Parser object to be translated
 *              buffer_length   - Length of the buffer
 *              obj_desc_ptr    - Where the ACPI internal object is returned
 *
@@ -354,7 +354,7 @@ acpi_ds_build_internal_buffer_obj(struct acpi_walk_state *walk_state,
 * FUNCTION:    acpi_ds_build_internal_package_obj
 *
 * PARAMETERS:  walk_state      - Current walk state
- *              Op              - Parser object to be translated
+ *              op              - Parser object to be translated
 *              element_count   - Number of elements in the package - this is
 *                                the num_elements argument to Package()
 *              obj_desc_ptr    - Where the ACPI internal object is returned
@@ -547,8 +547,8 @@ acpi_ds_build_internal_package_obj(struct acpi_walk_state *walk_state,
 * FUNCTION:    acpi_ds_create_node
 *
 * PARAMETERS:  walk_state      - Current walk state
- *              Node            - NS Node to be initialized
+ *              node            - NS Node to be initialized
- *              Op              - Parser object to be translated
+ *              op              - Parser object to be translated
 *
 * RETURN:      Status
 *
@@ -611,8 +611,8 @@ acpi_ds_create_node(struct acpi_walk_state *walk_state,
 * FUNCTION:    acpi_ds_init_object_from_op
 *
 * PARAMETERS:  walk_state      - Current walk state
- *              Op              - Parser op used to init the internal object
+ *              op              - Parser op used to init the internal object
- *              Opcode          - AML opcode associated with the object
+ *              opcode          - AML opcode associated with the object
 *              ret_obj_desc    - Namespace object to be initialized
 *
 * RETURN:      Status
diff --git a/drivers/acpi/acpica/dsopcode.c b/drivers/acpi/acpica/dsopcode.c
index e5eff7585102..aa34d8984d34 100644
--- a/drivers/acpi/acpica/dsopcode.c
+++ b/drivers/acpi/acpica/dsopcode.c
@@ -286,7 +286,7 @@ acpi_ds_init_buffer_field(u16 aml_opcode,
 * FUNCTION:    acpi_ds_eval_buffer_field_operands
 *
 * PARAMETERS:  walk_state      - Current walk
- *              Op              - A valid buffer_field Op object
+ *              op              - A valid buffer_field Op object
 *
 * RETURN:      Status
 *
@@ -370,7 +370,7 @@ acpi_ds_eval_buffer_field_operands(struct acpi_walk_state *walk_state,
 * FUNCTION:    acpi_ds_eval_region_operands
 *
 * PARAMETERS:  walk_state      - Current walk
- *              Op              - A valid region Op object
+ *              op              - A valid region Op object
 *
 * RETURN:      Status
 *
@@ -397,7 +397,7 @@ acpi_ds_eval_region_operands(struct acpi_walk_state *walk_state,
         */
        node = op->common.node;
-        /* next_op points to the op that holds the space_iD */
+        /* next_op points to the op that holds the space_ID */
        next_op = op->common.value.arg;
@@ -461,7 +461,7 @@ acpi_ds_eval_region_operands(struct acpi_walk_state *walk_state,
 * FUNCTION:    acpi_ds_eval_table_region_operands
 *
 * PARAMETERS:  walk_state      - Current walk
- *              Op              - A valid region Op object
+ *              op              - A valid region Op object
 *
 * RETURN:      Status
 *
@@ -560,7 +560,7 @@ acpi_ds_eval_table_region_operands(struct acpi_walk_state *walk_state,
 * FUNCTION:    acpi_ds_eval_data_object_operands
 *
 * PARAMETERS:  walk_state      - Current walk
- *              Op              - A valid data_object Op object
+ *              op              - A valid data_object Op object
 *              obj_desc        - data_object
 *
 * RETURN:      Status
@@ -662,7 +662,7 @@ acpi_ds_eval_data_object_operands(struct acpi_walk_state *walk_state,
 * FUNCTION:    acpi_ds_eval_bank_field_operands
 *
 * PARAMETERS:  walk_state      - Current walk
- *              Op              - A valid bank_field Op object
+ *              op              - A valid bank_field Op object
 *
 * RETURN:      Status
 *
diff --git a/drivers/acpi/acpica/dsutils.c b/drivers/acpi/acpica/dsutils.c
index 1abcda31037f..73a5447475f5 100644
--- a/drivers/acpi/acpica/dsutils.c
+++ b/drivers/acpi/acpica/dsutils.c
@@ -157,7 +157,7 @@ acpi_ds_do_implicit_return(union acpi_operand_object *return_desc,
 *
 * FUNCTION:    acpi_ds_is_result_used
 *
- * PARAMETERS:  Op                  - Current Op
+ * PARAMETERS:  op                  - Current Op
 *              walk_state          - Current State
 *
 * RETURN:      TRUE if result is used, FALSE otherwise
@@ -323,7 +323,7 @@ acpi_ds_is_result_used(union acpi_parse_object * op,
 *
 * FUNCTION:    acpi_ds_delete_result_if_not_used
 *
- * PARAMETERS:  Op              - Current parse Op
+ * PARAMETERS:  op              - Current parse Op
 *              result_obj      - Result of the operation
 *              walk_state      - Current state
 *
@@ -445,7 +445,7 @@ void acpi_ds_clear_operands(struct acpi_walk_state *walk_state)
 * FUNCTION:    acpi_ds_create_operand
 *
 * PARAMETERS:  walk_state      - Current walk state
- *              Arg             - Parse object for the argument
+ *              arg             - Parse object for the argument
 *              arg_index       - Which argument (zero based)
 *
 * RETURN:      Status
diff --git a/drivers/acpi/acpica/dswscope.c b/drivers/acpi/acpica/dswscope.c
index 9e9490a9cbf0..f6c4295470ae 100644
--- a/drivers/acpi/acpica/dswscope.c
+++ b/drivers/acpi/acpica/dswscope.c
@@ -85,8 +85,8 @@ void acpi_ds_scope_stack_clear(struct acpi_walk_state *walk_state)
 *
 * FUNCTION:    acpi_ds_scope_stack_push
 *
- * PARAMETERS:  Node            - Name to be made current
+ * PARAMETERS:  node            - Name to be made current
- *              Type            - Type of frame being pushed
+ *              type            - Type of frame being pushed
 *              walk_state      - Current state
 *
 * RETURN:      Status
diff --git a/drivers/acpi/acpica/dswstate.c b/drivers/acpi/acpica/dswstate.c
index c9c2ac13e7cc..d0e6555061e4 100644
--- a/drivers/acpi/acpica/dswstate.c
+++ b/drivers/acpi/acpica/dswstate.c
@@ -58,7 +58,7 @@ static acpi_status acpi_ds_result_stack_pop(struct acpi_walk_state *ws);
 *
 * FUNCTION:    acpi_ds_result_pop
 *
- * PARAMETERS:  Object              - Where to return the popped object
+ * PARAMETERS:  object              - Where to return the popped object
 *              walk_state          - Current Walk state
 *
 * RETURN:      Status
@@ -132,7 +132,7 @@ acpi_ds_result_pop(union acpi_operand_object **object,
 *
 * FUNCTION:    acpi_ds_result_push
 *
- * PARAMETERS:  Object              - Where to return the popped object
+ * PARAMETERS:  object              - Where to return the popped object
 *              walk_state          - Current Walk state
 *
 * RETURN:      Status
@@ -296,7 +296,7 @@ static acpi_status acpi_ds_result_stack_pop(struct acpi_walk_state *walk_state)
 *
 * FUNCTION:    acpi_ds_obj_stack_push
 *
- * PARAMETERS:  Object              - Object to push
+ * PARAMETERS:  object              - Object to push
 *              walk_state          - Current Walk state
 *
 * RETURN:      Status
@@ -433,7 +433,7 @@ acpi_ds_obj_stack_pop_and_delete(u32 pop_count,
 *
 * FUNCTION:    acpi_ds_get_current_walk_state
 *
- * PARAMETERS:  Thread          - Get current active state for this Thread
+ * PARAMETERS:  thread          - Get current active state for this Thread
 *
 * RETURN:      Pointer to the current walk state
 *
@@ -462,7 +462,7 @@ struct acpi_walk_state *acpi_ds_get_current_walk_state(struct acpi_thread_state
 * FUNCTION:    acpi_ds_push_walk_state
 *
 * PARAMETERS:  walk_state      - State to push
- *              Thread          - Thread state object
+ *              thread          - Thread state object
 *
 * RETURN:      None
 *
@@ -486,7 +486,7 @@ acpi_ds_push_walk_state(struct acpi_walk_state *walk_state,
 *
 * FUNCTION:    acpi_ds_pop_walk_state
 *
- * PARAMETERS:  Thread      - Current thread state
+ * PARAMETERS:  thread      - Current thread state
 *
 * RETURN:      A walk_state object popped from the thread's stack
 *
@@ -525,9 +525,9 @@ struct acpi_walk_state *acpi_ds_pop_walk_state(struct acpi_thread_state *thread)
 * FUNCTION:    acpi_ds_create_walk_state
 *
 * PARAMETERS:  owner_id        - ID for object creation
- *              Origin          - Starting point for this walk
+ *              origin          - Starting point for this walk
 *              method_desc     - Method object
- *              Thread          - Current thread state
+ *              thread          - Current thread state
 *
 * RETURN:      Pointer to the new walk state.
 *
@@ -578,11 +578,11 @@ struct acpi_walk_state *acpi_ds_create_walk_state(acpi_owner_id owner_id, union
 * FUNCTION:    acpi_ds_init_aml_walk
 *
 * PARAMETERS:  walk_state      - New state to be initialized
- *              Op              - Current parse op
+ *              op              - Current parse op
 *              method_node     - Control method NS node, if any
 *              aml_start       - Start of AML
 *              aml_length      - Length of AML
- *              Info            - Method info block (params, etc.)
+ *              info            - Method info block (params, etc.)
 *              pass_number     - 1, 2, or 3
 *
 * RETURN:      Status
diff --git a/drivers/acpi/acpica/evevent.c b/drivers/acpi/acpica/evevent.c
index 07e4dc44f81c..d4acfbbe5b29 100644
--- a/drivers/acpi/acpica/evevent.c
+++ b/drivers/acpi/acpica/evevent.c
@@ -251,7 +251,7 @@ u32 acpi_ev_fixed_event_detect(void)
 *
 * FUNCTION:    acpi_ev_fixed_event_dispatch
 *
- * PARAMETERS:  Event               - Event type
+ * PARAMETERS:  event               - Event type
 *
 * RETURN:      INTERRUPT_HANDLED or INTERRUPT_NOT_HANDLED
 *
diff --git a/drivers/acpi/acpica/evglock.c b/drivers/acpi/acpica/evglock.c
index cfeab38795d8..af14a7137632 100644
--- a/drivers/acpi/acpica/evglock.c
+++ b/drivers/acpi/acpica/evglock.c
@@ -135,7 +135,7 @@ acpi_status acpi_ev_remove_global_lock_handler(void)
 *
 * FUNCTION:    acpi_ev_global_lock_handler
 *
- * PARAMETERS:  Context         - From thread interface, not used
+ * PARAMETERS:  context         - From thread interface, not used
 *
 * RETURN:      ACPI_INTERRUPT_HANDLED
 *
@@ -182,7 +182,7 @@ static u32 acpi_ev_global_lock_handler(void *context)
 *
 * FUNCTION:    acpi_ev_acquire_global_lock
 *
- * PARAMETERS:  Timeout         - Max time to wait for the lock, in millisec.
+ * PARAMETERS:  timeout         - Max time to wait for the lock, in millisec.
 *
 * RETURN:      Status
 *
diff --git a/drivers/acpi/acpica/evgpe.c b/drivers/acpi/acpica/evgpe.c
index 8ba0e5f17091..afbd5cb391f6 100644
--- a/drivers/acpi/acpica/evgpe.c
+++ b/drivers/acpi/acpica/evgpe.c
@@ -466,7 +466,7 @@ static void ACPI_SYSTEM_XFACE acpi_ev_asynch_execute_gpe_method(void *context)
        acpi_status status;
        struct acpi_gpe_event_info *local_gpe_event_info;
        struct acpi_evaluate_info *info;
-        struct acpi_gpe_notify_object *notify_object;
+        struct acpi_gpe_notify_info *notify;
        ACPI_FUNCTION_TRACE(ev_asynch_execute_gpe_method);
@@ -517,17 +517,17 @@ static void ACPI_SYSTEM_XFACE acpi_ev_asynch_execute_gpe_method(void *context)
                 * completes. The notify handlers are NOT invoked synchronously
                 * from this thread -- because handlers may in turn run other
                 * control methods.
+                 *
+                 * June 2012: Expand implicit notify mechanism to support
+                 * notifies on multiple device objects.
                 */
-                status = acpi_ev_queue_notify_request(
+                notify = local_gpe_event_info->dispatch.notify_list;
-                                local_gpe_event_info->dispatch.device.node,
+                while (ACPI_SUCCESS(status) && notify) {
-                                ACPI_NOTIFY_DEVICE_WAKE);
+                        status =
+                            acpi_ev_queue_notify_request(notify->device_node,
-                notify_object = local_gpe_event_info->dispatch.device.next;
+                                                         ACPI_NOTIFY_DEVICE_WAKE);
-                while (ACPI_SUCCESS(status) && notify_object) {
-                        status = acpi_ev_queue_notify_request(
+                        notify = notify->next;
-                                        notify_object->node,
-                                        ACPI_NOTIFY_DEVICE_WAKE);
-                        notify_object = notify_object->next;
                }
                break;
diff --git a/drivers/acpi/acpica/evgpeblk.c b/drivers/acpi/acpica/evgpeblk.c
index 23a3ca86b2eb..8cf4c104c7b7 100644
--- a/drivers/acpi/acpica/evgpeblk.c
+++ b/drivers/acpi/acpica/evgpeblk.c
@@ -318,7 +318,7 @@ acpi_ev_create_gpe_info_blocks(struct acpi_gpe_block_info *gpe_block)
 * FUNCTION:    acpi_ev_create_gpe_block
 *
 * PARAMETERS:  gpe_device          - Handle to the parent GPE block
- *              gpe_block_address   - Address and space_iD
+ *              gpe_block_address   - Address and space_ID
 *              register_count      - Number of GPE register pairs in the block
 *              gpe_block_base_number - Starting GPE number for the block
 *              interrupt_number    - H/W interrupt for the block
diff --git a/drivers/acpi/acpica/evgpeutil.c b/drivers/acpi/acpica/evgpeutil.c
index 3c43796b8361..cb50dd91bc18 100644
--- a/drivers/acpi/acpica/evgpeutil.c
+++ b/drivers/acpi/acpica/evgpeutil.c
@@ -54,7 +54,7 @@ ACPI_MODULE_NAME("evgpeutil")
 * FUNCTION:    acpi_ev_walk_gpe_list
 *
 * PARAMETERS:  gpe_walk_callback   - Routine called for each GPE block
- *              Context             - Value passed to callback
+ *              context             - Value passed to callback
 *
 * RETURN:      Status
 *
@@ -347,6 +347,8 @@ acpi_ev_delete_gpe_handlers(struct acpi_gpe_xrupt_info *gpe_xrupt_info,
                            void *context)
 {
        struct acpi_gpe_event_info *gpe_event_info;
+        struct acpi_gpe_notify_info *notify;
+        struct acpi_gpe_notify_info *next;
        u32 i;
        u32 j;
@@ -365,10 +367,28 @@ acpi_ev_delete_gpe_handlers(struct acpi_gpe_xrupt_info *gpe_xrupt_info,
                        if ((gpe_event_info->flags & ACPI_GPE_DISPATCH_MASK) ==
                            ACPI_GPE_DISPATCH_HANDLER) {
+                                /* Delete an installed handler block */
                                ACPI_FREE(gpe_event_info->dispatch.handler);
                                gpe_event_info->dispatch.handler = NULL;
                                gpe_event_info->flags &=
                                    ~ACPI_GPE_DISPATCH_MASK;
+                        } else if ((gpe_event_info->
+                                 flags & ACPI_GPE_DISPATCH_MASK) ==
+                                ACPI_GPE_DISPATCH_NOTIFY) {
+                                /* Delete the implicit notification device list */
+                                notify = gpe_event_info->dispatch.notify_list;
+                                while (notify) {
+                                        next = notify->next;
+                                        ACPI_FREE(notify);
+                                        notify = next;
+                                }
+                                gpe_event_info->dispatch.notify_list = NULL;
+                                gpe_event_info->flags &=
+                                    ~ACPI_GPE_DISPATCH_MASK;
                        }
                }
        }
diff --git a/drivers/acpi/acpica/evmisc.c b/drivers/acpi/acpica/evmisc.c
index 51ef9f5e002d..51f537937c1f 100644
--- a/drivers/acpi/acpica/evmisc.c
+++ b/drivers/acpi/acpica/evmisc.c
@@ -56,7 +56,7 @@ static void ACPI_SYSTEM_XFACE acpi_ev_notify_dispatch(void *context);
 *
 * FUNCTION:    acpi_ev_is_notify_object
 *
- * PARAMETERS:  Node            - Node to check
+ * PARAMETERS:  node            - Node to check
 *
 * RETURN:      TRUE if notifies allowed on this object
 *
@@ -86,7 +86,7 @@ u8 acpi_ev_is_notify_object(struct acpi_namespace_node *node)
 *
 * FUNCTION:    acpi_ev_queue_notify_request
 *
- * PARAMETERS:  Node            - NS node for the notified object
+ * PARAMETERS:  node            - NS node for the notified object
 *              notify_value    - Value from the Notify() request
 *
 * RETURN:      Status
@@ -101,102 +101,77 @@ acpi_ev_queue_notify_request(struct acpi_namespace_node * node,
                             u32 notify_value)
 {
        union acpi_operand_object *obj_desc;
-        union acpi_operand_object *handler_obj = NULL;
+        union acpi_operand_object *handler_list_head = NULL;
-        union acpi_generic_state *notify_info;
+        union acpi_generic_state *info;
+        u8 handler_list_id = 0;
        acpi_status status = AE_OK;
        ACPI_FUNCTION_NAME(ev_queue_notify_request);
-        /*
+        /* Are Notifies allowed on this object? */
-         * For value 0x03 (Ejection Request), may need to run a device method.
-         * For value 0x02 (Device Wake), if _PRW exists, may need to run
-         *   the _PS0 method.
-         * For value 0x80 (Status Change) on the power button or sleep button,
-         *   initiate soft-off or sleep operation.
-         *
-         * For all cases, simply dispatch the notify to the handler.
-         */
-        ACPI_DEBUG_PRINT((ACPI_DB_INFO,
-                          "Dispatching Notify on [%4.4s] (%s) Value 0x%2.2X (%s) Node %p\n",
-                          acpi_ut_get_node_name(node),
-                          acpi_ut_get_type_name(node->type), notify_value,
-                          acpi_ut_get_notify_name(notify_value), node));
-        /* Get the notify object attached to the NS Node */
+        if (!acpi_ev_is_notify_object(node)) {
+                return (AE_TYPE);
-        obj_desc = acpi_ns_get_attached_object(node);
+        }
-        if (obj_desc) {
-                /* We have the notify object, Get the correct handler */
-                switch (node->type) {
-                        /* Notify is allowed only on these types */
+        /* Get the correct notify list type (System or Device) */
-                case ACPI_TYPE_DEVICE:
+        if (notify_value <= ACPI_MAX_SYS_NOTIFY) {
-                case ACPI_TYPE_THERMAL:
+                handler_list_id = ACPI_SYSTEM_HANDLER_LIST;
-                case ACPI_TYPE_PROCESSOR:
+        } else {
+                handler_list_id = ACPI_DEVICE_HANDLER_LIST;
+        }
-                        if (notify_value <= ACPI_MAX_SYS_NOTIFY) {
+        /* Get the notify object attached to the namespace Node */
-                                handler_obj =
-                                    obj_desc->common_notify.system_notify;
-                        } else {
-                                handler_obj =
-                                    obj_desc->common_notify.device_notify;
-                        }
-                        break;
-                default:
+        obj_desc = acpi_ns_get_attached_object(node);
+        if (obj_desc) {
-                        /* All other types are not supported */
+                /* We have an attached object, Get the correct handler list */
-                        return (AE_TYPE);
+                handler_list_head =
-                }
+                    obj_desc->common_notify.notify_list[handler_list_id];
        }
        /*
-         * If there is a handler to run, schedule the dispatcher.
+         * If there is no notify handler (Global or Local)
-         * Check for:
+         * for this object, just ignore the notify
-         * 1) Global system notify handler
-         * 2) Global device notify handler
-         * 3) Per-device notify handler
         */
-        if ((acpi_gbl_system_notify.handler &&
+        if (!acpi_gbl_global_notify[handler_list_id].handler
-             (notify_value <= ACPI_MAX_SYS_NOTIFY)) ||
+            && !handler_list_head) {
-            (acpi_gbl_device_notify.handler &&
+                ACPI_DEBUG_PRINT((ACPI_DB_INFO,
-             (notify_value > ACPI_MAX_SYS_NOTIFY)) || handler_obj) {
+                                  "No notify handler for Notify, ignoring (%4.4s, %X) node %p\n",
-                notify_info = acpi_ut_create_generic_state();
+                                  acpi_ut_get_node_name(node), notify_value,
-                if (!notify_info) {
+                                  node));
-                        return (AE_NO_MEMORY);
-                }
-                if (!handler_obj) {
+                return (AE_OK);
-                        ACPI_DEBUG_PRINT((ACPI_DB_INFO,
+        }
-                                          "Executing system notify handler for Notify (%4.4s, %X) "
-                                          "node %p\n",
-                                          acpi_ut_get_node_name(node),
-                                          notify_value, node));
-                }
-                notify_info->common.descriptor_type =
+        /* Setup notify info and schedule the notify dispatcher */
-                    ACPI_DESC_TYPE_STATE_NOTIFY;
-                notify_info->notify.node = node;
-                notify_info->notify.value = (u16) notify_value;
-                notify_info->notify.handler_obj = handler_obj;
-                status =
+        info = acpi_ut_create_generic_state();
-                    acpi_os_execute(OSL_NOTIFY_HANDLER, acpi_ev_notify_dispatch,
+        if (!info) {
-                                    notify_info);
+                return (AE_NO_MEMORY);
-                if (ACPI_FAILURE(status)) {
+        }
-                        acpi_ut_delete_generic_state(notify_info);
-                }
-        } else {
-                /* There is no notify handler (per-device or system) for this device */
-                ACPI_DEBUG_PRINT((ACPI_DB_INFO,
+        info->common.descriptor_type = ACPI_DESC_TYPE_STATE_NOTIFY;
-                                  "No notify handler for Notify (%4.4s, %X) node %p\n",
-                                  acpi_ut_get_node_name(node), notify_value,
+        info->notify.node = node;
-                                  node));
+        info->notify.value = (u16)notify_value;
+        info->notify.handler_list_id = handler_list_id;
+        info->notify.handler_list_head = handler_list_head;
+        info->notify.global = &acpi_gbl_global_notify[handler_list_id];
+        ACPI_DEBUG_PRINT((ACPI_DB_INFO,
+                          "Dispatching Notify on [%4.4s] (%s) Value 0x%2.2X (%s) Node %p\n",
+                          acpi_ut_get_node_name(node),
+                          acpi_ut_get_type_name(node->type), notify_value,
+                          acpi_ut_get_notify_name(notify_value), node));
+        status = acpi_os_execute(OSL_NOTIFY_HANDLER, acpi_ev_notify_dispatch,
+                                 info);
+        if (ACPI_FAILURE(status)) {
+                acpi_ut_delete_generic_state(info);
        }
        return (status);
@@ -206,7 +181,7 @@ acpi_ev_queue_notify_request(struct acpi_namespace_node * node,
 *
 * FUNCTION:    acpi_ev_notify_dispatch
 *
- * PARAMETERS:  Context         - To be passed to the notify handler
+ * PARAMETERS:  context         - To be passed to the notify handler
 *
 * RETURN:      None.
 *
@@ -217,60 +192,34 @@ acpi_ev_queue_notify_request(struct acpi_namespace_node * node,
 static void ACPI_SYSTEM_XFACE acpi_ev_notify_dispatch(void *context)
 {
-        union acpi_generic_state *notify_info =
+        union acpi_generic_state *info = (union acpi_generic_state *)context;
-            (union acpi_generic_state *)context;
-        acpi_notify_handler global_handler = NULL;
-        void *global_context = NULL;
        union acpi_operand_object *handler_obj;
        ACPI_FUNCTION_ENTRY();
-        /*
+        /* Invoke a global notify handler if installed */
-         * We will invoke a global notify handler if installed. This is done
-         * _before_ we invoke the per-device handler attached to the device.
-         */
-        if (notify_info->notify.value <= ACPI_MAX_SYS_NOTIFY) {
-                /* Global system notification handler */
-                if (acpi_gbl_system_notify.handler) {
-                        global_handler = acpi_gbl_system_notify.handler;
-                        global_context = acpi_gbl_system_notify.context;
-                }
-        } else {
-                /* Global driver notification handler */
-                if (acpi_gbl_device_notify.handler) {
-                        global_handler = acpi_gbl_device_notify.handler;
-                        global_context = acpi_gbl_device_notify.context;
-                }
-        }
-        /* Invoke the system handler first, if present */
-        if (global_handler) {
+        if (info->notify.global->handler) {
-                global_handler(notify_info->notify.node,
+                info->notify.global->handler(info->notify.node,
-                               notify_info->notify.value, global_context);
+                                             info->notify.value,
+                                             info->notify.global->context);
        }
-        /* Now invoke the per-device handler, if present */
+        /* Now invoke the local notify handler(s) if any are installed */
-        handler_obj = notify_info->notify.handler_obj;
+        handler_obj = info->notify.handler_list_head;
-        if (handler_obj) {
+        while (handler_obj) {
-                struct acpi_object_notify_handler *notifier;
+                handler_obj->notify.handler(info->notify.node,
+                                            info->notify.value,
+                                            handler_obj->notify.context);
-                notifier = &handler_obj->notify;
+                handler_obj =
-                while (notifier) {
+                    handler_obj->notify.next[info->notify.handler_list_id];
-                        notifier->handler(notify_info->notify.node,
-                                          notify_info->notify.value,
-                                          notifier->context);
-                        notifier = notifier->next;
-                }
        }
        /* All done with the info object */
-        acpi_ut_delete_generic_state(notify_info);
+        acpi_ut_delete_generic_state(info);
 }
 #if (!ACPI_REDUCED_HARDWARE)
diff --git a/drivers/acpi/acpica/evregion.c b/drivers/acpi/acpica/evregion.c
index 1b0180a1b798..0cc6a16fedc7 100644
--- a/drivers/acpi/acpica/evregion.c
+++ b/drivers/acpi/acpica/evregion.c
@@ -150,7 +150,7 @@ acpi_status acpi_ev_install_region_handlers(void)
 *
 * FUNCTION:    acpi_ev_has_default_handler
 *
- * PARAMETERS:  Node                - Namespace node for the device
+ * PARAMETERS:  node                - Namespace node for the device
 *              space_id            - The address space ID
 *
 * RETURN:      TRUE if default handler is installed, FALSE otherwise
@@ -244,7 +244,7 @@ acpi_status acpi_ev_initialize_op_regions(void)
 * FUNCTION:    acpi_ev_execute_reg_method
 *
 * PARAMETERS:  region_obj          - Region object
- *              Function            - Passed to _REG: On (1) or Off (0)
+ *              function            - Passed to _REG: On (1) or Off (0)
 *
 * RETURN:      Status
 *
@@ -286,10 +286,10 @@ acpi_ev_execute_reg_method(union acpi_operand_object *region_obj, u32 function)
        /*
         * The _REG method has two arguments:
         *
-         * Arg0 - Integer:
+         * arg0 - Integer:
         *  Operation region space ID Same value as region_obj->Region.space_id
         *
-         * Arg1 - Integer:
+         * arg1 - Integer:
         *  connection status 1 for connecting the handler, 0 for disconnecting
         *  the handler (Passed as a parameter)
         */
@@ -330,10 +330,10 @@ acpi_ev_execute_reg_method(union acpi_operand_object *region_obj, u32 function)
 *
 * PARAMETERS:  region_obj          - Internal region object
 *              field_obj           - Corresponding field. Can be NULL.
- *              Function            - Read or Write operation
+ *              function            - Read or Write operation
 *              region_offset       - Where in the region to read or write
 *              bit_width           - Field width in bits (8, 16, 32, or 64)
- *              Value               - Pointer to in or out value, must be
+ *              value               - Pointer to in or out value, must be
 *                                    a full 64-bit integer
 *
 * RETURN:      Status
@@ -840,11 +840,11 @@ acpi_ev_install_handler(acpi_handle obj_handle,
 *
 * FUNCTION:    acpi_ev_install_space_handler
 *
- * PARAMETERS:  Node            - Namespace node for the device
+ * PARAMETERS:  node            - Namespace node for the device
 *              space_id        - The address space ID
- *              Handler         - Address of the handler
+ *              handler         - Address of the handler
- *              Setup           - Address of the setup function
+ *              setup           - Address of the setup function
- *              Context         - Value passed to the handler on each access
+ *              context         - Value passed to the handler on each access
 *
 * RETURN:      Status
 *
@@ -1061,7 +1061,7 @@ acpi_ev_install_space_handler(struct acpi_namespace_node * node,
 *
 * FUNCTION:    acpi_ev_execute_reg_methods
 *
- * PARAMETERS:  Node            - Namespace node for the device
+ * PARAMETERS:  node            - Namespace node for the device
 *              space_id        - The address space ID
 *
 * RETURN:      Status
@@ -1104,7 +1104,7 @@ acpi_ev_execute_reg_methods(struct acpi_namespace_node *node,
 *
 * PARAMETERS:  walk_namespace callback
 *
- * DESCRIPTION: Run _REG method for region objects of the requested space_iD
+ * DESCRIPTION: Run _REG method for region objects of the requested spaceID
 *
 ******************************************************************************/
diff --git a/drivers/acpi/acpica/evrgnini.c b/drivers/acpi/acpica/evrgnini.c
index 819c17f5897a..4c1c8261166f 100644
--- a/drivers/acpi/acpica/evrgnini.c
+++ b/drivers/acpi/acpica/evrgnini.c
@@ -56,8 +56,8 @@ static u8 acpi_ev_is_pci_root_bridge(struct acpi_namespace_node *node);
 *
 * FUNCTION:    acpi_ev_system_memory_region_setup
 *
- * PARAMETERS:  Handle              - Region we are interested in
+ * PARAMETERS:  handle              - Region we are interested in
- *              Function            - Start or stop
+ *              function            - Start or stop
 *              handler_context     - Address space handler context
 *              region_context      - Region specific context
 *
@@ -118,8 +118,8 @@ acpi_ev_system_memory_region_setup(acpi_handle handle,
 *
 * FUNCTION:    acpi_ev_io_space_region_setup
 *
- * PARAMETERS:  Handle              - Region we are interested in
+ * PARAMETERS:  handle              - Region we are interested in
- *              Function            - Start or stop
+ *              function            - Start or stop
 *              handler_context     - Address space handler context
 *              region_context      - Region specific context
 *
@@ -149,8 +149,8 @@ acpi_ev_io_space_region_setup(acpi_handle handle,
 *
 * FUNCTION:    acpi_ev_pci_config_region_setup
 *
- * PARAMETERS:  Handle              - Region we are interested in
+ * PARAMETERS:  handle              - Region we are interested in
- *              Function            - Start or stop
+ *              function            - Start or stop
 *              handler_context     - Address space handler context
 *              region_context      - Region specific context
 *
@@ -338,7 +338,7 @@ acpi_ev_pci_config_region_setup(acpi_handle handle,
 *
 * FUNCTION:    acpi_ev_is_pci_root_bridge
 *
- * PARAMETERS:  Node            - Device node being examined
+ * PARAMETERS:  node            - Device node being examined
 *
 * RETURN:      TRUE if device is a PCI/PCI-Express Root Bridge
 *
@@ -393,14 +393,14 @@ static u8 acpi_ev_is_pci_root_bridge(struct acpi_namespace_node *node)
 *
 * FUNCTION:    acpi_ev_pci_bar_region_setup
 *
- * PARAMETERS:  Handle              - Region we are interested in
+ * PARAMETERS:  handle              - Region we are interested in
- *              Function            - Start or stop
+ *              function            - Start or stop
 *              handler_context     - Address space handler context
 *              region_context      - Region specific context
 *
 * RETURN:      Status
 *
- * DESCRIPTION: Setup a pci_bAR operation region
+ * DESCRIPTION: Setup a pci_BAR operation region
 *
 * MUTEX:       Assumes namespace is not locked
 *
@@ -420,8 +420,8 @@ acpi_ev_pci_bar_region_setup(acpi_handle handle,
 *
 * FUNCTION:    acpi_ev_cmos_region_setup
 *
- * PARAMETERS:  Handle              - Region we are interested in
+ * PARAMETERS:  handle              - Region we are interested in
- *              Function            - Start or stop
+ *              function            - Start or stop
 *              handler_context     - Address space handler context
 *              region_context      - Region specific context
 *
@@ -447,8 +447,8 @@ acpi_ev_cmos_region_setup(acpi_handle handle,
 *
 * FUNCTION:    acpi_ev_default_region_setup
 *
- * PARAMETERS:  Handle              - Region we are interested in
+ * PARAMETERS:  handle              - Region we are interested in
- *              Function            - Start or stop
+ *              function            - Start or stop
 *              handler_context     - Address space handler context
 *              region_context      - Region specific context
 *
diff --git a/drivers/acpi/acpica/evsci.c b/drivers/acpi/acpica/evsci.c
index 6a57aa2d70d1..f9661e2b46a9 100644
--- a/drivers/acpi/acpica/evsci.c
+++ b/drivers/acpi/acpica/evsci.c
@@ -56,7 +56,7 @@ static u32 ACPI_SYSTEM_XFACE acpi_ev_sci_xrupt_handler(void *context);
 *
 * FUNCTION:    acpi_ev_sci_xrupt_handler
 *
- * PARAMETERS:  Context   - Calling Context
+ * PARAMETERS:  context   - Calling Context
 *
 * RETURN:      Status code indicates whether interrupt was handled.
 *
@@ -96,7 +96,7 @@ static u32 ACPI_SYSTEM_XFACE acpi_ev_sci_xrupt_handler(void *context)
 *
 * FUNCTION:    acpi_ev_gpe_xrupt_handler
 *
- * PARAMETERS:  Context   - Calling Context
+ * PARAMETERS:  context   - Calling Context
 *
 * RETURN:      Status code indicates whether interrupt was handled.
 *
diff --git a/drivers/acpi/acpica/evxface.c b/drivers/acpi/acpica/evxface.c
index 44bef5744ebb..7587eb6c9584 100644
--- a/drivers/acpi/acpica/evxface.c
+++ b/drivers/acpi/acpica/evxface.c
@@ -54,86 +54,25 @@ ACPI_MODULE_NAME("evxface")
 /*******************************************************************************
 *
- * FUNCTION:    acpi_populate_handler_object
- *
- * PARAMETERS:  handler_obj        - Handler object to populate
- *              handler_type       - The type of handler:
- *                                  ACPI_SYSTEM_NOTIFY: system_handler (00-7f)
- *                                  ACPI_DEVICE_NOTIFY: driver_handler (80-ff)
- *                                  ACPI_ALL_NOTIFY:  both system and device
- *              handler            - Address of the handler
- *              context            - Value passed to the handler on each GPE
- *              next               - Address of a handler object to link to
- *
- * RETURN:      None
- *
- * DESCRIPTION: Populate a handler object.
- *
- ******************************************************************************/
-static void
-acpi_populate_handler_object(struct acpi_object_notify_handler *handler_obj,
-                             u32 handler_type,
-                             acpi_notify_handler handler, void *context,
-                             struct acpi_object_notify_handler *next)
-{
-        handler_obj->handler_type = handler_type;
-        handler_obj->handler = handler;
-        handler_obj->context = context;
-        handler_obj->next = next;
-}
-/*******************************************************************************
- *
- * FUNCTION:    acpi_add_handler_object
- *
- * PARAMETERS:  parent_obj         - Parent of the new object
- *              handler            - Address of the handler
- *              context            - Value passed to the handler on each GPE
- *
- * RETURN:      Status
- *
- * DESCRIPTION: Create a new handler object and populate it.
- *
- ******************************************************************************/
-static acpi_status
-acpi_add_handler_object(struct acpi_object_notify_handler *parent_obj,
-                        acpi_notify_handler handler, void *context)
-{
-        struct acpi_object_notify_handler *handler_obj;
-        /* The parent must not be a defice notify handler object. */
-        if (parent_obj->handler_type & ACPI_DEVICE_NOTIFY)
-                return AE_BAD_PARAMETER;
-        handler_obj = ACPI_ALLOCATE_ZEROED(sizeof(*handler_obj));
-        if (!handler_obj)
-                return AE_NO_MEMORY;
-        acpi_populate_handler_object(handler_obj,
-                                        ACPI_SYSTEM_NOTIFY,
-                                        handler, context,
-                                        parent_obj->next);
-        parent_obj->next = handler_obj;
-        return AE_OK;
-}
-/*******************************************************************************
- *
 * FUNCTION:    acpi_install_notify_handler
 *
 * PARAMETERS:  Device          - The device for which notifies will be handled
 *              handler_type    - The type of handler:
- *                                  ACPI_SYSTEM_NOTIFY: system_handler (00-7f)
+ *                                  ACPI_SYSTEM_NOTIFY: System Handler (00-7F)
- *                                  ACPI_DEVICE_NOTIFY: driver_handler (80-ff)
+ *                                  ACPI_DEVICE_NOTIFY: Device Handler (80-FF)
- *                                  ACPI_ALL_NOTIFY:  both system and device
+ *                                  ACPI_ALL_NOTIFY:    Both System and Device
 *              Handler         - Address of the handler
 *              Context         - Value passed to the handler on each GPE
 *
 * RETURN:      Status
 *
- * DESCRIPTION: Install a handler for notifies on an ACPI device
+ * DESCRIPTION: Install a handler for notifications on an ACPI Device,
+ *              thermal_zone, or Processor object.
+ *
+ * NOTES:       The Root namespace object may have only one handler for each
+ *              type of notify (System/Device). Device/Thermal/Processor objects
+ *              may have one device notify handler, and multiple system notify
+ *              handlers.
 *
 ******************************************************************************/
 acpi_status
@@ -141,17 +80,19 @@ acpi_install_notify_handler(acpi_handle device,
                            u32 handler_type,
                            acpi_notify_handler handler, void *context)
 {
+        struct acpi_namespace_node *node =
+            ACPI_CAST_PTR(struct acpi_namespace_node, device);
        union acpi_operand_object *obj_desc;
-        union acpi_operand_object *notify_obj;
+        union acpi_operand_object *handler_obj;
-        struct acpi_namespace_node *node;
        acpi_status status;
+        u32 i;
        ACPI_FUNCTION_TRACE(acpi_install_notify_handler);
        /* Parameter validation */
-        if ((!device) ||
+        if ((!device) || (!handler) || (!handler_type) ||
-            (!handler) || (handler_type > ACPI_MAX_NOTIFY_HANDLER_TYPE)) {
+            (handler_type > ACPI_MAX_NOTIFY_HANDLER_TYPE)) {
                return_ACPI_STATUS(AE_BAD_PARAMETER);
        }
@@ -160,144 +101,112 @@ acpi_install_notify_handler(acpi_handle device,
                return_ACPI_STATUS(status);
        }
-        /* Convert and validate the device handle */
-        node = acpi_ns_validate_handle(device);
-        if (!node) {
-                status = AE_BAD_PARAMETER;
-                goto unlock_and_exit;
-        }
        /*
         * Root Object:
         * Registering a notify handler on the root object indicates that the
         * caller wishes to receive notifications for all objects. Note that
-         * only one <external> global handler can be regsitered (per notify type).
+         * only one global handler can be registered per notify type.
+         * Ensure that a handler is not already installed.
         */
        if (device == ACPI_ROOT_OBJECT) {
+                for (i = 0; i < ACPI_NUM_NOTIFY_TYPES; i++) {
+                        if (handler_type & (i + 1)) {
+                                if (acpi_gbl_global_notify[i].handler) {
+                                        status = AE_ALREADY_EXISTS;
+                                        goto unlock_and_exit;
+                                }
-                /* Make sure the handler is not already installed */
+                                acpi_gbl_global_notify[i].handler = handler;
+                                acpi_gbl_global_notify[i].context = context;
-                if (((handler_type & ACPI_SYSTEM_NOTIFY) &&
+                        }
-                     acpi_gbl_system_notify.handler) ||
-                    ((handler_type & ACPI_DEVICE_NOTIFY) &&
-                     acpi_gbl_device_notify.handler)) {
-                        status = AE_ALREADY_EXISTS;
-                        goto unlock_and_exit;
-                }
-                if (handler_type & ACPI_SYSTEM_NOTIFY) {
-                        acpi_gbl_system_notify.node = node;
-                        acpi_gbl_system_notify.handler = handler;
-                        acpi_gbl_system_notify.context = context;
-                }
-                if (handler_type & ACPI_DEVICE_NOTIFY) {
-                        acpi_gbl_device_notify.node = node;
-                        acpi_gbl_device_notify.handler = handler;
-                        acpi_gbl_device_notify.context = context;
                }
-                /* Global notify handler installed */
+                goto unlock_and_exit;   /* Global notify handler installed, all done */
        }
        /*
         * All Other Objects:
-         * Caller will only receive notifications specific to the target object.
+         * Caller will only receive notifications specific to the target
-         * Note that only certain object types can receive notifications.
+         * object. Note that only certain object types are allowed to
+         * receive notifications.
         */
-        else {
-                /* Notifies allowed on this object? */
-                if (!acpi_ev_is_notify_object(node)) {
+        /* Are Notifies allowed on this object? */
-                        status = AE_TYPE;
-                        goto unlock_and_exit;
-                }
-                /* Check for an existing internal object */
+        if (!acpi_ev_is_notify_object(node)) {
+                status = AE_TYPE;
+                goto unlock_and_exit;
+        }
-                obj_desc = acpi_ns_get_attached_object(node);
+        /* Check for an existing internal object, might not exist */
-                if (obj_desc) {
-                        /* Object exists. */
+        obj_desc = acpi_ns_get_attached_object(node);
+        if (!obj_desc) {
-                        /* For a device notify, make sure there's no handler. */
+                /* Create a new object */
-                        if ((handler_type & ACPI_DEVICE_NOTIFY) &&
-                             obj_desc->common_notify.device_notify) {
-                                status = AE_ALREADY_EXISTS;
-                                goto unlock_and_exit;
-                        }
-                        /* System notifies may have more handlers installed. */
+                obj_desc = acpi_ut_create_internal_object(node->type);
-                        notify_obj = obj_desc->common_notify.system_notify;
+                if (!obj_desc) {
+                        status = AE_NO_MEMORY;
+                        goto unlock_and_exit;
+                }
-                        if ((handler_type & ACPI_SYSTEM_NOTIFY) && notify_obj) {
+                /* Attach new object to the Node, remove local reference */
-                                struct acpi_object_notify_handler *parent_obj;
+                status = acpi_ns_attach_object(device, obj_desc, node->type);
+                acpi_ut_remove_reference(obj_desc);
+                if (ACPI_FAILURE(status)) {
+                        goto unlock_and_exit;
+                }
+        }
-                                if (handler_type & ACPI_DEVICE_NOTIFY) {
+        /* Ensure that the handler is not already installed in the lists */
+        for (i = 0; i < ACPI_NUM_NOTIFY_TYPES; i++) {
+                if (handler_type & (i + 1)) {
+                        handler_obj = obj_desc->common_notify.notify_list[i];
+                        while (handler_obj) {
+                                if (handler_obj->notify.handler == handler) {
                                        status = AE_ALREADY_EXISTS;
                                        goto unlock_and_exit;
                                }
-                                parent_obj = &notify_obj->notify;
+                                handler_obj = handler_obj->notify.next[i];
-                                status = acpi_add_handler_object(parent_obj,
-                                                                 handler,
-                                                                 context);
-                                goto unlock_and_exit;
-                        }
-                } else {
-                        /* Create a new object */
-                        obj_desc = acpi_ut_create_internal_object(node->type);
-                        if (!obj_desc) {
-                                status = AE_NO_MEMORY;
-                                goto unlock_and_exit;
-                        }
-                        /* Attach new object to the Node */
-                        status =
-                            acpi_ns_attach_object(device, obj_desc, node->type);
-                        /* Remove local reference to the object */
-                        acpi_ut_remove_reference(obj_desc);
-                        if (ACPI_FAILURE(status)) {
-                                goto unlock_and_exit;
                        }
                }
+        }
-                /* Install the handler */
+        /* Create and populate a new notify handler object */
-                notify_obj =
+        handler_obj = acpi_ut_create_internal_object(ACPI_TYPE_LOCAL_NOTIFY);
-                    acpi_ut_create_internal_object(ACPI_TYPE_LOCAL_NOTIFY);
+        if (!handler_obj) {
-                if (!notify_obj) {
+                status = AE_NO_MEMORY;
-                        status = AE_NO_MEMORY;
+                goto unlock_and_exit;
-                        goto unlock_and_exit;
+        }
-                }
-                acpi_populate_handler_object(&notify_obj->notify,
+        handler_obj->notify.node = node;
-                                                handler_type,
+        handler_obj->notify.handler_type = handler_type;
-                                                handler, context,
+        handler_obj->notify.handler = handler;
-                                                NULL);
+        handler_obj->notify.context = context;
-                if (handler_type & ACPI_SYSTEM_NOTIFY) {
+        /* Install the handler at the list head(s) */
-                        obj_desc->common_notify.system_notify = notify_obj;
-                }
-                if (handler_type & ACPI_DEVICE_NOTIFY) {
+        for (i = 0; i < ACPI_NUM_NOTIFY_TYPES; i++) {
-                        obj_desc->common_notify.device_notify = notify_obj;
+                if (handler_type & (i + 1)) {
-                }
+                        handler_obj->notify.next[i] =
+                            obj_desc->common_notify.notify_list[i];
-                if (handler_type == ACPI_ALL_NOTIFY) {
+                        obj_desc->common_notify.notify_list[i] = handler_obj;
+                }
+        }
-                        /* Extra ref if installed in both */
+        /* Add an extra reference if handler was installed in both lists */
-                        acpi_ut_add_reference(notify_obj);
+        if (handler_type == ACPI_ALL_NOTIFY) {
-                }
+                acpi_ut_add_reference(handler_obj);
        }
-      unlock_and_exit:
+unlock_and_exit:
        (void)acpi_ut_release_mutex(ACPI_MTX_NAMESPACE);
        return_ACPI_STATUS(status);
 }
@@ -308,11 +217,11 @@ ACPI_EXPORT_SYMBOL(acpi_install_notify_handler)
 *
 * FUNCTION:    acpi_remove_notify_handler
 *
- * PARAMETERS:  Device          - The device for which notifies will be handled
+ * PARAMETERS:  Device          - The device for which the handler is installed
 *              handler_type    - The type of handler:
- *                                  ACPI_SYSTEM_NOTIFY: system_handler (00-7f)
+ *                                  ACPI_SYSTEM_NOTIFY: System Handler (00-7F)
- *                                  ACPI_DEVICE_NOTIFY: driver_handler (80-ff)
+ *                                  ACPI_DEVICE_NOTIFY: Device Handler (80-FF)
- *                                  ACPI_ALL_NOTIFY:  both system and device
+ *                                  ACPI_ALL_NOTIFY:    Both System and Device
 *              Handler         - Address of the handler
 *
 * RETURN:      Status
@@ -324,165 +233,106 @@ acpi_status
 acpi_remove_notify_handler(acpi_handle device,
                           u32 handler_type, acpi_notify_handler handler)
 {
-        union acpi_operand_object *notify_obj;
+        struct acpi_namespace_node *node =
+            ACPI_CAST_PTR(struct acpi_namespace_node, device);
        union acpi_operand_object *obj_desc;
-        struct acpi_namespace_node *node;
+        union acpi_operand_object *handler_obj;
+        union acpi_operand_object *previous_handler_obj;
        acpi_status status;
+        u32 i;
        ACPI_FUNCTION_TRACE(acpi_remove_notify_handler);
        /* Parameter validation */
-        if ((!device) ||
+        if ((!device) || (!handler) || (!handler_type) ||
-            (!handler) || (handler_type > ACPI_MAX_NOTIFY_HANDLER_TYPE)) {
+            (handler_type > ACPI_MAX_NOTIFY_HANDLER_TYPE)) {
-                status = AE_BAD_PARAMETER;
+                return_ACPI_STATUS(AE_BAD_PARAMETER);
-                goto exit;
        }
        /* Make sure all deferred tasks are completed */
-        acpi_os_wait_events_complete(NULL);
+        acpi_os_wait_events_complete();
        status = acpi_ut_acquire_mutex(ACPI_MTX_NAMESPACE);
        if (ACPI_FAILURE(status)) {
-                goto exit;
+                return_ACPI_STATUS(status);
-        }
-        /* Convert and validate the device handle */
-        node = acpi_ns_validate_handle(device);
-        if (!node) {
-                status = AE_BAD_PARAMETER;
-                goto unlock_and_exit;
        }
-        /* Root Object */
+        /* Root Object. Global handlers are removed here */
        if (device == ACPI_ROOT_OBJECT) {
-                ACPI_DEBUG_PRINT((ACPI_DB_INFO,
+                for (i = 0; i < ACPI_NUM_NOTIFY_TYPES; i++) {
-                                  "Removing notify handler for namespace root object\n"));
+                        if (handler_type & (i + 1)) {
+                                if (!acpi_gbl_global_notify[i].handler ||
+                                    (acpi_gbl_global_notify[i].handler !=
+                                     handler)) {
+                                        status = AE_NOT_EXIST;
+                                        goto unlock_and_exit;
+                                }
-                if (((handler_type & ACPI_SYSTEM_NOTIFY) &&
+                                ACPI_DEBUG_PRINT((ACPI_DB_INFO,
-                     !acpi_gbl_system_notify.handler) ||
+                                                  "Removing global notify handler\n"));
-                    ((handler_type & ACPI_DEVICE_NOTIFY) &&
-                     !acpi_gbl_device_notify.handler)) {
-                        status = AE_NOT_EXIST;
-                        goto unlock_and_exit;
-                }
-                if (handler_type & ACPI_SYSTEM_NOTIFY) {
+                                acpi_gbl_global_notify[i].handler = NULL;
-                        acpi_gbl_system_notify.node = NULL;
+                                acpi_gbl_global_notify[i].context = NULL;
-                        acpi_gbl_system_notify.handler = NULL;
+                        }
-                        acpi_gbl_system_notify.context = NULL;
                }
-                if (handler_type & ACPI_DEVICE_NOTIFY) {
+                goto unlock_and_exit;
-                        acpi_gbl_device_notify.node = NULL;
-                        acpi_gbl_device_notify.handler = NULL;
-                        acpi_gbl_device_notify.context = NULL;
-                }
        }
-        /* All Other Objects */
+        /* All other objects: Are Notifies allowed on this object? */
-        else {
+        if (!acpi_ev_is_notify_object(node)) {
-                /* Notifies allowed on this object? */
+                status = AE_TYPE;
+                goto unlock_and_exit;
+        }
-                if (!acpi_ev_is_notify_object(node)) {
+        /* Must have an existing internal object */
-                        status = AE_TYPE;
-                        goto unlock_and_exit;
-                }
-                /* Check for an existing internal object */
+        obj_desc = acpi_ns_get_attached_object(node);
+        if (!obj_desc) {
+                status = AE_NOT_EXIST;
+                goto unlock_and_exit;
+        }
-                obj_desc = acpi_ns_get_attached_object(node);
+        /* Internal object exists. Find the handler and remove it */
-                if (!obj_desc) {
-                        status = AE_NOT_EXIST;
-                        goto unlock_and_exit;
-                }
-                /* Object exists - make sure there's an existing handler */
+        for (i = 0; i < ACPI_NUM_NOTIFY_TYPES; i++) {
+                if (handler_type & (i + 1)) {
+                        handler_obj = obj_desc->common_notify.notify_list[i];
+                        previous_handler_obj = NULL;
-                if (handler_type & ACPI_SYSTEM_NOTIFY) {
+                        /* Attempt to find the handler in the handler list */
-                        struct acpi_object_notify_handler *handler_obj;
-                        struct acpi_object_notify_handler *parent_obj;
-                        notify_obj = obj_desc->common_notify.system_notify;
+                        while (handler_obj &&
-                        if (!notify_obj) {
+                               (handler_obj->notify.handler != handler)) {
-                                status = AE_NOT_EXIST;
+                                previous_handler_obj = handler_obj;
-                                goto unlock_and_exit;
+                                handler_obj = handler_obj->notify.next[i];
-                        }
-                        handler_obj = &notify_obj->notify;
-                        parent_obj = NULL;
-                        while (handler_obj->handler != handler) {
-                                if (handler_obj->next) {
-                                        parent_obj = handler_obj;
-                                        handler_obj = handler_obj->next;
-                                } else {
-                                        break;
-                                }
                        }
-                        if (handler_obj->handler != handler) {
+                        if (!handler_obj) {
-                                status = AE_BAD_PARAMETER;
+                                status = AE_NOT_EXIST;
                                goto unlock_and_exit;
                        }
-                        /*
+                        /* Remove the handler object from the list */
-                         * Remove the handler.  There are three possible cases.
-                         * First, we may need to remove a non-embedded object.
-                         * Second, we may need to remove the embedded object's
-                         * handler data, while non-embedded objects exist.
-                         * Finally, we may need to remove the embedded object
-                         * entirely along with its container.
-                         */
-                        if (parent_obj) {
-                                /* Non-embedded object is being removed. */
-                                parent_obj->next = handler_obj->next;
-                                ACPI_FREE(handler_obj);
-                        } else if (notify_obj->notify.next) {
-                                /*
-                                 * The handler matches the embedded object, but
-                                 * there are more handler objects in the list.
-                                 * Replace the embedded object's data with the
-                                 * first next object's data and remove that
-                                 * object.
-                                 */
-                                parent_obj = &notify_obj->notify;
-                                handler_obj = notify_obj->notify.next;
-                                *parent_obj = *handler_obj;
-                                ACPI_FREE(handler_obj);
-                        } else {
-                                /* No more handler objects in the list. */
-                                obj_desc->common_notify.system_notify = NULL;
-                                acpi_ut_remove_reference(notify_obj);
-                        }
-                }
-                if (handler_type & ACPI_DEVICE_NOTIFY) {
+                        if (previous_handler_obj) {     /* Handler is not at the list head */
-                        notify_obj = obj_desc->common_notify.device_notify;
+                                previous_handler_obj->notify.next[i] =
-                        if (!notify_obj) {
+                                    handler_obj->notify.next[i];
-                                status = AE_NOT_EXIST;
+                        } else {        /* Handler is at the list head */
-                                goto unlock_and_exit;
-                        }
-                        if (notify_obj->notify.handler != handler) {
+                                obj_desc->common_notify.notify_list[i] =
-                                status = AE_BAD_PARAMETER;
+                                    handler_obj->notify.next[i];
-                                goto unlock_and_exit;
                        }
-                        /* Remove the handler */
+                        acpi_ut_remove_reference(handler_obj);
-                        obj_desc->common_notify.device_notify = NULL;
-                        acpi_ut_remove_reference(notify_obj);
                }
        }
-      unlock_and_exit:
+unlock_and_exit:
        (void)acpi_ut_release_mutex(ACPI_MTX_NAMESPACE);
-      exit:
-        if (ACPI_FAILURE(status))
-                ACPI_EXCEPTION((AE_INFO, status, "Removing notify handler"));
        return_ACPI_STATUS(status);
 }
@@ -492,7 +342,7 @@ ACPI_EXPORT_SYMBOL(acpi_remove_notify_handler)
 *
 * FUNCTION:    acpi_install_exception_handler
 *
- * PARAMETERS:  Handler         - Pointer to the handler function for the
+ * PARAMETERS:  handler         - Pointer to the handler function for the
 *                                event
 *
 * RETURN:      Status
@@ -536,8 +386,8 @@ ACPI_EXPORT_SYMBOL(acpi_install_exception_handler)
 *
 * FUNCTION:    acpi_install_global_event_handler
 *
- * PARAMETERS:  Handler         - Pointer to the global event handler function
+ * PARAMETERS:  handler         - Pointer to the global event handler function
- *              Context         - Value passed to the handler on each event
+ *              context         - Value passed to the handler on each event
 *
 * RETURN:      Status
 *
@@ -586,10 +436,10 @@ ACPI_EXPORT_SYMBOL(acpi_install_global_event_handler)
 *
 * FUNCTION:    acpi_install_fixed_event_handler
 *
- * PARAMETERS:  Event           - Event type to enable.
+ * PARAMETERS:  event           - Event type to enable.
- *              Handler         - Pointer to the handler function for the
+ *              handler         - Pointer to the handler function for the
 *                                event
- *              Context         - Value passed to the handler on each GPE
+ *              context         - Value passed to the handler on each GPE
 *
 * RETURN:      Status
 *
@@ -656,8 +506,8 @@ ACPI_EXPORT_SYMBOL(acpi_install_fixed_event_handler)
 *
 * FUNCTION:    acpi_remove_fixed_event_handler
 *
- * PARAMETERS:  Event           - Event type to disable.
+ * PARAMETERS:  event           - Event type to disable.
- *              Handler         - Address of the handler
+ *              handler         - Address of the handler
 *
 * RETURN:      Status
 *
@@ -713,10 +563,10 @@ ACPI_EXPORT_SYMBOL(acpi_remove_fixed_event_handler)
 * PARAMETERS:  gpe_device      - Namespace node for the GPE (NULL for FADT
 *                                defined GPEs)
 *              gpe_number      - The GPE number within the GPE block
- *              Type            - Whether this GPE should be treated as an
+ *              type            - Whether this GPE should be treated as an
 *                                edge- or level-triggered interrupt.
- *              Address         - Address of the handler
+ *              address         - Address of the handler
- *              Context         - Value passed to the handler on each GPE
+ *              context         - Value passed to the handler on each GPE
 *
 * RETURN:      Status
 *
@@ -823,7 +673,7 @@ ACPI_EXPORT_SYMBOL(acpi_install_gpe_handler)
 * PARAMETERS:  gpe_device      - Namespace node for the GPE (NULL for FADT
 *                                defined GPEs)
 *              gpe_number      - The event to remove a handler
- *              Address         - Address of the handler
+ *              address         - Address of the handler
 *
 * RETURN:      Status
 *
@@ -849,7 +699,7 @@ acpi_remove_gpe_handler(acpi_handle gpe_device,
        /* Make sure all deferred tasks are completed */
-        acpi_os_wait_events_complete(NULL);
+        acpi_os_wait_events_complete();
        status = acpi_ut_acquire_mutex(ACPI_MTX_EVENTS);
        if (ACPI_FAILURE(status)) {
@@ -919,8 +769,8 @@ ACPI_EXPORT_SYMBOL(acpi_remove_gpe_handler)
 *
 * FUNCTION:    acpi_acquire_global_lock
 *
- * PARAMETERS:  Timeout         - How long the caller is willing to wait
+ * PARAMETERS:  timeout         - How long the caller is willing to wait
- *              Handle          - Where the handle to the lock is returned
+ *              handle          - Where the handle to the lock is returned
 *                                (if acquired)
 *
 * RETURN:      Status
@@ -967,7 +817,7 @@ ACPI_EXPORT_SYMBOL(acpi_acquire_global_lock)
 *
 * FUNCTION:    acpi_release_global_lock
 *
- * PARAMETERS:  Handle      - Returned from acpi_acquire_global_lock
+ * PARAMETERS:  handle      - Returned from acpi_acquire_global_lock
 *
 * RETURN:      Status
 *
diff --git a/drivers/acpi/acpica/evxfevnt.c b/drivers/acpi/acpica/evxfevnt.c
index 77cee5a5e891..35520c6eeefb 100644
--- a/drivers/acpi/acpica/evxfevnt.c
+++ b/drivers/acpi/acpica/evxfevnt.c
@@ -153,8 +153,8 @@ ACPI_EXPORT_SYMBOL(acpi_disable)
 *
 * FUNCTION:    acpi_enable_event
 *
- * PARAMETERS:  Event           - The fixed eventto be enabled
+ * PARAMETERS:  event           - The fixed eventto be enabled
- *              Flags           - Reserved
+ *              flags           - Reserved
 *
 * RETURN:      Status
 *
@@ -265,7 +265,7 @@ ACPI_EXPORT_SYMBOL(acpi_disable_event)
 *
 * FUNCTION:    acpi_clear_event
 *
- * PARAMETERS:  Event           - The fixed event to be cleared
+ * PARAMETERS:  event           - The fixed event to be cleared
 *
 * RETURN:      Status
 *
@@ -301,7 +301,7 @@ ACPI_EXPORT_SYMBOL(acpi_clear_event)
 *
 * FUNCTION:    acpi_get_event_status
 *
- * PARAMETERS:  Event           - The fixed event
+ * PARAMETERS:  event           - The fixed event
 *              event_status    - Where the current status of the event will
 *                                be returned
 *
diff --git a/drivers/acpi/acpica/evxfgpe.c b/drivers/acpi/acpica/evxfgpe.c
index 86f9b343ebd4..6affbdb4b88c 100644
--- a/drivers/acpi/acpica/evxfgpe.c
+++ b/drivers/acpi/acpica/evxfgpe.c
@@ -197,12 +197,12 @@ acpi_status
 acpi_setup_gpe_for_wake(acpi_handle wake_device,
                        acpi_handle gpe_device, u32 gpe_number)
 {
-        acpi_status status = AE_BAD_PARAMETER;
+        acpi_status status;
        struct acpi_gpe_event_info *gpe_event_info;
        struct acpi_namespace_node *device_node;
-        struct acpi_gpe_notify_object *notify_object;
+        struct acpi_gpe_notify_info *notify;
+        struct acpi_gpe_notify_info *new_notify;
        acpi_cpu_flags flags;
-        u8 gpe_dispatch_mask;
        ACPI_FUNCTION_TRACE(acpi_setup_gpe_for_wake);
@@ -216,63 +216,95 @@ acpi_setup_gpe_for_wake(acpi_handle wake_device,
                return_ACPI_STATUS(AE_BAD_PARAMETER);
        }
+        /* Handle root object case */
+        if (wake_device == ACPI_ROOT_OBJECT) {
+                device_node = acpi_gbl_root_node;
+        } else {
+                device_node = ACPI_CAST_PTR(struct acpi_namespace_node, wake_device);
+        }
+        /* Validate WakeDevice is of type Device */
+        if (device_node->type != ACPI_TYPE_DEVICE) {
+                return_ACPI_STATUS (AE_BAD_PARAMETER);
+        }
+        /*
+         * Allocate a new notify object up front, in case it is needed.
+         * Memory allocation while holding a spinlock is a big no-no
+         * on some hosts.
+         */
+        new_notify = ACPI_ALLOCATE_ZEROED(sizeof(struct acpi_gpe_notify_info));
+        if (!new_notify) {
+                return_ACPI_STATUS(AE_NO_MEMORY);
+        }
        flags = acpi_os_acquire_lock(acpi_gbl_gpe_lock);
        /* Ensure that we have a valid GPE number */
        gpe_event_info = acpi_ev_get_gpe_event_info(gpe_device, gpe_number);
        if (!gpe_event_info) {
+                status = AE_BAD_PARAMETER;
                goto unlock_and_exit;
        }
-        if (wake_device == ACPI_ROOT_OBJECT) {
-                goto out;
-        }
        /*
         * If there is no method or handler for this GPE, then the
-         * wake_device will be notified whenever this GPE fires (aka
+         * wake_device will be notified whenever this GPE fires. This is
-         * "implicit notify") Note: The GPE is assumed to be
+         * known as an "implicit notify". Note: The GPE is assumed to be
         * level-triggered (for windows compatibility).
         */
-        gpe_dispatch_mask = gpe_event_info->flags & ACPI_GPE_DISPATCH_MASK;
+        if ((gpe_event_info->flags & ACPI_GPE_DISPATCH_MASK) ==
-        if (gpe_dispatch_mask != ACPI_GPE_DISPATCH_NONE
+            ACPI_GPE_DISPATCH_NONE) {
-            && gpe_dispatch_mask != ACPI_GPE_DISPATCH_NOTIFY) {
+                /*
-                goto out;
+                 * This is the first device for implicit notify on this GPE.
-        }
+                 * Just set the flags here, and enter the NOTIFY block below.
+                 */
-        /* Validate wake_device is of type Device */
+                gpe_event_info->flags =
+                    (ACPI_GPE_DISPATCH_NOTIFY | ACPI_GPE_LEVEL_TRIGGERED);
-        device_node = ACPI_CAST_PTR(struct acpi_namespace_node, wake_device);
-        if (device_node->type != ACPI_TYPE_DEVICE) {
-                goto unlock_and_exit;
        }
-        if (gpe_dispatch_mask == ACPI_GPE_DISPATCH_NONE) {
+        /*
-                gpe_event_info->flags = (ACPI_GPE_DISPATCH_NOTIFY |
+         * If we already have an implicit notify on this GPE, add
-                                         ACPI_GPE_LEVEL_TRIGGERED);
+         * this device to the notify list.
-                gpe_event_info->dispatch.device.node = device_node;
+         */
-                gpe_event_info->dispatch.device.next = NULL;
+        if ((gpe_event_info->flags & ACPI_GPE_DISPATCH_MASK) ==
-        } else {
+            ACPI_GPE_DISPATCH_NOTIFY) {
-                /* There are multiple devices to notify implicitly. */
+                /* Ensure that the device is not already in the list */
-                notify_object = ACPI_ALLOCATE_ZEROED(sizeof(*notify_object));
-                if (!notify_object) {
+                notify = gpe_event_info->dispatch.notify_list;
-                        status = AE_NO_MEMORY;
+                while (notify) {
-                        goto unlock_and_exit;
+                        if (notify->device_node == device_node) {
+                                status = AE_ALREADY_EXISTS;
+                                goto unlock_and_exit;
+                        }
+                        notify = notify->next;
                }
-                notify_object->node = device_node;
+                /* Add this device to the notify list for this GPE */
-                notify_object->next = gpe_event_info->dispatch.device.next;
-                gpe_event_info->dispatch.device.next = notify_object;
+                new_notify->device_node = device_node;
+                new_notify->next = gpe_event_info->dispatch.notify_list;
+                gpe_event_info->dispatch.notify_list = new_notify;
+                new_notify = NULL;
        }
- out:
+        /* Mark the GPE as a possible wake event */
        gpe_event_info->flags |= ACPI_GPE_CAN_WAKE;
        status = AE_OK;
- unlock_and_exit:
+unlock_and_exit:
        acpi_os_release_lock(acpi_gbl_gpe_lock, flags);
+        /* Delete the notify object if it was not used above */
+        if (new_notify) {
+                ACPI_FREE(new_notify);
+        }
        return_ACPI_STATUS(status);
 }
 ACPI_EXPORT_SYMBOL(acpi_setup_gpe_for_wake)
@@ -283,7 +315,7 @@ ACPI_EXPORT_SYMBOL(acpi_setup_gpe_for_wake)
 *
 * PARAMETERS:  gpe_device      - Parent GPE Device. NULL for GPE0/GPE1
 *              gpe_number      - GPE level within the GPE block
- *              Action          - Enable or Disable
+ *              action              - Enable or Disable
 *
 * RETURN:      Status
 *
@@ -508,7 +540,7 @@ ACPI_EXPORT_SYMBOL(acpi_enable_all_runtime_gpes)
 * FUNCTION:    acpi_install_gpe_block
 *
 * PARAMETERS:  gpe_device          - Handle to the parent GPE Block Device
- *              gpe_block_address   - Address and space_iD
+ *              gpe_block_address   - Address and space_ID
 *              register_count      - Number of GPE register pairs in the block
 *              interrupt_number    - H/W interrupt for the block
 *
@@ -653,7 +685,7 @@ ACPI_EXPORT_SYMBOL(acpi_remove_gpe_block)
 *
 * FUNCTION:    acpi_get_gpe_device
 *
- * PARAMETERS:  Index               - System GPE index (0-current_gpe_count)
+ * PARAMETERS:  index               - System GPE index (0-current_gpe_count)
 *              gpe_device          - Where the parent GPE Device is returned
 *
 * RETURN:      Status
diff --git a/drivers/acpi/acpica/evxfregn.c b/drivers/acpi/acpica/evxfregn.c
index 6019208cd4b6..96b412d03950 100644
--- a/drivers/acpi/acpica/evxfregn.c
+++ b/drivers/acpi/acpica/evxfregn.c
@@ -55,11 +55,11 @@ ACPI_MODULE_NAME("evxfregn")
 *
 * FUNCTION:    acpi_install_address_space_handler
 *
- * PARAMETERS:  Device          - Handle for the device
+ * PARAMETERS:  device          - Handle for the device
 *              space_id        - The address space ID
- *              Handler         - Address of the handler
+ *              handler         - Address of the handler
- *              Setup           - Address of the setup function
+ *              setup           - Address of the setup function
- *              Context         - Value passed to the handler on each access
+ *              context         - Value passed to the handler on each access
 *
 * RETURN:      Status
 *
@@ -112,16 +112,16 @@ acpi_install_address_space_handler(acpi_handle device,
        }
        /*
-         * For the default space_iDs, (the IDs for which there are default region handlers
+         * For the default space_IDs, (the IDs for which there are default region handlers
         * installed) Only execute the _REG methods if the global initialization _REG
         * methods have already been run (via acpi_initialize_objects). In other words,
-         * we will defer the execution of the _REG methods for these space_iDs until
+         * we will defer the execution of the _REG methods for these space_IDs until
         * execution of acpi_initialize_objects. This is done because we need the handlers
         * for the default spaces (mem/io/pci/table) to be installed before we can run
         * any control methods (or _REG methods). There is known BIOS code that depends
         * on this.
         *
-         * For all other space_iDs, we can safely execute the _REG methods immediately.
+         * For all other space_IDs, we can safely execute the _REG methods immediately.
         * This means that for IDs like embedded_controller, this function should be called
         * only after acpi_enable_subsystem has been called.
         */
@@ -157,9 +157,9 @@ ACPI_EXPORT_SYMBOL(acpi_install_address_space_handler)
 *
 * FUNCTION:    acpi_remove_address_space_handler
 *
- * PARAMETERS:  Device          - Handle for the device
+ * PARAMETERS:  device          - Handle for the device
 *              space_id        - The address space ID
- *              Handler         - Address of the handler
+ *              handler         - Address of the handler
 *
 * RETURN:      Status
 *
diff --git a/drivers/acpi/acpica/exconfig.c b/drivers/acpi/acpica/exconfig.c
index c86d44e41bc8..16219bde48da 100644
--- a/drivers/acpi/acpica/exconfig.c
+++ b/drivers/acpi/acpica/exconfig.c
@@ -66,7 +66,7 @@ acpi_ex_region_read(union acpi_operand_object *obj_desc,
 *
 * FUNCTION:    acpi_ex_add_table
 *
- * PARAMETERS:  Table               - Pointer to raw table
+ * PARAMETERS:  table               - Pointer to raw table
 *              parent_node         - Where to load the table (scope)
 *              ddb_handle          - Where to return the table handle.
 *
@@ -276,8 +276,8 @@ acpi_ex_load_table_op(struct acpi_walk_state *walk_state,
 * FUNCTION:    acpi_ex_region_read
 *
 * PARAMETERS:  obj_desc        - Region descriptor
- *              Length          - Number of bytes to read
+ *              length          - Number of bytes to read
- *              Buffer          - Pointer to where to put the data
+ *              buffer          - Pointer to where to put the data
 *
 * RETURN:      Status
 *
@@ -318,7 +318,7 @@ acpi_ex_region_read(union acpi_operand_object *obj_desc, u32 length, u8 *buffer)
 *
 * PARAMETERS:  obj_desc        - Region or Buffer/Field where the table will be
 *                                obtained
- *              Target          - Where a handle to the table will be stored
+ *              target          - Where a handle to the table will be stored
 *              walk_state      - Current state
 *
 * RETURN:      Status
diff --git a/drivers/acpi/acpica/exconvrt.c b/drivers/acpi/acpica/exconvrt.c
index e385436bd424..bfb062e4c4b4 100644
--- a/drivers/acpi/acpica/exconvrt.c
+++ b/drivers/acpi/acpica/exconvrt.c
@@ -60,7 +60,7 @@ acpi_ex_convert_to_ascii(u64 integer, u16 base, u8 *string, u8 max_length);
 * PARAMETERS:  obj_desc        - Object to be converted. Must be an
 *                                Integer, Buffer, or String
 *              result_desc     - Where the new Integer object is returned
- *              Flags           - Used for string conversion
+ *              flags           - Used for string conversion
 *
 * RETURN:      Status
 *
@@ -272,9 +272,9 @@ acpi_ex_convert_to_buffer(union acpi_operand_object *obj_desc,
 *
 * FUNCTION:    acpi_ex_convert_to_ascii
 *
- * PARAMETERS:  Integer         - Value to be converted
+ * PARAMETERS:  integer         - Value to be converted
- *              Base            - ACPI_STRING_DECIMAL or ACPI_STRING_HEX
+ *              base            - ACPI_STRING_DECIMAL or ACPI_STRING_HEX
- *              String          - Where the string is returned
+ *              string          - Where the string is returned
 *              data_width      - Size of data item to be converted, in bytes
 *
 * RETURN:      Actual string length
@@ -385,7 +385,7 @@ acpi_ex_convert_to_ascii(u64 integer, u16 base, u8 *string, u8 data_width)
 * PARAMETERS:  obj_desc        - Object to be converted. Must be an
 *                                Integer, Buffer, or String
 *              result_desc     - Where the string object is returned
- *              Type            - String flags (base and conversion type)
+ *              type            - String flags (base and conversion type)
 *
 * RETURN:      Status
 *
diff --git a/drivers/acpi/acpica/excreate.c b/drivers/acpi/acpica/excreate.c
index 3f5bc998c1cb..691d4763102c 100644
--- a/drivers/acpi/acpica/excreate.c
+++ b/drivers/acpi/acpica/excreate.c
@@ -369,7 +369,7 @@ acpi_ex_create_region(u8 * aml_start,
 *
 * DESCRIPTION: Create a new processor object and populate the fields
 *
- *              Processor (Name[0], cpu_iD[1], pblock_addr[2], pblock_length[3])
+ *              Processor (Name[0], cpu_ID[1], pblock_addr[2], pblock_length[3])
 *
 ******************************************************************************/
diff --git a/drivers/acpi/acpica/exdebug.c b/drivers/acpi/acpica/exdebug.c
index e211e9c19215..bc5b9a6a1316 100644
--- a/drivers/acpi/acpica/exdebug.c
+++ b/drivers/acpi/acpica/exdebug.c
@@ -54,8 +54,8 @@ ACPI_MODULE_NAME("exdebug")
 * FUNCTION:    acpi_ex_do_debug_object
 *
 * PARAMETERS:  source_desc         - Object to be output to "Debug Object"
- *              Level               - Indentation level (used for packages)
+ *              level               - Indentation level (used for packages)
- *              Index               - Current package element, zero if not pkg
+ *              index               - Current package element, zero if not pkg
 *
 * RETURN:      None
 *
diff --git a/drivers/acpi/acpica/exdump.c b/drivers/acpi/acpica/exdump.c
index 2a6ac0a3bc1e..213c081776fc 100644
--- a/drivers/acpi/acpica/exdump.c
+++ b/drivers/acpi/acpica/exdump.c
@@ -109,9 +109,9 @@ static struct acpi_exdump_info acpi_ex_dump_package[5] = {
 static struct acpi_exdump_info acpi_ex_dump_device[4] = {
        {ACPI_EXD_INIT, ACPI_EXD_TABLE_SIZE(acpi_ex_dump_device), NULL},
        {ACPI_EXD_POINTER, ACPI_EXD_OFFSET(device.handler), "Handler"},
-        {ACPI_EXD_POINTER, ACPI_EXD_OFFSET(device.system_notify),
+        {ACPI_EXD_POINTER, ACPI_EXD_OFFSET(device.notify_list[0]),
         "System Notify"},
-        {ACPI_EXD_POINTER, ACPI_EXD_OFFSET(device.device_notify),
+        {ACPI_EXD_POINTER, ACPI_EXD_OFFSET(device.notify_list[1]),
         "Device Notify"}
 };
@@ -158,9 +158,9 @@ static struct acpi_exdump_info acpi_ex_dump_power[5] = {
         "System Level"},
        {ACPI_EXD_UINT32, ACPI_EXD_OFFSET(power_resource.resource_order),
         "Resource Order"},
-        {ACPI_EXD_POINTER, ACPI_EXD_OFFSET(power_resource.system_notify),
+        {ACPI_EXD_POINTER, ACPI_EXD_OFFSET(power_resource.notify_list[0]),
         "System Notify"},
-        {ACPI_EXD_POINTER, ACPI_EXD_OFFSET(power_resource.device_notify),
+        {ACPI_EXD_POINTER, ACPI_EXD_OFFSET(power_resource.notify_list[1]),
         "Device Notify"}
 };
@@ -169,18 +169,18 @@ static struct acpi_exdump_info acpi_ex_dump_processor[7] = {
        {ACPI_EXD_UINT8, ACPI_EXD_OFFSET(processor.proc_id), "Processor ID"},
        {ACPI_EXD_UINT8, ACPI_EXD_OFFSET(processor.length), "Length"},
        {ACPI_EXD_ADDRESS, ACPI_EXD_OFFSET(processor.address), "Address"},
-        {ACPI_EXD_POINTER, ACPI_EXD_OFFSET(processor.system_notify),
+        {ACPI_EXD_POINTER, ACPI_EXD_OFFSET(processor.notify_list[0]),
         "System Notify"},
-        {ACPI_EXD_POINTER, ACPI_EXD_OFFSET(processor.device_notify),
+        {ACPI_EXD_POINTER, ACPI_EXD_OFFSET(processor.notify_list[1]),
         "Device Notify"},
        {ACPI_EXD_POINTER, ACPI_EXD_OFFSET(processor.handler), "Handler"}
 };
 static struct acpi_exdump_info acpi_ex_dump_thermal[4] = {
        {ACPI_EXD_INIT, ACPI_EXD_TABLE_SIZE(acpi_ex_dump_thermal), NULL},
-        {ACPI_EXD_POINTER, ACPI_EXD_OFFSET(thermal_zone.system_notify),
+        {ACPI_EXD_POINTER, ACPI_EXD_OFFSET(thermal_zone.notify_list[0]),
         "System Notify"},
-        {ACPI_EXD_POINTER, ACPI_EXD_OFFSET(thermal_zone.device_notify),
+        {ACPI_EXD_POINTER, ACPI_EXD_OFFSET(thermal_zone.notify_list[1]),
         "Device Notify"},
        {ACPI_EXD_POINTER, ACPI_EXD_OFFSET(thermal_zone.handler), "Handler"}
 };
@@ -241,10 +241,15 @@ static struct acpi_exdump_info acpi_ex_dump_address_handler[6] = {
        {ACPI_EXD_POINTER, ACPI_EXD_OFFSET(address_space.context), "Context"}
 };
-static struct acpi_exdump_info acpi_ex_dump_notify[3] = {
+static struct acpi_exdump_info acpi_ex_dump_notify[7] = {
        {ACPI_EXD_INIT, ACPI_EXD_TABLE_SIZE(acpi_ex_dump_notify), NULL},
        {ACPI_EXD_POINTER, ACPI_EXD_OFFSET(notify.node), "Node"},
-        {ACPI_EXD_POINTER, ACPI_EXD_OFFSET(notify.context), "Context"}
+        {ACPI_EXD_UINT32, ACPI_EXD_OFFSET(notify.handler_type), "Handler Type"},
+        {ACPI_EXD_POINTER, ACPI_EXD_OFFSET(notify.handler), "Handler"},
+        {ACPI_EXD_POINTER, ACPI_EXD_OFFSET(notify.context), "Context"},
+        {ACPI_EXD_POINTER, ACPI_EXD_OFFSET(notify.next[0]),
+         "Next System Notify"},
+        {ACPI_EXD_POINTER, ACPI_EXD_OFFSET(notify.next[1]), "Next Device Notify"}
 };
 /* Miscellaneous tables */
@@ -318,7 +323,7 @@ static struct acpi_exdump_info *acpi_ex_dump_info[] = {
 * FUNCTION:    acpi_ex_dump_object
 *
 * PARAMETERS:  obj_desc            - Descriptor to dump
- *              Info                - Info table corresponding to this object
+ *              info                - Info table corresponding to this object
 *                                    type
 *
 * RETURN:      None
@@ -444,7 +449,7 @@ acpi_ex_dump_object(union acpi_operand_object *obj_desc,
 * FUNCTION:    acpi_ex_dump_operand
 *
 * PARAMETERS:  *obj_desc       - Pointer to entry to be dumped
- *              Depth           - Current nesting depth
+ *              depth           - Current nesting depth
 *
 * RETURN:      None
 *
@@ -726,7 +731,7 @@ void acpi_ex_dump_operand(union acpi_operand_object *obj_desc, u32 depth)
 *
 * FUNCTION:    acpi_ex_dump_operands
 *
- * PARAMETERS:  Operands            - A list of Operand objects
+ * PARAMETERS:  operands            - A list of Operand objects
 *              opcode_name         - AML opcode name
 *              num_operands        - Operand count for this opcode
 *
@@ -769,8 +774,8 @@ acpi_ex_dump_operands(union acpi_operand_object **operands,
 *
 * FUNCTION:    acpi_ex_out* functions
 *
- * PARAMETERS:  Title               - Descriptive text
+ * PARAMETERS:  title               - Descriptive text
- *              Value               - Value to be displayed
+ *              value               - Value to be displayed
 *
 * DESCRIPTION: Object dump output formatting functions.  These functions
 *              reduce the number of format strings required and keeps them
@@ -792,8 +797,8 @@ static void acpi_ex_out_pointer(char *title, void *value)
 *
 * FUNCTION:    acpi_ex_dump_namespace_node
 *
- * PARAMETERS:  Node                - Descriptor to dump
+ * PARAMETERS:  node                - Descriptor to dump
- *              Flags               - Force display if TRUE
+ *              flags               - Force display if TRUE
 *
 * DESCRIPTION: Dumps the members of the given.Node
 *
@@ -825,7 +830,7 @@ void acpi_ex_dump_namespace_node(struct acpi_namespace_node *node, u32 flags)
 *
 * FUNCTION:    acpi_ex_dump_reference_obj
 *
- * PARAMETERS:  Object              - Descriptor to dump
+ * PARAMETERS:  object              - Descriptor to dump
 *
 * DESCRIPTION: Dumps a reference object
 *
@@ -882,8 +887,8 @@ static void acpi_ex_dump_reference_obj(union acpi_operand_object *obj_desc)
 * FUNCTION:    acpi_ex_dump_package_obj
 *
 * PARAMETERS:  obj_desc            - Descriptor to dump
- *              Level               - Indentation Level
+ *              level               - Indentation Level
- *              Index               - Package index for this object
+ *              index               - Package index for this object
 *
 * DESCRIPTION: Dumps the elements of the package
 *
@@ -926,9 +931,7 @@ acpi_ex_dump_package_obj(union acpi_operand_object *obj_desc,
        case ACPI_TYPE_STRING:
                acpi_os_printf("[String] Value: ");
-                for (i = 0; i < obj_desc->string.length; i++) {
+                acpi_ut_print_string(obj_desc->string.pointer, ACPI_UINT8_MAX);
-                        acpi_os_printf("%c", obj_desc->string.pointer[i]);
-                }
                acpi_os_printf("\n");
                break;
@@ -977,7 +980,7 @@ acpi_ex_dump_package_obj(union acpi_operand_object *obj_desc,
 * FUNCTION:    acpi_ex_dump_object_descriptor
 *
 * PARAMETERS:  obj_desc            - Descriptor to dump
- *              Flags               - Force display if TRUE
+ *              flags               - Force display if TRUE
 *
 * DESCRIPTION: Dumps the members of the object descriptor given.
 *
diff --git a/drivers/acpi/acpica/exfldio.c b/drivers/acpi/acpica/exfldio.c
index 149de45fdadd..a7784152ed30 100644
--- a/drivers/acpi/acpica/exfldio.c
+++ b/drivers/acpi/acpica/exfldio.c
@@ -222,9 +222,9 @@ acpi_ex_setup_region(union acpi_operand_object *obj_desc,
 * PARAMETERS:  obj_desc                - Field to be read
 *              field_datum_byte_offset - Byte offset of this datum within the
 *                                        parent field
- *              Value                   - Where to store value (must at least
+ *              value                   - Where to store value (must at least
 *                                        64 bits)
- *              Function                - Read or Write flag plus other region-
+ *              function                - Read or Write flag plus other region-
 *                                        dependent flags
 *
 * RETURN:      Status
@@ -315,7 +315,7 @@ acpi_ex_access_region(union acpi_operand_object *obj_desc,
 * FUNCTION:    acpi_ex_register_overflow
 *
 * PARAMETERS:  obj_desc                - Register(Field) to be written
- *              Value                   - Value to be stored
+ *              value                   - Value to be stored
 *
 * RETURN:      TRUE if value overflows the field, FALSE otherwise
 *
@@ -365,7 +365,7 @@ acpi_ex_register_overflow(union acpi_operand_object *obj_desc, u64 value)
 * PARAMETERS:  obj_desc                - Field to be read
 *              field_datum_byte_offset - Byte offset of this datum within the
 *                                        parent field
- *              Value                   - Where to store value (must be 64 bits)
+ *              value                   - Where to store value (must be 64 bits)
 *              read_write              - Read or Write flag
 *
 * RETURN:      Status
@@ -574,7 +574,7 @@ acpi_ex_field_datum_io(union acpi_operand_object *obj_desc,
 * FUNCTION:    acpi_ex_write_with_update_rule
 *
 * PARAMETERS:  obj_desc                - Field to be written
- *              Mask                    - bitmask within field datum
+ *              mask                    - bitmask within field datum
 *              field_value             - Value to write
 *              field_datum_byte_offset - Offset of datum within field
 *
@@ -678,7 +678,7 @@ acpi_ex_write_with_update_rule(union acpi_operand_object *obj_desc,
 * FUNCTION:    acpi_ex_extract_from_field
 *
 * PARAMETERS:  obj_desc            - Field to be read
- *              Buffer              - Where to store the field data
+ *              buffer              - Where to store the field data
 *              buffer_length       - Length of Buffer
 *
 * RETURN:      Status
@@ -823,7 +823,7 @@ acpi_ex_extract_from_field(union acpi_operand_object *obj_desc,
 * FUNCTION:    acpi_ex_insert_into_field
 *
 * PARAMETERS:  obj_desc            - Field to be written
- *              Buffer              - Data to be written
+ *              buffer              - Data to be written
 *              buffer_length       - Length of Buffer
 *
 * RETURN:      Status
diff --git a/drivers/acpi/acpica/exmisc.c b/drivers/acpi/acpica/exmisc.c
index 0a0893310348..271c0c57ea10 100644
--- a/drivers/acpi/acpica/exmisc.c
+++ b/drivers/acpi/acpica/exmisc.c
@@ -144,8 +144,8 @@ acpi_ex_get_object_reference(union acpi_operand_object *obj_desc,
 *
 * FUNCTION:    acpi_ex_concat_template
 *
- * PARAMETERS:  Operand0            - First source object
+ * PARAMETERS:  operand0            - First source object
- *              Operand1            - Second source object
+ *              operand1            - Second source object
 *              actual_return_desc  - Where to place the return object
 *              walk_state          - Current walk state
 *
@@ -229,8 +229,8 @@ acpi_ex_concat_template(union acpi_operand_object *operand0,
 *
 * FUNCTION:    acpi_ex_do_concatenate
 *
- * PARAMETERS:  Operand0            - First source object
+ * PARAMETERS:  operand0            - First source object
- *              Operand1            - Second source object
+ *              operand1            - Second source object
 *              actual_return_desc  - Where to place the return object
 *              walk_state          - Current walk state
 *
@@ -397,9 +397,9 @@ acpi_ex_do_concatenate(union acpi_operand_object *operand0,
 *
 * FUNCTION:    acpi_ex_do_math_op
 *
- * PARAMETERS:  Opcode              - AML opcode
+ * PARAMETERS:  opcode              - AML opcode
- *              Integer0            - Integer operand #0
+ *              integer0            - Integer operand #0
- *              Integer1            - Integer operand #1
+ *              integer1            - Integer operand #1
 *
 * RETURN:      Integer result of the operation
 *
@@ -479,9 +479,9 @@ u64 acpi_ex_do_math_op(u16 opcode, u64 integer0, u64 integer1)
 *
 * FUNCTION:    acpi_ex_do_logical_numeric_op
 *
- * PARAMETERS:  Opcode              - AML opcode
+ * PARAMETERS:  opcode              - AML opcode
- *              Integer0            - Integer operand #0
+ *              integer0            - Integer operand #0
- *              Integer1            - Integer operand #1
+ *              integer1            - Integer operand #1
 *              logical_result      - TRUE/FALSE result of the operation
 *
 * RETURN:      Status
@@ -534,9 +534,9 @@ acpi_ex_do_logical_numeric_op(u16 opcode,
 *
 * FUNCTION:    acpi_ex_do_logical_op
 *
- * PARAMETERS:  Opcode              - AML opcode
+ * PARAMETERS:  opcode              - AML opcode
- *              Operand0            - operand #0
+ *              operand0            - operand #0
- *              Operand1            - operand #1
+ *              operand1            - operand #1
 *              logical_result      - TRUE/FALSE result of the operation
 *
 * RETURN:      Status
diff --git a/drivers/acpi/acpica/exmutex.c b/drivers/acpi/acpica/exmutex.c
index 60933e9dc3c0..bcceda5be9e3 100644
--- a/drivers/acpi/acpica/exmutex.c
+++ b/drivers/acpi/acpica/exmutex.c
@@ -102,7 +102,7 @@ void acpi_ex_unlink_mutex(union acpi_operand_object *obj_desc)
 * FUNCTION:    acpi_ex_link_mutex
 *
 * PARAMETERS:  obj_desc            - The mutex to be linked
- *              Thread              - Current executing thread object
+ *              thread              - Current executing thread object
 *
 * RETURN:      None
 *
@@ -138,7 +138,7 @@ acpi_ex_link_mutex(union acpi_operand_object *obj_desc,
 *
 * FUNCTION:    acpi_ex_acquire_mutex_object
 *
- * PARAMETERS:  Timeout             - Timeout in milliseconds
+ * PARAMETERS:  timeout             - Timeout in milliseconds
 *              obj_desc            - Mutex object
 *              thread_id           - Current thread state
 *
@@ -443,7 +443,7 @@ acpi_ex_release_mutex(union acpi_operand_object *obj_desc,
 *
 * FUNCTION:    acpi_ex_release_all_mutexes
 *
- * PARAMETERS:  Thread              - Current executing thread object
+ * PARAMETERS:  thread              - Current executing thread object
 *
 * RETURN:      Status
 *
diff --git a/drivers/acpi/acpica/exprep.c b/drivers/acpi/acpica/exprep.c
index 30157f5a12d7..81eca60d2748 100644
--- a/drivers/acpi/acpica/exprep.c
+++ b/drivers/acpi/acpica/exprep.c
@@ -391,12 +391,12 @@ acpi_ex_prep_common_field_object(union acpi_operand_object *obj_desc,
 *
 * FUNCTION:    acpi_ex_prep_field_value
 *
- * PARAMETERS:  Info    - Contains all field creation info
+ * PARAMETERS:  info    - Contains all field creation info
 *
 * RETURN:      Status
 *
- * DESCRIPTION: Construct a union acpi_operand_object of type def_field and
+ * DESCRIPTION: Construct an object of type union acpi_operand_object with a
- *              connect it to the parent Node.
+ *              subtype of def_field and connect it to the parent Node.
 *
 ******************************************************************************/
diff --git a/drivers/acpi/acpica/exregion.c b/drivers/acpi/acpica/exregion.c
index 12d51df6d3bf..1f1ce0c3d2f8 100644
--- a/drivers/acpi/acpica/exregion.c
+++ b/drivers/acpi/acpica/exregion.c
@@ -53,10 +53,10 @@ ACPI_MODULE_NAME("exregion")
 *
 * FUNCTION:    acpi_ex_system_memory_space_handler
 *
- * PARAMETERS:  Function            - Read or Write operation
+ * PARAMETERS:  function            - Read or Write operation
- *              Address             - Where in the space to read or write
+ *              address             - Where in the space to read or write
 *              bit_width           - Field width in bits (8, 16, or 32)
- *              Value               - Pointer to in or out value
+ *              value               - Pointer to in or out value
 *              handler_context     - Pointer to Handler's context
 *              region_context      - Pointer to context specific to the
 *                                    accessed region
@@ -270,10 +270,10 @@ acpi_ex_system_memory_space_handler(u32 function,
 *
 * FUNCTION:    acpi_ex_system_io_space_handler
 *
- * PARAMETERS:  Function            - Read or Write operation
+ * PARAMETERS:  function            - Read or Write operation
- *              Address             - Where in the space to read or write
+ *              address             - Where in the space to read or write
 *              bit_width           - Field width in bits (8, 16, or 32)
- *              Value               - Pointer to in or out value
+ *              value               - Pointer to in or out value
 *              handler_context     - Pointer to Handler's context
 *              region_context      - Pointer to context specific to the
 *                                    accessed region
@@ -329,10 +329,10 @@ acpi_ex_system_io_space_handler(u32 function,
 *
 * FUNCTION:    acpi_ex_pci_config_space_handler
 *
- * PARAMETERS:  Function            - Read or Write operation
+ * PARAMETERS:  function            - Read or Write operation
- *              Address             - Where in the space to read or write
+ *              address             - Where in the space to read or write
 *              bit_width           - Field width in bits (8, 16, or 32)
- *              Value               - Pointer to in or out value
+ *              value               - Pointer to in or out value
 *              handler_context     - Pointer to Handler's context
 *              region_context      - Pointer to context specific to the
 *                                    accessed region
@@ -365,7 +365,7 @@ acpi_ex_pci_config_space_handler(u32 function,
         *  pci_function is the PCI device function number
         *  pci_register is the Config space register range 0-255 bytes
         *
-         *  Value - input value for write, output address for read
+         *  value - input value for write, output address for read
         *
         */
        pci_id = (struct acpi_pci_id *)region_context;
@@ -402,10 +402,10 @@ acpi_ex_pci_config_space_handler(u32 function,
 *
 * FUNCTION:    acpi_ex_cmos_space_handler
 *
- * PARAMETERS:  Function            - Read or Write operation
+ * PARAMETERS:  function            - Read or Write operation
- *              Address             - Where in the space to read or write
+ *              address             - Where in the space to read or write
 *              bit_width           - Field width in bits (8, 16, or 32)
- *              Value               - Pointer to in or out value
+ *              value               - Pointer to in or out value
 *              handler_context     - Pointer to Handler's context
 *              region_context      - Pointer to context specific to the
 *                                    accessed region
@@ -434,10 +434,10 @@ acpi_ex_cmos_space_handler(u32 function,
 *
 * FUNCTION:    acpi_ex_pci_bar_space_handler
 *
- * PARAMETERS:  Function            - Read or Write operation
+ * PARAMETERS:  function            - Read or Write operation
- *              Address             - Where in the space to read or write
+ *              address             - Where in the space to read or write
 *              bit_width           - Field width in bits (8, 16, or 32)
- *              Value               - Pointer to in or out value
+ *              value               - Pointer to in or out value
 *              handler_context     - Pointer to Handler's context
 *              region_context      - Pointer to context specific to the
 *                                    accessed region
@@ -466,10 +466,10 @@ acpi_ex_pci_bar_space_handler(u32 function,
 *
 * FUNCTION:    acpi_ex_data_table_space_handler
 *
- * PARAMETERS:  Function            - Read or Write operation
+ * PARAMETERS:  function            - Read or Write operation
- *              Address             - Where in the space to read or write
+ *              address             - Where in the space to read or write
 *              bit_width           - Field width in bits (8, 16, or 32)
- *              Value               - Pointer to in or out value
+ *              value               - Pointer to in or out value
 *              handler_context     - Pointer to Handler's context
 *              region_context      - Pointer to context specific to the
 *                                    accessed region
diff --git a/drivers/acpi/acpica/exresolv.c b/drivers/acpi/acpica/exresolv.c
index 6e335dc34528..bbf40ac27585 100644
--- a/drivers/acpi/acpica/exresolv.c
+++ b/drivers/acpi/acpica/exresolv.c
@@ -147,7 +147,7 @@ acpi_ex_resolve_object_to_value(union acpi_operand_object **stack_ptr,
        stack_desc = *stack_ptr;
-        /* This is a union acpi_operand_object    */
+        /* This is an object of type union acpi_operand_object */
        switch (stack_desc->common.type) {
        case ACPI_TYPE_LOCAL_REFERENCE:
@@ -321,7 +321,7 @@ acpi_ex_resolve_object_to_value(union acpi_operand_object **stack_ptr,
 * FUNCTION:    acpi_ex_resolve_multiple
 *
 * PARAMETERS:  walk_state          - Current state (contains AML opcode)
- *              Operand             - Starting point for resolution
+ *              operand             - Starting point for resolution
 *              return_type         - Where the object type is returned
 *              return_desc         - Where the resolved object is returned
 *
diff --git a/drivers/acpi/acpica/exresop.c b/drivers/acpi/acpica/exresop.c
index a67b1d925ddd..f232fbabdea8 100644
--- a/drivers/acpi/acpica/exresop.c
+++ b/drivers/acpi/acpica/exresop.c
@@ -113,7 +113,7 @@ acpi_ex_check_object_type(acpi_object_type type_needed,
 *
 * FUNCTION:    acpi_ex_resolve_operands
 *
- * PARAMETERS:  Opcode              - Opcode being interpreted
+ * PARAMETERS:  opcode              - Opcode being interpreted
 *              stack_ptr           - Pointer to the operand stack to be
 *                                    resolved
 *              walk_state          - Current state
@@ -307,7 +307,7 @@ acpi_ex_resolve_operands(u16 opcode,
                case ARGI_DEVICE_REF:
                case ARGI_TARGETREF:    /* Allows implicit conversion rules before store */
                case ARGI_FIXED_TARGET: /* No implicit conversion before store to target */
-                case ARGI_SIMPLE_TARGET:        /* Name, Local, or Arg - no implicit conversion  */
+                case ARGI_SIMPLE_TARGET:        /* Name, Local, or arg - no implicit conversion  */
                        /*
                         * Need an operand of type ACPI_TYPE_LOCAL_REFERENCE
@@ -410,7 +410,7 @@ acpi_ex_resolve_operands(u16 opcode,
                        /*
                         * Need an operand of type ACPI_TYPE_INTEGER,
                         * But we can implicitly convert from a STRING or BUFFER
-                         * Aka - "Implicit Source Operand Conversion"
+                         * aka - "Implicit Source Operand Conversion"
                         */
                        status =
                            acpi_ex_convert_to_integer(obj_desc, stack_ptr, 16);
@@ -437,7 +437,7 @@ acpi_ex_resolve_operands(u16 opcode,
                        /*
                         * Need an operand of type ACPI_TYPE_BUFFER,
                         * But we can implicitly convert from a STRING or INTEGER
-                         * Aka - "Implicit Source Operand Conversion"
+                         * aka - "Implicit Source Operand Conversion"
                         */
                        status = acpi_ex_convert_to_buffer(obj_desc, stack_ptr);
                        if (ACPI_FAILURE(status)) {
@@ -463,7 +463,7 @@ acpi_ex_resolve_operands(u16 opcode,
                        /*
                         * Need an operand of type ACPI_TYPE_STRING,
                         * But we can implicitly convert from a BUFFER or INTEGER
-                         * Aka - "Implicit Source Operand Conversion"
+                         * aka - "Implicit Source Operand Conversion"
                         */
                        status = acpi_ex_convert_to_string(obj_desc, stack_ptr,
                                                           ACPI_IMPLICIT_CONVERT_HEX);
diff --git a/drivers/acpi/acpica/exstore.c b/drivers/acpi/acpica/exstore.c
index c6cf843cc4c9..5fffe7ab5ece 100644
--- a/drivers/acpi/acpica/exstore.c
+++ b/drivers/acpi/acpica/exstore.c
@@ -62,8 +62,8 @@ acpi_ex_store_object_to_index(union acpi_operand_object *val_desc,
 * FUNCTION:    acpi_ex_store
 *
 * PARAMETERS:  *source_desc        - Value to be stored
- *              *dest_desc          - Where to store it.  Must be an NS node
+ *              *dest_desc          - Where to store it. Must be an NS node
- *                                    or a union acpi_operand_object of type
+ *                                    or union acpi_operand_object of type
 *                                    Reference;
 *              walk_state          - Current walk state
 *
@@ -361,7 +361,7 @@ acpi_ex_store_object_to_index(union acpi_operand_object *source_desc,
 * FUNCTION:    acpi_ex_store_object_to_node
 *
 * PARAMETERS:  source_desc             - Value to be stored
- *              Node                    - Named object to receive the value
+ *              node                    - Named object to receive the value
 *              walk_state              - Current walk state
 *              implicit_conversion     - Perform implicit conversion (yes/no)
 *
diff --git a/drivers/acpi/acpica/exstorob.c b/drivers/acpi/acpica/exstorob.c
index 65a45d8335c8..53c248473547 100644
--- a/drivers/acpi/acpica/exstorob.c
+++ b/drivers/acpi/acpica/exstorob.c
@@ -110,7 +110,7 @@ acpi_ex_store_buffer_to_buffer(union acpi_operand_object *source_desc,
                 * NOTE: ACPI versions up to 3.0 specified that the buffer must be
                 * truncated if the string is smaller than the buffer.  However, "other"
                 * implementations of ACPI never did this and thus became the defacto
-                 * standard. ACPI 3.0_a changes this behavior such that the buffer
+                 * standard. ACPI 3.0A changes this behavior such that the buffer
                 * is no longer truncated.
                 */
diff --git a/drivers/acpi/acpica/exsystem.c b/drivers/acpi/acpica/exsystem.c
index 191a12945226..b760641e2fc6 100644
--- a/drivers/acpi/acpica/exsystem.c
+++ b/drivers/acpi/acpica/exsystem.c
@@ -53,8 +53,8 @@ ACPI_MODULE_NAME("exsystem")
 *
 * FUNCTION:    acpi_ex_system_wait_semaphore
 *
- * PARAMETERS:  Semaphore       - Semaphore to wait on
+ * PARAMETERS:  semaphore       - Semaphore to wait on
- *              Timeout         - Max time to wait
+ *              timeout         - Max time to wait
 *
 * RETURN:      Status
 *
@@ -98,8 +98,8 @@ acpi_status acpi_ex_system_wait_semaphore(acpi_semaphore semaphore, u16 timeout)
 *
 * FUNCTION:    acpi_ex_system_wait_mutex
 *
- * PARAMETERS:  Mutex           - Mutex to wait on
+ * PARAMETERS:  mutex           - Mutex to wait on
- *              Timeout         - Max time to wait
+ *              timeout         - Max time to wait
 *
 * RETURN:      Status
 *
diff --git a/drivers/acpi/acpica/exutils.c b/drivers/acpi/acpica/exutils.c
index eb6798ba8b59..d1ab7917eed7 100644
--- a/drivers/acpi/acpica/exutils.c
+++ b/drivers/acpi/acpica/exutils.c
@@ -109,7 +109,7 @@ void acpi_ex_enter_interpreter(void)
 *
 * DESCRIPTION: Reacquire the interpreter execution region from within the
 *              interpreter code. Failure to enter the interpreter region is a
- *              fatal system error. Used in  conjunction with
+ *              fatal system error. Used in conjunction with
 *              relinquish_interpreter
 *
 ******************************************************************************/
@@ -317,8 +317,8 @@ void acpi_ex_release_global_lock(u32 field_flags)
 *
 * FUNCTION:    acpi_ex_digits_needed
 *
- * PARAMETERS:  Value           - Value to be represented
+ * PARAMETERS:  value           - Value to be represented
- *              Base            - Base of representation
+ *              base            - Base of representation
 *
 * RETURN:      The number of digits.
 *
@@ -408,7 +408,7 @@ void acpi_ex_eisa_id_to_string(char *out_string, u64 compressed_id)
 * PARAMETERS:  out_string      - Where to put the converted string. At least
 *                                21 bytes are needed to hold the largest
 *                                possible 64-bit integer.
- *              Value           - Value to be converted
+ *              value           - Value to be converted
 *
 * RETURN:      None, string
 *
@@ -443,7 +443,7 @@ void acpi_ex_integer_to_string(char *out_string, u64 value)
 *
 * RETURN:      TRUE if valid/supported ID.
 *
- * DESCRIPTION: Validate an operation region space_iD.
+ * DESCRIPTION: Validate an operation region space_ID.
 *
 ******************************************************************************/
diff --git a/drivers/acpi/acpica/hwacpi.c b/drivers/acpi/acpica/hwacpi.c
index d0b9ed5df97e..a1e71d0ef57b 100644
--- a/drivers/acpi/acpica/hwacpi.c
+++ b/drivers/acpi/acpica/hwacpi.c
@@ -53,7 +53,7 @@ ACPI_MODULE_NAME("hwacpi")
 *
 * FUNCTION:    acpi_hw_set_mode
 *
- * PARAMETERS:  Mode            - SYS_MODE_ACPI or SYS_MODE_LEGACY
+ * PARAMETERS:  mode            - SYS_MODE_ACPI or SYS_MODE_LEGACY
 *
 * RETURN:      Status
 *
diff --git a/drivers/acpi/acpica/hwesleep.c b/drivers/acpi/acpica/hwesleep.c
index 29e859293edd..94996f9ae3ad 100644
--- a/drivers/acpi/acpica/hwesleep.c
+++ b/drivers/acpi/acpica/hwesleep.c
@@ -90,7 +90,6 @@ void acpi_hw_execute_sleep_method(char *method_pathname, u32 integer_argument)
 * FUNCTION:    acpi_hw_extended_sleep
 *
 * PARAMETERS:  sleep_state         - Which sleep state to enter
- *              Flags               - ACPI_EXECUTE_GTS to run optional method
 *
 * RETURN:      Status
 *
@@ -100,7 +99,7 @@ void acpi_hw_execute_sleep_method(char *method_pathname, u32 integer_argument)
 *
 ******************************************************************************/
-acpi_status acpi_hw_extended_sleep(u8 sleep_state, u8 flags)
+acpi_status acpi_hw_extended_sleep(u8 sleep_state)
 {
        acpi_status status;
        u8 sleep_type_value;
@@ -117,19 +116,14 @@ acpi_status acpi_hw_extended_sleep(u8 sleep_state, u8 flags)
        /* Clear wake status (WAK_STS) */
-        status = acpi_write(ACPI_X_WAKE_STATUS, &acpi_gbl_FADT.sleep_status);
+        status =
+            acpi_write((u64)ACPI_X_WAKE_STATUS, &acpi_gbl_FADT.sleep_status);
        if (ACPI_FAILURE(status)) {
                return_ACPI_STATUS(status);
        }
        acpi_gbl_system_awake_and_running = FALSE;
-        /* Optionally execute _GTS (Going To Sleep) */
-        if (flags & ACPI_EXECUTE_GTS) {
-                acpi_hw_execute_sleep_method(METHOD_PATHNAME__GTS, sleep_state);
-        }
        /* Flush caches, as per ACPI specification */
        ACPI_FLUSH_CPU_CACHE();
@@ -147,7 +141,7 @@ acpi_status acpi_hw_extended_sleep(u8 sleep_state, u8 flags)
            ((acpi_gbl_sleep_type_a << ACPI_X_SLEEP_TYPE_POSITION) &
             ACPI_X_SLEEP_TYPE_MASK);
-        status = acpi_write((sleep_type_value | ACPI_X_SLEEP_ENABLE),
+        status = acpi_write((u64)(sleep_type_value | ACPI_X_SLEEP_ENABLE),
                            &acpi_gbl_FADT.sleep_control);
        if (ACPI_FAILURE(status)) {
                return_ACPI_STATUS(status);
@@ -171,7 +165,6 @@ acpi_status acpi_hw_extended_sleep(u8 sleep_state, u8 flags)
 * FUNCTION:    acpi_hw_extended_wake_prep
 *
 * PARAMETERS:  sleep_state         - Which sleep state we just exited
- *              Flags               - ACPI_EXECUTE_BFS to run optional method
 *
 * RETURN:      Status
 *
@@ -180,7 +173,7 @@ acpi_status acpi_hw_extended_sleep(u8 sleep_state, u8 flags)
 *
 ******************************************************************************/
-acpi_status acpi_hw_extended_wake_prep(u8 sleep_state, u8 flags)
+acpi_status acpi_hw_extended_wake_prep(u8 sleep_state)
 {
        acpi_status status;
        u8 sleep_type_value;
@@ -195,15 +188,10 @@ acpi_status acpi_hw_extended_wake_prep(u8 sleep_state, u8 flags)
                    ((acpi_gbl_sleep_type_a << ACPI_X_SLEEP_TYPE_POSITION) &
                     ACPI_X_SLEEP_TYPE_MASK);
-                (void)acpi_write((sleep_type_value | ACPI_X_SLEEP_ENABLE),
+                (void)acpi_write((u64)(sleep_type_value | ACPI_X_SLEEP_ENABLE),
                                 &acpi_gbl_FADT.sleep_control);
        }
-        /* Optionally execute _BFS (Back From Sleep) */
-        if (flags & ACPI_EXECUTE_BFS) {
-                acpi_hw_execute_sleep_method(METHOD_PATHNAME__BFS, sleep_state);
-        }
        return_ACPI_STATUS(AE_OK);
 }
@@ -212,7 +200,7 @@ acpi_status acpi_hw_extended_wake_prep(u8 sleep_state, u8 flags)
 * FUNCTION:    acpi_hw_extended_wake
 *
 * PARAMETERS:  sleep_state         - Which sleep state we just exited
- *              Flags               - Reserved, set to zero
+ *              flags               - Reserved, set to zero
 *
 * RETURN:      Status
 *
@@ -221,7 +209,7 @@ acpi_status acpi_hw_extended_wake_prep(u8 sleep_state, u8 flags)
 *
 ******************************************************************************/
-acpi_status acpi_hw_extended_wake(u8 sleep_state, u8 flags)
+acpi_status acpi_hw_extended_wake(u8 sleep_state)
 {
        ACPI_FUNCTION_TRACE(hw_extended_wake);
@@ -239,7 +227,7 @@ acpi_status acpi_hw_extended_wake(u8 sleep_state, u8 flags)
         * and use it to determine whether the system is rebooting or
         * resuming. Clear WAK_STS for compatibility.
         */
-        (void)acpi_write(ACPI_X_WAKE_STATUS, &acpi_gbl_FADT.sleep_status);
+        (void)acpi_write((u64)ACPI_X_WAKE_STATUS, &acpi_gbl_FADT.sleep_status);
        acpi_gbl_system_awake_and_running = TRUE;
        acpi_hw_execute_sleep_method(METHOD_PATHNAME__SST, ACPI_SST_WORKING);
diff --git a/drivers/acpi/acpica/hwregs.c b/drivers/acpi/acpica/hwregs.c
index 6b6c83b87b52..4af6d20ef077 100644
--- a/drivers/acpi/acpica/hwregs.c
+++ b/drivers/acpi/acpica/hwregs.c
@@ -69,9 +69,9 @@ acpi_hw_write_multiple(u32 value,
 *
 * FUNCTION:    acpi_hw_validate_register
 *
- * PARAMETERS:  Reg                 - GAS register structure
+ * PARAMETERS:  reg                 - GAS register structure
 *              max_bit_width       - Max bit_width supported (32 or 64)
- *              Address             - Pointer to where the gas->address
+ *              address             - Pointer to where the gas->address
 *                                    is returned
 *
 * RETURN:      Status
@@ -102,7 +102,7 @@ acpi_hw_validate_register(struct acpi_generic_address *reg,
                return (AE_BAD_ADDRESS);
        }
-        /* Validate the space_iD */
+        /* Validate the space_ID */
        if ((reg->space_id != ACPI_ADR_SPACE_SYSTEM_MEMORY) &&
            (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO)) {
@@ -137,8 +137,8 @@ acpi_hw_validate_register(struct acpi_generic_address *reg,
 *
 * FUNCTION:    acpi_hw_read
 *
- * PARAMETERS:  Value               - Where the value is returned
+ * PARAMETERS:  value               - Where the value is returned
- *              Reg                 - GAS register structure
+ *              reg                 - GAS register structure
 *
 * RETURN:      Status
 *
@@ -148,7 +148,7 @@ acpi_hw_validate_register(struct acpi_generic_address *reg,
 *
 * LIMITATIONS: <These limitations also apply to acpi_hw_write>
 *      bit_width must be exactly 8, 16, or 32.
- *      space_iD must be system_memory or system_iO.
+ *      space_ID must be system_memory or system_IO.
 *      bit_offset and access_width are currently ignored, as there has
 *          not been a need to implement these.
 *
@@ -200,8 +200,8 @@ acpi_status acpi_hw_read(u32 *value, struct acpi_generic_address *reg)
 *
 * FUNCTION:    acpi_hw_write
 *
- * PARAMETERS:  Value               - Value to be written
+ * PARAMETERS:  value               - Value to be written
- *              Reg                 - GAS register structure
+ *              reg                 - GAS register structure
 *
 * RETURN:      Status
 *
@@ -439,7 +439,7 @@ acpi_hw_register_read(u32 register_id, u32 * return_value)
 * FUNCTION:    acpi_hw_register_write
 *
 * PARAMETERS:  register_id         - ACPI Register ID
- *              Value               - The value to write
+ *              value               - The value to write
 *
 * RETURN:      Status
 *
@@ -571,7 +571,7 @@ acpi_status acpi_hw_register_write(u32 register_id, u32 value)
 *
 * FUNCTION:    acpi_hw_read_multiple
 *
- * PARAMETERS:  Value               - Where the register value is returned
+ * PARAMETERS:  value               - Where the register value is returned
 *              register_a           - First ACPI register (required)
 *              register_b           - Second ACPI register (optional)
 *
@@ -624,7 +624,7 @@ acpi_hw_read_multiple(u32 *value,
 *
 * FUNCTION:    acpi_hw_write_multiple
 *
- * PARAMETERS:  Value               - The value to write
+ * PARAMETERS:  value               - The value to write
 *              register_a           - First ACPI register (required)
 *              register_b           - Second ACPI register (optional)
 *
diff --git a/drivers/acpi/acpica/hwsleep.c b/drivers/acpi/acpica/hwsleep.c
index 0ed85cac3231..3fddde056a5e 100644
--- a/drivers/acpi/acpica/hwsleep.c
+++ b/drivers/acpi/acpica/hwsleep.c
@@ -56,7 +56,6 @@ ACPI_MODULE_NAME("hwsleep")
 * FUNCTION:    acpi_hw_legacy_sleep
 *
 * PARAMETERS:  sleep_state         - Which sleep state to enter
- *              Flags               - ACPI_EXECUTE_GTS to run optional method
 *
 * RETURN:      Status
 *
@@ -64,7 +63,7 @@ ACPI_MODULE_NAME("hwsleep")
 *              THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED
 *
 ******************************************************************************/
-acpi_status acpi_hw_legacy_sleep(u8 sleep_state, u8 flags)
+acpi_status acpi_hw_legacy_sleep(u8 sleep_state)
 {
        struct acpi_bit_register_info *sleep_type_reg_info;
        struct acpi_bit_register_info *sleep_enable_reg_info;
@@ -95,18 +94,6 @@ acpi_status acpi_hw_legacy_sleep(u8 sleep_state, u8 flags)
                return_ACPI_STATUS(status);
        }
-        if (sleep_state != ACPI_STATE_S5) {
-                /*
-                 * Disable BM arbitration. This feature is contained within an
-                 * optional register (PM2 Control), so ignore a BAD_ADDRESS
-                 * exception.
-                 */
-                status = acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 1);
-                if (ACPI_FAILURE(status) && (status != AE_BAD_ADDRESS)) {
-                        return_ACPI_STATUS(status);
-                }
-        }
        /*
         * 1) Disable/Clear all GPEs
         * 2) Enable all wakeup GPEs
@@ -122,12 +109,6 @@ acpi_status acpi_hw_legacy_sleep(u8 sleep_state, u8 flags)
                return_ACPI_STATUS(status);
        }
-        /* Optionally execute _GTS (Going To Sleep) */
-        if (flags & ACPI_EXECUTE_GTS) {
-                acpi_hw_execute_sleep_method(METHOD_PATHNAME__GTS, sleep_state);
-        }
        /* Get current value of PM1A control */
        status = acpi_hw_register_read(ACPI_REGISTER_PM1_CONTROL,
@@ -226,7 +207,6 @@ acpi_status acpi_hw_legacy_sleep(u8 sleep_state, u8 flags)
 * FUNCTION:    acpi_hw_legacy_wake_prep
 *
 * PARAMETERS:  sleep_state         - Which sleep state we just exited
- *              Flags               - ACPI_EXECUTE_BFS to run optional method
 *
 * RETURN:      Status
 *
@@ -236,7 +216,7 @@ acpi_status acpi_hw_legacy_sleep(u8 sleep_state, u8 flags)
 *
 ******************************************************************************/
-acpi_status acpi_hw_legacy_wake_prep(u8 sleep_state, u8 flags)
+acpi_status acpi_hw_legacy_wake_prep(u8 sleep_state)
 {
        acpi_status status;
        struct acpi_bit_register_info *sleep_type_reg_info;
@@ -287,11 +267,6 @@ acpi_status acpi_hw_legacy_wake_prep(u8 sleep_state, u8 flags)
                }
        }
-        /* Optionally execute _BFS (Back From Sleep) */
-        if (flags & ACPI_EXECUTE_BFS) {
-                acpi_hw_execute_sleep_method(METHOD_PATHNAME__BFS, sleep_state);
-        }
        return_ACPI_STATUS(status);
 }
@@ -300,7 +275,6 @@ acpi_status acpi_hw_legacy_wake_prep(u8 sleep_state, u8 flags)
 * FUNCTION:    acpi_hw_legacy_wake
 *
 * PARAMETERS:  sleep_state         - Which sleep state we just exited
- *              Flags               - Reserved, set to zero
 *
 * RETURN:      Status
 *
@@ -309,7 +283,7 @@ acpi_status acpi_hw_legacy_wake_prep(u8 sleep_state, u8 flags)
 *
 ******************************************************************************/
-acpi_status acpi_hw_legacy_wake(u8 sleep_state, u8 flags)
+acpi_status acpi_hw_legacy_wake(u8 sleep_state)
 {
        acpi_status status;
@@ -364,16 +338,6 @@ acpi_status acpi_hw_legacy_wake(u8 sleep_state, u8 flags)
                                    [ACPI_EVENT_POWER_BUTTON].
                                    status_register_id, ACPI_CLEAR_STATUS);
-        /*
-         * Enable BM arbitration. This feature is contained within an
-         * optional register (PM2 Control), so ignore a BAD_ADDRESS
-         * exception.
-         */
-        status = acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 0);
-        if (ACPI_FAILURE(status) && (status != AE_BAD_ADDRESS)) {
-                return_ACPI_STATUS(status);
-        }
        acpi_hw_execute_sleep_method(METHOD_PATHNAME__SST, ACPI_SST_WORKING);
        return_ACPI_STATUS(status);
 }
diff --git a/drivers/acpi/acpica/hwtimer.c b/drivers/acpi/acpica/hwtimer.c
index f1b2c3b94cac..b6411f16832f 100644
--- a/drivers/acpi/acpica/hwtimer.c
+++ b/drivers/acpi/acpica/hwtimer.c
@@ -54,7 +54,7 @@ ACPI_MODULE_NAME("hwtimer")
 *
 * FUNCTION:    acpi_get_timer_resolution
 *
- * PARAMETERS:  Resolution          - Where the resolution is returned
+ * PARAMETERS:  resolution          - Where the resolution is returned
 *
 * RETURN:      Status and timer resolution
 *
@@ -84,7 +84,7 @@ ACPI_EXPORT_SYMBOL(acpi_get_timer_resolution)
 *
 * FUNCTION:    acpi_get_timer
 *
- * PARAMETERS:  Ticks               - Where the timer value is returned
+ * PARAMETERS:  ticks               - Where the timer value is returned
 *
 * RETURN:      Status and current timer value (ticks)
 *
diff --git a/drivers/acpi/acpica/hwvalid.c b/drivers/acpi/acpica/hwvalid.c
index 6e5c43a60bb7..c99d546b217f 100644
--- a/drivers/acpi/acpica/hwvalid.c
+++ b/drivers/acpi/acpica/hwvalid.c
@@ -58,7 +58,7 @@ acpi_hw_validate_io_request(acpi_io_address address, u32 bit_width);
 *
 * The table is used to implement the Microsoft port access rules that
 * first appeared in Windows XP. Some ports are always illegal, and some
- * ports are only illegal if the BIOS calls _OSI with a win_xP string or
+ * ports are only illegal if the BIOS calls _OSI with a win_XP string or
 * later (meaning that the BIOS itelf is post-XP.)
 *
 * This provides ACPICA with the desired port protections and
@@ -66,7 +66,7 @@ acpi_hw_validate_io_request(acpi_io_address address, u32 bit_width);
 *
 * Description of port entries:
 *  DMA:   DMA controller
- *  PIC0:  Programmable Interrupt Controller (8259_a)
+ *  PIC0:  Programmable Interrupt Controller (8259A)
 *  PIT1:  System Timer 1
 *  PIT2:  System Timer 2 failsafe
 *  RTC:   Real-time clock
diff --git a/drivers/acpi/acpica/hwxface.c b/drivers/acpi/acpica/hwxface.c
index a716fede4f25..7bfd649d1996 100644
--- a/drivers/acpi/acpica/hwxface.c
+++ b/drivers/acpi/acpica/hwxface.c
@@ -104,8 +104,8 @@ ACPI_EXPORT_SYMBOL(acpi_reset)
 *
 * FUNCTION:    acpi_read
 *
- * PARAMETERS:  Value               - Where the value is returned
+ * PARAMETERS:  value               - Where the value is returned
- *              Reg                 - GAS register structure
+ *              reg                 - GAS register structure
 *
 * RETURN:      Status
 *
@@ -113,7 +113,7 @@ ACPI_EXPORT_SYMBOL(acpi_reset)
 *
 * LIMITATIONS: <These limitations also apply to acpi_write>
 *      bit_width must be exactly 8, 16, 32, or 64.
- *      space_iD must be system_memory or system_iO.
+ *      space_ID must be system_memory or system_IO.
 *      bit_offset and access_width are currently ignored, as there has
 *          not been a need to implement these.
 *
@@ -196,8 +196,8 @@ ACPI_EXPORT_SYMBOL(acpi_read)
 *
 * FUNCTION:    acpi_write
 *
- * PARAMETERS:  Value               - Value to be written
+ * PARAMETERS:  value               - Value to be written
- *              Reg                 - GAS register structure
+ *              reg                 - GAS register structure
 *
 * RETURN:      Status
 *
@@ -441,7 +441,7 @@ ACPI_EXPORT_SYMBOL(acpi_write_bit_register)
 *              *sleep_type_a        - Where SLP_TYPa is returned
 *              *sleep_type_b        - Where SLP_TYPb is returned
 *
- * RETURN:      Status - ACPI status
+ * RETURN:      status - ACPI status
 *
 * DESCRIPTION: Obtain the SLP_TYPa and SLP_TYPb values for the requested sleep
 *              state.
diff --git a/drivers/acpi/acpica/hwxfsleep.c b/drivers/acpi/acpica/hwxfsleep.c
index 762d059bb508..1f165a750ae2 100644
--- a/drivers/acpi/acpica/hwxfsleep.c
+++ b/drivers/acpi/acpica/hwxfsleep.c
@@ -50,7 +50,7 @@ ACPI_MODULE_NAME("hwxfsleep")
 /* Local prototypes */
 static acpi_status
-acpi_hw_sleep_dispatch(u8 sleep_state, u8 flags, u32 function_id);
+acpi_hw_sleep_dispatch(u8 sleep_state, u32 function_id);
 /*
 * Dispatch table used to efficiently branch to the various sleep
@@ -205,7 +205,7 @@ acpi_status asmlinkage acpi_enter_sleep_state_s4bios(void)
        ACPI_FLUSH_CPU_CACHE();
        status = acpi_hw_write_port(acpi_gbl_FADT.smi_command,
-                                    (u32)acpi_gbl_FADT.S4bios_request, 8);
+                                    (u32)acpi_gbl_FADT.s4_bios_request, 8);
        do {
                acpi_os_stall(1000);
@@ -235,7 +235,7 @@ ACPI_EXPORT_SYMBOL(acpi_enter_sleep_state_s4bios)
 *
 ******************************************************************************/
 static acpi_status
-acpi_hw_sleep_dispatch(u8 sleep_state, u8 flags, u32 function_id)
+acpi_hw_sleep_dispatch(u8 sleep_state, u32 function_id)
 {
        acpi_status status;
        struct acpi_sleep_functions *sleep_functions =
@@ -248,11 +248,11 @@ acpi_hw_sleep_dispatch(u8 sleep_state, u8 flags, u32 function_id)
         * use the extended sleep registers
         */
        if (acpi_gbl_reduced_hardware || acpi_gbl_FADT.sleep_control.address) {
-                status = sleep_functions->extended_function(sleep_state, flags);
+                status = sleep_functions->extended_function(sleep_state);
        } else {
                /* Legacy sleep */
-                status = sleep_functions->legacy_function(sleep_state, flags);
+                status = sleep_functions->legacy_function(sleep_state);
        }
        return (status);
@@ -262,7 +262,7 @@ acpi_hw_sleep_dispatch(u8 sleep_state, u8 flags, u32 function_id)
         * For the case where reduced-hardware-only code is being generated,
         * we know that only the extended sleep registers are available
         */
-        status = sleep_functions->extended_function(sleep_state, flags);
+        status = sleep_functions->extended_function(sleep_state);
        return (status);
 #endif                          /* !ACPI_REDUCED_HARDWARE */
@@ -349,7 +349,6 @@ ACPI_EXPORT_SYMBOL(acpi_enter_sleep_state_prep)
 * FUNCTION:    acpi_enter_sleep_state
 *
 * PARAMETERS:  sleep_state         - Which sleep state to enter
- *              Flags               - ACPI_EXECUTE_GTS to run optional method
 *
 * RETURN:      Status
 *
@@ -357,7 +356,7 @@ ACPI_EXPORT_SYMBOL(acpi_enter_sleep_state_prep)
 *              THIS FUNCTION MUST BE CALLED WITH INTERRUPTS DISABLED
 *
 ******************************************************************************/
-acpi_status asmlinkage acpi_enter_sleep_state(u8 sleep_state, u8 flags)
+acpi_status asmlinkage acpi_enter_sleep_state(u8 sleep_state)
 {
        acpi_status status;
@@ -371,7 +370,7 @@ acpi_status asmlinkage acpi_enter_sleep_state(u8 sleep_state, u8 flags)
        }
        status =
-            acpi_hw_sleep_dispatch(sleep_state, flags, ACPI_SLEEP_FUNCTION_ID);
+            acpi_hw_sleep_dispatch(sleep_state, ACPI_SLEEP_FUNCTION_ID);
        return_ACPI_STATUS(status);
 }
@@ -382,7 +381,7 @@ ACPI_EXPORT_SYMBOL(acpi_enter_sleep_state)
 * FUNCTION:    acpi_leave_sleep_state_prep
 *
 * PARAMETERS:  sleep_state         - Which sleep state we are exiting
- *              Flags               - ACPI_EXECUTE_BFS to run optional method
+ *              flags               - ACPI_EXECUTE_BFS to run optional method
 *
 * RETURN:      Status
 *
@@ -391,14 +390,14 @@ ACPI_EXPORT_SYMBOL(acpi_enter_sleep_state)
 *              Called with interrupts DISABLED.
 *
 ******************************************************************************/
-acpi_status acpi_leave_sleep_state_prep(u8 sleep_state, u8 flags)
+acpi_status acpi_leave_sleep_state_prep(u8 sleep_state)
 {
        acpi_status status;
        ACPI_FUNCTION_TRACE(acpi_leave_sleep_state_prep);
        status =
-            acpi_hw_sleep_dispatch(sleep_state, flags,
+            acpi_hw_sleep_dispatch(sleep_state,
                                   ACPI_WAKE_PREP_FUNCTION_ID);
        return_ACPI_STATUS(status);
 }
@@ -423,8 +422,7 @@ acpi_status acpi_leave_sleep_state(u8 sleep_state)
        ACPI_FUNCTION_TRACE(acpi_leave_sleep_state);
+        status = acpi_hw_sleep_dispatch(sleep_state, ACPI_WAKE_FUNCTION_ID);
-        status = acpi_hw_sleep_dispatch(sleep_state, 0, ACPI_WAKE_FUNCTION_ID);
        return_ACPI_STATUS(status);
 }
diff --git a/drivers/acpi/acpica/nsaccess.c b/drivers/acpi/acpica/nsaccess.c
index 61623f3f6826..23db53ce2293 100644
--- a/drivers/acpi/acpica/nsaccess.c
+++ b/drivers/acpi/acpica/nsaccess.c
@@ -157,7 +157,7 @@ acpi_status acpi_ns_root_initialize(void)
 #if defined (ACPI_ASL_COMPILER)
-                                /* Save the parameter count for the i_aSL compiler */
+                                /* Save the parameter count for the iASL compiler */
                                new_node->value = obj_desc->method.param_count;
 #else
@@ -258,11 +258,11 @@ acpi_status acpi_ns_root_initialize(void)
 * FUNCTION:    acpi_ns_lookup
 *
 * PARAMETERS:  scope_info      - Current scope info block
- *              Pathname        - Search pathname, in internal format
+ *              pathname        - Search pathname, in internal format
 *                                (as represented in the AML stream)
- *              Type            - Type associated with name
+ *              type            - Type associated with name
 *              interpreter_mode - IMODE_LOAD_PASS2 => add name if not found
- *              Flags           - Flags describing the search restrictions
+ *              flags           - Flags describing the search restrictions
 *              walk_state      - Current state of the walk
 *              return_node     - Where the Node is placed (if found
 *                                or created successfully)
diff --git a/drivers/acpi/acpica/nsalloc.c b/drivers/acpi/acpica/nsalloc.c
index 7c3d3ceb98b3..ac389e5bb594 100644
--- a/drivers/acpi/acpica/nsalloc.c
+++ b/drivers/acpi/acpica/nsalloc.c
@@ -52,7 +52,7 @@ ACPI_MODULE_NAME("nsalloc")
 *
 * FUNCTION:    acpi_ns_create_node
 *
- * PARAMETERS:  Name            - Name of the new node (4 char ACPI name)
+ * PARAMETERS:  name            - Name of the new node (4 char ACPI name)
 *
 * RETURN:      New namespace node (Null on failure)
 *
@@ -92,7 +92,7 @@ struct acpi_namespace_node *acpi_ns_create_node(u32 name)
 *
 * FUNCTION:    acpi_ns_delete_node
 *
- * PARAMETERS:  Node            - Node to be deleted
+ * PARAMETERS:  node            - Node to be deleted
 *
 * RETURN:      None
 *
@@ -143,7 +143,7 @@ void acpi_ns_delete_node(struct acpi_namespace_node *node)
 *
 * FUNCTION:    acpi_ns_remove_node
 *
- * PARAMETERS:  Node            - Node to be removed/deleted
+ * PARAMETERS:  node            - Node to be removed/deleted
 *
 * RETURN:      None
 *
@@ -196,8 +196,8 @@ void acpi_ns_remove_node(struct acpi_namespace_node *node)
 *
 * PARAMETERS:  walk_state      - Current state of the walk
 *              parent_node     - The parent of the new Node
- *              Node            - The new Node to install
+ *              node            - The new Node to install
- *              Type            - ACPI object type of the new Node
+ *              type            - ACPI object type of the new Node
 *
 * RETURN:      None
 *
diff --git a/drivers/acpi/acpica/nsdump.c b/drivers/acpi/acpica/nsdump.c
index 3f7f3f6e7dd5..7ee4e6aeb0a2 100644
--- a/drivers/acpi/acpica/nsdump.c
+++ b/drivers/acpi/acpica/nsdump.c
@@ -63,7 +63,7 @@ acpi_ns_dump_one_device(acpi_handle obj_handle,
 * FUNCTION:    acpi_ns_print_pathname
 *
 * PARAMETERS:  num_segments        - Number of ACPI name segments
- *              Pathname            - The compressed (internal) path
+ *              pathname            - The compressed (internal) path
 *
 * RETURN:      None
 *
@@ -107,10 +107,10 @@ void acpi_ns_print_pathname(u32 num_segments, char *pathname)
 *
 * FUNCTION:    acpi_ns_dump_pathname
 *
- * PARAMETERS:  Handle              - Object
+ * PARAMETERS:  handle              - Object
- *              Msg                 - Prefix message
+ *              msg                 - Prefix message
- *              Level               - Desired debug level
+ *              level               - Desired debug level
- *              Component           - Caller's component ID
+ *              component           - Caller's component ID
 *
 * RETURN:      None
 *
@@ -143,8 +143,8 @@ acpi_ns_dump_pathname(acpi_handle handle, char *msg, u32 level, u32 component)
 * FUNCTION:    acpi_ns_dump_one_object
 *
 * PARAMETERS:  obj_handle          - Node to be dumped
- *              Level               - Nesting level of the handle
+ *              level               - Nesting level of the handle
- *              Context             - Passed into walk_namespace
+ *              context             - Passed into walk_namespace
 *              return_value        - Not used
 *
 * RETURN:      Status
@@ -615,7 +615,7 @@ acpi_ns_dump_one_object(acpi_handle obj_handle,
 *
 * FUNCTION:    acpi_ns_dump_objects
 *
- * PARAMETERS:  Type                - Object type to be dumped
+ * PARAMETERS:  type                - Object type to be dumped
 *              display_type        - 0 or ACPI_DISPLAY_SUMMARY
 *              max_depth           - Maximum depth of dump. Use ACPI_UINT32_MAX
 *                                    for an effectively unlimited depth.
@@ -671,7 +671,7 @@ acpi_ns_dump_objects(acpi_object_type type,
 *
 * FUNCTION:    acpi_ns_dump_entry
 *
- * PARAMETERS:  Handle              - Node to be dumped
+ * PARAMETERS:  handle              - Node to be dumped
 *              debug_level         - Output level
 *
 * RETURN:      None
diff --git a/drivers/acpi/acpica/nsdumpdv.c b/drivers/acpi/acpica/nsdumpdv.c
index 3b5acb0eb406..944d4c8d9438 100644
--- a/drivers/acpi/acpica/nsdumpdv.c
+++ b/drivers/acpi/acpica/nsdumpdv.c
@@ -55,9 +55,9 @@ ACPI_MODULE_NAME("nsdumpdv")
 *
 * FUNCTION:    acpi_ns_dump_one_device
 *
- * PARAMETERS:  Handle              - Node to be dumped
+ * PARAMETERS:  handle              - Node to be dumped
- *              Level               - Nesting level of the handle
+ *              level               - Nesting level of the handle
- *              Context             - Passed into walk_namespace
+ *              context             - Passed into walk_namespace
 *              return_value        - Not used
 *
 * RETURN:      Status
diff --git a/drivers/acpi/acpica/nseval.c b/drivers/acpi/acpica/nseval.c
index f375cb82e321..69074be498e8 100644
--- a/drivers/acpi/acpica/nseval.c
+++ b/drivers/acpi/acpica/nseval.c
@@ -59,11 +59,11 @@ acpi_ns_exec_module_code(union acpi_operand_object *method_obj,
 *
 * FUNCTION:    acpi_ns_evaluate
 *
- * PARAMETERS:  Info            - Evaluation info block, contains:
+ * PARAMETERS:  info            - Evaluation info block, contains:
 *                  prefix_node     - Prefix or Method/Object Node to execute
- *                  Pathname        - Name of method to execute, If NULL, the
+ *                  pathname        - Name of method to execute, If NULL, the
 *                                    Node is the object to execute
- *                  Parameters      - List of parameters to pass to the method,
+ *                  parameters      - List of parameters to pass to the method,
 *                                    terminated by NULL. Params itself may be
 *                                    NULL if no parameters are being passed.
 *                  return_object   - Where to put method's return value (if
@@ -71,7 +71,7 @@ acpi_ns_exec_module_code(union acpi_operand_object *method_obj,
 *                  parameter_type  - Type of Parameter list
 *                  return_object   - Where to put method's return value (if
 *                                    any). If NULL, no value is returned.
- *                  Flags           - ACPI_IGNORE_RETURN_VALUE to delete return
+ *                  flags           - ACPI_IGNORE_RETURN_VALUE to delete return
 *
 * RETURN:      Status
 *
@@ -351,7 +351,7 @@ void acpi_ns_exec_module_code_list(void)
 * FUNCTION:    acpi_ns_exec_module_code
 *
 * PARAMETERS:  method_obj          - Object container for the module-level code
- *              Info                - Info block for method evaluation
+ *              info                - Info block for method evaluation
 *
 * RETURN:      None. Exceptions during method execution are ignored, since
 *              we cannot abort a table load.
diff --git a/drivers/acpi/acpica/nsinit.c b/drivers/acpi/acpica/nsinit.c
index 9d84ec2f0211..95ffe8dfa1f1 100644
--- a/drivers/acpi/acpica/nsinit.c
+++ b/drivers/acpi/acpica/nsinit.c
@@ -224,8 +224,8 @@ acpi_status acpi_ns_initialize_devices(void)
 * FUNCTION:    acpi_ns_init_one_object
 *
 * PARAMETERS:  obj_handle      - Node
- *              Level           - Current nesting level
+ *              level           - Current nesting level
- *              Context         - Points to a init info struct
+ *              context         - Points to a init info struct
 *              return_value    - Not used
 *
 * RETURN:      Status
@@ -530,7 +530,7 @@ acpi_ns_init_one_device(acpi_handle obj_handle,
                         * we will not run _INI, but we continue to examine the children
                         * of this device.
                         *
-                         * From the ACPI spec, description of _STA: (Note - no mention
+                         * From the ACPI spec, description of _STA: (note - no mention
                         * of whether to run _INI or not on the device in question)
                         *
                         * "_STA may return bit 0 clear (not present) with bit 3 set
diff --git a/drivers/acpi/acpica/nsload.c b/drivers/acpi/acpica/nsload.c
index 5cbf15ffe7d8..76935ff29289 100644
--- a/drivers/acpi/acpica/nsload.c
+++ b/drivers/acpi/acpica/nsload.c
@@ -63,7 +63,7 @@ static acpi_status acpi_ns_delete_subtree(acpi_handle start_handle);
 * FUNCTION:    acpi_ns_load_table
 *
 * PARAMETERS:  table_index     - Index for table to be loaded
- *              Node            - Owning NS node
+ *              node            - Owning NS node
 *
 * RETURN:      Status
 *
@@ -278,7 +278,7 @@ static acpi_status acpi_ns_delete_subtree(acpi_handle start_handle)
 *
 *  FUNCTION:       acpi_ns_unload_name_space
 *
- *  PARAMETERS:     Handle          - Root of namespace subtree to be deleted
+ *  PARAMETERS:     handle          - Root of namespace subtree to be deleted
 *
 *  RETURN:         Status
 *
diff --git a/drivers/acpi/acpica/nsnames.c b/drivers/acpi/acpica/nsnames.c
index b20e7c8c3ffb..96e0eb609bb4 100644
--- a/drivers/acpi/acpica/nsnames.c
+++ b/drivers/acpi/acpica/nsnames.c
@@ -53,8 +53,8 @@ ACPI_MODULE_NAME("nsnames")
 *
 * FUNCTION:    acpi_ns_build_external_path
 *
- * PARAMETERS:  Node            - NS node whose pathname is needed
+ * PARAMETERS:  node            - NS node whose pathname is needed
- *              Size            - Size of the pathname
+ *              size            - Size of the pathname
 *              *name_buffer    - Where to return the pathname
 *
 * RETURN:      Status
@@ -120,7 +120,7 @@ acpi_ns_build_external_path(struct acpi_namespace_node *node,
 *
 * FUNCTION:    acpi_ns_get_external_pathname
 *
- * PARAMETERS:  Node            - Namespace node whose pathname is needed
+ * PARAMETERS:  node            - Namespace node whose pathname is needed
 *
 * RETURN:      Pointer to storage containing the fully qualified name of
 *              the node, In external format (name segments separated by path
@@ -168,7 +168,7 @@ char *acpi_ns_get_external_pathname(struct acpi_namespace_node *node)
 *
 * FUNCTION:    acpi_ns_get_pathname_length
 *
- * PARAMETERS:  Node        - Namespace node
+ * PARAMETERS:  node        - Namespace node
 *
 * RETURN:      Length of path, including prefix
 *
@@ -214,7 +214,7 @@ acpi_size acpi_ns_get_pathname_length(struct acpi_namespace_node *node)
 *
 * PARAMETERS:  target_handle           - Handle of named object whose name is
 *                                        to be found
- *              Buffer                  - Where the pathname is returned
+ *              buffer                  - Where the pathname is returned
 *
 * RETURN:      Status, Buffer is filled with pathname if status is AE_OK
 *
diff --git a/drivers/acpi/acpica/nsobject.c b/drivers/acpi/acpica/nsobject.c
index dd77a3ce6e50..d6c9a3cc6716 100644
--- a/drivers/acpi/acpica/nsobject.c
+++ b/drivers/acpi/acpica/nsobject.c
@@ -53,9 +53,9 @@ ACPI_MODULE_NAME("nsobject")
 *
 * FUNCTION:    acpi_ns_attach_object
 *
- * PARAMETERS:  Node                - Parent Node
+ * PARAMETERS:  node                - Parent Node
- *              Object              - Object to be attached
+ *              object              - Object to be attached
- *              Type                - Type of object, or ACPI_TYPE_ANY if not
+ *              type                - Type of object, or ACPI_TYPE_ANY if not
 *                                    known
 *
 * RETURN:      Status
@@ -191,7 +191,7 @@ acpi_ns_attach_object(struct acpi_namespace_node *node,
 *
 * FUNCTION:    acpi_ns_detach_object
 *
- * PARAMETERS:  Node           - A Namespace node whose object will be detached
+ * PARAMETERS:  node           - A Namespace node whose object will be detached
 *
 * RETURN:      None.
 *
@@ -250,7 +250,7 @@ void acpi_ns_detach_object(struct acpi_namespace_node *node)
 *
 * FUNCTION:    acpi_ns_get_attached_object
 *
- * PARAMETERS:  Node             - Namespace node
+ * PARAMETERS:  node             - Namespace node
 *
 * RETURN:      Current value of the object field from the Node whose
 *              handle is passed
@@ -285,7 +285,7 @@ union acpi_operand_object *acpi_ns_get_attached_object(struct
 *
 * FUNCTION:    acpi_ns_get_secondary_object
 *
- * PARAMETERS:  Node             - Namespace node
+ * PARAMETERS:  node             - Namespace node
 *
 * RETURN:      Current value of the object field from the Node whose
 *              handle is passed.
@@ -315,9 +315,9 @@ union acpi_operand_object *acpi_ns_get_secondary_object(union
 *
 * FUNCTION:    acpi_ns_attach_data
 *
- * PARAMETERS:  Node            - Namespace node
+ * PARAMETERS:  node            - Namespace node
- *              Handler         - Handler to be associated with the data
+ *              handler         - Handler to be associated with the data
- *              Data            - Data to be attached
+ *              data            - Data to be attached
 *
 * RETURN:      Status
 *
@@ -372,8 +372,8 @@ acpi_ns_attach_data(struct acpi_namespace_node *node,
 *
 * FUNCTION:    acpi_ns_detach_data
 *
- * PARAMETERS:  Node            - Namespace node
+ * PARAMETERS:  node            - Namespace node
- *              Handler         - Handler associated with the data
+ *              handler         - Handler associated with the data
 *
 * RETURN:      Status
 *
@@ -416,9 +416,9 @@ acpi_ns_detach_data(struct acpi_namespace_node * node,
 *
 * FUNCTION:    acpi_ns_get_attached_data
 *
- * PARAMETERS:  Node            - Namespace node
+ * PARAMETERS:  node            - Namespace node
- *              Handler         - Handler associated with the data
+ *              handler         - Handler associated with the data
- *              Data            - Where the data is returned
+ *              data            - Where the data is returned
 *
 * RETURN:      Status
 *
diff --git a/drivers/acpi/acpica/nspredef.c b/drivers/acpi/acpica/nspredef.c
index 23ce09686418..2419f417ea33 100644
--- a/drivers/acpi/acpica/nspredef.c
+++ b/drivers/acpi/acpica/nspredef.c
@@ -116,7 +116,7 @@ static const char *acpi_rtype_names[] = {
 *
 * FUNCTION:    acpi_ns_check_predefined_names
 *
- * PARAMETERS:  Node            - Namespace node for the method/object
+ * PARAMETERS:  node            - Namespace node for the method/object
 *              user_param_count - Number of parameters actually passed
 *              return_status   - Status from the object evaluation
 *              return_object_ptr - Pointer to the object returned from the
@@ -275,10 +275,10 @@ cleanup:
 *
 * FUNCTION:    acpi_ns_check_parameter_count
 *
- * PARAMETERS:  Pathname        - Full pathname to the node (for error msgs)
+ * PARAMETERS:  pathname        - Full pathname to the node (for error msgs)
- *              Node            - Namespace node for the method/object
+ *              node            - Namespace node for the method/object
 *              user_param_count - Number of args passed in by the caller
- *              Predefined      - Pointer to entry in predefined name table
+ *              predefined      - Pointer to entry in predefined name table
 *
 * RETURN:      None
 *
@@ -364,7 +364,7 @@ acpi_ns_check_parameter_count(char *pathname,
 *
 * FUNCTION:    acpi_ns_check_for_predefined_name
 *
- * PARAMETERS:  Node            - Namespace node for the method/object
+ * PARAMETERS:  node            - Namespace node for the method/object
 *
 * RETURN:      Pointer to entry in predefined table. NULL indicates not found.
 *
@@ -410,7 +410,7 @@ const union acpi_predefined_info *acpi_ns_check_for_predefined_name(struct
 *
 * FUNCTION:    acpi_ns_check_package
 *
- * PARAMETERS:  Data            - Pointer to validation data structure
+ * PARAMETERS:  data            - Pointer to validation data structure
 *              return_object_ptr - Pointer to the object returned from the
 *                                evaluation of a method or object
 *
@@ -638,7 +638,7 @@ acpi_ns_check_package(struct acpi_predefined_data *data,
                        /* Create the new outer package and populate it */
                        status =
-                            acpi_ns_wrap_with_package(data, *elements,
+                            acpi_ns_wrap_with_package(data, return_object,
                                                      return_object_ptr);
                        if (ACPI_FAILURE(status)) {
                                return (status);
@@ -685,11 +685,11 @@ package_too_small:
 *
 * FUNCTION:    acpi_ns_check_package_list
 *
- * PARAMETERS:  Data            - Pointer to validation data structure
+ * PARAMETERS:  data            - Pointer to validation data structure
- *              Package         - Pointer to package-specific info for method
+ *              package         - Pointer to package-specific info for method
- *              Elements        - Element list of parent package. All elements
+ *              elements        - Element list of parent package. All elements
 *                                of this list should be of type Package.
- *              Count           - Count of subpackages
+ *              count           - Count of subpackages
 *
 * RETURN:      Status
 *
@@ -911,12 +911,12 @@ package_too_small:
 *
 * FUNCTION:    acpi_ns_check_package_elements
 *
- * PARAMETERS:  Data            - Pointer to validation data structure
+ * PARAMETERS:  data            - Pointer to validation data structure
- *              Elements        - Pointer to the package elements array
+ *              elements        - Pointer to the package elements array
- *              Type1           - Object type for first group
+ *              type1           - Object type for first group
- *              Count1          - Count for first group
+ *              count1          - Count for first group
- *              Type2           - Object type for second group
+ *              type2           - Object type for second group
- *              Count2          - Count for second group
+ *              count2          - Count for second group
 *              start_index     - Start of the first group of elements
 *
 * RETURN:      Status
@@ -968,7 +968,7 @@ acpi_ns_check_package_elements(struct acpi_predefined_data *data,
 *
 * FUNCTION:    acpi_ns_check_object_type
 *
- * PARAMETERS:  Data            - Pointer to validation data structure
+ * PARAMETERS:  data            - Pointer to validation data structure
 *              return_object_ptr - Pointer to the object returned from the
 *                                evaluation of a method or object
 *              expected_btypes - Bitmap of expected return type(s)
@@ -1102,7 +1102,7 @@ acpi_ns_check_object_type(struct acpi_predefined_data *data,
 *
 * FUNCTION:    acpi_ns_check_reference
 *
- * PARAMETERS:  Data            - Pointer to validation data structure
+ * PARAMETERS:  data            - Pointer to validation data structure
 *              return_object   - Object returned from the evaluation of a
 *                                method or object
 *
@@ -1140,7 +1140,7 @@ acpi_ns_check_reference(struct acpi_predefined_data *data,
 *
 * FUNCTION:    acpi_ns_get_expected_types
 *
- * PARAMETERS:  Buffer          - Pointer to where the string is returned
+ * PARAMETERS:  buffer          - Pointer to where the string is returned
 *              expected_btypes - Bitmap of expected return type(s)
 *
 * RETURN:      Buffer is populated with type names.
diff --git a/drivers/acpi/acpica/nsrepair.c b/drivers/acpi/acpica/nsrepair.c
index 5519a64a353f..8c5f292860fc 100644
--- a/drivers/acpi/acpica/nsrepair.c
+++ b/drivers/acpi/acpica/nsrepair.c
@@ -94,7 +94,7 @@ acpi_ns_convert_to_buffer(union acpi_operand_object *original_object,
 *
 * FUNCTION:    acpi_ns_repair_object
 *
- * PARAMETERS:  Data                - Pointer to validation data structure
+ * PARAMETERS:  data                - Pointer to validation data structure
 *              expected_btypes     - Object types expected
 *              package_index       - Index of object within parent package (if
 *                                    applicable - ACPI_NOT_PACKAGE_ELEMENT
@@ -470,7 +470,7 @@ acpi_ns_convert_to_buffer(union acpi_operand_object *original_object,
 *
 * FUNCTION:    acpi_ns_repair_null_element
 *
- * PARAMETERS:  Data                - Pointer to validation data structure
+ * PARAMETERS:  data                - Pointer to validation data structure
 *              expected_btypes     - Object types expected
 *              package_index       - Index of object within parent package (if
 *                                    applicable - ACPI_NOT_PACKAGE_ELEMENT
@@ -509,17 +509,17 @@ acpi_ns_repair_null_element(struct acpi_predefined_data *data,
         */
        if (expected_btypes & ACPI_RTYPE_INTEGER) {
-                /* Need an Integer - create a zero-value integer */
+                /* Need an integer - create a zero-value integer */
                new_object = acpi_ut_create_integer_object((u64)0);
        } else if (expected_btypes & ACPI_RTYPE_STRING) {
-                /* Need a String - create a NULL string */
+                /* Need a string - create a NULL string */
                new_object = acpi_ut_create_string_object(0);
        } else if (expected_btypes & ACPI_RTYPE_BUFFER) {
-                /* Need a Buffer - create a zero-length buffer */
+                /* Need a buffer - create a zero-length buffer */
                new_object = acpi_ut_create_buffer_object(0);
        } else {
@@ -552,7 +552,7 @@ acpi_ns_repair_null_element(struct acpi_predefined_data *data,
 *
 * FUNCTION:    acpi_ns_remove_null_elements
 *
- * PARAMETERS:  Data                - Pointer to validation data structure
+ * PARAMETERS:  data                - Pointer to validation data structure
 *              package_type        - An acpi_return_package_types value
 *              obj_desc            - A Package object
 *
@@ -635,7 +635,7 @@ acpi_ns_remove_null_elements(struct acpi_predefined_data *data,
 *
 * FUNCTION:    acpi_ns_wrap_with_package
 *
- * PARAMETERS:  Data                - Pointer to validation data structure
+ * PARAMETERS:  data                - Pointer to validation data structure
 *              original_object     - Pointer to the object to repair.
 *              obj_desc_ptr        - The new package object is returned here
 *
diff --git a/drivers/acpi/acpica/nsrepair2.c b/drivers/acpi/acpica/nsrepair2.c
index 726bc8e687f7..90189251cdf0 100644
--- a/drivers/acpi/acpica/nsrepair2.c
+++ b/drivers/acpi/acpica/nsrepair2.c
@@ -149,8 +149,8 @@ static const struct acpi_repair_info acpi_ns_repairable_names[] = {
 *
 * FUNCTION:    acpi_ns_complex_repairs
 *
- * PARAMETERS:  Data                - Pointer to validation data structure
+ * PARAMETERS:  data                - Pointer to validation data structure
- *              Node                - Namespace node for the method/object
+ *              node                - Namespace node for the method/object
 *              validate_status     - Original status of earlier validation
 *              return_object_ptr   - Pointer to the object returned from the
 *                                    evaluation of a method or object
@@ -187,7 +187,7 @@ acpi_ns_complex_repairs(struct acpi_predefined_data *data,
 *
 * FUNCTION:    acpi_ns_match_repairable_name
 *
- * PARAMETERS:  Node                - Namespace node for the method/object
+ * PARAMETERS:  node                - Namespace node for the method/object
 *
 * RETURN:      Pointer to entry in repair table. NULL indicates not found.
 *
@@ -218,7 +218,7 @@ static const struct acpi_repair_info *acpi_ns_match_repairable_name(struct
 *
 * FUNCTION:    acpi_ns_repair_ALR
 *
- * PARAMETERS:  Data                - Pointer to validation data structure
+ * PARAMETERS:  data                - Pointer to validation data structure
 *              return_object_ptr   - Pointer to the object returned from the
 *                                    evaluation of a method or object
 *
@@ -247,7 +247,7 @@ acpi_ns_repair_ALR(struct acpi_predefined_data *data,
 *
 * FUNCTION:    acpi_ns_repair_FDE
 *
- * PARAMETERS:  Data                - Pointer to validation data structure
+ * PARAMETERS:  data                - Pointer to validation data structure
 *              return_object_ptr   - Pointer to the object returned from the
 *                                    evaluation of a method or object
 *
@@ -335,7 +335,7 @@ acpi_ns_repair_FDE(struct acpi_predefined_data *data,
 *
 * FUNCTION:    acpi_ns_repair_CID
 *
- * PARAMETERS:  Data                - Pointer to validation data structure
+ * PARAMETERS:  data                - Pointer to validation data structure
 *              return_object_ptr   - Pointer to the object returned from the
 *                                    evaluation of a method or object
 *
@@ -405,7 +405,7 @@ acpi_ns_repair_CID(struct acpi_predefined_data *data,
 *
 * FUNCTION:    acpi_ns_repair_HID
 *
- * PARAMETERS:  Data                - Pointer to validation data structure
+ * PARAMETERS:  data                - Pointer to validation data structure
 *              return_object_ptr   - Pointer to the object returned from the
 *                                    evaluation of a method or object
 *
@@ -487,7 +487,7 @@ acpi_ns_repair_HID(struct acpi_predefined_data *data,
 *
 * FUNCTION:    acpi_ns_repair_TSS
 *
- * PARAMETERS:  Data                - Pointer to validation data structure
+ * PARAMETERS:  data                - Pointer to validation data structure
 *              return_object_ptr   - Pointer to the object returned from the
 *                                    evaluation of a method or object
 *
@@ -531,7 +531,7 @@ acpi_ns_repair_TSS(struct acpi_predefined_data *data,
 *
 * FUNCTION:    acpi_ns_repair_PSS
 *
- * PARAMETERS:  Data                - Pointer to validation data structure
+ * PARAMETERS:  data                - Pointer to validation data structure
 *              return_object_ptr   - Pointer to the object returned from the
 *                                    evaluation of a method or object
 *
@@ -600,7 +600,7 @@ acpi_ns_repair_PSS(struct acpi_predefined_data *data,
 *
 * FUNCTION:    acpi_ns_check_sorted_list
 *
- * PARAMETERS:  Data                - Pointer to validation data structure
+ * PARAMETERS:  data                - Pointer to validation data structure
 *              return_object       - Pointer to the top-level returned object
 *              expected_count      - Minimum length of each sub-package
 *              sort_index          - Sub-package entry to sort on
@@ -707,9 +707,9 @@ acpi_ns_check_sorted_list(struct acpi_predefined_data *data,
 *
 * FUNCTION:    acpi_ns_sort_list
 *
- * PARAMETERS:  Elements            - Package object element list
+ * PARAMETERS:  elements            - Package object element list
- *              Count               - Element count for above
+ *              count               - Element count for above
- *              Index               - Sort by which package element
+ *              index               - Sort by which package element
 *              sort_direction      - Ascending or Descending sort
 *
 * RETURN:      None
diff --git a/drivers/acpi/acpica/nssearch.c b/drivers/acpi/acpica/nssearch.c
index 507043d66114..456cc859f869 100644
--- a/drivers/acpi/acpica/nssearch.c
+++ b/drivers/acpi/acpica/nssearch.c
@@ -65,7 +65,7 @@ acpi_ns_search_parent_tree(u32 target_name,
 *
 * PARAMETERS:  target_name     - Ascii ACPI name to search for
 *              parent_node     - Starting node where search will begin
- *              Type            - Object type to match
+ *              type            - Object type to match
 *              return_node     - Where the matched Named obj is returned
 *
 * RETURN:      Status
@@ -175,8 +175,8 @@ acpi_ns_search_one_scope(u32 target_name,
 * FUNCTION:    acpi_ns_search_parent_tree
 *
 * PARAMETERS:  target_name     - Ascii ACPI name to search for
- *              Node            - Starting node where search will begin
+ *              node            - Starting node where search will begin
- *              Type            - Object type to match
+ *              type            - Object type to match
 *              return_node     - Where the matched Node is returned
 *
 * RETURN:      Status
@@ -264,11 +264,11 @@ acpi_ns_search_parent_tree(u32 target_name,
 *
 * PARAMETERS:  target_name         - Ascii ACPI name to search for (4 chars)
 *              walk_state          - Current state of the walk
- *              Node                - Starting node where search will begin
+ *              node                - Starting node where search will begin
 *              interpreter_mode    - Add names only in ACPI_MODE_LOAD_PASS_x.
 *                                    Otherwise,search only.
- *              Type                - Object type to match
+ *              type                - Object type to match
- *              Flags               - Flags describing the search restrictions
+ *              flags               - Flags describing the search restrictions
 *              return_node         - Where the Node is returned
 *
 * RETURN:      Status
diff --git a/drivers/acpi/acpica/nsutils.c b/drivers/acpi/acpica/nsutils.c
index 75113759f69d..ef753a41e087 100644
--- a/drivers/acpi/acpica/nsutils.c
+++ b/drivers/acpi/acpica/nsutils.c
@@ -62,8 +62,8 @@ acpi_name acpi_ns_find_parent_name(struct acpi_namespace_node *node_to_search);
 *
 * FUNCTION:    acpi_ns_print_node_pathname
 *
- * PARAMETERS:  Node            - Object
+ * PARAMETERS:  node            - Object
- *              Message         - Prefix message
+ *              message         - Prefix message
 *
 * DESCRIPTION: Print an object's full namespace pathname
 *              Manages allocation/freeing of a pathname buffer
@@ -101,7 +101,7 @@ acpi_ns_print_node_pathname(struct acpi_namespace_node *node,
 *
 * FUNCTION:    acpi_ns_valid_root_prefix
 *
- * PARAMETERS:  Prefix          - Character to be checked
+ * PARAMETERS:  prefix          - Character to be checked
 *
 * RETURN:      TRUE if a valid prefix
 *
@@ -119,7 +119,7 @@ u8 acpi_ns_valid_root_prefix(char prefix)
 *
 * FUNCTION:    acpi_ns_valid_path_separator
 *
- * PARAMETERS:  Sep         - Character to be checked
+ * PARAMETERS:  sep         - Character to be checked
 *
 * RETURN:      TRUE if a valid path separator
 *
@@ -137,7 +137,7 @@ static u8 acpi_ns_valid_path_separator(char sep)
 *
 * FUNCTION:    acpi_ns_get_type
 *
- * PARAMETERS:  Node        - Parent Node to be examined
+ * PARAMETERS:  node        - Parent Node to be examined
 *
 * RETURN:      Type field from Node whose handle is passed
 *
@@ -161,7 +161,7 @@ acpi_object_type acpi_ns_get_type(struct acpi_namespace_node * node)
 *
 * FUNCTION:    acpi_ns_local
 *
- * PARAMETERS:  Type        - A namespace object type
+ * PARAMETERS:  type        - A namespace object type
 *
 * RETURN:      LOCAL if names must be found locally in objects of the
 *              passed type, 0 if enclosing scopes should be searched
@@ -189,7 +189,7 @@ u32 acpi_ns_local(acpi_object_type type)
 *
 * FUNCTION:    acpi_ns_get_internal_name_length
 *
- * PARAMETERS:  Info            - Info struct initialized with the
+ * PARAMETERS:  info            - Info struct initialized with the
 *                                external name pointer.
 *
 * RETURN:      None
@@ -260,7 +260,7 @@ void acpi_ns_get_internal_name_length(struct acpi_namestring_info *info)
 *
 * FUNCTION:    acpi_ns_build_internal_name
 *
- * PARAMETERS:  Info            - Info struct fully initialized
+ * PARAMETERS:  info            - Info struct fully initialized
 *
 * RETURN:      Status
 *
@@ -371,7 +371,7 @@ acpi_status acpi_ns_build_internal_name(struct acpi_namestring_info *info)
 * FUNCTION:    acpi_ns_internalize_name
 *
 * PARAMETERS:  *external_name          - External representation of name
- *              **Converted Name        - Where to return the resulting
+ *              **Converted name        - Where to return the resulting
 *                                        internal represention of the name
 *
 * RETURN:      Status
@@ -575,7 +575,7 @@ acpi_ns_externalize_name(u32 internal_name_length,
 *
 * FUNCTION:    acpi_ns_validate_handle
 *
- * PARAMETERS:  Handle          - Handle to be validated and typecast to a
+ * PARAMETERS:  handle          - Handle to be validated and typecast to a
 *                                namespace node.
 *
 * RETURN:      A pointer to a namespace node
@@ -651,7 +651,7 @@ void acpi_ns_terminate(void)
 *
 * FUNCTION:    acpi_ns_opens_scope
 *
- * PARAMETERS:  Type        - A valid namespace type
+ * PARAMETERS:  type        - A valid namespace type
 *
 * RETURN:      NEWSCOPE if the passed type "opens a name scope" according
 *              to the ACPI specification, else 0
@@ -677,14 +677,14 @@ u32 acpi_ns_opens_scope(acpi_object_type type)
 *
 * FUNCTION:    acpi_ns_get_node
 *
- * PARAMETERS:  *Pathname   - Name to be found, in external (ASL) format. The
+ * PARAMETERS:  *pathname   - Name to be found, in external (ASL) format. The
 *                            \ (backslash) and ^ (carat) prefixes, and the
 *                            . (period) to separate segments are supported.
 *              prefix_node  - Root of subtree to be searched, or NS_ALL for the
 *                            root of the name space.  If Name is fully
 *                            qualified (first s8 is '\'), the passed value
 *                            of Scope will not be accessed.
- *              Flags       - Used to indicate whether to perform upsearch or
+ *              flags       - Used to indicate whether to perform upsearch or
 *                            not.
 *              return_node - Where the Node is returned
 *
diff --git a/drivers/acpi/acpica/nswalk.c b/drivers/acpi/acpica/nswalk.c
index f69895a54895..730bccc5e7f7 100644
--- a/drivers/acpi/acpica/nswalk.c
+++ b/drivers/acpi/acpica/nswalk.c
@@ -88,7 +88,7 @@ struct acpi_namespace_node *acpi_ns_get_next_node(struct acpi_namespace_node
 *
 * FUNCTION:    acpi_ns_get_next_node_typed
 *
- * PARAMETERS:  Type                - Type of node to be searched for
+ * PARAMETERS:  type                - Type of node to be searched for
 *              parent_node         - Parent node whose children we are
 *                                    getting
 *              child_node          - Previous child that was found.
@@ -151,16 +151,16 @@ struct acpi_namespace_node *acpi_ns_get_next_node_typed(acpi_object_type type,
 *
 * FUNCTION:    acpi_ns_walk_namespace
 *
- * PARAMETERS:  Type                - acpi_object_type to search for
+ * PARAMETERS:  type                - acpi_object_type to search for
 *              start_node          - Handle in namespace where search begins
 *              max_depth           - Depth to which search is to reach
- *              Flags               - Whether to unlock the NS before invoking
+ *              flags               - Whether to unlock the NS before invoking
 *                                    the callback routine
 *              pre_order_visit     - Called during tree pre-order visit
 *                                    when an object of "Type" is found
 *              post_order_visit    - Called during tree post-order visit
 *                                    when an object of "Type" is found
- *              Context             - Passed to user function(s) above
+ *              context             - Passed to user function(s) above
 *              return_value        - from the user_function if terminated
 *                                    early. Otherwise, returns NULL.
 * RETURNS:     Status
diff --git a/drivers/acpi/acpica/nsxfeval.c b/drivers/acpi/acpica/nsxfeval.c
index 71d15f61807b..9692e6702333 100644
--- a/drivers/acpi/acpica/nsxfeval.c
+++ b/drivers/acpi/acpica/nsxfeval.c
@@ -58,8 +58,8 @@ static void acpi_ns_resolve_references(struct acpi_evaluate_info *info);
 *
 * FUNCTION:    acpi_evaluate_object_typed
 *
- * PARAMETERS:  Handle              - Object handle (optional)
+ * PARAMETERS:  handle              - Object handle (optional)
- *              Pathname            - Object pathname (optional)
+ *              pathname            - Object pathname (optional)
 *              external_params     - List of parameters to pass to method,
 *                                    terminated by NULL.  May be NULL
 *                                    if no parameters are being passed.
@@ -152,8 +152,8 @@ ACPI_EXPORT_SYMBOL(acpi_evaluate_object_typed)
 *
 * FUNCTION:    acpi_evaluate_object
 *
- * PARAMETERS:  Handle              - Object handle (optional)
+ * PARAMETERS:  handle              - Object handle (optional)
- *              Pathname            - Object pathname (optional)
+ *              pathname            - Object pathname (optional)
 *              external_params     - List of parameters to pass to method,
 *                                    terminated by NULL.  May be NULL
 *                                    if no parameters are being passed.
@@ -364,7 +364,7 @@ ACPI_EXPORT_SYMBOL(acpi_evaluate_object)
 *
 * FUNCTION:    acpi_ns_resolve_references
 *
- * PARAMETERS:  Info                    - Evaluation info block
+ * PARAMETERS:  info                    - Evaluation info block
 *
 * RETURN:      Info->return_object is replaced with the dereferenced object
 *
@@ -431,14 +431,14 @@ static void acpi_ns_resolve_references(struct acpi_evaluate_info *info)
 *
 * FUNCTION:    acpi_walk_namespace
 *
- * PARAMETERS:  Type                - acpi_object_type to search for
+ * PARAMETERS:  type                - acpi_object_type to search for
 *              start_object        - Handle in namespace where search begins
 *              max_depth           - Depth to which search is to reach
 *              pre_order_visit     - Called during tree pre-order visit
 *                                    when an object of "Type" is found
 *              post_order_visit    - Called during tree post-order visit
 *                                    when an object of "Type" is found
- *              Context             - Passed to user function(s) above
+ *              context             - Passed to user function(s) above
 *              return_value        - Location where return value of
 *                                    user_function is put if terminated early
 *
@@ -646,7 +646,7 @@ acpi_ns_get_device_callback(acpi_handle obj_handle,
 *
 * PARAMETERS:  HID                 - HID to search for. Can be NULL.
 *              user_function       - Called when a matching object is found
- *              Context             - Passed to user function
+ *              context             - Passed to user function
 *              return_value        - Location where return value of
 *                                    user_function is put if terminated early
 *
@@ -716,8 +716,8 @@ ACPI_EXPORT_SYMBOL(acpi_get_devices)
 * FUNCTION:    acpi_attach_data
 *
 * PARAMETERS:  obj_handle          - Namespace node
- *              Handler             - Handler for this attachment
+ *              handler             - Handler for this attachment
- *              Data                - Pointer to data to be attached
+ *              data                - Pointer to data to be attached
 *
 * RETURN:      Status
 *
@@ -764,7 +764,7 @@ ACPI_EXPORT_SYMBOL(acpi_attach_data)
 * FUNCTION:    acpi_detach_data
 *
 * PARAMETERS:  obj_handle          - Namespace node handle
- *              Handler             - Handler used in call to acpi_attach_data
+ *              handler             - Handler used in call to acpi_attach_data
 *
 * RETURN:      Status
 *
@@ -810,8 +810,8 @@ ACPI_EXPORT_SYMBOL(acpi_detach_data)
 * FUNCTION:    acpi_get_data
 *
 * PARAMETERS:  obj_handle          - Namespace node
- *              Handler             - Handler used in call to attach_data
+ *              handler             - Handler used in call to attach_data
- *              Data                - Where the data is returned
+ *              data                - Where the data is returned
 *
 * RETURN:      Status
 *
diff --git a/drivers/acpi/acpica/nsxfname.c b/drivers/acpi/acpica/nsxfname.c
index af401c9c4dfc..08e9610b34ca 100644
--- a/drivers/acpi/acpica/nsxfname.c
+++ b/drivers/acpi/acpica/nsxfname.c
@@ -61,8 +61,8 @@ static char *acpi_ns_copy_device_id(struct acpica_device_id *dest,
 *
 * FUNCTION:    acpi_get_handle
 *
- * PARAMETERS:  Parent          - Object to search under (search scope).
+ * PARAMETERS:  parent          - Object to search under (search scope).
- *              Pathname        - Pointer to an asciiz string containing the
+ *              pathname        - Pointer to an asciiz string containing the
 *                                name
 *              ret_handle      - Where the return handle is returned
 *
@@ -142,9 +142,9 @@ ACPI_EXPORT_SYMBOL(acpi_get_handle)
 *
 * FUNCTION:    acpi_get_name
 *
- * PARAMETERS:  Handle          - Handle to be converted to a pathname
+ * PARAMETERS:  handle          - Handle to be converted to a pathname
 *              name_type       - Full pathname or single segment
- *              Buffer          - Buffer for returned path
+ *              buffer          - Buffer for returned path
 *
 * RETURN:      Pointer to a string containing the fully qualified Name.
 *
@@ -219,8 +219,8 @@ ACPI_EXPORT_SYMBOL(acpi_get_name)
 *
 * FUNCTION:    acpi_ns_copy_device_id
 *
- * PARAMETERS:  Dest                - Pointer to the destination DEVICE_ID
+ * PARAMETERS:  dest                - Pointer to the destination DEVICE_ID
- *              Source              - Pointer to the source DEVICE_ID
+ *              source              - Pointer to the source DEVICE_ID
 *              string_area         - Pointer to where to copy the dest string
 *
 * RETURN:      Pointer to the next string area
@@ -247,7 +247,7 @@ static char *acpi_ns_copy_device_id(struct acpica_device_id *dest,
 *
 * FUNCTION:    acpi_get_object_info
 *
- * PARAMETERS:  Handle              - Object Handle
+ * PARAMETERS:  handle              - Object Handle
 *              return_buffer       - Where the info is returned
 *
 * RETURN:      Status
@@ -493,7 +493,7 @@ ACPI_EXPORT_SYMBOL(acpi_get_object_info)
 *
 * FUNCTION:    acpi_install_method
 *
- * PARAMETERS:  Buffer         - An ACPI table containing one control method
+ * PARAMETERS:  buffer         - An ACPI table containing one control method
 *
 * RETURN:      Status
 *
diff --git a/drivers/acpi/acpica/nsxfobj.c b/drivers/acpi/acpica/nsxfobj.c
index 880a605cee20..6766fc4f088f 100644
--- a/drivers/acpi/acpica/nsxfobj.c
+++ b/drivers/acpi/acpica/nsxfobj.c
@@ -98,7 +98,7 @@ ACPI_EXPORT_SYMBOL(acpi_get_id)
 *
 * FUNCTION:    acpi_get_type
 *
- * PARAMETERS:  Handle          - Handle of object whose type is desired
+ * PARAMETERS:  handle          - Handle of object whose type is desired
 *              ret_type        - Where the type will be placed
 *
 * RETURN:      Status
@@ -151,7 +151,7 @@ ACPI_EXPORT_SYMBOL(acpi_get_type)
 *
 * FUNCTION:    acpi_get_parent
 *
- * PARAMETERS:  Handle          - Handle of object whose parent is desired
+ * PARAMETERS:  handle          - Handle of object whose parent is desired
 *              ret_handle      - Where the parent handle will be placed
 *
 * RETURN:      Status
@@ -212,8 +212,8 @@ ACPI_EXPORT_SYMBOL(acpi_get_parent)
 *
 * FUNCTION:    acpi_get_next_object
 *
- * PARAMETERS:  Type            - Type of object to be searched for
+ * PARAMETERS:  type            - Type of object to be searched for
- *              Parent          - Parent object whose children we are getting
+ *              parent          - Parent object whose children we are getting
 *              last_child      - Previous child that was found.
 *                                The NEXT child will be returned
 *              ret_handle      - Where handle to the next object is placed
diff --git a/drivers/acpi/acpica/psargs.c b/drivers/acpi/acpica/psargs.c
index 5ac36aba507c..844464c4f901 100644
--- a/drivers/acpi/acpica/psargs.c
+++ b/drivers/acpi/acpica/psargs.c
@@ -210,7 +210,7 @@ char *acpi_ps_get_next_namestring(struct acpi_parse_state *parser_state)
 * FUNCTION:    acpi_ps_get_next_namepath
 *
 * PARAMETERS:  parser_state        - Current parser state object
- *              Arg                 - Where the namepath will be stored
+ *              arg                 - Where the namepath will be stored
 *              arg_count           - If the namepath points to a control method
 *                                    the method's argument is returned here.
 *              possible_method_call - Whether the namepath can possibly be the
@@ -379,7 +379,7 @@ acpi_ps_get_next_namepath(struct acpi_walk_state *walk_state,
 *
 * PARAMETERS:  parser_state        - Current parser state object
 *              arg_type            - The argument type (AML_*_ARG)
- *              Arg                 - Where the argument is returned
+ *              arg                 - Where the argument is returned
 *
 * RETURN:      None
 *
@@ -618,6 +618,7 @@ static union acpi_parse_object *acpi_ps_get_next_field(struct acpi_parse_state
                                arg = acpi_ps_alloc_op(AML_INT_BYTELIST_OP);
                                if (!arg) {
+                                        acpi_ps_free_op(field);
                                        return_PTR(NULL);
                                }
@@ -662,6 +663,7 @@ static union acpi_parse_object *acpi_ps_get_next_field(struct acpi_parse_state
                } else {
                        arg = acpi_ps_alloc_op(AML_INT_NAMEPATH_OP);
                        if (!arg) {
+                                acpi_ps_free_op(field);
                                return_PTR(NULL);
                        }
diff --git a/drivers/acpi/acpica/psloop.c b/drivers/acpi/acpica/psloop.c
index 9547ad8a620b..799162c1b6df 100644
--- a/drivers/acpi/acpica/psloop.c
+++ b/drivers/acpi/acpica/psloop.c
@@ -167,7 +167,7 @@ static acpi_status acpi_ps_get_aml_opcode(struct acpi_walk_state *walk_state)
 * PARAMETERS:  walk_state          - Current state
 *              aml_op_start        - Begin of named Op in AML
 *              unnamed_op          - Early Op (not a named Op)
- *              Op                  - Returned Op
+ *              op                  - Returned Op
 *
 * RETURN:      Status
 *
@@ -323,7 +323,7 @@ acpi_ps_create_op(struct acpi_walk_state *walk_state,
        if (walk_state->op_info->flags & AML_CREATE) {
                /*
-                 * Backup to beginning of create_xXXfield declaration
+                 * Backup to beginning of create_XXXfield declaration
                 * body_length is unknown until we parse the body
                 */
                op->named.data = aml_op_start;
@@ -380,7 +380,7 @@ acpi_ps_create_op(struct acpi_walk_state *walk_state,
 *
 * PARAMETERS:  walk_state          - Current state
 *              aml_op_start        - Op start in AML
- *              Op                  - Current Op
+ *              op                  - Current Op
 *
 * RETURN:      Status
 *
@@ -679,8 +679,8 @@ acpi_ps_link_module_code(union acpi_parse_object *parent_op,
 * FUNCTION:    acpi_ps_complete_op
 *
 * PARAMETERS:  walk_state          - Current state
- *              Op                  - Returned Op
+ *              op                  - Returned Op
- *              Status              - Parse status before complete Op
+ *              status              - Parse status before complete Op
 *
 * RETURN:      Status
 *
@@ -853,8 +853,8 @@ acpi_ps_complete_op(struct acpi_walk_state *walk_state,
 * FUNCTION:    acpi_ps_complete_final_op
 *
 * PARAMETERS:  walk_state          - Current state
- *              Op                  - Current Op
+ *              op                  - Current Op
- *              Status              - Current parse status before complete last
+ *              status              - Current parse status before complete last
 *                                    Op
 *
 * RETURN:      Status
@@ -1165,7 +1165,7 @@ acpi_status acpi_ps_parse_loop(struct acpi_walk_state *walk_state)
                if (walk_state->op_info->flags & AML_CREATE) {
                        /*
-                         * Backup to beginning of create_xXXfield declaration (1 for
+                         * Backup to beginning of create_XXXfield declaration (1 for
                         * Opcode)
                         *
                         * body_length is unknown until we parse the body
diff --git a/drivers/acpi/acpica/psopcode.c b/drivers/acpi/acpica/psopcode.c
index a0226fdcf75c..ed1d457bd5ca 100644
--- a/drivers/acpi/acpica/psopcode.c
+++ b/drivers/acpi/acpica/psopcode.c
@@ -724,7 +724,7 @@ static const u8 acpi_gbl_long_op_index[NUM_EXTENDED_OPCODE] = {
 *
 * FUNCTION:    acpi_ps_get_opcode_info
 *
- * PARAMETERS:  Opcode              - The AML opcode
+ * PARAMETERS:  opcode              - The AML opcode
 *
 * RETURN:      A pointer to the info about the opcode.
 *
@@ -769,7 +769,7 @@ const struct acpi_opcode_info *acpi_ps_get_opcode_info(u16 opcode)
 *
 * FUNCTION:    acpi_ps_get_opcode_name
 *
- * PARAMETERS:  Opcode              - The AML opcode
+ * PARAMETERS:  opcode              - The AML opcode
 *
 * RETURN:      A pointer to the name of the opcode (ASCII String)
 *              Note: Never returns NULL.
diff --git a/drivers/acpi/acpica/psparse.c b/drivers/acpi/acpica/psparse.c
index 2ff9c35a1968..01985703bb98 100644
--- a/drivers/acpi/acpica/psparse.c
+++ b/drivers/acpi/acpica/psparse.c
@@ -64,7 +64,7 @@ ACPI_MODULE_NAME("psparse")
 *
 * FUNCTION:    acpi_ps_get_opcode_size
 *
- * PARAMETERS:  Opcode          - An AML opcode
+ * PARAMETERS:  opcode          - An AML opcode
 *
 * RETURN:      Size of the opcode, in bytes (1 or 2)
 *
@@ -121,7 +121,7 @@ u16 acpi_ps_peek_opcode(struct acpi_parse_state * parser_state)
 * FUNCTION:    acpi_ps_complete_this_op
 *
 * PARAMETERS:  walk_state      - Current State
- *              Op              - Op to complete
+ *              op              - Op to complete
 *
 * RETURN:      Status
 *
@@ -311,7 +311,7 @@ acpi_ps_complete_this_op(struct acpi_walk_state * walk_state,
 * FUNCTION:    acpi_ps_next_parse_state
 *
 * PARAMETERS:  walk_state          - Current state
- *              Op                  - Current parse op
+ *              op                  - Current parse op
 *              callback_status     - Status from previous operation
 *
 * RETURN:      Status
diff --git a/drivers/acpi/acpica/psscope.c b/drivers/acpi/acpica/psscope.c
index c872aa4b926e..608dc20dc173 100644
--- a/drivers/acpi/acpica/psscope.c
+++ b/drivers/acpi/acpica/psscope.c
@@ -93,7 +93,7 @@ u8 acpi_ps_has_completed_scope(struct acpi_parse_state * parser_state)
 * FUNCTION:    acpi_ps_init_scope
 *
 * PARAMETERS:  parser_state        - Current parser state object
- *              Root                - the Root Node of this new scope
+ *              root                - the Root Node of this new scope
 *
 * RETURN:      Status
 *
@@ -131,7 +131,7 @@ acpi_ps_init_scope(struct acpi_parse_state * parser_state,
 * FUNCTION:    acpi_ps_push_scope
 *
 * PARAMETERS:  parser_state        - Current parser state object
- *              Op                  - Current op to be pushed
+ *              op                  - Current op to be pushed
 *              remaining_args      - List of args remaining
 *              arg_count           - Fixed or variable number of args
 *
@@ -184,7 +184,7 @@ acpi_ps_push_scope(struct acpi_parse_state *parser_state,
 * FUNCTION:    acpi_ps_pop_scope
 *
 * PARAMETERS:  parser_state        - Current parser state object
- *              Op                  - Where the popped op is returned
+ *              op                  - Where the popped op is returned
 *              arg_list            - Where the popped "next argument" is
 *                                    returned
 *              arg_count           - Count of objects in arg_list
diff --git a/drivers/acpi/acpica/pstree.c b/drivers/acpi/acpica/pstree.c
index 2b03cdbbe1c0..fdb2e71f3046 100644
--- a/drivers/acpi/acpica/pstree.c
+++ b/drivers/acpi/acpica/pstree.c
@@ -58,8 +58,8 @@ union acpi_parse_object *acpi_ps_get_child(union acpi_parse_object *op);
 *
 * FUNCTION:    acpi_ps_get_arg
 *
- * PARAMETERS:  Op              - Get an argument for this op
+ * PARAMETERS:  op              - Get an argument for this op
- *              Argn            - Nth argument to get
+ *              argn            - Nth argument to get
 *
 * RETURN:      The argument (as an Op object). NULL if argument does not exist
 *
@@ -114,8 +114,8 @@ union acpi_parse_object *acpi_ps_get_arg(union acpi_parse_object *op, u32 argn)
 *
 * FUNCTION:    acpi_ps_append_arg
 *
- * PARAMETERS:  Op              - Append an argument to this Op.
+ * PARAMETERS:  op              - Append an argument to this Op.
- *              Arg             - Argument Op to append
+ *              arg             - Argument Op to append
 *
 * RETURN:      None.
 *
@@ -188,8 +188,8 @@ acpi_ps_append_arg(union acpi_parse_object *op, union acpi_parse_object *arg)
 *
 * FUNCTION:    acpi_ps_get_depth_next
 *
- * PARAMETERS:  Origin          - Root of subtree to search
+ * PARAMETERS:  origin          - Root of subtree to search
- *              Op              - Last (previous) Op that was found
+ *              op              - Last (previous) Op that was found
 *
 * RETURN:      Next Op found in the search.
 *
@@ -261,7 +261,7 @@ union acpi_parse_object *acpi_ps_get_depth_next(union acpi_parse_object *origin,
 *
 * FUNCTION:    acpi_ps_get_child
 *
- * PARAMETERS:  Op              - Get the child of this Op
+ * PARAMETERS:  op              - Get the child of this Op
 *
 * RETURN:      Child Op, Null if none is found.
 *
diff --git a/drivers/acpi/acpica/psutils.c b/drivers/acpi/acpica/psutils.c
index 13bb131ae125..8736ad5f04d3 100644
--- a/drivers/acpi/acpica/psutils.c
+++ b/drivers/acpi/acpica/psutils.c
@@ -77,8 +77,8 @@ union acpi_parse_object *acpi_ps_create_scope_op(void)
 *
 * FUNCTION:    acpi_ps_init_op
 *
- * PARAMETERS:  Op              - A newly allocated Op object
+ * PARAMETERS:  op              - A newly allocated Op object
- *              Opcode          - Opcode to store in the Op
+ *              opcode          - Opcode to store in the Op
 *
 * RETURN:      None
 *
@@ -103,7 +103,7 @@ void acpi_ps_init_op(union acpi_parse_object *op, u16 opcode)
 *
 * FUNCTION:    acpi_ps_alloc_op
 *
- * PARAMETERS:  Opcode          - Opcode that will be stored in the new Op
+ * PARAMETERS:  opcode          - Opcode that will be stored in the new Op
 *
 * RETURN:      Pointer to the new Op, null on failure
 *
@@ -160,7 +160,7 @@ union acpi_parse_object *acpi_ps_alloc_op(u16 opcode)
 *
 * FUNCTION:    acpi_ps_free_op
 *
- * PARAMETERS:  Op              - Op to be freed
+ * PARAMETERS:  op              - Op to be freed
 *
 * RETURN:      None.
 *
diff --git a/drivers/acpi/acpica/psxface.c b/drivers/acpi/acpica/psxface.c
index 9d98c5ff66a5..963e16225797 100644
--- a/drivers/acpi/acpica/psxface.c
+++ b/drivers/acpi/acpica/psxface.c
@@ -66,7 +66,7 @@ acpi_ps_update_parameter_list(struct acpi_evaluate_info *info, u16 action);
 * PARAMETERS:  method_name     - Valid ACPI name string
 *              debug_level     - Optional level mask. 0 to use default
 *              debug_layer     - Optional layer mask. 0 to use default
- *              Flags           - bit 1: one shot(1) or persistent(0)
+ *              flags           - bit 1: one shot(1) or persistent(0)
 *
 * RETURN:      Status
 *
@@ -105,7 +105,7 @@ acpi_debug_trace(char *name, u32 debug_level, u32 debug_layer, u32 flags)
 *
 * FUNCTION:    acpi_ps_start_trace
 *
- * PARAMETERS:  Info        - Method info struct
+ * PARAMETERS:  info        - Method info struct
 *
 * RETURN:      None
 *
@@ -150,7 +150,7 @@ static void acpi_ps_start_trace(struct acpi_evaluate_info *info)
 *
 * FUNCTION:    acpi_ps_stop_trace
 *
- * PARAMETERS:  Info        - Method info struct
+ * PARAMETERS:  info        - Method info struct
 *
 * RETURN:      None
 *
@@ -193,10 +193,10 @@ static void acpi_ps_stop_trace(struct acpi_evaluate_info *info)
 *
 * FUNCTION:    acpi_ps_execute_method
 *
- * PARAMETERS:  Info            - Method info block, contains:
+ * PARAMETERS:  info            - Method info block, contains:
- *                  Node            - Method Node to execute
+ *                  node            - Method Node to execute
 *                  obj_desc        - Method object
- *                  Parameters      - List of parameters to pass to the method,
+ *                  parameters      - List of parameters to pass to the method,
 *                                    terminated by NULL. Params itself may be
 *                                    NULL if no parameters are being passed.
 *                  return_object   - Where to put method's return value (if
@@ -361,9 +361,9 @@ acpi_status acpi_ps_execute_method(struct acpi_evaluate_info *info)
 *
 * FUNCTION:    acpi_ps_update_parameter_list
 *
- * PARAMETERS:  Info            - See struct acpi_evaluate_info
+ * PARAMETERS:  info            - See struct acpi_evaluate_info
 *                                (Used: parameter_type and Parameters)
- *              Action          - Add or Remove reference
+ *              action          - Add or Remove reference
 *
 * RETURN:      Status
 *
diff --git a/drivers/acpi/acpica/rsaddr.c b/drivers/acpi/acpica/rsaddr.c
index a0305652394f..856ff075b6ab 100644
--- a/drivers/acpi/acpica/rsaddr.c
+++ b/drivers/acpi/acpica/rsaddr.c
@@ -182,8 +182,8 @@ struct acpi_rsconvert_info acpi_rs_convert_ext_address64[5] = {
        /* Revision ID */
-        {ACPI_RSC_MOVE8, ACPI_RS_OFFSET(data.ext_address64.revision_iD),
+        {ACPI_RSC_MOVE8, ACPI_RS_OFFSET(data.ext_address64.revision_ID),
-         AML_OFFSET(ext_address64.revision_iD),
+         AML_OFFSET(ext_address64.revision_ID),
         1},
        /*
         * These fields are contiguous in both the source and destination:
@@ -215,7 +215,7 @@ static struct acpi_rsconvert_info acpi_rs_convert_general_flags[6] = {
         AML_OFFSET(address.resource_type),
         1},
-        /* General Flags - Consume, Decode, min_fixed, max_fixed */
+        /* General flags - Consume, Decode, min_fixed, max_fixed */
        {ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET(data.address.producer_consumer),
         AML_OFFSET(address.flags),
@@ -293,8 +293,8 @@ static struct acpi_rsconvert_info acpi_rs_convert_io_flags[4] = {
 *
 * FUNCTION:    acpi_rs_get_address_common
 *
- * PARAMETERS:  Resource            - Pointer to the internal resource struct
+ * PARAMETERS:  resource            - Pointer to the internal resource struct
- *              Aml                 - Pointer to the AML resource descriptor
+ *              aml                 - Pointer to the AML resource descriptor
 *
 * RETURN:      TRUE if the resource_type field is OK, FALSE otherwise
 *
@@ -343,8 +343,8 @@ acpi_rs_get_address_common(struct acpi_resource *resource,
 *
 * FUNCTION:    acpi_rs_set_address_common
 *
- * PARAMETERS:  Aml                 - Pointer to the AML resource descriptor
+ * PARAMETERS:  aml                 - Pointer to the AML resource descriptor
- *              Resource            - Pointer to the internal resource struct
+ *              resource            - Pointer to the internal resource struct
 *
 * RETURN:      None
 *
diff --git a/drivers/acpi/acpica/rscalc.c b/drivers/acpi/acpica/rscalc.c
index 3c6df4b7eb2d..de12469d1c9c 100644
--- a/drivers/acpi/acpica/rscalc.c
+++ b/drivers/acpi/acpica/rscalc.c
@@ -173,7 +173,7 @@ acpi_rs_stream_option_length(u32 resource_length,
 *
 * FUNCTION:    acpi_rs_get_aml_length
 *
- * PARAMETERS:  Resource            - Pointer to the resource linked list
+ * PARAMETERS:  resource            - Pointer to the resource linked list
 *              size_needed         - Where the required size is returned
 *
 * RETURN:      Status
diff --git a/drivers/acpi/acpica/rscreate.c b/drivers/acpi/acpica/rscreate.c
index 46d6eb38ae66..311cbc4f05fa 100644
--- a/drivers/acpi/acpica/rscreate.c
+++ b/drivers/acpi/acpica/rscreate.c
@@ -190,8 +190,8 @@ acpi_rs_create_resource_list(union acpi_operand_object *aml_buffer,
 *
 * FUNCTION:    acpi_rs_create_pci_routing_table
 *
- * PARAMETERS:  package_object          - Pointer to a union acpi_operand_object
+ * PARAMETERS:  package_object          - Pointer to a package containing one
- *                                        package
+ *                                        of more ACPI_OPERAND_OBJECTs
 *              output_buffer           - Pointer to the user's buffer
 *
 * RETURN:      Status  AE_OK if okay, else a valid acpi_status code.
@@ -199,7 +199,7 @@ acpi_rs_create_resource_list(union acpi_operand_object *aml_buffer,
 *              AE_BUFFER_OVERFLOW and output_buffer->Length will point
 *              to the size buffer needed.
 *
- * DESCRIPTION: Takes the union acpi_operand_object    package and creates a
+ * DESCRIPTION: Takes the union acpi_operand_object package and creates a
 *              linked list of PCI interrupt descriptions
 *
 * NOTE: It is the caller's responsibility to ensure that the start of the
diff --git a/drivers/acpi/acpica/rsdump.c b/drivers/acpi/acpica/rsdump.c
index b4c581132393..4d11b072388c 100644
--- a/drivers/acpi/acpica/rsdump.c
+++ b/drivers/acpi/acpica/rsdump.c
@@ -703,7 +703,7 @@ acpi_rs_dump_resource_source(struct acpi_resource_source *resource_source)
 *
 * FUNCTION:    acpi_rs_dump_address_common
 *
- * PARAMETERS:  Resource        - Pointer to an internal resource descriptor
+ * PARAMETERS:  resource        - Pointer to an internal resource descriptor
 *
 * RETURN:      None
 *
@@ -850,8 +850,8 @@ void acpi_rs_dump_irq_list(u8 * route_table)
 *
 * FUNCTION:    acpi_rs_out*
 *
- * PARAMETERS:  Title       - Name of the resource field
+ * PARAMETERS:  title       - Name of the resource field
- *              Value       - Value of the resource field
+ *              value       - Value of the resource field
 *
 * RETURN:      None
 *
@@ -898,8 +898,8 @@ static void acpi_rs_out_title(char *title)
 *
 * FUNCTION:    acpi_rs_dump*List
 *
- * PARAMETERS:  Length      - Number of elements in the list
+ * PARAMETERS:  length      - Number of elements in the list
- *              Data        - Start of the list
+ *              data        - Start of the list
 *
 * RETURN:      None
 *
diff --git a/drivers/acpi/acpica/rslist.c b/drivers/acpi/acpica/rslist.c
index 9be129f5d6f4..46b5324b22d6 100644
--- a/drivers/acpi/acpica/rslist.c
+++ b/drivers/acpi/acpica/rslist.c
@@ -139,7 +139,7 @@ acpi_rs_convert_aml_to_resources(u8 * aml,
 *
 * FUNCTION:    acpi_rs_convert_resources_to_aml
 *
- * PARAMETERS:  Resource            - Pointer to the resource linked list
+ * PARAMETERS:  resource            - Pointer to the resource linked list
 *              aml_size_needed     - Calculated size of the byte stream
 *                                    needed from calling acpi_rs_get_aml_length()
 *                                    The size of the output_buffer is
diff --git a/drivers/acpi/acpica/rsmisc.c b/drivers/acpi/acpica/rsmisc.c
index 8073b371cc7c..c6f291c2bc83 100644
--- a/drivers/acpi/acpica/rsmisc.c
+++ b/drivers/acpi/acpica/rsmisc.c
@@ -57,9 +57,9 @@ ACPI_MODULE_NAME("rsmisc")
 *
 * FUNCTION:    acpi_rs_convert_aml_to_resource
 *
- * PARAMETERS:  Resource            - Pointer to the resource descriptor
+ * PARAMETERS:  resource            - Pointer to the resource descriptor
- *              Aml                 - Where the AML descriptor is returned
+ *              aml                 - Where the AML descriptor is returned
- *              Info                - Pointer to appropriate conversion table
+ *              info                - Pointer to appropriate conversion table
 *
 * RETURN:      Status
 *
@@ -406,7 +406,7 @@ acpi_rs_convert_aml_to_resource(struct acpi_resource *resource,
                case ACPI_RSC_EXIT_NE:
                        /*
-                         * Control - Exit conversion if not equal
+                         * control - Exit conversion if not equal
                         */
                        switch (info->resource_offset) {
                        case ACPI_RSC_COMPARE_AML_LENGTH:
@@ -454,9 +454,9 @@ acpi_rs_convert_aml_to_resource(struct acpi_resource *resource,
 *
 * FUNCTION:    acpi_rs_convert_resource_to_aml
 *
- * PARAMETERS:  Resource            - Pointer to the resource descriptor
+ * PARAMETERS:  resource            - Pointer to the resource descriptor
- *              Aml                 - Where the AML descriptor is returned
+ *              aml                 - Where the AML descriptor is returned
- *              Info                - Pointer to appropriate conversion table
+ *              info                - Pointer to appropriate conversion table
 *
 * RETURN:      Status
 *
@@ -726,7 +726,7 @@ acpi_rs_convert_resource_to_aml(struct acpi_resource *resource,
                case ACPI_RSC_EXIT_LE:
                        /*
-                         * Control - Exit conversion if less than or equal
+                         * control - Exit conversion if less than or equal
                         */
                        if (item_count <= info->value) {
                                goto exit;
@@ -735,7 +735,7 @@ acpi_rs_convert_resource_to_aml(struct acpi_resource *resource,
                case ACPI_RSC_EXIT_NE:
                        /*
-                         * Control - Exit conversion if not equal
+                         * control - Exit conversion if not equal
                         */
                        switch (COMPARE_OPCODE(info)) {
                        case ACPI_RSC_COMPARE_VALUE:
@@ -757,7 +757,7 @@ acpi_rs_convert_resource_to_aml(struct acpi_resource *resource,
                case ACPI_RSC_EXIT_EQ:
                        /*
-                         * Control - Exit conversion if equal
+                         * control - Exit conversion if equal
                         */
                        if (*ACPI_ADD_PTR(u8, resource,
                                          COMPARE_TARGET(info)) ==
@@ -783,7 +783,7 @@ acpi_rs_convert_resource_to_aml(struct acpi_resource *resource,
 #if 0
 /* Previous resource validations */
-if (aml->ext_address64.revision_iD != AML_RESOURCE_EXTENDED_ADDRESS_REVISION) {
+if (aml->ext_address64.revision_ID != AML_RESOURCE_EXTENDED_ADDRESS_REVISION) {
        return_ACPI_STATUS(AE_SUPPORT);
 }
diff --git a/drivers/acpi/acpica/rsutils.c b/drivers/acpi/acpica/rsutils.c
index 433a375deb93..37d5241c0acf 100644
--- a/drivers/acpi/acpica/rsutils.c
+++ b/drivers/acpi/acpica/rsutils.c
@@ -53,8 +53,8 @@ ACPI_MODULE_NAME("rsutils")
 *
 * FUNCTION:    acpi_rs_decode_bitmask
 *
- * PARAMETERS:  Mask            - Bitmask to decode
+ * PARAMETERS:  mask            - Bitmask to decode
- *              List            - Where the converted list is returned
+ *              list            - Where the converted list is returned
 *
 * RETURN:      Count of bits set (length of list)
 *
@@ -86,8 +86,8 @@ u8 acpi_rs_decode_bitmask(u16 mask, u8 * list)
 *
 * FUNCTION:    acpi_rs_encode_bitmask
 *
- * PARAMETERS:  List            - List of values to encode
+ * PARAMETERS:  list            - List of values to encode
- *              Count           - Length of list
+ *              count           - Length of list
 *
 * RETURN:      Encoded bitmask
 *
@@ -115,8 +115,8 @@ u16 acpi_rs_encode_bitmask(u8 * list, u8 count)
 *
 * FUNCTION:    acpi_rs_move_data
 *
- * PARAMETERS:  Destination         - Pointer to the destination descriptor
+ * PARAMETERS:  destination         - Pointer to the destination descriptor
- *              Source              - Pointer to the source descriptor
+ *              source              - Pointer to the source descriptor
 *              item_count          - How many items to move
 *              move_type           - Byte width
 *
@@ -183,7 +183,7 @@ acpi_rs_move_data(void *destination, void *source, u16 item_count, u8 move_type)
 *
 * PARAMETERS:  total_length        - Length of the AML descriptor, including
 *                                    the header and length fields.
- *              Aml                 - Pointer to the raw AML descriptor
+ *              aml                 - Pointer to the raw AML descriptor
 *
 * RETURN:      None
 *
@@ -235,7 +235,7 @@ acpi_rs_set_resource_length(acpi_rsdesc_size total_length,
 * PARAMETERS:  descriptor_type     - Byte to be inserted as the type
 *              total_length        - Length of the AML descriptor, including
 *                                    the header and length fields.
- *              Aml                 - Pointer to the raw AML descriptor
+ *              aml                 - Pointer to the raw AML descriptor
 *
 * RETURN:      None
 *
@@ -265,8 +265,8 @@ acpi_rs_set_resource_header(u8 descriptor_type,
 *
 * FUNCTION:    acpi_rs_strcpy
 *
- * PARAMETERS:  Destination         - Pointer to the destination string
+ * PARAMETERS:  destination         - Pointer to the destination string
- *              Source              - Pointer to the source string
+ *              source              - Pointer to the source string
 *
 * RETURN:      String length, including NULL terminator
 *
@@ -300,7 +300,7 @@ static u16 acpi_rs_strcpy(char *destination, char *source)
 *              minimum_length      - Minimum length of the descriptor (minus
 *                                    any optional fields)
 *              resource_source     - Where the resource_source is returned
- *              Aml                 - Pointer to the raw AML descriptor
+ *              aml                 - Pointer to the raw AML descriptor
 *              string_ptr          - (optional) where to store the actual
 *                                    resource_source string
 *
@@ -386,7 +386,7 @@ acpi_rs_get_resource_source(acpi_rs_length resource_length,
 *
 * FUNCTION:    acpi_rs_set_resource_source
 *
- * PARAMETERS:  Aml                 - Pointer to the raw AML descriptor
+ * PARAMETERS:  aml                 - Pointer to the raw AML descriptor
 *              minimum_length      - Minimum length of the descriptor (minus
 *                                    any optional fields)
 *              resource_source     - Internal resource_source
@@ -445,7 +445,7 @@ acpi_rs_set_resource_source(union aml_resource * aml,
 *
 * FUNCTION:    acpi_rs_get_prt_method_data
 *
- * PARAMETERS:  Node            - Device node
+ * PARAMETERS:  node            - Device node
 *              ret_buffer      - Pointer to a buffer structure for the
 *                                results
 *
@@ -494,7 +494,7 @@ acpi_rs_get_prt_method_data(struct acpi_namespace_node * node,
 *
 * FUNCTION:    acpi_rs_get_crs_method_data
 *
- * PARAMETERS:  Node            - Device node
+ * PARAMETERS:  node            - Device node
 *              ret_buffer      - Pointer to a buffer structure for the
 *                                results
 *
@@ -534,7 +534,7 @@ acpi_rs_get_crs_method_data(struct acpi_namespace_node *node,
         */
        status = acpi_rs_create_resource_list(obj_desc, ret_buffer);
-        /* On exit, we must delete the object returned by evaluate_object */
+        /* On exit, we must delete the object returned by evaluateObject */
        acpi_ut_remove_reference(obj_desc);
        return_ACPI_STATUS(status);
@@ -544,7 +544,7 @@ acpi_rs_get_crs_method_data(struct acpi_namespace_node *node,
 *
 * FUNCTION:    acpi_rs_get_prs_method_data
 *
- * PARAMETERS:  Node            - Device node
+ * PARAMETERS:  node            - Device node
 *              ret_buffer      - Pointer to a buffer structure for the
 *                                results
 *
@@ -585,7 +585,7 @@ acpi_rs_get_prs_method_data(struct acpi_namespace_node *node,
         */
        status = acpi_rs_create_resource_list(obj_desc, ret_buffer);
-        /* On exit, we must delete the object returned by evaluate_object */
+        /* On exit, we must delete the object returned by evaluateObject */
        acpi_ut_remove_reference(obj_desc);
        return_ACPI_STATUS(status);
@@ -596,7 +596,7 @@ acpi_rs_get_prs_method_data(struct acpi_namespace_node *node,
 *
 * FUNCTION:    acpi_rs_get_aei_method_data
 *
- * PARAMETERS:  Node            - Device node
+ * PARAMETERS:  node            - Device node
 *              ret_buffer      - Pointer to a buffer structure for the
 *                                results
 *
@@ -636,7 +636,7 @@ acpi_rs_get_aei_method_data(struct acpi_namespace_node *node,
         */
        status = acpi_rs_create_resource_list(obj_desc, ret_buffer);
-        /* On exit, we must delete the object returned by evaluate_object */
+        /* On exit, we must delete the object returned by evaluateObject */
        acpi_ut_remove_reference(obj_desc);
        return_ACPI_STATUS(status);
@@ -646,8 +646,8 @@ acpi_rs_get_aei_method_data(struct acpi_namespace_node *node,
 *
 * FUNCTION:    acpi_rs_get_method_data
 *
- * PARAMETERS:  Handle          - Handle to the containing object
+ * PARAMETERS:  handle          - Handle to the containing object
- *              Path            - Path to method, relative to Handle
+ *              path            - Path to method, relative to Handle
 *              ret_buffer      - Pointer to a buffer structure for the
 *                                results
 *
@@ -697,7 +697,7 @@ acpi_rs_get_method_data(acpi_handle handle,
 *
 * FUNCTION:    acpi_rs_set_srs_method_data
 *
- * PARAMETERS:  Node            - Device node
+ * PARAMETERS:  node            - Device node
 *              in_buffer       - Pointer to a buffer structure of the
 *                                parameter
 *
diff --git a/drivers/acpi/acpica/rsxface.c b/drivers/acpi/acpica/rsxface.c
index f58c098c7aeb..5aad744b5b83 100644
--- a/drivers/acpi/acpica/rsxface.c
+++ b/drivers/acpi/acpica/rsxface.c
@@ -79,7 +79,7 @@ acpi_rs_validate_parameters(acpi_handle device_handle,
 * FUNCTION:    acpi_rs_validate_parameters
 *
 * PARAMETERS:  device_handle   - Handle to a device
- *              Buffer          - Pointer to a data buffer
+ *              buffer          - Pointer to a data buffer
 *              return_node     - Pointer to where the device node is returned
 *
 * RETURN:      Status
@@ -351,8 +351,8 @@ ACPI_EXPORT_SYMBOL(acpi_get_event_resources)
 *
 * FUNCTION:    acpi_resource_to_address64
 *
- * PARAMETERS:  Resource        - Pointer to a resource
+ * PARAMETERS:  resource        - Pointer to a resource
- *              Out             - Pointer to the users's return buffer
+ *              out             - Pointer to the users's return buffer
 *                                (a struct acpi_resource_address64)
 *
 * RETURN:      Status
@@ -415,9 +415,9 @@ ACPI_EXPORT_SYMBOL(acpi_resource_to_address64)
 * FUNCTION:    acpi_get_vendor_resource
 *
 * PARAMETERS:  device_handle   - Handle for the parent device object
- *              Name            - Method name for the parent resource
+ *              name            - Method name for the parent resource
 *                                (METHOD_NAME__CRS or METHOD_NAME__PRS)
- *              Uuid            - Pointer to the UUID to be matched.
+ *              uuid            - Pointer to the UUID to be matched.
 *                                includes both subtype and 16-byte UUID
 *              ret_buffer      - Where the vendor resource is returned
 *
@@ -526,11 +526,11 @@ acpi_rs_match_vendor_resource(struct acpi_resource *resource, void *context)
 *
 * PARAMETERS:  device_handle   - Handle to the device object for the
 *                                device we are querying
- *              Name            - Method name of the resources we want.
+ *              name            - Method name of the resources we want.
 *                                (METHOD_NAME__CRS, METHOD_NAME__PRS, or
 *                                METHOD_NAME__AEI)
 *              user_function   - Called for each resource
- *              Context         - Passed to user_function
+ *              context         - Passed to user_function
 *
 * RETURN:      Status
 *
diff --git a/drivers/acpi/acpica/tbfadt.c b/drivers/acpi/acpica/tbfadt.c
index 4c9c760db4a4..390651860bf0 100644
--- a/drivers/acpi/acpica/tbfadt.c
+++ b/drivers/acpi/acpica/tbfadt.c
@@ -49,9 +49,10 @@
 ACPI_MODULE_NAME("tbfadt")
 /* Local prototypes */
-static ACPI_INLINE void
+static void
 acpi_tb_init_generic_address(struct acpi_generic_address *generic_address,
-                             u8 space_id, u8 byte_width, u64 address);
+                             u8 space_id,
+                             u8 byte_width, u64 address, char *register_name);
 static void acpi_tb_convert_fadt(void);
@@ -172,7 +173,7 @@ static struct acpi_fadt_pm_info fadt_pm_info_table[] = {
 *
 * PARAMETERS:  generic_address     - GAS struct to be initialized
 *              byte_width          - Width of this register
- *              Address             - Address of the register
+ *              address             - Address of the register
 *
 * RETURN:      None
 *
@@ -182,10 +183,25 @@ static struct acpi_fadt_pm_info fadt_pm_info_table[] = {
 *
 ******************************************************************************/
-static ACPI_INLINE void
+static void
 acpi_tb_init_generic_address(struct acpi_generic_address *generic_address,
-                             u8 space_id, u8 byte_width, u64 address)
+                             u8 space_id,
+                             u8 byte_width, u64 address, char *register_name)
 {
+        u8 bit_width;
+        /* Bit width field in the GAS is only one byte long, 255 max */
+        bit_width = (u8)(byte_width * 8);
+        if (byte_width > 31) {  /* (31*8)=248 */
+                ACPI_ERROR((AE_INFO,
+                            "%s - 32-bit FADT register is too long (%u bytes, %u bits) "
+                            "to convert to GAS struct - 255 bits max, truncating",
+                            register_name, byte_width, (byte_width * 8)));
+                bit_width = 255;
+        }
        /*
         * The 64-bit Address field is non-aligned in the byte packed
@@ -196,7 +212,7 @@ acpi_tb_init_generic_address(struct acpi_generic_address *generic_address,
        /* All other fields are byte-wide */
        generic_address->space_id = space_id;
-        generic_address->bit_width = (u8)ACPI_MUL_8(byte_width);
+        generic_address->bit_width = bit_width;
        generic_address->bit_offset = 0;
        generic_address->access_width = 0;      /* Access width ANY */
 }
@@ -267,8 +283,8 @@ void acpi_tb_parse_fadt(u32 table_index)
 *
 * FUNCTION:    acpi_tb_create_local_fadt
 *
- * PARAMETERS:  Table               - Pointer to BIOS FADT
+ * PARAMETERS:  table               - Pointer to BIOS FADT
- *              Length              - Length of the table
+ *              length              - Length of the table
 *
 * RETURN:      None
 *
@@ -287,11 +303,11 @@ void acpi_tb_create_local_fadt(struct acpi_table_header *table, u32 length)
         * a warning.
         */
        if (length > sizeof(struct acpi_table_fadt)) {
-                ACPI_WARNING((AE_INFO,
+                ACPI_BIOS_WARNING((AE_INFO,
-                              "FADT (revision %u) is longer than ACPI 5.0 version, "
+                                   "FADT (revision %u) is longer than ACPI 5.0 version, "
-                              "truncating length %u to %u",
+                                   "truncating length %u to %u",
-                              table->revision, length,
+                                   table->revision, length,
-                              (u32)sizeof(struct acpi_table_fadt)));
+                                   (u32)sizeof(struct acpi_table_fadt)));
        }
        /* Clear the entire local FADT */
@@ -436,11 +452,13 @@ static void acpi_tb_convert_fadt(void)
                 * they must match.
                 */
                if (address64->address && address32 &&
-                    (address64->address != (u64) address32)) {
+                    (address64->address != (u64)address32)) {
-                        ACPI_ERROR((AE_INFO,
+                        ACPI_BIOS_ERROR((AE_INFO,
-                                    "32/64X address mismatch in %s: 0x%8.8X/0x%8.8X%8.8X, using 32",
+                                         "32/64X address mismatch in FADT/%s: "
-                                    fadt_info_table[i].name, address32,
+                                         "0x%8.8X/0x%8.8X%8.8X, using 32",
-                                    ACPI_FORMAT_UINT64(address64->address)));
+                                         fadt_info_table[i].name, address32,
+                                         ACPI_FORMAT_UINT64(address64->
+                                                            address)));
                }
                /* Always use 32-bit address if it is valid (non-null) */
@@ -456,7 +474,8 @@ static void acpi_tb_convert_fadt(void)
                                                                   &acpi_gbl_FADT,
                                                                   fadt_info_table
                                                                   [i].length),
-                                                     (u64) address32);
+                                                     (u64) address32,
+                                                     fadt_info_table[i].name);
                }
        }
 }
@@ -465,7 +484,7 @@ static void acpi_tb_convert_fadt(void)
 *
 * FUNCTION:    acpi_tb_validate_fadt
 *
- * PARAMETERS:  Table           - Pointer to the FADT to be validated
+ * PARAMETERS:  table           - Pointer to the FADT to be validated
 *
 * RETURN:      None
 *
@@ -494,25 +513,25 @@ static void acpi_tb_validate_fadt(void)
         * DSDT/X_DSDT) would indicate the presence of two FACS or two DSDT tables.
         */
        if (acpi_gbl_FADT.facs &&
-            (acpi_gbl_FADT.Xfacs != (u64) acpi_gbl_FADT.facs)) {
+            (acpi_gbl_FADT.Xfacs != (u64)acpi_gbl_FADT.facs)) {
-                ACPI_WARNING((AE_INFO,
+                ACPI_BIOS_WARNING((AE_INFO,
-                              "32/64X FACS address mismatch in FADT - "
+                                   "32/64X FACS address mismatch in FADT - "
-                              "0x%8.8X/0x%8.8X%8.8X, using 32",
+                                   "0x%8.8X/0x%8.8X%8.8X, using 32",
-                              acpi_gbl_FADT.facs,
+                                   acpi_gbl_FADT.facs,
-                              ACPI_FORMAT_UINT64(acpi_gbl_FADT.Xfacs)));
+                                   ACPI_FORMAT_UINT64(acpi_gbl_FADT.Xfacs)));
-                acpi_gbl_FADT.Xfacs = (u64) acpi_gbl_FADT.facs;
+                acpi_gbl_FADT.Xfacs = (u64)acpi_gbl_FADT.facs;
        }
        if (acpi_gbl_FADT.dsdt &&
-            (acpi_gbl_FADT.Xdsdt != (u64) acpi_gbl_FADT.dsdt)) {
+            (acpi_gbl_FADT.Xdsdt != (u64)acpi_gbl_FADT.dsdt)) {
-                ACPI_WARNING((AE_INFO,
+                ACPI_BIOS_WARNING((AE_INFO,
-                              "32/64X DSDT address mismatch in FADT - "
+                                   "32/64X DSDT address mismatch in FADT - "
-                              "0x%8.8X/0x%8.8X%8.8X, using 32",
+                                   "0x%8.8X/0x%8.8X%8.8X, using 32",
-                              acpi_gbl_FADT.dsdt,
+                                   acpi_gbl_FADT.dsdt,
-                              ACPI_FORMAT_UINT64(acpi_gbl_FADT.Xdsdt)));
+                                   ACPI_FORMAT_UINT64(acpi_gbl_FADT.Xdsdt)));
-                acpi_gbl_FADT.Xdsdt = (u64) acpi_gbl_FADT.dsdt;
+                acpi_gbl_FADT.Xdsdt = (u64)acpi_gbl_FADT.dsdt;
        }
        /* If Hardware Reduced flag is set, we are all done */
@@ -542,10 +561,10 @@ static void acpi_tb_validate_fadt(void)
                 */
                if (address64->address &&
                    (address64->bit_width != ACPI_MUL_8(length))) {
-                        ACPI_WARNING((AE_INFO,
+                        ACPI_BIOS_WARNING((AE_INFO,
-                                      "32/64X length mismatch in %s: %u/%u",
+                                           "32/64X length mismatch in FADT/%s: %u/%u",
-                                      name, ACPI_MUL_8(length),
+                                           name, ACPI_MUL_8(length),
-                                      address64->bit_width));
+                                           address64->bit_width));
                }
                if (fadt_info_table[i].type & ACPI_FADT_REQUIRED) {
@@ -554,29 +573,29 @@ static void acpi_tb_validate_fadt(void)
                         * Both the address and length must be non-zero.
                         */
                        if (!address64->address || !length) {
-                                ACPI_ERROR((AE_INFO,
+                                ACPI_BIOS_ERROR((AE_INFO,
-                                            "Required field %s has zero address and/or length:"
+                                                 "Required FADT field %s has zero address and/or length: "
-                                            " 0x%8.8X%8.8X/0x%X",
+                                                 "0x%8.8X%8.8X/0x%X",
-                                            name,
+                                                 name,
-                                            ACPI_FORMAT_UINT64(address64->
+                                                 ACPI_FORMAT_UINT64(address64->
-                                                               address),
+                                                                    address),
-                                            length));
+                                                 length));
                        }
                } else if (fadt_info_table[i].type & ACPI_FADT_SEPARATE_LENGTH) {
                        /*
-                         * Field is optional (PM2Control, GPE0, GPE1) AND has its own
+                         * Field is optional (Pm2_control, GPE0, GPE1) AND has its own
                         * length field. If present, both the address and length must
                         * be valid.
                         */
                        if ((address64->address && !length) ||
                            (!address64->address && length)) {
-                                ACPI_WARNING((AE_INFO,
+                                ACPI_BIOS_WARNING((AE_INFO,
-                                              "Optional field %s has zero address or length: "
+                                                   "Optional FADT field %s has zero address or length: "
-                                              "0x%8.8X%8.8X/0x%X",
+                                                   "0x%8.8X%8.8X/0x%X",
-                                              name,
+                                                   name,
-                                              ACPI_FORMAT_UINT64(address64->
+                                                   ACPI_FORMAT_UINT64
-                                                                 address),
+                                                   (address64->address),
-                                              length));
+                                                   length));
                        }
                }
        }
@@ -621,12 +640,12 @@ static void acpi_tb_setup_fadt_registers(void)
                            (fadt_info_table[i].default_length > 0) &&
                            (fadt_info_table[i].default_length !=
                             target64->bit_width)) {
-                                ACPI_WARNING((AE_INFO,
+                                ACPI_BIOS_WARNING((AE_INFO,
-                                              "Invalid length for %s: %u, using default %u",
+                                                   "Invalid length for FADT/%s: %u, using default %u",
-                                              fadt_info_table[i].name,
+                                                   fadt_info_table[i].name,
-                                              target64->bit_width,
+                                                   target64->bit_width,
-                                              fadt_info_table[i].
+                                                   fadt_info_table[i].
-                                              default_length));
+                                                   default_length));
                                /* Incorrect size, set width to the default */
@@ -670,7 +689,8 @@ static void acpi_tb_setup_fadt_registers(void)
                                                     source64->address +
                                                     (fadt_pm_info_table[i].
                                                      register_num *
-                                                      pm1_register_byte_width));
+                                                      pm1_register_byte_width),
+                                                     "PmRegisters");
                }
        }
 }
diff --git a/drivers/acpi/acpica/tbfind.c b/drivers/acpi/acpica/tbfind.c
index 4903e36ea75a..57deae166577 100644
--- a/drivers/acpi/acpica/tbfind.c
+++ b/drivers/acpi/acpica/tbfind.c
@@ -52,7 +52,7 @@ ACPI_MODULE_NAME("tbfind")
 *
 * FUNCTION:    acpi_tb_find_table
 *
- * PARAMETERS:  Signature           - String with ACPI table signature
+ * PARAMETERS:  signature           - String with ACPI table signature
 *              oem_id              - String with the table OEM ID
 *              oem_table_id        - String with the OEM Table ID
 *              table_index         - Where the table index is returned
diff --git a/drivers/acpi/acpica/tbinstal.c b/drivers/acpi/acpica/tbinstal.c
index c03500b4cc7a..74f97d74db1c 100644
--- a/drivers/acpi/acpica/tbinstal.c
+++ b/drivers/acpi/acpica/tbinstal.c
@@ -138,13 +138,14 @@ acpi_tb_add_table(struct acpi_table_desc *table_desc, u32 *table_index)
        if ((table_desc->pointer->signature[0] != 0x00) &&
            (!ACPI_COMPARE_NAME(table_desc->pointer->signature, ACPI_SIG_SSDT))
            && (ACPI_STRNCMP(table_desc->pointer->signature, "OEM", 3))) {
-                ACPI_ERROR((AE_INFO,
+                ACPI_BIOS_ERROR((AE_INFO,
-                            "Table has invalid signature [%4.4s] (0x%8.8X), must be SSDT or OEMx",
+                                 "Table has invalid signature [%4.4s] (0x%8.8X), "
-                            acpi_ut_valid_acpi_name(*(u32 *)table_desc->
+                                 "must be SSDT or OEMx",
-                                                    pointer->
+                                 acpi_ut_valid_acpi_name(*(u32 *)table_desc->
-                                                    signature) ? table_desc->
+                                                         pointer->
-                            pointer->signature : "????",
+                                                         signature) ?
-                            *(u32 *)table_desc->pointer->signature));
+                                 table_desc->pointer->signature : "????",
+                                 *(u32 *)table_desc->pointer->signature));
                return_ACPI_STATUS(AE_BAD_SIGNATURE);
        }
@@ -396,10 +397,10 @@ acpi_status acpi_tb_resize_root_table_list(void)
 *
 * FUNCTION:    acpi_tb_store_table
 *
- * PARAMETERS:  Address             - Table address
+ * PARAMETERS:  address             - Table address
- *              Table               - Table header
+ *              table               - Table header
- *              Length              - Table length
+ *              length              - Table length
- *              Flags               - flags
+ *              flags               - flags
 *
 * RETURN:      Status and table index.
 *
diff --git a/drivers/acpi/acpica/tbutils.c b/drivers/acpi/acpica/tbutils.c
index 0a706cac37de..b6cea30da638 100644
--- a/drivers/acpi/acpica/tbutils.c
+++ b/drivers/acpi/acpica/tbutils.c
@@ -178,8 +178,8 @@ u8 acpi_tb_tables_loaded(void)
 *
 * FUNCTION:    acpi_tb_fix_string
 *
- * PARAMETERS:  String              - String to be repaired
+ * PARAMETERS:  string              - String to be repaired
- *              Length              - Maximum length
+ *              length              - Maximum length
 *
 * RETURN:      None
 *
@@ -205,7 +205,7 @@ static void acpi_tb_fix_string(char *string, acpi_size length)
 * FUNCTION:    acpi_tb_cleanup_table_header
 *
 * PARAMETERS:  out_header          - Where the cleaned header is returned
- *              Header              - Input ACPI table header
+ *              header              - Input ACPI table header
 *
 * RETURN:      Returns the cleaned header in out_header
 *
@@ -231,8 +231,8 @@ acpi_tb_cleanup_table_header(struct acpi_table_header *out_header,
 *
 * FUNCTION:    acpi_tb_print_table_header
 *
- * PARAMETERS:  Address             - Table physical address
+ * PARAMETERS:  address             - Table physical address
- *              Header              - Table header
+ *              header              - Table header
 *
 * RETURN:      None
 *
@@ -296,8 +296,8 @@ acpi_tb_print_table_header(acpi_physical_address address,
 *
 * FUNCTION:    acpi_tb_validate_checksum
 *
- * PARAMETERS:  Table               - ACPI table to verify
+ * PARAMETERS:  table               - ACPI table to verify
- *              Length              - Length of entire table
+ *              length              - Length of entire table
 *
 * RETURN:      Status
 *
@@ -317,10 +317,11 @@ acpi_status acpi_tb_verify_checksum(struct acpi_table_header *table, u32 length)
        /* Checksum ok? (should be zero) */
        if (checksum) {
-                ACPI_WARNING((AE_INFO,
+                ACPI_BIOS_WARNING((AE_INFO,
-                              "Incorrect checksum in table [%4.4s] - 0x%2.2X, should be 0x%2.2X",
+                                   "Incorrect checksum in table [%4.4s] - 0x%2.2X, "
-                              table->signature, table->checksum,
+                                   "should be 0x%2.2X",
-                              (u8) (table->checksum - checksum)));
+                                   table->signature, table->checksum,
+                                   (u8)(table->checksum - checksum)));
 #if (ACPI_CHECKSUM_ABORT)
@@ -335,8 +336,8 @@ acpi_status acpi_tb_verify_checksum(struct acpi_table_header *table, u32 length)
 *
 * FUNCTION:    acpi_tb_checksum
 *
- * PARAMETERS:  Buffer          - Pointer to memory region to be checked
+ * PARAMETERS:  buffer          - Pointer to memory region to be checked
- *              Length          - Length of this memory region
+ *              length          - Length of this memory region
 *
 * RETURN:      Checksum (u8)
 *
@@ -377,8 +378,9 @@ void acpi_tb_check_dsdt_header(void)
        if (acpi_gbl_original_dsdt_header.length != acpi_gbl_DSDT->length ||
            acpi_gbl_original_dsdt_header.checksum != acpi_gbl_DSDT->checksum) {
-                ACPI_ERROR((AE_INFO,
+                ACPI_BIOS_ERROR((AE_INFO,
-                            "The DSDT has been corrupted or replaced - old, new headers below"));
+                                 "The DSDT has been corrupted or replaced - "
+                                 "old, new headers below"));
                acpi_tb_print_table_header(0, &acpi_gbl_original_dsdt_header);
                acpi_tb_print_table_header(0, acpi_gbl_DSDT);
@@ -438,8 +440,8 @@ struct acpi_table_header *acpi_tb_copy_dsdt(u32 table_index)
 *
 * FUNCTION:    acpi_tb_install_table
 *
- * PARAMETERS:  Address                 - Physical address of DSDT or FACS
+ * PARAMETERS:  address                 - Physical address of DSDT or FACS
- *              Signature               - Table signature, NULL if no need to
+ *              signature               - Table signature, NULL if no need to
 *                                        match
 *              table_index             - Index into root table array
 *
@@ -480,9 +482,10 @@ acpi_tb_install_table(acpi_physical_address address,
        /* If a particular signature is expected (DSDT/FACS), it must match */
        if (signature && !ACPI_COMPARE_NAME(table->signature, signature)) {
-                ACPI_ERROR((AE_INFO,
+                ACPI_BIOS_ERROR((AE_INFO,
-                            "Invalid signature 0x%X for ACPI table, expected [%s]",
+                                 "Invalid signature 0x%X for ACPI table, expected [%s]",
-                            *ACPI_CAST_PTR(u32, table->signature), signature));
+                                 *ACPI_CAST_PTR(u32, table->signature),
+                                 signature));
                goto unmap_and_exit;
        }
@@ -589,10 +592,10 @@ acpi_tb_get_root_table_entry(u8 *table_entry, u32 table_entry_size)
                        /* Will truncate 64-bit address to 32 bits, issue warning */
-                        ACPI_WARNING((AE_INFO,
+                        ACPI_BIOS_WARNING((AE_INFO,
-                                      "64-bit Physical Address in XSDT is too large (0x%8.8X%8.8X),"
+                                           "64-bit Physical Address in XSDT is too large (0x%8.8X%8.8X),"
-                                      " truncating",
+                                           " truncating",
-                                      ACPI_FORMAT_UINT64(address64)));
+                                           ACPI_FORMAT_UINT64(address64)));
                }
 #endif
                return ((acpi_physical_address) (address64));
@@ -603,7 +606,7 @@ acpi_tb_get_root_table_entry(u8 *table_entry, u32 table_entry_size)
 *
 * FUNCTION:    acpi_tb_parse_root_table
 *
- * PARAMETERS:  Rsdp                    - Pointer to the RSDP
+ * PARAMETERS:  rsdp                    - Pointer to the RSDP
 *
 * RETURN:      Status
 *
@@ -694,8 +697,9 @@ acpi_tb_parse_root_table(acpi_physical_address rsdp_address)
        acpi_os_unmap_memory(table, sizeof(struct acpi_table_header));
        if (length < sizeof(struct acpi_table_header)) {
-                ACPI_ERROR((AE_INFO, "Invalid length 0x%X in RSDT/XSDT",
+                ACPI_BIOS_ERROR((AE_INFO,
-                            length));
+                                 "Invalid table length 0x%X in RSDT/XSDT",
+                                 length));
                return_ACPI_STATUS(AE_INVALID_TABLE_LENGTH);
        }
diff --git a/drivers/acpi/acpica/tbxface.c b/drivers/acpi/acpica/tbxface.c
index abcc6412c244..29e51bc01383 100644
--- a/drivers/acpi/acpica/tbxface.c
+++ b/drivers/acpi/acpica/tbxface.c
@@ -1,7 +1,6 @@
 /******************************************************************************
 *
- * Module Name: tbxface - Public interfaces to the ACPI subsystem
+ * Module Name: tbxface - ACPI table oriented external interfaces
- *                         ACPI table oriented interfaces
 *
 *****************************************************************************/
@@ -51,11 +50,6 @@
 #define _COMPONENT          ACPI_TABLES
 ACPI_MODULE_NAME("tbxface")
-/* Local prototypes */
-static acpi_status acpi_tb_load_namespace(void);
-static int no_auto_ssdt;
 /*******************************************************************************
 *
 * FUNCTION:    acpi_allocate_root_table
@@ -65,11 +59,10 @@ static int no_auto_ssdt;
 *
 * RETURN:      Status
 *
- * DESCRIPTION: Allocate a root table array. Used by i_aSL compiler and
+ * DESCRIPTION: Allocate a root table array. Used by iASL compiler and
 *              acpi_initialize_tables.
 *
 ******************************************************************************/
 acpi_status acpi_allocate_root_table(u32 initial_table_count)
 {
@@ -222,52 +215,10 @@ acpi_status acpi_reallocate_root_table(void)
 /*******************************************************************************
 *
- * FUNCTION:    acpi_load_table
- *
- * PARAMETERS:  table_ptr       - pointer to a buffer containing the entire
- *                                table to be loaded
- *
- * RETURN:      Status
- *
- * DESCRIPTION: This function is called to load a table from the caller's
- *              buffer. The buffer must contain an entire ACPI Table including
- *              a valid header. The header fields will be verified, and if it
- *              is determined that the table is invalid, the call will fail.
- *
- ******************************************************************************/
-acpi_status acpi_load_table(struct acpi_table_header *table_ptr)
-{
-        acpi_status status;
-        u32 table_index;
-        struct acpi_table_desc table_desc;
-        if (!table_ptr)
-                return AE_BAD_PARAMETER;
-        ACPI_MEMSET(&table_desc, 0, sizeof(struct acpi_table_desc));
-        table_desc.pointer = table_ptr;
-        table_desc.length = table_ptr->length;
-        table_desc.flags = ACPI_TABLE_ORIGIN_UNKNOWN;
-        /*
-         * Install the new table into the local data structures
-         */
-        status = acpi_tb_add_table(&table_desc, &table_index);
-        if (ACPI_FAILURE(status)) {
-                return status;
-        }
-        status = acpi_ns_load_table(table_index, acpi_gbl_root_node);
-        return status;
-}
-ACPI_EXPORT_SYMBOL(acpi_load_table)
-/*******************************************************************************
- *
 * FUNCTION:    acpi_get_table_header
 *
- * PARAMETERS:  Signature           - ACPI signature of needed table
+ * PARAMETERS:  signature           - ACPI signature of needed table
- *              Instance            - Which instance (for SSDTs)
+ *              instance            - Which instance (for SSDTs)
 *              out_table_header    - The pointer to the table header to fill
 *
 * RETURN:      Status and pointer to mapped table header
@@ -382,8 +333,8 @@ ACPI_EXPORT_SYMBOL(acpi_unload_table_id)
 *
 * FUNCTION:    acpi_get_table_with_size
 *
- * PARAMETERS:  Signature           - ACPI signature of needed table
+ * PARAMETERS:  signature           - ACPI signature of needed table
- *              Instance            - Which instance (for SSDTs)
+ *              instance            - Which instance (for SSDTs)
 *              out_table           - Where the pointer to the table is returned
 *
 * RETURN:      Status and pointer to table
@@ -436,6 +387,7 @@ acpi_get_table_with_size(char *signature,
        return (AE_NOT_FOUND);
 }
+ACPI_EXPORT_SYMBOL(acpi_get_table_with_size)
 acpi_status
 acpi_get_table(char *signature,
@@ -453,7 +405,7 @@ ACPI_EXPORT_SYMBOL(acpi_get_table)
 * FUNCTION:    acpi_get_table_by_index
 *
 * PARAMETERS:  table_index         - Table index
- *              Table               - Where the pointer to the table is returned
+ *              table               - Where the pointer to the table is returned
 *
 * RETURN:      Status and pointer to the table
 *
@@ -502,157 +454,13 @@ acpi_get_table_by_index(u32 table_index, struct acpi_table_header **table)
 ACPI_EXPORT_SYMBOL(acpi_get_table_by_index)
-/*******************************************************************************
- *
- * FUNCTION:    acpi_tb_load_namespace
- *
- * PARAMETERS:  None
- *
- * RETURN:      Status
- *
- * DESCRIPTION: Load the namespace from the DSDT and all SSDTs/PSDTs found in
- *              the RSDT/XSDT.
- *
- ******************************************************************************/
-static acpi_status acpi_tb_load_namespace(void)
-{
-        acpi_status status;
-        u32 i;
-        struct acpi_table_header *new_dsdt;
-        ACPI_FUNCTION_TRACE(tb_load_namespace);
-        (void)acpi_ut_acquire_mutex(ACPI_MTX_TABLES);
-        /*
-         * Load the namespace. The DSDT is required, but any SSDT and
-         * PSDT tables are optional. Verify the DSDT.
-         */
-        if (!acpi_gbl_root_table_list.current_table_count ||
-            !ACPI_COMPARE_NAME(&
-                               (acpi_gbl_root_table_list.
-                                tables[ACPI_TABLE_INDEX_DSDT].signature),
-                               ACPI_SIG_DSDT)
-            ||
-            ACPI_FAILURE(acpi_tb_verify_table
-                         (&acpi_gbl_root_table_list.
-                          tables[ACPI_TABLE_INDEX_DSDT]))) {
-                status = AE_NO_ACPI_TABLES;
-                goto unlock_and_exit;
-        }
-        /*
-         * Save the DSDT pointer for simple access. This is the mapped memory
-         * address. We must take care here because the address of the .Tables
-         * array can change dynamically as tables are loaded at run-time. Note:
-         * .Pointer field is not validated until after call to acpi_tb_verify_table.
-         */
-        acpi_gbl_DSDT =
-            acpi_gbl_root_table_list.tables[ACPI_TABLE_INDEX_DSDT].pointer;
-        /*
-         * Optionally copy the entire DSDT to local memory (instead of simply
-         * mapping it.) There are some BIOSs that corrupt or replace the original
-         * DSDT, creating the need for this option. Default is FALSE, do not copy
-         * the DSDT.
-         */
-        if (acpi_gbl_copy_dsdt_locally) {
-                new_dsdt = acpi_tb_copy_dsdt(ACPI_TABLE_INDEX_DSDT);
-                if (new_dsdt) {
-                        acpi_gbl_DSDT = new_dsdt;
-                }
-        }
-        /*
-         * Save the original DSDT header for detection of table corruption
-         * and/or replacement of the DSDT from outside the OS.
-         */
-        ACPI_MEMCPY(&acpi_gbl_original_dsdt_header, acpi_gbl_DSDT,
-                    sizeof(struct acpi_table_header));
-        (void)acpi_ut_release_mutex(ACPI_MTX_TABLES);
-        /* Load and parse tables */
-        status = acpi_ns_load_table(ACPI_TABLE_INDEX_DSDT, acpi_gbl_root_node);
-        if (ACPI_FAILURE(status)) {
-                return_ACPI_STATUS(status);
-        }
-        /* Load any SSDT or PSDT tables. Note: Loop leaves tables locked */
-        (void)acpi_ut_acquire_mutex(ACPI_MTX_TABLES);
-        for (i = 0; i < acpi_gbl_root_table_list.current_table_count; ++i) {
-                if ((!ACPI_COMPARE_NAME
-                     (&(acpi_gbl_root_table_list.tables[i].signature),
-                      ACPI_SIG_SSDT)
-                     &&
-                     !ACPI_COMPARE_NAME(&
-                                        (acpi_gbl_root_table_list.tables[i].
-                                         signature), ACPI_SIG_PSDT))
-                    ||
-                    ACPI_FAILURE(acpi_tb_verify_table
-                                 (&acpi_gbl_root_table_list.tables[i]))) {
-                        continue;
-                }
-                if (no_auto_ssdt) {
-                        printk(KERN_WARNING "ACPI: SSDT ignored due to \"acpi_no_auto_ssdt\"\n");
-                        continue;
-                }
-                /* Ignore errors while loading tables, get as many as possible */
-                (void)acpi_ut_release_mutex(ACPI_MTX_TABLES);
-                (void)acpi_ns_load_table(i, acpi_gbl_root_node);
-                (void)acpi_ut_acquire_mutex(ACPI_MTX_TABLES);
-        }
-        ACPI_DEBUG_PRINT((ACPI_DB_INIT, "ACPI Tables successfully acquired\n"));
-      unlock_and_exit:
-        (void)acpi_ut_release_mutex(ACPI_MTX_TABLES);
-        return_ACPI_STATUS(status);
-}
-/*******************************************************************************
- *
- * FUNCTION:    acpi_load_tables
- *
- * PARAMETERS:  None
- *
- * RETURN:      Status
- *
- * DESCRIPTION: Load the ACPI tables from the RSDT/XSDT
- *
- ******************************************************************************/
-acpi_status acpi_load_tables(void)
-{
-        acpi_status status;
-        ACPI_FUNCTION_TRACE(acpi_load_tables);
-        /* Load the namespace from the tables */
-        status = acpi_tb_load_namespace();
-        if (ACPI_FAILURE(status)) {
-                ACPI_EXCEPTION((AE_INFO, status,
-                                "While loading namespace from ACPI tables"));
-        }
-        return_ACPI_STATUS(status);
-}
-ACPI_EXPORT_SYMBOL(acpi_load_tables)
 /*******************************************************************************
 *
 * FUNCTION:    acpi_install_table_handler
 *
- * PARAMETERS:  Handler         - Table event handler
+ * PARAMETERS:  handler         - Table event handler
- *              Context         - Value passed to the handler on each event
+ *              context         - Value passed to the handler on each event
 *
 * RETURN:      Status
 *
@@ -698,7 +506,7 @@ ACPI_EXPORT_SYMBOL(acpi_install_table_handler)
 *
 * FUNCTION:    acpi_remove_table_handler
 *
- * PARAMETERS:  Handler         - Table event handler that was installed
+ * PARAMETERS:  handler         - Table event handler that was installed
 *                                previously.
 *
 * RETURN:      Status
@@ -734,15 +542,3 @@ acpi_status acpi_remove_table_handler(acpi_tbl_handler handler)
 }
 ACPI_EXPORT_SYMBOL(acpi_remove_table_handler)
-static int __init acpi_no_auto_ssdt_setup(char *s) {
-        printk(KERN_NOTICE "ACPI: SSDT auto-load disabled\n");
-        no_auto_ssdt = 1;
-        return 1;
-}
-__setup("acpi_no_auto_ssdt", acpi_no_auto_ssdt_setup);
diff --git a/drivers/acpi/acpica/tbxfload.c b/drivers/acpi/acpica/tbxfload.c
new file mode 100644
index 000000000000..f87cc63e69a1
--- /dev/null
+++ b/drivers/acpi/acpica/tbxfload.c
@@ -0,0 +1,389 @@
+/******************************************************************************
+ *
+ * Module Name: tbxfload - Table load/unload external interfaces
+ *
+ *****************************************************************************/
+/*
+ * Copyright (C) 2000 - 2012, Intel Corp.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions, and the following disclaimer,
+ *    without modification.
+ * 2. Redistributions in binary form must reproduce at minimum a disclaimer
+ *    substantially similar to the "NO WARRANTY" disclaimer below
+ *    ("Disclaimer") and any redistribution must be conditioned upon
+ *    including a substantially similar Disclaimer requirement for further
+ *    binary redistribution.
+ * 3. Neither the names of the above-listed copyright holders nor the names
+ *    of any contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * Alternatively, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") version 2 as published by the Free
+ * Software Foundation.
+ *
+ * NO WARRANTY
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGES.
+ */
+#include <linux/export.h>
+#include <acpi/acpi.h>
+#include "accommon.h"
+#include "acnamesp.h"
+#include "actables.h"
+#define _COMPONENT          ACPI_TABLES
+ACPI_MODULE_NAME("tbxfload")
+/* Local prototypes */
+static acpi_status acpi_tb_load_namespace(void);
+static int no_auto_ssdt;
+/*******************************************************************************
+ *
+ * FUNCTION:    acpi_load_tables
+ *
+ * PARAMETERS:  None
+ *
+ * RETURN:      Status
+ *
+ * DESCRIPTION: Load the ACPI tables from the RSDT/XSDT
+ *
+ ******************************************************************************/
+acpi_status acpi_load_tables(void)
+{
+        acpi_status status;
+        ACPI_FUNCTION_TRACE(acpi_load_tables);
+        /* Load the namespace from the tables */
+        status = acpi_tb_load_namespace();
+        if (ACPI_FAILURE(status)) {
+                ACPI_EXCEPTION((AE_INFO, status,
+                                "While loading namespace from ACPI tables"));
+        }
+        return_ACPI_STATUS(status);
+}
+ACPI_EXPORT_SYMBOL(acpi_load_tables)
+/*******************************************************************************
+ *
+ * FUNCTION:    acpi_tb_load_namespace
+ *
+ * PARAMETERS:  None
+ *
+ * RETURN:      Status
+ *
+ * DESCRIPTION: Load the namespace from the DSDT and all SSDTs/PSDTs found in
+ *              the RSDT/XSDT.
+ *
+ ******************************************************************************/
+static acpi_status acpi_tb_load_namespace(void)
+{
+        acpi_status status;
+        u32 i;
+        struct acpi_table_header *new_dsdt;
+        ACPI_FUNCTION_TRACE(tb_load_namespace);
+        (void)acpi_ut_acquire_mutex(ACPI_MTX_TABLES);
+        /*
+         * Load the namespace. The DSDT is required, but any SSDT and
+         * PSDT tables are optional. Verify the DSDT.
+         */
+        if (!acpi_gbl_root_table_list.current_table_count ||
+            !ACPI_COMPARE_NAME(&
+                               (acpi_gbl_root_table_list.
+                                tables[ACPI_TABLE_INDEX_DSDT].signature),
+                               ACPI_SIG_DSDT)
+            ||
+            ACPI_FAILURE(acpi_tb_verify_table
+                         (&acpi_gbl_root_table_list.
+                          tables[ACPI_TABLE_INDEX_DSDT]))) {
+                status = AE_NO_ACPI_TABLES;
+                goto unlock_and_exit;
+        }
+        /*
+         * Save the DSDT pointer for simple access. This is the mapped memory
+         * address. We must take care here because the address of the .Tables
+         * array can change dynamically as tables are loaded at run-time. Note:
+         * .Pointer field is not validated until after call to acpi_tb_verify_table.
+         */
+        acpi_gbl_DSDT =
+            acpi_gbl_root_table_list.tables[ACPI_TABLE_INDEX_DSDT].pointer;
+        /*
+         * Optionally copy the entire DSDT to local memory (instead of simply
+         * mapping it.) There are some BIOSs that corrupt or replace the original
+         * DSDT, creating the need for this option. Default is FALSE, do not copy
+         * the DSDT.
+         */
+        if (acpi_gbl_copy_dsdt_locally) {
+                new_dsdt = acpi_tb_copy_dsdt(ACPI_TABLE_INDEX_DSDT);
+                if (new_dsdt) {
+                        acpi_gbl_DSDT = new_dsdt;
+                }
+        }
+        /*
+         * Save the original DSDT header for detection of table corruption
+         * and/or replacement of the DSDT from outside the OS.
+         */
+        ACPI_MEMCPY(&acpi_gbl_original_dsdt_header, acpi_gbl_DSDT,
+                    sizeof(struct acpi_table_header));
+        (void)acpi_ut_release_mutex(ACPI_MTX_TABLES);
+        /* Load and parse tables */
+        status = acpi_ns_load_table(ACPI_TABLE_INDEX_DSDT, acpi_gbl_root_node);
+        if (ACPI_FAILURE(status)) {
+                return_ACPI_STATUS(status);
+        }
+        /* Load any SSDT or PSDT tables. Note: Loop leaves tables locked */
+        (void)acpi_ut_acquire_mutex(ACPI_MTX_TABLES);
+        for (i = 0; i < acpi_gbl_root_table_list.current_table_count; ++i) {
+                if ((!ACPI_COMPARE_NAME
+                     (&(acpi_gbl_root_table_list.tables[i].signature),
+                      ACPI_SIG_SSDT)
+                     &&
+                     !ACPI_COMPARE_NAME(&
+                                        (acpi_gbl_root_table_list.tables[i].
+                                         signature), ACPI_SIG_PSDT))
+                    ||
+                    ACPI_FAILURE(acpi_tb_verify_table
+                                 (&acpi_gbl_root_table_list.tables[i]))) {
+                        continue;
+                }
+                if (no_auto_ssdt) {
+                        printk(KERN_WARNING "ACPI: SSDT ignored due to \"acpi_no_auto_ssdt\"\n");
+                        continue;
+                }
+                /* Ignore errors while loading tables, get as many as possible */
+                (void)acpi_ut_release_mutex(ACPI_MTX_TABLES);
+                (void)acpi_ns_load_table(i, acpi_gbl_root_node);
+                (void)acpi_ut_acquire_mutex(ACPI_MTX_TABLES);
+        }
+        ACPI_DEBUG_PRINT((ACPI_DB_INIT, "ACPI Tables successfully acquired\n"));
+      unlock_and_exit:
+        (void)acpi_ut_release_mutex(ACPI_MTX_TABLES);
+        return_ACPI_STATUS(status);
+}
+/*******************************************************************************
+ *
+ * FUNCTION:    acpi_load_table
+ *
+ * PARAMETERS:  table               - Pointer to a buffer containing the ACPI
+ *                                    table to be loaded.
+ *
+ * RETURN:      Status
+ *
+ * DESCRIPTION: Dynamically load an ACPI table from the caller's buffer. Must
+ *              be a valid ACPI table with a valid ACPI table header.
+ *              Note1: Mainly intended to support hotplug addition of SSDTs.
+ *              Note2: Does not copy the incoming table. User is reponsible
+ *              to ensure that the table is not deleted or unmapped.
+ *
+ ******************************************************************************/
+acpi_status acpi_load_table(struct acpi_table_header *table)
+{
+        acpi_status status;
+        struct acpi_table_desc table_desc;
+        u32 table_index;
+        ACPI_FUNCTION_TRACE(acpi_load_table);
+        /* Parameter validation */
+        if (!table) {
+                return_ACPI_STATUS(AE_BAD_PARAMETER);
+        }
+        /* Init local table descriptor */
+        ACPI_MEMSET(&table_desc, 0, sizeof(struct acpi_table_desc));
+        table_desc.address = ACPI_PTR_TO_PHYSADDR(table);
+        table_desc.pointer = table;
+        table_desc.length = table->length;
+        table_desc.flags = ACPI_TABLE_ORIGIN_UNKNOWN;
+        /* Must acquire the interpreter lock during this operation */
+        status = acpi_ut_acquire_mutex(ACPI_MTX_INTERPRETER);
+        if (ACPI_FAILURE(status)) {
+                return_ACPI_STATUS(status);
+        }
+        /* Install the table and load it into the namespace */
+        ACPI_INFO((AE_INFO, "Host-directed Dynamic ACPI Table Load:"));
+        status = acpi_tb_add_table(&table_desc, &table_index);
+        if (ACPI_FAILURE(status)) {
+                goto unlock_and_exit;
+        }
+        status = acpi_ns_load_table(table_index, acpi_gbl_root_node);
+        /* Invoke table handler if present */
+        if (acpi_gbl_table_handler) {
+                (void)acpi_gbl_table_handler(ACPI_TABLE_EVENT_LOAD, table,
+                                             acpi_gbl_table_handler_context);
+        }
+      unlock_and_exit:
+        (void)acpi_ut_release_mutex(ACPI_MTX_INTERPRETER);
+        return_ACPI_STATUS(status);
+}
+ACPI_EXPORT_SYMBOL(acpi_load_table)
+/*******************************************************************************
+ *
+ * FUNCTION:    acpi_unload_parent_table
+ *
+ * PARAMETERS:  object              - Handle to any namespace object owned by
+ *                                    the table to be unloaded
+ *
+ * RETURN:      Status
+ *
+ * DESCRIPTION: Via any namespace object within an SSDT or OEMx table, unloads
+ *              the table and deletes all namespace objects associated with
+ *              that table. Unloading of the DSDT is not allowed.
+ *              Note: Mainly intended to support hotplug removal of SSDTs.
+ *
+ ******************************************************************************/
+acpi_status acpi_unload_parent_table(acpi_handle object)
+{
+        struct acpi_namespace_node *node =
+            ACPI_CAST_PTR(struct acpi_namespace_node, object);
+        acpi_status status = AE_NOT_EXIST;
+        acpi_owner_id owner_id;
+        u32 i;
+        ACPI_FUNCTION_TRACE(acpi_unload_parent_table);
+        /* Parameter validation */
+        if (!object) {
+                return_ACPI_STATUS(AE_BAD_PARAMETER);
+        }
+        /*
+         * The node owner_id is currently the same as the parent table ID.
+         * However, this could change in the future.
+         */
+        owner_id = node->owner_id;
+        if (!owner_id) {
+                /* owner_id==0 means DSDT is the owner. DSDT cannot be unloaded */
+                return_ACPI_STATUS(AE_TYPE);
+        }
+        /* Must acquire the interpreter lock during this operation */
+        status = acpi_ut_acquire_mutex(ACPI_MTX_INTERPRETER);
+        if (ACPI_FAILURE(status)) {
+                return_ACPI_STATUS(status);
+        }
+        /* Find the table in the global table list */
+        for (i = 0; i < acpi_gbl_root_table_list.current_table_count; i++) {
+                if (owner_id != acpi_gbl_root_table_list.tables[i].owner_id) {
+                        continue;
+                }
+                /*
+                 * Allow unload of SSDT and OEMx tables only. Do not allow unload
+                 * of the DSDT. No other types of tables should get here, since
+                 * only these types can contain AML and thus are the only types
+                 * that can create namespace objects.
+                 */
+                if (ACPI_COMPARE_NAME
+                    (acpi_gbl_root_table_list.tables[i].signature.ascii,
+                     ACPI_SIG_DSDT)) {
+                        status = AE_TYPE;
+                        break;
+                }
+                /* Ensure the table is actually loaded */
+                if (!acpi_tb_is_table_loaded(i)) {
+                        status = AE_NOT_EXIST;
+                        break;
+                }
+                /* Invoke table handler if present */
+                if (acpi_gbl_table_handler) {
+                        (void)acpi_gbl_table_handler(ACPI_TABLE_EVENT_UNLOAD,
+                                                     acpi_gbl_root_table_list.
+                                                     tables[i].pointer,
+                                                     acpi_gbl_table_handler_context);
+                }
+                /*
+                 * Delete all namespace objects owned by this table. Note that
+                 * these objects can appear anywhere in the namespace by virtue
+                 * of the AML "Scope" operator. Thus, we need to track ownership
+                 * by an ID, not simply a position within the hierarchy.
+                 */
+                status = acpi_tb_delete_namespace_by_owner(i);
+                if (ACPI_FAILURE(status)) {
+                        break;
+                }
+                status = acpi_tb_release_owner_id(i);
+                acpi_tb_set_table_loaded_flag(i, FALSE);
+                break;
+        }
+        (void)acpi_ut_release_mutex(ACPI_MTX_INTERPRETER);
+        return_ACPI_STATUS(status);
+}
+ACPI_EXPORT_SYMBOL(acpi_unload_parent_table)
+static int __init acpi_no_auto_ssdt_setup(char *s) {
+        printk(KERN_NOTICE "ACPI: SSDT auto-load disabled\n");
+        no_auto_ssdt = 1;
+        return 1;
+}
+__setup("acpi_no_auto_ssdt", acpi_no_auto_ssdt_setup);
diff --git a/drivers/acpi/acpica/tbxfroot.c b/drivers/acpi/acpica/tbxfroot.c
index 4258f647ca3d..74e720800037 100644
--- a/drivers/acpi/acpica/tbxfroot.c
+++ b/drivers/acpi/acpica/tbxfroot.c
@@ -57,7 +57,7 @@ static acpi_status acpi_tb_validate_rsdp(struct acpi_table_rsdp *rsdp);
 *
 * FUNCTION:    acpi_tb_validate_rsdp
 *
- * PARAMETERS:  Rsdp                - Pointer to unvalidated RSDP
+ * PARAMETERS:  rsdp                - Pointer to unvalidated RSDP
 *
 * RETURN:      Status
 *
@@ -107,10 +107,10 @@ static acpi_status acpi_tb_validate_rsdp(struct acpi_table_rsdp *rsdp)
 *
 * RETURN:      Status, RSDP physical address
 *
- * DESCRIPTION: Search lower 1_mbyte of memory for the root system descriptor
+ * DESCRIPTION: Search lower 1Mbyte of memory for the root system descriptor
 *              pointer structure.  If it is found, set *RSDP to point to it.
 *
- * NOTE1:       The RSDP must be either in the first 1_k of the Extended
+ * NOTE1:       The RSDP must be either in the first 1K of the Extended
 *              BIOS Data Area or between E0000 and FFFFF (From ACPI Spec.)
 *              Only a 32-bit physical address is necessary.
 *
@@ -152,7 +152,7 @@ acpi_status acpi_find_root_pointer(acpi_size *table_address)
        if (physical_address > 0x400) {
                /*
                 * 1b) Search EBDA paragraphs (EBDA is required to be a
-                 *     minimum of 1_k length)
+                 *     minimum of 1K length)
                 */
                table_ptr = acpi_os_map_memory((acpi_physical_address)
                                               physical_address,
@@ -216,7 +216,7 @@ acpi_status acpi_find_root_pointer(acpi_size *table_address)
        /* A valid RSDP was not found */
-        ACPI_ERROR((AE_INFO, "A valid RSDP was not found"));
+        ACPI_BIOS_ERROR((AE_INFO, "A valid RSDP was not found"));
        return_ACPI_STATUS(AE_NOT_FOUND);
 }
@@ -225,7 +225,7 @@ acpi_status acpi_find_root_pointer(acpi_size *table_address)
 * FUNCTION:    acpi_tb_scan_memory_for_rsdp
 *
 * PARAMETERS:  start_address       - Starting pointer for search
- *              Length              - Maximum length to search
+ *              length              - Maximum length to search
 *
 * RETURN:      Pointer to the RSDP if found, otherwise NULL.
 *
diff --git a/drivers/acpi/acpica/utaddress.c b/drivers/acpi/acpica/utaddress.c
index 67932aebe6dd..64880306133d 100644
--- a/drivers/acpi/acpica/utaddress.c
+++ b/drivers/acpi/acpica/utaddress.c
@@ -53,8 +53,8 @@ ACPI_MODULE_NAME("utaddress")
 * FUNCTION:    acpi_ut_add_address_range
 *
 * PARAMETERS:  space_id            - Address space ID
- *              Address             - op_region start address
+ *              address             - op_region start address
- *              Length              - op_region length
+ *              length              - op_region length
 *              region_node         - op_region namespace node
 *
 * RETURN:      Status
@@ -186,9 +186,9 @@ acpi_ut_remove_address_range(acpi_adr_space_type space_id,
 * FUNCTION:    acpi_ut_check_address_range
 *
 * PARAMETERS:  space_id            - Address space ID
- *              Address             - Start address
+ *              address             - Start address
- *              Length              - Length of address range
+ *              length              - Length of address range
- *              Warn                - TRUE if warning on overlap desired
+ *              warn                - TRUE if warning on overlap desired
 *
 * RETURN:      Count of the number of conflicts detected. Zero is always
 *              returned for Space IDs other than Memory or I/O.
diff --git a/drivers/acpi/acpica/utalloc.c b/drivers/acpi/acpica/utalloc.c
index 9982d2ea66fb..ed29d474095e 100644
--- a/drivers/acpi/acpica/utalloc.c
+++ b/drivers/acpi/acpica/utalloc.c
@@ -189,7 +189,7 @@ acpi_status acpi_ut_delete_caches(void)
 *
 * FUNCTION:    acpi_ut_validate_buffer
 *
- * PARAMETERS:  Buffer              - Buffer descriptor to be validated
+ * PARAMETERS:  buffer              - Buffer descriptor to be validated
 *
 * RETURN:      Status
 *
@@ -227,7 +227,7 @@ acpi_status acpi_ut_validate_buffer(struct acpi_buffer * buffer)
 *
 * FUNCTION:    acpi_ut_initialize_buffer
 *
- * PARAMETERS:  Buffer              - Buffer to be validated
+ * PARAMETERS:  buffer              - Buffer to be validated
 *              required_length     - Length needed
 *
 * RETURN:      Status
@@ -308,10 +308,10 @@ acpi_ut_initialize_buffer(struct acpi_buffer * buffer,
 *
 * FUNCTION:    acpi_ut_allocate
 *
- * PARAMETERS:  Size                - Size of the allocation
+ * PARAMETERS:  size                - Size of the allocation
- *              Component           - Component type of caller
+ *              component           - Component type of caller
- *              Module              - Source file name of caller
+ *              module              - Source file name of caller
- *              Line                - Line number of caller
+ *              line                - Line number of caller
 *
 * RETURN:      Address of the allocated memory on success, NULL on failure.
 *
@@ -352,10 +352,10 @@ void *acpi_ut_allocate(acpi_size size,
 *
 * FUNCTION:    acpi_ut_allocate_zeroed
 *
- * PARAMETERS:  Size                - Size of the allocation
+ * PARAMETERS:  size                - Size of the allocation
- *              Component           - Component type of caller
+ *              component           - Component type of caller
- *              Module              - Source file name of caller
+ *              module              - Source file name of caller
- *              Line                - Line number of caller
+ *              line                - Line number of caller
 *
 * RETURN:      Address of the allocated memory on success, NULL on failure.
 *
diff --git a/drivers/acpi/acpica/utcopy.c b/drivers/acpi/acpica/utcopy.c
index 3317c0a406ee..294692ae76e9 100644
--- a/drivers/acpi/acpica/utcopy.c
+++ b/drivers/acpi/acpica/utcopy.c
@@ -317,7 +317,7 @@ acpi_ut_copy_ielement_to_eelement(u8 object_type,
 * FUNCTION:    acpi_ut_copy_ipackage_to_epackage
 *
 * PARAMETERS:  internal_object     - Pointer to the object we are returning
- *              Buffer              - Where the object is returned
+ *              buffer              - Where the object is returned
 *              space_used          - Where the object length is returned
 *
 * RETURN:      Status
diff --git a/drivers/acpi/acpica/utdebug.c b/drivers/acpi/acpica/utdebug.c
index a0998a886318..e810894149ae 100644
--- a/drivers/acpi/acpica/utdebug.c
+++ b/drivers/acpi/acpica/utdebug.c
@@ -145,7 +145,7 @@ static const char *acpi_ut_trim_function_name(const char *function_name)
 *              function_name       - Caller's procedure name
 *              module_name         - Caller's module name
 *              component_id        - Caller's component ID
- *              Format              - Printf format field
+ *              format              - Printf format field
 *              ...                 - Optional printf arguments
 *
 * RETURN:      None
@@ -217,7 +217,7 @@ ACPI_EXPORT_SYMBOL(acpi_debug_print)
 *              function_name       - Caller's procedure name
 *              module_name         - Caller's module name
 *              component_id        - Caller's component ID
- *              Format              - Printf format field
+ *              format              - Printf format field
 *              ...                 - Optional printf arguments
 *
 * RETURN:      None
@@ -286,7 +286,7 @@ ACPI_EXPORT_SYMBOL(acpi_ut_trace)
 *              function_name       - Caller's procedure name
 *              module_name         - Caller's module name
 *              component_id        - Caller's component ID
- *              Pointer             - Pointer to display
+ *              pointer             - Pointer to display
 *
 * RETURN:      None
 *
@@ -315,7 +315,7 @@ acpi_ut_trace_ptr(u32 line_number,
 *              function_name       - Caller's procedure name
 *              module_name         - Caller's module name
 *              component_id        - Caller's component ID
- *              String              - Additional string to display
+ *              string              - Additional string to display
 *
 * RETURN:      None
 *
@@ -346,7 +346,7 @@ acpi_ut_trace_str(u32 line_number,
 *              function_name       - Caller's procedure name
 *              module_name         - Caller's module name
 *              component_id        - Caller's component ID
- *              Integer             - Integer to display
+ *              integer             - Integer to display
 *
 * RETURN:      None
 *
@@ -408,7 +408,7 @@ ACPI_EXPORT_SYMBOL(acpi_ut_exit)
 *              function_name       - Caller's procedure name
 *              module_name         - Caller's module name
 *              component_id        - Caller's component ID
- *              Status              - Exit status code
+ *              status              - Exit status code
 *
 * RETURN:      None
 *
@@ -449,7 +449,7 @@ ACPI_EXPORT_SYMBOL(acpi_ut_status_exit)
 *              function_name       - Caller's procedure name
 *              module_name         - Caller's module name
 *              component_id        - Caller's component ID
- *              Value               - Value to be printed with exit msg
+ *              value               - Value to be printed with exit msg
 *
 * RETURN:      None
 *
@@ -481,7 +481,7 @@ ACPI_EXPORT_SYMBOL(acpi_ut_value_exit)
 *              function_name       - Caller's procedure name
 *              module_name         - Caller's module name
 *              component_id        - Caller's component ID
- *              Ptr                 - Pointer to display
+ *              ptr                 - Pointer to display
 *
 * RETURN:      None
 *
@@ -508,10 +508,10 @@ acpi_ut_ptr_exit(u32 line_number,
 *
 * FUNCTION:    acpi_ut_dump_buffer
 *
- * PARAMETERS:  Buffer              - Buffer to dump
+ * PARAMETERS:  buffer              - Buffer to dump
- *              Count               - Amount to dump, in bytes
+ *              count               - Amount to dump, in bytes
- *              Display             - BYTE, WORD, DWORD, or QWORD display
+ *              display             - BYTE, WORD, DWORD, or QWORD display
- *              component_iD        - Caller's component ID
+ *              component_ID        - Caller's component ID
 *
 * RETURN:      None
 *
@@ -625,10 +625,10 @@ void acpi_ut_dump_buffer2(u8 * buffer, u32 count, u32 display)
 *
 * FUNCTION:    acpi_ut_dump_buffer
 *
- * PARAMETERS:  Buffer              - Buffer to dump
+ * PARAMETERS:  buffer              - Buffer to dump
- *              Count               - Amount to dump, in bytes
+ *              count               - Amount to dump, in bytes
- *              Display             - BYTE, WORD, DWORD, or QWORD display
+ *              display             - BYTE, WORD, DWORD, or QWORD display
- *              component_iD        - Caller's component ID
+ *              component_ID        - Caller's component ID
 *
 * RETURN:      None
 *
diff --git a/drivers/acpi/acpica/utdecode.c b/drivers/acpi/acpica/utdecode.c
index 684849949bf3..60a158472d82 100644
--- a/drivers/acpi/acpica/utdecode.c
+++ b/drivers/acpi/acpica/utdecode.c
@@ -49,41 +49,6 @@
 #define _COMPONENT          ACPI_UTILITIES
 ACPI_MODULE_NAME("utdecode")
-/*******************************************************************************
- *
- * FUNCTION:    acpi_format_exception
- *
- * PARAMETERS:  Status       - The acpi_status code to be formatted
- *
- * RETURN:      A string containing the exception text. A valid pointer is
- *              always returned.
- *
- * DESCRIPTION: This function translates an ACPI exception into an ASCII string
- *              It is here instead of utxface.c so it is always present.
- *
- ******************************************************************************/
-const char *acpi_format_exception(acpi_status status)
-{
-        const char *exception = NULL;
-        ACPI_FUNCTION_ENTRY();
-        exception = acpi_ut_validate_exception(status);
-        if (!exception) {
-                /* Exception code was not recognized */
-                ACPI_ERROR((AE_INFO,
-                            "Unknown exception code: 0x%8.8X", status));
-                exception = "UNKNOWN_STATUS_CODE";
-        }
-        return (ACPI_CAST_PTR(const char, exception));
-}
-ACPI_EXPORT_SYMBOL(acpi_format_exception)
 /*
 * Properties of the ACPI Object Types, both internal and external.
 * The table is indexed by values of acpi_object_type
@@ -126,8 +91,8 @@ const u8 acpi_gbl_ns_properties[ACPI_NUM_NS_TYPES] = {
 *
 * FUNCTION:    acpi_ut_hex_to_ascii_char
 *
- * PARAMETERS:  Integer             - Contains the hex digit
+ * PARAMETERS:  integer             - Contains the hex digit
- *              Position            - bit position of the digit within the
+ *              position            - bit position of the digit within the
 *                                    integer (multiple of 4)
 *
 * RETURN:      The converted Ascii character
@@ -164,16 +129,17 @@ char acpi_ut_hex_to_ascii_char(u64 integer, u32 position)
 /* Region type decoding */
 const char *acpi_gbl_region_types[ACPI_NUM_PREDEFINED_REGIONS] = {
-        "SystemMemory",
+        "SystemMemory",         /* 0x00 */
-        "SystemIO",
+        "SystemIO",             /* 0x01 */
-        "PCI_Config",
+        "PCI_Config",           /* 0x02 */
-        "EmbeddedControl",
+        "EmbeddedControl",      /* 0x03 */
-        "SMBus",
+        "SMBus",                /* 0x04 */
-        "SystemCMOS",
+        "SystemCMOS",           /* 0x05 */
-        "PCIBARTarget",
+        "PCIBARTarget",         /* 0x06 */
-        "IPMI",
+        "IPMI",                 /* 0x07 */
-        "GeneralPurposeIo",
+        "GeneralPurposeIo",     /* 0x08 */
-        "GenericSerialBus"
+        "GenericSerialBus",     /* 0x09 */
+        "PCC"                   /* 0x0A */
 };
 char *acpi_ut_get_region_name(u8 space_id)
@@ -228,7 +194,7 @@ char *acpi_ut_get_event_name(u32 event_id)
 *
 * FUNCTION:    acpi_ut_get_type_name
 *
- * PARAMETERS:  Type                - An ACPI object type
+ * PARAMETERS:  type                - An ACPI object type
 *
 * RETURN:      Decoded ACPI object type name
 *
@@ -306,7 +272,7 @@ char *acpi_ut_get_object_type_name(union acpi_operand_object *obj_desc)
 *
 * FUNCTION:    acpi_ut_get_node_name
 *
- * PARAMETERS:  Object               - A namespace node
+ * PARAMETERS:  object               - A namespace node
 *
 * RETURN:      ASCII name of the node
 *
@@ -351,7 +317,7 @@ char *acpi_ut_get_node_name(void *object)
 *
 * FUNCTION:    acpi_ut_get_descriptor_name
 *
- * PARAMETERS:  Object               - An ACPI object
+ * PARAMETERS:  object               - An ACPI object
 *
 * RETURN:      Decoded name of the descriptor type
 *
@@ -401,7 +367,7 @@ char *acpi_ut_get_descriptor_name(void *object)
 *
 * FUNCTION:    acpi_ut_get_reference_name
 *
- * PARAMETERS:  Object               - An ACPI reference object
+ * PARAMETERS:  object               - An ACPI reference object
 *
 * RETURN:      Decoded name of the type of reference
 *
@@ -532,7 +498,7 @@ const char *acpi_ut_get_notify_name(u32 notify_value)
 *
 * FUNCTION:    acpi_ut_valid_object_type
 *
- * PARAMETERS:  Type            - Object type to be validated
+ * PARAMETERS:  type            - Object type to be validated
 *
 * RETURN:      TRUE if valid object type, FALSE otherwise
 *
diff --git a/drivers/acpi/acpica/utdelete.c b/drivers/acpi/acpica/utdelete.c
index 2a6c3e183697..798105443d0f 100644
--- a/drivers/acpi/acpica/utdelete.c
+++ b/drivers/acpi/acpica/utdelete.c
@@ -60,7 +60,7 @@ acpi_ut_update_ref_count(union acpi_operand_object *object, u32 action);
 *
 * FUNCTION:    acpi_ut_delete_internal_obj
 *
- * PARAMETERS:  Object         - Object to be deleted
+ * PARAMETERS:  object         - Object to be deleted
 *
 * RETURN:      None
 *
@@ -152,7 +152,7 @@ static void acpi_ut_delete_internal_obj(union acpi_operand_object *object)
        case ACPI_TYPE_PROCESSOR:
        case ACPI_TYPE_THERMAL:
-                /* Walk the notify handler list for this object */
+                /* Walk the address handler list for this object */
                handler_desc = object->common_notify.handler;
                while (handler_desc) {
@@ -358,8 +358,8 @@ void acpi_ut_delete_internal_object_list(union acpi_operand_object **obj_list)
 *
 * FUNCTION:    acpi_ut_update_ref_count
 *
- * PARAMETERS:  Object          - Object whose ref count is to be updated
+ * PARAMETERS:  object          - Object whose ref count is to be updated
- *              Action          - What to do
+ *              action          - What to do
 *
 * RETURN:      New ref count
 *
@@ -456,9 +456,9 @@ acpi_ut_update_ref_count(union acpi_operand_object *object, u32 action)
 *
 * FUNCTION:    acpi_ut_update_object_reference
 *
- * PARAMETERS:  Object              - Increment ref count for this object
+ * PARAMETERS:  object              - Increment ref count for this object
 *                                    and all sub-objects
- *              Action              - Either REF_INCREMENT or REF_DECREMENT or
+ *              action              - Either REF_INCREMENT or REF_DECREMENT or
 *                                    REF_FORCE_DELETE
 *
 * RETURN:      Status
@@ -480,6 +480,7 @@ acpi_ut_update_object_reference(union acpi_operand_object *object, u16 action)
        acpi_status status = AE_OK;
        union acpi_generic_state *state_list = NULL;
        union acpi_operand_object *next_object = NULL;
+        union acpi_operand_object *prev_object;
        union acpi_generic_state *state;
        u32 i;
@@ -505,12 +506,21 @@ acpi_ut_update_object_reference(union acpi_operand_object *object, u16 action)
                case ACPI_TYPE_POWER:
                case ACPI_TYPE_THERMAL:
-                        /* Update the notify objects for these types (if present) */
+                        /*
+                         * Update the notify objects for these types (if present)
-                        acpi_ut_update_ref_count(object->common_notify.
+                         * Two lists, system and device notify handlers.
-                                                 system_notify, action);
+                         */
-                        acpi_ut_update_ref_count(object->common_notify.
+                        for (i = 0; i < ACPI_NUM_NOTIFY_TYPES; i++) {
-                                                 device_notify, action);
+                                prev_object =
+                                    object->common_notify.notify_list[i];
+                                while (prev_object) {
+                                        next_object =
+                                            prev_object->notify.next[i];
+                                        acpi_ut_update_ref_count(prev_object,
+                                                                 action);
+                                        prev_object = next_object;
+                                }
+                        }
                        break;
                case ACPI_TYPE_PACKAGE:
@@ -630,7 +640,7 @@ acpi_ut_update_object_reference(union acpi_operand_object *object, u16 action)
 *
 * FUNCTION:    acpi_ut_add_reference
 *
- * PARAMETERS:  Object          - Object whose reference count is to be
+ * PARAMETERS:  object          - Object whose reference count is to be
 *                                incremented
 *
 * RETURN:      None
@@ -664,7 +674,7 @@ void acpi_ut_add_reference(union acpi_operand_object *object)
 *
 * FUNCTION:    acpi_ut_remove_reference
 *
- * PARAMETERS:  Object         - Object whose ref count will be decremented
+ * PARAMETERS:  object         - Object whose ref count will be decremented
 *
 * RETURN:      None
 *
diff --git a/drivers/acpi/acpica/uteval.c b/drivers/acpi/acpica/uteval.c
index 479f32b33415..a9c65fbea5f4 100644
--- a/drivers/acpi/acpica/uteval.c
+++ b/drivers/acpi/acpica/uteval.c
@@ -53,7 +53,7 @@ ACPI_MODULE_NAME("uteval")
 * FUNCTION:    acpi_ut_evaluate_object
 *
 * PARAMETERS:  prefix_node         - Starting node
- *              Path                - Path to object from starting node
+ *              path                - Path to object from starting node
 *              expected_return_types - Bitmap of allowed return types
 *              return_desc         - Where a return value is stored
 *
@@ -187,7 +187,7 @@ acpi_ut_evaluate_object(struct acpi_namespace_node *prefix_node,
 *
 * PARAMETERS:  object_name         - Object name to be evaluated
 *              device_node         - Node for the device
- *              Value               - Where the value is returned
+ *              value               - Where the value is returned
 *
 * RETURN:      Status
 *
@@ -229,7 +229,7 @@ acpi_ut_evaluate_numeric_object(char *object_name,
 * FUNCTION:    acpi_ut_execute_STA
 *
 * PARAMETERS:  device_node         - Node for the device
- *              Flags               - Where the status flags are returned
+ *              flags               - Where the status flags are returned
 *
 * RETURN:      Status
 *
diff --git a/drivers/acpi/acpica/utexcep.c b/drivers/acpi/acpica/utexcep.c
new file mode 100644
index 000000000000..23b98945f6b7
--- /dev/null
+++ b/drivers/acpi/acpica/utexcep.c
@@ -0,0 +1,153 @@
+/*******************************************************************************
+ *
+ * Module Name: utexcep - Exception code support
+ *
+ ******************************************************************************/
+/*
+ * Copyright (C) 2000 - 2012, Intel Corp.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions, and the following disclaimer,
+ *    without modification.
+ * 2. Redistributions in binary form must reproduce at minimum a disclaimer
+ *    substantially similar to the "NO WARRANTY" disclaimer below
+ *    ("Disclaimer") and any redistribution must be conditioned upon
+ *    including a substantially similar Disclaimer requirement for further
+ *    binary redistribution.
+ * 3. Neither the names of the above-listed copyright holders nor the names
+ *    of any contributors may be used to endorse or promote products derived
+ *    from this software without specific prior written permission.
+ *
+ * Alternatively, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") version 2 as published by the Free
+ * Software Foundation.
+ *
+ * NO WARRANTY
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGES.
+ */
+#define ACPI_DEFINE_EXCEPTION_TABLE
+#include <linux/export.h>
+#include <acpi/acpi.h>
+#include "accommon.h"
+#define _COMPONENT          ACPI_UTILITIES
+ACPI_MODULE_NAME("utexcep")
+/*******************************************************************************
+ *
+ * FUNCTION:    acpi_format_exception
+ *
+ * PARAMETERS:  status              - The acpi_status code to be formatted
+ *
+ * RETURN:      A string containing the exception text. A valid pointer is
+ *              always returned.
+ *
+ * DESCRIPTION: This function translates an ACPI exception into an ASCII
+ *              string. Returns "unknown status" string for invalid codes.
+ *
+ ******************************************************************************/
+const char *acpi_format_exception(acpi_status status)
+{
+        const char *exception = NULL;
+        ACPI_FUNCTION_ENTRY();
+        exception = acpi_ut_validate_exception(status);
+        if (!exception) {
+                /* Exception code was not recognized */
+                ACPI_ERROR((AE_INFO,
+                            "Unknown exception code: 0x%8.8X", status));
+                exception = "UNKNOWN_STATUS_CODE";
+        }
+        return (ACPI_CAST_PTR(const char, exception));
+}
+ACPI_EXPORT_SYMBOL(acpi_format_exception)
+/*******************************************************************************
+ *
+ * FUNCTION:    acpi_ut_validate_exception
+ *
+ * PARAMETERS:  status              - The acpi_status code to be formatted
+ *
+ * RETURN:      A string containing the exception text. NULL if exception is
+ *              not valid.
+ *
+ * DESCRIPTION: This function validates and translates an ACPI exception into
+ *              an ASCII string.
+ *
+ ******************************************************************************/
+const char *acpi_ut_validate_exception(acpi_status status)
+{
+        u32 sub_status;
+        const char *exception = NULL;
+        ACPI_FUNCTION_ENTRY();
+        /*
+         * Status is composed of two parts, a "type" and an actual code
+         */
+        sub_status = (status & ~AE_CODE_MASK);
+        switch (status & AE_CODE_MASK) {
+        case AE_CODE_ENVIRONMENTAL:
+                if (sub_status <= AE_CODE_ENV_MAX) {
+                        exception = acpi_gbl_exception_names_env[sub_status];
+                }
+                break;
+        case AE_CODE_PROGRAMMER:
+                if (sub_status <= AE_CODE_PGM_MAX) {
+                        exception = acpi_gbl_exception_names_pgm[sub_status];
+                }
+                break;
+        case AE_CODE_ACPI_TABLES:
+                if (sub_status <= AE_CODE_TBL_MAX) {
+                        exception = acpi_gbl_exception_names_tbl[sub_status];
+                }
+                break;
+        case AE_CODE_AML:
+                if (sub_status <= AE_CODE_AML_MAX) {
+                        exception = acpi_gbl_exception_names_aml[sub_status];
+                }
+                break;
+        case AE_CODE_CONTROL:
+                if (sub_status <= AE_CODE_CTRL_MAX) {
+                        exception = acpi_gbl_exception_names_ctrl[sub_status];
+                }
+                break;
+        default:
+                break;
+        }
+        return (ACPI_CAST_PTR(const char, exception));
+}
diff --git a/drivers/acpi/acpica/utglobal.c b/drivers/acpi/acpica/utglobal.c
index 90f53b42eca9..ed1893155f8b 100644
--- a/drivers/acpi/acpica/utglobal.c
+++ b/drivers/acpi/acpica/utglobal.c
@@ -247,8 +247,9 @@ struct acpi_fixed_event_info acpi_gbl_fixed_event_info[ACPI_NUM_FIXED_EVENTS] =
 *
 * RETURN:      Status
 *
- * DESCRIPTION: Init library globals.  All globals that require specific
+ * DESCRIPTION: Initialize ACPICA globals. All globals that require specific
- *              initialization should be initialized here!
+ *              initialization should be initialized here. This allows for
+ *              a warm restart.
 *
 ******************************************************************************/
@@ -284,7 +285,7 @@ acpi_status acpi_ut_init_globals(void)
                acpi_gbl_owner_id_mask[i] = 0;
        }
-        /* Last owner_iD is never valid */
+        /* Last owner_ID is never valid */
        acpi_gbl_owner_id_mask[ACPI_NUM_OWNERID_MASKS - 1] = 0x80000000;
@@ -304,8 +305,8 @@ acpi_status acpi_ut_init_globals(void)
        /* Global handlers */
-        acpi_gbl_system_notify.handler = NULL;
+        acpi_gbl_global_notify[0].handler = NULL;
-        acpi_gbl_device_notify.handler = NULL;
+        acpi_gbl_global_notify[1].handler = NULL;
        acpi_gbl_exception_handler = NULL;
        acpi_gbl_init_handler = NULL;
        acpi_gbl_table_handler = NULL;
diff --git a/drivers/acpi/acpica/utids.c b/drivers/acpi/acpica/utids.c
index c92eb1d93785..5d84e1954575 100644
--- a/drivers/acpi/acpica/utids.c
+++ b/drivers/acpi/acpica/utids.c
@@ -1,6 +1,6 @@
 /******************************************************************************
 *
- * Module Name: utids - support for device IDs - HID, UID, CID
+ * Module Name: utids - support for device Ids - HID, UID, CID
 *
 *****************************************************************************/
diff --git a/drivers/acpi/acpica/utlock.c b/drivers/acpi/acpica/utlock.c
index 155fd786d0f2..b1eb7f17e110 100644
--- a/drivers/acpi/acpica/utlock.c
+++ b/drivers/acpi/acpica/utlock.c
@@ -52,7 +52,7 @@ ACPI_MODULE_NAME("utlock")
 * FUNCTION:    acpi_ut_create_rw_lock
 *              acpi_ut_delete_rw_lock
 *
- * PARAMETERS:  Lock                - Pointer to a valid RW lock
+ * PARAMETERS:  lock                - Pointer to a valid RW lock
 *
 * RETURN:      Status
 *
@@ -89,7 +89,7 @@ void acpi_ut_delete_rw_lock(struct acpi_rw_lock *lock)
 * FUNCTION:    acpi_ut_acquire_read_lock
 *              acpi_ut_release_read_lock
 *
- * PARAMETERS:  Lock                - Pointer to a valid RW lock
+ * PARAMETERS:  lock                - Pointer to a valid RW lock
 *
 * RETURN:      Status
 *
@@ -149,7 +149,7 @@ acpi_status acpi_ut_release_read_lock(struct acpi_rw_lock *lock)
 * FUNCTION:    acpi_ut_acquire_write_lock
 *              acpi_ut_release_write_lock
 *
- * PARAMETERS:  Lock                - Pointer to a valid RW lock
+ * PARAMETERS:  lock                - Pointer to a valid RW lock
 *
 * RETURN:      Status
 *
diff --git a/drivers/acpi/acpica/utmath.c b/drivers/acpi/acpica/utmath.c
index 2491a552b0e6..d88a8aaab2a6 100644
--- a/drivers/acpi/acpica/utmath.c
+++ b/drivers/acpi/acpica/utmath.c
@@ -73,8 +73,8 @@ typedef union uint64_overlay {
 *
 * FUNCTION:    acpi_ut_short_divide
 *
- * PARAMETERS:  Dividend            - 64-bit dividend
+ * PARAMETERS:  dividend            - 64-bit dividend
- *              Divisor             - 32-bit divisor
+ *              divisor             - 32-bit divisor
 *              out_quotient        - Pointer to where the quotient is returned
 *              out_remainder       - Pointer to where the remainder is returned
 *
diff --git a/drivers/acpi/acpica/utmisc.c b/drivers/acpi/acpica/utmisc.c
index 86f19db74e05..33c6cf7ff467 100644
--- a/drivers/acpi/acpica/utmisc.c
+++ b/drivers/acpi/acpica/utmisc.c
@@ -50,79 +50,41 @@
 #define _COMPONENT          ACPI_UTILITIES
 ACPI_MODULE_NAME("utmisc")
+#if defined ACPI_ASL_COMPILER || defined ACPI_EXEC_APP
 /*******************************************************************************
 *
- * FUNCTION:    acpi_ut_validate_exception
+ * FUNCTION:    ut_convert_backslashes
 *
- * PARAMETERS:  Status       - The acpi_status code to be formatted
+ * PARAMETERS:  pathname        - File pathname string to be converted
 *
- * RETURN:      A string containing the exception text. NULL if exception is
+ * RETURN:      Modifies the input Pathname
- *              not valid.
 *
- * DESCRIPTION: This function validates and translates an ACPI exception into
+ * DESCRIPTION: Convert all backslashes (0x5C) to forward slashes (0x2F) within
- *              an ASCII string.
+ *              the entire input file pathname string.
 *
 ******************************************************************************/
-const char *acpi_ut_validate_exception(acpi_status status)
+void ut_convert_backslashes(char *pathname)
 {
-        u32 sub_status;
-        const char *exception = NULL;
-        ACPI_FUNCTION_ENTRY();
+        if (!pathname) {
+                return;
-        /*
+        }
-         * Status is composed of two parts, a "type" and an actual code
-         */
-        sub_status = (status & ~AE_CODE_MASK);
-        switch (status & AE_CODE_MASK) {
-        case AE_CODE_ENVIRONMENTAL:
-                if (sub_status <= AE_CODE_ENV_MAX) {
-                        exception = acpi_gbl_exception_names_env[sub_status];
-                }
-                break;
-        case AE_CODE_PROGRAMMER:
-                if (sub_status <= AE_CODE_PGM_MAX) {
-                        exception = acpi_gbl_exception_names_pgm[sub_status];
-                }
-                break;
-        case AE_CODE_ACPI_TABLES:
-                if (sub_status <= AE_CODE_TBL_MAX) {
-                        exception = acpi_gbl_exception_names_tbl[sub_status];
-                }
-                break;
-        case AE_CODE_AML:
-                if (sub_status <= AE_CODE_AML_MAX) {
-                        exception = acpi_gbl_exception_names_aml[sub_status];
-                }
-                break;
-        case AE_CODE_CONTROL:
-                if (sub_status <= AE_CODE_CTRL_MAX) {
+        while (*pathname) {
-                        exception = acpi_gbl_exception_names_ctrl[sub_status];
+                if (*pathname == '\\') {
+                        *pathname = '/';
                }
-                break;
-        default:
+                pathname++;
-                break;
        }
-        return (ACPI_CAST_PTR(const char, exception));
 }
+#endif
 /*******************************************************************************
 *
 * FUNCTION:    acpi_ut_is_pci_root_bridge
 *
- * PARAMETERS:  Id              - The HID/CID in string format
+ * PARAMETERS:  id              - The HID/CID in string format
 *
 * RETURN:      TRUE if the Id is a match for a PCI/PCI-Express Root Bridge
 *
@@ -150,7 +112,7 @@ u8 acpi_ut_is_pci_root_bridge(char *id)
 *
 * FUNCTION:    acpi_ut_is_aml_table
 *
- * PARAMETERS:  Table               - An ACPI table
+ * PARAMETERS:  table               - An ACPI table
 *
 * RETURN:      TRUE if table contains executable AML; FALSE otherwise
 *
@@ -284,7 +246,7 @@ acpi_status acpi_ut_allocate_owner_id(acpi_owner_id * owner_id)
 *
 * FUNCTION:    acpi_ut_release_owner_id
 *
- * PARAMETERS:  owner_id_ptr        - Pointer to a previously allocated owner_iD
+ * PARAMETERS:  owner_id_ptr        - Pointer to a previously allocated owner_ID
 *
 * RETURN:      None. No error is returned because we are either exiting a
 *              control method or unloading a table. Either way, we would
@@ -307,7 +269,7 @@ void acpi_ut_release_owner_id(acpi_owner_id * owner_id_ptr)
        *owner_id_ptr = 0;
-        /* Zero is not a valid owner_iD */
+        /* Zero is not a valid owner_ID */
        if (owner_id == 0) {
                ACPI_ERROR((AE_INFO, "Invalid OwnerId: 0x%2.2X", owner_id));
@@ -381,7 +343,7 @@ void acpi_ut_strupr(char *src_string)
 *
 * FUNCTION:    acpi_ut_print_string
 *
- * PARAMETERS:  String          - Null terminated ASCII string
+ * PARAMETERS:  string          - Null terminated ASCII string
 *              max_length      - Maximum output length
 *
 * RETURN:      None
@@ -467,7 +429,7 @@ void acpi_ut_print_string(char *string, u8 max_length)
 *
 * FUNCTION:    acpi_ut_dword_byte_swap
 *
- * PARAMETERS:  Value           - Value to be converted
+ * PARAMETERS:  value           - Value to be converted
 *
 * RETURN:      u32 integer with bytes swapped
 *
@@ -537,9 +499,9 @@ void acpi_ut_set_integer_width(u8 revision)
 *
 * FUNCTION:    acpi_ut_display_init_pathname
 *
- * PARAMETERS:  Type                - Object type of the node
+ * PARAMETERS:  type                - Object type of the node
 *              obj_handle          - Handle whose pathname will be displayed
- *              Path                - Additional path string to be appended.
+ *              path                - Additional path string to be appended.
 *                                      (NULL if no extra path)
 *
 * RETURN:      acpi_status
@@ -604,8 +566,8 @@ acpi_ut_display_init_pathname(u8 type,
 *
 * FUNCTION:    acpi_ut_valid_acpi_char
 *
- * PARAMETERS:  Char            - The character to be examined
+ * PARAMETERS:  char            - The character to be examined
- *              Position        - Byte position (0-3)
+ *              position        - Byte position (0-3)
 *
 * RETURN:      TRUE if the character is valid, FALSE otherwise
 *
@@ -640,7 +602,7 @@ u8 acpi_ut_valid_acpi_char(char character, u32 position)
 *
 * FUNCTION:    acpi_ut_valid_acpi_name
 *
- * PARAMETERS:  Name            - The name to be examined
+ * PARAMETERS:  name            - The name to be examined
 *
 * RETURN:      TRUE if the name is valid, FALSE otherwise
 *
@@ -671,7 +633,7 @@ u8 acpi_ut_valid_acpi_name(u32 name)
 *
 * FUNCTION:    acpi_ut_repair_name
 *
- * PARAMETERS:  Name            - The ACPI name to be repaired
+ * PARAMETERS:  name            - The ACPI name to be repaired
 *
 * RETURN:      Repaired version of the name
 *
@@ -705,8 +667,8 @@ acpi_name acpi_ut_repair_name(char *name)
 *
 * FUNCTION:    acpi_ut_strtoul64
 *
- * PARAMETERS:  String          - Null terminated string
+ * PARAMETERS:  string          - Null terminated string
- *              Base            - Radix of the string: 16 or ACPI_ANY_BASE;
+ *              base            - Radix of the string: 16 or ACPI_ANY_BASE;
 *                                ACPI_ANY_BASE means 'in behalf of to_integer'
 *              ret_integer     - Where the converted integer is returned
 *
@@ -755,7 +717,7 @@ acpi_status acpi_ut_strtoul64(char *string, u32 base, u64 * ret_integer)
        if (to_integer_op) {
                /*
-                 * Base equal to ACPI_ANY_BASE means 'to_integer operation case'.
+                 * Base equal to ACPI_ANY_BASE means 'ToInteger operation case'.
                 * We need to determine if it is decimal or hexadecimal.
                 */
                if ((*string == '0') && (ACPI_TOLOWER(*(string + 1)) == 'x')) {
@@ -878,8 +840,8 @@ acpi_status acpi_ut_strtoul64(char *string, u32 base, u64 * ret_integer)
 *
 * FUNCTION:    acpi_ut_create_update_state_and_push
 *
- * PARAMETERS:  Object          - Object to be added to the new state
+ * PARAMETERS:  object          - Object to be added to the new state
- *              Action          - Increment/Decrement
+ *              action          - Increment/Decrement
 *              state_list      - List the state will be added to
 *
 * RETURN:      Status
@@ -919,7 +881,7 @@ acpi_ut_create_update_state_and_push(union acpi_operand_object *object,
 * PARAMETERS:  source_object       - The package to walk
 *              target_object       - Target object (if package is being copied)
 *              walk_callback       - Called once for each package element
- *              Context             - Passed to the callback function
+ *              context             - Passed to the callback function
 *
 * RETURN:      Status
 *
diff --git a/drivers/acpi/acpica/utmutex.c b/drivers/acpi/acpica/utmutex.c
index 43174df33121..296baa676bc5 100644
--- a/drivers/acpi/acpica/utmutex.c
+++ b/drivers/acpi/acpica/utmutex.c
@@ -147,7 +147,7 @@ void acpi_ut_mutex_terminate(void)
 *
 * FUNCTION:    acpi_ut_create_mutex
 *
- * PARAMETERS:  mutex_iD        - ID of the mutex to be created
+ * PARAMETERS:  mutex_ID        - ID of the mutex to be created
 *
 * RETURN:      Status
 *
@@ -176,7 +176,7 @@ static acpi_status acpi_ut_create_mutex(acpi_mutex_handle mutex_id)
 *
 * FUNCTION:    acpi_ut_delete_mutex
 *
- * PARAMETERS:  mutex_iD        - ID of the mutex to be deleted
+ * PARAMETERS:  mutex_ID        - ID of the mutex to be deleted
 *
 * RETURN:      Status
 *
@@ -199,7 +199,7 @@ static void acpi_ut_delete_mutex(acpi_mutex_handle mutex_id)
 *
 * FUNCTION:    acpi_ut_acquire_mutex
 *
- * PARAMETERS:  mutex_iD        - ID of the mutex to be acquired
+ * PARAMETERS:  mutex_ID        - ID of the mutex to be acquired
 *
 * RETURN:      Status
 *
@@ -283,7 +283,7 @@ acpi_status acpi_ut_acquire_mutex(acpi_mutex_handle mutex_id)
 *
 * FUNCTION:    acpi_ut_release_mutex
 *
- * PARAMETERS:  mutex_iD        - ID of the mutex to be released
+ * PARAMETERS:  mutex_ID        - ID of the mutex to be released
 *
 * RETURN:      Status
 *
diff --git a/drivers/acpi/acpica/utobject.c b/drivers/acpi/acpica/utobject.c
index b112744fc9ae..655f0799a391 100644
--- a/drivers/acpi/acpica/utobject.c
+++ b/drivers/acpi/acpica/utobject.c
@@ -69,7 +69,7 @@ acpi_ut_get_element_length(u8 object_type,
 * PARAMETERS:  module_name         - Source file name of caller
 *              line_number         - Line number of caller
 *              component_id        - Component type of caller
- *              Type                - ACPI Type of the new object
+ *              type                - ACPI Type of the new object
 *
 * RETURN:      A new internal object, null on failure
 *
@@ -150,7 +150,7 @@ union acpi_operand_object *acpi_ut_create_internal_object_dbg(const char
 *
 * FUNCTION:    acpi_ut_create_package_object
 *
- * PARAMETERS:  Count               - Number of package elements
+ * PARAMETERS:  count               - Number of package elements
 *
 * RETURN:      Pointer to a new Package object, null on failure
 *
@@ -323,11 +323,11 @@ union acpi_operand_object *acpi_ut_create_string_object(acpi_size string_size)
 *
 * FUNCTION:    acpi_ut_valid_internal_object
 *
- * PARAMETERS:  Object              - Object to be validated
+ * PARAMETERS:  object              - Object to be validated
 *
 * RETURN:      TRUE if object is valid, FALSE otherwise
 *
- * DESCRIPTION: Validate a pointer to be a union acpi_operand_object
+ * DESCRIPTION: Validate a pointer to be of type union acpi_operand_object
 *
 ******************************************************************************/
@@ -348,7 +348,7 @@ u8 acpi_ut_valid_internal_object(void *object)
        switch (ACPI_GET_DESCRIPTOR_TYPE(object)) {
        case ACPI_DESC_TYPE_OPERAND:
-                /* The object appears to be a valid union acpi_operand_object    */
+                /* The object appears to be a valid union acpi_operand_object */
                return (TRUE);
@@ -407,7 +407,7 @@ void *acpi_ut_allocate_object_desc_dbg(const char *module_name,
 *
 * FUNCTION:    acpi_ut_delete_object_desc
 *
- * PARAMETERS:  Object          - An Acpi internal object to be deleted
+ * PARAMETERS:  object          - An Acpi internal object to be deleted
 *
 * RETURN:      None.
 *
@@ -419,7 +419,7 @@ void acpi_ut_delete_object_desc(union acpi_operand_object *object)
 {
        ACPI_FUNCTION_TRACE_PTR(ut_delete_object_desc, object);
-        /* Object must be a union acpi_operand_object    */
+        /* Object must be a union acpi_operand_object */
        if (ACPI_GET_DESCRIPTOR_TYPE(object) != ACPI_DESC_TYPE_OPERAND) {
                ACPI_ERROR((AE_INFO,
diff --git a/drivers/acpi/acpica/utosi.c b/drivers/acpi/acpica/utosi.c
index 2360cf70c18c..34ef0bd7e4b4 100644
--- a/drivers/acpi/acpica/utosi.c
+++ b/drivers/acpi/acpica/utosi.c
@@ -68,7 +68,7 @@ static struct acpi_interface_info acpi_default_supported_interfaces[] = {
        {"Windows 2001.1", NULL, 0, ACPI_OSI_WINSRV_2003},      /* Windows Server 2003 */
        {"Windows 2001 SP2", NULL, 0, ACPI_OSI_WIN_XP_SP2},     /* Windows XP SP2 */
        {"Windows 2001.1 SP1", NULL, 0, ACPI_OSI_WINSRV_2003_SP1},      /* Windows Server 2003 SP1 - Added 03/2006 */
-        {"Windows 2006", NULL, 0, ACPI_OSI_WIN_VISTA},  /* Windows Vista - Added 03/2006 */
+        {"Windows 2006", NULL, 0, ACPI_OSI_WIN_VISTA},  /* Windows vista - Added 03/2006 */
        {"Windows 2006.1", NULL, 0, ACPI_OSI_WINSRV_2008},      /* Windows Server 2008 - Added 09/2009 */
        {"Windows 2006 SP1", NULL, 0, ACPI_OSI_WIN_VISTA_SP1},  /* Windows Vista SP1 - Added 09/2009 */
        {"Windows 2006 SP2", NULL, 0, ACPI_OSI_WIN_VISTA_SP2},  /* Windows Vista SP2 - Added 09/2010 */
diff --git a/drivers/acpi/acpica/utresrc.c b/drivers/acpi/acpica/utresrc.c
index 9d441ea70305..e38bef4980bc 100644
--- a/drivers/acpi/acpica/utresrc.c
+++ b/drivers/acpi/acpica/utresrc.c
@@ -356,13 +356,13 @@ static const u8 acpi_gbl_resource_types[] = {
        ACPI_SMALL_VARIABLE_LENGTH,     /* 06 start_dependent_functions */
        ACPI_FIXED_LENGTH,      /* 07 end_dependent_functions */
        ACPI_FIXED_LENGTH,      /* 08 IO */
-        ACPI_FIXED_LENGTH,      /* 09 fixed_iO */
+        ACPI_FIXED_LENGTH,      /* 09 fixed_IO */
-        ACPI_FIXED_LENGTH,      /* 0_a fixed_dMA */
+        ACPI_FIXED_LENGTH,      /* 0A fixed_DMA */
        0,
        0,
        0,
-        ACPI_VARIABLE_LENGTH,   /* 0_e vendor_short */
+        ACPI_VARIABLE_LENGTH,   /* 0E vendor_short */
-        ACPI_FIXED_LENGTH,      /* 0_f end_tag */
+        ACPI_FIXED_LENGTH,      /* 0F end_tag */
        /* Large descriptors */
@@ -375,16 +375,16 @@ static const u8 acpi_gbl_resource_types[] = {
        ACPI_FIXED_LENGTH,      /* 06 memory32_fixed */
        ACPI_VARIABLE_LENGTH,   /* 07 Dword* address */
        ACPI_VARIABLE_LENGTH,   /* 08 Word* address */
-        ACPI_VARIABLE_LENGTH,   /* 09 extended_iRQ */
+        ACPI_VARIABLE_LENGTH,   /* 09 extended_IRQ */
-        ACPI_VARIABLE_LENGTH,   /* 0_a Qword* address */
+        ACPI_VARIABLE_LENGTH,   /* 0A Qword* address */
-        ACPI_FIXED_LENGTH,      /* 0_b Extended* address */
+        ACPI_FIXED_LENGTH,      /* 0B Extended* address */
-        ACPI_VARIABLE_LENGTH,   /* 0_c Gpio* */
+        ACPI_VARIABLE_LENGTH,   /* 0C Gpio* */
        0,
-        ACPI_VARIABLE_LENGTH    /* 0_e *serial_bus */
+        ACPI_VARIABLE_LENGTH    /* 0E *serial_bus */
 };
 /*
- * For the i_aSL compiler/disassembler, we don't want any error messages
+ * For the iASL compiler/disassembler, we don't want any error messages
 * because the disassembler uses the resource validation code to determine
 * if Buffer objects are actually Resource Templates.
 */
@@ -398,11 +398,11 @@ static const u8 acpi_gbl_resource_types[] = {
 *
 * FUNCTION:    acpi_ut_walk_aml_resources
 *
- * PARAMETERS:  Aml             - Pointer to the raw AML resource template
+ * PARAMETERS:  aml             - Pointer to the raw AML resource template
 *              aml_length      - Length of the entire template
 *              user_function   - Called once for each descriptor found. If
 *                                NULL, a pointer to the end_tag is returned
- *              Context         - Passed to user_function
+ *              context         - Passed to user_function
 *
 * RETURN:      Status
 *
@@ -513,7 +513,7 @@ acpi_ut_walk_aml_resources(u8 * aml,
 *
 * FUNCTION:    acpi_ut_validate_resource
 *
- * PARAMETERS:  Aml             - Pointer to the raw AML resource descriptor
+ * PARAMETERS:  aml             - Pointer to the raw AML resource descriptor
 *              return_index    - Where the resource index is returned. NULL
 *                                if the index is not required.
 *
@@ -664,7 +664,7 @@ acpi_status acpi_ut_validate_resource(void *aml, u8 * return_index)
 *
 * FUNCTION:    acpi_ut_get_resource_type
 *
- * PARAMETERS:  Aml             - Pointer to the raw AML resource descriptor
+ * PARAMETERS:  aml             - Pointer to the raw AML resource descriptor
 *
 * RETURN:      The Resource Type with no extraneous bits (except the
 *              Large/Small descriptor bit -- this is left alone)
@@ -698,7 +698,7 @@ u8 acpi_ut_get_resource_type(void *aml)
 *
 * FUNCTION:    acpi_ut_get_resource_length
 *
- * PARAMETERS:  Aml             - Pointer to the raw AML resource descriptor
+ * PARAMETERS:  aml             - Pointer to the raw AML resource descriptor
 *
 * RETURN:      Byte Length
 *
@@ -738,7 +738,7 @@ u16 acpi_ut_get_resource_length(void *aml)
 *
 * FUNCTION:    acpi_ut_get_resource_header_length
 *
- * PARAMETERS:  Aml             - Pointer to the raw AML resource descriptor
+ * PARAMETERS:  aml             - Pointer to the raw AML resource descriptor
 *
 * RETURN:      Length of the AML header (depends on large/small descriptor)
 *
@@ -763,7 +763,7 @@ u8 acpi_ut_get_resource_header_length(void *aml)
 *
 * FUNCTION:    acpi_ut_get_descriptor_length
 *
- * PARAMETERS:  Aml             - Pointer to the raw AML resource descriptor
+ * PARAMETERS:  aml             - Pointer to the raw AML resource descriptor
 *
 * RETURN:      Byte length
 *
diff --git a/drivers/acpi/acpica/utstate.c b/drivers/acpi/acpica/utstate.c
index 4267477c2797..a1c988260073 100644
--- a/drivers/acpi/acpica/utstate.c
+++ b/drivers/acpi/acpica/utstate.c
@@ -51,8 +51,8 @@ ACPI_MODULE_NAME("utstate")
 *
 * FUNCTION:    acpi_ut_create_pkg_state_and_push
 *
- * PARAMETERS:  Object          - Object to be added to the new state
+ * PARAMETERS:  object          - Object to be added to the new state
- *              Action          - Increment/Decrement
+ *              action          - Increment/Decrement
 *              state_list      - List the state will be added to
 *
 * RETURN:      Status
@@ -85,7 +85,7 @@ acpi_ut_create_pkg_state_and_push(void *internal_object,
 * FUNCTION:    acpi_ut_push_generic_state
 *
 * PARAMETERS:  list_head           - Head of the state stack
- *              State               - State object to push
+ *              state               - State object to push
 *
 * RETURN:      None
 *
@@ -214,8 +214,8 @@ struct acpi_thread_state *acpi_ut_create_thread_state(void)
 *
 * FUNCTION:    acpi_ut_create_update_state
 *
- * PARAMETERS:  Object          - Initial Object to be installed in the state
+ * PARAMETERS:  object          - Initial Object to be installed in the state
- *              Action          - Update action to be performed
+ *              action          - Update action to be performed
 *
 * RETURN:      New state object, null on failure
 *
@@ -252,8 +252,8 @@ union acpi_generic_state *acpi_ut_create_update_state(union acpi_operand_object
 *
 * FUNCTION:    acpi_ut_create_pkg_state
 *
- * PARAMETERS:  Object          - Initial Object to be installed in the state
+ * PARAMETERS:  object          - Initial Object to be installed in the state
- *              Action          - Update action to be performed
+ *              action          - Update action to be performed
 *
 * RETURN:      New state object, null on failure
 *
@@ -325,7 +325,7 @@ union acpi_generic_state *acpi_ut_create_control_state(void)
 *
 * FUNCTION:    acpi_ut_delete_generic_state
 *
- * PARAMETERS:  State               - The state object to be deleted
+ * PARAMETERS:  state               - The state object to be deleted
 *
 * RETURN:      None
 *
diff --git a/drivers/acpi/acpica/utxface.c b/drivers/acpi/acpica/utxface.c
index afa94f51ff0b..534179f1177b 100644
--- a/drivers/acpi/acpica/utxface.c
+++ b/drivers/acpi/acpica/utxface.c
@@ -131,7 +131,7 @@ acpi_status __init acpi_initialize_subsystem(void)
 *
 * FUNCTION:    acpi_enable_subsystem
 *
- * PARAMETERS:  Flags           - Init/enable Options
+ * PARAMETERS:  flags           - Init/enable Options
 *
 * RETURN:      Status
 *
@@ -234,7 +234,7 @@ ACPI_EXPORT_SYMBOL(acpi_enable_subsystem)
 *
 * FUNCTION:    acpi_initialize_objects
 *
- * PARAMETERS:  Flags           - Init/enable Options
+ * PARAMETERS:  flags           - Init/enable Options
 *
 * RETURN:      Status
 *
@@ -409,7 +409,7 @@ ACPI_EXPORT_SYMBOL(acpi_subsystem_status)
 * PARAMETERS:  out_buffer      - A buffer to receive the resources for the
 *                                device
 *
- * RETURN:      Status          - the status of the call
+ * RETURN:      status          - the status of the call
 *
 * DESCRIPTION: This function is called to get information about the current
 *              state of the ACPI subsystem.  It will return system information
@@ -480,8 +480,8 @@ ACPI_EXPORT_SYMBOL(acpi_get_system_info)
 *
 * FUNCTION:    acpi_install_initialization_handler
 *
- * PARAMETERS:  Handler             - Callback procedure
+ * PARAMETERS:  handler             - Callback procedure
- *              Function            - Not (currently) used, see below
+ *              function            - Not (currently) used, see below
 *
 * RETURN:      Status
 *
@@ -618,7 +618,7 @@ ACPI_EXPORT_SYMBOL(acpi_remove_interface)
 *
 * FUNCTION:    acpi_install_interface_handler
 *
- * PARAMETERS:  Handler             - The _OSI interface handler to install
+ * PARAMETERS:  handler             - The _OSI interface handler to install
 *                                    NULL means "remove existing handler"
 *
 * RETURN:      Status
@@ -651,9 +651,9 @@ ACPI_EXPORT_SYMBOL(acpi_install_interface_handler)
 * FUNCTION:    acpi_check_address_range
 *
 * PARAMETERS:  space_id            - Address space ID
- *              Address             - Start address
+ *              address             - Start address
- *              Length              - Length
+ *              length              - Length
- *              Warn                - TRUE if warning on overlap desired
+ *              warn                - TRUE if warning on overlap desired
 *
 * RETURN:      Count of the number of conflicts detected.
 *
diff --git a/drivers/acpi/acpica/utxferror.c b/drivers/acpi/acpica/utxferror.c
index 52b568af1819..6d63cc39b9ae 100644
--- a/drivers/acpi/acpica/utxferror.c
+++ b/drivers/acpi/acpica/utxferror.c
@@ -53,7 +53,7 @@ ACPI_MODULE_NAME("utxferror")
 * This module is used for the in-kernel ACPICA as well as the ACPICA
 * tools/applications.
 *
- * For the i_aSL compiler case, the output is redirected to stderr so that
+ * For the iASL compiler case, the output is redirected to stderr so that
 * any of the various ACPI errors and warnings do not appear in the output
 * files, for either the compiler or disassembler portions of the tool.
 */
@@ -70,7 +70,7 @@ extern FILE *acpi_gbl_output_file;
 #else
 /*
- * non-i_aSL case - no redirection, nothing to do
+ * non-iASL case - no redirection, nothing to do
 */
 #define ACPI_MSG_REDIRECT_BEGIN
 #define ACPI_MSG_REDIRECT_END
@@ -82,6 +82,8 @@ extern FILE *acpi_gbl_output_file;
 #define ACPI_MSG_EXCEPTION      "ACPI Exception: "
 #define ACPI_MSG_WARNING        "ACPI Warning: "
 #define ACPI_MSG_INFO           "ACPI: "
+#define ACPI_MSG_BIOS_ERROR     "ACPI BIOS Bug: Error: "
+#define ACPI_MSG_BIOS_WARNING   "ACPI BIOS Bug: Warning: "
 /*
 * Common message suffix
 */
@@ -93,7 +95,7 @@ extern FILE *acpi_gbl_output_file;
 *
 * PARAMETERS:  module_name         - Caller's module name (for error output)
 *              line_number         - Caller's line number (for error output)
- *              Format              - Printf format string + additional args
+ *              format              - Printf format string + additional args
 *
 * RETURN:      None
 *
@@ -124,8 +126,8 @@ ACPI_EXPORT_SYMBOL(acpi_error)
 *
 * PARAMETERS:  module_name         - Caller's module name (for error output)
 *              line_number         - Caller's line number (for error output)
- *              Status              - Status to be formatted
+ *              status              - Status to be formatted
- *              Format              - Printf format string + additional args
+ *              format              - Printf format string + additional args
 *
 * RETURN:      None
 *
@@ -159,7 +161,7 @@ ACPI_EXPORT_SYMBOL(acpi_exception)
 *
 * PARAMETERS:  module_name         - Caller's module name (for error output)
 *              line_number         - Caller's line number (for error output)
- *              Format              - Printf format string + additional args
+ *              format              - Printf format string + additional args
 *
 * RETURN:      None
 *
@@ -190,7 +192,7 @@ ACPI_EXPORT_SYMBOL(acpi_warning)
 *
 * PARAMETERS:  module_name         - Caller's module name (for error output)
 *              line_number         - Caller's line number (for error output)
- *              Format              - Printf format string + additional args
+ *              format              - Printf format string + additional args
 *
 * RETURN:      None
 *
@@ -218,6 +220,72 @@ acpi_info(const char *module_name, u32 line_number, const char *format, ...)
 ACPI_EXPORT_SYMBOL(acpi_info)
+/*******************************************************************************
+ *
+ * FUNCTION:    acpi_bios_error
+ *
+ * PARAMETERS:  module_name         - Caller's module name (for error output)
+ *              line_number         - Caller's line number (for error output)
+ *              format              - Printf format string + additional args
+ *
+ * RETURN:      None
+ *
+ * DESCRIPTION: Print "ACPI Firmware Error" message with module/line/version
+ *              info
+ *
+ ******************************************************************************/
+void ACPI_INTERNAL_VAR_XFACE
+acpi_bios_error(const char *module_name,
+                u32 line_number, const char *format, ...)
+{
+        va_list arg_list;
+        ACPI_MSG_REDIRECT_BEGIN;
+        acpi_os_printf(ACPI_MSG_BIOS_ERROR);
+        va_start(arg_list, format);
+        acpi_os_vprintf(format, arg_list);
+        ACPI_MSG_SUFFIX;
+        va_end(arg_list);
+        ACPI_MSG_REDIRECT_END;
+}
+ACPI_EXPORT_SYMBOL(acpi_bios_error)
+/*******************************************************************************
+ *
+ * FUNCTION:    acpi_bios_warning
+ *
+ * PARAMETERS:  module_name         - Caller's module name (for error output)
+ *              line_number         - Caller's line number (for error output)
+ *              format              - Printf format string + additional args
+ *
+ * RETURN:      None
+ *
+ * DESCRIPTION: Print "ACPI Firmware Warning" message with module/line/version
+ *              info
+ *
+ ******************************************************************************/
+void ACPI_INTERNAL_VAR_XFACE
+acpi_bios_warning(const char *module_name,
+                  u32 line_number, const char *format, ...)
+{
+        va_list arg_list;
+        ACPI_MSG_REDIRECT_BEGIN;
+        acpi_os_printf(ACPI_MSG_BIOS_WARNING);
+        va_start(arg_list, format);
+        acpi_os_vprintf(format, arg_list);
+        ACPI_MSG_SUFFIX;
+        va_end(arg_list);
+        ACPI_MSG_REDIRECT_END;
+}
+ACPI_EXPORT_SYMBOL(acpi_bios_warning)
 /*
 * The remainder of this module contains internal error functions that may
 * be configured out.
@@ -271,9 +339,9 @@ acpi_ut_predefined_warning(const char *module_name,
 *
 * PARAMETERS:  module_name     - Caller's module name (for error output)
 *              line_number     - Caller's line number (for error output)
- *              Pathname        - Full pathname to the node
+ *              pathname        - Full pathname to the node
 *              node_flags      - From Namespace node for the method/object
- *              Format          - Printf format string + additional args
+ *              format          - Printf format string + additional args
 *
 * RETURN:      None
 *
@@ -373,9 +441,9 @@ acpi_ut_namespace_error(const char *module_name,
 *
 * PARAMETERS:  module_name         - Caller's module name (for error output)
 *              line_number         - Caller's line number (for error output)
- *              Message             - Error message to use on failure
+ *              message             - Error message to use on failure
 *              prefix_node         - Prefix relative to the path
- *              Path                - Path to the node (optional)
+ *              path                - Path to the node (optional)
 *              method_status       - Execution status
 *
 * RETURN:      None
diff --git a/drivers/acpi/acpica/utxfmutex.c b/drivers/acpi/acpica/utxfmutex.c
index 1427d191d15a..0a40a851b354 100644
--- a/drivers/acpi/acpica/utxfmutex.c
+++ b/drivers/acpi/acpica/utxfmutex.c
@@ -58,8 +58,8 @@ acpi_ut_get_mutex_object(acpi_handle handle,
 *
 * FUNCTION:    acpi_ut_get_mutex_object
 *
- * PARAMETERS:  Handle              - Mutex or prefix handle (optional)
+ * PARAMETERS:  handle              - Mutex or prefix handle (optional)
- *              Pathname            - Mutex pathname (optional)
+ *              pathname            - Mutex pathname (optional)
 *              ret_obj             - Where the mutex object is returned
 *
 * RETURN:      Status
@@ -118,9 +118,9 @@ acpi_ut_get_mutex_object(acpi_handle handle,
 *
 * FUNCTION:    acpi_acquire_mutex
 *
- * PARAMETERS:  Handle              - Mutex or prefix handle (optional)
+ * PARAMETERS:  handle              - Mutex or prefix handle (optional)
- *              Pathname            - Mutex pathname (optional)
+ *              pathname            - Mutex pathname (optional)
- *              Timeout             - Max time to wait for the lock (millisec)
+ *              timeout             - Max time to wait for the lock (millisec)
 *
 * RETURN:      Status
 *
@@ -155,8 +155,8 @@ acpi_acquire_mutex(acpi_handle handle, acpi_string pathname, u16 timeout)
 *
 * FUNCTION:    acpi_release_mutex
 *
- * PARAMETERS:  Handle              - Mutex or prefix handle (optional)
+ * PARAMETERS:  handle              - Mutex or prefix handle (optional)
- *              Pathname            - Mutex pathname (optional)
+ *              pathname            - Mutex pathname (optional)
 *
 * RETURN:      Status
 *
diff --git a/drivers/acpi/apei/apei-base.c b/drivers/acpi/apei/apei-base.c
index 5577762daee1..00a783661d0b 100644
--- a/drivers/acpi/apei/apei-base.c
+++ b/drivers/acpi/apei/apei-base.c
@@ -243,7 +243,7 @@ static int pre_map_gar_callback(struct apei_exec_context *ctx,
        u8 ins = entry->instruction;
        if (ctx->ins_table[ins].flags & APEI_EXEC_INS_ACCESS_REGISTER)
-                return acpi_os_map_generic_address(&entry->register_region);
+                return apei_map_generic_address(&entry->register_region);
        return 0;
 }
@@ -276,7 +276,7 @@ static int post_unmap_gar_callback(struct apei_exec_context *ctx,
        u8 ins = entry->instruction;
        if (ctx->ins_table[ins].flags & APEI_EXEC_INS_ACCESS_REGISTER)
-                acpi_os_unmap_generic_address(&entry->register_region);
+                apei_unmap_generic_address(&entry->register_region);
        return 0;
 }
@@ -586,6 +586,11 @@ static int apei_check_gar(struct acpi_generic_address *reg, u64 *paddr,
        }
        *access_bit_width = 1UL << (access_size_code + 2);
+        /* Fixup common BIOS bug */
+        if (bit_width == 32 && bit_offset == 0 && (*paddr & 0x03) == 0 &&
+            *access_bit_width < 32)
+                *access_bit_width = 32;
        if ((bit_width + bit_offset) > *access_bit_width) {
                pr_warning(FW_BUG APEI_PFX
                           "Invalid bit width + offset in GAR [0x%llx/%u/%u/%u/%u]\n",
@@ -606,6 +611,19 @@ static int apei_check_gar(struct acpi_generic_address *reg, u64 *paddr,
        return 0;
 }
+int apei_map_generic_address(struct acpi_generic_address *reg)
+{
+        int rc;
+        u32 access_bit_width;
+        u64 address;
+        rc = apei_check_gar(reg, &address, &access_bit_width);
+        if (rc)
+                return rc;
+        return acpi_os_map_generic_address(reg);
+}
+EXPORT_SYMBOL_GPL(apei_map_generic_address);
 /* read GAR in interrupt (including NMI) or process context */
 int apei_read(u64 *val, struct acpi_generic_address *reg)
 {
diff --git a/drivers/acpi/apei/apei-internal.h b/drivers/acpi/apei/apei-internal.h
index cca240a33038..f220d642136e 100644
--- a/drivers/acpi/apei/apei-internal.h
+++ b/drivers/acpi/apei/apei-internal.h
@@ -7,6 +7,8 @@
 #define APEI_INTERNAL_H
 #include <linux/cper.h>
+#include <linux/acpi.h>
+#include <linux/acpi_io.h>
 struct apei_exec_context;
@@ -68,6 +70,13 @@ static inline int apei_exec_run_optional(struct apei_exec_context *ctx, u8 actio
 /* IP has been set in instruction function */
 #define APEI_EXEC_SET_IP        1
+int apei_map_generic_address(struct acpi_generic_address *reg);
+static inline void apei_unmap_generic_address(struct acpi_generic_address *reg)
+{
+        acpi_os_unmap_generic_address(reg);
+}
 int apei_read(u64 *val, struct acpi_generic_address *reg);
 int apei_write(u64 val, struct acpi_generic_address *reg);
diff --git a/drivers/acpi/apei/ghes.c b/drivers/acpi/apei/ghes.c
index 9b3cac0abecc..1599566ed1fe 100644
--- a/drivers/acpi/apei/ghes.c
+++ b/drivers/acpi/apei/ghes.c
@@ -301,7 +301,7 @@ static struct ghes *ghes_new(struct acpi_hest_generic *generic)
        if (!ghes)
                return ERR_PTR(-ENOMEM);
        ghes->generic = generic;
-        rc = acpi_os_map_generic_address(&generic->error_status_address);
+        rc = apei_map_generic_address(&generic->error_status_address);
        if (rc)
                goto err_free;
        error_block_length = generic->error_block_length;
@@ -321,7 +321,7 @@ static struct ghes *ghes_new(struct acpi_hest_generic *generic)
        return ghes;
 err_unmap:
-        acpi_os_unmap_generic_address(&generic->error_status_address);
+        apei_unmap_generic_address(&generic->error_status_address);
 err_free:
        kfree(ghes);
        return ERR_PTR(rc);
@@ -330,7 +330,7 @@ err_free:
 static void ghes_fini(struct ghes *ghes)
 {
        kfree(ghes->estatus);
-        acpi_os_unmap_generic_address(&ghes->generic->error_status_address);
+        apei_unmap_generic_address(&ghes->generic->error_status_address);
 }
 enum {
diff --git a/drivers/acpi/battery.c b/drivers/acpi/battery.c
index 7dd3f9fb9f3f..45e3e1759fb8 100644
--- a/drivers/acpi/battery.c
+++ b/drivers/acpi/battery.c
@@ -250,6 +250,13 @@ static int acpi_battery_get_property(struct power_supply *psy,
                else
                        val->intval = battery->capacity_now * 1000;
                break;
+        case POWER_SUPPLY_PROP_CAPACITY:
+                if (battery->capacity_now && battery->full_charge_capacity)
+                        val->intval = battery->capacity_now * 100/
+                                        battery->full_charge_capacity;
+                else
+                        val->intval = 0;
+                break;
        case POWER_SUPPLY_PROP_MODEL_NAME:
                val->strval = battery->model_number;
                break;
@@ -276,6 +283,7 @@ static enum power_supply_property charge_battery_props[] = {
        POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
        POWER_SUPPLY_PROP_CHARGE_FULL,
        POWER_SUPPLY_PROP_CHARGE_NOW,
+        POWER_SUPPLY_PROP_CAPACITY,
        POWER_SUPPLY_PROP_MODEL_NAME,
        POWER_SUPPLY_PROP_MANUFACTURER,
        POWER_SUPPLY_PROP_SERIAL_NUMBER,
@@ -292,6 +300,7 @@ static enum power_supply_property energy_battery_props[] = {
        POWER_SUPPLY_PROP_ENERGY_FULL_DESIGN,
        POWER_SUPPLY_PROP_ENERGY_FULL,
        POWER_SUPPLY_PROP_ENERGY_NOW,
+        POWER_SUPPLY_PROP_CAPACITY,
        POWER_SUPPLY_PROP_MODEL_NAME,
        POWER_SUPPLY_PROP_MANUFACTURER,
        POWER_SUPPLY_PROP_SERIAL_NUMBER,
@@ -1043,17 +1052,26 @@ static int acpi_battery_remove(struct acpi_device *device, int type)
        return 0;
 }
+#ifdef CONFIG_PM_SLEEP
 /* this is needed to learn about changes made in suspended state */
-static int acpi_battery_resume(struct acpi_device *device)
+static int acpi_battery_resume(struct device *dev)
 {
        struct acpi_battery *battery;
-        if (!device)
+        if (!dev)
                return -EINVAL;
-        battery = acpi_driver_data(device);
+        battery = acpi_driver_data(to_acpi_device(dev));
+        if (!battery)
+                return -EINVAL;
        battery->update_time = 0;
        acpi_battery_update(battery);
        return 0;
 }
+#endif
+static SIMPLE_DEV_PM_OPS(acpi_battery_pm, NULL, acpi_battery_resume);
 static struct acpi_driver acpi_battery_driver = {
        .name = "battery",
@@ -1062,10 +1080,10 @@ static struct acpi_driver acpi_battery_driver = {
        .flags = ACPI_DRIVER_ALL_NOTIFY_EVENTS,
        .ops = {
                .add = acpi_battery_add,
-                .resume = acpi_battery_resume,
                .remove = acpi_battery_remove,
                .notify = acpi_battery_notify,
                },
+        .drv.pm = &acpi_battery_pm,
 };
 static void __init acpi_battery_init_async(void *unused, async_cookie_t cookie)
diff --git a/drivers/acpi/bus.c b/drivers/acpi/bus.c
index adceafda9c17..9628652e080c 100644
--- a/drivers/acpi/bus.c
+++ b/drivers/acpi/bus.c
@@ -574,6 +574,10 @@ static void acpi_bus_osc_support(void)
        capbuf[OSC_SUPPORT_TYPE] |= OSC_SB_PPC_OST_SUPPORT;
 #endif
+#ifdef ACPI_HOTPLUG_OST
+        capbuf[OSC_SUPPORT_TYPE] |= OSC_SB_HOTPLUG_OST_SUPPORT;
+#endif
        if (!ghes_disable)
                capbuf[OSC_SUPPORT_TYPE] |= OSC_SB_APEI_SUPPORT;
        if (ACPI_FAILURE(acpi_get_handle(NULL, "\\_SB", &handle)))
diff --git a/drivers/acpi/button.c b/drivers/acpi/button.c
index d27d072472f9..314a3b84bbc7 100644
--- a/drivers/acpi/button.c
+++ b/drivers/acpi/button.c
@@ -76,19 +76,23 @@ MODULE_DEVICE_TABLE(acpi, button_device_ids);
 static int acpi_button_add(struct acpi_device *device);
 static int acpi_button_remove(struct acpi_device *device, int type);
-static int acpi_button_resume(struct acpi_device *device);
 static void acpi_button_notify(struct acpi_device *device, u32 event);
+#ifdef CONFIG_PM_SLEEP
+static int acpi_button_resume(struct device *dev);
+#endif
+static SIMPLE_DEV_PM_OPS(acpi_button_pm, NULL, acpi_button_resume);
 static struct acpi_driver acpi_button_driver = {
        .name = "button",
        .class = ACPI_BUTTON_CLASS,
        .ids = button_device_ids,
        .ops = {
                .add = acpi_button_add,
-                .resume = acpi_button_resume,
                .remove = acpi_button_remove,
                .notify = acpi_button_notify,
        },
+        .drv.pm = &acpi_button_pm,
 };
 struct acpi_button {
@@ -308,14 +312,17 @@ static void acpi_button_notify(struct acpi_device *device, u32 event)
        }
 }
-static int acpi_button_resume(struct acpi_device *device)
+#ifdef CONFIG_PM_SLEEP
+static int acpi_button_resume(struct device *dev)
 {
+        struct acpi_device *device = to_acpi_device(dev);
        struct acpi_button *button = acpi_driver_data(device);
        if (button->type == ACPI_BUTTON_TYPE_LID)
                return acpi_lid_send_state(device);
        return 0;
 }
+#endif
 static int acpi_button_add(struct acpi_device *device)
 {
diff --git a/drivers/acpi/container.c b/drivers/acpi/container.c
index 45cd03b4630e..1f9f7d7d7bc5 100644
--- a/drivers/acpi/container.c
+++ b/drivers/acpi/container.c
@@ -158,9 +158,7 @@ static void container_notify_cb(acpi_handle handle, u32 type, void *context)
        int result;
        int present;
        acpi_status status;
+        u32 ost_code = ACPI_OST_SC_NON_SPECIFIC_FAILURE; /* default */
-        present = is_device_present(handle);
        switch (type) {
        case ACPI_NOTIFY_BUS_CHECK:
@@ -169,32 +167,47 @@ static void container_notify_cb(acpi_handle handle, u32 type, void *context)
                printk(KERN_WARNING "Container driver received %s event\n",
                       (type == ACPI_NOTIFY_BUS_CHECK) ?
                       "ACPI_NOTIFY_BUS_CHECK" : "ACPI_NOTIFY_DEVICE_CHECK");
+                present = is_device_present(handle);
                status = acpi_bus_get_device(handle, &device);
-                if (present) {
+                if (!present) {
-                        if (ACPI_FAILURE(status) || !device) {
-                                result = container_device_add(&device, handle);
-                                if (!result)
-                                        kobject_uevent(&device->dev.kobj,
-                                                       KOBJ_ONLINE);
-                                else
-                                        printk(KERN_WARNING
-                                               "Failed to add container\n");
-                        }
-                } else {
                        if (ACPI_SUCCESS(status)) {
                                /* device exist and this is a remove request */
+                                device->flags.eject_pending = 1;
                                kobject_uevent(&device->dev.kobj, KOBJ_OFFLINE);
+                                return;
                        }
+                        break;
+                }
+                if (!ACPI_FAILURE(status) || device)
+                        break;
+                result = container_device_add(&device, handle);
+                if (result) {
+                        printk(KERN_WARNING "Failed to add container\n");
+                        break;
                }
+                kobject_uevent(&device->dev.kobj, KOBJ_ONLINE);
+                ost_code = ACPI_OST_SC_SUCCESS;
                break;
        case ACPI_NOTIFY_EJECT_REQUEST:
                if (!acpi_bus_get_device(handle, &device) && device) {
+                        device->flags.eject_pending = 1;
                        kobject_uevent(&device->dev.kobj, KOBJ_OFFLINE);
+                        return;
                }
                break;
        default:
-                break;
+                /* non-hotplug event; possibly handled by other handler */
+                return;
        }
+        /* Inform firmware that the hotplug operation has completed */
+        (void) acpi_evaluate_hotplug_ost(handle, type, ost_code, NULL);
        return;
 }
diff --git a/drivers/acpi/fan.c b/drivers/acpi/fan.c
index 0f0356ca1a9e..bc36a476f1ab 100644
--- a/drivers/acpi/fan.c
+++ b/drivers/acpi/fan.c
@@ -46,8 +46,6 @@ MODULE_LICENSE("GPL");
 static int acpi_fan_add(struct acpi_device *device);
 static int acpi_fan_remove(struct acpi_device *device, int type);
-static int acpi_fan_suspend(struct acpi_device *device, pm_message_t state);
-static int acpi_fan_resume(struct acpi_device *device);
 static const struct acpi_device_id fan_device_ids[] = {
        {"PNP0C0B", 0},
@@ -55,6 +53,12 @@ static const struct acpi_device_id fan_device_ids[] = {
 };
 MODULE_DEVICE_TABLE(acpi, fan_device_ids);
+#ifdef CONFIG_PM_SLEEP
+static int acpi_fan_suspend(struct device *dev);
+static int acpi_fan_resume(struct device *dev);
+#endif
+static SIMPLE_DEV_PM_OPS(acpi_fan_pm, acpi_fan_suspend, acpi_fan_resume);
 static struct acpi_driver acpi_fan_driver = {
        .name = "fan",
        .class = ACPI_FAN_CLASS,
@@ -62,9 +66,8 @@ static struct acpi_driver acpi_fan_driver = {
        .ops = {
                .add = acpi_fan_add,
                .remove = acpi_fan_remove,
-                .suspend = acpi_fan_suspend,
-                .resume = acpi_fan_resume,
                },
+        .drv.pm = &acpi_fan_pm,
 };
 /* thermal cooling device callbacks */
@@ -183,29 +186,31 @@ static int acpi_fan_remove(struct acpi_device *device, int type)
        return 0;
 }
-static int acpi_fan_suspend(struct acpi_device *device, pm_message_t state)
+#ifdef CONFIG_PM_SLEEP
+static int acpi_fan_suspend(struct device *dev)
 {
-        if (!device)
+        if (!dev)
                return -EINVAL;
-        acpi_bus_set_power(device->handle, ACPI_STATE_D0);
+        acpi_bus_set_power(to_acpi_device(dev)->handle, ACPI_STATE_D0);
        return AE_OK;
 }
-static int acpi_fan_resume(struct acpi_device *device)
+static int acpi_fan_resume(struct device *dev)
 {
        int result;
-        if (!device)
+        if (!dev)
                return -EINVAL;
-        result = acpi_bus_update_power(device->handle, NULL);
+        result = acpi_bus_update_power(to_acpi_device(dev)->handle, NULL);
        if (result)
                printk(KERN_ERR PREFIX "Error updating fan power state\n");
        return result;
 }
+#endif
 static int __init acpi_fan_init(void)
 {
diff --git a/drivers/acpi/glue.c b/drivers/acpi/glue.c
index 1564e0927c21..243ee85e4d2e 100644
--- a/drivers/acpi/glue.c
+++ b/drivers/acpi/glue.c
@@ -39,6 +39,7 @@ int register_acpi_bus_type(struct acpi_bus_type *type)
        }
        return -ENODEV;
 }
+EXPORT_SYMBOL_GPL(register_acpi_bus_type);
 int unregister_acpi_bus_type(struct acpi_bus_type *type)
 {
@@ -54,6 +55,7 @@ int unregister_acpi_bus_type(struct acpi_bus_type *type)
        }
        return -ENODEV;
 }
+EXPORT_SYMBOL_GPL(unregister_acpi_bus_type);
 static struct acpi_bus_type *acpi_get_bus_type(struct bus_type *type)
 {
@@ -69,7 +71,6 @@ static struct acpi_bus_type *acpi_get_bus_type(struct bus_type *type)
        up_read(&bus_type_sem);
        return ret;
 }
-EXPORT_SYMBOL_GPL(register_acpi_bus_type);
 static int acpi_find_bridge_device(struct device *dev, acpi_handle * handle)
 {
@@ -86,7 +87,6 @@ static int acpi_find_bridge_device(struct device *dev, acpi_handle * handle)
        up_read(&bus_type_sem);
        return ret;
 }
-EXPORT_SYMBOL_GPL(unregister_acpi_bus_type);
 /* Get device's handler per its address under its parent */
 struct acpi_find_child {
diff --git a/drivers/acpi/numa.c b/drivers/acpi/numa.c
index e56f3be7b07d..cb31298ca684 100644
--- a/drivers/acpi/numa.c
+++ b/drivers/acpi/numa.c
@@ -237,6 +237,8 @@ acpi_parse_processor_affinity(struct acpi_subtable_header *header,
        return 0;
 }
+static int __initdata parsed_numa_memblks;
 static int __init
 acpi_parse_memory_affinity(struct acpi_subtable_header * header,
                           const unsigned long end)
@@ -250,8 +252,8 @@ acpi_parse_memory_affinity(struct acpi_subtable_header * header,
        acpi_table_print_srat_entry(header);
        /* let architecture-dependent part to do it */
-        acpi_numa_memory_affinity_init(memory_affinity);
+        if (!acpi_numa_memory_affinity_init(memory_affinity))
+                parsed_numa_memblks++;
        return 0;
 }
@@ -304,8 +306,10 @@ int __init acpi_numa_init(void)
        acpi_numa_arch_fixup();
-        if (cnt <= 0)
+        if (cnt < 0)
-                return cnt ?: -ENOENT;
+                return cnt;
+        else if (!parsed_numa_memblks)
+                return -ENOENT;
        return 0;
 }
diff --git a/drivers/acpi/osl.c b/drivers/acpi/osl.c
index c3881b2eb8b2..9eaf708f5885 100644
--- a/drivers/acpi/osl.c
+++ b/drivers/acpi/osl.c
@@ -891,7 +891,7 @@ static void acpi_os_execute_deferred(struct work_struct *work)
        struct acpi_os_dpc *dpc = container_of(work, struct acpi_os_dpc, work);
        if (dpc->wait)
-                acpi_os_wait_events_complete(NULL);
+                acpi_os_wait_events_complete();
        dpc->function(dpc->context);
        kfree(dpc);
@@ -987,7 +987,7 @@ acpi_status acpi_os_hotplug_execute(acpi_osd_exec_callback function,
        return __acpi_os_execute(0, function, context, 1);
 }
-void acpi_os_wait_events_complete(void *context)
+void acpi_os_wait_events_complete(void)
 {
        flush_workqueue(kacpid_wq);
        flush_workqueue(kacpi_notify_wq);
diff --git a/drivers/acpi/pci_root.c b/drivers/acpi/pci_root.c
index 7aff6312ce7c..72a2c98bc429 100644
--- a/drivers/acpi/pci_root.c
+++ b/drivers/acpi/pci_root.c
@@ -505,6 +505,8 @@ static int __devinit acpi_pci_root_add(struct acpi_device *device)
        strcpy(acpi_device_class(device), ACPI_PCI_ROOT_CLASS);
        device->driver_data = root;
+        root->mcfg_addr = acpi_pci_root_get_mcfg_addr(device->handle);
        /*
         * All supported architectures that use ACPI have support for
         * PCI domains, so we indicate this in _OSC support capabilities.
@@ -571,8 +573,15 @@ static int __devinit acpi_pci_root_add(struct acpi_device *device)
                        OSC_CLOCK_PWR_CAPABILITY_SUPPORT;
        if (pci_msi_enabled())
                flags |= OSC_MSI_SUPPORT;
-        if (flags != base_flags)
+        if (flags != base_flags) {
-                acpi_pci_osc_support(root, flags);
+                status = acpi_pci_osc_support(root, flags);
+                if (ACPI_FAILURE(status)) {
+                        dev_info(root->bus->bridge, "ACPI _OSC support "
+                                "notification failed, disabling PCIe ASPM\n");
+                        pcie_no_aspm();
+                        flags = base_flags;
+                }
+        }
        if (!pcie_ports_disabled
            && (flags & ACPI_PCIE_REQ_SUPPORT) == ACPI_PCIE_REQ_SUPPORT) {
diff --git a/drivers/acpi/power.c b/drivers/acpi/power.c
index dd6d6a3c6780..fc1803414629 100644
--- a/drivers/acpi/power.c
+++ b/drivers/acpi/power.c
@@ -60,7 +60,6 @@ ACPI_MODULE_NAME("power");
 static int acpi_power_add(struct acpi_device *device);
 static int acpi_power_remove(struct acpi_device *device, int type);
-static int acpi_power_resume(struct acpi_device *device);
 static const struct acpi_device_id power_device_ids[] = {
        {ACPI_POWER_HID, 0},
@@ -68,6 +67,11 @@ static const struct acpi_device_id power_device_ids[] = {
 };
 MODULE_DEVICE_TABLE(acpi, power_device_ids);
+#ifdef CONFIG_PM_SLEEP
+static int acpi_power_resume(struct device *dev);
+#endif
+static SIMPLE_DEV_PM_OPS(acpi_power_pm, NULL, acpi_power_resume);
 static struct acpi_driver acpi_power_driver = {
        .name = "power",
        .class = ACPI_POWER_CLASS,
@@ -75,8 +79,8 @@ static struct acpi_driver acpi_power_driver = {
        .ops = {
                .add = acpi_power_add,
                .remove = acpi_power_remove,
-                .resume = acpi_power_resume,
                },
+        .drv.pm = &acpi_power_pm,
 };
 /*
@@ -390,6 +394,7 @@ void acpi_power_resource_unregister_device(struct device *dev, acpi_handle handl
                __acpi_power_resource_unregister_device(dev,
                        list->handles[i]);
 }
+EXPORT_SYMBOL_GPL(acpi_power_resource_unregister_device);
 static int __acpi_power_resource_register_device(
        struct acpi_power_managed_device *powered_device, acpi_handle handle)
@@ -460,6 +465,7 @@ no_power_resource:
        printk(KERN_WARNING PREFIX "Invalid Power Resource to register!");
        return -ENODEV;
 }
+EXPORT_SYMBOL_GPL(acpi_power_resource_register_device);
 /**
 * acpi_device_sleep_wake - execute _DSW (Device Sleep Wake) or (deprecated in
@@ -771,14 +777,17 @@ static int acpi_power_remove(struct acpi_device *device, int type)
        return 0;
 }
-static int acpi_power_resume(struct acpi_device *device)
+#ifdef CONFIG_PM_SLEEP
+static int acpi_power_resume(struct device *dev)
 {
        int result = 0, state;
+        struct acpi_device *device;
        struct acpi_power_resource *resource;
-        if (!device)
+        if (!dev)
                return -EINVAL;
+        device = to_acpi_device(dev);
        resource = acpi_driver_data(device);
        if (!resource)
                return -EINVAL;
@@ -797,6 +806,7 @@ static int acpi_power_resume(struct acpi_device *device)
        return result;
 }
+#endif
 int __init acpi_power_init(void)
 {
diff --git a/drivers/acpi/processor_core.c b/drivers/acpi/processor_core.c
index c850de4c9a14..eff722278ff5 100644
--- a/drivers/acpi/processor_core.c
+++ b/drivers/acpi/processor_core.c
@@ -189,10 +189,12 @@ int acpi_get_cpuid(acpi_handle handle, int type, u32 acpi_id)
                 *     Processor (CPU3, 0x03, 0x00000410, 0x06) {}
                 * }
                 *
-                 * Ignores apic_id and always return 0 for CPU0's handle.
+                 * Ignores apic_id and always returns 0 for the processor
+                 * handle with acpi id 0 if nr_cpu_ids is 1.
+                 * This should be the case if SMP tables are not found.
                 * Return -1 for other CPU's handle.
                 */
-                if (acpi_id == 0)
+                if (nr_cpu_ids <= 1 && acpi_id == 0)
                        return acpi_id;
                else
                        return apic_id;
diff --git a/drivers/acpi/processor_driver.c b/drivers/acpi/processor_driver.c
index 0734086537b8..bfc31cb0dd3e 100644
--- a/drivers/acpi/processor_driver.c
+++ b/drivers/acpi/processor_driver.c
@@ -93,6 +93,9 @@ static const struct acpi_device_id processor_device_ids[] = {
 };
 MODULE_DEVICE_TABLE(acpi, processor_device_ids);
+static SIMPLE_DEV_PM_OPS(acpi_processor_pm,
+                         acpi_processor_suspend, acpi_processor_resume);
 static struct acpi_driver acpi_processor_driver = {
        .name = "processor",
        .class = ACPI_PROCESSOR_CLASS,
@@ -100,10 +103,9 @@ static struct acpi_driver acpi_processor_driver = {
        .ops = {
                .add = acpi_processor_add,
                .remove = acpi_processor_remove,
-                .suspend = acpi_processor_suspend,
-                .resume = acpi_processor_resume,
                .notify = acpi_processor_notify,
                },
+        .drv.pm = &acpi_processor_pm,
 };
 #define INSTALL_NOTIFY_HANDLER          1
@@ -427,22 +429,15 @@ static int acpi_cpu_soft_notify(struct notifier_block *nfb,
                 * Initialize missing things
                 */
                if (pr->flags.need_hotplug_init) {
-                        struct cpuidle_driver *idle_driver =
-                                cpuidle_get_driver();
                        printk(KERN_INFO "Will online and init hotplugged "
                               "CPU: %d\n", pr->id);
                        WARN(acpi_processor_start(pr), "Failed to start CPU:"
                                " %d\n", pr->id);
                        pr->flags.need_hotplug_init = 0;
-                        if (idle_driver && !strcmp(idle_driver->name,
-                                                   "intel_idle")) {
-                                intel_idle_cpu_init(pr->id);
-                        }
                /* Normal CPU soft online event */
                } else {
                        acpi_processor_ppc_has_changed(pr, 0);
-                        acpi_processor_cst_has_changed(pr);
+                        acpi_processor_hotplug(pr);
                        acpi_processor_reevaluate_tstate(pr, action);
                        acpi_processor_tstate_has_changed(pr);
                }
@@ -701,9 +696,9 @@ static void acpi_processor_hotplug_notify(acpi_handle handle,
 {
        struct acpi_processor *pr;
        struct acpi_device *device = NULL;
+        u32 ost_code = ACPI_OST_SC_NON_SPECIFIC_FAILURE; /* default */
        int result;
        switch (event) {
        case ACPI_NOTIFY_BUS_CHECK:
        case ACPI_NOTIFY_DEVICE_CHECK:
@@ -715,14 +710,18 @@ static void acpi_processor_hotplug_notify(acpi_handle handle,
                if (!is_processor_present(handle))
                        break;
-                if (acpi_bus_get_device(handle, &device)) {
+                if (!acpi_bus_get_device(handle, &device))
-                        result = acpi_processor_device_add(handle, &device);
+                        break;
-                        if (result)
-                                printk(KERN_ERR PREFIX
+                result = acpi_processor_device_add(handle, &device);
-                                            "Unable to add the device\n");
+                if (result) {
+                        printk(KERN_ERR PREFIX "Unable to add the device\n");
                        break;
                }
+                ost_code = ACPI_OST_SC_SUCCESS;
                break;
        case ACPI_NOTIFY_EJECT_REQUEST:
                ACPI_DEBUG_PRINT((ACPI_DB_INFO,
                                  "received ACPI_NOTIFY_EJECT_REQUEST\n"));
@@ -736,15 +735,23 @@ static void acpi_processor_hotplug_notify(acpi_handle handle,
                if (!pr) {
                        printk(KERN_ERR PREFIX
                                    "Driver data is NULL, dropping EJECT\n");
-                        return;
+                        break;
                }
+                /* REVISIT: update when eject is supported */
+                ost_code = ACPI_OST_SC_EJECT_NOT_SUPPORTED;
                break;
        default:
                ACPI_DEBUG_PRINT((ACPI_DB_INFO,
                                  "Unsupported event [0x%x]\n", event));
-                break;
+                /* non-hotplug event; possibly handled by other handler */
+                return;
        }
+        /* Inform firmware that the hotplug operation has completed */
+        (void) acpi_evaluate_hotplug_ost(handle, event, ost_code, NULL);
        return;
 }
diff --git a/drivers/acpi/processor_idle.c b/drivers/acpi/processor_idle.c
index f3decb30223f..ad3730b4038b 100644
--- a/drivers/acpi/processor_idle.c
+++ b/drivers/acpi/processor_idle.c
@@ -221,9 +221,6 @@ static void lapic_timer_state_broadcast(struct acpi_processor *pr,
 #endif
-/*
- * Suspend / resume control
- */
 static u32 saved_bm_rld;
 static void acpi_idle_bm_rld_save(void)
@@ -240,13 +237,13 @@ static void acpi_idle_bm_rld_restore(void)
                acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, saved_bm_rld);
 }
-int acpi_processor_suspend(struct acpi_device * device, pm_message_t state)
+int acpi_processor_suspend(struct device *dev)
 {
        acpi_idle_bm_rld_save();
        return 0;
 }
-int acpi_processor_resume(struct acpi_device * device)
+int acpi_processor_resume(struct device *dev)
 {
        acpi_idle_bm_rld_restore();
        return 0;
@@ -304,16 +301,16 @@ static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr)
        pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5;
        /* determine latencies from FADT */
-        pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.C2latency;
+        pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.c2_latency;
-        pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.C3latency;
+        pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.c3_latency;
        /*
         * FADT specified C2 latency must be less than or equal to
         * 100 microseconds.
         */
-        if (acpi_gbl_FADT.C2latency > ACPI_PROCESSOR_MAX_C2_LATENCY) {
+        if (acpi_gbl_FADT.c2_latency > ACPI_PROCESSOR_MAX_C2_LATENCY) {
                ACPI_DEBUG_PRINT((ACPI_DB_INFO,
-                        "C2 latency too large [%d]\n", acpi_gbl_FADT.C2latency));
+                        "C2 latency too large [%d]\n", acpi_gbl_FADT.c2_latency));
                /* invalidate C2 */
                pr->power.states[ACPI_STATE_C2].address = 0;
        }
@@ -322,9 +319,9 @@ static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr)
         * FADT supplied C3 latency must be less than or equal to
         * 1000 microseconds.
         */
-        if (acpi_gbl_FADT.C3latency > ACPI_PROCESSOR_MAX_C3_LATENCY) {
+        if (acpi_gbl_FADT.c3_latency > ACPI_PROCESSOR_MAX_C3_LATENCY) {
                ACPI_DEBUG_PRINT((ACPI_DB_INFO,
-                        "C3 latency too large [%d]\n", acpi_gbl_FADT.C3latency));
+                        "C3 latency too large [%d]\n", acpi_gbl_FADT.c3_latency));
                /* invalidate C3 */
                pr->power.states[ACPI_STATE_C3].address = 0;
        }
@@ -586,7 +583,6 @@ static void acpi_processor_power_verify_c3(struct acpi_processor *pr,
         */
        cx->valid = 1;
-        cx->latency_ticks = cx->latency;
        /*
         * On older chipsets, BM_RLD needs to be set
         * in order for Bus Master activity to wake the
@@ -619,7 +615,6 @@ static int acpi_processor_power_verify(struct acpi_processor *pr)
                        if (!cx->address)
                                break;
                        cx->valid = 1; 
-                        cx->latency_ticks = cx->latency; /* Normalize latency */
                        break;
                case ACPI_STATE_C3:
@@ -754,6 +749,7 @@ static int acpi_idle_enter_c1(struct cpuidle_device *dev,
        local_irq_disable();
        lapic_timer_state_broadcast(pr, cx, 1);
        kt1 = ktime_get_real();
        acpi_idle_do_entry(cx);
@@ -764,7 +760,6 @@ static int acpi_idle_enter_c1(struct cpuidle_device *dev,
        dev->last_residency = (int)idle_time;
        local_irq_enable();
-        cx->usage++;
        lapic_timer_state_broadcast(pr, cx, 0);
        return index;
@@ -823,6 +818,7 @@ static int acpi_idle_enter_simple(struct cpuidle_device *dev,
        local_irq_disable();
        if (cx->entry_method != ACPI_CSTATE_FFH) {
                current_thread_info()->status &= ~TS_POLLING;
                /*
@@ -866,10 +862,7 @@ static int acpi_idle_enter_simple(struct cpuidle_device *dev,
        if (cx->entry_method != ACPI_CSTATE_FFH)
                current_thread_info()->status |= TS_POLLING;
-        cx->usage++;
        lapic_timer_state_broadcast(pr, cx, 0);
-        cx->time += idle_time;
        return index;
 }
@@ -909,12 +902,13 @@ static int acpi_idle_enter_bm(struct cpuidle_device *dev,
                        local_irq_disable();
                        acpi_safe_halt();
                        local_irq_enable();
-                        return -EINVAL;
+                        return -EBUSY;
                }
        }
        local_irq_disable();
        if (cx->entry_method != ACPI_CSTATE_FFH) {
                current_thread_info()->status &= ~TS_POLLING;
                /*
@@ -986,10 +980,7 @@ static int acpi_idle_enter_bm(struct cpuidle_device *dev,
        if (cx->entry_method != ACPI_CSTATE_FFH)
                current_thread_info()->status |= TS_POLLING;
-        cx->usage++;
        lapic_timer_state_broadcast(pr, cx, 0);
-        cx->time += idle_time;
        return index;
 }
diff --git a/drivers/acpi/sbs.c b/drivers/acpi/sbs.c
index 6e36d0c0057c..ff0740e0a9c2 100644
--- a/drivers/acpi/sbs.c
+++ b/drivers/acpi/sbs.c
@@ -988,15 +988,19 @@ static void acpi_sbs_rmdirs(void)
 #endif
 }
-static int acpi_sbs_resume(struct acpi_device *device)
+#ifdef CONFIG_PM_SLEEP
+static int acpi_sbs_resume(struct device *dev)
 {
        struct acpi_sbs *sbs;
-        if (!device)
+        if (!dev)
                return -EINVAL;
-        sbs = device->driver_data;
+        sbs = to_acpi_device(dev)->driver_data;
        acpi_sbs_callback(sbs);
        return 0;
 }
+#endif
+static SIMPLE_DEV_PM_OPS(acpi_sbs_pm, NULL, acpi_sbs_resume);
 static struct acpi_driver acpi_sbs_driver = {
        .name = "sbs",
@@ -1005,8 +1009,8 @@ static struct acpi_driver acpi_sbs_driver = {
        .ops = {
                .add = acpi_sbs_add,
                .remove = acpi_sbs_remove,
-                .resume = acpi_sbs_resume,
                },
+        .drv.pm = &acpi_sbs_pm,
 };
 static int __init acpi_sbs_init(void)
diff --git a/drivers/acpi/scan.c b/drivers/acpi/scan.c
index c8a1f3b68110..d1ecca2b641a 100644
--- a/drivers/acpi/scan.c
+++ b/drivers/acpi/scan.c
@@ -83,19 +83,29 @@ acpi_device_modalias_show(struct device *dev, struct device_attribute *attr, cha
 }
 static DEVICE_ATTR(modalias, 0444, acpi_device_modalias_show, NULL);
-static void acpi_bus_hot_remove_device(void *context)
+/**
+ * acpi_bus_hot_remove_device: hot-remove a device and its children
+ * @context: struct acpi_eject_event pointer (freed in this func)
+ *
+ * Hot-remove a device and its children. This function frees up the
+ * memory space passed by arg context, so that the caller may call
+ * this function asynchronously through acpi_os_hotplug_execute().
+ */
+void acpi_bus_hot_remove_device(void *context)
 {
+        struct acpi_eject_event *ej_event = (struct acpi_eject_event *) context;
        struct acpi_device *device;
-        acpi_handle handle = context;
+        acpi_handle handle = ej_event->handle;
        struct acpi_object_list arg_list;
        union acpi_object arg;
        acpi_status status = AE_OK;
+        u32 ost_code = ACPI_OST_SC_NON_SPECIFIC_FAILURE; /* default */
        if (acpi_bus_get_device(handle, &device))
-                return;
+                goto err_out;
        if (!device)
-                return;
+                goto err_out;
        ACPI_DEBUG_PRINT((ACPI_DB_INFO,
                "Hot-removing device %s...\n", dev_name(&device->dev)));
@@ -103,7 +113,7 @@ static void acpi_bus_hot_remove_device(void *context)
        if (acpi_bus_trim(device, 1)) {
                printk(KERN_ERR PREFIX
                                "Removing device failed\n");
-                return;
+                goto err_out;
        }
        /* power off device */
@@ -129,10 +139,21 @@ static void acpi_bus_hot_remove_device(void *context)
         * TBD: _EJD support.
         */
        status = acpi_evaluate_object(handle, "_EJ0", &arg_list, NULL);
-        if (ACPI_FAILURE(status))
+        if (ACPI_FAILURE(status)) {
-                printk(KERN_WARNING PREFIX
+                if (status != AE_NOT_FOUND)
-                                "Eject device failed\n");
+                        printk(KERN_WARNING PREFIX
+                                        "Eject device failed\n");
+                goto err_out;
+        }
+        kfree(context);
+        return;
+err_out:
+        /* Inform firmware the hot-remove operation has completed w/ error */
+        (void) acpi_evaluate_hotplug_ost(handle,
+                                ej_event->event, ost_code, NULL);
+        kfree(context);
        return;
 }
@@ -144,6 +165,7 @@ acpi_eject_store(struct device *d, struct device_attribute *attr,
        acpi_status status;
        acpi_object_type type = 0;
        struct acpi_device *acpi_device = to_acpi_device(d);
+        struct acpi_eject_event *ej_event;
        if ((!count) || (buf[0] != '1')) {
                return -EINVAL;
@@ -160,7 +182,25 @@ acpi_eject_store(struct device *d, struct device_attribute *attr,
                goto err;
        }
-        acpi_os_hotplug_execute(acpi_bus_hot_remove_device, acpi_device->handle);
+        ej_event = kmalloc(sizeof(*ej_event), GFP_KERNEL);
+        if (!ej_event) {
+                ret = -ENOMEM;
+                goto err;
+        }
+        ej_event->handle = acpi_device->handle;
+        if (acpi_device->flags.eject_pending) {
+                /* event originated from ACPI eject notification */
+                ej_event->event = ACPI_NOTIFY_EJECT_REQUEST;
+                acpi_device->flags.eject_pending = 0;
+        } else {
+                /* event originated from user */
+                ej_event->event = ACPI_OST_EC_OSPM_EJECT;
+                (void) acpi_evaluate_hotplug_ost(ej_event->handle,
+                        ej_event->event, ACPI_OST_SC_EJECT_IN_PROGRESS, NULL);
+        }
+        acpi_os_hotplug_execute(acpi_bus_hot_remove_device, (void *)ej_event);
 err:
        return ret;
 }
@@ -290,26 +330,6 @@ static void acpi_device_release(struct device *dev)
        kfree(acpi_dev);
 }
-static int acpi_device_suspend(struct device *dev, pm_message_t state)
-{
-        struct acpi_device *acpi_dev = to_acpi_device(dev);
-        struct acpi_driver *acpi_drv = acpi_dev->driver;
-        if (acpi_drv && acpi_drv->ops.suspend)
-                return acpi_drv->ops.suspend(acpi_dev, state);
-        return 0;
-}
-static int acpi_device_resume(struct device *dev)
-{
-        struct acpi_device *acpi_dev = to_acpi_device(dev);
-        struct acpi_driver *acpi_drv = acpi_dev->driver;
-        if (acpi_drv && acpi_drv->ops.resume)
-                return acpi_drv->ops.resume(acpi_dev);
-        return 0;
-}
 static int acpi_bus_match(struct device *dev, struct device_driver *drv)
 {
        struct acpi_device *acpi_dev = to_acpi_device(dev);
@@ -441,8 +461,6 @@ static int acpi_device_remove(struct device * dev)
 struct bus_type acpi_bus_type = {
        .name           = "acpi",
-        .suspend        = acpi_device_suspend,
-        .resume         = acpi_device_resume,
        .match          = acpi_bus_match,
        .probe          = acpi_device_probe,
        .remove         = acpi_device_remove,
diff --git a/drivers/acpi/sleep.c b/drivers/acpi/sleep.c
index 88561029cca8..fdcdbb652915 100644
--- a/drivers/acpi/sleep.c
+++ b/drivers/acpi/sleep.c
@@ -28,36 +28,7 @@
 #include "internal.h"
 #include "sleep.h"
-u8 wake_sleep_flags = ACPI_NO_OPTIONAL_METHODS;
-static unsigned int gts, bfs;
-static int set_param_wake_flag(const char *val, struct kernel_param *kp)
-{
-        int ret = param_set_int(val, kp);
-        if (ret)
-                return ret;
-        if (kp->arg == (const char *)&gts) {
-                if (gts)
-                        wake_sleep_flags |= ACPI_EXECUTE_GTS;
-                else
-                        wake_sleep_flags &= ~ACPI_EXECUTE_GTS;
-        }
-        if (kp->arg == (const char *)&bfs) {
-                if (bfs)
-                        wake_sleep_flags |= ACPI_EXECUTE_BFS;
-                else
-                        wake_sleep_flags &= ~ACPI_EXECUTE_BFS;
-        }
-        return ret;
-}
-module_param_call(gts, set_param_wake_flag, param_get_int, &gts, 0644);
-module_param_call(bfs, set_param_wake_flag, param_get_int, &bfs, 0644);
-MODULE_PARM_DESC(gts, "Enable evaluation of _GTS on suspend.");
-MODULE_PARM_DESC(bfs, "Enable evaluation of _BFS on resume".);
 static u8 sleep_states[ACPI_S_STATE_COUNT];
-static bool pwr_btn_event_pending;
 static void acpi_sleep_tts_switch(u32 acpi_state)
 {
@@ -110,6 +81,7 @@ static int acpi_sleep_prepare(u32 acpi_state)
 #ifdef CONFIG_ACPI_SLEEP
 static u32 acpi_target_sleep_state = ACPI_STATE_S0;
+static bool pwr_btn_event_pending;
 /*
 * The ACPI specification wants us to save NVS memory regions during hibernation
@@ -143,7 +115,7 @@ void __init acpi_old_suspend_ordering(void)
 static int acpi_pm_freeze(void)
 {
        acpi_disable_all_gpes();
-        acpi_os_wait_events_complete(NULL);
+        acpi_os_wait_events_complete();
        acpi_ec_block_transactions();
        return 0;
 }
@@ -305,7 +277,7 @@ static int acpi_suspend_enter(suspend_state_t pm_state)
        switch (acpi_state) {
        case ACPI_STATE_S1:
                barrier();
-                status = acpi_enter_sleep_state(acpi_state, wake_sleep_flags);
+                status = acpi_enter_sleep_state(acpi_state);
                break;
        case ACPI_STATE_S3:
@@ -319,8 +291,8 @@ static int acpi_suspend_enter(suspend_state_t pm_state)
        /* This violates the spec but is required for bug compatibility. */
        acpi_write_bit_register(ACPI_BITREG_SCI_ENABLE, 1);
-        /* Reprogram control registers and execute _BFS */
+        /* Reprogram control registers */
-        acpi_leave_sleep_state_prep(acpi_state, wake_sleep_flags);
+        acpi_leave_sleep_state_prep(acpi_state);
        /* ACPI 3.0 specs (P62) says that it's the responsibility
         * of the OSPM to clear the status bit [ implying that the
@@ -603,9 +575,9 @@ static int acpi_hibernation_enter(void)
        ACPI_FLUSH_CPU_CACHE();
        /* This shouldn't return.  If it returns, we have a problem */
-        status = acpi_enter_sleep_state(ACPI_STATE_S4, wake_sleep_flags);
+        status = acpi_enter_sleep_state(ACPI_STATE_S4);
-        /* Reprogram control registers and execute _BFS */
+        /* Reprogram control registers */
-        acpi_leave_sleep_state_prep(ACPI_STATE_S4, wake_sleep_flags);
+        acpi_leave_sleep_state_prep(ACPI_STATE_S4);
        return ACPI_SUCCESS(status) ? 0 : -EFAULT;
 }
@@ -617,8 +589,8 @@ static void acpi_hibernation_leave(void)
         * enable it here.
         */
        acpi_enable();
-        /* Reprogram control registers and execute _BFS */
+        /* Reprogram control registers */
-        acpi_leave_sleep_state_prep(ACPI_STATE_S4, wake_sleep_flags);
+        acpi_leave_sleep_state_prep(ACPI_STATE_S4);
        /* Check the hardware signature */
        if (facs && s4_hardware_signature != facs->hardware_signature) {
                printk(KERN_EMERG "ACPI: Hardware changed while hibernated, "
@@ -716,8 +688,9 @@ int acpi_suspend(u32 acpi_state)
 *      @dev: device to examine; its driver model wakeup flags control
 *              whether it should be able to wake up the system
 *      @d_min_p: used to store the upper limit of allowed states range
- *      Return value: preferred power state of the device on success, -ENODEV on
+ *      @d_max_in: specify the lowest allowed states
- *              failure (ie. if there's no 'struct acpi_device' for @dev)
+ *      Return value: preferred power state of the device on success, -ENODEV
+ *      (ie. if there's no 'struct acpi_device' for @dev) or -EINVAL on failure
 *
 *      Find the lowest power (highest number) ACPI device power state that
 *      device @dev can be in while the system is in the sleep state represented
@@ -732,13 +705,15 @@ int acpi_suspend(u32 acpi_state)
 *      via @wake.
 */
-int acpi_pm_device_sleep_state(struct device *dev, int *d_min_p)
+int acpi_pm_device_sleep_state(struct device *dev, int *d_min_p, int d_max_in)
 {
        acpi_handle handle = DEVICE_ACPI_HANDLE(dev);
        struct acpi_device *adev;
        char acpi_method[] = "_SxD";
        unsigned long long d_min, d_max;
+        if (d_max_in < ACPI_STATE_D0 || d_max_in > ACPI_STATE_D3)
+                return -EINVAL;
        if (!handle || ACPI_FAILURE(acpi_bus_get_device(handle, &adev))) {
                printk(KERN_DEBUG "ACPI handle has no context!\n");
                return -ENODEV;
@@ -746,8 +721,10 @@ int acpi_pm_device_sleep_state(struct device *dev, int *d_min_p)
        acpi_method[2] = '0' + acpi_target_sleep_state;
        /*
-         * If the sleep state is S0, we will return D3, but if the device has
+         * If the sleep state is S0, the lowest limit from ACPI is D3,
-         * _S0W, we will use the value from _S0W
+         * but if the device has _S0W, we will use the value from _S0W
+         * as the lowest limit from ACPI.  Finally, we will constrain
+         * the lowest limit with the specified one.
         */
        d_min = ACPI_STATE_D0;
        d_max = ACPI_STATE_D3;
@@ -791,10 +768,20 @@ int acpi_pm_device_sleep_state(struct device *dev, int *d_min_p)
                }
        }
+        if (d_max_in < d_min)
+                return -EINVAL;
        if (d_min_p)
                *d_min_p = d_min;
+        /* constrain d_max with specified lowest limit (max number) */
+        if (d_max > d_max_in) {
+                for (d_max = d_max_in; d_max > d_min; d_max--) {
+                        if (adev->power.states[d_max].flags.valid)
+                                break;
+                }
+        }
        return d_max;
 }
+EXPORT_SYMBOL(acpi_pm_device_sleep_state);
 #endif /* CONFIG_PM */
 #ifdef CONFIG_PM_SLEEP
@@ -831,6 +818,7 @@ int acpi_pm_device_run_wake(struct device *phys_dev, bool enable)
        return 0;
 }
+EXPORT_SYMBOL(acpi_pm_device_run_wake);
 /**
 *      acpi_pm_device_sleep_wake - enable or disable the system wake-up
@@ -876,33 +864,7 @@ static void acpi_power_off(void)
        /* acpi_sleep_prepare(ACPI_STATE_S5) should have already been called */
        printk(KERN_DEBUG "%s called\n", __func__);
        local_irq_disable();
-        acpi_enter_sleep_state(ACPI_STATE_S5, wake_sleep_flags);
+        acpi_enter_sleep_state(ACPI_STATE_S5);
-}
-/*
- * ACPI 2.0 created the optional _GTS and _BFS,
- * but industry adoption has been neither rapid nor broad.
- *
- * Linux gets into trouble when it executes poorly validated
- * paths through the BIOS, so disable _GTS and _BFS by default,
- * but do speak up and offer the option to enable them.
- */
-static void __init acpi_gts_bfs_check(void)
-{
-        acpi_handle dummy;
-        if (ACPI_SUCCESS(acpi_get_handle(ACPI_ROOT_OBJECT, METHOD_PATHNAME__GTS, &dummy)))
-        {
-                printk(KERN_NOTICE PREFIX "BIOS offers _GTS\n");
-                printk(KERN_NOTICE PREFIX "If \"acpi.gts=1\" improves suspend, "
-                        "please notify linux-acpi@vger.kernel.org\n");
-        }
-        if (ACPI_SUCCESS(acpi_get_handle(ACPI_ROOT_OBJECT, METHOD_PATHNAME__BFS, &dummy)))
-        {
-                printk(KERN_NOTICE PREFIX "BIOS offers _BFS\n");
-                printk(KERN_NOTICE PREFIX "If \"acpi.bfs=1\" improves resume, "
-                        "please notify linux-acpi@vger.kernel.org\n");
-        }
 }
 int __init acpi_sleep_init(void)
@@ -963,6 +925,5 @@ int __init acpi_sleep_init(void)
         * object can also be evaluated when the system enters S5.
         */
        register_reboot_notifier(&tts_notifier);
-        acpi_gts_bfs_check();
        return 0;
 }
diff --git a/drivers/acpi/sysfs.c b/drivers/acpi/sysfs.c
index 9f66181c814e..7c3f98ba4afe 100644
--- a/drivers/acpi/sysfs.c
+++ b/drivers/acpi/sysfs.c
@@ -173,7 +173,7 @@ static int param_set_trace_state(const char *val, struct kernel_param *kp)
 {
        int result = 0;
-        if (!strncmp(val, "enable", strlen("enable") - 1)) {
+        if (!strncmp(val, "enable", sizeof("enable") - 1)) {
                result = acpi_debug_trace(trace_method_name, trace_debug_level,
                                          trace_debug_layer, 0);
                if (result)
@@ -181,7 +181,7 @@ static int param_set_trace_state(const char *val, struct kernel_param *kp)
                goto exit;
        }
-        if (!strncmp(val, "disable", strlen("disable") - 1)) {
+        if (!strncmp(val, "disable", sizeof("disable") - 1)) {
                int name = 0;
                result = acpi_debug_trace((char *)&name, trace_debug_level,
                                          trace_debug_layer, 0);
diff --git a/drivers/acpi/thermal.c b/drivers/acpi/thermal.c
index 7dbebea1ec31..edda74a43406 100644
--- a/drivers/acpi/thermal.c
+++ b/drivers/acpi/thermal.c
@@ -98,7 +98,6 @@ MODULE_PARM_DESC(psv, "Disable or override all passive trip points.");
 static int acpi_thermal_add(struct acpi_device *device);
 static int acpi_thermal_remove(struct acpi_device *device, int type);
-static int acpi_thermal_resume(struct acpi_device *device);
 static void acpi_thermal_notify(struct acpi_device *device, u32 event);
 static const struct acpi_device_id  thermal_device_ids[] = {
@@ -107,6 +106,11 @@ static const struct acpi_device_id  thermal_device_ids[] = {
 };
 MODULE_DEVICE_TABLE(acpi, thermal_device_ids);
+#ifdef CONFIG_PM_SLEEP
+static int acpi_thermal_resume(struct device *dev);
+#endif
+static SIMPLE_DEV_PM_OPS(acpi_thermal_pm, NULL, acpi_thermal_resume);
 static struct acpi_driver acpi_thermal_driver = {
        .name = "thermal",
        .class = ACPI_THERMAL_CLASS,
@@ -114,9 +118,9 @@ static struct acpi_driver acpi_thermal_driver = {
        .ops = {
                .add = acpi_thermal_add,
                .remove = acpi_thermal_remove,
-                .resume = acpi_thermal_resume,
                .notify = acpi_thermal_notify,
                },
+        .drv.pm = &acpi_thermal_pm,
 };
 struct acpi_thermal_state {
@@ -550,8 +554,6 @@ static int thermal_get_temp(struct thermal_zone_device *thermal,
        return 0;
 }
-static const char enabled[] = "kernel";
-static const char disabled[] = "user";
 static int thermal_get_mode(struct thermal_zone_device *thermal,
                                enum thermal_device_mode *mode)
 {
@@ -588,8 +590,8 @@ static int thermal_set_mode(struct thermal_zone_device *thermal,
        if (enable != tz->tz_enabled) {
                tz->tz_enabled = enable;
                ACPI_DEBUG_PRINT((ACPI_DB_INFO,
-                        "%s ACPI thermal control\n",
+                        "%s kernel ACPI thermal control\n",
-                        tz->tz_enabled ? enabled : disabled));
+                        tz->tz_enabled ? "Enable" : "Disable"));
                acpi_thermal_check(tz);
        }
        return 0;
@@ -845,7 +847,7 @@ static int acpi_thermal_register_thermal_zone(struct acpi_thermal *tz)
        if (tz->trips.passive.flags.valid)
                tz->thermal_zone =
-                        thermal_zone_device_register("acpitz", trips, tz,
+                        thermal_zone_device_register("acpitz", trips, 0, tz,
                                                     &acpi_thermal_zone_ops,
                                                     tz->trips.passive.tc1,
                                                     tz->trips.passive.tc2,
@@ -853,7 +855,7 @@ static int acpi_thermal_register_thermal_zone(struct acpi_thermal *tz)
                                                     tz->polling_frequency*100);
        else
                tz->thermal_zone =
-                        thermal_zone_device_register("acpitz", trips, tz,
+                        thermal_zone_device_register("acpitz", trips, 0, tz,
                                                     &acpi_thermal_zone_ops,
                                                     0, 0, 0,
                                                     tz->polling_frequency*100);
@@ -1041,16 +1043,18 @@ static int acpi_thermal_remove(struct acpi_device *device, int type)
        return 0;
 }
-static int acpi_thermal_resume(struct acpi_device *device)
+#ifdef CONFIG_PM_SLEEP
+static int acpi_thermal_resume(struct device *dev)
 {
-        struct acpi_thermal *tz = NULL;
+        struct acpi_thermal *tz;
        int i, j, power_state, result;
+        if (!dev)
-        if (!device || !acpi_driver_data(device))
                return -EINVAL;
-        tz = acpi_driver_data(device);
+        tz = acpi_driver_data(to_acpi_device(dev));
+        if (!tz)
+                return -EINVAL;
        for (i = 0; i < ACPI_THERMAL_MAX_ACTIVE; i++) {
                if (!(&tz->trips.active[i]))
@@ -1074,6 +1078,7 @@ static int acpi_thermal_resume(struct acpi_device *device)
        return AE_OK;
 }
+#endif
 static int thermal_act(const struct dmi_system_id *d) {
diff --git a/drivers/acpi/utils.c b/drivers/acpi/utils.c
index adbbc1c80a26..3e87c9c538aa 100644
--- a/drivers/acpi/utils.c
+++ b/drivers/acpi/utils.c
@@ -412,3 +412,45 @@ out:
        return status;
 }
 EXPORT_SYMBOL(acpi_get_physical_device_location);
+/**
+ * acpi_evaluate_hotplug_ost: Evaluate _OST for hotplug operations
+ * @handle: ACPI device handle
+ * @source_event: source event code
+ * @status_code: status code
+ * @status_buf: optional detailed information (NULL if none)
+ *
+ * Evaluate _OST for hotplug operations. All ACPI hotplug handlers
+ * must call this function when evaluating _OST for hotplug operations.
+ * When the platform does not support _OST, this function has no effect.
+ */
+acpi_status
+acpi_evaluate_hotplug_ost(acpi_handle handle, u32 source_event,
+                u32 status_code, struct acpi_buffer *status_buf)
+{
+#ifdef ACPI_HOTPLUG_OST
+        union acpi_object params[3] = {
+                {.type = ACPI_TYPE_INTEGER,},
+                {.type = ACPI_TYPE_INTEGER,},
+                {.type = ACPI_TYPE_BUFFER,}
+        };
+        struct acpi_object_list arg_list = {3, params};
+        acpi_status status;
+        params[0].integer.value = source_event;
+        params[1].integer.value = status_code;
+        if (status_buf != NULL) {
+                params[2].buffer.pointer = status_buf->pointer;
+                params[2].buffer.length = status_buf->length;
+        } else {
+                params[2].buffer.pointer = NULL;
+                params[2].buffer.length = 0;
+        }
+        status = acpi_evaluate_object(handle, "_OST", &arg_list, NULL);
+        return status;
+#else
+        return AE_OK;
+#endif
+}
+EXPORT_SYMBOL(acpi_evaluate_hotplug_ost);
diff --git a/drivers/acpi/video.c b/drivers/acpi/video.c
index a576575617d7..1e0a9e17c31d 100644
--- a/drivers/acpi/video.c
+++ b/drivers/acpi/video.c
@@ -558,6 +558,8 @@ acpi_video_bus_DOS(struct acpi_video_bus *video, int bios_flag, int lcd_flag)
        union acpi_object arg0 = { ACPI_TYPE_INTEGER };
        struct acpi_object_list args = { 1, &arg0 };
+        if (!video->cap._DOS)
+                return 0;
        if (bios_flag < 0 || bios_flag > 3 || lcd_flag < 0 || lcd_flag > 1)
                return -EINVAL;
diff --git a/drivers/acpi/video_detect.c b/drivers/acpi/video_detect.c
index 45d8097ef4cf..b728880ef10e 100644
--- a/drivers/acpi/video_detect.c
+++ b/drivers/acpi/video_detect.c
@@ -132,6 +132,33 @@ find_video(acpi_handle handle, u32 lvl, void *context, void **rv)
        return AE_OK;
 }
+/* Force to use vendor driver when the ACPI device is known to be
+ * buggy */
+static int video_detect_force_vendor(const struct dmi_system_id *d)
+{
+        acpi_video_support |= ACPI_VIDEO_BACKLIGHT_DMI_VENDOR;
+        return 0;
+}
+static struct dmi_system_id video_detect_dmi_table[] = {
+        /* On Samsung X360, the BIOS will set a flag (VDRV) if generic
+         * ACPI backlight device is used. This flag will definitively break
+         * the backlight interface (even the vendor interface) untill next
+         * reboot. It's why we should prevent video.ko from being used here
+         * and we can't rely on a later call to acpi_video_unregister().
+         */
+        {
+         .callback = video_detect_force_vendor,
+         .ident = "X360",
+         .matches = {
+                DMI_MATCH(DMI_SYS_VENDOR, "SAMSUNG ELECTRONICS CO., LTD."),
+                DMI_MATCH(DMI_PRODUCT_NAME, "X360"),
+                DMI_MATCH(DMI_BOARD_NAME, "X360"),
+                },
+        },
+        { },
+};
 /*
 * Returns the video capabilities of a specific ACPI graphics device
 *
@@ -164,6 +191,8 @@ long acpi_video_get_capabilities(acpi_handle graphics_handle)
                 *              ACPI_VIDEO_BACKLIGHT_DMI_VENDOR;
                 *}
                 */
+                dmi_check_system(video_detect_dmi_table);
        } else {
                status = acpi_bus_get_device(graphics_handle, &tmp_dev);
                if (ACPI_FAILURE(status)) {
@@ -182,8 +211,7 @@ long acpi_video_get_capabilities(acpi_handle graphics_handle)
 }
 EXPORT_SYMBOL(acpi_video_get_capabilities);
-/* Returns true if video.ko can do backlight switching */
+static void acpi_video_caps_check(void)
-int acpi_video_backlight_support(void)
 {
        /*
         * We must check whether the ACPI graphics device is physically plugged
@@ -191,6 +219,34 @@ int acpi_video_backlight_support(void)
         */
        if (!acpi_video_caps_checked)
                acpi_video_get_capabilities(NULL);
+}
+/* Promote the vendor interface instead of the generic video module.
+ * This function allow DMI blacklists to be implemented by externals
+ * platform drivers instead of putting a big blacklist in video_detect.c
+ * After calling this function you will probably want to call
+ * acpi_video_unregister() to make sure the video module is not loaded
+ */
+void acpi_video_dmi_promote_vendor(void)
+{
+        acpi_video_caps_check();
+        acpi_video_support |= ACPI_VIDEO_BACKLIGHT_DMI_VENDOR;
+}
+EXPORT_SYMBOL(acpi_video_dmi_promote_vendor);
+/* To be called when a driver who previously promoted the vendor
+ * interface */
+void acpi_video_dmi_demote_vendor(void)
+{
+        acpi_video_caps_check();
+        acpi_video_support &= ~ACPI_VIDEO_BACKLIGHT_DMI_VENDOR;
+}
+EXPORT_SYMBOL(acpi_video_dmi_demote_vendor);
+/* Returns true if video.ko can do backlight switching */
+int acpi_video_backlight_support(void)
+{
+        acpi_video_caps_check();
        /* First check for boot param -> highest prio */
        if (acpi_video_support & ACPI_VIDEO_BACKLIGHT_FORCE_VENDOR)
diff --git a/drivers/amba/bus.c b/drivers/amba/bus.c
index b7e728517284..e8eb91bd0d28 100644
--- a/drivers/amba/bus.c
+++ b/drivers/amba/bus.c
@@ -16,9 +16,9 @@
 #include <linux/pm.h>
 #include <linux/pm_runtime.h>
 #include <linux/amba/bus.h>
+#include <linux/sizes.h>
 #include <asm/irq.h>
-#include <asm/sizes.h>
 #define to_amba_driver(d)       container_of(d, struct amba_driver, drv)
diff --git a/drivers/amba/tegra-ahb.c b/drivers/amba/tegra-ahb.c
index aa0b1f160528..0b6f0b28a487 100644
--- a/drivers/amba/tegra-ahb.c
+++ b/drivers/amba/tegra-ahb.c
@@ -264,11 +264,6 @@ static int __devinit tegra_ahb_probe(struct platform_device *pdev)
        return 0;
 }
-static int __devexit tegra_ahb_remove(struct platform_device *pdev)
-{
-        return 0;
-}
 static const struct of_device_id tegra_ahb_of_match[] __devinitconst = {
        { .compatible = "nvidia,tegra30-ahb", },
        { .compatible = "nvidia,tegra20-ahb", },
@@ -277,7 +272,6 @@ static const struct of_device_id tegra_ahb_of_match[] __devinitconst = {
 static struct platform_driver tegra_ahb_driver = {
        .probe = tegra_ahb_probe,
-        .remove = __devexit_p(tegra_ahb_remove),
        .driver = {
                .name = DRV_NAME,
                .owner = THIS_MODULE,
diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig
index 2be8ef1d3093..27cecd313e75 100644
--- a/drivers/ata/Kconfig
+++ b/drivers/ata/Kconfig
@@ -115,7 +115,7 @@ config SATA_SIL24
          If unsure, say N.
 config ATA_SFF
-        bool "ATA SFF support"
+        bool "ATA SFF support (for legacy IDE and PATA)"
        default y
        help
          This option adds support for ATA controllers with SFF
diff --git a/drivers/ata/acard-ahci.c b/drivers/ata/acard-ahci.c
index 3bc8c79bf2c7..4e94ba29cb8d 100644
--- a/drivers/ata/acard-ahci.c
+++ b/drivers/ata/acard-ahci.c
@@ -503,21 +503,10 @@ static int acard_ahci_init_one(struct pci_dev *pdev, const struct pci_device_id
                                 &acard_ahci_sht);
 }
-static int __init acard_ahci_init(void)
+module_pci_driver(acard_ahci_pci_driver);
-{
-        return pci_register_driver(&acard_ahci_pci_driver);
-}
-static void __exit acard_ahci_exit(void)
-{
-        pci_unregister_driver(&acard_ahci_pci_driver);
-}
 MODULE_AUTHOR("Jeff Garzik");
 MODULE_DESCRIPTION("ACard AHCI SATA low-level driver");
 MODULE_LICENSE("GPL");
 MODULE_DEVICE_TABLE(pci, acard_ahci_pci_tbl);
 MODULE_VERSION(DRV_VERSION);
-module_init(acard_ahci_init);
-module_exit(acard_ahci_exit);
diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
index ebaf67e4b2bc..50d5dea0ff59 100644
--- a/drivers/ata/ahci.c
+++ b/drivers/ata/ahci.c
@@ -105,31 +105,27 @@ static struct ata_port_operations ahci_p5wdh_ops = {
 static const struct ata_port_info ahci_port_info[] = {
        /* by features */
-        [board_ahci] =
+        [board_ahci] = {
-        {
                .flags          = AHCI_FLAG_COMMON,
                .pio_mask       = ATA_PIO4,
                .udma_mask      = ATA_UDMA6,
                .port_ops       = &ahci_ops,
        },
-        [board_ahci_ign_iferr] =
+        [board_ahci_ign_iferr] = {
-        {
                AHCI_HFLAGS     (AHCI_HFLAG_IGN_IRQ_IF_ERR),
                .flags          = AHCI_FLAG_COMMON,
                .pio_mask       = ATA_PIO4,
                .udma_mask      = ATA_UDMA6,
                .port_ops       = &ahci_ops,
        },
-        [board_ahci_nosntf] =
+        [board_ahci_nosntf] = {
-        {
                AHCI_HFLAGS     (AHCI_HFLAG_NO_SNTF),
                .flags          = AHCI_FLAG_COMMON,
                .pio_mask       = ATA_PIO4,
                .udma_mask      = ATA_UDMA6,
                .port_ops       = &ahci_ops,
        },
-        [board_ahci_yes_fbs] =
+        [board_ahci_yes_fbs] = {
-        {
                AHCI_HFLAGS     (AHCI_HFLAG_YES_FBS),
                .flags          = AHCI_FLAG_COMMON,
                .pio_mask       = ATA_PIO4,
@@ -137,8 +133,7 @@ static const struct ata_port_info ahci_port_info[] = {
                .port_ops       = &ahci_ops,
        },
        /* by chipsets */
-        [board_ahci_mcp65] =
+        [board_ahci_mcp65] = {
-        {
                AHCI_HFLAGS     (AHCI_HFLAG_NO_FPDMA_AA | AHCI_HFLAG_NO_PMP |
                                 AHCI_HFLAG_YES_NCQ),
                .flags          = AHCI_FLAG_COMMON | ATA_FLAG_NO_DIPM,
@@ -146,24 +141,21 @@ static const struct ata_port_info ahci_port_info[] = {
                .udma_mask      = ATA_UDMA6,
                .port_ops       = &ahci_ops,
        },
-        [board_ahci_mcp77] =
+        [board_ahci_mcp77] = {
-        {
                AHCI_HFLAGS     (AHCI_HFLAG_NO_FPDMA_AA | AHCI_HFLAG_NO_PMP),
                .flags          = AHCI_FLAG_COMMON,
                .pio_mask       = ATA_PIO4,
                .udma_mask      = ATA_UDMA6,
                .port_ops       = &ahci_ops,
        },
-        [board_ahci_mcp89] =
+        [board_ahci_mcp89] = {
-        {
                AHCI_HFLAGS     (AHCI_HFLAG_NO_FPDMA_AA),
                .flags          = AHCI_FLAG_COMMON,
                .pio_mask       = ATA_PIO4,
                .udma_mask      = ATA_UDMA6,
                .port_ops       = &ahci_ops,
        },
-        [board_ahci_mv] =
+        [board_ahci_mv] = {
-        {
                AHCI_HFLAGS     (AHCI_HFLAG_NO_NCQ | AHCI_HFLAG_NO_MSI |
                                 AHCI_HFLAG_MV_PATA | AHCI_HFLAG_NO_PMP),
                .flags          = ATA_FLAG_SATA | ATA_FLAG_PIO_DMA,
@@ -171,8 +163,7 @@ static const struct ata_port_info ahci_port_info[] = {
                .udma_mask      = ATA_UDMA6,
                .port_ops       = &ahci_ops,
        },
-        [board_ahci_sb600] =
+        [board_ahci_sb600] = {
-        {
                AHCI_HFLAGS     (AHCI_HFLAG_IGN_SERR_INTERNAL |
                                 AHCI_HFLAG_NO_MSI | AHCI_HFLAG_SECT255 |
                                 AHCI_HFLAG_32BIT_ONLY),
@@ -181,16 +172,14 @@ static const struct ata_port_info ahci_port_info[] = {
                .udma_mask      = ATA_UDMA6,
                .port_ops       = &ahci_pmp_retry_srst_ops,
        },
-        [board_ahci_sb700] =    /* for SB700 and SB800 */
+        [board_ahci_sb700] = {  /* for SB700 and SB800 */
-        {
                AHCI_HFLAGS     (AHCI_HFLAG_IGN_SERR_INTERNAL),
                .flags          = AHCI_FLAG_COMMON,
                .pio_mask       = ATA_PIO4,
                .udma_mask      = ATA_UDMA6,
                .port_ops       = &ahci_pmp_retry_srst_ops,
        },
-        [board_ahci_vt8251] =
+        [board_ahci_vt8251] = {
-        {
                AHCI_HFLAGS     (AHCI_HFLAG_NO_NCQ | AHCI_HFLAG_NO_PMP),
                .flags          = AHCI_FLAG_COMMON,
                .pio_mask       = ATA_PIO4,
@@ -267,6 +256,14 @@ static const struct pci_device_id ahci_pci_tbl[] = {
        { PCI_VDEVICE(INTEL, 0x8c07), board_ahci }, /* Lynx Point RAID */
        { PCI_VDEVICE(INTEL, 0x8c0e), board_ahci }, /* Lynx Point RAID */
        { PCI_VDEVICE(INTEL, 0x8c0f), board_ahci }, /* Lynx Point RAID */
+        { PCI_VDEVICE(INTEL, 0x9c02), board_ahci }, /* Lynx Point-LP AHCI */
+        { PCI_VDEVICE(INTEL, 0x9c03), board_ahci }, /* Lynx Point-LP AHCI */
+        { PCI_VDEVICE(INTEL, 0x9c04), board_ahci }, /* Lynx Point-LP RAID */
+        { PCI_VDEVICE(INTEL, 0x9c05), board_ahci }, /* Lynx Point-LP RAID */
+        { PCI_VDEVICE(INTEL, 0x9c06), board_ahci }, /* Lynx Point-LP RAID */
+        { PCI_VDEVICE(INTEL, 0x9c07), board_ahci }, /* Lynx Point-LP RAID */
+        { PCI_VDEVICE(INTEL, 0x9c0e), board_ahci }, /* Lynx Point-LP RAID */
+        { PCI_VDEVICE(INTEL, 0x9c0f), board_ahci }, /* Lynx Point-LP RAID */
        /* JMicron 360/1/3/5/6, match class to avoid IDE function */
        { PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
@@ -777,6 +774,22 @@ static bool ahci_sb600_enable_64bit(struct pci_dev *pdev)
                        },
                },
                /*
+                 * All BIOS versions for the MSI K9AGM2 (MS-7327) support
+                 * 64bit DMA.
+                 *
+                 * This board also had the typo mentioned above in the
+                 * Manufacturer DMI field (fixed in BIOS version 1.5), so
+                 * match on DMI_BOARD_VENDOR of "MICRO-STAR INTER" again.
+                 */
+                {
+                        .ident = "MSI K9AGM2",
+                        .matches = {
+                                DMI_MATCH(DMI_BOARD_VENDOR,
+                                          "MICRO-STAR INTER"),
+                                DMI_MATCH(DMI_BOARD_NAME, "MS-7327"),
+                        },
+                },
+                /*
                 * All BIOS versions for the Asus M3A support 64bit DMA.
                 * (all release versions from 0301 to 1206 were tested)
                 */
@@ -1233,22 +1246,10 @@ static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
                                 &ahci_sht);
 }
-static int __init ahci_init(void)
+module_pci_driver(ahci_pci_driver);
-{
-        return pci_register_driver(&ahci_pci_driver);
-}
-static void __exit ahci_exit(void)
-{
-        pci_unregister_driver(&ahci_pci_driver);
-}
 MODULE_AUTHOR("Jeff Garzik");
 MODULE_DESCRIPTION("AHCI SATA low-level driver");
 MODULE_LICENSE("GPL");
 MODULE_DEVICE_TABLE(pci, ahci_pci_tbl);
 MODULE_VERSION(DRV_VERSION);
-module_init(ahci_init);
-module_exit(ahci_exit);
diff --git a/drivers/ata/ahci.h b/drivers/ata/ahci.h
index c2594ddf25b0..57eb1c212a4c 100644
--- a/drivers/ata/ahci.h
+++ b/drivers/ata/ahci.h
@@ -320,6 +320,7 @@ extern struct device_attribute *ahci_sdev_attrs[];
 extern struct ata_port_operations ahci_ops;
 extern struct ata_port_operations ahci_pmp_retry_srst_ops;
+unsigned int ahci_dev_classify(struct ata_port *ap);
 void ahci_fill_cmd_slot(struct ahci_port_priv *pp, unsigned int tag,
                        u32 opts);
 void ahci_save_initial_config(struct device *dev,
diff --git a/drivers/ata/ahci_platform.c b/drivers/ata/ahci_platform.c
index 9e419e1c2006..09728e09cb31 100644
--- a/drivers/ata/ahci_platform.c
+++ b/drivers/ata/ahci_platform.c
@@ -15,6 +15,7 @@
 #include <linux/kernel.h>
 #include <linux/gfp.h>
 #include <linux/module.h>
+#include <linux/pm.h>
 #include <linux/init.h>
 #include <linux/interrupt.h>
 #include <linux/device.h>
@@ -271,13 +272,10 @@ static int ahci_resume(struct device *dev)
        return 0;
 }
-static struct dev_pm_ops ahci_pm_ops = {
-        .suspend                = &ahci_suspend,
-        .resume                 = &ahci_resume,
-};
 #endif
+SIMPLE_DEV_PM_OPS(ahci_pm_ops, ahci_suspend, ahci_resume);
 static const struct of_device_id ahci_of_match[] = {
        { .compatible = "calxeda,hb-ahci", },
        { .compatible = "snps,spear-ahci", },
@@ -291,9 +289,7 @@ static struct platform_driver ahci_driver = {
                .name = "ahci",
                .owner = THIS_MODULE,
                .of_match_table = ahci_of_match,
-#ifdef CONFIG_PM
                .pm = &ahci_pm_ops,
-#endif
        },
        .id_table       = ahci_devtype,
 };
diff --git a/drivers/ata/ata_generic.c b/drivers/ata/ata_generic.c
index aae115600b74..f8f38a08abc5 100644
--- a/drivers/ata/ata_generic.c
+++ b/drivers/ata/ata_generic.c
@@ -255,17 +255,7 @@ static struct pci_driver ata_generic_pci_driver = {
 #endif
 };
-static int __init ata_generic_init(void)
+module_pci_driver(ata_generic_pci_driver);
-{
-        return pci_register_driver(&ata_generic_pci_driver);
-}
-static void __exit ata_generic_exit(void)
-{
-        pci_unregister_driver(&ata_generic_pci_driver);
-}
 MODULE_AUTHOR("Alan Cox");
 MODULE_DESCRIPTION("low-level driver for generic ATA");
@@ -273,7 +263,4 @@ MODULE_LICENSE("GPL");
 MODULE_DEVICE_TABLE(pci, ata_generic);
 MODULE_VERSION(DRV_VERSION);
-module_init(ata_generic_init);
-module_exit(ata_generic_exit);
 module_param(all_generic_ide, int, 0);
diff --git a/drivers/ata/ata_piix.c b/drivers/ata/ata_piix.c
index 3c809bfbccf5..ef773e12af79 100644
--- a/drivers/ata/ata_piix.c
+++ b/drivers/ata/ata_piix.c
@@ -329,6 +329,14 @@ static const struct pci_device_id piix_pci_tbl[] = {
        { 0x8086, 0x8c08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
        /* SATA Controller IDE (Lynx Point) */
        { 0x8086, 0x8c09, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
+        /* SATA Controller IDE (Lynx Point-LP) */
+        { 0x8086, 0x9c00, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_snb },
+        /* SATA Controller IDE (Lynx Point-LP) */
+        { 0x8086, 0x9c01, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_snb },
+        /* SATA Controller IDE (Lynx Point-LP) */
+        { 0x8086, 0x9c08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
+        /* SATA Controller IDE (Lynx Point-LP) */
+        { 0x8086, 0x9c09, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
        /* SATA Controller IDE (DH89xxCC) */
        { 0x8086, 0x2326, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
        { }     /* terminate list */
diff --git a/drivers/ata/libahci.c b/drivers/ata/libahci.c
index f9eaa82311a9..555c07afa05b 100644
--- a/drivers/ata/libahci.c
+++ b/drivers/ata/libahci.c
@@ -1139,7 +1139,7 @@ static void ahci_dev_config(struct ata_device *dev)
        }
 }
-static unsigned int ahci_dev_classify(struct ata_port *ap)
+unsigned int ahci_dev_classify(struct ata_port *ap)
 {
        void __iomem *port_mmio = ahci_port_base(ap);
        struct ata_taskfile tf;
@@ -1153,6 +1153,7 @@ static unsigned int ahci_dev_classify(struct ata_port *ap)
        return ata_dev_classify(&tf);
 }
+EXPORT_SYMBOL_GPL(ahci_dev_classify);
 void ahci_fill_cmd_slot(struct ahci_port_priv *pp, unsigned int tag,
                        u32 opts)
diff --git a/drivers/ata/libata-acpi.c b/drivers/ata/libata-acpi.c
index bb7c5f1085cc..fd9ecf74e631 100644
--- a/drivers/ata/libata-acpi.c
+++ b/drivers/ata/libata-acpi.c
@@ -16,6 +16,7 @@
 #include <linux/libata.h>
 #include <linux/pci.h>
 #include <linux/slab.h>
+#include <linux/pm_runtime.h>
 #include <scsi/scsi_device.h>
 #include "libata.h"
@@ -48,62 +49,43 @@ static void ata_acpi_clear_gtf(struct ata_device *dev)
 }
 /**
- * ata_acpi_associate_sata_port - associate SATA port with ACPI objects
+ * ata_ap_acpi_handle - provide the acpi_handle for an ata_port
- * @ap: target SATA port
+ * @ap: the acpi_handle returned will correspond to this port
 *
- * Look up ACPI objects associated with @ap and initialize acpi_handle
+ * Returns the acpi_handle for the ACPI namespace object corresponding to
- * fields of @ap, the port and devices accordingly.
+ * the ata_port passed into the function, or NULL if no such object exists
- *
- * LOCKING:
- * EH context.
- *
- * RETURNS:
- * 0 on success, -errno on failure.
 */
-void ata_acpi_associate_sata_port(struct ata_port *ap)
+acpi_handle ata_ap_acpi_handle(struct ata_port *ap)
 {
-        WARN_ON(!(ap->flags & ATA_FLAG_ACPI_SATA));
+        if (ap->flags & ATA_FLAG_ACPI_SATA)
+                return NULL;
-        if (!sata_pmp_attached(ap)) {
-                u64 adr = SATA_ADR(ap->port_no, NO_PORT_MULT);
-                ap->link.device->acpi_handle =
-                        acpi_get_child(ap->host->acpi_handle, adr);
-        } else {
-                struct ata_link *link;
-                ap->link.device->acpi_handle = NULL;
-                ata_for_each_link(link, ap, EDGE) {
-                        u64 adr = SATA_ADR(ap->port_no, link->pmp);
-                        link->device->acpi_handle =
+        return acpi_get_child(DEVICE_ACPI_HANDLE(ap->host->dev), ap->port_no);
-                                acpi_get_child(ap->host->acpi_handle, adr);
-                }
-        }
 }
+EXPORT_SYMBOL(ata_ap_acpi_handle);
-static void ata_acpi_associate_ide_port(struct ata_port *ap)
+/**
+ * ata_dev_acpi_handle - provide the acpi_handle for an ata_device
+ * @dev: the acpi_device returned will correspond to this port
+ *
+ * Returns the acpi_handle for the ACPI namespace object corresponding to
+ * the ata_device passed into the function, or NULL if no such object exists
+ */
+acpi_handle ata_dev_acpi_handle(struct ata_device *dev)
 {
-        int max_devices, i;
+        acpi_integer adr;
+        struct ata_port *ap = dev->link->ap;
-        ap->acpi_handle = acpi_get_child(ap->host->acpi_handle, ap->port_no);
-        if (!ap->acpi_handle)
-                return;
-        max_devices = 1;
-        if (ap->flags & ATA_FLAG_SLAVE_POSS)
-                max_devices++;
-        for (i = 0; i < max_devices; i++) {
-                struct ata_device *dev = &ap->link.device[i];
-                dev->acpi_handle = acpi_get_child(ap->acpi_handle, i);
-        }
-        if (ata_acpi_gtm(ap, &ap->__acpi_init_gtm) == 0)
+        if (ap->flags & ATA_FLAG_ACPI_SATA) {
-                ap->pflags |= ATA_PFLAG_INIT_GTM_VALID;
+                if (!sata_pmp_attached(ap))
+                        adr = SATA_ADR(ap->port_no, NO_PORT_MULT);
+                else
+                        adr = SATA_ADR(ap->port_no, dev->link->pmp);
+                return acpi_get_child(DEVICE_ACPI_HANDLE(ap->host->dev), adr);
+        } else
+                return acpi_get_child(ata_ap_acpi_handle(ap), dev->devno);
 }
+EXPORT_SYMBOL(ata_dev_acpi_handle);
 /* @ap and @dev are the same as ata_acpi_handle_hotplug() */
 static void ata_acpi_detach_device(struct ata_port *ap, struct ata_device *dev)
@@ -229,56 +211,6 @@ static const struct acpi_dock_ops ata_acpi_ap_dock_ops = {
 };
 /**
- * ata_acpi_associate - associate ATA host with ACPI objects
- * @host: target ATA host
- *
- * Look up ACPI objects associated with @host and initialize
- * acpi_handle fields of @host, its ports and devices accordingly.
- *
- * LOCKING:
- * EH context.
- *
- * RETURNS:
- * 0 on success, -errno on failure.
- */
-void ata_acpi_associate(struct ata_host *host)
-{
-        int i, j;
-        if (!is_pci_dev(host->dev) || libata_noacpi)
-                return;
-        host->acpi_handle = DEVICE_ACPI_HANDLE(host->dev);
-        if (!host->acpi_handle)
-                return;
-        for (i = 0; i < host->n_ports; i++) {
-                struct ata_port *ap = host->ports[i];
-                if (host->ports[0]->flags & ATA_FLAG_ACPI_SATA)
-                        ata_acpi_associate_sata_port(ap);
-                else
-                        ata_acpi_associate_ide_port(ap);
-                if (ap->acpi_handle) {
-                        /* we might be on a docking station */
-                        register_hotplug_dock_device(ap->acpi_handle,
-                                             &ata_acpi_ap_dock_ops, ap);
-                }
-                for (j = 0; j < ata_link_max_devices(&ap->link); j++) {
-                        struct ata_device *dev = &ap->link.device[j];
-                        if (dev->acpi_handle) {
-                                /* we might be on a docking station */
-                                register_hotplug_dock_device(dev->acpi_handle,
-                                             &ata_acpi_dev_dock_ops, dev);
-                        }
-                }
-        }
-}
-/**
 * ata_acpi_dissociate - dissociate ATA host from ACPI objects
 * @host: target ATA host
 *
@@ -299,7 +231,7 @@ void ata_acpi_dissociate(struct ata_host *host)
                struct ata_port *ap = host->ports[i];
                const struct ata_acpi_gtm *gtm = ata_acpi_init_gtm(ap);
-                if (ap->acpi_handle && gtm)
+                if (ata_ap_acpi_handle(ap) && gtm)
                        ata_acpi_stm(ap, gtm);
        }
 }
@@ -324,7 +256,8 @@ int ata_acpi_gtm(struct ata_port *ap, struct ata_acpi_gtm *gtm)
        acpi_status status;
        int rc = 0;
-        status = acpi_evaluate_object(ap->acpi_handle, "_GTM", NULL, &output);
+        status = acpi_evaluate_object(ata_ap_acpi_handle(ap), "_GTM", NULL,
+                                      &output);
        rc = -ENOENT;
        if (status == AE_NOT_FOUND)
@@ -394,7 +327,8 @@ int ata_acpi_stm(struct ata_port *ap, const struct ata_acpi_gtm *stm)
        input.count = 3;
        input.pointer = in_params;
-        status = acpi_evaluate_object(ap->acpi_handle, "_STM", &input, NULL);
+        status = acpi_evaluate_object(ata_ap_acpi_handle(ap), "_STM", &input,
+                                      NULL);
        if (status == AE_NOT_FOUND)
                return -ENOENT;
@@ -451,7 +385,8 @@ static int ata_dev_get_GTF(struct ata_device *dev, struct ata_acpi_gtf **gtf)
                            __func__, ap->port_no);
        /* _GTF has no input parameters */
-        status = acpi_evaluate_object(dev->acpi_handle, "_GTF", NULL, &output);
+        status = acpi_evaluate_object(ata_dev_acpi_handle(dev), "_GTF", NULL,
+                                      &output);
        out_obj = dev->gtf_cache = output.pointer;
        if (ACPI_FAILURE(status)) {
@@ -817,7 +752,8 @@ static int ata_acpi_push_id(struct ata_device *dev)
        /* It's OK for _SDD to be missing too. */
        swap_buf_le16(dev->id, ATA_ID_WORDS);
-        status = acpi_evaluate_object(dev->acpi_handle, "_SDD", &input, NULL);
+        status = acpi_evaluate_object(ata_dev_acpi_handle(dev), "_SDD", &input,
+                                      NULL);
        swap_buf_le16(dev->id, ATA_ID_WORDS);
        if (status == AE_NOT_FOUND)
@@ -867,7 +803,7 @@ void ata_acpi_on_resume(struct ata_port *ap)
        const struct ata_acpi_gtm *gtm = ata_acpi_init_gtm(ap);
        struct ata_device *dev;
-        if (ap->acpi_handle && gtm) {
+        if (ata_ap_acpi_handle(ap) && gtm) {
                /* _GTM valid */
                /* restore timing parameters */
@@ -907,23 +843,39 @@ void ata_acpi_on_resume(struct ata_port *ap)
 void ata_acpi_set_state(struct ata_port *ap, pm_message_t state)
 {
        struct ata_device *dev;
+        acpi_handle handle;
-        if (!ap->acpi_handle || (ap->flags & ATA_FLAG_ACPI_SATA))
+        int acpi_state;
-                return;
        /* channel first and then drives for power on and vica versa
           for power off */
-        if (state.event == PM_EVENT_ON)
+        handle = ata_ap_acpi_handle(ap);
-                acpi_bus_set_power(ap->acpi_handle, ACPI_STATE_D0);
+        if (handle && state.event == PM_EVENT_ON)
+                acpi_bus_set_power(handle, ACPI_STATE_D0);
        ata_for_each_dev(dev, &ap->link, ENABLED) {
-                if (dev->acpi_handle)
+                handle = ata_dev_acpi_handle(dev);
-                        acpi_bus_set_power(dev->acpi_handle,
+                if (!handle)
-                                state.event == PM_EVENT_ON ?
+                        continue;
-                                        ACPI_STATE_D0 : ACPI_STATE_D3);
+                if (state.event != PM_EVENT_ON) {
+                        acpi_state = acpi_pm_device_sleep_state(
+                                &dev->sdev->sdev_gendev, NULL, ACPI_STATE_D3);
+                        if (acpi_state > 0)
+                                acpi_bus_set_power(handle, acpi_state);
+                        /* TBD: need to check if it's runtime pm request */
+                        acpi_pm_device_run_wake(
+                                &dev->sdev->sdev_gendev, true);
+                } else {
+                        /* Ditto */
+                        acpi_pm_device_run_wake(
+                                &dev->sdev->sdev_gendev, false);
+                        acpi_bus_set_power(handle, ACPI_STATE_D0);
+                }
        }
-        if (state.event != PM_EVENT_ON)
-                acpi_bus_set_power(ap->acpi_handle, ACPI_STATE_D3);
+        handle = ata_ap_acpi_handle(ap);
+        if (handle && state.event != PM_EVENT_ON)
+                acpi_bus_set_power(handle, ACPI_STATE_D3);
 }
 /**
@@ -948,7 +900,7 @@ int ata_acpi_on_devcfg(struct ata_device *dev)
        int nr_executed = 0;
        int rc;
-        if (!dev->acpi_handle)
+        if (!ata_dev_acpi_handle(dev))
                return 0;
        /* do we need to do _GTF? */
@@ -994,7 +946,6 @@ int ata_acpi_on_devcfg(struct ata_device *dev)
        }
        ata_dev_warn(dev, "ACPI: failed the second time, disabled\n");
-        dev->acpi_handle = NULL;
        /* We can safely continue if no _GTF command has been executed
         * and port is not frozen.
@@ -1018,3 +969,221 @@ void ata_acpi_on_disable(struct ata_device *dev)
 {
        ata_acpi_clear_gtf(dev);
 }
+static void ata_acpi_wake_dev(acpi_handle handle, u32 event, void *context)
+{
+        struct ata_device *ata_dev = context;
+        if (event == ACPI_NOTIFY_DEVICE_WAKE && ata_dev &&
+                        pm_runtime_suspended(&ata_dev->sdev->sdev_gendev))
+                scsi_autopm_get_device(ata_dev->sdev);
+}
+static void ata_acpi_add_pm_notifier(struct ata_device *dev)
+{
+        struct acpi_device *acpi_dev;
+        acpi_handle handle;
+        acpi_status status;
+        handle = ata_dev_acpi_handle(dev);
+        if (!handle)
+                return;
+        status = acpi_bus_get_device(handle, &acpi_dev);
+        if (ACPI_FAILURE(status))
+                return;
+        if (dev->sdev->can_power_off) {
+                acpi_install_notify_handler(handle, ACPI_SYSTEM_NOTIFY,
+                        ata_acpi_wake_dev, dev);
+                device_set_run_wake(&dev->sdev->sdev_gendev, true);
+        }
+}
+static void ata_acpi_remove_pm_notifier(struct ata_device *dev)
+{
+        struct acpi_device *acpi_dev;
+        acpi_handle handle;
+        acpi_status status;
+        handle = ata_dev_acpi_handle(dev);
+        if (!handle)
+                return;
+        status = acpi_bus_get_device(handle, &acpi_dev);
+        if (ACPI_FAILURE(status))
+                return;
+        if (dev->sdev->can_power_off) {
+                device_set_run_wake(&dev->sdev->sdev_gendev, false);
+                acpi_remove_notify_handler(handle, ACPI_SYSTEM_NOTIFY,
+                        ata_acpi_wake_dev);
+        }
+}
+static void ata_acpi_register_power_resource(struct ata_device *dev)
+{
+        struct scsi_device *sdev = dev->sdev;
+        acpi_handle handle;
+        struct device *device;
+        handle = ata_dev_acpi_handle(dev);
+        if (!handle)
+                return;
+        device = &sdev->sdev_gendev;
+        acpi_power_resource_register_device(device, handle);
+}
+static void ata_acpi_unregister_power_resource(struct ata_device *dev)
+{
+        struct scsi_device *sdev = dev->sdev;
+        acpi_handle handle;
+        struct device *device;
+        handle = ata_dev_acpi_handle(dev);
+        if (!handle)
+                return;
+        device = &sdev->sdev_gendev;
+        acpi_power_resource_unregister_device(device, handle);
+}
+void ata_acpi_bind(struct ata_device *dev)
+{
+        ata_acpi_add_pm_notifier(dev);
+        ata_acpi_register_power_resource(dev);
+}
+void ata_acpi_unbind(struct ata_device *dev)
+{
+        ata_acpi_remove_pm_notifier(dev);
+        ata_acpi_unregister_power_resource(dev);
+}
+static int compat_pci_ata(struct ata_port *ap)
+{
+        struct device *dev = ap->tdev.parent;
+        struct pci_dev *pdev;
+        if (!is_pci_dev(dev))
+                return 0;
+        pdev = to_pci_dev(dev);
+        if ((pdev->class >> 8) != PCI_CLASS_STORAGE_SATA &&
+            (pdev->class >> 8) != PCI_CLASS_STORAGE_IDE)
+                return 0;
+        return 1;
+}
+static int ata_acpi_bind_host(struct ata_port *ap, acpi_handle *handle)
+{
+        if (ap->flags & ATA_FLAG_ACPI_SATA)
+                return -ENODEV;
+        *handle = acpi_get_child(DEVICE_ACPI_HANDLE(ap->tdev.parent),
+                        ap->port_no);
+        if (!*handle)
+                return -ENODEV;
+        if (ata_acpi_gtm(ap, &ap->__acpi_init_gtm) == 0)
+                ap->pflags |= ATA_PFLAG_INIT_GTM_VALID;
+        return 0;
+}
+static int ata_acpi_bind_device(struct ata_port *ap, struct scsi_device *sdev,
+                                acpi_handle *handle)
+{
+        struct ata_device *ata_dev;
+        acpi_status status;
+        struct acpi_device *acpi_dev;
+        struct acpi_device_power_state *states;
+        if (ap->flags & ATA_FLAG_ACPI_SATA)
+                ata_dev = &ap->link.device[sdev->channel];
+        else
+                ata_dev = &ap->link.device[sdev->id];
+        *handle = ata_dev_acpi_handle(ata_dev);
+        if (!*handle)
+                return -ENODEV;
+        status = acpi_bus_get_device(*handle, &acpi_dev);
+        if (ACPI_FAILURE(status))
+                return 0;
+        /*
+         * If firmware has _PS3 or _PR3 for this device,
+         * and this ata ODD device support device attention,
+         * it means this device can be powered off
+         */
+        states = acpi_dev->power.states;
+        if ((states[ACPI_STATE_D3_HOT].flags.valid ||
+                        states[ACPI_STATE_D3_COLD].flags.explicit_set) &&
+                        ata_dev->flags & ATA_DFLAG_DA)
+                sdev->can_power_off = 1;
+        return 0;
+}
+static int is_ata_port(const struct device *dev)
+{
+        return dev->type == &ata_port_type;
+}
+static struct ata_port *dev_to_ata_port(struct device *dev)
+{
+        while (!is_ata_port(dev)) {
+                if (!dev->parent)
+                        return NULL;
+                dev = dev->parent;
+        }
+        return to_ata_port(dev);
+}
+static int ata_acpi_find_device(struct device *dev, acpi_handle *handle)
+{
+        struct ata_port *ap = dev_to_ata_port(dev);
+        if (!ap)
+                return -ENODEV;
+        if (!compat_pci_ata(ap))
+                return -ENODEV;
+        if (scsi_is_host_device(dev))
+                return ata_acpi_bind_host(ap, handle);
+        else if (scsi_is_sdev_device(dev)) {
+                struct scsi_device *sdev = to_scsi_device(dev);
+                return ata_acpi_bind_device(ap, sdev, handle);
+        } else
+                return -ENODEV;
+}
+static int ata_acpi_find_dummy(struct device *dev, acpi_handle *handle)
+{
+        return -ENODEV;
+}
+static struct acpi_bus_type ata_acpi_bus = {
+        .find_bridge = ata_acpi_find_dummy,
+        .find_device = ata_acpi_find_device,
+};
+int ata_acpi_register(void)
+{
+        return scsi_register_acpi_bus_type(&ata_acpi_bus);
+}
+void ata_acpi_unregister(void)
+{
+        scsi_unregister_acpi_bus_type(&ata_acpi_bus);
+}
diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c
index cece3a4d11ea..8e1039c8e159 100644
--- a/drivers/ata/libata-core.c
+++ b/drivers/ata/libata-core.c
@@ -80,6 +80,8 @@ const struct ata_port_operations ata_base_port_ops = {
        .prereset               = ata_std_prereset,
        .postreset              = ata_std_postreset,
        .error_handler          = ata_std_error_handler,
+        .sched_eh               = ata_std_sched_eh,
+        .end_eh                 = ata_std_end_eh,
 };
 const struct ata_port_operations sata_port_ops = {
@@ -2374,6 +2376,9 @@ int ata_dev_configure(struct ata_device *dev)
                        dma_dir_string = ", DMADIR";
                }
+                if (ata_id_has_da(dev->id))
+                        dev->flags |= ATA_DFLAG_DA;
                /* print device info to dmesg */
                if (ata_msg_drv(ap) && print_info)
                        ata_dev_info(dev,
@@ -4057,7 +4062,7 @@ static const struct ata_blacklist_entry ata_device_blacklist [] = {
        { "_NEC DV5800A",       NULL,           ATA_HORKAGE_NODMA },
        { "SAMSUNG CD-ROM SN-124", "N001",      ATA_HORKAGE_NODMA },
        { "Seagate STT20000A", NULL,            ATA_HORKAGE_NODMA },
-        { "2GB ATA Flash Disk", "ADMA428M",     ATA_HORKAGE_NODMA },
+        { " 2GB ATA Flash Disk", "ADMA428M",    ATA_HORKAGE_NODMA },
        /* Odd clown on sil3726/4726 PMPs */
        { "Config  Disk",       NULL,           ATA_HORKAGE_DISABLE },
@@ -4123,9 +4128,11 @@ static const struct ata_blacklist_entry ata_device_blacklist [] = {
        /* Devices that do not need bridging limits applied */
        { "MTRON MSP-SATA*",            NULL,   ATA_HORKAGE_BRIDGE_OK, },
+        { "BUFFALO HD-QSU2/R5",         NULL,   ATA_HORKAGE_BRIDGE_OK, },
        /* Devices which aren't very happy with higher link speeds */
        { "WD My Book",                 NULL,   ATA_HORKAGE_1_5_GBPS, },
+        { "Seagate FreeAgent GoFlex",   NULL,   ATA_HORKAGE_1_5_GBPS, },
        /*
         * Devices which choke on SETXFER.  Applies only if both the
@@ -5288,8 +5295,6 @@ static int ata_port_request_pm(struct ata_port *ap, pm_message_t mesg,
        return rc;
 }
-#define to_ata_port(d) container_of(d, struct ata_port, tdev)
 static int ata_port_suspend_common(struct device *dev, pm_message_t mesg)
 {
        struct ata_port *ap = to_ata_port(dev);
@@ -6051,9 +6056,6 @@ int ata_host_register(struct ata_host *host, struct scsi_host_template *sht)
        if (rc)
                goto err_tadd;
-        /* associate with ACPI nodes */
-        ata_acpi_associate(host);
        /* set cable, sata_spd_limit and report */
        for (i = 0; i < host->n_ports; i++) {
                struct ata_port *ap = host->ports[i];
@@ -6513,6 +6515,8 @@ static int __init ata_init(void)
        ata_parse_force_param();
+        ata_acpi_register();
        rc = ata_sff_init();
        if (rc) {
                kfree(ata_force_tbl);
@@ -6539,6 +6543,7 @@ static void __exit ata_exit(void)
        ata_release_transport(ata_scsi_transport_template);
        libata_transport_exit();
        ata_sff_exit();
+        ata_acpi_unregister();
        kfree(ata_force_tbl);
 }
@@ -6642,6 +6647,8 @@ struct ata_port_operations ata_dummy_port_ops = {
        .qc_prep                = ata_noop_qc_prep,
        .qc_issue               = ata_dummy_qc_issue,
        .error_handler          = ata_dummy_error_handler,
+        .sched_eh               = ata_std_sched_eh,
+        .end_eh                 = ata_std_end_eh,
 };
 const struct ata_port_info ata_dummy_port_info = {
diff --git a/drivers/ata/libata-eh.c b/drivers/ata/libata-eh.c
index 6d53cf9b3b6e..7d4535e989bf 100644
--- a/drivers/ata/libata-eh.c
+++ b/drivers/ata/libata-eh.c
@@ -419,7 +419,7 @@ int ata_ering_map(struct ata_ering *ering,
        return rc;
 }
-int ata_ering_clear_cb(struct ata_ering_entry *ent, void *void_arg)
+static int ata_ering_clear_cb(struct ata_ering_entry *ent, void *void_arg)
 {
        ent->eflags |= ATA_EFLAG_OLD_ER;
        return 0;
@@ -793,12 +793,12 @@ void ata_scsi_port_error_handler(struct Scsi_Host *host, struct ata_port *ap)
                ata_for_each_link(link, ap, HOST_FIRST)
                        memset(&link->eh_info, 0, sizeof(link->eh_info));
-                /* Clear host_eh_scheduled while holding ap->lock such
+                /* end eh (clear host_eh_scheduled) while holding
-                 * that if exception occurs after this point but
+                 * ap->lock such that if exception occurs after this
-                 * before EH completion, SCSI midlayer will
+                 * point but before EH completion, SCSI midlayer will
                 * re-initiate EH.
                 */
-                host->host_eh_scheduled = 0;
+                ap->ops->end_eh(ap);
                spin_unlock_irqrestore(ap->lock, flags);
                ata_eh_release(ap);
@@ -986,16 +986,13 @@ void ata_qc_schedule_eh(struct ata_queued_cmd *qc)
 }
 /**
- *      ata_port_schedule_eh - schedule error handling without a qc
+ * ata_std_sched_eh - non-libsas ata_ports issue eh with this common routine
- *      @ap: ATA port to schedule EH for
+ * @ap: ATA port to schedule EH for
- *
- *      Schedule error handling for @ap.  EH will kick in as soon as
- *      all commands are drained.
 *
- *      LOCKING:
+ *      LOCKING: inherited from ata_port_schedule_eh
 *      spin_lock_irqsave(host lock)
 */
-void ata_port_schedule_eh(struct ata_port *ap)
+void ata_std_sched_eh(struct ata_port *ap)
 {
        WARN_ON(!ap->ops->error_handler);
@@ -1007,6 +1004,44 @@ void ata_port_schedule_eh(struct ata_port *ap)
        DPRINTK("port EH scheduled\n");
 }
+EXPORT_SYMBOL_GPL(ata_std_sched_eh);
+/**
+ * ata_std_end_eh - non-libsas ata_ports complete eh with this common routine
+ * @ap: ATA port to end EH for
+ *
+ * In the libata object model there is a 1:1 mapping of ata_port to
+ * shost, so host fields can be directly manipulated under ap->lock, in
+ * the libsas case we need to hold a lock at the ha->level to coordinate
+ * these events.
+ *
+ *      LOCKING:
+ *      spin_lock_irqsave(host lock)
+ */
+void ata_std_end_eh(struct ata_port *ap)
+{
+        struct Scsi_Host *host = ap->scsi_host;
+        host->host_eh_scheduled = 0;
+}
+EXPORT_SYMBOL(ata_std_end_eh);
+/**
+ *      ata_port_schedule_eh - schedule error handling without a qc
+ *      @ap: ATA port to schedule EH for
+ *
+ *      Schedule error handling for @ap.  EH will kick in as soon as
+ *      all commands are drained.
+ *
+ *      LOCKING:
+ *      spin_lock_irqsave(host lock)
+ */
+void ata_port_schedule_eh(struct ata_port *ap)
+{
+        /* see: ata_std_sched_eh, unless you know better */
+        ap->ops->sched_eh(ap);
+}
 static int ata_do_link_abort(struct ata_port *ap, struct ata_link *link)
 {
diff --git a/drivers/ata/libata-pmp.c b/drivers/ata/libata-pmp.c
index 21b80c555c60..61c59ee45ce9 100644
--- a/drivers/ata/libata-pmp.c
+++ b/drivers/ata/libata-pmp.c
@@ -529,8 +529,6 @@ int sata_pmp_attach(struct ata_device *dev)
        ata_for_each_link(tlink, ap, EDGE)
                sata_link_init_spd(tlink);
-        ata_acpi_associate_sata_port(ap);
        return 0;
 fail:
@@ -570,8 +568,6 @@ static void sata_pmp_detach(struct ata_device *dev)
        ap->nr_pmp_links = 0;
        link->pmp = 0;
        spin_unlock_irqrestore(ap->lock, flags);
-        ata_acpi_associate_sata_port(ap);
 }
 /**
diff --git a/drivers/ata/libata-scsi.c b/drivers/ata/libata-scsi.c
index 22226350cd0c..8ec81ca8f659 100644
--- a/drivers/ata/libata-scsi.c
+++ b/drivers/ata/libata-scsi.c
@@ -3445,6 +3445,7 @@ void ata_scsi_scan_host(struct ata_port *ap, int sync)
                        if (!IS_ERR(sdev)) {
                                dev->sdev = sdev;
                                scsi_device_put(sdev);
+                                ata_acpi_bind(dev);
                        } else {
                                dev->sdev = NULL;
                        }
@@ -3541,6 +3542,8 @@ static void ata_scsi_remove_dev(struct ata_device *dev)
        mutex_lock(&ap->scsi_host->scan_mutex);
        spin_lock_irqsave(ap->lock, flags);
+        ata_acpi_unbind(dev);
        /* clearing dev->sdev is protected by host lock */
        sdev = dev->sdev;
        dev->sdev = NULL;
diff --git a/drivers/ata/libata-transport.c b/drivers/ata/libata-transport.c
index c34190485377..c04d393d20c1 100644
--- a/drivers/ata/libata-transport.c
+++ b/drivers/ata/libata-transport.c
@@ -232,7 +232,7 @@ static void ata_tport_release(struct device *dev)
 * Returns:
 *      %1 if the device represents a ATA Port, %0 else
 */
-int ata_is_port(const struct device *dev)
+static int ata_is_port(const struct device *dev)
 {
        return dev->release == ata_tport_release;
 }
@@ -355,7 +355,7 @@ static void ata_tlink_release(struct device *dev)
 * Returns:
 *      %1 if the device represents a ATA link, %0 else
 */
-int ata_is_link(const struct device *dev)
+static int ata_is_link(const struct device *dev)
 {
        return dev->release == ata_tlink_release;
 }
@@ -572,7 +572,7 @@ static void ata_tdev_release(struct device *dev)
 * Returns:
 *      %1 if the device represents a ATA device, %0 else
 */
-int ata_is_ata_dev(const struct device *dev)
+static int ata_is_ata_dev(const struct device *dev)
 {
        return dev->release == ata_tdev_release;
 }
diff --git a/drivers/ata/libata.h b/drivers/ata/libata.h
index 9d0fd0b71852..50e4dff0604e 100644
--- a/drivers/ata/libata.h
+++ b/drivers/ata/libata.h
@@ -107,21 +107,22 @@ extern const char *sata_spd_string(unsigned int spd);
 extern int ata_port_probe(struct ata_port *ap);
 extern void __ata_port_probe(struct ata_port *ap);
+#define to_ata_port(d) container_of(d, struct ata_port, tdev)
 /* libata-acpi.c */
 #ifdef CONFIG_ATA_ACPI
 extern unsigned int ata_acpi_gtf_filter;
-extern void ata_acpi_associate_sata_port(struct ata_port *ap);
-extern void ata_acpi_associate(struct ata_host *host);
 extern void ata_acpi_dissociate(struct ata_host *host);
 extern int ata_acpi_on_suspend(struct ata_port *ap);
 extern void ata_acpi_on_resume(struct ata_port *ap);
 extern int ata_acpi_on_devcfg(struct ata_device *dev);
 extern void ata_acpi_on_disable(struct ata_device *dev);
 extern void ata_acpi_set_state(struct ata_port *ap, pm_message_t state);
+extern int ata_acpi_register(void);
+extern void ata_acpi_unregister(void);
+extern void ata_acpi_bind(struct ata_device *dev);
+extern void ata_acpi_unbind(struct ata_device *dev);
 #else
-static inline void ata_acpi_associate_sata_port(struct ata_port *ap) { }
-static inline void ata_acpi_associate(struct ata_host *host) { }
 static inline void ata_acpi_dissociate(struct ata_host *host) { }
 static inline int ata_acpi_on_suspend(struct ata_port *ap) { return 0; }
 static inline void ata_acpi_on_resume(struct ata_port *ap) { }
@@ -129,6 +130,10 @@ static inline int ata_acpi_on_devcfg(struct ata_device *dev) { return 0; }
 static inline void ata_acpi_on_disable(struct ata_device *dev) { }
 static inline void ata_acpi_set_state(struct ata_port *ap,
                                      pm_message_t state) { }
+static inline int ata_acpi_register(void) { return 0; }
+static inline void ata_acpi_unregister(void) { }
+static inline void ata_acpi_bind(struct ata_device *dev) { }
+static inline void ata_acpi_unbind(struct ata_device *dev) { }
 #endif
 /* libata-scsi.c */
diff --git a/drivers/ata/pata_acpi.c b/drivers/ata/pata_acpi.c
index 54145edf50e8..09723b76beac 100644
--- a/drivers/ata/pata_acpi.c
+++ b/drivers/ata/pata_acpi.c
@@ -39,7 +39,7 @@ static int pacpi_pre_reset(struct ata_link *link, unsigned long deadline)
 {
        struct ata_port *ap = link->ap;
        struct pata_acpi *acpi = ap->private_data;
-        if (ap->acpi_handle == NULL || ata_acpi_gtm(ap, &acpi->gtm) < 0)
+        if (ata_ap_acpi_handle(ap) == NULL || ata_acpi_gtm(ap, &acpi->gtm) < 0)
                return -ENODEV;
        return ata_sff_prereset(link, deadline);
@@ -195,7 +195,7 @@ static int pacpi_port_start(struct ata_port *ap)
        struct pci_dev *pdev = to_pci_dev(ap->host->dev);
        struct pata_acpi *acpi;
-        if (ap->acpi_handle == NULL)
+        if (ata_ap_acpi_handle(ap) == NULL)
                return -ENODEV;
        acpi = ap->private_data = devm_kzalloc(&pdev->dev, sizeof(struct pata_acpi), GFP_KERNEL);
@@ -273,22 +273,10 @@ static struct pci_driver pacpi_pci_driver = {
 #endif
 };
-static int __init pacpi_init(void)
+module_pci_driver(pacpi_pci_driver);
-{
-        return pci_register_driver(&pacpi_pci_driver);
-}
-static void __exit pacpi_exit(void)
-{
-        pci_unregister_driver(&pacpi_pci_driver);
-}
-module_init(pacpi_init);
-module_exit(pacpi_exit);
 MODULE_AUTHOR("Alan Cox");
 MODULE_DESCRIPTION("SCSI low-level driver for ATA in ACPI mode");
 MODULE_LICENSE("GPL");
 MODULE_DEVICE_TABLE(pci, pacpi_pci_tbl);
 MODULE_VERSION(DRV_VERSION);
diff --git a/drivers/ata/pata_amd.c b/drivers/ata/pata_amd.c
index dc6b5dae0463..82a08922afcd 100644
--- a/drivers/ata/pata_amd.c
+++ b/drivers/ata/pata_amd.c
@@ -632,21 +632,10 @@ static struct pci_driver amd_pci_driver = {
 #endif
 };
-static int __init amd_init(void)
+module_pci_driver(amd_pci_driver);
-{
-        return pci_register_driver(&amd_pci_driver);
-}
-static void __exit amd_exit(void)
-{
-        pci_unregister_driver(&amd_pci_driver);
-}
 MODULE_AUTHOR("Alan Cox");
 MODULE_DESCRIPTION("low-level driver for AMD and Nvidia PATA IDE");
 MODULE_LICENSE("GPL");
 MODULE_DEVICE_TABLE(pci, amd);
 MODULE_VERSION(DRV_VERSION);
-module_init(amd_init);
-module_exit(amd_exit);
diff --git a/drivers/ata/pata_arasan_cf.c b/drivers/ata/pata_arasan_cf.c
index 3239517f4d90..bfaa5cb1629a 100644
--- a/drivers/ata/pata_arasan_cf.c
+++ b/drivers/ata/pata_arasan_cf.c
@@ -4,7 +4,7 @@
 * Arasan Compact Flash host controller source file
 *
 * Copyright (C) 2011 ST Microelectronics
- * Viresh Kumar <viresh.kumar@st.com>
+ * Viresh Kumar <viresh.linux@gmail.com>
 *
 * This file is licensed under the terms of the GNU General Public
 * License version 2. This program is licensed "as is" without any
@@ -184,10 +184,8 @@
 struct arasan_cf_dev {
        /* pointer to ata_host structure */
        struct ata_host *host;
-        /* clk structure, only if HAVE_CLK is defined */
+        /* clk structure */
-#ifdef CONFIG_HAVE_CLK
        struct clk *clk;
-#endif
        /* physical base address of controller */
        dma_addr_t pbase;
@@ -312,13 +310,11 @@ static int cf_init(struct arasan_cf_dev *acdev)
        unsigned long flags;
        int ret = 0;
-#ifdef CONFIG_HAVE_CLK
        ret = clk_enable(acdev->clk);
        if (ret) {
                dev_dbg(acdev->host->dev, "clock enable failed");
                return ret;
        }
-#endif
        spin_lock_irqsave(&acdev->host->lock, flags);
        /* configure CF interface clock */
@@ -344,9 +340,7 @@ static void cf_exit(struct arasan_cf_dev *acdev)
        writel(readl(acdev->vbase + OP_MODE) & ~CFHOST_ENB,
                        acdev->vbase + OP_MODE);
        spin_unlock_irqrestore(&acdev->host->lock, flags);
-#ifdef CONFIG_HAVE_CLK
        clk_disable(acdev->clk);
-#endif
 }
 static void dma_callback(void *dev)
@@ -828,13 +822,11 @@ static int __devinit arasan_cf_probe(struct platform_device *pdev)
                return -ENOMEM;
        }
-#ifdef CONFIG_HAVE_CLK
        acdev->clk = clk_get(&pdev->dev, NULL);
        if (IS_ERR(acdev->clk)) {
                dev_warn(&pdev->dev, "Clock not found\n");
                return PTR_ERR(acdev->clk);
        }
-#endif
        /* allocate host */
        host = ata_host_alloc(&pdev->dev, 1);
@@ -899,9 +891,7 @@ static int __devinit arasan_cf_probe(struct platform_device *pdev)
                        &arasan_cf_sht);
 free_clk:
-#ifdef CONFIG_HAVE_CLK
        clk_put(acdev->clk);
-#endif
        return ret;
 }
@@ -912,9 +902,7 @@ static int __devexit arasan_cf_remove(struct platform_device *pdev)
        ata_host_detach(host);
        cf_exit(acdev);
-#ifdef CONFIG_HAVE_CLK
        clk_put(acdev->clk);
-#endif
        return 0;
 }
@@ -959,7 +947,7 @@ static struct platform_driver arasan_cf_driver = {
 module_platform_driver(arasan_cf_driver);
-MODULE_AUTHOR("Viresh Kumar <viresh.kumar@st.com>");
+MODULE_AUTHOR("Viresh Kumar <viresh.linux@gmail.com>");
 MODULE_DESCRIPTION("Arasan ATA Compact Flash driver");
 MODULE_LICENSE("GPL");
 MODULE_ALIAS("platform:" DRIVER_NAME);
diff --git a/drivers/ata/pata_artop.c b/drivers/ata/pata_artop.c
index 4b8b22efc00b..74b215c09b21 100644
--- a/drivers/ata/pata_artop.c
+++ b/drivers/ata/pata_artop.c
@@ -451,18 +451,7 @@ static struct pci_driver artop_pci_driver = {
 #endif
 };
-static int __init artop_init(void)
+module_pci_driver(artop_pci_driver);
-{
-        return pci_register_driver(&artop_pci_driver);
-}
-static void __exit artop_exit(void)
-{
-        pci_unregister_driver(&artop_pci_driver);
-}
-module_init(artop_init);
-module_exit(artop_exit);
 MODULE_AUTHOR("Alan Cox, Bartlomiej Zolnierkiewicz");
 MODULE_DESCRIPTION("SCSI low-level driver for ARTOP PATA");
diff --git a/drivers/ata/pata_atiixp.c b/drivers/ata/pata_atiixp.c
index be1aa1486d39..24e51056ac26 100644
--- a/drivers/ata/pata_atiixp.c
+++ b/drivers/ata/pata_atiixp.c
@@ -20,6 +20,7 @@
 #include <linux/delay.h>
 #include <scsi/scsi_host.h>
 #include <linux/libata.h>
+#include <linux/dmi.h>
 #define DRV_NAME "pata_atiixp"
 #define DRV_VERSION "0.4.6"
@@ -33,11 +34,26 @@ enum {
        ATIIXP_IDE_UDMA_MODE    = 0x56
 };
+static const struct dmi_system_id attixp_cable_override_dmi_table[] = {
+        {
+                /* Board has onboard PATA<->SATA converters */
+                .ident = "MSI E350DM-E33",
+                .matches = {
+                        DMI_MATCH(DMI_BOARD_VENDOR, "MSI"),
+                        DMI_MATCH(DMI_BOARD_NAME, "E350DM-E33(MS-7720)"),
+                },
+        },
+        { }
+};
 static int atiixp_cable_detect(struct ata_port *ap)
 {
        struct pci_dev *pdev = to_pci_dev(ap->host->dev);
        u8 udma;
+        if (dmi_check_system(attixp_cable_override_dmi_table))
+                return ATA_CBL_PATA40_SHORT;
        /* Hack from drivers/ide/pci. Really we want to know how to do the
           raw detection not play follow the bios mode guess */
        pci_read_config_byte(pdev, ATIIXP_IDE_UDMA_MODE + ap->port_no, &udma);
@@ -289,22 +305,10 @@ static struct pci_driver atiixp_pci_driver = {
 #endif
 };
-static int __init atiixp_init(void)
+module_pci_driver(atiixp_pci_driver);
-{
-        return pci_register_driver(&atiixp_pci_driver);
-}
-static void __exit atiixp_exit(void)
-{
-        pci_unregister_driver(&atiixp_pci_driver);
-}
 MODULE_AUTHOR("Alan Cox");
 MODULE_DESCRIPTION("low-level driver for ATI IXP200/300/400");
 MODULE_LICENSE("GPL");
 MODULE_DEVICE_TABLE(pci, atiixp);
 MODULE_VERSION(DRV_VERSION);
-module_init(atiixp_init);
-module_exit(atiixp_exit);
diff --git a/drivers/ata/pata_atp867x.c b/drivers/ata/pata_atp867x.c
index 3cfabb262af2..041f50d53240 100644
--- a/drivers/ata/pata_atp867x.c
+++ b/drivers/ata/pata_atp867x.c
@@ -565,21 +565,10 @@ static struct pci_driver atp867x_driver = {
 #endif
 };
-static int __init atp867x_init(void)
+module_pci_driver(atp867x_driver);
-{
-        return pci_register_driver(&atp867x_driver);
-}
-static void __exit atp867x_exit(void)
-{
-        pci_unregister_driver(&atp867x_driver);
-}
 MODULE_AUTHOR("John(Jung-Ik) Lee, Google Inc.");
 MODULE_DESCRIPTION("low level driver for Artop/Acard 867x ATA controller");
 MODULE_LICENSE("GPL");
 MODULE_DEVICE_TABLE(pci, atp867x_pci_tbl);
 MODULE_VERSION(DRV_VERSION);
-module_init(atp867x_init);
-module_exit(atp867x_exit);
diff --git a/drivers/ata/pata_cmd640.c b/drivers/ata/pata_cmd640.c
index 549d28dbf90d..504b98b58e19 100644
--- a/drivers/ata/pata_cmd640.c
+++ b/drivers/ata/pata_cmd640.c
@@ -263,21 +263,10 @@ static struct pci_driver cmd640_pci_driver = {
 #endif
 };
-static int __init cmd640_init(void)
+module_pci_driver(cmd640_pci_driver);
-{
-        return pci_register_driver(&cmd640_pci_driver);
-}
-static void __exit cmd640_exit(void)
-{
-        pci_unregister_driver(&cmd640_pci_driver);
-}
 MODULE_AUTHOR("Alan Cox");
 MODULE_DESCRIPTION("low-level driver for CMD640 PATA controllers");
 MODULE_LICENSE("GPL");
 MODULE_DEVICE_TABLE(pci, cmd640);
 MODULE_VERSION(DRV_VERSION);
-module_init(cmd640_init);
-module_exit(cmd640_exit);
diff --git a/drivers/ata/pata_cmd64x.c b/drivers/ata/pata_cmd64x.c
index 1c17cd1e8b2d..7ba01415b676 100644
--- a/drivers/ata/pata_cmd64x.c
+++ b/drivers/ata/pata_cmd64x.c
@@ -423,7 +423,7 @@ static int cmd64x_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
                        .port_ops = &cmd648_port_ops
                }
        };
-        const struct ata_port_info *ppi[] = { 
+        const struct ata_port_info *ppi[] = {
                &cmd_info[id->driver_data],
                &cmd_info[id->driver_data],
                NULL
@@ -478,7 +478,7 @@ static int cmd64x_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
        if (port_ok && cntrl_ch0_ok && !(reg & CNTRL_CH0)) {
                dev_printk(KERN_NOTICE, &pdev->dev, "Primary port is disabled\n");
                ppi[0] = &ata_dummy_port_info;
-                
        }
        if (port_ok && !(reg & CNTRL_CH1)) {
                dev_printk(KERN_NOTICE, &pdev->dev, "Secondary port is disabled\n");
@@ -525,21 +525,10 @@ static struct pci_driver cmd64x_pci_driver = {
 #endif
 };
-static int __init cmd64x_init(void)
+module_pci_driver(cmd64x_pci_driver);
-{
-        return pci_register_driver(&cmd64x_pci_driver);
-}
-static void __exit cmd64x_exit(void)
-{
-        pci_unregister_driver(&cmd64x_pci_driver);
-}
 MODULE_AUTHOR("Alan Cox");
 MODULE_DESCRIPTION("low-level driver for CMD64x series PATA controllers");
 MODULE_LICENSE("GPL");
 MODULE_DEVICE_TABLE(pci, cmd64x);
 MODULE_VERSION(DRV_VERSION);
-module_init(cmd64x_init);
-module_exit(cmd64x_exit);
diff --git a/drivers/ata/pata_cs5520.c b/drivers/ata/pata_cs5520.c
index 9ddcddc66a20..de74d804f031 100644
--- a/drivers/ata/pata_cs5520.c
+++ b/drivers/ata/pata_cs5520.c
@@ -302,22 +302,10 @@ static struct pci_driver cs5520_pci_driver = {
 #endif
 };
-static int __init cs5520_init(void)
+module_pci_driver(cs5520_pci_driver);
-{
-        return pci_register_driver(&cs5520_pci_driver);
-}
-static void __exit cs5520_exit(void)
-{
-        pci_unregister_driver(&cs5520_pci_driver);
-}
 MODULE_AUTHOR("Alan Cox");
 MODULE_DESCRIPTION("low-level driver for Cyrix CS5510/5520");
 MODULE_LICENSE("GPL");
 MODULE_DEVICE_TABLE(pci, pata_cs5520);
 MODULE_VERSION(DRV_VERSION);
-module_init(cs5520_init);
-module_exit(cs5520_exit);
diff --git a/drivers/ata/pata_cs5530.c b/drivers/ata/pata_cs5530.c
index f792330f0d8e..48389ae0b330 100644
--- a/drivers/ata/pata_cs5530.c
+++ b/drivers/ata/pata_cs5530.c
@@ -363,21 +363,10 @@ static struct pci_driver cs5530_pci_driver = {
 #endif
 };
-static int __init cs5530_init(void)
+module_pci_driver(cs5530_pci_driver);
-{
-        return pci_register_driver(&cs5530_pci_driver);
-}
-static void __exit cs5530_exit(void)
-{
-        pci_unregister_driver(&cs5530_pci_driver);
-}
 MODULE_AUTHOR("Alan Cox");
 MODULE_DESCRIPTION("low-level driver for the Cyrix/NS/AMD 5530");
 MODULE_LICENSE("GPL");
 MODULE_DEVICE_TABLE(pci, cs5530);
 MODULE_VERSION(DRV_VERSION);
-module_init(cs5530_init);
-module_exit(cs5530_exit);
diff --git a/drivers/ata/pata_cs5535.c b/drivers/ata/pata_cs5535.c
index a0b4640125ae..997e16a3a63f 100644
--- a/drivers/ata/pata_cs5535.c
+++ b/drivers/ata/pata_cs5535.c
@@ -207,21 +207,10 @@ static struct pci_driver cs5535_pci_driver = {
 #endif
 };
-static int __init cs5535_init(void)
+module_pci_driver(cs5535_pci_driver);
-{
-        return pci_register_driver(&cs5535_pci_driver);
-}
-static void __exit cs5535_exit(void)
-{
-        pci_unregister_driver(&cs5535_pci_driver);
-}
 MODULE_AUTHOR("Alan Cox, Jens Altmann, Wolfgan Zuleger, Alexander Kiausch");
 MODULE_DESCRIPTION("low-level driver for the NS/AMD 5535");
 MODULE_LICENSE("GPL");
 MODULE_DEVICE_TABLE(pci, cs5535);
 MODULE_VERSION(DRV_VERSION);
-module_init(cs5535_init);
-module_exit(cs5535_exit);
diff --git a/drivers/ata/pata_cs5536.c b/drivers/ata/pata_cs5536.c
index 7a402c75ab90..dec1b6c4b351 100644
--- a/drivers/ata/pata_cs5536.c
+++ b/drivers/ata/pata_cs5536.c
@@ -274,21 +274,10 @@ static struct pci_driver cs5536_pci_driver = {
 #endif
 };
-static int __init cs5536_init(void)
+module_pci_driver(cs5536_pci_driver);
-{
-        return pci_register_driver(&cs5536_pci_driver);
-}
-static void __exit cs5536_exit(void)
-{
-        pci_unregister_driver(&cs5536_pci_driver);
-}
 MODULE_AUTHOR("Martin K. Petersen");
 MODULE_DESCRIPTION("low-level driver for the CS5536 IDE controller");
 MODULE_LICENSE("GPL");
 MODULE_DEVICE_TABLE(pci, cs5536);
 MODULE_VERSION(DRV_VERSION);
-module_init(cs5536_init);
-module_exit(cs5536_exit);
diff --git a/drivers/ata/pata_cypress.c b/drivers/ata/pata_cypress.c
index 6d915b063d93..810bc9964dde 100644
--- a/drivers/ata/pata_cypress.c
+++ b/drivers/ata/pata_cypress.c
@@ -158,23 +158,10 @@ static struct pci_driver cy82c693_pci_driver = {
 #endif
 };
-static int __init cy82c693_init(void)
+module_pci_driver(cy82c693_pci_driver);
-{
-        return pci_register_driver(&cy82c693_pci_driver);
-}
-static void __exit cy82c693_exit(void)
-{
-        pci_unregister_driver(&cy82c693_pci_driver);
-}
 MODULE_AUTHOR("Alan Cox");
 MODULE_DESCRIPTION("low-level driver for the CY82C693 PATA controller");
 MODULE_LICENSE("GPL");
 MODULE_DEVICE_TABLE(pci, cy82c693);
 MODULE_VERSION(DRV_VERSION);
-module_init(cy82c693_init);
-module_exit(cy82c693_exit);
diff --git a/drivers/ata/pata_efar.c b/drivers/ata/pata_efar.c
index f0243ed206f7..3c12fd7acd41 100644
--- a/drivers/ata/pata_efar.c
+++ b/drivers/ata/pata_efar.c
@@ -295,22 +295,10 @@ static struct pci_driver efar_pci_driver = {
 #endif
 };
-static int __init efar_init(void)
+module_pci_driver(efar_pci_driver);
-{
-        return pci_register_driver(&efar_pci_driver);
-}
-static void __exit efar_exit(void)
-{
-        pci_unregister_driver(&efar_pci_driver);
-}
-module_init(efar_init);
-module_exit(efar_exit);
 MODULE_AUTHOR("Alan Cox");
 MODULE_DESCRIPTION("SCSI low-level driver for EFAR PIIX clones");
 MODULE_LICENSE("GPL");
 MODULE_DEVICE_TABLE(pci, efar_pci_tbl);
 MODULE_VERSION(DRV_VERSION);
diff --git a/drivers/ata/pata_hpt366.c b/drivers/ata/pata_hpt366.c
index 42cffd38910d..4be884a9f5ed 100644
--- a/drivers/ata/pata_hpt366.c
+++ b/drivers/ata/pata_hpt366.c
@@ -418,21 +418,10 @@ static struct pci_driver hpt36x_pci_driver = {
 #endif
 };
-static int __init hpt36x_init(void)
+module_pci_driver(hpt36x_pci_driver);
-{
-        return pci_register_driver(&hpt36x_pci_driver);
-}
-static void __exit hpt36x_exit(void)
-{
-        pci_unregister_driver(&hpt36x_pci_driver);
-}
 MODULE_AUTHOR("Alan Cox");
 MODULE_DESCRIPTION("low-level driver for the Highpoint HPT366/368");
 MODULE_LICENSE("GPL");
 MODULE_DEVICE_TABLE(pci, hpt36x);
 MODULE_VERSION(DRV_VERSION);
-module_init(hpt36x_init);
-module_exit(hpt36x_exit);
diff --git a/drivers/ata/pata_hpt37x.c b/drivers/ata/pata_hpt37x.c
index 9620636aa405..a9d74eff5fc4 100644
--- a/drivers/ata/pata_hpt37x.c
+++ b/drivers/ata/pata_hpt37x.c
@@ -1058,21 +1058,10 @@ static struct pci_driver hpt37x_pci_driver = {
        .remove         = ata_pci_remove_one
 };
-static int __init hpt37x_init(void)
+module_pci_driver(hpt37x_pci_driver);
-{
-        return pci_register_driver(&hpt37x_pci_driver);
-}
-static void __exit hpt37x_exit(void)
-{
-        pci_unregister_driver(&hpt37x_pci_driver);
-}
 MODULE_AUTHOR("Alan Cox");
 MODULE_DESCRIPTION("low-level driver for the Highpoint HPT37x/30x");
 MODULE_LICENSE("GPL");
 MODULE_DEVICE_TABLE(pci, hpt37x);
 MODULE_VERSION(DRV_VERSION);
-module_init(hpt37x_init);
-module_exit(hpt37x_exit);
diff --git a/drivers/ata/pata_hpt3x2n.c b/drivers/ata/pata_hpt3x2n.c
index 765f136d8cd3..4be0398c153d 100644
--- a/drivers/ata/pata_hpt3x2n.c
+++ b/drivers/ata/pata_hpt3x2n.c
@@ -621,21 +621,10 @@ static struct pci_driver hpt3x2n_pci_driver = {
        .remove         = ata_pci_remove_one
 };
-static int __init hpt3x2n_init(void)
+module_pci_driver(hpt3x2n_pci_driver);
-{
-        return pci_register_driver(&hpt3x2n_pci_driver);
-}
-static void __exit hpt3x2n_exit(void)
-{
-        pci_unregister_driver(&hpt3x2n_pci_driver);
-}
 MODULE_AUTHOR("Alan Cox");
 MODULE_DESCRIPTION("low-level driver for the Highpoint HPT3xxN");
 MODULE_LICENSE("GPL");
 MODULE_DEVICE_TABLE(pci, hpt3x2n);
 MODULE_VERSION(DRV_VERSION);
-module_init(hpt3x2n_init);
-module_exit(hpt3x2n_exit);
diff --git a/drivers/ata/pata_hpt3x3.c b/drivers/ata/pata_hpt3x3.c
index b3042dab08bb..76c9314bb824 100644
--- a/drivers/ata/pata_hpt3x3.c
+++ b/drivers/ata/pata_hpt3x3.c
@@ -284,23 +284,10 @@ static struct pci_driver hpt3x3_pci_driver = {
 #endif
 };
-static int __init hpt3x3_init(void)
+module_pci_driver(hpt3x3_pci_driver);
-{
-        return pci_register_driver(&hpt3x3_pci_driver);
-}
-static void __exit hpt3x3_exit(void)
-{
-        pci_unregister_driver(&hpt3x3_pci_driver);
-}
 MODULE_AUTHOR("Alan Cox");
 MODULE_DESCRIPTION("low-level driver for the Highpoint HPT343/363");
 MODULE_LICENSE("GPL");
 MODULE_DEVICE_TABLE(pci, hpt3x3);
 MODULE_VERSION(DRV_VERSION);
-module_init(hpt3x3_init);
-module_exit(hpt3x3_exit);
diff --git a/drivers/ata/pata_imx.c b/drivers/ata/pata_imx.c
index c5af97f5107b..87bb05b3cafc 100644
--- a/drivers/ata/pata_imx.c
+++ b/drivers/ata/pata_imx.c
@@ -118,7 +118,7 @@ static int __devinit pata_imx_probe(struct platform_device *pdev)
                return PTR_ERR(priv->clk);
        }
-        clk_enable(priv->clk);
+        clk_prepare_enable(priv->clk);
        host = ata_host_alloc(&pdev->dev, 1);
        if (!host)
@@ -162,7 +162,7 @@ static int __devinit pata_imx_probe(struct platform_device *pdev)
                                &pata_imx_sht);
 free_priv:
-        clk_disable(priv->clk);
+        clk_disable_unprepare(priv->clk);
        clk_put(priv->clk);
        return -ENOMEM;
 }
@@ -176,7 +176,7 @@ static int __devexit pata_imx_remove(struct platform_device *pdev)
        __raw_writel(0, priv->host_regs + PATA_IMX_ATA_INT_EN);
-        clk_disable(priv->clk);
+        clk_disable_unprepare(priv->clk);
        clk_put(priv->clk);
        return 0;
@@ -194,7 +194,7 @@ static int pata_imx_suspend(struct device *dev)
                __raw_writel(0, priv->host_regs + PATA_IMX_ATA_INT_EN);
                priv->ata_ctl =
                        __raw_readl(priv->host_regs + PATA_IMX_ATA_CONTROL);
-                clk_disable(priv->clk);
+                clk_disable_unprepare(priv->clk);
        }
        return ret;
@@ -205,7 +205,7 @@ static int pata_imx_resume(struct device *dev)
        struct ata_host *host = dev_get_drvdata(dev);
        struct pata_imx_priv *priv = host->private_data;
-        clk_enable(priv->clk);
+        clk_prepare_enable(priv->clk);
        __raw_writel(priv->ata_ctl, priv->host_regs + PATA_IMX_ATA_CONTROL);
diff --git a/drivers/ata/pata_it8213.c b/drivers/ata/pata_it8213.c
index cf9164d79f11..2a8dd9527ecc 100644
--- a/drivers/ata/pata_it8213.c
+++ b/drivers/ata/pata_it8213.c
@@ -290,18 +290,7 @@ static struct pci_driver it8213_pci_driver = {
 #endif
 };
-static int __init it8213_init(void)
+module_pci_driver(it8213_pci_driver);
-{
-        return pci_register_driver(&it8213_pci_driver);
-}
-static void __exit it8213_exit(void)
-{
-        pci_unregister_driver(&it8213_pci_driver);
-}
-module_init(it8213_init);
-module_exit(it8213_exit);
 MODULE_AUTHOR("Alan Cox");
 MODULE_DESCRIPTION("SCSI low-level driver for the ITE 8213");
diff --git a/drivers/ata/pata_it821x.c b/drivers/ata/pata_it821x.c
index 62c5d00abd2e..9cc05d808ad5 100644
--- a/drivers/ata/pata_it821x.c
+++ b/drivers/ata/pata_it821x.c
@@ -972,15 +972,7 @@ static struct pci_driver it821x_pci_driver = {
 #endif
 };
-static int __init it821x_init(void)
+module_pci_driver(it821x_pci_driver);
-{
-        return pci_register_driver(&it821x_pci_driver);
-}
-static void __exit it821x_exit(void)
-{
-        pci_unregister_driver(&it821x_pci_driver);
-}
 MODULE_AUTHOR("Alan Cox");
 MODULE_DESCRIPTION("low-level driver for the IT8211/IT8212 IDE RAID controller");
@@ -988,9 +980,5 @@ MODULE_LICENSE("GPL");
 MODULE_DEVICE_TABLE(pci, it821x);
 MODULE_VERSION(DRV_VERSION);
 module_param_named(noraid, it8212_noraid, int, S_IRUGO);
 MODULE_PARM_DESC(noraid, "Force card into bypass mode");
-module_init(it821x_init);
-module_exit(it821x_exit);
diff --git a/drivers/ata/pata_jmicron.c b/drivers/ata/pata_jmicron.c
index cb3babbb7035..76e739b031b6 100644
--- a/drivers/ata/pata_jmicron.c
+++ b/drivers/ata/pata_jmicron.c
@@ -164,18 +164,7 @@ static struct pci_driver jmicron_pci_driver = {
 #endif
 };
-static int __init jmicron_init(void)
+module_pci_driver(jmicron_pci_driver);
-{
-        return pci_register_driver(&jmicron_pci_driver);
-}
-static void __exit jmicron_exit(void)
-{
-        pci_unregister_driver(&jmicron_pci_driver);
-}
-module_init(jmicron_init);
-module_exit(jmicron_exit);
 MODULE_AUTHOR("Alan Cox");
 MODULE_DESCRIPTION("SCSI low-level driver for Jmicron PATA ports");
diff --git a/drivers/ata/pata_marvell.c b/drivers/ata/pata_marvell.c
index 5d7f58a7e34d..a4f5e781c8c2 100644
--- a/drivers/ata/pata_marvell.c
+++ b/drivers/ata/pata_marvell.c
@@ -178,22 +178,10 @@ static struct pci_driver marvell_pci_driver = {
 #endif
 };
-static int __init marvell_init(void)
+module_pci_driver(marvell_pci_driver);
-{
-        return pci_register_driver(&marvell_pci_driver);
-}
-static void __exit marvell_exit(void)
-{
-        pci_unregister_driver(&marvell_pci_driver);
-}
-module_init(marvell_init);
-module_exit(marvell_exit);
 MODULE_AUTHOR("Alan Cox");
 MODULE_DESCRIPTION("SCSI low-level driver for Marvell ATA in legacy mode");
 MODULE_LICENSE("GPL");
 MODULE_DEVICE_TABLE(pci, marvell_pci_tbl);
 MODULE_VERSION(DRV_VERSION);
diff --git a/drivers/ata/pata_mpiix.c b/drivers/ata/pata_mpiix.c
index 9dc16df84191..1f5f28bb0bb8 100644
--- a/drivers/ata/pata_mpiix.c
+++ b/drivers/ata/pata_mpiix.c
@@ -230,21 +230,10 @@ static struct pci_driver mpiix_pci_driver = {
 #endif
 };
-static int __init mpiix_init(void)
+module_pci_driver(mpiix_pci_driver);
-{
-        return pci_register_driver(&mpiix_pci_driver);
-}
-static void __exit mpiix_exit(void)
-{
-        pci_unregister_driver(&mpiix_pci_driver);
-}
 MODULE_AUTHOR("Alan Cox");
 MODULE_DESCRIPTION("low-level driver for Intel MPIIX");
 MODULE_LICENSE("GPL");
 MODULE_DEVICE_TABLE(pci, mpiix);
 MODULE_VERSION(DRV_VERSION);
-module_init(mpiix_init);
-module_exit(mpiix_exit);
diff --git a/drivers/ata/pata_netcell.c b/drivers/ata/pata_netcell.c
index 9979a43bc596..ad1a0febd620 100644
--- a/drivers/ata/pata_netcell.c
+++ b/drivers/ata/pata_netcell.c
@@ -99,22 +99,10 @@ static struct pci_driver netcell_pci_driver = {
 #endif
 };
-static int __init netcell_init(void)
+module_pci_driver(netcell_pci_driver);
-{
-        return pci_register_driver(&netcell_pci_driver);
-}
-static void __exit netcell_exit(void)
-{
-        pci_unregister_driver(&netcell_pci_driver);
-}
-module_init(netcell_init);
-module_exit(netcell_exit);
 MODULE_AUTHOR("Alan Cox");
 MODULE_DESCRIPTION("SCSI low-level driver for Netcell PATA RAID");
 MODULE_LICENSE("GPL");
 MODULE_DEVICE_TABLE(pci, netcell_pci_tbl);
 MODULE_VERSION(DRV_VERSION);
diff --git a/drivers/ata/pata_ninja32.c b/drivers/ata/pata_ninja32.c
index e277a142138c..12010ed596c4 100644
--- a/drivers/ata/pata_ninja32.c
+++ b/drivers/ata/pata_ninja32.c
@@ -190,21 +190,10 @@ static struct pci_driver ninja32_pci_driver = {
 #endif
 };
-static int __init ninja32_init(void)
+module_pci_driver(ninja32_pci_driver);
-{
-        return pci_register_driver(&ninja32_pci_driver);
-}
-static void __exit ninja32_exit(void)
-{
-        pci_unregister_driver(&ninja32_pci_driver);
-}
 MODULE_AUTHOR("Alan Cox");
 MODULE_DESCRIPTION("low-level driver for Ninja32 ATA");
 MODULE_LICENSE("GPL");
 MODULE_DEVICE_TABLE(pci, ninja32);
 MODULE_VERSION(DRV_VERSION);
-module_init(ninja32_init);
-module_exit(ninja32_exit);
diff --git a/drivers/ata/pata_ns87410.c b/drivers/ata/pata_ns87410.c
index 31d5986537a3..0c424dae56e7 100644
--- a/drivers/ata/pata_ns87410.c
+++ b/drivers/ata/pata_ns87410.c
@@ -168,21 +168,10 @@ static struct pci_driver ns87410_pci_driver = {
 #endif
 };
-static int __init ns87410_init(void)
+module_pci_driver(ns87410_pci_driver);
-{
-        return pci_register_driver(&ns87410_pci_driver);
-}
-static void __exit ns87410_exit(void)
-{
-        pci_unregister_driver(&ns87410_pci_driver);
-}
 MODULE_AUTHOR("Alan Cox");
 MODULE_DESCRIPTION("low-level driver for Nat Semi 87410");
 MODULE_LICENSE("GPL");
 MODULE_DEVICE_TABLE(pci, ns87410);
 MODULE_VERSION(DRV_VERSION);
-module_init(ns87410_init);
-module_exit(ns87410_exit);
diff --git a/drivers/ata/pata_ns87415.c b/drivers/ata/pata_ns87415.c
index f1d517bc5b49..6f6fa1060505 100644
--- a/drivers/ata/pata_ns87415.c
+++ b/drivers/ata/pata_ns87415.c
@@ -414,18 +414,7 @@ static struct pci_driver ns87415_pci_driver = {
 #endif
 };
-static int __init ns87415_init(void)
+module_pci_driver(ns87415_pci_driver);
-{
-        return pci_register_driver(&ns87415_pci_driver);
-}
-static void __exit ns87415_exit(void)
-{
-        pci_unregister_driver(&ns87415_pci_driver);
-}
-module_init(ns87415_init);
-module_exit(ns87415_exit);
 MODULE_AUTHOR("Alan Cox");
 MODULE_DESCRIPTION("ATA low-level driver for NS87415 controllers");
diff --git a/drivers/ata/pata_oldpiix.c b/drivers/ata/pata_oldpiix.c
index 98cdf50e4065..d77b2e1054ef 100644
--- a/drivers/ata/pata_oldpiix.c
+++ b/drivers/ata/pata_oldpiix.c
@@ -265,22 +265,10 @@ static struct pci_driver oldpiix_pci_driver = {
 #endif
 };
-static int __init oldpiix_init(void)
+module_pci_driver(oldpiix_pci_driver);
-{
-        return pci_register_driver(&oldpiix_pci_driver);
-}
-static void __exit oldpiix_exit(void)
-{
-        pci_unregister_driver(&oldpiix_pci_driver);
-}
-module_init(oldpiix_init);
-module_exit(oldpiix_exit);
 MODULE_AUTHOR("Alan Cox");
 MODULE_DESCRIPTION("SCSI low-level driver for early PIIX series controllers");
 MODULE_LICENSE("GPL");
 MODULE_DEVICE_TABLE(pci, oldpiix_pci_tbl);
 MODULE_VERSION(DRV_VERSION);
diff --git a/drivers/ata/pata_opti.c b/drivers/ata/pata_opti.c
index accc033faf77..4ea70cd22aee 100644
--- a/drivers/ata/pata_opti.c
+++ b/drivers/ata/pata_opti.c
@@ -191,22 +191,10 @@ static struct pci_driver opti_pci_driver = {
 #endif
 };
-static int __init opti_init(void)
+module_pci_driver(opti_pci_driver);
-{
-        return pci_register_driver(&opti_pci_driver);
-}
-static void __exit opti_exit(void)
-{
-        pci_unregister_driver(&opti_pci_driver);
-}
 MODULE_AUTHOR("Alan Cox");
 MODULE_DESCRIPTION("low-level driver for Opti 621/621X");
 MODULE_LICENSE("GPL");
 MODULE_DEVICE_TABLE(pci, opti);
 MODULE_VERSION(DRV_VERSION);
-module_init(opti_init);
-module_exit(opti_exit);
diff --git a/drivers/ata/pata_optidma.c b/drivers/ata/pata_optidma.c
index 77cb91408632..78ede3fd1875 100644
--- a/drivers/ata/pata_optidma.c
+++ b/drivers/ata/pata_optidma.c
@@ -447,21 +447,10 @@ static struct pci_driver optidma_pci_driver = {
 #endif
 };
-static int __init optidma_init(void)
+module_pci_driver(optidma_pci_driver);
-{
-        return pci_register_driver(&optidma_pci_driver);
-}
-static void __exit optidma_exit(void)
-{
-        pci_unregister_driver(&optidma_pci_driver);
-}
 MODULE_AUTHOR("Alan Cox");
 MODULE_DESCRIPTION("low-level driver for Opti Firestar/Firestar Plus");
 MODULE_LICENSE("GPL");
 MODULE_DEVICE_TABLE(pci, optidma);
 MODULE_VERSION(DRV_VERSION);
-module_init(optidma_init);
-module_exit(optidma_exit);
diff --git a/drivers/ata/pata_pcmcia.c b/drivers/ata/pata_pcmcia.c
index a808ba03bd7f..958238dda8fc 100644
--- a/drivers/ata/pata_pcmcia.c
+++ b/drivers/ata/pata_pcmcia.c
@@ -170,7 +170,8 @@ static int pcmcia_check_one_config(struct pcmcia_device *pdev, void *priv_data)
 {
        int *is_kme = priv_data;
-        if (!(pdev->resource[0]->flags & IO_DATA_PATH_WIDTH_8)) {
+        if ((pdev->resource[0]->flags & IO_DATA_PATH_WIDTH)
+            != IO_DATA_PATH_WIDTH_8) {
                pdev->resource[0]->flags &= ~IO_DATA_PATH_WIDTH;
                pdev->resource[0]->flags |= IO_DATA_PATH_WIDTH_AUTO;
        }
diff --git a/drivers/ata/pata_pdc2027x.c b/drivers/ata/pata_pdc2027x.c
index 7d63f24179c7..c9399c8688c5 100644
--- a/drivers/ata/pata_pdc2027x.c
+++ b/drivers/ata/pata_pdc2027x.c
@@ -784,21 +784,4 @@ static int pdc2027x_reinit_one(struct pci_dev *pdev)
 }
 #endif
-/**
+module_pci_driver(pdc2027x_pci_driver);
- * pdc2027x_init - Called after this module is loaded into the kernel.
- */
-static int __init pdc2027x_init(void)
-{
-        return pci_register_driver(&pdc2027x_pci_driver);
-}
-/**
- * pdc2027x_exit - Called before this module unloaded from the kernel
- */
-static void __exit pdc2027x_exit(void)
-{
-        pci_unregister_driver(&pdc2027x_pci_driver);
-}
-module_init(pdc2027x_init);
-module_exit(pdc2027x_exit);
diff --git a/drivers/ata/pata_pdc202xx_old.c b/drivers/ata/pata_pdc202xx_old.c
index c2ed5868dda6..c34fc50070a6 100644
--- a/drivers/ata/pata_pdc202xx_old.c
+++ b/drivers/ata/pata_pdc202xx_old.c
@@ -384,21 +384,10 @@ static struct pci_driver pdc202xx_pci_driver = {
 #endif
 };
-static int __init pdc202xx_init(void)
+module_pci_driver(pdc202xx_pci_driver);
-{
-        return pci_register_driver(&pdc202xx_pci_driver);
-}
-static void __exit pdc202xx_exit(void)
-{
-        pci_unregister_driver(&pdc202xx_pci_driver);
-}
 MODULE_AUTHOR("Alan Cox");
 MODULE_DESCRIPTION("low-level driver for Promise 2024x and 20262-20267");
 MODULE_LICENSE("GPL");
 MODULE_DEVICE_TABLE(pci, pdc202xx);
 MODULE_VERSION(DRV_VERSION);
-module_init(pdc202xx_init);
-module_exit(pdc202xx_exit);
diff --git a/drivers/ata/pata_piccolo.c b/drivers/ata/pata_piccolo.c
index cb01bf9496fe..2beb6b5045f8 100644
--- a/drivers/ata/pata_piccolo.c
+++ b/drivers/ata/pata_piccolo.c
@@ -117,24 +117,10 @@ static struct pci_driver ata_tosh_pci_driver = {
 #endif
 };
-static int __init ata_tosh_init(void)
+module_pci_driver(ata_tosh_pci_driver);
-{
-        return pci_register_driver(&ata_tosh_pci_driver);
-}
-static void __exit ata_tosh_exit(void)
-{
-        pci_unregister_driver(&ata_tosh_pci_driver);
-}
 MODULE_AUTHOR("Alan Cox");
 MODULE_DESCRIPTION("Low level driver for Toshiba Piccolo ATA");
 MODULE_LICENSE("GPL");
 MODULE_DEVICE_TABLE(pci, ata_tosh);
 MODULE_VERSION(DRV_VERSION);
-module_init(ata_tosh_init);
-module_exit(ata_tosh_exit);
diff --git a/drivers/ata/pata_radisys.c b/drivers/ata/pata_radisys.c
index b2d3a2bb4e60..f582ba180a7d 100644
--- a/drivers/ata/pata_radisys.c
+++ b/drivers/ata/pata_radisys.c
@@ -244,22 +244,10 @@ static struct pci_driver radisys_pci_driver = {
 #endif
 };
-static int __init radisys_init(void)
+module_pci_driver(radisys_pci_driver);
-{
-        return pci_register_driver(&radisys_pci_driver);
-}
-static void __exit radisys_exit(void)
-{
-        pci_unregister_driver(&radisys_pci_driver);
-}
-module_init(radisys_init);
-module_exit(radisys_exit);
 MODULE_AUTHOR("Alan Cox");
 MODULE_DESCRIPTION("SCSI low-level driver for Radisys R82600 controllers");
 MODULE_LICENSE("GPL");
 MODULE_DEVICE_TABLE(pci, radisys_pci_tbl);
 MODULE_VERSION(DRV_VERSION);
diff --git a/drivers/ata/pata_rdc.c b/drivers/ata/pata_rdc.c
index e6a2dd7809c1..32a3499e83e7 100644
--- a/drivers/ata/pata_rdc.c
+++ b/drivers/ata/pata_rdc.c
@@ -394,18 +394,7 @@ static struct pci_driver rdc_pci_driver = {
 };
-static int __init rdc_init(void)
+module_pci_driver(rdc_pci_driver);
-{
-        return pci_register_driver(&rdc_pci_driver);
-}
-static void __exit rdc_exit(void)
-{
-        pci_unregister_driver(&rdc_pci_driver);
-}
-module_init(rdc_init);
-module_exit(rdc_exit);
 MODULE_AUTHOR("Alan Cox (based on ata_piix)");
 MODULE_DESCRIPTION("SCSI low-level driver for RDC PATA controllers");
diff --git a/drivers/ata/pata_rz1000.c b/drivers/ata/pata_rz1000.c
index aca321e1e6a2..60f4de2dd47d 100644
--- a/drivers/ata/pata_rz1000.c
+++ b/drivers/ata/pata_rz1000.c
@@ -140,22 +140,10 @@ static struct pci_driver rz1000_pci_driver = {
 #endif
 };
-static int __init rz1000_init(void)
+module_pci_driver(rz1000_pci_driver);
-{
-        return pci_register_driver(&rz1000_pci_driver);
-}
-static void __exit rz1000_exit(void)
-{
-        pci_unregister_driver(&rz1000_pci_driver);
-}
 MODULE_AUTHOR("Alan Cox");
 MODULE_DESCRIPTION("low-level driver for RZ1000 PCI ATA");
 MODULE_LICENSE("GPL");
 MODULE_DEVICE_TABLE(pci, pata_rz1000);
 MODULE_VERSION(DRV_VERSION);
-module_init(rz1000_init);
-module_exit(rz1000_exit);
diff --git a/drivers/ata/pata_sc1200.c b/drivers/ata/pata_sc1200.c
index c0e603a84f7f..ce2f828c17b3 100644
--- a/drivers/ata/pata_sc1200.c
+++ b/drivers/ata/pata_sc1200.c
@@ -261,21 +261,10 @@ static struct pci_driver sc1200_pci_driver = {
 #endif
 };
-static int __init sc1200_init(void)
+module_pci_driver(sc1200_pci_driver);
-{
-        return pci_register_driver(&sc1200_pci_driver);
-}
-static void __exit sc1200_exit(void)
-{
-        pci_unregister_driver(&sc1200_pci_driver);
-}
 MODULE_AUTHOR("Alan Cox, Mark Lord");
 MODULE_DESCRIPTION("low-level driver for the NS/AMD SC1200");
 MODULE_LICENSE("GPL");
 MODULE_DEVICE_TABLE(pci, sc1200);
 MODULE_VERSION(DRV_VERSION);
-module_init(sc1200_init);
-module_exit(sc1200_exit);
diff --git a/drivers/ata/pata_scc.c b/drivers/ata/pata_scc.c
index e265f835c95d..f35f15f4d83e 100644
--- a/drivers/ata/pata_scc.c
+++ b/drivers/ata/pata_scc.c
@@ -1103,26 +1103,7 @@ static struct pci_driver scc_pci_driver = {
 #endif
 };
-static int __init scc_init (void)
+module_pci_driver(scc_pci_driver);
-{
-        int rc;
-        DPRINTK("pci_register_driver\n");
-        rc = pci_register_driver(&scc_pci_driver);
-        if (rc)
-                return rc;
-        DPRINTK("done\n");
-        return 0;
-}
-static void __exit scc_exit (void)
-{
-        pci_unregister_driver(&scc_pci_driver);
-}
-module_init(scc_init);
-module_exit(scc_exit);
 MODULE_AUTHOR("Toshiba corp");
 MODULE_DESCRIPTION("SCSI low-level driver for Toshiba SCC PATA controller");
diff --git a/drivers/ata/pata_sch.c b/drivers/ata/pata_sch.c
index 7c78b9993627..db0d18cf1c2a 100644
--- a/drivers/ata/pata_sch.c
+++ b/drivers/ata/pata_sch.c
@@ -179,15 +179,4 @@ static int __devinit sch_init_one(struct pci_dev *pdev,
        return ata_pci_bmdma_init_one(pdev, ppi, &sch_sht, NULL, 0);
 }
-static int __init sch_init(void)
+module_pci_driver(sch_pci_driver);
-{
-        return pci_register_driver(&sch_pci_driver);
-}
-static void __exit sch_exit(void)
-{
-        pci_unregister_driver(&sch_pci_driver);
-}
-module_init(sch_init);
-module_exit(sch_exit);
diff --git a/drivers/ata/pata_serverworks.c b/drivers/ata/pata_serverworks.c
index 71eaf385e970..f3febbce6c46 100644
--- a/drivers/ata/pata_serverworks.c
+++ b/drivers/ata/pata_serverworks.c
@@ -475,21 +475,10 @@ static struct pci_driver serverworks_pci_driver = {
 #endif
 };
-static int __init serverworks_init(void)
+module_pci_driver(serverworks_pci_driver);
-{
-        return pci_register_driver(&serverworks_pci_driver);
-}
-static void __exit serverworks_exit(void)
-{
-        pci_unregister_driver(&serverworks_pci_driver);
-}
 MODULE_AUTHOR("Alan Cox");
 MODULE_DESCRIPTION("low-level driver for Serverworks OSB4/CSB5/CSB6");
 MODULE_LICENSE("GPL");
 MODULE_DEVICE_TABLE(pci, serverworks);
 MODULE_VERSION(DRV_VERSION);
-module_init(serverworks_init);
-module_exit(serverworks_exit);
diff --git a/drivers/ata/pata_sil680.c b/drivers/ata/pata_sil680.c
index b92eacf8dd3c..5cfdf94823d0 100644
--- a/drivers/ata/pata_sil680.c
+++ b/drivers/ata/pata_sil680.c
@@ -437,21 +437,10 @@ static struct pci_driver sil680_pci_driver = {
 #endif
 };
-static int __init sil680_init(void)
+module_pci_driver(sil680_pci_driver);
-{
-        return pci_register_driver(&sil680_pci_driver);
-}
-static void __exit sil680_exit(void)
-{
-        pci_unregister_driver(&sil680_pci_driver);
-}
 MODULE_AUTHOR("Alan Cox");
 MODULE_DESCRIPTION("low-level driver for SI680 PATA");
 MODULE_LICENSE("GPL");
 MODULE_DEVICE_TABLE(pci, sil680);
 MODULE_VERSION(DRV_VERSION);
-module_init(sil680_init);
-module_exit(sil680_exit);
diff --git a/drivers/ata/pata_sis.c b/drivers/ata/pata_sis.c
index b0edc7de7b2d..2d5ac1361262 100644
--- a/drivers/ata/pata_sis.c
+++ b/drivers/ata/pata_sis.c
@@ -906,22 +906,10 @@ static struct pci_driver sis_pci_driver = {
 #endif
 };
-static int __init sis_init(void)
+module_pci_driver(sis_pci_driver);
-{
-        return pci_register_driver(&sis_pci_driver);
-}
-static void __exit sis_exit(void)
-{
-        pci_unregister_driver(&sis_pci_driver);
-}
-module_init(sis_init);
-module_exit(sis_exit);
 MODULE_AUTHOR("Alan Cox");
 MODULE_DESCRIPTION("SCSI low-level driver for SiS ATA");
 MODULE_LICENSE("GPL");
 MODULE_DEVICE_TABLE(pci, sis_pci_tbl);
 MODULE_VERSION(DRV_VERSION);
diff --git a/drivers/ata/pata_sl82c105.c b/drivers/ata/pata_sl82c105.c
index 24cf200dd1c9..738e000107d6 100644
--- a/drivers/ata/pata_sl82c105.c
+++ b/drivers/ata/pata_sl82c105.c
@@ -372,21 +372,10 @@ static struct pci_driver sl82c105_pci_driver = {
 #endif
 };
-static int __init sl82c105_init(void)
+module_pci_driver(sl82c105_pci_driver);
-{
-        return pci_register_driver(&sl82c105_pci_driver);
-}
-static void __exit sl82c105_exit(void)
-{
-        pci_unregister_driver(&sl82c105_pci_driver);
-}
 MODULE_AUTHOR("Alan Cox");
 MODULE_DESCRIPTION("low-level driver for Sl82c105");
 MODULE_LICENSE("GPL");
 MODULE_DEVICE_TABLE(pci, sl82c105);
 MODULE_VERSION(DRV_VERSION);
-module_init(sl82c105_init);
-module_exit(sl82c105_exit);
diff --git a/drivers/ata/pata_triflex.c b/drivers/ata/pata_triflex.c
index 28da1c6becf1..c8e589d91231 100644
--- a/drivers/ata/pata_triflex.c
+++ b/drivers/ata/pata_triflex.c
@@ -240,21 +240,10 @@ static struct pci_driver triflex_pci_driver = {
 #endif
 };
-static int __init triflex_init(void)
+module_pci_driver(triflex_pci_driver);
-{
-        return pci_register_driver(&triflex_pci_driver);
-}
-static void __exit triflex_exit(void)
-{
-        pci_unregister_driver(&triflex_pci_driver);
-}
 MODULE_AUTHOR("Alan Cox");
 MODULE_DESCRIPTION("low-level driver for Compaq Triflex");
 MODULE_LICENSE("GPL");
 MODULE_DEVICE_TABLE(pci, triflex);
 MODULE_VERSION(DRV_VERSION);
-module_init(triflex_init);
-module_exit(triflex_exit);
diff --git a/drivers/ata/pata_via.c b/drivers/ata/pata_via.c
index 255f336cd7ea..8d2a9fdf6b8d 100644
--- a/drivers/ata/pata_via.c
+++ b/drivers/ata/pata_via.c
@@ -711,21 +711,10 @@ static struct pci_driver via_pci_driver = {
 #endif
 };
-static int __init via_init(void)
+module_pci_driver(via_pci_driver);
-{
-        return pci_register_driver(&via_pci_driver);
-}
-static void __exit via_exit(void)
-{
-        pci_unregister_driver(&via_pci_driver);
-}
 MODULE_AUTHOR("Alan Cox");
 MODULE_DESCRIPTION("low-level driver for VIA PATA");
 MODULE_LICENSE("GPL");
 MODULE_DEVICE_TABLE(pci, via);
 MODULE_VERSION(DRV_VERSION);
-module_init(via_init);
-module_exit(via_exit);
diff --git a/drivers/ata/pdc_adma.c b/drivers/ata/pdc_adma.c
index 04911d52f59d..505333340ad5 100644
--- a/drivers/ata/pdc_adma.c
+++ b/drivers/ata/pdc_adma.c
@@ -660,21 +660,10 @@ static int adma_ata_init_one(struct pci_dev *pdev,
                                 &adma_ata_sht);
 }
-static int __init adma_ata_init(void)
+module_pci_driver(adma_ata_pci_driver);
-{
-        return pci_register_driver(&adma_ata_pci_driver);
-}
-static void __exit adma_ata_exit(void)
-{
-        pci_unregister_driver(&adma_ata_pci_driver);
-}
 MODULE_AUTHOR("Mark Lord");
 MODULE_DESCRIPTION("Pacific Digital Corporation ADMA low-level driver");
 MODULE_LICENSE("GPL");
 MODULE_DEVICE_TABLE(pci, adma_ata_pci_tbl);
 MODULE_VERSION(DRV_VERSION);
-module_init(adma_ata_init);
-module_exit(adma_ata_exit);
diff --git a/drivers/ata/sata_dwc_460ex.c b/drivers/ata/sata_dwc_460ex.c
index 69f7cde49c6b..937aeb34b310 100644..100755
--- a/drivers/ata/sata_dwc_460ex.c
+++ b/drivers/ata/sata_dwc_460ex.c
@@ -158,6 +158,7 @@ enum {
 /* Assign HW handshaking interface (x) to destination / source peripheral */
 #define DMA_CFG_HW_HS_DEST(int_num) (((int_num) & 0xF) << 11)
 #define DMA_CFG_HW_HS_SRC(int_num) (((int_num) & 0xF) << 7)
+#define DMA_CFG_HW_CH_PRIOR(int_num) (((int_num) & 0xF) << 5)
 #define DMA_LLP_LMS(addr, master) (((addr) & 0xfffffffc) | (master))
 /*
@@ -318,6 +319,7 @@ struct sata_dwc_host_priv {
        u32     dma_interrupt_count;
        struct  ahb_dma_regs    *sata_dma_regs;
        struct  device  *dwc_dev;
+        int     dma_channel;
 };
 struct sata_dwc_host_priv host_pvt;
 /*
@@ -437,15 +439,12 @@ static  void clear_chan_interrupts(int c)
 */
 static int dma_request_channel(void)
 {
-        int i;
+        /* Check if the channel is not currently in use */
+        if (!(in_le32(&(host_pvt.sata_dma_regs->dma_chan_en.low)) &
-        for (i = 0; i < DMA_NUM_CHANS; i++) {
+                DMA_CHANNEL(host_pvt.dma_channel)))
-                if (!(in_le32(&(host_pvt.sata_dma_regs->dma_chan_en.low)) &\
+                return host_pvt.dma_channel;
-                        DMA_CHANNEL(i)))
+        dev_err(host_pvt.dwc_dev, "%s Channel %d is currently in use\n",
-                        return i;
+                __func__, host_pvt.dma_channel);
-        }
-        dev_err(host_pvt.dwc_dev, "%s NO channel chan_en: 0x%08x\n", __func__,
-                in_le32(&(host_pvt.sata_dma_regs->dma_chan_en.low)));
        return -1;
 }
@@ -481,7 +480,8 @@ static irqreturn_t dma_dwc_interrupt(int irq, void *hsdev_instance)
        dev_dbg(ap->dev, "eot=0x%08x err=0x%08x pending=%d active port=%d\n",
                tfr_reg, err_reg, hsdevp->dma_pending[tag], port);
-        for (chan = 0; chan < DMA_NUM_CHANS; chan++) {
+        chan = host_pvt.dma_channel;
+        if (chan >= 0) {
                /* Check for end-of-transfer interrupt. */
                if (tfr_reg & DMA_CHANNEL(chan)) {
                        /*
@@ -534,9 +534,9 @@ static irqreturn_t dma_dwc_interrupt(int irq, void *hsdev_instance)
 static int dma_request_interrupts(struct sata_dwc_device *hsdev, int irq)
 {
        int retval = 0;
-        int chan;
+        int chan = host_pvt.dma_channel;
-        for (chan = 0; chan < DMA_NUM_CHANS; chan++) {
+        if (chan >= 0) {
                /* Unmask error interrupt */
                out_le32(&(host_pvt.sata_dma_regs)->interrupt_mask.error.low,
                         DMA_ENABLE_CHAN(chan));
@@ -575,7 +575,10 @@ static int map_sg_to_lli(struct scatterlist *sg, int num_elems,
        int fis_len = 0;
        dma_addr_t next_llp;
        int bl;
+        int sms_val, dms_val;
+        sms_val = 0;
+        dms_val = 1 + host_pvt.dma_channel;
        dev_dbg(host_pvt.dwc_dev, "%s: sg=%p nelem=%d lli=%p dma_lli=0x%08x"
                " dmadr=0x%08x\n", __func__, sg, num_elems, lli, (u32)dma_lli,
                (u32)dmadr_addr);
@@ -635,8 +638,8 @@ static int map_sg_to_lli(struct scatterlist *sg, int num_elems,
                                lli[idx].ctl.low = cpu_to_le32(
                                        DMA_CTL_TTFC(DMA_CTL_TTFC_P2M_DMAC) |
-                                        DMA_CTL_SMS(0) |
+                                        DMA_CTL_SMS(sms_val) |
-                                        DMA_CTL_DMS(1) |
+                                        DMA_CTL_DMS(dms_val) |
                                        DMA_CTL_SRC_MSIZE(bl) |
                                        DMA_CTL_DST_MSIZE(bl) |
                                        DMA_CTL_SINC_NOCHANGE |
@@ -651,8 +654,8 @@ static int map_sg_to_lli(struct scatterlist *sg, int num_elems,
                                lli[idx].ctl.low = cpu_to_le32(
                                        DMA_CTL_TTFC(DMA_CTL_TTFC_M2P_PER) |
-                                        DMA_CTL_SMS(1) |
+                                        DMA_CTL_SMS(dms_val) |
-                                        DMA_CTL_DMS(0) |
+                                        DMA_CTL_DMS(sms_val) |
                                        DMA_CTL_SRC_MSIZE(bl) |
                                        DMA_CTL_DST_MSIZE(bl) |
                                        DMA_CTL_DINC_NOCHANGE |
@@ -744,8 +747,10 @@ static int dma_dwc_xfer_setup(struct scatterlist *sg, int num_elems,
        /* Program the CFG register. */
        out_le32(&(host_pvt.sata_dma_regs->chan_regs[dma_ch].cfg.high),
+                 DMA_CFG_HW_HS_SRC(dma_ch) | DMA_CFG_HW_HS_DEST(dma_ch) |
                 DMA_CFG_PROTCTL | DMA_CFG_FCMOD_REQ);
-        out_le32(&(host_pvt.sata_dma_regs->chan_regs[dma_ch].cfg.low), 0);
+        out_le32(&(host_pvt.sata_dma_regs->chan_regs[dma_ch].cfg.low),
+                 DMA_CFG_HW_CH_PRIOR(dma_ch));
        /* Program the address of the linked list */
        out_le32(&(host_pvt.sata_dma_regs->chan_regs[dma_ch].llp.low),
@@ -1581,10 +1586,31 @@ static void sata_dwc_qc_prep(struct ata_queued_cmd *qc)
 static void sata_dwc_error_handler(struct ata_port *ap)
 {
-        ap->link.flags |= ATA_LFLAG_NO_HRST;
        ata_sff_error_handler(ap);
 }
+int sata_dwc_hardreset(struct ata_link *link, unsigned int *class,
+                        unsigned long deadline)
+{
+        struct sata_dwc_device *hsdev = HSDEV_FROM_AP(link->ap);
+        int ret;
+        ret = sata_sff_hardreset(link, class, deadline);
+        sata_dwc_enable_interrupts(hsdev);
+        /* Reconfigure the DMA control register */
+        out_le32(&hsdev->sata_dwc_regs->dmacr,
+                 SATA_DWC_DMACR_TXRXCH_CLEAR);
+        /* Reconfigure the DMA Burst Transaction Size register */
+        out_le32(&hsdev->sata_dwc_regs->dbtsr,
+                 SATA_DWC_DBTSR_MWR(AHB_DMA_BRST_DFLT) |
+                 SATA_DWC_DBTSR_MRD(AHB_DMA_BRST_DFLT));
+        return ret;
+}
 /*
 * scsi mid-layer and libata interface structures
 */
@@ -1604,6 +1630,7 @@ static struct ata_port_operations sata_dwc_ops = {
        .inherits               = &ata_sff_port_ops,
        .error_handler          = sata_dwc_error_handler,
+        .hardreset              = sata_dwc_hardreset,
        .qc_prep                = sata_dwc_qc_prep,
        .qc_issue               = sata_dwc_qc_issue,
@@ -1638,6 +1665,8 @@ static int sata_dwc_probe(struct platform_device *ofdev)
        struct ata_host *host;
        struct ata_port_info pi = sata_dwc_port_info[0];
        const struct ata_port_info *ppi[] = { &pi, NULL };
+        struct device_node *np = ofdev->dev.of_node;
+        u32 dma_chan;
        /* Allocate DWC SATA device */
        hsdev = kzalloc(sizeof(*hsdev), GFP_KERNEL);
@@ -1647,6 +1676,13 @@ static int sata_dwc_probe(struct platform_device *ofdev)
                goto error;
        }
+        if (of_property_read_u32(np, "dma-channel", &dma_chan)) {
+                dev_warn(&ofdev->dev, "no dma-channel property set."
+                         " Use channel 0\n");
+                dma_chan = 0;
+        }
+        host_pvt.dma_channel = dma_chan;
        /* Ioremap SATA registers */
        base = of_iomap(ofdev->dev.of_node, 0);
        if (!base) {
diff --git a/drivers/ata/sata_inic162x.c b/drivers/ata/sata_inic162x.c
index 5c7d70c03bf0..dc35f4d42b8b 100644
--- a/drivers/ata/sata_inic162x.c
+++ b/drivers/ata/sata_inic162x.c
@@ -894,21 +894,10 @@ static struct pci_driver inic_pci_driver = {
        .remove         = ata_pci_remove_one,
 };
-static int __init inic_init(void)
+module_pci_driver(inic_pci_driver);
-{
-        return pci_register_driver(&inic_pci_driver);
-}
-static void __exit inic_exit(void)
-{
-        pci_unregister_driver(&inic_pci_driver);
-}
 MODULE_AUTHOR("Tejun Heo");
 MODULE_DESCRIPTION("low-level driver for Initio 162x SATA");
 MODULE_LICENSE("GPL v2");
 MODULE_DEVICE_TABLE(pci, inic_pci_tbl);
 MODULE_VERSION(DRV_VERSION);
-module_init(inic_init);
-module_exit(inic_exit);
diff --git a/drivers/ata/sata_mv.c b/drivers/ata/sata_mv.c
index 24712adf69df..311be18d3f03 100644
--- a/drivers/ata/sata_mv.c
+++ b/drivers/ata/sata_mv.c
@@ -65,6 +65,8 @@
 #include <linux/mbus.h>
 #include <linux/bitops.h>
 #include <linux/gfp.h>
+#include <linux/of.h>
+#include <linux/of_irq.h>
 #include <scsi/scsi_host.h>
 #include <scsi/scsi_cmnd.h>
 #include <scsi/scsi_device.h>
@@ -4026,7 +4028,7 @@ static int mv_platform_probe(struct platform_device *pdev)
        struct ata_host *host;
        struct mv_host_priv *hpriv;
        struct resource *res;
-        int n_ports = 0;
+        int n_ports = 0, irq = 0;
        int rc;
 #if defined(CONFIG_HAVE_CLK)
        int port;
@@ -4050,8 +4052,14 @@ static int mv_platform_probe(struct platform_device *pdev)
                return -EINVAL;
        /* allocate host */
-        mv_platform_data = pdev->dev.platform_data;
+        if (pdev->dev.of_node) {
-        n_ports = mv_platform_data->n_ports;
+                of_property_read_u32(pdev->dev.of_node, "nr-ports", &n_ports);
+                irq = irq_of_parse_and_map(pdev->dev.of_node, 0);
+        } else {
+                mv_platform_data = pdev->dev.platform_data;
+                n_ports = mv_platform_data->n_ports;
+                irq = platform_get_irq(pdev, 0);
+        }
        host = ata_host_alloc_pinfo(&pdev->dev, ppi, n_ports);
        hpriv = devm_kzalloc(&pdev->dev, sizeof(*hpriv), GFP_KERNEL);
@@ -4109,8 +4117,7 @@ static int mv_platform_probe(struct platform_device *pdev)
        dev_info(&pdev->dev, "slots %u ports %d\n",
                 (unsigned)MV_MAX_Q_DEPTH, host->n_ports);
-        rc = ata_host_activate(host, platform_get_irq(pdev, 0), mv_interrupt,
+        rc = ata_host_activate(host, irq, mv_interrupt, IRQF_SHARED, &mv6_sht);
-                               IRQF_SHARED, &mv6_sht);
        if (!rc)
                return 0;
@@ -4205,15 +4212,24 @@ static int mv_platform_resume(struct platform_device *pdev)
 #define mv_platform_resume NULL
 #endif
+#ifdef CONFIG_OF
+static struct of_device_id mv_sata_dt_ids[] __devinitdata = {
+        { .compatible = "marvell,orion-sata", },
+        {},
+};
+MODULE_DEVICE_TABLE(of, mv_sata_dt_ids);
+#endif
 static struct platform_driver mv_platform_driver = {
-        .probe                  = mv_platform_probe,
+        .probe          = mv_platform_probe,
-        .remove                 = __devexit_p(mv_platform_remove),
+        .remove         = __devexit_p(mv_platform_remove),
-        .suspend                = mv_platform_suspend,
+        .suspend        = mv_platform_suspend,
-        .resume                 = mv_platform_resume,
+        .resume         = mv_platform_resume,
-        .driver                 = {
+        .driver         = {
-                                   .name = DRV_NAME,
+                .name = DRV_NAME,
-                                   .owner = THIS_MODULE,
+                .owner = THIS_MODULE,
-                                  },
+                .of_match_table = of_match_ptr(mv_sata_dt_ids),
+        },
 };
diff --git a/drivers/ata/sata_nv.c b/drivers/ata/sata_nv.c
index 55d6179dde58..85ee4993ca74 100644
--- a/drivers/ata/sata_nv.c
+++ b/drivers/ata/sata_nv.c
@@ -2510,22 +2510,11 @@ static void nv_adma_host_stop(struct ata_host *host)
        nv_ck804_host_stop(host);
 }
-static int __init nv_init(void)
+module_pci_driver(nv_pci_driver);
-{
-        return pci_register_driver(&nv_pci_driver);
-}
-static void __exit nv_exit(void)
-{
-        pci_unregister_driver(&nv_pci_driver);
-}
-module_init(nv_init);
-module_exit(nv_exit);
 module_param_named(adma, adma_enabled, bool, 0444);
 MODULE_PARM_DESC(adma, "Enable use of ADMA (Default: false)");
 module_param_named(swncq, swncq_enabled, bool, 0444);
 MODULE_PARM_DESC(swncq, "Enable use of SWNCQ (Default: true)");
 module_param_named(msi, msi_enabled, bool, 0444);
 MODULE_PARM_DESC(msi, "Enable use of MSI (Default: false)");
diff --git a/drivers/ata/sata_promise.c b/drivers/ata/sata_promise.c
index 000fcc99e01d..489c81768321 100644
--- a/drivers/ata/sata_promise.c
+++ b/drivers/ata/sata_promise.c
@@ -1249,21 +1249,10 @@ static int pdc_ata_init_one(struct pci_dev *pdev,
                                 &pdc_ata_sht);
 }
-static int __init pdc_ata_init(void)
+module_pci_driver(pdc_ata_pci_driver);
-{
-        return pci_register_driver(&pdc_ata_pci_driver);
-}
-static void __exit pdc_ata_exit(void)
-{
-        pci_unregister_driver(&pdc_ata_pci_driver);
-}
 MODULE_AUTHOR("Jeff Garzik");
 MODULE_DESCRIPTION("Promise ATA TX2/TX4/TX4000 low-level driver");
 MODULE_LICENSE("GPL");
 MODULE_DEVICE_TABLE(pci, pdc_ata_pci_tbl);
 MODULE_VERSION(DRV_VERSION);
-module_init(pdc_ata_init);
-module_exit(pdc_ata_exit);
diff --git a/drivers/ata/sata_qstor.c b/drivers/ata/sata_qstor.c
index 9d1a47bb21b3..3b0dd57984e1 100644
--- a/drivers/ata/sata_qstor.c
+++ b/drivers/ata/sata_qstor.c
@@ -635,21 +635,10 @@ static int qs_ata_init_one(struct pci_dev *pdev,
                                 &qs_ata_sht);
 }
-static int __init qs_ata_init(void)
+module_pci_driver(qs_ata_pci_driver);
-{
-        return pci_register_driver(&qs_ata_pci_driver);
-}
-static void __exit qs_ata_exit(void)
-{
-        pci_unregister_driver(&qs_ata_pci_driver);
-}
 MODULE_AUTHOR("Mark Lord");
 MODULE_DESCRIPTION("Pacific Digital Corporation QStor SATA low-level driver");
 MODULE_LICENSE("GPL");
 MODULE_DEVICE_TABLE(pci, qs_ata_pci_tbl);
 MODULE_VERSION(DRV_VERSION);
-module_init(qs_ata_init);
-module_exit(qs_ata_exit);
diff --git a/drivers/ata/sata_sil.c b/drivers/ata/sata_sil.c
index 9dfb40b8c2c9..a7b31672c4b7 100644
--- a/drivers/ata/sata_sil.c
+++ b/drivers/ata/sata_sil.c
@@ -819,16 +819,4 @@ static int sil_pci_device_resume(struct pci_dev *pdev)
 }
 #endif
-static int __init sil_init(void)
+module_pci_driver(sil_pci_driver);
-{
-        return pci_register_driver(&sil_pci_driver);
-}
-static void __exit sil_exit(void)
-{
-        pci_unregister_driver(&sil_pci_driver);
-}
-module_init(sil_init);
-module_exit(sil_exit);
diff --git a/drivers/ata/sata_sil24.c b/drivers/ata/sata_sil24.c
index e7e610aa9a7a..a5f2a563a26a 100644
--- a/drivers/ata/sata_sil24.c
+++ b/drivers/ata/sata_sil24.c
@@ -1382,20 +1382,9 @@ static int sil24_port_resume(struct ata_port *ap)
 }
 #endif
-static int __init sil24_init(void)
+module_pci_driver(sil24_pci_driver);
-{
-        return pci_register_driver(&sil24_pci_driver);
-}
-static void __exit sil24_exit(void)
-{
-        pci_unregister_driver(&sil24_pci_driver);
-}
 MODULE_AUTHOR("Tejun Heo");
 MODULE_DESCRIPTION("Silicon Image 3124/3132 SATA low-level driver");
 MODULE_LICENSE("GPL");
 MODULE_DEVICE_TABLE(pci, sil24_pci_tbl);
-module_init(sil24_init);
-module_exit(sil24_exit);
diff --git a/drivers/ata/sata_sis.c b/drivers/ata/sata_sis.c
index 95ec435f0eb4..fe3ca0989b14 100644
--- a/drivers/ata/sata_sis.c
+++ b/drivers/ata/sata_sis.c
@@ -308,15 +308,4 @@ static int sis_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
                                 IRQF_SHARED, &sis_sht);
 }
-static int __init sis_init(void)
+module_pci_driver(sis_pci_driver);
-{
-        return pci_register_driver(&sis_pci_driver);
-}
-static void __exit sis_exit(void)
-{
-        pci_unregister_driver(&sis_pci_driver);
-}
-module_init(sis_init);
-module_exit(sis_exit);
diff --git a/drivers/ata/sata_svw.c b/drivers/ata/sata_svw.c
index c646118943ff..44a4256533e1 100644
--- a/drivers/ata/sata_svw.c
+++ b/drivers/ata/sata_svw.c
@@ -525,21 +525,10 @@ static struct pci_driver k2_sata_pci_driver = {
        .remove                 = ata_pci_remove_one,
 };
-static int __init k2_sata_init(void)
+module_pci_driver(k2_sata_pci_driver);
-{
-        return pci_register_driver(&k2_sata_pci_driver);
-}
-static void __exit k2_sata_exit(void)
-{
-        pci_unregister_driver(&k2_sata_pci_driver);
-}
 MODULE_AUTHOR("Benjamin Herrenschmidt");
 MODULE_DESCRIPTION("low-level driver for K2 SATA controller");
 MODULE_LICENSE("GPL");
 MODULE_DEVICE_TABLE(pci, k2_sata_pci_tbl);
 MODULE_VERSION(DRV_VERSION);
-module_init(k2_sata_init);
-module_exit(k2_sata_exit);
diff --git a/drivers/ata/sata_sx4.c b/drivers/ata/sata_sx4.c
index cdaebbe3d184..122605593166 100644
--- a/drivers/ata/sata_sx4.c
+++ b/drivers/ata/sata_sx4.c
@@ -1498,24 +1498,10 @@ static int pdc_sata_init_one(struct pci_dev *pdev,
                                 IRQF_SHARED, &pdc_sata_sht);
 }
+module_pci_driver(pdc_sata_pci_driver);
-static int __init pdc_sata_init(void)
-{
-        return pci_register_driver(&pdc_sata_pci_driver);
-}
-static void __exit pdc_sata_exit(void)
-{
-        pci_unregister_driver(&pdc_sata_pci_driver);
-}
 MODULE_AUTHOR("Jeff Garzik");
 MODULE_DESCRIPTION("Promise SATA low-level driver");
 MODULE_LICENSE("GPL");
 MODULE_DEVICE_TABLE(pci, pdc_sata_pci_tbl);
 MODULE_VERSION(DRV_VERSION);
-module_init(pdc_sata_init);
-module_exit(pdc_sata_exit);
diff --git a/drivers/ata/sata_uli.c b/drivers/ata/sata_uli.c
index b54ebfcdda32..6d6489118873 100644
--- a/drivers/ata/sata_uli.c
+++ b/drivers/ata/sata_uli.c
@@ -243,16 +243,4 @@ static int uli_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
                                 IRQF_SHARED, &uli_sht);
 }
-static int __init uli_init(void)
+module_pci_driver(uli_pci_driver);
-{
-        return pci_register_driver(&uli_pci_driver);
-}
-static void __exit uli_exit(void)
-{
-        pci_unregister_driver(&uli_pci_driver);
-}
-module_init(uli_init);
-module_exit(uli_exit);
diff --git a/drivers/ata/sata_via.c b/drivers/ata/sata_via.c
index f93e43b0ccd8..5913ea9d57b2 100644
--- a/drivers/ata/sata_via.c
+++ b/drivers/ata/sata_via.c
@@ -655,15 +655,4 @@ static int svia_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
                                 IRQF_SHARED, &svia_sht);
 }
-static int __init svia_init(void)
+module_pci_driver(svia_pci_driver);
-{
-        return pci_register_driver(&svia_pci_driver);
-}
-static void __exit svia_exit(void)
-{
-        pci_unregister_driver(&svia_pci_driver);
-}
-module_init(svia_init);
-module_exit(svia_exit);
diff --git a/drivers/ata/sata_vsc.c b/drivers/ata/sata_vsc.c
index 6135a5288695..e8cf88ba145d 100644
--- a/drivers/ata/sata_vsc.c
+++ b/drivers/ata/sata_vsc.c
@@ -436,21 +436,10 @@ static struct pci_driver vsc_sata_pci_driver = {
        .remove                 = ata_pci_remove_one,
 };
-static int __init vsc_sata_init(void)
+module_pci_driver(vsc_sata_pci_driver);
-{
-        return pci_register_driver(&vsc_sata_pci_driver);
-}
-static void __exit vsc_sata_exit(void)
-{
-        pci_unregister_driver(&vsc_sata_pci_driver);
-}
 MODULE_AUTHOR("Jeremy Higdon");
 MODULE_DESCRIPTION("low-level driver for Vitesse VSC7174 SATA controller");
 MODULE_LICENSE("GPL");
 MODULE_DEVICE_TABLE(pci, vsc_sata_pci_tbl);
 MODULE_VERSION(DRV_VERSION);
-module_init(vsc_sata_init);
-module_exit(vsc_sata_exit);
diff --git a/drivers/atm/iphase.c b/drivers/atm/iphase.c
index d4386019af5d..96cce6d53195 100644
--- a/drivers/atm/iphase.c
+++ b/drivers/atm/iphase.c
@@ -2362,7 +2362,7 @@ static int __devinit ia_init(struct atm_dev *dev)
        {  
                printk(DEV_LABEL " (itf %d): can't set up page mapping\n",  
                            dev->number);  
-                return error;  
+                return -ENOMEM;
        }  
        IF_INIT(printk(DEV_LABEL " (itf %d): rev.%d,base=%p,irq=%d\n",  
                        dev->number, iadev->pci->revision, base, iadev->irq);)
diff --git a/drivers/base/Kconfig b/drivers/base/Kconfig
index 9b21469482ae..08b4c5209384 100644
--- a/drivers/base/Kconfig
+++ b/drivers/base/Kconfig
@@ -196,6 +196,7 @@ config CMA
        bool "Contiguous Memory Allocator (EXPERIMENTAL)"
        depends on HAVE_DMA_CONTIGUOUS && HAVE_MEMBLOCK && EXPERIMENTAL
        select MIGRATION
+        select MEMORY_ISOLATION
        help
          This enables the Contiguous Memory Allocator which allows drivers
          to allocate big physically-contiguous blocks of memory for use with
diff --git a/drivers/base/bus.c b/drivers/base/bus.c
index 2bcef657a60c..181ed2660b33 100644
--- a/drivers/base/bus.c
+++ b/drivers/base/bus.c
@@ -743,7 +743,6 @@ int bus_add_driver(struct device_driver *drv)
                }
        }
-        kobject_uevent(&priv->kobj, KOBJ_ADD);
        return 0;
 out_unregister:
diff --git a/drivers/base/core.c b/drivers/base/core.c
index 346be8b78b24..5e6e00bc1652 100644
--- a/drivers/base/core.c
+++ b/drivers/base/core.c
@@ -85,14 +85,13 @@ const char *dev_driver_string(const struct device *dev)
 }
 EXPORT_SYMBOL(dev_driver_string);
-#define to_dev(obj) container_of(obj, struct device, kobj)
 #define to_dev_attr(_attr) container_of(_attr, struct device_attribute, attr)
 static ssize_t dev_attr_show(struct kobject *kobj, struct attribute *attr,
                             char *buf)
 {
        struct device_attribute *dev_attr = to_dev_attr(attr);
-        struct device *dev = to_dev(kobj);
+        struct device *dev = kobj_to_dev(kobj);
        ssize_t ret = -EIO;
        if (dev_attr->show)
@@ -108,7 +107,7 @@ static ssize_t dev_attr_store(struct kobject *kobj, struct attribute *attr,
                              const char *buf, size_t count)
 {
        struct device_attribute *dev_attr = to_dev_attr(attr);
-        struct device *dev = to_dev(kobj);
+        struct device *dev = kobj_to_dev(kobj);
        ssize_t ret = -EIO;
        if (dev_attr->store)
@@ -182,7 +181,7 @@ EXPORT_SYMBOL_GPL(device_show_int);
 */
 static void device_release(struct kobject *kobj)
 {
-        struct device *dev = to_dev(kobj);
+        struct device *dev = kobj_to_dev(kobj);
        struct device_private *p = dev->p;
        if (dev->release)
@@ -200,7 +199,7 @@ static void device_release(struct kobject *kobj)
 static const void *device_namespace(struct kobject *kobj)
 {
-        struct device *dev = to_dev(kobj);
+        struct device *dev = kobj_to_dev(kobj);
        const void *ns = NULL;
        if (dev->class && dev->class->ns_type)
@@ -221,7 +220,7 @@ static int dev_uevent_filter(struct kset *kset, struct kobject *kobj)
        struct kobj_type *ktype = get_ktype(kobj);
        if (ktype == &device_ktype) {
-                struct device *dev = to_dev(kobj);
+                struct device *dev = kobj_to_dev(kobj);
                if (dev->bus)
                        return 1;
                if (dev->class)
@@ -232,7 +231,7 @@ static int dev_uevent_filter(struct kset *kset, struct kobject *kobj)
 static const char *dev_uevent_name(struct kset *kset, struct kobject *kobj)
 {
-        struct device *dev = to_dev(kobj);
+        struct device *dev = kobj_to_dev(kobj);
        if (dev->bus)
                return dev->bus->name;
@@ -244,7 +243,7 @@ static const char *dev_uevent_name(struct kset *kset, struct kobject *kobj)
 static int dev_uevent(struct kset *kset, struct kobject *kobj,
                      struct kobj_uevent_env *env)
 {
-        struct device *dev = to_dev(kobj);
+        struct device *dev = kobj_to_dev(kobj);
        int retval = 0;
        /* add device node properties if present */
@@ -1132,7 +1131,7 @@ int device_register(struct device *dev)
 */
 struct device *get_device(struct device *dev)
 {
-        return dev ? to_dev(kobject_get(&dev->kobj)) : NULL;
+        return dev ? kobj_to_dev(kobject_get(&dev->kobj)) : NULL;
 }
 /**
@@ -1754,25 +1753,25 @@ int device_move(struct device *dev, struct device *new_parent,
                set_dev_node(dev, dev_to_node(new_parent));
        }
-        if (!dev->class)
+        if (dev->class) {
-                goto out_put;
+                error = device_move_class_links(dev, old_parent, new_parent);
-        error = device_move_class_links(dev, old_parent, new_parent);
+                if (error) {
-        if (error) {
+                        /* We ignore errors on cleanup since we're hosed anyway... */
-                /* We ignore errors on cleanup since we're hosed anyway... */
+                        device_move_class_links(dev, new_parent, old_parent);
-                device_move_class_links(dev, new_parent, old_parent);
+                        if (!kobject_move(&dev->kobj, &old_parent->kobj)) {
-                if (!kobject_move(&dev->kobj, &old_parent->kobj)) {
+                                if (new_parent)
-                        if (new_parent)
+                                        klist_remove(&dev->p->knode_parent);
-                                klist_remove(&dev->p->knode_parent);
+                                dev->parent = old_parent;
-                        dev->parent = old_parent;
+                                if (old_parent) {
-                        if (old_parent) {
+                                        klist_add_tail(&dev->p->knode_parent,
-                                klist_add_tail(&dev->p->knode_parent,
+                                                       &old_parent->p->klist_children);
-                                               &old_parent->p->klist_children);
+                                        set_dev_node(dev, dev_to_node(old_parent));
-                                set_dev_node(dev, dev_to_node(old_parent));
+                                }
                        }
+                        cleanup_glue_dir(dev, new_parent_kobj);
+                        put_device(new_parent);
+                        goto out;
                }
-                cleanup_glue_dir(dev, new_parent_kobj);
-                put_device(new_parent);
-                goto out;
        }
        switch (dpm_order) {
        case DPM_ORDER_NONE:
@@ -1787,7 +1786,7 @@ int device_move(struct device *dev, struct device *new_parent,
                device_pm_move_last(dev);
                break;
        }
-out_put:
        put_device(old_parent);
 out:
        device_pm_unlock();
@@ -1812,6 +1811,13 @@ void device_shutdown(void)
        while (!list_empty(&devices_kset->list)) {
                dev = list_entry(devices_kset->list.prev, struct device,
                                kobj.entry);
+                /*
+                 * hold reference count of device's parent to
+                 * prevent it from being freed because parent's
+                 * lock is to be held
+                 */
+                get_device(dev->parent);
                get_device(dev);
                /*
                 * Make sure the device is off the kset list, in the
@@ -1820,6 +1826,11 @@ void device_shutdown(void)
                list_del_init(&dev->kobj.entry);
                spin_unlock(&devices_kset->list_lock);
+                /* hold lock to avoid race with probe/release */
+                if (dev->parent)
+                        device_lock(dev->parent);
+                device_lock(dev);
                /* Don't allow any more runtime suspends */
                pm_runtime_get_noresume(dev);
                pm_runtime_barrier(dev);
@@ -1831,7 +1842,13 @@ void device_shutdown(void)
                        dev_dbg(dev, "shutdown\n");
                        dev->driver->shutdown(dev);
                }
+                device_unlock(dev);
+                if (dev->parent)
+                        device_unlock(dev->parent);
                put_device(dev);
+                put_device(dev->parent);
                spin_lock(&devices_kset->list_lock);
        }
@@ -1848,6 +1865,7 @@ int __dev_printk(const char *level, const struct device *dev,
                 struct va_format *vaf)
 {
        char dict[128];
+        const char *level_extra = "";
        size_t dictlen = 0;
        const char *subsys;
@@ -1894,10 +1912,14 @@ int __dev_printk(const char *level, const struct device *dev,
                                    "DEVICE=+%s:%s", subsys, dev_name(dev));
        }
 skip:
+        if (level[2])
+                level_extra = &level[2]; /* skip past KERN_SOH "L" */
        return printk_emit(0, level[1] - '0',
                           dictlen ? dict : NULL, dictlen,
-                           "%s %s: %pV",
+                           "%s %s: %s%pV",
-                           dev_driver_string(dev), dev_name(dev), vaf);
+                           dev_driver_string(dev), dev_name(dev),
+                           level_extra, vaf);
 }
 EXPORT_SYMBOL(__dev_printk);
diff --git a/drivers/base/dd.c b/drivers/base/dd.c
index 1b1cbb571d38..e3bbed8a617c 100644
--- a/drivers/base/dd.c
+++ b/drivers/base/dd.c
@@ -85,8 +85,20 @@ static void deferred_probe_work_func(struct work_struct *work)
                 * manipulate the deferred list
                 */
                mutex_unlock(&deferred_probe_mutex);
+                /*
+                 * Force the device to the end of the dpm_list since
+                 * the PM code assumes that the order we add things to
+                 * the list is a good order for suspend but deferred
+                 * probe makes that very unsafe.
+                 */
+                device_pm_lock();
+                device_pm_move_last(dev);
+                device_pm_unlock();
                dev_dbg(dev, "Retrying from deferred list\n");
                bus_probe_device(dev);
                mutex_lock(&deferred_probe_mutex);
                put_device(dev);
@@ -100,7 +112,7 @@ static void driver_deferred_probe_add(struct device *dev)
        mutex_lock(&deferred_probe_mutex);
        if (list_empty(&dev->p->deferred_probe)) {
                dev_dbg(dev, "Added to deferred list\n");
-                list_add(&dev->p->deferred_probe, &deferred_probe_pending_list);
+                list_add_tail(&dev->p->deferred_probe, &deferred_probe_pending_list);
        }
        mutex_unlock(&deferred_probe_mutex);
 }
@@ -283,6 +295,7 @@ probe_failed:
        devres_release_all(dev);
        driver_sysfs_remove(dev);
        dev->driver = NULL;
+        dev_set_drvdata(dev, NULL);
        if (ret == -EPROBE_DEFER) {
                /* Driver requested deferred probing */
@@ -356,10 +369,9 @@ int driver_probe_device(struct device_driver *drv, struct device *dev)
        pr_debug("bus: '%s': %s: matched device %s with driver %s\n",
                 drv->bus->name, __func__, dev_name(dev), drv->name);
-        pm_runtime_get_noresume(dev);
        pm_runtime_barrier(dev);
        ret = really_probe(dev, drv);
-        pm_runtime_put_sync(dev);
+        pm_runtime_idle(dev);
        return ret;
 }
@@ -406,9 +418,8 @@ int device_attach(struct device *dev)
                        ret = 0;
                }
        } else {
-                pm_runtime_get_noresume(dev);
                ret = bus_for_each_drv(dev->bus, NULL, dev, __device_attach);
-                pm_runtime_put_sync(dev);
+                pm_runtime_idle(dev);
        }
 out_unlock:
        device_unlock(dev);
@@ -487,6 +498,7 @@ static void __device_release_driver(struct device *dev)
                        drv->remove(dev);
                devres_release_all(dev);
                dev->driver = NULL;
+                dev_set_drvdata(dev, NULL);
                klist_remove(&dev->p->knode_driver);
                if (dev->bus)
                        blocking_notifier_call_chain(&dev->bus->p->bus_notifier,
diff --git a/drivers/base/devtmpfs.c b/drivers/base/devtmpfs.c
index 765c3a28077a..deb4a456cf83 100644
--- a/drivers/base/devtmpfs.c
+++ b/drivers/base/devtmpfs.c
@@ -156,9 +156,7 @@ static int dev_mkdir(const char *name, umode_t mode)
        if (!err)
                /* mark as kernel-created inode */
                dentry->d_inode->i_private = &thread;
-        dput(dentry);
+        done_path_create(&path, dentry);
-        mutex_unlock(&path.dentry->d_inode->i_mutex);
-        path_put(&path);
        return err;
 }
@@ -218,42 +216,30 @@ static int handle_create(const char *nodename, umode_t mode, struct device *dev)
                /* mark as kernel-created inode */
                dentry->d_inode->i_private = &thread;
        }
-        dput(dentry);
+        done_path_create(&path, dentry);
-        mutex_unlock(&path.dentry->d_inode->i_mutex);
-        path_put(&path);
        return err;
 }
 static int dev_rmdir(const char *name)
 {
-        struct nameidata nd;
+        struct path parent;
        struct dentry *dentry;
        int err;
-        err = kern_path_parent(name, &nd);
+        dentry = kern_path_locked(name, &parent);
-        if (err)
+        if (IS_ERR(dentry))
-                return err;
+                return PTR_ERR(dentry);
+        if (dentry->d_inode) {
-        mutex_lock_nested(&nd.path.dentry->d_inode->i_mutex, I_MUTEX_PARENT);
+                if (dentry->d_inode->i_private == &thread)
-        dentry = lookup_one_len(nd.last.name, nd.path.dentry, nd.last.len);
+                        err = vfs_rmdir(parent.dentry->d_inode, dentry);
-        if (!IS_ERR(dentry)) {
+                else
-                if (dentry->d_inode) {
+                        err = -EPERM;
-                        if (dentry->d_inode->i_private == &thread)
-                                err = vfs_rmdir(nd.path.dentry->d_inode,
-                                                dentry);
-                        else
-                                err = -EPERM;
-                } else {
-                        err = -ENOENT;
-                }
-                dput(dentry);
        } else {
-                err = PTR_ERR(dentry);
+                err = -ENOENT;
        }
+        dput(dentry);
-        mutex_unlock(&nd.path.dentry->d_inode->i_mutex);
+        mutex_unlock(&parent.dentry->d_inode->i_mutex);
-        path_put(&nd.path);
+        path_put(&parent);
        return err;
 }
@@ -305,50 +291,43 @@ static int dev_mynode(struct device *dev, struct inode *inode, struct kstat *sta
 static int handle_remove(const char *nodename, struct device *dev)
 {
-        struct nameidata nd;
+        struct path parent;
        struct dentry *dentry;
-        struct kstat stat;
        int deleted = 1;
        int err;
-        err = kern_path_parent(nodename, &nd);
+        dentry = kern_path_locked(nodename, &parent);
-        if (err)
+        if (IS_ERR(dentry))
-                return err;
+                return PTR_ERR(dentry);
-        mutex_lock_nested(&nd.path.dentry->d_inode->i_mutex, I_MUTEX_PARENT);
+        if (dentry->d_inode) {
-        dentry = lookup_one_len(nd.last.name, nd.path.dentry, nd.last.len);
+                struct kstat stat;
-        if (!IS_ERR(dentry)) {
+                err = vfs_getattr(parent.mnt, dentry, &stat);
-                if (dentry->d_inode) {
+                if (!err && dev_mynode(dev, dentry->d_inode, &stat)) {
-                        err = vfs_getattr(nd.path.mnt, dentry, &stat);
+                        struct iattr newattrs;
-                        if (!err && dev_mynode(dev, dentry->d_inode, &stat)) {
+                        /*
-                                struct iattr newattrs;
+                         * before unlinking this node, reset permissions
-                                /*
+                         * of possible references like hardlinks
-                                 * before unlinking this node, reset permissions
+                         */
-                                 * of possible references like hardlinks
+                        newattrs.ia_uid = 0;
-                                 */
+                        newattrs.ia_gid = 0;
-                                newattrs.ia_uid = 0;
+                        newattrs.ia_mode = stat.mode & ~0777;
-                                newattrs.ia_gid = 0;
+                        newattrs.ia_valid =
-                                newattrs.ia_mode = stat.mode & ~0777;
+                                ATTR_UID|ATTR_GID|ATTR_MODE;
-                                newattrs.ia_valid =
+                        mutex_lock(&dentry->d_inode->i_mutex);
-                                        ATTR_UID|ATTR_GID|ATTR_MODE;
+                        notify_change(dentry, &newattrs);
-                                mutex_lock(&dentry->d_inode->i_mutex);
+                        mutex_unlock(&dentry->d_inode->i_mutex);
-                                notify_change(dentry, &newattrs);
+                        err = vfs_unlink(parent.dentry->d_inode, dentry);
-                                mutex_unlock(&dentry->d_inode->i_mutex);
+                        if (!err || err == -ENOENT)
-                                err = vfs_unlink(nd.path.dentry->d_inode,
+                                deleted = 1;
-                                                 dentry);
-                                if (!err || err == -ENOENT)
-                                        deleted = 1;
-                        }
-                } else {
-                        err = -ENOENT;
                }
-                dput(dentry);
        } else {
-                err = PTR_ERR(dentry);
+                err = -ENOENT;
        }
-        mutex_unlock(&nd.path.dentry->d_inode->i_mutex);
+        dput(dentry);
+        mutex_unlock(&parent.dentry->d_inode->i_mutex);
-        path_put(&nd.path);
+        path_put(&parent);
        if (deleted && strchr(nodename, '/'))
                delete_path(nodename);
        return err;
diff --git a/drivers/base/dma-buf.c b/drivers/base/dma-buf.c
index 24e88fe29ec1..c30f3e1d0efc 100644
--- a/drivers/base/dma-buf.c
+++ b/drivers/base/dma-buf.c
@@ -493,6 +493,7 @@ EXPORT_SYMBOL_GPL(dma_buf_vmap);
 /**
 * dma_buf_vunmap - Unmap a vmap obtained by dma_buf_vmap.
 * @dmabuf:     [in]    buffer to vunmap
+ * @vaddr:      [in]    vmap to vunmap
 */
 void dma_buf_vunmap(struct dma_buf *dmabuf, void *vaddr)
 {
diff --git a/drivers/base/dma-coherent.c b/drivers/base/dma-coherent.c
index 1b85949e3d2f..560a7173f810 100644
--- a/drivers/base/dma-coherent.c
+++ b/drivers/base/dma-coherent.c
@@ -186,6 +186,7 @@ EXPORT_SYMBOL(dma_release_from_coherent);
 * @vma:        vm_area for the userspace memory
 * @vaddr:      cpu address returned by dma_alloc_from_coherent
 * @size:       size of the memory buffer allocated by dma_alloc_from_coherent
+ * @ret:        result from remap_pfn_range()
 *
 * This checks whether the memory was allocated from the per-device
 * coherent memory pool and if so, maps that memory to the provided vma.
diff --git a/drivers/base/dma-mapping.c b/drivers/base/dma-mapping.c
index 6f3676f1559f..3fbedc75e7c5 100644
--- a/drivers/base/dma-mapping.c
+++ b/drivers/base/dma-mapping.c
@@ -10,6 +10,7 @@
 #include <linux/dma-mapping.h>
 #include <linux/export.h>
 #include <linux/gfp.h>
+#include <asm-generic/dma-coherent.h>
 /*
 * Managed DMA API
@@ -217,4 +218,52 @@ void dmam_release_declared_memory(struct device *dev)
 }
 EXPORT_SYMBOL(dmam_release_declared_memory);
+/*
+ * Create scatter-list for the already allocated DMA buffer.
+ */
+int dma_common_get_sgtable(struct device *dev, struct sg_table *sgt,
+                 void *cpu_addr, dma_addr_t handle, size_t size)
+{
+        struct page *page = virt_to_page(cpu_addr);
+        int ret;
+        ret = sg_alloc_table(sgt, 1, GFP_KERNEL);
+        if (unlikely(ret))
+                return ret;
+        sg_set_page(sgt->sgl, page, PAGE_ALIGN(size), 0);
+        return 0;
+}
+EXPORT_SYMBOL(dma_common_get_sgtable);
 #endif
+/*
+ * Create userspace mapping for the DMA-coherent memory.
+ */
+int dma_common_mmap(struct device *dev, struct vm_area_struct *vma,
+                    void *cpu_addr, dma_addr_t dma_addr, size_t size)
+{
+        int ret = -ENXIO;
+#ifdef CONFIG_MMU
+        unsigned long user_count = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
+        unsigned long count = PAGE_ALIGN(size) >> PAGE_SHIFT;
+        unsigned long pfn = page_to_pfn(virt_to_page(cpu_addr));
+        unsigned long off = vma->vm_pgoff;
+        vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
+        if (dma_mmap_from_coherent(dev, vma, cpu_addr, size, &ret))
+                return ret;
+        if (off < count && user_count <= (count - off)) {
+                ret = remap_pfn_range(vma, vma->vm_start,
+                                      pfn + off,
+                                      user_count << PAGE_SHIFT,
+                                      vma->vm_page_prot);
+        }
+#endif  /* CONFIG_MMU */
+        return ret;
+}
+EXPORT_SYMBOL(dma_common_mmap);
diff --git a/drivers/base/driver.c b/drivers/base/driver.c
index 207c27ddf828..974e301a1ef0 100644
--- a/drivers/base/driver.c
+++ b/drivers/base/driver.c
@@ -185,8 +185,12 @@ int driver_register(struct device_driver *drv)
        if (ret)
                return ret;
        ret = driver_add_groups(drv, drv->groups);
-        if (ret)
+        if (ret) {
                bus_remove_driver(drv);
+                return ret;
+        }
+        kobject_uevent(&drv->p->kobj, KOBJ_ADD);
        return ret;
 }
 EXPORT_SYMBOL_GPL(driver_register);
diff --git a/drivers/base/firmware_class.c b/drivers/base/firmware_class.c
index 5401814c874d..803cfc1597a9 100644
--- a/drivers/base/firmware_class.c
+++ b/drivers/base/firmware_class.c
@@ -22,8 +22,6 @@
 #include <linux/slab.h>
 #include <linux/sched.h>
-#define to_dev(obj) container_of(obj, struct device, kobj)
 MODULE_AUTHOR("Manuel Estrada Sainz");
 MODULE_DESCRIPTION("Multi purpose firmware loading support");
 MODULE_LICENSE("GPL");
@@ -290,7 +288,7 @@ static ssize_t firmware_data_read(struct file *filp, struct kobject *kobj,
                                  struct bin_attribute *bin_attr,
                                  char *buffer, loff_t offset, size_t count)
 {
-        struct device *dev = to_dev(kobj);
+        struct device *dev = kobj_to_dev(kobj);
        struct firmware_priv *fw_priv = to_firmware_priv(dev);
        struct firmware *fw;
        ssize_t ret_count;
@@ -384,7 +382,7 @@ static ssize_t firmware_data_write(struct file *filp, struct kobject *kobj,
                                   struct bin_attribute *bin_attr,
                                   char *buffer, loff_t offset, size_t count)
 {
-        struct device *dev = to_dev(kobj);
+        struct device *dev = kobj_to_dev(kobj);
        struct firmware_priv *fw_priv = to_firmware_priv(dev);
        struct firmware *fw;
        ssize_t retval;
diff --git a/drivers/base/power/clock_ops.c b/drivers/base/power/clock_ops.c
index 869d7ff2227f..eb78e9640c4a 100644
--- a/drivers/base/power/clock_ops.c
+++ b/drivers/base/power/clock_ops.c
@@ -169,8 +169,7 @@ void pm_clk_init(struct device *dev)
 */
 int pm_clk_create(struct device *dev)
 {
-        int ret = dev_pm_get_subsys_data(dev);
+        return dev_pm_get_subsys_data(dev);
-        return ret < 0 ? ret : 0;
 }
 /**
diff --git a/drivers/base/power/common.c b/drivers/base/power/common.c
index a14085cc613f..39c32529b833 100644
--- a/drivers/base/power/common.c
+++ b/drivers/base/power/common.c
@@ -24,7 +24,6 @@
 int dev_pm_get_subsys_data(struct device *dev)
 {
        struct pm_subsys_data *psd;
-        int ret = 0;
        psd = kzalloc(sizeof(*psd), GFP_KERNEL);
        if (!psd)
@@ -40,7 +39,6 @@ int dev_pm_get_subsys_data(struct device *dev)
                dev->power.subsys_data = psd;
                pm_clk_init(dev);
                psd = NULL;
-                ret = 1;
        }
        spin_unlock_irq(&dev->power.lock);
@@ -48,7 +46,7 @@ int dev_pm_get_subsys_data(struct device *dev)
        /* kfree() verifies that its argument is nonzero. */
        kfree(psd);
-        return ret;
+        return 0;
 }
 EXPORT_SYMBOL_GPL(dev_pm_get_subsys_data);
diff --git a/drivers/base/power/domain.c b/drivers/base/power/domain.c
index 83aa694a8efe..ba3487c9835b 100644
--- a/drivers/base/power/domain.c
+++ b/drivers/base/power/domain.c
@@ -75,19 +75,6 @@ static int genpd_start_dev(struct generic_pm_domain *genpd, struct device *dev)
                                        start_latency_ns, "start");
 }
-static int genpd_save_dev(struct generic_pm_domain *genpd, struct device *dev)
-{
-        return GENPD_DEV_TIMED_CALLBACK(genpd, int, save_state, dev,
-                                        save_state_latency_ns, "state save");
-}
-static int genpd_restore_dev(struct generic_pm_domain *genpd, struct device *dev)
-{
-        return GENPD_DEV_TIMED_CALLBACK(genpd, int, restore_state, dev,
-                                        restore_state_latency_ns,
-                                        "state restore");
-}
 static bool genpd_sd_counter_dec(struct generic_pm_domain *genpd)
 {
        bool ret = false;
@@ -139,6 +126,19 @@ static void genpd_set_active(struct generic_pm_domain *genpd)
                genpd->status = GPD_STATE_ACTIVE;
 }
+static void genpd_recalc_cpu_exit_latency(struct generic_pm_domain *genpd)
+{
+        s64 usecs64;
+        if (!genpd->cpu_data)
+                return;
+        usecs64 = genpd->power_on_latency_ns;
+        do_div(usecs64, NSEC_PER_USEC);
+        usecs64 += genpd->cpu_data->saved_exit_latency;
+        genpd->cpu_data->idle_state->exit_latency = usecs64;
+}
 /**
 * __pm_genpd_poweron - Restore power to a given PM domain and its masters.
 * @genpd: PM domain to power up.
@@ -146,7 +146,7 @@ static void genpd_set_active(struct generic_pm_domain *genpd)
 * Restore power to @genpd and all of its masters so that it is possible to
 * resume a device belonging to it.
 */
-int __pm_genpd_poweron(struct generic_pm_domain *genpd)
+static int __pm_genpd_poweron(struct generic_pm_domain *genpd)
        __releases(&genpd->lock) __acquires(&genpd->lock)
 {
        struct gpd_link *link;
@@ -176,6 +176,13 @@ int __pm_genpd_poweron(struct generic_pm_domain *genpd)
                return 0;
        }
+        if (genpd->cpu_data) {
+                cpuidle_pause_and_lock();
+                genpd->cpu_data->idle_state->disabled = true;
+                cpuidle_resume_and_unlock();
+                goto out;
+        }
        /*
         * The list is guaranteed not to change while the loop below is being
         * executed, unless one of the masters' .power_on() callbacks fiddles
@@ -215,6 +222,7 @@ int __pm_genpd_poweron(struct generic_pm_domain *genpd)
                if (elapsed_ns > genpd->power_on_latency_ns) {
                        genpd->power_on_latency_ns = elapsed_ns;
                        genpd->max_off_time_changed = true;
+                        genpd_recalc_cpu_exit_latency(genpd);
                        if (genpd->name)
                                pr_warning("%s: Power-on latency exceeded, "
                                        "new value %lld ns\n", genpd->name,
@@ -222,6 +230,7 @@ int __pm_genpd_poweron(struct generic_pm_domain *genpd)
                }
        }
+ out:
        genpd_set_active(genpd);
        return 0;
@@ -251,6 +260,19 @@ int pm_genpd_poweron(struct generic_pm_domain *genpd)
 #ifdef CONFIG_PM_RUNTIME
+static int genpd_save_dev(struct generic_pm_domain *genpd, struct device *dev)
+{
+        return GENPD_DEV_TIMED_CALLBACK(genpd, int, save_state, dev,
+                                        save_state_latency_ns, "state save");
+}
+static int genpd_restore_dev(struct generic_pm_domain *genpd, struct device *dev)
+{
+        return GENPD_DEV_TIMED_CALLBACK(genpd, int, restore_state, dev,
+                                        restore_state_latency_ns,
+                                        "state restore");
+}
 static int genpd_dev_pm_qos_notifier(struct notifier_block *nb,
                                     unsigned long val, void *ptr)
 {
@@ -275,7 +297,7 @@ static int genpd_dev_pm_qos_notifier(struct notifier_block *nb,
                pdd = dev->power.subsys_data ?
                                dev->power.subsys_data->domain_data : NULL;
-                if (pdd) {
+                if (pdd && pdd->dev) {
                        to_gpd_data(pdd)->td.constraint_changed = true;
                        genpd = dev_to_genpd(dev);
                } else {
@@ -339,19 +361,16 @@ static void __pm_genpd_restore_device(struct pm_domain_data *pdd,
 {
        struct generic_pm_domain_data *gpd_data = to_gpd_data(pdd);
        struct device *dev = pdd->dev;
+        bool need_restore = gpd_data->need_restore;
-        if (!gpd_data->need_restore)
+        gpd_data->need_restore = false;
-                return;
        mutex_unlock(&genpd->lock);
        genpd_start_dev(genpd, dev);
-        genpd_restore_dev(genpd, dev);
+        if (need_restore)
-        genpd_stop_dev(genpd, dev);
+                genpd_restore_dev(genpd, dev);
        mutex_lock(&genpd->lock);
-        gpd_data->need_restore = false;
 }
 /**
@@ -458,6 +477,21 @@ static int pm_genpd_poweroff(struct generic_pm_domain *genpd)
                }
        }
+        if (genpd->cpu_data) {
+                /*
+                 * If cpu_data is set, cpuidle should turn the domain off when
+                 * the CPU in it is idle.  In that case we don't decrement the
+                 * subdomain counts of the master domains, so that power is not
+                 * removed from the current domain prematurely as a result of
+                 * cutting off the masters' power.
+                 */
+                genpd->status = GPD_STATE_POWER_OFF;
+                cpuidle_pause_and_lock();
+                genpd->cpu_data->idle_state->disabled = false;
+                cpuidle_resume_and_unlock();
+                goto out;
+        }
        if (genpd->power_off) {
                ktime_t time_start;
                s64 elapsed_ns;
@@ -595,7 +629,7 @@ static int pm_genpd_runtime_resume(struct device *dev)
        /* If power.irq_safe, the PM domain is never powered off. */
        if (dev->power.irq_safe)
-                goto out;
+                return genpd_start_dev(genpd, dev);
        mutex_lock(&genpd->lock);
        ret = __pm_genpd_poweron(genpd);
@@ -628,9 +662,6 @@ static int pm_genpd_runtime_resume(struct device *dev)
        wake_up_all(&genpd->status_wait_queue);
        mutex_unlock(&genpd->lock);
- out:
-        genpd_start_dev(genpd, dev);
        return 0;
 }
@@ -1235,6 +1266,27 @@ static void pm_genpd_complete(struct device *dev)
 #endif /* CONFIG_PM_SLEEP */
+static struct generic_pm_domain_data *__pm_genpd_alloc_dev_data(struct device *dev)
+{
+        struct generic_pm_domain_data *gpd_data;
+        gpd_data = kzalloc(sizeof(*gpd_data), GFP_KERNEL);
+        if (!gpd_data)
+                return NULL;
+        mutex_init(&gpd_data->lock);
+        gpd_data->nb.notifier_call = genpd_dev_pm_qos_notifier;
+        dev_pm_qos_add_notifier(dev, &gpd_data->nb);
+        return gpd_data;
+}
+static void __pm_genpd_free_dev_data(struct device *dev,
+                                     struct generic_pm_domain_data *gpd_data)
+{
+        dev_pm_qos_remove_notifier(dev, &gpd_data->nb);
+        kfree(gpd_data);
+}
 /**
 * __pm_genpd_add_device - Add a device to an I/O PM domain.
 * @genpd: PM domain to add the device to.
@@ -1244,7 +1296,7 @@ static void pm_genpd_complete(struct device *dev)
 int __pm_genpd_add_device(struct generic_pm_domain *genpd, struct device *dev,
                          struct gpd_timing_data *td)
 {
-        struct generic_pm_domain_data *gpd_data;
+        struct generic_pm_domain_data *gpd_data_new, *gpd_data = NULL;
        struct pm_domain_data *pdd;
        int ret = 0;
@@ -1253,14 +1305,10 @@ int __pm_genpd_add_device(struct generic_pm_domain *genpd, struct device *dev,
        if (IS_ERR_OR_NULL(genpd) || IS_ERR_OR_NULL(dev))
                return -EINVAL;
-        gpd_data = kzalloc(sizeof(*gpd_data), GFP_KERNEL);
+        gpd_data_new = __pm_genpd_alloc_dev_data(dev);
-        if (!gpd_data)
+        if (!gpd_data_new)
                return -ENOMEM;
-        mutex_init(&gpd_data->lock);
-        gpd_data->nb.notifier_call = genpd_dev_pm_qos_notifier;
-        dev_pm_qos_add_notifier(dev, &gpd_data->nb);
        genpd_acquire_lock(genpd);
        if (genpd->prepared_count > 0) {
@@ -1274,35 +1322,42 @@ int __pm_genpd_add_device(struct generic_pm_domain *genpd, struct device *dev,
                        goto out;
                }
+        ret = dev_pm_get_subsys_data(dev);
+        if (ret)
+                goto out;
        genpd->device_count++;
        genpd->max_off_time_changed = true;
-        dev_pm_get_subsys_data(dev);
-        mutex_lock(&gpd_data->lock);
        spin_lock_irq(&dev->power.lock);
        dev->pm_domain = &genpd->domain;
-        dev->power.subsys_data->domain_data = &gpd_data->base;
+        if (dev->power.subsys_data->domain_data) {
-        gpd_data->base.dev = dev;
+                gpd_data = to_gpd_data(dev->power.subsys_data->domain_data);
-        list_add_tail(&gpd_data->base.list_node, &genpd->dev_list);
+        } else {
-        gpd_data->need_restore = genpd->status == GPD_STATE_POWER_OFF;
+                gpd_data = gpd_data_new;
+                dev->power.subsys_data->domain_data = &gpd_data->base;
+        }
+        gpd_data->refcount++;
        if (td)
                gpd_data->td = *td;
+        spin_unlock_irq(&dev->power.lock);
+        mutex_lock(&gpd_data->lock);
+        gpd_data->base.dev = dev;
+        list_add_tail(&gpd_data->base.list_node, &genpd->dev_list);
+        gpd_data->need_restore = genpd->status == GPD_STATE_POWER_OFF;
        gpd_data->td.constraint_changed = true;
        gpd_data->td.effective_constraint_ns = -1;
-        spin_unlock_irq(&dev->power.lock);
        mutex_unlock(&gpd_data->lock);
-        genpd_release_lock(genpd);
-        return 0;
 out:
        genpd_release_lock(genpd);
-        dev_pm_qos_remove_notifier(dev, &gpd_data->nb);
+        if (gpd_data != gpd_data_new)
-        kfree(gpd_data);
+                __pm_genpd_free_dev_data(dev, gpd_data_new);
        return ret;
 }
@@ -1348,6 +1403,7 @@ int pm_genpd_remove_device(struct generic_pm_domain *genpd,
 {
        struct generic_pm_domain_data *gpd_data;
        struct pm_domain_data *pdd;
+        bool remove = false;
        int ret = 0;
        dev_dbg(dev, "%s()\n", __func__);
@@ -1368,22 +1424,28 @@ int pm_genpd_remove_device(struct generic_pm_domain *genpd,
        genpd->max_off_time_changed = true;
        spin_lock_irq(&dev->power.lock);
        dev->pm_domain = NULL;
        pdd = dev->power.subsys_data->domain_data;
        list_del_init(&pdd->list_node);
-        dev->power.subsys_data->domain_data = NULL;
+        gpd_data = to_gpd_data(pdd);
+        if (--gpd_data->refcount == 0) {
+                dev->power.subsys_data->domain_data = NULL;
+                remove = true;
+        }
        spin_unlock_irq(&dev->power.lock);
-        gpd_data = to_gpd_data(pdd);
        mutex_lock(&gpd_data->lock);
        pdd->dev = NULL;
        mutex_unlock(&gpd_data->lock);
        genpd_release_lock(genpd);
-        dev_pm_qos_remove_notifier(dev, &gpd_data->nb);
-        kfree(gpd_data);
        dev_pm_put_subsys_data(dev);
+        if (remove)
+                __pm_genpd_free_dev_data(dev, gpd_data);
        return 0;
 out:
@@ -1541,33 +1603,52 @@ int pm_genpd_remove_subdomain(struct generic_pm_domain *genpd,
 * @dev: Device to add the callbacks to.
 * @ops: Set of callbacks to add.
 * @td: Timing data to add to the device along with the callbacks (optional).
+ *
+ * Every call to this routine should be balanced with a call to
+ * __pm_genpd_remove_callbacks() and they must not be nested.
 */
 int pm_genpd_add_callbacks(struct device *dev, struct gpd_dev_ops *ops,
                           struct gpd_timing_data *td)
 {
-        struct pm_domain_data *pdd;
+        struct generic_pm_domain_data *gpd_data_new, *gpd_data = NULL;
        int ret = 0;
-        if (!(dev && dev->power.subsys_data && ops))
+        if (!(dev && ops))
                return -EINVAL;
+        gpd_data_new = __pm_genpd_alloc_dev_data(dev);
+        if (!gpd_data_new)
+                return -ENOMEM;
        pm_runtime_disable(dev);
        device_pm_lock();
-        pdd = dev->power.subsys_data->domain_data;
+        ret = dev_pm_get_subsys_data(dev);
-        if (pdd) {
+        if (ret)
-                struct generic_pm_domain_data *gpd_data = to_gpd_data(pdd);
+                goto out;
-                gpd_data->ops = *ops;
+        spin_lock_irq(&dev->power.lock);
-                if (td)
-                        gpd_data->td = *td;
+        if (dev->power.subsys_data->domain_data) {
+                gpd_data = to_gpd_data(dev->power.subsys_data->domain_data);
        } else {
-                ret = -EINVAL;
+                gpd_data = gpd_data_new;
+                dev->power.subsys_data->domain_data = &gpd_data->base;
        }
+        gpd_data->refcount++;
+        gpd_data->ops = *ops;
+        if (td)
+                gpd_data->td = *td;
+        spin_unlock_irq(&dev->power.lock);
+ out:
        device_pm_unlock();
        pm_runtime_enable(dev);
+        if (gpd_data != gpd_data_new)
+                __pm_genpd_free_dev_data(dev, gpd_data_new);
        return ret;
 }
 EXPORT_SYMBOL_GPL(pm_genpd_add_callbacks);
@@ -1576,10 +1657,13 @@ EXPORT_SYMBOL_GPL(pm_genpd_add_callbacks);
 * __pm_genpd_remove_callbacks - Remove PM domain callbacks from a given device.
 * @dev: Device to remove the callbacks from.
 * @clear_td: If set, clear the device's timing data too.
+ *
+ * This routine can only be called after pm_genpd_add_callbacks().
 */
 int __pm_genpd_remove_callbacks(struct device *dev, bool clear_td)
 {
-        struct pm_domain_data *pdd;
+        struct generic_pm_domain_data *gpd_data = NULL;
+        bool remove = false;
        int ret = 0;
        if (!(dev && dev->power.subsys_data))
@@ -1588,24 +1672,118 @@ int __pm_genpd_remove_callbacks(struct device *dev, bool clear_td)
        pm_runtime_disable(dev);
        device_pm_lock();
-        pdd = dev->power.subsys_data->domain_data;
+        spin_lock_irq(&dev->power.lock);
-        if (pdd) {
-                struct generic_pm_domain_data *gpd_data = to_gpd_data(pdd);
-                gpd_data->ops = (struct gpd_dev_ops){ 0 };
+        if (dev->power.subsys_data->domain_data) {
+                gpd_data = to_gpd_data(dev->power.subsys_data->domain_data);
+                gpd_data->ops = (struct gpd_dev_ops){ NULL };
                if (clear_td)
                        gpd_data->td = (struct gpd_timing_data){ 0 };
+                if (--gpd_data->refcount == 0) {
+                        dev->power.subsys_data->domain_data = NULL;
+                        remove = true;
+                }
        } else {
                ret = -EINVAL;
        }
+        spin_unlock_irq(&dev->power.lock);
        device_pm_unlock();
        pm_runtime_enable(dev);
-        return ret;
+        if (ret)
+                return ret;
+        dev_pm_put_subsys_data(dev);
+        if (remove)
+                __pm_genpd_free_dev_data(dev, gpd_data);
+        return 0;
 }
 EXPORT_SYMBOL_GPL(__pm_genpd_remove_callbacks);
+int genpd_attach_cpuidle(struct generic_pm_domain *genpd, int state)
+{
+        struct cpuidle_driver *cpuidle_drv;
+        struct gpd_cpu_data *cpu_data;
+        struct cpuidle_state *idle_state;
+        int ret = 0;
+        if (IS_ERR_OR_NULL(genpd) || state < 0)
+                return -EINVAL;
+        genpd_acquire_lock(genpd);
+        if (genpd->cpu_data) {
+                ret = -EEXIST;
+                goto out;
+        }
+        cpu_data = kzalloc(sizeof(*cpu_data), GFP_KERNEL);
+        if (!cpu_data) {
+                ret = -ENOMEM;
+                goto out;
+        }
+        cpuidle_drv = cpuidle_driver_ref();
+        if (!cpuidle_drv) {
+                ret = -ENODEV;
+                goto out;
+        }
+        if (cpuidle_drv->state_count <= state) {
+                ret = -EINVAL;
+                goto err;
+        }
+        idle_state = &cpuidle_drv->states[state];
+        if (!idle_state->disabled) {
+                ret = -EAGAIN;
+                goto err;
+        }
+        cpu_data->idle_state = idle_state;
+        cpu_data->saved_exit_latency = idle_state->exit_latency;
+        genpd->cpu_data = cpu_data;
+        genpd_recalc_cpu_exit_latency(genpd);
+ out:
+        genpd_release_lock(genpd);
+        return ret;
+ err:
+        cpuidle_driver_unref();
+        goto out;
+}
+int genpd_detach_cpuidle(struct generic_pm_domain *genpd)
+{
+        struct gpd_cpu_data *cpu_data;
+        struct cpuidle_state *idle_state;
+        int ret = 0;
+        if (IS_ERR_OR_NULL(genpd))
+                return -EINVAL;
+        genpd_acquire_lock(genpd);
+        cpu_data = genpd->cpu_data;
+        if (!cpu_data) {
+                ret = -ENODEV;
+                goto out;
+        }
+        idle_state = cpu_data->idle_state;
+        if (!idle_state->disabled) {
+                ret = -EAGAIN;
+                goto out;
+        }
+        idle_state->exit_latency = cpu_data->saved_exit_latency;
+        cpuidle_driver_unref();
+        genpd->cpu_data = NULL;
+        kfree(cpu_data);
+ out:
+        genpd_release_lock(genpd);
+        return ret;
+}
 /* Default device callbacks for generic PM domains. */
 /**
@@ -1615,16 +1793,24 @@ EXPORT_SYMBOL_GPL(__pm_genpd_remove_callbacks);
 static int pm_genpd_default_save_state(struct device *dev)
 {
        int (*cb)(struct device *__dev);
-        struct device_driver *drv = dev->driver;
        cb = dev_gpd_data(dev)->ops.save_state;
        if (cb)
                return cb(dev);
-        if (drv && drv->pm && drv->pm->runtime_suspend)
+        if (dev->type && dev->type->pm)
-                return drv->pm->runtime_suspend(dev);
+                cb = dev->type->pm->runtime_suspend;
+        else if (dev->class && dev->class->pm)
+                cb = dev->class->pm->runtime_suspend;
+        else if (dev->bus && dev->bus->pm)
+                cb = dev->bus->pm->runtime_suspend;
+        else
+                cb = NULL;
-        return 0;
+        if (!cb && dev->driver && dev->driver->pm)
+                cb = dev->driver->pm->runtime_suspend;
+        return cb ? cb(dev) : 0;
 }
 /**
@@ -1634,16 +1820,24 @@ static int pm_genpd_default_save_state(struct device *dev)
 static int pm_genpd_default_restore_state(struct device *dev)
 {
        int (*cb)(struct device *__dev);
-        struct device_driver *drv = dev->driver;
        cb = dev_gpd_data(dev)->ops.restore_state;
        if (cb)
                return cb(dev);
-        if (drv && drv->pm && drv->pm->runtime_resume)
+        if (dev->type && dev->type->pm)
-                return drv->pm->runtime_resume(dev);
+                cb = dev->type->pm->runtime_resume;
+        else if (dev->class && dev->class->pm)
+                cb = dev->class->pm->runtime_resume;
+        else if (dev->bus && dev->bus->pm)
+                cb = dev->bus->pm->runtime_resume;
+        else
+                cb = NULL;
-        return 0;
+        if (!cb && dev->driver && dev->driver->pm)
+                cb = dev->driver->pm->runtime_resume;
+        return cb ? cb(dev) : 0;
 }
 #ifdef CONFIG_PM_SLEEP
diff --git a/drivers/base/power/main.c b/drivers/base/power/main.c
index e0fb5b0435a3..0113adc310dc 100644
--- a/drivers/base/power/main.c
+++ b/drivers/base/power/main.c
@@ -28,7 +28,7 @@
 #include <linux/sched.h>
 #include <linux/async.h>
 #include <linux/suspend.h>
+#include <linux/cpuidle.h>
 #include "../base.h"
 #include "power.h"
@@ -45,10 +45,10 @@ typedef int (*pm_callback_t)(struct device *);
 */
 LIST_HEAD(dpm_list);
-LIST_HEAD(dpm_prepared_list);
+static LIST_HEAD(dpm_prepared_list);
-LIST_HEAD(dpm_suspended_list);
+static LIST_HEAD(dpm_suspended_list);
-LIST_HEAD(dpm_late_early_list);
+static LIST_HEAD(dpm_late_early_list);
-LIST_HEAD(dpm_noirq_list);
+static LIST_HEAD(dpm_noirq_list);
 struct suspend_stats suspend_stats;
 static DEFINE_MUTEX(dpm_list_mtx);
@@ -166,7 +166,7 @@ static ktime_t initcall_debug_start(struct device *dev)
 {
        ktime_t calltime = ktime_set(0, 0);
-        if (initcall_debug) {
+        if (pm_print_times_enabled) {
                pr_info("calling  %s+ @ %i, parent: %s\n",
                        dev_name(dev), task_pid_nr(current),
                        dev->parent ? dev_name(dev->parent) : "none");
@@ -181,7 +181,7 @@ static void initcall_debug_report(struct device *dev, ktime_t calltime,
 {
        ktime_t delta, rettime;
-        if (initcall_debug) {
+        if (pm_print_times_enabled) {
                rettime = ktime_get();
                delta = ktime_sub(rettime, calltime);
                pr_info("call %s+ returned %d after %Ld usecs\n", dev_name(dev),
@@ -467,6 +467,7 @@ static void dpm_resume_noirq(pm_message_t state)
        mutex_unlock(&dpm_list_mtx);
        dpm_show_time(starttime, state, "noirq");
        resume_device_irqs();
+        cpuidle_resume();
 }
 /**
@@ -867,6 +868,7 @@ static int dpm_suspend_noirq(pm_message_t state)
        ktime_t starttime = ktime_get();
        int error = 0;
+        cpuidle_pause();
        suspend_device_irqs();
        mutex_lock(&dpm_list_mtx);
        while (!list_empty(&dpm_late_early_list)) {
@@ -989,8 +991,16 @@ static int dpm_suspend_late(pm_message_t state)
 int dpm_suspend_end(pm_message_t state)
 {
        int error = dpm_suspend_late(state);
+        if (error)
+                return error;
+        error = dpm_suspend_noirq(state);
+        if (error) {
+                dpm_resume_early(state);
+                return error;
+        }
-        return error ? : dpm_suspend_noirq(state);
+        return 0;
 }
 EXPORT_SYMBOL_GPL(dpm_suspend_end);
@@ -1031,7 +1041,7 @@ static int __device_suspend(struct device *dev, pm_message_t state, bool async)
        dpm_wait_for_children(dev, async);
        if (async_error)
-                return 0;
+                goto Complete;
        pm_runtime_get_noresume(dev);
        if (pm_runtime_barrier(dev) && device_may_wakeup(dev))
@@ -1040,7 +1050,7 @@ static int __device_suspend(struct device *dev, pm_message_t state, bool async)
        if (pm_wakeup_pending()) {
                pm_runtime_put_sync(dev);
                async_error = -EBUSY;
-                return 0;
+                goto Complete;
        }
        device_lock(dev);
@@ -1097,6 +1107,8 @@ static int __device_suspend(struct device *dev, pm_message_t state, bool async)
        }
        device_unlock(dev);
+ Complete:
        complete_all(&dev->power.completion);
        if (error) {
diff --git a/drivers/base/power/qos.c b/drivers/base/power/qos.c
index fd849a2c4fa8..74a67e0019a2 100644
--- a/drivers/base/power/qos.c
+++ b/drivers/base/power/qos.c
@@ -462,7 +462,7 @@ EXPORT_SYMBOL_GPL(dev_pm_qos_add_ancestor_request);
 static void __dev_pm_qos_drop_user_request(struct device *dev)
 {
        dev_pm_qos_remove_request(dev->power.pq_req);
-        dev->power.pq_req = 0;
+        dev->power.pq_req = NULL;
 }
 /**
diff --git a/drivers/base/power/runtime.c b/drivers/base/power/runtime.c
index 59894873a3b3..7d9c1cb1c39a 100644
--- a/drivers/base/power/runtime.c
+++ b/drivers/base/power/runtime.c
@@ -147,6 +147,8 @@ static int rpm_check_suspend_allowed(struct device *dev)
            || (dev->power.request_pending
                        && dev->power.request == RPM_REQ_RESUME))
                retval = -EAGAIN;
+        else if (__dev_pm_qos_read_value(dev) < 0)
+                retval = -EPERM;
        else if (dev->power.runtime_status == RPM_SUSPENDED)
                retval = 1;
@@ -388,7 +390,6 @@ static int rpm_suspend(struct device *dev, int rpmflags)
                goto repeat;
        }
-        dev->power.deferred_resume = false;
        if (dev->power.no_callbacks)
                goto no_callback;       /* Assume success. */
@@ -403,12 +404,6 @@ static int rpm_suspend(struct device *dev, int rpmflags)
                goto out;
        }
-        if (__dev_pm_qos_read_value(dev) < 0) {
-                /* Negative PM QoS constraint means "never suspend". */
-                retval = -EPERM;
-                goto out;
-        }
        __update_runtime_status(dev, RPM_SUSPENDING);
        if (dev->pm_domain)
@@ -440,6 +435,7 @@ static int rpm_suspend(struct device *dev, int rpmflags)
        wake_up_all(&dev->power.wait_queue);
        if (dev->power.deferred_resume) {
+                dev->power.deferred_resume = false;
                rpm_resume(dev, 0);
                retval = -EAGAIN;
                goto out;
@@ -584,6 +580,7 @@ static int rpm_resume(struct device *dev, int rpmflags)
                    || dev->parent->power.runtime_status == RPM_ACTIVE) {
                        atomic_inc(&dev->parent->power.child_count);
                        spin_unlock(&dev->parent->power.lock);
+                        retval = 1;
                        goto no_callback;       /* Assume success. */
                }
                spin_unlock(&dev->parent->power.lock);
@@ -664,7 +661,7 @@ static int rpm_resume(struct device *dev, int rpmflags)
        }
        wake_up_all(&dev->power.wait_queue);
-        if (!retval)
+        if (retval >= 0)
                rpm_idle(dev, RPM_ASYNC);
 out:
diff --git a/drivers/base/power/sysfs.c b/drivers/base/power/sysfs.c
index 48be2ad4dd2c..b91dc6f1e914 100644
--- a/drivers/base/power/sysfs.c
+++ b/drivers/base/power/sysfs.c
@@ -474,6 +474,8 @@ static DEVICE_ATTR(runtime_enabled, 0444, rtpm_enabled_show, NULL);
 #endif
+#ifdef CONFIG_PM_SLEEP
 static ssize_t async_show(struct device *dev, struct device_attribute *attr,
                          char *buf)
 {
@@ -500,6 +502,8 @@ static ssize_t async_store(struct device *dev, struct device_attribute *attr,
 }
 static DEVICE_ATTR(async, 0644, async_show, async_store);
+#endif
 #endif /* CONFIG_PM_ADVANCED_DEBUG */
 static struct attribute *power_attrs[] = {
diff --git a/drivers/base/regmap/internal.h b/drivers/base/regmap/internal.h
index b986b8660b0c..80f9ab9c3aa4 100644
--- a/drivers/base/regmap/internal.h
+++ b/drivers/base/regmap/internal.h
@@ -95,6 +95,9 @@ struct regmap {
        /* if set, converts bulk rw to single rw */
        bool use_single_rw;
+        struct rb_root range_tree;
+        void *selector_work_buf;        /* Scratch buffer used for selector */
 };
 struct regcache_ops {
@@ -115,6 +118,20 @@ bool regmap_precious(struct regmap *map, unsigned int reg);
 int _regmap_write(struct regmap *map, unsigned int reg,
                  unsigned int val);
+struct regmap_range_node {
+        struct rb_node node;
+        unsigned int range_min;
+        unsigned int range_max;
+        unsigned int selector_reg;
+        unsigned int selector_mask;
+        int selector_shift;
+        unsigned int window_start;
+        unsigned int window_len;
+};
 #ifdef CONFIG_DEBUG_FS
 extern void regmap_debugfs_initcall(void);
 extern void regmap_debugfs_init(struct regmap *map, const char *name);
diff --git a/drivers/base/regmap/regmap-irq.c b/drivers/base/regmap/regmap-irq.c
index 4fac4b9be88f..a89734621e51 100644
--- a/drivers/base/regmap/regmap-irq.c
+++ b/drivers/base/regmap/regmap-irq.c
@@ -24,14 +24,18 @@ struct regmap_irq_chip_data {
        struct mutex lock;
        struct regmap *map;
-        struct regmap_irq_chip *chip;
+        const struct regmap_irq_chip *chip;
        int irq_base;
        struct irq_domain *domain;
+        int irq;
+        int wake_count;
        unsigned int *status_buf;
        unsigned int *mask_buf;
        unsigned int *mask_buf_def;
+        unsigned int *wake_buf;
        unsigned int irq_reg_stride;
 };
@@ -71,6 +75,16 @@ static void regmap_irq_sync_unlock(struct irq_data *data)
                                d->chip->mask_base + (i * map->reg_stride));
        }
+        /* If we've changed our wakeup count propagate it to the parent */
+        if (d->wake_count < 0)
+                for (i = d->wake_count; i < 0; i++)
+                        irq_set_irq_wake(d->irq, 0);
+        else if (d->wake_count > 0)
+                for (i = 0; i < d->wake_count; i++)
+                        irq_set_irq_wake(d->irq, 1);
+        d->wake_count = 0;
        mutex_unlock(&d->lock);
 }
@@ -92,18 +106,41 @@ static void regmap_irq_disable(struct irq_data *data)
        d->mask_buf[irq_data->reg_offset / map->reg_stride] |= irq_data->mask;
 }
+static int regmap_irq_set_wake(struct irq_data *data, unsigned int on)
+{
+        struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data);
+        struct regmap *map = d->map;
+        const struct regmap_irq *irq_data = irq_to_regmap_irq(d, data->hwirq);
+        if (!d->chip->wake_base)
+                return -EINVAL;
+        if (on) {
+                d->wake_buf[irq_data->reg_offset / map->reg_stride]
+                        &= ~irq_data->mask;
+                d->wake_count++;
+        } else {
+                d->wake_buf[irq_data->reg_offset / map->reg_stride]
+                        |= irq_data->mask;
+                d->wake_count--;
+        }
+        return 0;
+}
 static struct irq_chip regmap_irq_chip = {
        .name                   = "regmap",
        .irq_bus_lock           = regmap_irq_lock,
        .irq_bus_sync_unlock    = regmap_irq_sync_unlock,
        .irq_disable            = regmap_irq_disable,
        .irq_enable             = regmap_irq_enable,
+        .irq_set_wake           = regmap_irq_set_wake,
 };
 static irqreturn_t regmap_irq_thread(int irq, void *d)
 {
        struct regmap_irq_chip_data *data = d;
-        struct regmap_irq_chip *chip = data->chip;
+        const struct regmap_irq_chip *chip = data->chip;
        struct regmap *map = data->map;
        int ret, i;
        bool handled = false;
@@ -195,7 +232,7 @@ static struct irq_domain_ops regmap_domain_ops = {
 * register values used by the IRQ controller over suspend and resume.
 */
 int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags,
-                        int irq_base, struct regmap_irq_chip *chip,
+                        int irq_base, const struct regmap_irq_chip *chip,
                        struct regmap_irq_chip_data **data)
 {
        struct regmap_irq_chip_data *d;
@@ -240,6 +277,14 @@ int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags,
        if (!d->mask_buf_def)
                goto err_alloc;
+        if (chip->wake_base) {
+                d->wake_buf = kzalloc(sizeof(unsigned int) * chip->num_regs,
+                                      GFP_KERNEL);
+                if (!d->wake_buf)
+                        goto err_alloc;
+        }
+        d->irq = irq;
        d->map = map;
        d->chip = chip;
        d->irq_base = irq_base;
@@ -294,6 +339,7 @@ int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags,
 err_domain:
        /* Should really dispose of the domain but... */
 err_alloc:
+        kfree(d->wake_buf);
        kfree(d->mask_buf_def);
        kfree(d->mask_buf);
        kfree(d->status_buf);
@@ -315,6 +361,7 @@ void regmap_del_irq_chip(int irq, struct regmap_irq_chip_data *d)
        free_irq(irq, d);
        /* We should unmap the domain but... */
+        kfree(d->wake_buf);
        kfree(d->mask_buf_def);
        kfree(d->mask_buf);
        kfree(d->status_buf);
@@ -346,6 +393,10 @@ EXPORT_SYMBOL_GPL(regmap_irq_chip_get_base);
 */
 int regmap_irq_get_virq(struct regmap_irq_chip_data *data, int irq)
 {
+        /* Handle holes in the IRQ list */
+        if (!data->chip->irqs[irq].mask)
+                return -EINVAL;
        return irq_create_mapping(data->domain, irq);
 }
 EXPORT_SYMBOL_GPL(regmap_irq_get_virq);
diff --git a/drivers/base/regmap/regmap-mmio.c b/drivers/base/regmap/regmap-mmio.c
index febd6de6c8ac..f05fc74dd84a 100644
--- a/drivers/base/regmap/regmap-mmio.c
+++ b/drivers/base/regmap/regmap-mmio.c
@@ -37,7 +37,7 @@ static int regmap_mmio_gather_write(void *context,
        BUG_ON(reg_size != 4);
-        offset = be32_to_cpup(reg);
+        offset = *(u32 *)reg;
        while (val_size) {
                switch (ctx->val_bytes) {
@@ -45,14 +45,14 @@ static int regmap_mmio_gather_write(void *context,
                        writeb(*(u8 *)val, ctx->regs + offset);
                        break;
                case 2:
-                        writew(be16_to_cpup(val), ctx->regs + offset);
+                        writew(*(u16 *)val, ctx->regs + offset);
                        break;
                case 4:
-                        writel(be32_to_cpup(val), ctx->regs + offset);
+                        writel(*(u32 *)val, ctx->regs + offset);
                        break;
 #ifdef CONFIG_64BIT
                case 8:
-                        writeq(be64_to_cpup(val), ctx->regs + offset);
+                        writeq(*(u64 *)val, ctx->regs + offset);
                        break;
 #endif
                default:
@@ -83,7 +83,7 @@ static int regmap_mmio_read(void *context,
        BUG_ON(reg_size != 4);
-        offset = be32_to_cpup(reg);
+        offset = *(u32 *)reg;
        while (val_size) {
                switch (ctx->val_bytes) {
@@ -91,14 +91,14 @@ static int regmap_mmio_read(void *context,
                        *(u8 *)val = readb(ctx->regs + offset);
                        break;
                case 2:
-                        *(u16 *)val = cpu_to_be16(readw(ctx->regs + offset));
+                        *(u16 *)val = readw(ctx->regs + offset);
                        break;
                case 4:
-                        *(u32 *)val = cpu_to_be32(readl(ctx->regs + offset));
+                        *(u32 *)val = readl(ctx->regs + offset);
                        break;
 #ifdef CONFIG_64BIT
                case 8:
-                        *(u64 *)val = cpu_to_be32(readq(ctx->regs + offset));
+                        *(u64 *)val = readq(ctx->regs + offset);
                        break;
 #endif
                default:
@@ -124,9 +124,11 @@ static struct regmap_bus regmap_mmio = {
        .gather_write = regmap_mmio_gather_write,
        .read = regmap_mmio_read,
        .free_context = regmap_mmio_free_context,
+        .reg_format_endian_default = REGMAP_ENDIAN_NATIVE,
+        .val_format_endian_default = REGMAP_ENDIAN_NATIVE,
 };
-struct regmap_mmio_context *regmap_mmio_gen_context(void __iomem *regs,
+static struct regmap_mmio_context *regmap_mmio_gen_context(void __iomem *regs,
                                        const struct regmap_config *config)
 {
        struct regmap_mmio_context *ctx;
@@ -162,7 +164,15 @@ struct regmap_mmio_context *regmap_mmio_gen_context(void __iomem *regs,
        if (config->reg_stride < min_stride)
                return ERR_PTR(-EINVAL);
-        ctx = kzalloc(GFP_KERNEL, sizeof(*ctx));
+        switch (config->reg_format_endian) {
+        case REGMAP_ENDIAN_DEFAULT:
+        case REGMAP_ENDIAN_NATIVE:
+                break;
+        default:
+                return ERR_PTR(-EINVAL);
+        }
+        ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
        if (!ctx)
                return ERR_PTR(-ENOMEM);
diff --git a/drivers/base/regmap/regmap.c b/drivers/base/regmap/regmap.c
index 0bcda488f11c..c241ae2f2f10 100644
--- a/drivers/base/regmap/regmap.c
+++ b/drivers/base/regmap/regmap.c
@@ -15,12 +15,25 @@
 #include <linux/export.h>
 #include <linux/mutex.h>
 #include <linux/err.h>
+#include <linux/rbtree.h>
 #define CREATE_TRACE_POINTS
 #include <trace/events/regmap.h>
 #include "internal.h"
+/*
+ * Sometimes for failures during very early init the trace
+ * infrastructure isn't available early enough to be used.  For this
+ * sort of problem defining LOG_DEVICE will add printks for basic
+ * register I/O on a specific device.
+ */
+#undef LOG_DEVICE
+static int _regmap_update_bits(struct regmap *map, unsigned int reg,
+                               unsigned int mask, unsigned int val,
+                               bool *change);
 bool regmap_writeable(struct regmap *map, unsigned int reg)
 {
        if (map->max_register && reg > map->max_register)
@@ -119,13 +132,19 @@ static void regmap_format_8(void *buf, unsigned int val, unsigned int shift)
        b[0] = val << shift;
 }
-static void regmap_format_16(void *buf, unsigned int val, unsigned int shift)
+static void regmap_format_16_be(void *buf, unsigned int val, unsigned int shift)
 {
        __be16 *b = buf;
        b[0] = cpu_to_be16(val << shift);
 }
+static void regmap_format_16_native(void *buf, unsigned int val,
+                                    unsigned int shift)
+{
+        *(u16 *)buf = val << shift;
+}
 static void regmap_format_24(void *buf, unsigned int val, unsigned int shift)
 {
        u8 *b = buf;
@@ -137,13 +156,19 @@ static void regmap_format_24(void *buf, unsigned int val, unsigned int shift)
        b[2] = val;
 }
-static void regmap_format_32(void *buf, unsigned int val, unsigned int shift)
+static void regmap_format_32_be(void *buf, unsigned int val, unsigned int shift)
 {
        __be32 *b = buf;
        b[0] = cpu_to_be32(val << shift);
 }
+static void regmap_format_32_native(void *buf, unsigned int val,
+                                    unsigned int shift)
+{
+        *(u32 *)buf = val << shift;
+}
 static unsigned int regmap_parse_8(void *buf)
 {
        u8 *b = buf;
@@ -151,7 +176,7 @@ static unsigned int regmap_parse_8(void *buf)
        return b[0];
 }
-static unsigned int regmap_parse_16(void *buf)
+static unsigned int regmap_parse_16_be(void *buf)
 {
        __be16 *b = buf;
@@ -160,6 +185,11 @@ static unsigned int regmap_parse_16(void *buf)
        return b[0];
 }
+static unsigned int regmap_parse_16_native(void *buf)
+{
+        return *(u16 *)buf;
+}
 static unsigned int regmap_parse_24(void *buf)
 {
        u8 *b = buf;
@@ -170,7 +200,7 @@ static unsigned int regmap_parse_24(void *buf)
        return ret;
 }
-static unsigned int regmap_parse_32(void *buf)
+static unsigned int regmap_parse_32_be(void *buf)
 {
        __be32 *b = buf;
@@ -179,6 +209,11 @@ static unsigned int regmap_parse_32(void *buf)
        return b[0];
 }
+static unsigned int regmap_parse_32_native(void *buf)
+{
+        return *(u32 *)buf;
+}
 static void regmap_lock_mutex(struct regmap *map)
 {
        mutex_lock(&map->mutex);
@@ -208,6 +243,67 @@ static void dev_get_regmap_release(struct device *dev, void *res)
         */
 }
+static bool _regmap_range_add(struct regmap *map,
+                              struct regmap_range_node *data)
+{
+        struct rb_root *root = &map->range_tree;
+        struct rb_node **new = &(root->rb_node), *parent = NULL;
+        while (*new) {
+                struct regmap_range_node *this =
+                        container_of(*new, struct regmap_range_node, node);
+                parent = *new;
+                if (data->range_max < this->range_min)
+                        new = &((*new)->rb_left);
+                else if (data->range_min > this->range_max)
+                        new = &((*new)->rb_right);
+                else
+                        return false;
+        }
+        rb_link_node(&data->node, parent, new);
+        rb_insert_color(&data->node, root);
+        return true;
+}
+static struct regmap_range_node *_regmap_range_lookup(struct regmap *map,
+                                                      unsigned int reg)
+{
+        struct rb_node *node = map->range_tree.rb_node;
+        while (node) {
+                struct regmap_range_node *this =
+                        container_of(node, struct regmap_range_node, node);
+                if (reg < this->range_min)
+                        node = node->rb_left;
+                else if (reg > this->range_max)
+                        node = node->rb_right;
+                else
+                        return this;
+        }
+        return NULL;
+}
+static void regmap_range_exit(struct regmap *map)
+{
+        struct rb_node *next;
+        struct regmap_range_node *range_node;
+        next = rb_first(&map->range_tree);
+        while (next) {
+                range_node = rb_entry(next, struct regmap_range_node, node);
+                next = rb_next(&range_node->node);
+                rb_erase(&range_node->node, &map->range_tree);
+                kfree(range_node);
+        }
+        kfree(map->selector_work_buf);
+}
 /**
 * regmap_init(): Initialise register map
 *
@@ -227,6 +323,8 @@ struct regmap *regmap_init(struct device *dev,
 {
        struct regmap *map, **m;
        int ret = -EINVAL;
+        enum regmap_endian reg_endian, val_endian;
+        int i, j;
        if (!bus || !config)
                goto err;
@@ -246,11 +344,11 @@ struct regmap *regmap_init(struct device *dev,
                map->lock = regmap_lock_mutex;
                map->unlock = regmap_unlock_mutex;
        }
-        map->format.buf_size = (config->reg_bits + config->val_bits) / 8;
        map->format.reg_bytes = DIV_ROUND_UP(config->reg_bits, 8);
        map->format.pad_bytes = config->pad_bits / 8;
        map->format.val_bytes = DIV_ROUND_UP(config->val_bits, 8);
-        map->format.buf_size += map->format.pad_bytes;
+        map->format.buf_size = DIV_ROUND_UP(config->reg_bits +
+                        config->val_bits + config->pad_bits, 8);
        map->reg_shift = config->pad_bits % 8;
        if (config->reg_stride)
                map->reg_stride = config->reg_stride;
@@ -275,6 +373,18 @@ struct regmap *regmap_init(struct device *dev,
                map->read_flag_mask = bus->read_flag_mask;
        }
+        reg_endian = config->reg_format_endian;
+        if (reg_endian == REGMAP_ENDIAN_DEFAULT)
+                reg_endian = bus->reg_format_endian_default;
+        if (reg_endian == REGMAP_ENDIAN_DEFAULT)
+                reg_endian = REGMAP_ENDIAN_BIG;
+        val_endian = config->val_format_endian;
+        if (val_endian == REGMAP_ENDIAN_DEFAULT)
+                val_endian = bus->val_format_endian_default;
+        if (val_endian == REGMAP_ENDIAN_DEFAULT)
+                val_endian = REGMAP_ENDIAN_BIG;
        switch (config->reg_bits + map->reg_shift) {
        case 2:
                switch (config->val_bits) {
@@ -321,11 +431,29 @@ struct regmap *regmap_init(struct device *dev,
                break;
        case 16:
-                map->format.format_reg = regmap_format_16;
+                switch (reg_endian) {
+                case REGMAP_ENDIAN_BIG:
+                        map->format.format_reg = regmap_format_16_be;
+                        break;
+                case REGMAP_ENDIAN_NATIVE:
+                        map->format.format_reg = regmap_format_16_native;
+                        break;
+                default:
+                        goto err_map;
+                }
                break;
        case 32:
-                map->format.format_reg = regmap_format_32;
+                switch (reg_endian) {
+                case REGMAP_ENDIAN_BIG:
+                        map->format.format_reg = regmap_format_32_be;
+                        break;
+                case REGMAP_ENDIAN_NATIVE:
+                        map->format.format_reg = regmap_format_32_native;
+                        break;
+                default:
+                        goto err_map;
+                }
                break;
        default:
@@ -338,21 +466,47 @@ struct regmap *regmap_init(struct device *dev,
                map->format.parse_val = regmap_parse_8;
                break;
        case 16:
-                map->format.format_val = regmap_format_16;
+                switch (val_endian) {
-                map->format.parse_val = regmap_parse_16;
+                case REGMAP_ENDIAN_BIG:
+                        map->format.format_val = regmap_format_16_be;
+                        map->format.parse_val = regmap_parse_16_be;
+                        break;
+                case REGMAP_ENDIAN_NATIVE:
+                        map->format.format_val = regmap_format_16_native;
+                        map->format.parse_val = regmap_parse_16_native;
+                        break;
+                default:
+                        goto err_map;
+                }
                break;
        case 24:
+                if (val_endian != REGMAP_ENDIAN_BIG)
+                        goto err_map;
                map->format.format_val = regmap_format_24;
                map->format.parse_val = regmap_parse_24;
                break;
        case 32:
-                map->format.format_val = regmap_format_32;
+                switch (val_endian) {
-                map->format.parse_val = regmap_parse_32;
+                case REGMAP_ENDIAN_BIG:
+                        map->format.format_val = regmap_format_32_be;
+                        map->format.parse_val = regmap_parse_32_be;
+                        break;
+                case REGMAP_ENDIAN_NATIVE:
+                        map->format.format_val = regmap_format_32_native;
+                        map->format.parse_val = regmap_parse_32_native;
+                        break;
+                default:
+                        goto err_map;
+                }
                break;
        }
-        if (map->format.format_write)
+        if (map->format.format_write) {
+                if ((reg_endian != REGMAP_ENDIAN_BIG) ||
+                    (val_endian != REGMAP_ENDIAN_BIG))
+                        goto err_map;
                map->use_single_rw = true;
+        }
        if (!map->format.format_write &&
            !(map->format.format_reg && map->format.format_val))
@@ -364,26 +518,88 @@ struct regmap *regmap_init(struct device *dev,
                goto err_map;
        }
-        regmap_debugfs_init(map, config->name);
+        map->range_tree = RB_ROOT;
+        for (i = 0; i < config->n_ranges; i++) {
+                const struct regmap_range_cfg *range_cfg = &config->ranges[i];
+                struct regmap_range_node *new;
+                /* Sanity check */
+                if (range_cfg->range_max < range_cfg->range_min ||
+                    range_cfg->range_max > map->max_register ||
+                    range_cfg->selector_reg > map->max_register ||
+                    range_cfg->window_len == 0)
+                        goto err_range;
+                /* Make sure, that this register range has no selector
+                   or data window within its boundary */
+                for (j = 0; j < config->n_ranges; j++) {
+                        unsigned sel_reg = config->ranges[j].selector_reg;
+                        unsigned win_min = config->ranges[j].window_start;
+                        unsigned win_max = win_min +
+                                           config->ranges[j].window_len - 1;
+                        if (range_cfg->range_min <= sel_reg &&
+                            sel_reg <= range_cfg->range_max) {
+                                goto err_range;
+                        }
+                        if (!(win_max < range_cfg->range_min ||
+                              win_min > range_cfg->range_max)) {
+                                goto err_range;
+                        }
+                }
+                new = kzalloc(sizeof(*new), GFP_KERNEL);
+                if (new == NULL) {
+                        ret = -ENOMEM;
+                        goto err_range;
+                }
+                new->range_min = range_cfg->range_min;
+                new->range_max = range_cfg->range_max;
+                new->selector_reg = range_cfg->selector_reg;
+                new->selector_mask = range_cfg->selector_mask;
+                new->selector_shift = range_cfg->selector_shift;
+                new->window_start = range_cfg->window_start;
+                new->window_len = range_cfg->window_len;
+                if (_regmap_range_add(map, new) == false) {
+                        kfree(new);
+                        goto err_range;
+                }
+                if (map->selector_work_buf == NULL) {
+                        map->selector_work_buf =
+                                kzalloc(map->format.buf_size, GFP_KERNEL);
+                        if (map->selector_work_buf == NULL) {
+                                ret = -ENOMEM;
+                                goto err_range;
+                        }
+                }
+        }
        ret = regcache_init(map, config);
        if (ret < 0)
-                goto err_free_workbuf;
+                goto err_range;
+        regmap_debugfs_init(map, config->name);
        /* Add a devres resource for dev_get_regmap() */
        m = devres_alloc(dev_get_regmap_release, sizeof(*m), GFP_KERNEL);
        if (!m) {
                ret = -ENOMEM;
-                goto err_cache;
+                goto err_debugfs;
        }
        *m = map;
        devres_add(dev, m);
        return map;
-err_cache:
+err_debugfs:
+        regmap_debugfs_exit(map);
        regcache_exit(map);
-err_free_workbuf:
+err_range:
+        regmap_range_exit(map);
        kfree(map->work_buf);
 err_map:
        kfree(map);
@@ -471,6 +687,7 @@ int regmap_reinit_cache(struct regmap *map, const struct regmap_config *config)
        return ret;
 }
+EXPORT_SYMBOL_GPL(regmap_reinit_cache);
 /**
 * regmap_exit(): Free a previously allocated register map
@@ -479,6 +696,7 @@ void regmap_exit(struct regmap *map)
 {
        regcache_exit(map);
        regmap_debugfs_exit(map);
+        regmap_range_exit(map);
        if (map->bus->free_context)
                map->bus->free_context(map->bus_context);
        kfree(map->work_buf);
@@ -524,6 +742,57 @@ struct regmap *dev_get_regmap(struct device *dev, const char *name)
 }
 EXPORT_SYMBOL_GPL(dev_get_regmap);
+static int _regmap_select_page(struct regmap *map, unsigned int *reg,
+                               unsigned int val_num)
+{
+        struct regmap_range_node *range;
+        void *orig_work_buf;
+        unsigned int win_offset;
+        unsigned int win_page;
+        bool page_chg;
+        int ret;
+        range = _regmap_range_lookup(map, *reg);
+        if (range) {
+                win_offset = (*reg - range->range_min) % range->window_len;
+                win_page = (*reg - range->range_min) / range->window_len;
+                if (val_num > 1) {
+                        /* Bulk write shouldn't cross range boundary */
+                        if (*reg + val_num - 1 > range->range_max)
+                                return -EINVAL;
+                        /* ... or single page boundary */
+                        if (val_num > range->window_len - win_offset)
+                                return -EINVAL;
+                }
+                /* It is possible to have selector register inside data window.
+                   In that case, selector register is located on every page and
+                   it needs no page switching, when accessed alone. */
+                if (val_num > 1 ||
+                    range->window_start + win_offset != range->selector_reg) {
+                        /* Use separate work_buf during page switching */
+                        orig_work_buf = map->work_buf;
+                        map->work_buf = map->selector_work_buf;
+                        ret = _regmap_update_bits(map, range->selector_reg,
+                                        range->selector_mask,
+                                        win_page << range->selector_shift,
+                                        &page_chg);
+                        map->work_buf = orig_work_buf;
+                        if (ret < 0)
+                                return ret;
+                }
+                *reg = range->window_start + win_offset;
+        }
+        return 0;
+}
 static int _regmap_raw_write(struct regmap *map, unsigned int reg,
                             const void *val, size_t val_len)
 {
@@ -561,6 +830,10 @@ static int _regmap_raw_write(struct regmap *map, unsigned int reg,
                }
        }
+        ret = _regmap_select_page(map, &reg, val_len / map->format.val_bytes);
+        if (ret < 0)
+                return ret;
        map->format.format_reg(map->work_buf, reg, map->reg_shift);
        u8[0] |= map->write_flag_mask;
@@ -621,9 +894,18 @@ int _regmap_write(struct regmap *map, unsigned int reg,
                }
        }
+#ifdef LOG_DEVICE
+        if (strcmp(dev_name(map->dev), LOG_DEVICE) == 0)
+                dev_info(map->dev, "%x <= %x\n", reg, val);
+#endif
        trace_regmap_reg_write(map->dev, reg, val);
        if (map->format.format_write) {
+                ret = _regmap_select_page(map, &reg, 1);
+                if (ret < 0)
+                        return ret;
                map->format.format_write(map, reg, val);
                trace_regmap_hw_write_start(map->dev, reg, 1);
@@ -781,6 +1063,10 @@ static int _regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
        u8 *u8 = map->work_buf;
        int ret;
+        ret = _regmap_select_page(map, &reg, val_len / map->format.val_bytes);
+        if (ret < 0)
+                return ret;
        map->format.format_reg(map->work_buf, reg, map->reg_shift);
        /*
@@ -824,6 +1110,12 @@ static int _regmap_read(struct regmap *map, unsigned int reg,
        ret = _regmap_raw_read(map, reg, map->work_buf, map->format.val_bytes);
        if (ret == 0) {
                *val = map->format.parse_val(map->work_buf);
+#ifdef LOG_DEVICE
+                if (strcmp(dev_name(map->dev), LOG_DEVICE) == 0)
+                        dev_info(map->dev, "%x => %x\n", reg, *val);
+#endif
                trace_regmap_reg_read(map->dev, reg, *val);
        }
@@ -980,11 +1272,9 @@ static int _regmap_update_bits(struct regmap *map, unsigned int reg,
        int ret;
        unsigned int tmp, orig;
-        map->lock(map);
        ret = _regmap_read(map, reg, &orig);
        if (ret != 0)
-                goto out;
+                return ret;
        tmp = orig & ~mask;
        tmp |= val & mask;
@@ -996,9 +1286,6 @@ static int _regmap_update_bits(struct regmap *map, unsigned int reg,
                *change = false;
        }
-out:
-        map->unlock(map);
        return ret;
 }
@@ -1016,7 +1303,13 @@ int regmap_update_bits(struct regmap *map, unsigned int reg,
                       unsigned int mask, unsigned int val)
 {
        bool change;
-        return _regmap_update_bits(map, reg, mask, val, &change);
+        int ret;
+        map->lock(map);
+        ret = _regmap_update_bits(map, reg, mask, val, &change);
+        map->unlock(map);
+        return ret;
 }
 EXPORT_SYMBOL_GPL(regmap_update_bits);
@@ -1036,7 +1329,12 @@ int regmap_update_bits_check(struct regmap *map, unsigned int reg,
                             unsigned int mask, unsigned int val,
                             bool *change)
 {
-        return _regmap_update_bits(map, reg, mask, val, change);
+        int ret;
+        map->lock(map);
+        ret = _regmap_update_bits(map, reg, mask, val, change);
+        map->unlock(map);
+        return ret;
 }
 EXPORT_SYMBOL_GPL(regmap_update_bits_check);
diff --git a/drivers/bcma/Kconfig b/drivers/bcma/Kconfig
index fb7c80fb721e..06b3207adebd 100644
--- a/drivers/bcma/Kconfig
+++ b/drivers/bcma/Kconfig
@@ -46,6 +46,25 @@ config BCMA_DRIVER_MIPS
          If unsure, say N
+config BCMA_SFLASH
+        bool
+        depends on BCMA_DRIVER_MIPS && BROKEN
+        default y
+config BCMA_NFLASH
+        bool
+        depends on BCMA_DRIVER_MIPS && BROKEN
+        default y
+config BCMA_DRIVER_GMAC_CMN
+        bool "BCMA Broadcom GBIT MAC COMMON core driver"
+        depends on BCMA
+        help
+          Driver for the Broadcom GBIT MAC COMMON core attached to Broadcom
+          specific Advanced Microcontroller Bus.
+          If unsure, say N
 config BCMA_DEBUG
        bool "BCMA debugging"
        depends on BCMA
diff --git a/drivers/bcma/Makefile b/drivers/bcma/Makefile
index 82de24e5340c..8ad42d41b2f2 100644
--- a/drivers/bcma/Makefile
+++ b/drivers/bcma/Makefile
@@ -1,8 +1,11 @@
 bcma-y                                  += main.o scan.o core.o sprom.o
 bcma-y                                  += driver_chipcommon.o driver_chipcommon_pmu.o
+bcma-$(CONFIG_BCMA_SFLASH)              += driver_chipcommon_sflash.o
+bcma-$(CONFIG_BCMA_NFLASH)              += driver_chipcommon_nflash.o
 bcma-y                                  += driver_pci.o
 bcma-$(CONFIG_BCMA_DRIVER_PCI_HOSTMODE) += driver_pci_host.o
 bcma-$(CONFIG_BCMA_DRIVER_MIPS)         += driver_mips.o
+bcma-$(CONFIG_BCMA_DRIVER_GMAC_CMN)     += driver_gmac_cmn.o
 bcma-$(CONFIG_BCMA_HOST_PCI)            += host_pci.o
 bcma-$(CONFIG_BCMA_HOST_SOC)            += host_soc.o
 obj-$(CONFIG_BCMA)                      += bcma.o
diff --git a/drivers/bcma/bcma_private.h b/drivers/bcma/bcma_private.h
index b81755bb4798..3cf9cc923cd2 100644
--- a/drivers/bcma/bcma_private.h
+++ b/drivers/bcma/bcma_private.h
@@ -10,6 +10,15 @@
 #define BCMA_CORE_SIZE          0x1000
+#define bcma_err(bus, fmt, ...) \
+        pr_err("bus%d: " fmt, (bus)->num, ##__VA_ARGS__)
+#define bcma_warn(bus, fmt, ...) \
+        pr_warn("bus%d: " fmt, (bus)->num, ##__VA_ARGS__)
+#define bcma_info(bus, fmt, ...) \
+        pr_info("bus%d: " fmt, (bus)->num, ##__VA_ARGS__)
+#define bcma_debug(bus, fmt, ...) \
+        pr_debug("bus%d: " fmt, (bus)->num, ##__VA_ARGS__)
 struct bcma_bus;
 /* main.c */
@@ -42,6 +51,28 @@ void bcma_chipco_serial_init(struct bcma_drv_cc *cc);
 u32 bcma_pmu_alp_clock(struct bcma_drv_cc *cc);
 u32 bcma_pmu_get_clockcpu(struct bcma_drv_cc *cc);
+#ifdef CONFIG_BCMA_SFLASH
+/* driver_chipcommon_sflash.c */
+int bcma_sflash_init(struct bcma_drv_cc *cc);
+#else
+static inline int bcma_sflash_init(struct bcma_drv_cc *cc)
+{
+        bcma_err(cc->core->bus, "Serial flash not supported\n");
+        return 0;
+}
+#endif /* CONFIG_BCMA_SFLASH */
+#ifdef CONFIG_BCMA_NFLASH
+/* driver_chipcommon_nflash.c */
+int bcma_nflash_init(struct bcma_drv_cc *cc);
+#else
+static inline int bcma_nflash_init(struct bcma_drv_cc *cc)
+{
+        bcma_err(cc->core->bus, "NAND flash not supported\n");
+        return 0;
+}
+#endif /* CONFIG_BCMA_NFLASH */
 #ifdef CONFIG_BCMA_HOST_PCI
 /* host_pci.c */
 extern int __init bcma_host_pci_init(void);
diff --git a/drivers/bcma/core.c b/drivers/bcma/core.c
index bc6e89212ad3..63c8b470536f 100644
--- a/drivers/bcma/core.c
+++ b/drivers/bcma/core.c
@@ -75,7 +75,7 @@ void bcma_core_set_clockmode(struct bcma_device *core,
                        udelay(10);
                }
                if (i)
-                        pr_err("HT force timeout\n");
+                        bcma_err(core->bus, "HT force timeout\n");
                break;
        case BCMA_CLKMODE_DYNAMIC:
                bcma_set32(core, BCMA_CLKCTLST, ~BCMA_CLKCTLST_FORCEHT);
@@ -102,9 +102,9 @@ void bcma_core_pll_ctl(struct bcma_device *core, u32 req, u32 status, bool on)
                        udelay(10);
                }
                if (i)
-                        pr_err("PLL enable timeout\n");
+                        bcma_err(core->bus, "PLL enable timeout\n");
        } else {
-                pr_warn("Disabling PLL not supported yet!\n");
+                bcma_warn(core->bus, "Disabling PLL not supported yet!\n");
        }
 }
 EXPORT_SYMBOL_GPL(bcma_core_pll_ctl);
@@ -120,8 +120,8 @@ u32 bcma_core_dma_translation(struct bcma_device *core)
                else
                        return BCMA_DMA_TRANSLATION_DMA32_CMT;
        default:
-                pr_err("DMA translation unknown for host %d\n",
+                bcma_err(core->bus, "DMA translation unknown for host %d\n",
-                       core->bus->hosttype);
+                         core->bus->hosttype);
        }
        return BCMA_DMA_TRANSLATION_NONE;
 }
diff --git a/drivers/bcma/driver_chipcommon.c b/drivers/bcma/driver_chipcommon.c
index e9f1b3fd252c..a4c3ebcc4c86 100644
--- a/drivers/bcma/driver_chipcommon.c
+++ b/drivers/bcma/driver_chipcommon.c
@@ -44,7 +44,7 @@ void bcma_core_chipcommon_init(struct bcma_drv_cc *cc)
        if (cc->capabilities & BCMA_CC_CAP_PMU)
                bcma_pmu_init(cc);
        if (cc->capabilities & BCMA_CC_CAP_PCTL)
-                pr_err("Power control not implemented!\n");
+                bcma_err(cc->core->bus, "Power control not implemented!\n");
        if (cc->core->id.rev >= 16) {
                if (cc->core->bus->sprom.leddc_on_time &&
@@ -137,8 +137,7 @@ void bcma_chipco_serial_init(struct bcma_drv_cc *cc)
                                       | BCMA_CC_CORECTL_UARTCLKEN);
                }
        } else {
-                pr_err("serial not supported on this device ccrev: 0x%x\n",
+                bcma_err(cc->core->bus, "serial not supported on this device ccrev: 0x%x\n", ccrev);
-                       ccrev);
                return;
        }
diff --git a/drivers/bcma/driver_chipcommon_nflash.c b/drivers/bcma/driver_chipcommon_nflash.c
new file mode 100644
index 000000000000..574d62435bc2
--- /dev/null
+++ b/drivers/bcma/driver_chipcommon_nflash.c
@@ -0,0 +1,19 @@
+/*
+ * Broadcom specific AMBA
+ * ChipCommon NAND flash interface
+ *
+ * Licensed under the GNU/GPL. See COPYING for details.
+ */
+#include <linux/bcma/bcma.h>
+#include <linux/bcma/bcma_driver_chipcommon.h>
+#include <linux/delay.h>
+#include "bcma_private.h"
+/* Initialize NAND flash access */
+int bcma_nflash_init(struct bcma_drv_cc *cc)
+{
+        bcma_err(cc->core->bus, "NAND flash support is broken\n");
+        return 0;
+}
diff --git a/drivers/bcma/driver_chipcommon_pmu.c b/drivers/bcma/driver_chipcommon_pmu.c
index a058842f14fd..c9a4f46c5143 100644
--- a/drivers/bcma/driver_chipcommon_pmu.c
+++ b/drivers/bcma/driver_chipcommon_pmu.c
@@ -3,7 +3,8 @@
 * ChipCommon Power Management Unit driver
 *
 * Copyright 2009, Michael Buesch <m@bues.ch>
- * Copyright 2007, Broadcom Corporation
+ * Copyright 2007, 2011, Broadcom Corporation
+ * Copyright 2011, 2012, Hauke Mehrtens <hauke@hauke-m.de>
 *
 * Licensed under the GNU/GPL. See COPYING for details.
 */
@@ -54,39 +55,19 @@ void bcma_chipco_regctl_maskset(struct bcma_drv_cc *cc, u32 offset, u32 mask,
 }
 EXPORT_SYMBOL_GPL(bcma_chipco_regctl_maskset);
-static void bcma_pmu_pll_init(struct bcma_drv_cc *cc)
-{
-        struct bcma_bus *bus = cc->core->bus;
-        switch (bus->chipinfo.id) {
-        case 0x4313:
-        case 0x4331:
-        case 43224:
-        case 43225:
-                break;
-        default:
-                pr_err("PLL init unknown for device 0x%04X\n",
-                        bus->chipinfo.id);
-        }
-}
 static void bcma_pmu_resources_init(struct bcma_drv_cc *cc)
 {
        struct bcma_bus *bus = cc->core->bus;
        u32 min_msk = 0, max_msk = 0;
        switch (bus->chipinfo.id) {
-        case 0x4313:
+        case BCMA_CHIP_ID_BCM4313:
                min_msk = 0x200D;
                max_msk = 0xFFFF;
                break;
-        case 0x4331:
-        case 43224:
-        case 43225:
-                break;
        default:
-                pr_err("PMU resource config unknown for device 0x%04X\n",
+                bcma_debug(bus, "PMU resource config unknown or not needed for device 0x%04X\n",
-                        bus->chipinfo.id);
+                           bus->chipinfo.id);
        }
        /* Set the resource masks. */
@@ -94,22 +75,9 @@ static void bcma_pmu_resources_init(struct bcma_drv_cc *cc)
                bcma_cc_write32(cc, BCMA_CC_PMU_MINRES_MSK, min_msk);
        if (max_msk)
                bcma_cc_write32(cc, BCMA_CC_PMU_MAXRES_MSK, max_msk);
-}
-void bcma_pmu_swreg_init(struct bcma_drv_cc *cc)
-{
-        struct bcma_bus *bus = cc->core->bus;
-        switch (bus->chipinfo.id) {
+        /* Add some delay; allow resources to come up and settle. */
-        case 0x4313:
+        mdelay(2);
-        case 0x4331:
-        case 43224:
-        case 43225:
-                break;
-        default:
-                pr_err("PMU switch/regulators init unknown for device "
-                        "0x%04X\n", bus->chipinfo.id);
-        }
 }
 /* Disable to allow reading SPROM. Don't know the adventages of enabling it. */
@@ -123,8 +91,11 @@ void bcma_chipco_bcm4331_ext_pa_lines_ctl(struct bcma_drv_cc *cc, bool enable)
                val |= BCMA_CHIPCTL_4331_EXTPA_EN;
                if (bus->chipinfo.pkg == 9 || bus->chipinfo.pkg == 11)
                        val |= BCMA_CHIPCTL_4331_EXTPA_ON_GPIO2_5;
+                else if (bus->chipinfo.rev > 0)
+                        val |= BCMA_CHIPCTL_4331_EXTPA_EN2;
        } else {
                val &= ~BCMA_CHIPCTL_4331_EXTPA_EN;
+                val &= ~BCMA_CHIPCTL_4331_EXTPA_EN2;
                val &= ~BCMA_CHIPCTL_4331_EXTPA_ON_GPIO2_5;
        }
        bcma_cc_write32(cc, BCMA_CC_CHIPCTL, val);
@@ -135,26 +106,38 @@ void bcma_pmu_workarounds(struct bcma_drv_cc *cc)
        struct bcma_bus *bus = cc->core->bus;
        switch (bus->chipinfo.id) {
-        case 0x4313:
+        case BCMA_CHIP_ID_BCM4313:
-                bcma_chipco_chipctl_maskset(cc, 0, ~0, 0x7);
+                /* enable 12 mA drive strenth for 4313 and set chipControl
+                   register bit 1 */
+                bcma_chipco_chipctl_maskset(cc, 0,
+                                            ~BCMA_CCTRL_4313_12MA_LED_DRIVE,
+                                            BCMA_CCTRL_4313_12MA_LED_DRIVE);
                break;
-        case 0x4331:
+        case BCMA_CHIP_ID_BCM4331:
-                /* BCM4331 workaround is SPROM-related, we put it in sprom.c */
+        case BCMA_CHIP_ID_BCM43431:
+                /* Ext PA lines must be enabled for tx on BCM4331 */
+                bcma_chipco_bcm4331_ext_pa_lines_ctl(cc, true);
                break;
-        case 43224:
+        case BCMA_CHIP_ID_BCM43224:
+        case BCMA_CHIP_ID_BCM43421:
+                /* enable 12 mA drive strenth for 43224 and set chipControl
+                   register bit 15 */
                if (bus->chipinfo.rev == 0) {
-                        pr_err("Workarounds for 43224 rev 0 not fully "
+                        bcma_cc_maskset32(cc, BCMA_CC_CHIPCTL,
-                                "implemented\n");
+                                          ~BCMA_CCTRL_43224_GPIO_TOGGLE,
-                        bcma_chipco_chipctl_maskset(cc, 0, ~0, 0x00F000F0);
+                                          BCMA_CCTRL_43224_GPIO_TOGGLE);
+                        bcma_chipco_chipctl_maskset(cc, 0,
+                                                    ~BCMA_CCTRL_43224A0_12MA_LED_DRIVE,
+                                                    BCMA_CCTRL_43224A0_12MA_LED_DRIVE);
                } else {
-                        bcma_chipco_chipctl_maskset(cc, 0, ~0, 0xF0);
+                        bcma_chipco_chipctl_maskset(cc, 0,
+                                                    ~BCMA_CCTRL_43224B0_12MA_LED_DRIVE,
+                                                    BCMA_CCTRL_43224B0_12MA_LED_DRIVE);
                }
                break;
-        case 43225:
-                break;
        default:
-                pr_err("Workarounds unknown for device 0x%04X\n",
+                bcma_debug(bus, "Workarounds unknown or not needed for device 0x%04X\n",
-                        bus->chipinfo.id);
+                           bus->chipinfo.id);
        }
 }
@@ -165,8 +148,8 @@ void bcma_pmu_init(struct bcma_drv_cc *cc)
        pmucap = bcma_cc_read32(cc, BCMA_CC_PMU_CAP);
        cc->pmu.rev = (pmucap & BCMA_CC_PMU_CAP_REVISION);
-        pr_debug("Found rev %u PMU (capabilities 0x%08X)\n", cc->pmu.rev,
+        bcma_debug(cc->core->bus, "Found rev %u PMU (capabilities 0x%08X)\n",
-                 pmucap);
+                   cc->pmu.rev, pmucap);
        if (cc->pmu.rev == 1)
                bcma_cc_mask32(cc, BCMA_CC_PMU_CTL,
@@ -175,12 +158,7 @@ void bcma_pmu_init(struct bcma_drv_cc *cc)
                bcma_cc_set32(cc, BCMA_CC_PMU_CTL,
                             BCMA_CC_PMU_CTL_NOILPONW);
-        if (cc->core->id.id == 0x4329 && cc->core->id.rev == 2)
-                pr_err("Fix for 4329b0 bad LPOM state not implemented!\n");
-        bcma_pmu_pll_init(cc);
        bcma_pmu_resources_init(cc);
-        bcma_pmu_swreg_init(cc);
        bcma_pmu_workarounds(cc);
 }
@@ -189,23 +167,22 @@ u32 bcma_pmu_alp_clock(struct bcma_drv_cc *cc)
        struct bcma_bus *bus = cc->core->bus;
        switch (bus->chipinfo.id) {
-        case 0x4716:
+        case BCMA_CHIP_ID_BCM4716:
-        case 0x4748:
+        case BCMA_CHIP_ID_BCM4748:
-        case 47162:
+        case BCMA_CHIP_ID_BCM47162:
-        case 0x4313:
+        case BCMA_CHIP_ID_BCM4313:
-        case 0x5357:
+        case BCMA_CHIP_ID_BCM5357:
-        case 0x4749:
+        case BCMA_CHIP_ID_BCM4749:
-        case 53572:
+        case BCMA_CHIP_ID_BCM53572:
                /* always 20Mhz */
                return 20000 * 1000;
-        case 0x5356:
+        case BCMA_CHIP_ID_BCM5356:
-        case 0x5300:
+        case BCMA_CHIP_ID_BCM4706:
                /* always 25Mhz */
                return 25000 * 1000;
        default:
-                pr_warn("No ALP clock specified for %04X device, "
+                bcma_warn(bus, "No ALP clock specified for %04X device, pmu rev. %d, using default %d Hz\n",
-                        "pmu rev. %d, using default %d Hz\n",
+                          bus->chipinfo.id, cc->pmu.rev, BCMA_CC_PMU_ALP_CLOCK);
-                        bus->chipinfo.id, cc->pmu.rev, BCMA_CC_PMU_ALP_CLOCK);
        }
        return BCMA_CC_PMU_ALP_CLOCK;
 }
@@ -222,7 +199,8 @@ static u32 bcma_pmu_clock(struct bcma_drv_cc *cc, u32 pll0, u32 m)
        BUG_ON(!m || m > 4);
-        if (bus->chipinfo.id == 0x5357 || bus->chipinfo.id == 0x4749) {
+        if (bus->chipinfo.id == BCMA_CHIP_ID_BCM5357 ||
+            bus->chipinfo.id == BCMA_CHIP_ID_BCM4749) {
                /* Detect failure in clock setting */
                tmp = bcma_cc_read32(cc, BCMA_CC_CHIPSTAT);
                if (tmp & 0x40000)
@@ -248,33 +226,62 @@ static u32 bcma_pmu_clock(struct bcma_drv_cc *cc, u32 pll0, u32 m)
        return (fc / div) * 1000000;
 }
+static u32 bcma_pmu_clock_bcm4706(struct bcma_drv_cc *cc, u32 pll0, u32 m)
+{
+        u32 tmp, ndiv, p1div, p2div;
+        u32 clock;
+        BUG_ON(!m || m > 4);
+        /* Get N, P1 and P2 dividers to determine CPU clock */
+        tmp = bcma_chipco_pll_read(cc, pll0 + BCMA_CC_PMU6_4706_PROCPLL_OFF);
+        ndiv = (tmp & BCMA_CC_PMU6_4706_PROC_NDIV_INT_MASK)
+                >> BCMA_CC_PMU6_4706_PROC_NDIV_INT_SHIFT;
+        p1div = (tmp & BCMA_CC_PMU6_4706_PROC_P1DIV_MASK)
+                >> BCMA_CC_PMU6_4706_PROC_P1DIV_SHIFT;
+        p2div = (tmp & BCMA_CC_PMU6_4706_PROC_P2DIV_MASK)
+                >> BCMA_CC_PMU6_4706_PROC_P2DIV_SHIFT;
+        tmp = bcma_cc_read32(cc, BCMA_CC_CHIPSTAT);
+        if (tmp & BCMA_CC_CHIPST_4706_PKG_OPTION)
+                /* Low cost bonding: Fixed reference clock 25MHz and m = 4 */
+                clock = (25000000 / 4) * ndiv * p2div / p1div;
+        else
+                /* Fixed reference clock 25MHz and m = 2 */
+                clock = (25000000 / 2) * ndiv * p2div / p1div;
+        if (m == BCMA_CC_PMU5_MAINPLL_SSB)
+                clock = clock / 4;
+        return clock;
+}
 /* query bus clock frequency for PMU-enabled chipcommon */
 u32 bcma_pmu_get_clockcontrol(struct bcma_drv_cc *cc)
 {
        struct bcma_bus *bus = cc->core->bus;
        switch (bus->chipinfo.id) {
-        case 0x4716:
+        case BCMA_CHIP_ID_BCM4716:
-        case 0x4748:
+        case BCMA_CHIP_ID_BCM4748:
-        case 47162:
+        case BCMA_CHIP_ID_BCM47162:
                return bcma_pmu_clock(cc, BCMA_CC_PMU4716_MAINPLL_PLL0,
                                      BCMA_CC_PMU5_MAINPLL_SSB);
-        case 0x5356:
+        case BCMA_CHIP_ID_BCM5356:
                return bcma_pmu_clock(cc, BCMA_CC_PMU5356_MAINPLL_PLL0,
                                      BCMA_CC_PMU5_MAINPLL_SSB);
-        case 0x5357:
+        case BCMA_CHIP_ID_BCM5357:
-        case 0x4749:
+        case BCMA_CHIP_ID_BCM4749:
                return bcma_pmu_clock(cc, BCMA_CC_PMU5357_MAINPLL_PLL0,
                                      BCMA_CC_PMU5_MAINPLL_SSB);
-        case 0x5300:
+        case BCMA_CHIP_ID_BCM4706:
-                return bcma_pmu_clock(cc, BCMA_CC_PMU4706_MAINPLL_PLL0,
+                return bcma_pmu_clock_bcm4706(cc, BCMA_CC_PMU4706_MAINPLL_PLL0,
-                                      BCMA_CC_PMU5_MAINPLL_SSB);
+                                              BCMA_CC_PMU5_MAINPLL_SSB);
-        case 53572:
+        case BCMA_CHIP_ID_BCM53572:
                return 75000000;
        default:
-                pr_warn("No backplane clock specified for %04X device, "
+                bcma_warn(bus, "No backplane clock specified for %04X device, pmu rev. %d, using default %d Hz\n",
-                        "pmu rev. %d, using default %d Hz\n",
+                          bus->chipinfo.id, cc->pmu.rev, BCMA_CC_PMU_HT_CLOCK);
-                        bus->chipinfo.id, cc->pmu.rev, BCMA_CC_PMU_HT_CLOCK);
        }
        return BCMA_CC_PMU_HT_CLOCK;
 }
@@ -284,17 +291,21 @@ u32 bcma_pmu_get_clockcpu(struct bcma_drv_cc *cc)
 {
        struct bcma_bus *bus = cc->core->bus;
-        if (bus->chipinfo.id == 53572)
+        if (bus->chipinfo.id == BCMA_CHIP_ID_BCM53572)
                return 300000000;
        if (cc->pmu.rev >= 5) {
                u32 pll;
                switch (bus->chipinfo.id) {
-                case 0x5356:
+                case BCMA_CHIP_ID_BCM4706:
+                        return bcma_pmu_clock_bcm4706(cc,
+                                                BCMA_CC_PMU4706_MAINPLL_PLL0,
+                                                BCMA_CC_PMU5_MAINPLL_CPU);
+                case BCMA_CHIP_ID_BCM5356:
                        pll = BCMA_CC_PMU5356_MAINPLL_PLL0;
                        break;
-                case 0x5357:
+                case BCMA_CHIP_ID_BCM5357:
-                case 0x4749:
+                case BCMA_CHIP_ID_BCM4749:
                        pll = BCMA_CC_PMU5357_MAINPLL_PLL0;
                        break;
                default:
@@ -302,10 +313,188 @@ u32 bcma_pmu_get_clockcpu(struct bcma_drv_cc *cc)
                        break;
                }
-                /* TODO: if (bus->chipinfo.id == 0x5300)
-                  return si_4706_pmu_clock(sih, osh, cc, PMU4706_MAINPLL_PLL0, PMU5_MAINPLL_CPU); */
                return bcma_pmu_clock(cc, pll, BCMA_CC_PMU5_MAINPLL_CPU);
        }
        return bcma_pmu_get_clockcontrol(cc);
 }
+static void bcma_pmu_spuravoid_pll_write(struct bcma_drv_cc *cc, u32 offset,
+                                         u32 value)
+{
+        bcma_cc_write32(cc, BCMA_CC_PLLCTL_ADDR, offset);
+        bcma_cc_write32(cc, BCMA_CC_PLLCTL_DATA, value);
+}
+void bcma_pmu_spuravoid_pllupdate(struct bcma_drv_cc *cc, int spuravoid)
+{
+        u32 tmp = 0;
+        u8 phypll_offset = 0;
+        u8 bcm5357_bcm43236_p1div[] = {0x1, 0x5, 0x5};
+        u8 bcm5357_bcm43236_ndiv[] = {0x30, 0xf6, 0xfc};
+        struct bcma_bus *bus = cc->core->bus;
+        switch (bus->chipinfo.id) {
+        case BCMA_CHIP_ID_BCM5357:
+        case BCMA_CHIP_ID_BCM4749:
+        case BCMA_CHIP_ID_BCM53572:
+                /* 5357[ab]0, 43236[ab]0, and 6362b0 */
+                /* BCM5357 needs to touch PLL1_PLLCTL[02],
+                   so offset PLL0_PLLCTL[02] by 6 */
+                phypll_offset = (bus->chipinfo.id == BCMA_CHIP_ID_BCM5357 ||
+                       bus->chipinfo.id == BCMA_CHIP_ID_BCM4749 ||
+                       bus->chipinfo.id == BCMA_CHIP_ID_BCM53572) ? 6 : 0;
+                /* RMW only the P1 divider */
+                bcma_cc_write32(cc, BCMA_CC_PLLCTL_ADDR,
+                                BCMA_CC_PMU_PLL_CTL0 + phypll_offset);
+                tmp = bcma_cc_read32(cc, BCMA_CC_PLLCTL_DATA);
+                tmp &= (~(BCMA_CC_PMU1_PLL0_PC0_P1DIV_MASK));
+                tmp |= (bcm5357_bcm43236_p1div[spuravoid] << BCMA_CC_PMU1_PLL0_PC0_P1DIV_SHIFT);
+                bcma_cc_write32(cc, BCMA_CC_PLLCTL_DATA, tmp);
+                /* RMW only the int feedback divider */
+                bcma_cc_write32(cc, BCMA_CC_PLLCTL_ADDR,
+                                BCMA_CC_PMU_PLL_CTL2 + phypll_offset);
+                tmp = bcma_cc_read32(cc, BCMA_CC_PLLCTL_DATA);
+                tmp &= ~(BCMA_CC_PMU1_PLL0_PC2_NDIV_INT_MASK);
+                tmp |= (bcm5357_bcm43236_ndiv[spuravoid]) << BCMA_CC_PMU1_PLL0_PC2_NDIV_INT_SHIFT;
+                bcma_cc_write32(cc, BCMA_CC_PLLCTL_DATA, tmp);
+                tmp = 1 << 10;
+                break;
+        case BCMA_CHIP_ID_BCM4331:
+        case BCMA_CHIP_ID_BCM43431:
+                if (spuravoid == 2) {
+                        bcma_pmu_spuravoid_pll_write(cc, BCMA_CC_PMU_PLL_CTL0,
+                                                     0x11500014);
+                        bcma_pmu_spuravoid_pll_write(cc, BCMA_CC_PMU_PLL_CTL2,
+                                                     0x0FC00a08);
+                } else if (spuravoid == 1) {
+                        bcma_pmu_spuravoid_pll_write(cc, BCMA_CC_PMU_PLL_CTL0,
+                                                     0x11500014);
+                        bcma_pmu_spuravoid_pll_write(cc, BCMA_CC_PMU_PLL_CTL2,
+                                                     0x0F600a08);
+                } else {
+                        bcma_pmu_spuravoid_pll_write(cc, BCMA_CC_PMU_PLL_CTL0,
+                                                     0x11100014);
+                        bcma_pmu_spuravoid_pll_write(cc, BCMA_CC_PMU_PLL_CTL2,
+                                                     0x03000a08);
+                }
+                tmp = 1 << 10;
+                break;
+        case BCMA_CHIP_ID_BCM43224:
+        case BCMA_CHIP_ID_BCM43225:
+        case BCMA_CHIP_ID_BCM43421:
+                if (spuravoid == 1) {
+                        bcma_pmu_spuravoid_pll_write(cc, BCMA_CC_PMU_PLL_CTL0,
+                                                     0x11500010);
+                        bcma_pmu_spuravoid_pll_write(cc, BCMA_CC_PMU_PLL_CTL1,
+                                                     0x000C0C06);
+                        bcma_pmu_spuravoid_pll_write(cc, BCMA_CC_PMU_PLL_CTL2,
+                                                     0x0F600a08);
+                        bcma_pmu_spuravoid_pll_write(cc, BCMA_CC_PMU_PLL_CTL3,
+                                                     0x00000000);
+                        bcma_pmu_spuravoid_pll_write(cc, BCMA_CC_PMU_PLL_CTL4,
+                                                     0x2001E920);
+                        bcma_pmu_spuravoid_pll_write(cc, BCMA_CC_PMU_PLL_CTL5,
+                                                     0x88888815);
+                } else {
+                        bcma_pmu_spuravoid_pll_write(cc, BCMA_CC_PMU_PLL_CTL0,
+                                                     0x11100010);
+                        bcma_pmu_spuravoid_pll_write(cc, BCMA_CC_PMU_PLL_CTL1,
+                                                     0x000c0c06);
+                        bcma_pmu_spuravoid_pll_write(cc, BCMA_CC_PMU_PLL_CTL2,
+                                                     0x03000a08);
+                        bcma_pmu_spuravoid_pll_write(cc, BCMA_CC_PMU_PLL_CTL3,
+                                                     0x00000000);
+                        bcma_pmu_spuravoid_pll_write(cc, BCMA_CC_PMU_PLL_CTL4,
+                                                     0x200005c0);
+                        bcma_pmu_spuravoid_pll_write(cc, BCMA_CC_PMU_PLL_CTL5,
+                                                     0x88888815);
+                }
+                tmp = 1 << 10;
+                break;
+        case BCMA_CHIP_ID_BCM4716:
+        case BCMA_CHIP_ID_BCM4748:
+        case BCMA_CHIP_ID_BCM47162:
+                if (spuravoid == 1) {
+                        bcma_pmu_spuravoid_pll_write(cc, BCMA_CC_PMU_PLL_CTL0,
+                                                     0x11500060);
+                        bcma_pmu_spuravoid_pll_write(cc, BCMA_CC_PMU_PLL_CTL1,
+                                                     0x080C0C06);
+                        bcma_pmu_spuravoid_pll_write(cc, BCMA_CC_PMU_PLL_CTL2,
+                                                     0x0F600000);
+                        bcma_pmu_spuravoid_pll_write(cc, BCMA_CC_PMU_PLL_CTL3,
+                                                     0x00000000);
+                        bcma_pmu_spuravoid_pll_write(cc, BCMA_CC_PMU_PLL_CTL4,
+                                                     0x2001E924);
+                        bcma_pmu_spuravoid_pll_write(cc, BCMA_CC_PMU_PLL_CTL5,
+                                                     0x88888815);
+                } else {
+                        bcma_pmu_spuravoid_pll_write(cc, BCMA_CC_PMU_PLL_CTL0,
+                                                     0x11100060);
+                        bcma_pmu_spuravoid_pll_write(cc, BCMA_CC_PMU_PLL_CTL1,
+                                                     0x080c0c06);
+                        bcma_pmu_spuravoid_pll_write(cc, BCMA_CC_PMU_PLL_CTL2,
+                                                     0x03000000);
+                        bcma_pmu_spuravoid_pll_write(cc, BCMA_CC_PMU_PLL_CTL3,
+                                                     0x00000000);
+                        bcma_pmu_spuravoid_pll_write(cc, BCMA_CC_PMU_PLL_CTL4,
+                                                     0x200005c0);
+                        bcma_pmu_spuravoid_pll_write(cc, BCMA_CC_PMU_PLL_CTL5,
+                                                     0x88888815);
+                }
+                tmp = 3 << 9;
+                break;
+        case BCMA_CHIP_ID_BCM43227:
+        case BCMA_CHIP_ID_BCM43228:
+        case BCMA_CHIP_ID_BCM43428:
+                /* LCNXN */
+                /* PLL Settings for spur avoidance on/off mode,
+                   no on2 support for 43228A0 */
+                if (spuravoid == 1) {
+                        bcma_pmu_spuravoid_pll_write(cc, BCMA_CC_PMU_PLL_CTL0,
+                                                     0x01100014);
+                        bcma_pmu_spuravoid_pll_write(cc, BCMA_CC_PMU_PLL_CTL1,
+                                                     0x040C0C06);
+                        bcma_pmu_spuravoid_pll_write(cc, BCMA_CC_PMU_PLL_CTL2,
+                                                     0x03140A08);
+                        bcma_pmu_spuravoid_pll_write(cc, BCMA_CC_PMU_PLL_CTL3,
+                                                     0x00333333);
+                        bcma_pmu_spuravoid_pll_write(cc, BCMA_CC_PMU_PLL_CTL4,
+                                                     0x202C2820);
+                        bcma_pmu_spuravoid_pll_write(cc, BCMA_CC_PMU_PLL_CTL5,
+                                                     0x88888815);
+                } else {
+                        bcma_pmu_spuravoid_pll_write(cc, BCMA_CC_PMU_PLL_CTL0,
+                                                     0x11100014);
+                        bcma_pmu_spuravoid_pll_write(cc, BCMA_CC_PMU_PLL_CTL1,
+                                                     0x040c0c06);
+                        bcma_pmu_spuravoid_pll_write(cc, BCMA_CC_PMU_PLL_CTL2,
+                                                     0x03000a08);
+                        bcma_pmu_spuravoid_pll_write(cc, BCMA_CC_PMU_PLL_CTL3,
+                                                     0x00000000);
+                        bcma_pmu_spuravoid_pll_write(cc, BCMA_CC_PMU_PLL_CTL4,
+                                                     0x200005c0);
+                        bcma_pmu_spuravoid_pll_write(cc, BCMA_CC_PMU_PLL_CTL5,
+                                                     0x88888815);
+                }
+                tmp = 1 << 10;
+                break;
+        default:
+                bcma_err(bus, "Unknown spuravoidance settings for chip 0x%04X, not changing PLL\n",
+                         bus->chipinfo.id);
+                break;
+        }
+        tmp |= bcma_cc_read32(cc, BCMA_CC_PMU_CTL);
+        bcma_cc_write32(cc, BCMA_CC_PMU_CTL, tmp);
+}
+EXPORT_SYMBOL_GPL(bcma_pmu_spuravoid_pllupdate);
diff --git a/drivers/bcma/driver_chipcommon_sflash.c b/drivers/bcma/driver_chipcommon_sflash.c
new file mode 100644
index 000000000000..6e157a58a1d7
--- /dev/null
+++ b/drivers/bcma/driver_chipcommon_sflash.c
@@ -0,0 +1,19 @@
+/*
+ * Broadcom specific AMBA
+ * ChipCommon serial flash interface
+ *
+ * Licensed under the GNU/GPL. See COPYING for details.
+ */
+#include <linux/bcma/bcma.h>
+#include <linux/bcma/bcma_driver_chipcommon.h>
+#include <linux/delay.h>
+#include "bcma_private.h"
+/* Initialize serial flash access */
+int bcma_sflash_init(struct bcma_drv_cc *cc)
+{
+        bcma_err(cc->core->bus, "Serial flash support is broken\n");
+        return 0;
+}
diff --git a/drivers/bcma/driver_gmac_cmn.c b/drivers/bcma/driver_gmac_cmn.c
new file mode 100644
index 000000000000..834225f65e8f
--- /dev/null
+++ b/drivers/bcma/driver_gmac_cmn.c
@@ -0,0 +1,14 @@
+/*
+ * Broadcom specific AMBA
+ * GBIT MAC COMMON Core
+ *
+ * Licensed under the GNU/GPL. See COPYING for details.
+ */
+#include "bcma_private.h"
+#include <linux/bcma/bcma.h>
+void __devinit bcma_core_gmac_cmn_init(struct bcma_drv_gmac_cmn *gc)
+{
+        mutex_init(&gc->phy_mutex);
+}
diff --git a/drivers/bcma/driver_mips.c b/drivers/bcma/driver_mips.c
index c3e9dff4224e..cc65b45b4368 100644
--- a/drivers/bcma/driver_mips.c
+++ b/drivers/bcma/driver_mips.c
@@ -22,15 +22,15 @@
 /* The 47162a0 hangs when reading MIPS DMP registers registers */
 static inline bool bcma_core_mips_bcm47162a0_quirk(struct bcma_device *dev)
 {
-        return dev->bus->chipinfo.id == 47162 && dev->bus->chipinfo.rev == 0 &&
+        return dev->bus->chipinfo.id == BCMA_CHIP_ID_BCM47162 &&
-               dev->id.id == BCMA_CORE_MIPS_74K;
+               dev->bus->chipinfo.rev == 0 && dev->id.id == BCMA_CORE_MIPS_74K;
 }
 /* The 5357b0 hangs when reading USB20H DMP registers */
 static inline bool bcma_core_mips_bcm5357b0_quirk(struct bcma_device *dev)
 {
-        return (dev->bus->chipinfo.id == 0x5357 ||
+        return (dev->bus->chipinfo.id == BCMA_CHIP_ID_BCM5357 ||
-                dev->bus->chipinfo.id == 0x4749) &&
+                dev->bus->chipinfo.id == BCMA_CHIP_ID_BCM4749) &&
               dev->bus->chipinfo.pkg == 11 &&
               dev->id.id == BCMA_CORE_USB20_HOST;
 }
@@ -131,7 +131,7 @@ static void bcma_core_mips_set_irq(struct bcma_device *dev, unsigned int irq)
                        /* backplane irq line is in use, find out who uses
                         * it and set user to irq 0
                         */
-                        list_for_each_entry_reverse(core, &bus->cores, list) {
+                        list_for_each_entry(core, &bus->cores, list) {
                                if ((1 << bcma_core_mips_irqflag(core)) ==
                                    oldirqflag) {
                                        bcma_core_mips_set_irq(core, 0);
@@ -143,8 +143,8 @@ static void bcma_core_mips_set_irq(struct bcma_device *dev, unsigned int irq)
                             1 << irqflag);
        }
-        pr_info("set_irq: core 0x%04x, irq %d => %d\n",
+        bcma_info(bus, "set_irq: core 0x%04x, irq %d => %d\n",
-                dev->id.id, oldirq + 2, irq + 2);
+                  dev->id.id, oldirq + 2, irq + 2);
 }
 static void bcma_core_mips_print_irq(struct bcma_device *dev, unsigned int irq)
@@ -161,7 +161,7 @@ static void bcma_core_mips_dump_irq(struct bcma_bus *bus)
 {
        struct bcma_device *core;
-        list_for_each_entry_reverse(core, &bus->cores, list) {
+        list_for_each_entry(core, &bus->cores, list) {
                bcma_core_mips_print_irq(core, bcma_core_mips_irq(core));
        }
 }
@@ -173,7 +173,7 @@ u32 bcma_cpu_clock(struct bcma_drv_mips *mcore)
        if (bus->drv_cc.capabilities & BCMA_CC_CAP_PMU)
                return bcma_pmu_get_clockcpu(&bus->drv_cc);
-        pr_err("No PMU available, need this to get the cpu clock\n");
+        bcma_err(bus, "No PMU available, need this to get the cpu clock\n");
        return 0;
 }
 EXPORT_SYMBOL(bcma_cpu_clock);
@@ -185,10 +185,11 @@ static void bcma_core_mips_flash_detect(struct bcma_drv_mips *mcore)
        switch (bus->drv_cc.capabilities & BCMA_CC_CAP_FLASHT) {
        case BCMA_CC_FLASHT_STSER:
        case BCMA_CC_FLASHT_ATSER:
-                pr_err("Serial flash not supported.\n");
+                bcma_debug(bus, "Found serial flash\n");
+                bcma_sflash_init(&bus->drv_cc);
                break;
        case BCMA_CC_FLASHT_PARA:
-                pr_info("found parallel flash.\n");
+                bcma_debug(bus, "Found parallel flash\n");
                bus->drv_cc.pflash.window = 0x1c000000;
                bus->drv_cc.pflash.window_size = 0x02000000;
@@ -199,7 +200,15 @@ static void bcma_core_mips_flash_detect(struct bcma_drv_mips *mcore)
                        bus->drv_cc.pflash.buswidth = 2;
                break;
        default:
-                pr_err("flash not supported.\n");
+                bcma_err(bus, "Flash type not supported\n");
+        }
+        if (bus->drv_cc.core->id.rev == 38 ||
+            bus->chipinfo.id == BCMA_CHIP_ID_BCM4706) {
+                if (bus->drv_cc.capabilities & BCMA_CC_CAP_NFLASH) {
+                        bcma_debug(bus, "Found NAND flash\n");
+                        bcma_nflash_init(&bus->drv_cc);
+                }
        }
 }
@@ -209,13 +218,13 @@ void bcma_core_mips_init(struct bcma_drv_mips *mcore)
        struct bcma_device *core;
        bus = mcore->core->bus;
-        pr_info("Initializing MIPS core...\n");
+        bcma_info(bus, "Initializing MIPS core...\n");
        if (!mcore->setup_done)
                mcore->assigned_irqs = 1;
        /* Assign IRQs to all cores on the bus */
-        list_for_each_entry_reverse(core, &bus->cores, list) {
+        list_for_each_entry(core, &bus->cores, list) {
                int mips_irq;
                if (core->irq)
                        continue;
@@ -244,7 +253,7 @@ void bcma_core_mips_init(struct bcma_drv_mips *mcore)
                        break;
                }
        }
-        pr_info("IRQ reconfiguration done\n");
+        bcma_info(bus, "IRQ reconfiguration done\n");
        bcma_core_mips_dump_irq(bus);
        if (mcore->setup_done)
diff --git a/drivers/bcma/driver_pci.c b/drivers/bcma/driver_pci.c
index 9a96f14c8f47..c32ebd537abe 100644
--- a/drivers/bcma/driver_pci.c
+++ b/drivers/bcma/driver_pci.c
@@ -232,17 +232,19 @@ void __devinit bcma_core_pci_init(struct bcma_drv_pci *pc)
 int bcma_core_pci_irq_ctl(struct bcma_drv_pci *pc, struct bcma_device *core,
                          bool enable)
 {
-        struct pci_dev *pdev = pc->core->bus->host_pci;
+        struct pci_dev *pdev;
        u32 coremask, tmp;
        int err = 0;
-        if (core->bus->hosttype != BCMA_HOSTTYPE_PCI) {
+        if (!pc || core->bus->hosttype != BCMA_HOSTTYPE_PCI) {
                /* This bcma device is not on a PCI host-bus. So the IRQs are
                 * not routed through the PCI core.
                 * So we must not enable routing through the PCI core. */
                goto out;
        }
+        pdev = pc->core->bus->host_pci;
        err = pci_read_config_dword(pdev, BCMA_PCI_IRQMASK, &tmp);
        if (err)
                goto out;
diff --git a/drivers/bcma/driver_pci_host.c b/drivers/bcma/driver_pci_host.c
index b9a86edfec39..cbae2c231336 100644
--- a/drivers/bcma/driver_pci_host.c
+++ b/drivers/bcma/driver_pci_host.c
@@ -36,7 +36,7 @@ bool __devinit bcma_core_pci_is_in_hostmode(struct bcma_drv_pci *pc)
                return false;
        if (bus->sprom.boardflags_lo & BCMA_CORE_PCI_BFL_NOPCI) {
-                pr_info("This PCI core is disabled and not working\n");
+                bcma_info(bus, "This PCI core is disabled and not working\n");
                return false;
        }
@@ -215,7 +215,8 @@ static int bcma_extpci_write_config(struct bcma_drv_pci *pc, unsigned int dev,
        } else {
                writel(val, mmio);
-                if (chipid == 0x4716 || chipid == 0x4748)
+                if (chipid == BCMA_CHIP_ID_BCM4716 ||
+                    chipid == BCMA_CHIP_ID_BCM4748)
                        readl(mmio);
        }
@@ -340,6 +341,7 @@ static u8 __devinit bcma_find_pci_capability(struct bcma_drv_pci *pc,
 */
 static void __devinit bcma_core_pci_enable_crs(struct bcma_drv_pci *pc)
 {
+        struct bcma_bus *bus = pc->core->bus;
        u8 cap_ptr, root_ctrl, root_cap, dev;
        u16 val16;
        int i;
@@ -378,7 +380,8 @@ static void __devinit bcma_core_pci_enable_crs(struct bcma_drv_pci *pc)
                                udelay(10);
                        }
                        if (val16 == 0x1)
-                                pr_err("PCI: Broken device in slot %d\n", dev);
+                                bcma_err(bus, "PCI: Broken device in slot %d\n",
+                                         dev);
                }
        }
 }
@@ -391,11 +394,11 @@ void __devinit bcma_core_pci_hostmode_init(struct bcma_drv_pci *pc)
        u32 pci_membase_1G;
        unsigned long io_map_base;
-        pr_info("PCIEcore in host mode found\n");
+        bcma_info(bus, "PCIEcore in host mode found\n");
        pc_host = kzalloc(sizeof(*pc_host), GFP_KERNEL);
        if (!pc_host)  {
-                pr_err("can not allocate memory");
+                bcma_err(bus, "can not allocate memory");
                return;
        }
@@ -434,13 +437,14 @@ void __devinit bcma_core_pci_hostmode_init(struct bcma_drv_pci *pc)
         * as mips can't generate 64-bit address on the
         * backplane.
         */
-        if (bus->chipinfo.id == 0x4716 || bus->chipinfo.id == 0x4748) {
+        if (bus->chipinfo.id == BCMA_CHIP_ID_BCM4716 ||
+            bus->chipinfo.id == BCMA_CHIP_ID_BCM4748) {
                pc_host->mem_resource.start = BCMA_SOC_PCI_MEM;
                pc_host->mem_resource.end = BCMA_SOC_PCI_MEM +
                                            BCMA_SOC_PCI_MEM_SZ - 1;
                pcicore_write32(pc, BCMA_CORE_PCI_SBTOPCI0,
                                BCMA_CORE_PCI_SBTOPCI_MEM | BCMA_SOC_PCI_MEM);
-        } else if (bus->chipinfo.id == 0x5300) {
+        } else if (bus->chipinfo.id == BCMA_CHIP_ID_BCM4706) {
                tmp = BCMA_CORE_PCI_SBTOPCI_MEM;
                tmp |= BCMA_CORE_PCI_SBTOPCI_PREF;
                tmp |= BCMA_CORE_PCI_SBTOPCI_BURST;
diff --git a/drivers/bcma/host_pci.c b/drivers/bcma/host_pci.c
index 6c05cf470f96..a6e5672c67e7 100644
--- a/drivers/bcma/host_pci.c
+++ b/drivers/bcma/host_pci.c
@@ -18,7 +18,7 @@ static void bcma_host_pci_switch_core(struct bcma_device *core)
        pci_write_config_dword(core->bus->host_pci, BCMA_PCI_BAR0_WIN2,
                               core->wrap);
        core->bus->mapped_core = core;
-        pr_debug("Switched to core: 0x%X\n", core->id.id);
+        bcma_debug(core->bus, "Switched to core: 0x%X\n", core->id.id);
 }
 /* Provides access to the requested core. Returns base offset that has to be
@@ -188,7 +188,7 @@ static int __devinit bcma_host_pci_probe(struct pci_dev *dev,
        /* SSB needed additional powering up, do we have any AMBA PCI cards? */
        if (!pci_is_pcie(dev))
-                pr_err("PCI card detected, report problems.\n");
+                bcma_err(bus, "PCI card detected, report problems.\n");
        /* Map MMIO */
        err = -ENOMEM;
@@ -268,9 +268,11 @@ static SIMPLE_DEV_PM_OPS(bcma_pm_ops, bcma_host_pci_suspend,
 static DEFINE_PCI_DEVICE_TABLE(bcma_pci_bridge_tbl) = {
        { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x0576) },
+        { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 43224) },
        { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4331) },
        { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4353) },
        { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4357) },
+        { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4359) },
        { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4727) },
        { 0, },
 };
diff --git a/drivers/bcma/main.c b/drivers/bcma/main.c
index 7e138ec21357..758af9ccdef0 100644
--- a/drivers/bcma/main.c
+++ b/drivers/bcma/main.c
@@ -61,6 +61,13 @@ static struct bus_type bcma_bus_type = {
        .dev_attrs      = bcma_device_attrs,
 };
+static u16 bcma_cc_core_id(struct bcma_bus *bus)
+{
+        if (bus->chipinfo.id == BCMA_CHIP_ID_BCM4706)
+                return BCMA_CORE_4706_CHIPCOMMON;
+        return BCMA_CORE_CHIPCOMMON;
+}
 struct bcma_device *bcma_find_core(struct bcma_bus *bus, u16 coreid)
 {
        struct bcma_device *core;
@@ -91,10 +98,12 @@ static int bcma_register_cores(struct bcma_bus *bus)
        list_for_each_entry(core, &bus->cores, list) {
                /* We support that cores ourself */
                switch (core->id.id) {
+                case BCMA_CORE_4706_CHIPCOMMON:
                case BCMA_CORE_CHIPCOMMON:
                case BCMA_CORE_PCI:
                case BCMA_CORE_PCIE:
                case BCMA_CORE_MIPS_74K:
+                case BCMA_CORE_4706_MAC_GBIT_COMMON:
                        continue;
                }
@@ -118,8 +127,9 @@ static int bcma_register_cores(struct bcma_bus *bus)
                err = device_register(&core->dev);
                if (err) {
-                        pr_err("Could not register dev for core 0x%03X\n",
+                        bcma_err(bus,
-                               core->id.id);
+                                 "Could not register dev for core 0x%03X\n",
+                                 core->id.id);
                        continue;
                }
                core->dev_registered = true;
@@ -151,12 +161,12 @@ int __devinit bcma_bus_register(struct bcma_bus *bus)
        /* Scan for devices (cores) */
        err = bcma_bus_scan(bus);
        if (err) {
-                pr_err("Failed to scan: %d\n", err);
+                bcma_err(bus, "Failed to scan: %d\n", err);
                return -1;
        }
        /* Init CC core */
-        core = bcma_find_core(bus, BCMA_CORE_CHIPCOMMON);
+        core = bcma_find_core(bus, bcma_cc_core_id(bus));
        if (core) {
                bus->drv_cc.core = core;
                bcma_core_chipcommon_init(&bus->drv_cc);
@@ -176,17 +186,24 @@ int __devinit bcma_bus_register(struct bcma_bus *bus)
                bcma_core_pci_init(&bus->drv_pci);
        }
+        /* Init GBIT MAC COMMON core */
+        core = bcma_find_core(bus, BCMA_CORE_4706_MAC_GBIT_COMMON);
+        if (core) {
+                bus->drv_gmac_cmn.core = core;
+                bcma_core_gmac_cmn_init(&bus->drv_gmac_cmn);
+        }
        /* Try to get SPROM */
        err = bcma_sprom_get(bus);
        if (err == -ENOENT) {
-                pr_err("No SPROM available\n");
+                bcma_err(bus, "No SPROM available\n");
        } else if (err)
-                pr_err("Failed to get SPROM: %d\n", err);
+                bcma_err(bus, "Failed to get SPROM: %d\n", err);
        /* Register found cores */
        bcma_register_cores(bus);
-        pr_info("Bus registered\n");
+        bcma_info(bus, "Bus registered\n");
        return 0;
 }
@@ -207,14 +224,14 @@ int __init bcma_bus_early_register(struct bcma_bus *bus,
        bcma_init_bus(bus);
        match.manuf = BCMA_MANUF_BCM;
-        match.id = BCMA_CORE_CHIPCOMMON;
+        match.id = bcma_cc_core_id(bus);
        match.class = BCMA_CL_SIM;
        match.rev = BCMA_ANY_REV;
        /* Scan for chip common core */
        err = bcma_bus_scan_early(bus, &match, core_cc);
        if (err) {
-                pr_err("Failed to scan for common core: %d\n", err);
+                bcma_err(bus, "Failed to scan for common core: %d\n", err);
                return -1;
        }
@@ -226,12 +243,12 @@ int __init bcma_bus_early_register(struct bcma_bus *bus,
        /* Scan for mips core */
        err = bcma_bus_scan_early(bus, &match, core_mips);
        if (err) {
-                pr_err("Failed to scan for mips core: %d\n", err);
+                bcma_err(bus, "Failed to scan for mips core: %d\n", err);
                return -1;
        }
        /* Init CC core */
-        core = bcma_find_core(bus, BCMA_CORE_CHIPCOMMON);
+        core = bcma_find_core(bus, bcma_cc_core_id(bus));
        if (core) {
                bus->drv_cc.core = core;
                bcma_core_chipcommon_init(&bus->drv_cc);
@@ -244,7 +261,7 @@ int __init bcma_bus_early_register(struct bcma_bus *bus,
                bcma_core_mips_init(&bus->drv_mips);
        }
-        pr_info("Early bus registered\n");
+        bcma_info(bus, "Early bus registered\n");
        return 0;
 }
@@ -270,8 +287,7 @@ int bcma_bus_resume(struct bcma_bus *bus)
        struct bcma_device *core;
        /* Init CC core */
-        core = bcma_find_core(bus, BCMA_CORE_CHIPCOMMON);
+        if (bus->drv_cc.core) {
-        if (core) {
                bus->drv_cc.setup_done = false;
                bcma_core_chipcommon_init(&bus->drv_cc);
        }
diff --git a/drivers/bcma/scan.c b/drivers/bcma/scan.c
index 5ed0718fc660..8d0b57164018 100644
--- a/drivers/bcma/scan.c
+++ b/drivers/bcma/scan.c
@@ -21,6 +21,7 @@ struct bcma_device_id_name {
 };
 static const struct bcma_device_id_name bcma_arm_device_names[] = {
+        { BCMA_CORE_4706_MAC_GBIT_COMMON, "BCM4706 GBit MAC Common" },
        { BCMA_CORE_ARM_1176, "ARM 1176" },
        { BCMA_CORE_ARM_7TDMI, "ARM 7TDMI" },
        { BCMA_CORE_ARM_CM3, "ARM CM3" },
@@ -28,6 +29,11 @@ static const struct bcma_device_id_name bcma_arm_device_names[] = {
 static const struct bcma_device_id_name bcma_bcm_device_names[] = {
        { BCMA_CORE_OOB_ROUTER, "OOB Router" },
+        { BCMA_CORE_4706_CHIPCOMMON, "BCM4706 ChipCommon" },
+        { BCMA_CORE_4706_SOC_RAM, "BCM4706 SOC RAM" },
+        { BCMA_CORE_4706_MAC_GBIT, "BCM4706 GBit MAC" },
+        { BCMA_CORE_AMEMC, "AMEMC (DDR)" },
+        { BCMA_CORE_ALTA, "ALTA (I2S)" },
        { BCMA_CORE_INVALID, "Invalid" },
        { BCMA_CORE_CHIPCOMMON, "ChipCommon" },
        { BCMA_CORE_ILINE20, "ILine 20" },
@@ -289,11 +295,15 @@ static int bcma_get_next_core(struct bcma_bus *bus, u32 __iomem **eromptr,
        /* check if component is a core at all */
        if (wrappers[0] + wrappers[1] == 0) {
-                /* we could save addrl of the router
+                /* Some specific cores don't need wrappers */
-                if (cid == BCMA_CORE_OOB_ROUTER)
+                switch (core->id.id) {
-                 */
+                case BCMA_CORE_4706_MAC_GBIT_COMMON:
-                bcma_erom_skip_component(bus, eromptr);
+                /* Not used yet: case BCMA_CORE_OOB_ROUTER: */
-                return -ENXIO;
+                        break;
+                default:
+                        bcma_erom_skip_component(bus, eromptr);
+                        return -ENXIO;
+                }
        }
        if (bcma_erom_is_bridge(bus, eromptr)) {
@@ -334,7 +344,7 @@ static int bcma_get_next_core(struct bcma_bus *bus, u32 __iomem **eromptr,
                if (tmp <= 0) {
                        return -EILSEQ;
                } else {
-                        pr_info("Bridge found\n");
+                        bcma_info(bus, "Bridge found\n");
                        return -ENXIO;
                }
        }
@@ -421,8 +431,8 @@ void bcma_init_bus(struct bcma_bus *bus)
        chipinfo->id = (tmp & BCMA_CC_ID_ID) >> BCMA_CC_ID_ID_SHIFT;
        chipinfo->rev = (tmp & BCMA_CC_ID_REV) >> BCMA_CC_ID_REV_SHIFT;
        chipinfo->pkg = (tmp & BCMA_CC_ID_PKG) >> BCMA_CC_ID_PKG_SHIFT;
-        pr_info("Found chip with id 0x%04X, rev 0x%02X and package 0x%02X\n",
+        bcma_info(bus, "Found chip with id 0x%04X, rev 0x%02X and package 0x%02X\n",
-                chipinfo->id, chipinfo->rev, chipinfo->pkg);
+                  chipinfo->id, chipinfo->rev, chipinfo->pkg);
        bus->init_done = true;
 }
@@ -452,8 +462,10 @@ int bcma_bus_scan(struct bcma_bus *bus)
        while (eromptr < eromend) {
                struct bcma_device *other_core;
                struct bcma_device *core = kzalloc(sizeof(*core), GFP_KERNEL);
-                if (!core)
+                if (!core) {
-                        return -ENOMEM;
+                        err = -ENOMEM;
+                        goto out;
+                }
                INIT_LIST_HEAD(&core->list);
                core->bus = bus;
@@ -468,7 +480,7 @@ int bcma_bus_scan(struct bcma_bus *bus)
                        } else if (err == -ESPIPE) {
                                break;
                        }
-                        return err;
+                        goto out;
                }
                core->core_index = core_num++;
@@ -476,19 +488,20 @@ int bcma_bus_scan(struct bcma_bus *bus)
                other_core = bcma_find_core_reverse(bus, core->id.id);
                core->core_unit = (other_core == NULL) ? 0 : other_core->core_unit + 1;
-                pr_info("Core %d found: %s "
+                bcma_info(bus, "Core %d found: %s (manuf 0x%03X, id 0x%03X, rev 0x%02X, class 0x%X)\n",
-                        "(manuf 0x%03X, id 0x%03X, rev 0x%02X, class 0x%X)\n",
+                          core->core_index, bcma_device_name(&core->id),
-                        core->core_index, bcma_device_name(&core->id),
+                          core->id.manuf, core->id.id, core->id.rev,
-                        core->id.manuf, core->id.id, core->id.rev,
+                          core->id.class);
-                        core->id.class);
-                list_add(&core->list, &bus->cores);
+                list_add_tail(&core->list, &bus->cores);
        }
+        err = 0;
+out:
        if (bus->hosttype == BCMA_HOSTTYPE_SOC)
                iounmap(eromptr);
-        return 0;
+        return err;
 }
 int __init bcma_bus_scan_early(struct bcma_bus *bus,
@@ -528,21 +541,21 @@ int __init bcma_bus_scan_early(struct bcma_bus *bus,
                else if (err == -ESPIPE)
                        break;
                else if (err < 0)
-                        return err;
+                        goto out;
                core->core_index = core_num++;
                bus->nr_cores++;
-                pr_info("Core %d found: %s "
+                bcma_info(bus, "Core %d found: %s (manuf 0x%03X, id 0x%03X, rev 0x%02X, class 0x%X)\n",
-                        "(manuf 0x%03X, id 0x%03X, rev 0x%02X, class 0x%X)\n",
+                          core->core_index, bcma_device_name(&core->id),
-                        core->core_index, bcma_device_name(&core->id),
+                          core->id.manuf, core->id.id, core->id.rev,
-                        core->id.manuf, core->id.id, core->id.rev,
+                          core->id.class);
-                        core->id.class);
-                list_add(&core->list, &bus->cores);
+                list_add_tail(&core->list, &bus->cores);
                err = 0;
                break;
        }
+out:
        if (bus->hosttype == BCMA_HOSTTYPE_SOC)
                iounmap(eromptr);
diff --git a/drivers/bcma/scan.h b/drivers/bcma/scan.h
index 113e6a66884c..30eb475e4d19 100644
--- a/drivers/bcma/scan.h
+++ b/drivers/bcma/scan.h
@@ -27,7 +27,7 @@
 #define SCAN_CIB_NMW            0x0007C000
 #define SCAN_CIB_NMW_SHIFT      14
 #define SCAN_CIB_NSW            0x00F80000
-#define SCAN_CIB_NSW_SHIFT      17
+#define SCAN_CIB_NSW_SHIFT      19
 #define SCAN_CIB_REV            0xFF000000
 #define SCAN_CIB_REV_SHIFT      24
diff --git a/drivers/bcma/sprom.c b/drivers/bcma/sprom.c
index c7f93359acb0..9ea4627dc0c2 100644
--- a/drivers/bcma/sprom.c
+++ b/drivers/bcma/sprom.c
@@ -60,11 +60,11 @@ static int bcma_fill_sprom_with_fallback(struct bcma_bus *bus,
        if (err)
                goto fail;
-        pr_debug("Using SPROM revision %d provided by"
+        bcma_debug(bus, "Using SPROM revision %d provided by platform.\n",
-                 " platform.\n", bus->sprom.revision);
+                   bus->sprom.revision);
        return 0;
 fail:
-        pr_warn("Using fallback SPROM failed (err %d)\n", err);
+        bcma_warn(bus, "Using fallback SPROM failed (err %d)\n", err);
        return err;
 }
@@ -468,11 +468,11 @@ static bool bcma_sprom_ext_available(struct bcma_bus *bus)
        /* older chipcommon revisions use chip status register */
        chip_status = bcma_read32(bus->drv_cc.core, BCMA_CC_CHIPSTAT);
        switch (bus->chipinfo.id) {
-        case 0x4313:
+        case BCMA_CHIP_ID_BCM4313:
                present_mask = BCMA_CC_CHIPST_4313_SPROM_PRESENT;
                break;
-        case 0x4331:
+        case BCMA_CHIP_ID_BCM4331:
                present_mask = BCMA_CC_CHIPST_4331_SPROM_PRESENT;
                break;
@@ -494,20 +494,22 @@ static bool bcma_sprom_onchip_available(struct bcma_bus *bus)
        chip_status = bcma_read32(bus->drv_cc.core, BCMA_CC_CHIPSTAT);
        switch (bus->chipinfo.id) {
-        case 0x4313:
+        case BCMA_CHIP_ID_BCM4313:
                present = chip_status & BCMA_CC_CHIPST_4313_OTP_PRESENT;
                break;
-        case 0x4331:
+        case BCMA_CHIP_ID_BCM4331:
                present = chip_status & BCMA_CC_CHIPST_4331_OTP_PRESENT;
                break;
-        case 43224:
+        case BCMA_CHIP_ID_BCM43224:
-        case 43225:
+        case BCMA_CHIP_ID_BCM43225:
                /* for these chips OTP is always available */
                present = true;
                break;
+        case BCMA_CHIP_ID_BCM43228:
+                present = chip_status & BCMA_CC_CHIPST_43228_OTP_PRESENT;
+                break;
        default:
                present = false;
                break;
@@ -579,13 +581,15 @@ int bcma_sprom_get(struct bcma_bus *bus)
        if (!sprom)
                return -ENOMEM;
-        if (bus->chipinfo.id == 0x4331)
+        if (bus->chipinfo.id == BCMA_CHIP_ID_BCM4331 ||
+            bus->chipinfo.id == BCMA_CHIP_ID_BCM43431)
                bcma_chipco_bcm4331_ext_pa_lines_ctl(&bus->drv_cc, false);
-        pr_debug("SPROM offset 0x%x\n", offset);
+        bcma_debug(bus, "SPROM offset 0x%x\n", offset);
        bcma_sprom_read(bus, offset, sprom);
-        if (bus->chipinfo.id == 0x4331)
+        if (bus->chipinfo.id == BCMA_CHIP_ID_BCM4331 ||
+            bus->chipinfo.id == BCMA_CHIP_ID_BCM43431)
                bcma_chipco_bcm4331_ext_pa_lines_ctl(&bus->drv_cc, true);
        err = bcma_sprom_valid(sprom);
diff --git a/drivers/block/cciss_scsi.c b/drivers/block/cciss_scsi.c
index acda773b3720..38aa6dda6b81 100644
--- a/drivers/block/cciss_scsi.c
+++ b/drivers/block/cciss_scsi.c
@@ -763,16 +763,7 @@ static void complete_scsi_command(CommandList_struct *c, int timeout,
                {
                        case CMD_TARGET_STATUS:
                                /* Pass it up to the upper layers... */
-                                if( ei->ScsiStatus)
+                                if (!ei->ScsiStatus) {
-                                {
-#if 0
-                                        printk(KERN_WARNING "cciss: cmd %p "
-                                                "has SCSI Status = %x\n",
-                                                c, ei->ScsiStatus);
-#endif
-                                        cmd->result |= (ei->ScsiStatus << 1);
-                                }
-                                else {  /* scsi status is zero??? How??? */
                                        
        /* Ordinarily, this case should never happen, but there is a bug
           in some released firmware revisions that allows it to happen
diff --git a/drivers/block/drbd/drbd_actlog.c b/drivers/block/drbd/drbd_actlog.c
index e54e31b02b88..3fbef018ce55 100644
--- a/drivers/block/drbd/drbd_actlog.c
+++ b/drivers/block/drbd/drbd_actlog.c
@@ -411,7 +411,7 @@ w_al_write_transaction(struct drbd_conf *mdev, struct drbd_work *w, int unused)
                + mdev->ldev->md.al_offset + mdev->al_tr_pos;
        if (!drbd_md_sync_page_io(mdev, mdev->ldev, sector, WRITE))
-                drbd_chk_io_error(mdev, 1, true);
+                drbd_chk_io_error(mdev, 1, DRBD_META_IO_ERROR);
        if (++mdev->al_tr_pos >
            div_ceil(mdev->act_log->nr_elements, AL_EXTENTS_PT))
@@ -876,7 +876,11 @@ int __drbd_set_out_of_sync(struct drbd_conf *mdev, sector_t sector, int size,
        unsigned int enr, count = 0;
        struct lc_element *e;
-        if (size <= 0 || (size & 0x1ff) != 0 || size > DRBD_MAX_BIO_SIZE) {
+        /* this should be an empty REQ_FLUSH */
+        if (size == 0)
+                return 0;
+        if (size < 0 || (size & 0x1ff) != 0 || size > DRBD_MAX_BIO_SIZE) {
                dev_err(DEV, "sector: %llus, size: %d\n",
                        (unsigned long long)sector, size);
                return 0;
diff --git a/drivers/block/drbd/drbd_bitmap.c b/drivers/block/drbd/drbd_bitmap.c
index b5c5ff53cb57..d84566496746 100644
--- a/drivers/block/drbd/drbd_bitmap.c
+++ b/drivers/block/drbd/drbd_bitmap.c
@@ -889,6 +889,7 @@ struct bm_aio_ctx {
        unsigned int done;
        unsigned flags;
 #define BM_AIO_COPY_PAGES       1
+#define BM_WRITE_ALL_PAGES      2
        int error;
        struct kref kref;
 };
@@ -1059,7 +1060,8 @@ static int bm_rw(struct drbd_conf *mdev, int rw, unsigned flags, unsigned lazy_w
                if (lazy_writeout_upper_idx && i == lazy_writeout_upper_idx)
                        break;
                if (rw & WRITE) {
-                        if (bm_test_page_unchanged(b->bm_pages[i])) {
+                        if (!(flags & BM_WRITE_ALL_PAGES) &&
+                            bm_test_page_unchanged(b->bm_pages[i])) {
                                dynamic_dev_dbg(DEV, "skipped bm write for idx %u\n", i);
                                continue;
                        }
@@ -1096,7 +1098,7 @@ static int bm_rw(struct drbd_conf *mdev, int rw, unsigned flags, unsigned lazy_w
        if (ctx->error) {
                dev_alert(DEV, "we had at least one MD IO ERROR during bitmap IO\n");
-                drbd_chk_io_error(mdev, 1, true);
+                drbd_chk_io_error(mdev, 1, DRBD_META_IO_ERROR);
                err = -EIO; /* ctx->error ? */
        }
@@ -1141,6 +1143,17 @@ int drbd_bm_write(struct drbd_conf *mdev) __must_hold(local)
 }
 /**
+ * drbd_bm_write_all() - Write the whole bitmap to its on disk location.
+ * @mdev:       DRBD device.
+ *
+ * Will write all pages.
+ */
+int drbd_bm_write_all(struct drbd_conf *mdev) __must_hold(local)
+{
+        return bm_rw(mdev, WRITE, BM_WRITE_ALL_PAGES, 0);
+}
+/**
 * drbd_bm_lazy_write_out() - Write bitmap pages 0 to @upper_idx-1, if they have changed.
 * @mdev:       DRBD device.
 * @upper_idx:  0: write all changed pages; +ve: page index to stop scanning for changed pages
@@ -1212,7 +1225,7 @@ int drbd_bm_write_page(struct drbd_conf *mdev, unsigned int idx) __must_hold(loc
        wait_until_done_or_disk_failure(mdev, mdev->ldev, &ctx->done);
        if (ctx->error)
-                drbd_chk_io_error(mdev, 1, true);
+                drbd_chk_io_error(mdev, 1, DRBD_META_IO_ERROR);
                /* that should force detach, so the in memory bitmap will be
                 * gone in a moment as well. */
@@ -1475,10 +1488,17 @@ void _drbd_bm_set_bits(struct drbd_conf *mdev, const unsigned long s, const unsi
                first_word = 0;
                spin_lock_irq(&b->bm_lock);
        }
        /* last page (respectively only page, for first page == last page) */
        last_word = MLPP(el >> LN2_BPL);
-        bm_set_full_words_within_one_page(mdev->bitmap, last_page, first_word, last_word);
+        /* consider bitmap->bm_bits = 32768, bitmap->bm_number_of_pages = 1. (or multiples).
+         * ==> e = 32767, el = 32768, last_page = 2,
+         * and now last_word = 0.
+         * We do not want to touch last_page in this case,
+         * as we did not allocate it, it is not present in bitmap->bm_pages.
+         */
+        if (last_word)
+                bm_set_full_words_within_one_page(mdev->bitmap, last_page, first_word, last_word);
        /* possibly trailing bits.
         * example: (e & 63) == 63, el will be e+1.
diff --git a/drivers/block/drbd/drbd_int.h b/drivers/block/drbd/drbd_int.h
index 02f013a073a7..b953cc7c9c00 100644
--- a/drivers/block/drbd/drbd_int.h
+++ b/drivers/block/drbd/drbd_int.h
@@ -813,7 +813,6 @@ enum {
        SIGNAL_ASENDER,         /* whether asender wants to be interrupted */
        SEND_PING,              /* whether asender should send a ping asap */
-        UNPLUG_QUEUED,          /* only relevant with kernel 2.4 */
        UNPLUG_REMOTE,          /* sending a "UnplugRemote" could help */
        MD_DIRTY,               /* current uuids and flags not yet on disk */
        DISCARD_CONCURRENT,     /* Set on one node, cleared on the peer! */
@@ -824,7 +823,6 @@ enum {
        CRASHED_PRIMARY,        /* This node was a crashed primary.
                                 * Gets cleared when the state.conn
                                 * goes into C_CONNECTED state. */
-        NO_BARRIER_SUPP,        /* underlying block device doesn't implement barriers */
        CONSIDER_RESYNC,
        MD_NO_FUA,              /* Users wants us to not use FUA/FLUSH on meta data dev */
@@ -834,6 +832,7 @@ enum {
        BITMAP_IO_QUEUED,       /* Started bitmap IO */
        GO_DISKLESS,            /* Disk is being detached, on io-error or admin request. */
        WAS_IO_ERROR,           /* Local disk failed returned IO error */
+        FORCE_DETACH,           /* Force-detach from local disk, aborting any pending local IO */
        RESYNC_AFTER_NEG,       /* Resync after online grow after the attach&negotiate finished. */
        NET_CONGESTED,          /* The data socket is congested */
@@ -851,6 +850,13 @@ enum {
        AL_SUSPENDED,           /* Activity logging is currently suspended. */
        AHEAD_TO_SYNC_SOURCE,   /* Ahead -> SyncSource queued */
        STATE_SENT,             /* Do not change state/UUIDs while this is set */
+        CALLBACK_PENDING,       /* Whether we have a call_usermodehelper(, UMH_WAIT_PROC)
+                                 * pending, from drbd worker context.
+                                 * If set, bdi_write_congested() returns true,
+                                 * so shrink_page_list() would not recurse into,
+                                 * and potentially deadlock on, this drbd worker.
+                                 */
 };
 struct drbd_bitmap; /* opaque for drbd_conf */
@@ -1130,8 +1136,8 @@ struct drbd_conf {
        int rs_in_flight; /* resync sectors in flight (to proxy, in proxy and from proxy) */
        int rs_planed;    /* resync sectors already planned */
        atomic_t ap_in_flight; /* App sectors in flight (waiting for ack) */
-        int peer_max_bio_size;
+        unsigned int peer_max_bio_size;
-        int local_max_bio_size;
+        unsigned int local_max_bio_size;
 };
 static inline struct drbd_conf *minor_to_mdev(unsigned int minor)
@@ -1435,9 +1441,9 @@ struct bm_extent {
 * hash table. */
 #define HT_SHIFT 8
 #define DRBD_MAX_BIO_SIZE (1U<<(9+HT_SHIFT))
-#define DRBD_MAX_BIO_SIZE_SAFE (1 << 12)       /* Works always = 4k */
+#define DRBD_MAX_BIO_SIZE_SAFE (1U << 12)       /* Works always = 4k */
-#define DRBD_MAX_SIZE_H80_PACKET (1 << 15) /* The old header only allows packets up to 32Kib data */
+#define DRBD_MAX_SIZE_H80_PACKET (1U << 15) /* The old header only allows packets up to 32Kib data */
 /* Number of elements in the app_reads_hash */
 #define APP_R_HSIZE 15
@@ -1463,6 +1469,7 @@ extern int  drbd_bm_e_weight(struct drbd_conf *mdev, unsigned long enr);
 extern int  drbd_bm_write_page(struct drbd_conf *mdev, unsigned int idx) __must_hold(local);
 extern int  drbd_bm_read(struct drbd_conf *mdev) __must_hold(local);
 extern int  drbd_bm_write(struct drbd_conf *mdev) __must_hold(local);
+extern int drbd_bm_write_all(struct drbd_conf *mdev) __must_hold(local);
 extern int  drbd_bm_write_copy_pages(struct drbd_conf *mdev) __must_hold(local);
 extern unsigned long drbd_bm_ALe_set_all(struct drbd_conf *mdev,
                unsigned long al_enr);
@@ -1840,12 +1847,20 @@ static inline int drbd_request_state(struct drbd_conf *mdev,
        return _drbd_request_state(mdev, mask, val, CS_VERBOSE + CS_ORDERED);
 }
+enum drbd_force_detach_flags {
+        DRBD_IO_ERROR,
+        DRBD_META_IO_ERROR,
+        DRBD_FORCE_DETACH,
+};
 #define __drbd_chk_io_error(m,f) __drbd_chk_io_error_(m,f, __func__)
-static inline void __drbd_chk_io_error_(struct drbd_conf *mdev, int forcedetach, const char *where)
+static inline void __drbd_chk_io_error_(struct drbd_conf *mdev,
+                enum drbd_force_detach_flags forcedetach,
+                const char *where)
 {
        switch (mdev->ldev->dc.on_io_error) {
        case EP_PASS_ON:
-                if (!forcedetach) {
+                if (forcedetach == DRBD_IO_ERROR) {
                        if (__ratelimit(&drbd_ratelimit_state))
                                dev_err(DEV, "Local IO failed in %s.\n", where);
                        if (mdev->state.disk > D_INCONSISTENT)
@@ -1856,6 +1871,8 @@ static inline void __drbd_chk_io_error_(struct drbd_conf *mdev, int forcedetach,
        case EP_DETACH:
        case EP_CALL_HELPER:
                set_bit(WAS_IO_ERROR, &mdev->flags);
+                if (forcedetach == DRBD_FORCE_DETACH)
+                        set_bit(FORCE_DETACH, &mdev->flags);
                if (mdev->state.disk > D_FAILED) {
                        _drbd_set_state(_NS(mdev, disk, D_FAILED), CS_HARD, NULL);
                        dev_err(DEV,
@@ -1875,7 +1892,7 @@ static inline void __drbd_chk_io_error_(struct drbd_conf *mdev, int forcedetach,
 */
 #define drbd_chk_io_error(m,e,f) drbd_chk_io_error_(m,e,f, __func__)
 static inline void drbd_chk_io_error_(struct drbd_conf *mdev,
-        int error, int forcedetach, const char *where)
+        int error, enum drbd_force_detach_flags forcedetach, const char *where)
 {
        if (error) {
                unsigned long flags;
@@ -2405,15 +2422,17 @@ static inline void dec_ap_bio(struct drbd_conf *mdev)
        int ap_bio = atomic_dec_return(&mdev->ap_bio_cnt);
        D_ASSERT(ap_bio >= 0);
+        if (ap_bio == 0 && test_bit(BITMAP_IO, &mdev->flags)) {
+                if (!test_and_set_bit(BITMAP_IO_QUEUED, &mdev->flags))
+                        drbd_queue_work(&mdev->data.work, &mdev->bm_io_work.w);
+        }
        /* this currently does wake_up for every dec_ap_bio!
         * maybe rather introduce some type of hysteresis?
         * e.g. (ap_bio == mxb/2 || ap_bio == 0) ? */
        if (ap_bio < mxb)
                wake_up(&mdev->misc_wait);
-        if (ap_bio == 0 && test_bit(BITMAP_IO, &mdev->flags)) {
-                if (!test_and_set_bit(BITMAP_IO_QUEUED, &mdev->flags))
-                        drbd_queue_work(&mdev->data.work, &mdev->bm_io_work.w);
-        }
 }
 static inline int drbd_set_ed_uuid(struct drbd_conf *mdev, u64 val)
diff --git a/drivers/block/drbd/drbd_main.c b/drivers/block/drbd/drbd_main.c
index 920ede2829d6..f93a0320e952 100644
--- a/drivers/block/drbd/drbd_main.c
+++ b/drivers/block/drbd/drbd_main.c
@@ -79,6 +79,7 @@ static int w_md_sync(struct drbd_conf *mdev, struct drbd_work *w, int unused);
 static void md_sync_timer_fn(unsigned long data);
 static int w_bitmap_io(struct drbd_conf *mdev, struct drbd_work *w, int unused);
 static int w_go_diskless(struct drbd_conf *mdev, struct drbd_work *w, int unused);
+static void _tl_clear(struct drbd_conf *mdev);
 MODULE_AUTHOR("Philipp Reisner <phil@linbit.com>, "
              "Lars Ellenberg <lars@linbit.com>");
@@ -432,19 +433,10 @@ static void _tl_restart(struct drbd_conf *mdev, enum drbd_req_event what)
        /* Actions operating on the disk state, also want to work on
           requests that got barrier acked. */
-        switch (what) {
-        case fail_frozen_disk_io:
-        case restart_frozen_disk_io:
-                list_for_each_safe(le, tle, &mdev->barrier_acked_requests) {
-                        req = list_entry(le, struct drbd_request, tl_requests);
-                        _req_mod(req, what);
-                }
-        case connection_lost_while_pending:
+        list_for_each_safe(le, tle, &mdev->barrier_acked_requests) {
-        case resend:
+                req = list_entry(le, struct drbd_request, tl_requests);
-                break;
+                _req_mod(req, what);
-        default:
-                dev_err(DEV, "what = %d in _tl_restart()\n", what);
        }
 }
@@ -459,11 +451,16 @@ static void _tl_restart(struct drbd_conf *mdev, enum drbd_req_event what)
 */
 void tl_clear(struct drbd_conf *mdev)
 {
+        spin_lock_irq(&mdev->req_lock);
+        _tl_clear(mdev);
+        spin_unlock_irq(&mdev->req_lock);
+}
+static void _tl_clear(struct drbd_conf *mdev)
+{
        struct list_head *le, *tle;
        struct drbd_request *r;
-        spin_lock_irq(&mdev->req_lock);
        _tl_restart(mdev, connection_lost_while_pending);
        /* we expect this list to be empty. */
@@ -482,7 +479,6 @@ void tl_clear(struct drbd_conf *mdev)
        memset(mdev->app_reads_hash, 0, APP_R_HSIZE*sizeof(void *));
-        spin_unlock_irq(&mdev->req_lock);
 }
 void tl_restart(struct drbd_conf *mdev, enum drbd_req_event what)
@@ -1476,12 +1472,12 @@ static void after_state_ch(struct drbd_conf *mdev, union drbd_state os,
        if (ns.susp_fen) {
                /* case1: The outdate peer handler is successful: */
                if (os.pdsk > D_OUTDATED  && ns.pdsk <= D_OUTDATED) {
-                        tl_clear(mdev);
                        if (test_bit(NEW_CUR_UUID, &mdev->flags)) {
                                drbd_uuid_new_current(mdev);
                                clear_bit(NEW_CUR_UUID, &mdev->flags);
                        }
                        spin_lock_irq(&mdev->req_lock);
+                        _tl_clear(mdev);
                        _drbd_set_state(_NS(mdev, susp_fen, 0), CS_VERBOSE, NULL);
                        spin_unlock_irq(&mdev->req_lock);
                }
@@ -1514,6 +1510,13 @@ static void after_state_ch(struct drbd_conf *mdev, union drbd_state os,
        /* Do not change the order of the if above and the two below... */
        if (os.pdsk == D_DISKLESS && ns.pdsk > D_DISKLESS) {      /* attach on the peer */
+                /* we probably will start a resync soon.
+                 * make sure those things are properly reset. */
+                mdev->rs_total = 0;
+                mdev->rs_failed = 0;
+                atomic_set(&mdev->rs_pending_cnt, 0);
+                drbd_rs_cancel_all(mdev);
                drbd_send_uuids(mdev);
                drbd_send_state(mdev, ns);
        }
@@ -1630,9 +1633,24 @@ static void after_state_ch(struct drbd_conf *mdev, union drbd_state os,
                        eh = mdev->ldev->dc.on_io_error;
                        was_io_error = test_and_clear_bit(WAS_IO_ERROR, &mdev->flags);
-                        /* Immediately allow completion of all application IO, that waits
+                        if (was_io_error && eh == EP_CALL_HELPER)
-                           for completion from the local disk. */
+                                drbd_khelper(mdev, "local-io-error");
-                        tl_abort_disk_io(mdev);
+                        /* Immediately allow completion of all application IO,
+                         * that waits for completion from the local disk,
+                         * if this was a force-detach due to disk_timeout
+                         * or administrator request (drbdsetup detach --force).
+                         * Do NOT abort otherwise.
+                         * Aborting local requests may cause serious problems,
+                         * if requests are completed to upper layers already,
+                         * and then later the already submitted local bio completes.
+                         * This can cause DMA into former bio pages that meanwhile
+                         * have been re-used for other things.
+                         * So aborting local requests may cause crashes,
+                         * or even worse, silent data corruption.
+                         */
+                        if (test_and_clear_bit(FORCE_DETACH, &mdev->flags))
+                                tl_abort_disk_io(mdev);
                        /* current state still has to be D_FAILED,
                         * there is only one way out: to D_DISKLESS,
@@ -1653,9 +1671,6 @@ static void after_state_ch(struct drbd_conf *mdev, union drbd_state os,
                        drbd_md_sync(mdev);
                }
                put_ldev(mdev);
-                if (was_io_error && eh == EP_CALL_HELPER)
-                        drbd_khelper(mdev, "local-io-error");
        }
        /* second half of local IO error, failure to attach,
@@ -1669,10 +1684,6 @@ static void after_state_ch(struct drbd_conf *mdev, union drbd_state os,
                                "ASSERT FAILED: disk is %s while going diskless\n",
                                drbd_disk_str(mdev->state.disk));
-                mdev->rs_total = 0;
-                mdev->rs_failed = 0;
-                atomic_set(&mdev->rs_pending_cnt, 0);
                if (ns.conn >= C_CONNECTED)
                        drbd_send_state(mdev, ns);
@@ -2194,7 +2205,8 @@ int drbd_send_sizes(struct drbd_conf *mdev, int trigger_reply, enum dds_flags fl
 {
        struct p_sizes p;
        sector_t d_size, u_size;
-        int q_order_type, max_bio_size;
+        int q_order_type;
+        unsigned int max_bio_size;
        int ok;
        if (get_ldev_if_state(mdev, D_NEGOTIATING)) {
@@ -2203,7 +2215,7 @@ int drbd_send_sizes(struct drbd_conf *mdev, int trigger_reply, enum dds_flags fl
                u_size = mdev->ldev->dc.disk_size;
                q_order_type = drbd_queue_order_type(mdev);
                max_bio_size = queue_max_hw_sectors(mdev->ldev->backing_bdev->bd_disk->queue) << 9;
-                max_bio_size = min_t(int, max_bio_size, DRBD_MAX_BIO_SIZE);
+                max_bio_size = min(max_bio_size, DRBD_MAX_BIO_SIZE);
                put_ldev(mdev);
        } else {
                d_size = 0;
@@ -2214,7 +2226,7 @@ int drbd_send_sizes(struct drbd_conf *mdev, int trigger_reply, enum dds_flags fl
        /* Never allow old drbd (up to 8.3.7) to see more than 32KiB */
        if (mdev->agreed_pro_version <= 94)
-                max_bio_size = min_t(int, max_bio_size, DRBD_MAX_SIZE_H80_PACKET);
+                max_bio_size = min(max_bio_size, DRBD_MAX_SIZE_H80_PACKET);
        p.d_size = cpu_to_be64(d_size);
        p.u_size = cpu_to_be64(u_size);
@@ -3521,9 +3533,9 @@ static void drbd_cleanup(void)
 }
 /**
- * drbd_congested() - Callback for pdflush
+ * drbd_congested() - Callback for the flusher thread
 * @congested_data:     User data
- * @bdi_bits:           Bits pdflush is currently interested in
+ * @bdi_bits:           Bits the BDI flusher thread is currently interested in
 *
 * Returns 1<<BDI_async_congested and/or 1<<BDI_sync_congested if we are congested.
 */
@@ -3541,6 +3553,22 @@ static int drbd_congested(void *congested_data, int bdi_bits)
                goto out;
        }
+        if (test_bit(CALLBACK_PENDING, &mdev->flags)) {
+                r |= (1 << BDI_async_congested);
+                /* Without good local data, we would need to read from remote,
+                 * and that would need the worker thread as well, which is
+                 * currently blocked waiting for that usermode helper to
+                 * finish.
+                 */
+                if (!get_ldev_if_state(mdev, D_UP_TO_DATE))
+                        r |= (1 << BDI_sync_congested);
+                else
+                        put_ldev(mdev);
+                r &= bdi_bits;
+                reason = 'c';
+                goto out;
+        }
        if (get_ldev(mdev)) {
                q = bdev_get_queue(mdev->ldev->backing_bdev);
                r = bdi_congested(&q->backing_dev_info, bdi_bits);
@@ -3604,6 +3632,7 @@ struct drbd_conf *drbd_new_device(unsigned int minor)
        q->backing_dev_info.congested_data = mdev;
        blk_queue_make_request(q, drbd_make_request);
+        blk_queue_flush(q, REQ_FLUSH | REQ_FUA);
        /* Setting the max_hw_sectors to an odd value of 8kibyte here
           This triggers a max_bio_size message upon first attach or connect */
        blk_queue_max_hw_sectors(q, DRBD_MAX_BIO_SIZE_SAFE >> 8);
@@ -3870,7 +3899,7 @@ void drbd_md_sync(struct drbd_conf *mdev)
        if (!drbd_md_sync_page_io(mdev, mdev->ldev, sector, WRITE)) {
                /* this was a try anyways ... */
                dev_err(DEV, "meta data update failed!\n");
-                drbd_chk_io_error(mdev, 1, true);
+                drbd_chk_io_error(mdev, 1, DRBD_META_IO_ERROR);
        }
        /* Update mdev->ldev->md.la_size_sect,
@@ -3950,9 +3979,9 @@ int drbd_md_read(struct drbd_conf *mdev, struct drbd_backing_dev *bdev)
        spin_lock_irq(&mdev->req_lock);
        if (mdev->state.conn < C_CONNECTED) {
-                int peer;
+                unsigned int peer;
                peer = be32_to_cpu(buffer->la_peer_max_bio_size);
-                peer = max_t(int, peer, DRBD_MAX_BIO_SIZE_SAFE);
+                peer = max(peer, DRBD_MAX_BIO_SIZE_SAFE);
                mdev->peer_max_bio_size = peer;
        }
        spin_unlock_irq(&mdev->req_lock);
diff --git a/drivers/block/drbd/drbd_nl.c b/drivers/block/drbd/drbd_nl.c
index 6d4de6a72e80..edb490aad8b4 100644
--- a/drivers/block/drbd/drbd_nl.c
+++ b/drivers/block/drbd/drbd_nl.c
@@ -147,6 +147,9 @@ int drbd_khelper(struct drbd_conf *mdev, char *cmd)
        char *argv[] = {usermode_helper, cmd, mb, NULL };
        int ret;
+        if (current == mdev->worker.task)
+                set_bit(CALLBACK_PENDING, &mdev->flags);
        snprintf(mb, 12, "minor-%d", mdev_to_minor(mdev));
        if (get_net_conf(mdev)) {
@@ -189,6 +192,9 @@ int drbd_khelper(struct drbd_conf *mdev, char *cmd)
                                usermode_helper, cmd, mb,
                                (ret >> 8) & 0xff, ret);
+        if (current == mdev->worker.task)
+                clear_bit(CALLBACK_PENDING, &mdev->flags);
        if (ret < 0) /* Ignore any ERRNOs we got. */
                ret = 0;
@@ -668,8 +674,8 @@ enum determine_dev_size drbd_determine_dev_size(struct drbd_conf *mdev, enum dds
                         la_size_changed && md_moved ? "size changed and md moved" :
                         la_size_changed ? "size changed" : "md moved");
                /* next line implicitly does drbd_suspend_io()+drbd_resume_io() */
-                err = drbd_bitmap_io(mdev, &drbd_bm_write,
+                err = drbd_bitmap_io(mdev, md_moved ? &drbd_bm_write_all : &drbd_bm_write,
-                                "size changed", BM_LOCKED_MASK);
+                                     "size changed", BM_LOCKED_MASK);
                if (err) {
                        rv = dev_size_error;
                        goto out;
@@ -795,8 +801,8 @@ static int drbd_check_al_size(struct drbd_conf *mdev)
 static void drbd_setup_queue_param(struct drbd_conf *mdev, unsigned int max_bio_size)
 {
        struct request_queue * const q = mdev->rq_queue;
-        int max_hw_sectors = max_bio_size >> 9;
+        unsigned int max_hw_sectors = max_bio_size >> 9;
-        int max_segments = 0;
+        unsigned int max_segments = 0;
        if (get_ldev_if_state(mdev, D_ATTACHING)) {
                struct request_queue * const b = mdev->ldev->backing_bdev->bd_disk->queue;
@@ -829,7 +835,7 @@ static void drbd_setup_queue_param(struct drbd_conf *mdev, unsigned int max_bio_
 void drbd_reconsider_max_bio_size(struct drbd_conf *mdev)
 {
-        int now, new, local, peer;
+        unsigned int now, new, local, peer;
        now = queue_max_hw_sectors(mdev->rq_queue) << 9;
        local = mdev->local_max_bio_size; /* Eventually last known value, from volatile memory */
@@ -840,13 +846,14 @@ void drbd_reconsider_max_bio_size(struct drbd_conf *mdev)
                mdev->local_max_bio_size = local;
                put_ldev(mdev);
        }
+        local = min(local, DRBD_MAX_BIO_SIZE);
        /* We may ignore peer limits if the peer is modern enough.
           Because new from 8.3.8 onwards the peer can use multiple
           BIOs for a single peer_request */
        if (mdev->state.conn >= C_CONNECTED) {
                if (mdev->agreed_pro_version < 94) {
-                        peer = min_t(int, mdev->peer_max_bio_size, DRBD_MAX_SIZE_H80_PACKET);
+                        peer = min(mdev->peer_max_bio_size, DRBD_MAX_SIZE_H80_PACKET);
                        /* Correct old drbd (up to 8.3.7) if it believes it can do more than 32KiB */
                } else if (mdev->agreed_pro_version == 94)
                        peer = DRBD_MAX_SIZE_H80_PACKET;
@@ -854,10 +861,10 @@ void drbd_reconsider_max_bio_size(struct drbd_conf *mdev)
                        peer = DRBD_MAX_BIO_SIZE;
        }
-        new = min_t(int, local, peer);
+        new = min(local, peer);
        if (mdev->state.role == R_PRIMARY && new < now)
-                dev_err(DEV, "ASSERT FAILED new < now; (%d < %d)\n", new, now);
+                dev_err(DEV, "ASSERT FAILED new < now; (%u < %u)\n", new, now);
        if (new != now)
                dev_info(DEV, "max BIO size = %u\n", new);
@@ -950,6 +957,14 @@ static int drbd_nl_disk_conf(struct drbd_conf *mdev, struct drbd_nl_cfg_req *nlp
         * to realize a "hot spare" feature (not that I'd recommend that) */
        wait_event(mdev->misc_wait, !atomic_read(&mdev->local_cnt));
+        /* make sure there is no leftover from previous force-detach attempts */
+        clear_bit(FORCE_DETACH, &mdev->flags);
+        /* and no leftover from previously aborted resync or verify, either */
+        mdev->rs_total = 0;
+        mdev->rs_failed = 0;
+        atomic_set(&mdev->rs_pending_cnt, 0);
        /* allocation not in the IO path, cqueue thread context */
        nbc = kzalloc(sizeof(struct drbd_backing_dev), GFP_KERNEL);
        if (!nbc) {
@@ -1345,6 +1360,7 @@ static int drbd_nl_detach(struct drbd_conf *mdev, struct drbd_nl_cfg_req *nlp,
        }
        if (dt.detach_force) {
+                set_bit(FORCE_DETACH, &mdev->flags);
                drbd_force_state(mdev, NS(disk, D_FAILED));
                reply->ret_code = SS_SUCCESS;
                goto out;
@@ -1962,9 +1978,11 @@ static int drbd_nl_invalidate(struct drbd_conf *mdev, struct drbd_nl_cfg_req *nl
        int retcode;
        /* If there is still bitmap IO pending, probably because of a previous
-         * resync just being finished, wait for it before requesting a new resync. */
+         * resync just being finished, wait for it before requesting a new resync.
+         * Also wait for it's after_state_ch(). */
        drbd_suspend_io(mdev);
        wait_event(mdev->misc_wait, !test_bit(BITMAP_IO, &mdev->flags));
+        drbd_flush_workqueue(mdev);
        retcode = _drbd_request_state(mdev, NS(conn, C_STARTING_SYNC_T), CS_ORDERED);
@@ -2003,9 +2021,11 @@ static int drbd_nl_invalidate_peer(struct drbd_conf *mdev, struct drbd_nl_cfg_re
        int retcode;
        /* If there is still bitmap IO pending, probably because of a previous
-         * resync just being finished, wait for it before requesting a new resync. */
+         * resync just being finished, wait for it before requesting a new resync.
+         * Also wait for it's after_state_ch(). */
        drbd_suspend_io(mdev);
        wait_event(mdev->misc_wait, !test_bit(BITMAP_IO, &mdev->flags));
+        drbd_flush_workqueue(mdev);
        retcode = _drbd_request_state(mdev, NS(conn, C_STARTING_SYNC_S), CS_ORDERED);
diff --git a/drivers/block/drbd/drbd_proc.c b/drivers/block/drbd/drbd_proc.c
index 869bada2ed06..5496104f90b9 100644
--- a/drivers/block/drbd/drbd_proc.c
+++ b/drivers/block/drbd/drbd_proc.c
@@ -245,6 +245,9 @@ static int drbd_seq_show(struct seq_file *seq, void *v)
                    mdev->state.role == R_SECONDARY) {
                        seq_printf(seq, "%2d: cs:Unconfigured\n", i);
                } else {
+                        /* reset mdev->congestion_reason */
+                        bdi_rw_congested(&mdev->rq_queue->backing_dev_info);
                        seq_printf(seq,
                           "%2d: cs:%s ro:%s/%s ds:%s/%s %c %c%c%c%c%c%c\n"
                           "    ns:%u nr:%u dw:%u dr:%u al:%u bm:%u "
diff --git a/drivers/block/drbd/drbd_receiver.c b/drivers/block/drbd/drbd_receiver.c
index ea4836e0ae98..c74ca2df7431 100644
--- a/drivers/block/drbd/drbd_receiver.c
+++ b/drivers/block/drbd/drbd_receiver.c
@@ -277,6 +277,9 @@ static void drbd_pp_free(struct drbd_conf *mdev, struct page *page, int is_net)
        atomic_t *a = is_net ? &mdev->pp_in_use_by_net : &mdev->pp_in_use;
        int i;
+        if (page == NULL)
+                return;
        if (drbd_pp_vacant > (DRBD_MAX_BIO_SIZE/PAGE_SIZE)*minor_count)
                i = page_chain_free(page);
        else {
@@ -316,7 +319,7 @@ struct drbd_epoch_entry *drbd_alloc_ee(struct drbd_conf *mdev,
                                     gfp_t gfp_mask) __must_hold(local)
 {
        struct drbd_epoch_entry *e;
-        struct page *page;
+        struct page *page = NULL;
        unsigned nr_pages = (data_size + PAGE_SIZE -1) >> PAGE_SHIFT;
        if (drbd_insert_fault(mdev, DRBD_FAULT_AL_EE))
@@ -329,9 +332,11 @@ struct drbd_epoch_entry *drbd_alloc_ee(struct drbd_conf *mdev,
                return NULL;
        }
-        page = drbd_pp_alloc(mdev, nr_pages, (gfp_mask & __GFP_WAIT));
+        if (data_size) {
-        if (!page)
+                page = drbd_pp_alloc(mdev, nr_pages, (gfp_mask & __GFP_WAIT));
-                goto fail;
+                if (!page)
+                        goto fail;
+        }
        INIT_HLIST_NODE(&e->collision);
        e->epoch = NULL;
@@ -1270,7 +1275,6 @@ read_in_block(struct drbd_conf *mdev, u64 id, sector_t sector, int data_size) __
        data_size -= dgs;
-        ERR_IF(data_size == 0) return NULL;
        ERR_IF(data_size &  0x1ff) return NULL;
        ERR_IF(data_size >  DRBD_MAX_BIO_SIZE) return NULL;
@@ -1291,6 +1295,9 @@ read_in_block(struct drbd_conf *mdev, u64 id, sector_t sector, int data_size) __
        if (!e)
                return NULL;
+        if (!data_size)
+                return e;
        ds = data_size;
        page = e->pages;
        page_chain_for_each(page) {
@@ -1715,6 +1722,10 @@ static int receive_Data(struct drbd_conf *mdev, enum drbd_packets cmd, unsigned
        dp_flags = be32_to_cpu(p->dp_flags);
        rw |= wire_flags_to_bio(mdev, dp_flags);
+        if (e->pages == NULL) {
+                D_ASSERT(e->size == 0);
+                D_ASSERT(dp_flags & DP_FLUSH);
+        }
        if (dp_flags & DP_MAY_SET_IN_SYNC)
                e->flags |= EE_MAY_SET_IN_SYNC;
@@ -3801,11 +3812,18 @@ void drbd_free_tl_hash(struct drbd_conf *mdev)
        mdev->ee_hash = NULL;
        mdev->ee_hash_s = 0;
-        /* paranoia code */
+        /* We may not have had the chance to wait for all locally pending
-        for (h = mdev->tl_hash; h < mdev->tl_hash + mdev->tl_hash_s; h++)
+         * application requests. The hlist_add_fake() prevents access after
-                if (h->first)
+         * free on master bio completion. */
-                        dev_err(DEV, "ASSERT FAILED tl_hash[%u] == %p, expected NULL\n",
+        for (h = mdev->tl_hash; h < mdev->tl_hash + mdev->tl_hash_s; h++) {
-                                (int)(h - mdev->tl_hash), h->first);
+                struct drbd_request *req;
+                struct hlist_node *pos, *n;
+                hlist_for_each_entry_safe(req, pos, n, h, collision) {
+                        hlist_del_init(&req->collision);
+                        hlist_add_fake(&req->collision);
+                }
+        }
        kfree(mdev->tl_hash);
        mdev->tl_hash = NULL;
        mdev->tl_hash_s = 0;
diff --git a/drivers/block/drbd/drbd_req.c b/drivers/block/drbd/drbd_req.c
index 9c5c84946b05..01b2ac641c7b 100644
--- a/drivers/block/drbd/drbd_req.c
+++ b/drivers/block/drbd/drbd_req.c
@@ -455,7 +455,7 @@ int __req_mod(struct drbd_request *req, enum drbd_req_event what,
                req->rq_state |= RQ_LOCAL_COMPLETED;
                req->rq_state &= ~RQ_LOCAL_PENDING;
-                __drbd_chk_io_error(mdev, false);
+                __drbd_chk_io_error(mdev, DRBD_IO_ERROR);
                _req_may_be_done_not_susp(req, m);
                break;
@@ -472,12 +472,17 @@ int __req_mod(struct drbd_request *req, enum drbd_req_event what,
                req->rq_state |= RQ_LOCAL_COMPLETED;
                req->rq_state &= ~RQ_LOCAL_PENDING;
-                D_ASSERT(!(req->rq_state & RQ_NET_MASK));
+                if (req->rq_state & RQ_LOCAL_ABORTED) {
+                        _req_may_be_done(req, m);
+                        break;
+                }
-                __drbd_chk_io_error(mdev, false);
+                __drbd_chk_io_error(mdev, DRBD_IO_ERROR);
        goto_queue_for_net_read:
+                D_ASSERT(!(req->rq_state & RQ_NET_MASK));
                /* no point in retrying if there is no good remote data,
                 * or we have no connection. */
                if (mdev->state.pdsk != D_UP_TO_DATE) {
@@ -690,6 +695,12 @@ int __req_mod(struct drbd_request *req, enum drbd_req_event what,
                break;
        case resend:
+                /* Simply complete (local only) READs. */
+                if (!(req->rq_state & RQ_WRITE) && !req->w.cb) {
+                        _req_may_be_done(req, m);
+                        break;
+                }
                /* If RQ_NET_OK is already set, we got a P_WRITE_ACK or P_RECV_ACK
                   before the connection loss (B&C only); only P_BARRIER_ACK was missing.
                   Trowing them out of the TL here by pretending we got a BARRIER_ACK
@@ -765,6 +776,40 @@ static int drbd_may_do_local_read(struct drbd_conf *mdev, sector_t sector, int s
        return 0 == drbd_bm_count_bits(mdev, sbnr, ebnr);
 }
+static void maybe_pull_ahead(struct drbd_conf *mdev)
+{
+        int congested = 0;
+        /* If I don't even have good local storage, we can not reasonably try
+         * to pull ahead of the peer. We also need the local reference to make
+         * sure mdev->act_log is there.
+         * Note: caller has to make sure that net_conf is there.
+         */
+        if (!get_ldev_if_state(mdev, D_UP_TO_DATE))
+                return;
+        if (mdev->net_conf->cong_fill &&
+            atomic_read(&mdev->ap_in_flight) >= mdev->net_conf->cong_fill) {
+                dev_info(DEV, "Congestion-fill threshold reached\n");
+                congested = 1;
+        }
+        if (mdev->act_log->used >= mdev->net_conf->cong_extents) {
+                dev_info(DEV, "Congestion-extents threshold reached\n");
+                congested = 1;
+        }
+        if (congested) {
+                queue_barrier(mdev); /* last barrier, after mirrored writes */
+                if (mdev->net_conf->on_congestion == OC_PULL_AHEAD)
+                        _drbd_set_state(_NS(mdev, conn, C_AHEAD), 0, NULL);
+                else  /*mdev->net_conf->on_congestion == OC_DISCONNECT */
+                        _drbd_set_state(_NS(mdev, conn, C_DISCONNECTING), 0, NULL);
+        }
+        put_ldev(mdev);
+}
 static int drbd_make_request_common(struct drbd_conf *mdev, struct bio *bio, unsigned long start_time)
 {
        const int rw = bio_rw(bio);
@@ -795,7 +840,15 @@ static int drbd_make_request_common(struct drbd_conf *mdev, struct bio *bio, uns
                req->private_bio = NULL;
        }
        if (rw == WRITE) {
-                remote = 1;
+                /* Need to replicate writes.  Unless it is an empty flush,
+                 * which is better mapped to a DRBD P_BARRIER packet,
+                 * also for drbd wire protocol compatibility reasons. */
+                if (unlikely(size == 0)) {
+                        /* The only size==0 bios we expect are empty flushes. */
+                        D_ASSERT(bio->bi_rw & REQ_FLUSH);
+                        remote = 0;
+                } else
+                        remote = 1;
        } else {
                /* READ || READA */
                if (local) {
@@ -831,8 +884,11 @@ static int drbd_make_request_common(struct drbd_conf *mdev, struct bio *bio, uns
         * extent.  This waits for any resync activity in the corresponding
         * resync extent to finish, and, if necessary, pulls in the target
         * extent into the activity log, which involves further disk io because
-         * of transactional on-disk meta data updates. */
+         * of transactional on-disk meta data updates.
-        if (rw == WRITE && local && !test_bit(AL_SUSPENDED, &mdev->flags)) {
+         * Empty flushes don't need to go into the activity log, they can only
+         * flush data for pending writes which are already in there. */
+        if (rw == WRITE && local && size
+        && !test_bit(AL_SUSPENDED, &mdev->flags)) {
                req->rq_state |= RQ_IN_ACT_LOG;
                drbd_al_begin_io(mdev, sector);
        }
@@ -955,7 +1011,10 @@ allocate_barrier:
        if (rw == WRITE && _req_conflicts(req))
                goto fail_conflicting;
-        list_add_tail(&req->tl_requests, &mdev->newest_tle->requests);
+        /* no point in adding empty flushes to the transfer log,
+         * they are mapped to drbd barriers already. */
+        if (likely(size!=0))
+                list_add_tail(&req->tl_requests, &mdev->newest_tle->requests);
        /* NOTE remote first: to get the concurrent write detection right,
         * we must register the request before start of local IO.  */
@@ -972,29 +1031,16 @@ allocate_barrier:
                _req_mod(req, queue_for_send_oos);
        if (remote &&
-            mdev->net_conf->on_congestion != OC_BLOCK && mdev->agreed_pro_version >= 96) {
+            mdev->net_conf->on_congestion != OC_BLOCK && mdev->agreed_pro_version >= 96)
-                int congested = 0;
+                maybe_pull_ahead(mdev);
-                if (mdev->net_conf->cong_fill &&
+        /* If this was a flush, queue a drbd barrier/start a new epoch.
-                    atomic_read(&mdev->ap_in_flight) >= mdev->net_conf->cong_fill) {
+         * Unless the current epoch was empty anyways, or we are not currently
-                        dev_info(DEV, "Congestion-fill threshold reached\n");
+         * replicating, in which case there is no point. */
-                        congested = 1;
+        if (unlikely(bio->bi_rw & REQ_FLUSH)
-                }
+                && mdev->newest_tle->n_writes
+                && drbd_should_do_remote(mdev->state))
-                if (mdev->act_log->used >= mdev->net_conf->cong_extents) {
+                queue_barrier(mdev);
-                        dev_info(DEV, "Congestion-extents threshold reached\n");
-                        congested = 1;
-                }
-                if (congested) {
-                        queue_barrier(mdev); /* last barrier, after mirrored writes */
-                        if (mdev->net_conf->on_congestion == OC_PULL_AHEAD)
-                                _drbd_set_state(_NS(mdev, conn, C_AHEAD), 0, NULL);
-                        else  /*mdev->net_conf->on_congestion == OC_DISCONNECT */
-                                _drbd_set_state(_NS(mdev, conn, C_DISCONNECTING), 0, NULL);
-                }
-        }
        spin_unlock_irq(&mdev->req_lock);
        kfree(b); /* if someone else has beaten us to it... */
@@ -1093,13 +1139,12 @@ void drbd_make_request(struct request_queue *q, struct bio *bio)
        /*
         * what we "blindly" assume:
         */
-        D_ASSERT(bio->bi_size > 0);
        D_ASSERT((bio->bi_size & 0x1ff) == 0);
        /* to make some things easier, force alignment of requests within the
         * granularity of our hash tables */
        s_enr = bio->bi_sector >> HT_SHIFT;
-        e_enr = (bio->bi_sector+(bio->bi_size>>9)-1) >> HT_SHIFT;
+        e_enr = bio->bi_size ? (bio->bi_sector+(bio->bi_size>>9)-1) >> HT_SHIFT : s_enr;
        if (likely(s_enr == e_enr)) {
                do {
@@ -1257,7 +1302,7 @@ void request_timer_fn(unsigned long data)
                 time_after(now, req->start_time + dt) &&
                !time_in_range(now, mdev->last_reattach_jif, mdev->last_reattach_jif + dt)) {
                dev_warn(DEV, "Local backing device failed to meet the disk-timeout\n");
-                __drbd_chk_io_error(mdev, 1);
+                __drbd_chk_io_error(mdev, DRBD_FORCE_DETACH);
        }
        nt = (time_after(now, req->start_time + et) ? now : req->start_time) + et;
        spin_unlock_irq(&mdev->req_lock);
diff --git a/drivers/block/drbd/drbd_worker.c b/drivers/block/drbd/drbd_worker.c
index 620c70ff2231..6bce2cc179d4 100644
--- a/drivers/block/drbd/drbd_worker.c
+++ b/drivers/block/drbd/drbd_worker.c
@@ -111,7 +111,7 @@ void drbd_endio_read_sec_final(struct drbd_epoch_entry *e) __releases(local)
        if (list_empty(&mdev->read_ee))
                wake_up(&mdev->ee_wait);
        if (test_bit(__EE_WAS_ERROR, &e->flags))
-                __drbd_chk_io_error(mdev, false);
+                __drbd_chk_io_error(mdev, DRBD_IO_ERROR);
        spin_unlock_irqrestore(&mdev->req_lock, flags);
        drbd_queue_work(&mdev->data.work, &e->w);
@@ -154,7 +154,7 @@ static void drbd_endio_write_sec_final(struct drbd_epoch_entry *e) __releases(lo
                : list_empty(&mdev->active_ee);
        if (test_bit(__EE_WAS_ERROR, &e->flags))
-                __drbd_chk_io_error(mdev, false);
+                __drbd_chk_io_error(mdev, DRBD_IO_ERROR);
        spin_unlock_irqrestore(&mdev->req_lock, flags);
        if (is_syncer_req)
@@ -1501,14 +1501,6 @@ void drbd_start_resync(struct drbd_conf *mdev, enum drbd_conns side)
                return;
        }
-        if (mdev->state.conn < C_AHEAD) {
-                /* In case a previous resync run was aborted by an IO error/detach on the peer. */
-                drbd_rs_cancel_all(mdev);
-                /* This should be done when we abort the resync. We definitely do not
-                   want to have this for connections going back and forth between
-                   Ahead/Behind and SyncSource/SyncTarget */
-        }
        if (side == C_SYNC_TARGET) {
                /* Since application IO was locked out during C_WF_BITMAP_T and
                   C_WF_SYNC_UUID we are still unmodified. Before going to C_SYNC_TARGET
diff --git a/drivers/block/floppy.c b/drivers/block/floppy.c
index cce7df367b79..a7d6347aaa79 100644
--- a/drivers/block/floppy.c
+++ b/drivers/block/floppy.c
@@ -191,6 +191,7 @@ static int print_unex = 1;
 #include <linux/mutex.h>
 #include <linux/io.h>
 #include <linux/uaccess.h>
+#include <linux/async.h>
 /*
 * PS/2 floppies have much slower step rates than regular floppies.
@@ -671,6 +672,7 @@ static void __reschedule_timeout(int drive, const char *message)
        if (drive == current_reqD)
                drive = current_drive;
+        __cancel_delayed_work(&fd_timeout);
        if (drive < 0 || drive >= N_DRIVE) {
                delay = 20UL * HZ;
@@ -2515,8 +2517,7 @@ static int make_raw_rw_request(void)
        set_fdc((long)current_req->rq_disk->private_data);
        raw_cmd = &default_raw_cmd;
-        raw_cmd->flags = FD_RAW_SPIN | FD_RAW_NEED_DISK | FD_RAW_NEED_DISK |
+        raw_cmd->flags = FD_RAW_SPIN | FD_RAW_NEED_DISK | FD_RAW_NEED_SEEK;
-            FD_RAW_NEED_SEEK;
        raw_cmd->cmd_count = NR_RW;
        if (rq_data_dir(current_req) == READ) {
                raw_cmd->flags |= FD_RAW_READ;
@@ -4122,7 +4123,7 @@ static struct kobject *floppy_find(dev_t dev, int *part, void *data)
        return get_disk(disks[drive]);
 }
-static int __init floppy_init(void)
+static int __init do_floppy_init(void)
 {
        int i, unit, drive;
        int err, dr;
@@ -4337,6 +4338,24 @@ out_put_disk:
        return err;
 }
+#ifndef MODULE
+static __init void floppy_async_init(void *data, async_cookie_t cookie)
+{
+        do_floppy_init();
+}
+#endif
+static int __init floppy_init(void)
+{
+#ifdef MODULE
+        return do_floppy_init();
+#else
+        /* Don't hold up the bootup by the floppy initialization */
+        async_schedule(floppy_async_init, NULL);
+        return 0;
+#endif
+}
 static const struct io_region {
        int offset;
        int size;
diff --git a/drivers/block/loop.c b/drivers/block/loop.c
index bbca966f8f66..3bba65510d23 100644
--- a/drivers/block/loop.c
+++ b/drivers/block/loop.c
@@ -1597,14 +1597,12 @@ static int loop_add(struct loop_device **l, int i)
        struct gendisk *disk;
        int err;
+        err = -ENOMEM;
        lo = kzalloc(sizeof(*lo), GFP_KERNEL);
-        if (!lo) {
+        if (!lo)
-                err = -ENOMEM;
                goto out;
-        }
-        err = idr_pre_get(&loop_index_idr, GFP_KERNEL);
+        if (!idr_pre_get(&loop_index_idr, GFP_KERNEL))
-        if (err < 0)
                goto out_free_dev;
        if (i >= 0) {
diff --git a/drivers/block/mg_disk.c b/drivers/block/mg_disk.c
index 76fa3deaee84..1788f491e0fb 100644
--- a/drivers/block/mg_disk.c
+++ b/drivers/block/mg_disk.c
@@ -780,9 +780,9 @@ static const struct block_device_operations mg_disk_ops = {
        .getgeo = mg_getgeo
 };
-static int mg_suspend(struct platform_device *plat_dev, pm_message_t state)
+static int mg_suspend(struct device *dev)
 {
-        struct mg_drv_data *prv_data = plat_dev->dev.platform_data;
+        struct mg_drv_data *prv_data = dev->platform_data;
        struct mg_host *host = prv_data->host;
        if (mg_wait(host, MG_STAT_READY, MG_TMAX_CONF_TO_CMD))
@@ -804,9 +804,9 @@ static int mg_suspend(struct platform_device *plat_dev, pm_message_t state)
        return 0;
 }
-static int mg_resume(struct platform_device *plat_dev)
+static int mg_resume(struct device *dev)
 {
-        struct mg_drv_data *prv_data = plat_dev->dev.platform_data;
+        struct mg_drv_data *prv_data = dev->platform_data;
        struct mg_host *host = prv_data->host;
        if (mg_wait(host, MG_STAT_READY, MG_TMAX_CONF_TO_CMD))
@@ -825,6 +825,8 @@ static int mg_resume(struct platform_device *plat_dev)
        return 0;
 }
+static SIMPLE_DEV_PM_OPS(mg_pm, mg_suspend, mg_resume);
 static int mg_probe(struct platform_device *plat_dev)
 {
        struct mg_host *host;
@@ -1074,11 +1076,10 @@ static int mg_remove(struct platform_device *plat_dev)
 static struct platform_driver mg_disk_driver = {
        .probe = mg_probe,
        .remove = mg_remove,
-        .suspend = mg_suspend,
-        .resume = mg_resume,
        .driver = {
                .name = MG_DEV_NAME,
                .owner = THIS_MODULE,
+                .pm = &mg_pm,
        }
 };
diff --git a/drivers/block/mtip32xx/mtip32xx.c b/drivers/block/mtip32xx/mtip32xx.c
index 264bc77dcb91..a8fddeb3d638 100644
--- a/drivers/block/mtip32xx/mtip32xx.c
+++ b/drivers/block/mtip32xx/mtip32xx.c
@@ -37,6 +37,7 @@
 #include <linux/kthread.h>
 #include <../drivers/ata/ahci.h>
 #include <linux/export.h>
+#include <linux/debugfs.h>
 #include "mtip32xx.h"
 #define HW_CMD_SLOT_SZ          (MTIP_MAX_COMMAND_SLOTS * 32)
@@ -85,6 +86,7 @@ static int instance;
 * allocated in mtip_init().
 */
 static int mtip_major;
+static struct dentry *dfs_parent;
 static DEFINE_SPINLOCK(rssd_index_lock);
 static DEFINE_IDA(rssd_index_ida);
@@ -2546,7 +2548,7 @@ static struct scatterlist *mtip_hw_get_scatterlist(struct driver_data *dd,
 }
 /*
- * Sysfs register/status dump.
+ * Sysfs status dump.
 *
 * @dev  Pointer to the device structure, passed by the kernrel.
 * @attr Pointer to the device_attribute structure passed by the kernel.
@@ -2555,45 +2557,68 @@ static struct scatterlist *mtip_hw_get_scatterlist(struct driver_data *dd,
 * return value
 *      The size, in bytes, of the data copied into buf.
 */
-static ssize_t mtip_hw_show_registers(struct device *dev,
+static ssize_t mtip_hw_show_status(struct device *dev,
                                struct device_attribute *attr,
                                char *buf)
 {
-        u32 group_allocated;
        struct driver_data *dd = dev_to_disk(dev)->private_data;
        int size = 0;
+        if (test_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag))
+                size += sprintf(buf, "%s", "thermal_shutdown\n");
+        else if (test_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag))
+                size += sprintf(buf, "%s", "write_protect\n");
+        else
+                size += sprintf(buf, "%s", "online\n");
+        return size;
+}
+static DEVICE_ATTR(status, S_IRUGO, mtip_hw_show_status, NULL);
+static ssize_t mtip_hw_read_registers(struct file *f, char __user *ubuf,
+                                  size_t len, loff_t *offset)
+{
+        struct driver_data *dd =  (struct driver_data *)f->private_data;
+        char buf[MTIP_DFS_MAX_BUF_SIZE];
+        u32 group_allocated;
+        int size = *offset;
        int n;
-        size += sprintf(&buf[size], "Hardware\n--------\n");
+        if (!len || size)
-        size += sprintf(&buf[size], "S ACTive      : [ 0x");
+                return 0;
+        if (size < 0)
+                return -EINVAL;
+        size += sprintf(&buf[size], "H/ S ACTive      : [ 0x");
        for (n = dd->slot_groups-1; n >= 0; n--)
                size += sprintf(&buf[size], "%08X ",
                                         readl(dd->port->s_active[n]));
        size += sprintf(&buf[size], "]\n");
-        size += sprintf(&buf[size], "Command Issue : [ 0x");
+        size += sprintf(&buf[size], "H/ Command Issue : [ 0x");
        for (n = dd->slot_groups-1; n >= 0; n--)
                size += sprintf(&buf[size], "%08X ",
                                        readl(dd->port->cmd_issue[n]));
        size += sprintf(&buf[size], "]\n");
-        size += sprintf(&buf[size], "Completed     : [ 0x");
+        size += sprintf(&buf[size], "H/ Completed     : [ 0x");
        for (n = dd->slot_groups-1; n >= 0; n--)
                size += sprintf(&buf[size], "%08X ",
                                readl(dd->port->completed[n]));
        size += sprintf(&buf[size], "]\n");
-        size += sprintf(&buf[size], "PORT IRQ STAT : [ 0x%08X ]\n",
+        size += sprintf(&buf[size], "H/ PORT IRQ STAT : [ 0x%08X ]\n",
                                readl(dd->port->mmio + PORT_IRQ_STAT));
-        size += sprintf(&buf[size], "HOST IRQ STAT : [ 0x%08X ]\n",
+        size += sprintf(&buf[size], "H/ HOST IRQ STAT : [ 0x%08X ]\n",
                                readl(dd->mmio + HOST_IRQ_STAT));
        size += sprintf(&buf[size], "\n");
-        size += sprintf(&buf[size], "Local\n-----\n");
+        size += sprintf(&buf[size], "L/ Allocated     : [ 0x");
-        size += sprintf(&buf[size], "Allocated    : [ 0x");
        for (n = dd->slot_groups-1; n >= 0; n--) {
                if (sizeof(long) > sizeof(u32))
@@ -2605,7 +2630,7 @@ static ssize_t mtip_hw_show_registers(struct device *dev,
        }
        size += sprintf(&buf[size], "]\n");
-        size += sprintf(&buf[size], "Commands in Q: [ 0x");
+        size += sprintf(&buf[size], "L/ Commands in Q : [ 0x");
        for (n = dd->slot_groups-1; n >= 0; n--) {
                if (sizeof(long) > sizeof(u32))
@@ -2617,44 +2642,53 @@ static ssize_t mtip_hw_show_registers(struct device *dev,
        }
        size += sprintf(&buf[size], "]\n");
-        return size;
+        *offset = size <= len ? size : len;
+        size = copy_to_user(ubuf, buf, *offset);
+        if (size)
+                return -EFAULT;
+        return *offset;
 }
-static ssize_t mtip_hw_show_status(struct device *dev,
+static ssize_t mtip_hw_read_flags(struct file *f, char __user *ubuf,
-                                struct device_attribute *attr,
+                                  size_t len, loff_t *offset)
-                                char *buf)
 {
-        struct driver_data *dd = dev_to_disk(dev)->private_data;
+        struct driver_data *dd =  (struct driver_data *)f->private_data;
-        int size = 0;
+        char buf[MTIP_DFS_MAX_BUF_SIZE];
+        int size = *offset;
-        if (test_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag))
+        if (!len || size)
-                size += sprintf(buf, "%s", "thermal_shutdown\n");
+                return 0;
-        else if (test_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag))
-                size += sprintf(buf, "%s", "write_protect\n");
-        else
-                size += sprintf(buf, "%s", "online\n");
-        return size;
-}
-static ssize_t mtip_hw_show_flags(struct device *dev,
+        if (size < 0)
-                                struct device_attribute *attr,
+                return -EINVAL;
-                                char *buf)
-{
-        struct driver_data *dd = dev_to_disk(dev)->private_data;
-        int size = 0;
-        size += sprintf(&buf[size], "Flag in port struct : [ %08lX ]\n",
+        size += sprintf(&buf[size], "Flag-port : [ %08lX ]\n",
                                                        dd->port->flags);
-        size += sprintf(&buf[size], "Flag in dd struct   : [ %08lX ]\n",
+        size += sprintf(&buf[size], "Flag-dd   : [ %08lX ]\n",
                                                        dd->dd_flag);
-        return size;
+        *offset = size <= len ? size : len;
+        size = copy_to_user(ubuf, buf, *offset);
+        if (size)
+                return -EFAULT;
+        return *offset;
 }
-static DEVICE_ATTR(registers, S_IRUGO, mtip_hw_show_registers, NULL);
+static const struct file_operations mtip_regs_fops = {
-static DEVICE_ATTR(status, S_IRUGO, mtip_hw_show_status, NULL);
+        .owner  = THIS_MODULE,
-static DEVICE_ATTR(flags, S_IRUGO, mtip_hw_show_flags, NULL);
+        .open   = simple_open,
+        .read   = mtip_hw_read_registers,
+        .llseek = no_llseek,
+};
+static const struct file_operations mtip_flags_fops = {
+        .owner  = THIS_MODULE,
+        .open   = simple_open,
+        .read   = mtip_hw_read_flags,
+        .llseek = no_llseek,
+};
 /*
 * Create the sysfs related attributes.
@@ -2671,15 +2705,9 @@ static int mtip_hw_sysfs_init(struct driver_data *dd, struct kobject *kobj)
        if (!kobj || !dd)
                return -EINVAL;
-        if (sysfs_create_file(kobj, &dev_attr_registers.attr))
-                dev_warn(&dd->pdev->dev,
-                        "Error creating 'registers' sysfs entry\n");
        if (sysfs_create_file(kobj, &dev_attr_status.attr))
                dev_warn(&dd->pdev->dev,
                        "Error creating 'status' sysfs entry\n");
-        if (sysfs_create_file(kobj, &dev_attr_flags.attr))
-                dev_warn(&dd->pdev->dev,
-                        "Error creating 'flags' sysfs entry\n");
        return 0;
 }
@@ -2698,13 +2726,39 @@ static int mtip_hw_sysfs_exit(struct driver_data *dd, struct kobject *kobj)
        if (!kobj || !dd)
                return -EINVAL;
-        sysfs_remove_file(kobj, &dev_attr_registers.attr);
        sysfs_remove_file(kobj, &dev_attr_status.attr);
-        sysfs_remove_file(kobj, &dev_attr_flags.attr);
        return 0;
 }
+static int mtip_hw_debugfs_init(struct driver_data *dd)
+{
+        if (!dfs_parent)
+                return -1;
+        dd->dfs_node = debugfs_create_dir(dd->disk->disk_name, dfs_parent);
+        if (IS_ERR_OR_NULL(dd->dfs_node)) {
+                dev_warn(&dd->pdev->dev,
+                        "Error creating node %s under debugfs\n",
+                                                dd->disk->disk_name);
+                dd->dfs_node = NULL;
+                return -1;
+        }
+        debugfs_create_file("flags", S_IRUGO, dd->dfs_node, dd,
+                                                        &mtip_flags_fops);
+        debugfs_create_file("registers", S_IRUGO, dd->dfs_node, dd,
+                                                        &mtip_regs_fops);
+        return 0;
+}
+static void mtip_hw_debugfs_exit(struct driver_data *dd)
+{
+        debugfs_remove_recursive(dd->dfs_node);
+}
 /*
 * Perform any init/resume time hardware setup
 *
@@ -3730,6 +3784,7 @@ skip_create_disk:
                mtip_hw_sysfs_init(dd, kobj);
                kobject_put(kobj);
        }
+        mtip_hw_debugfs_init(dd);
        if (dd->mtip_svc_handler) {
                set_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag);
@@ -3755,6 +3810,8 @@ start_service_thread:
        return rv;
 kthread_run_error:
+        mtip_hw_debugfs_exit(dd);
        /* Delete our gendisk. This also removes the device from /dev */
        del_gendisk(dd->disk);
@@ -3805,6 +3862,7 @@ static int mtip_block_remove(struct driver_data *dd)
                        kobject_put(kobj);
                }
        }
+        mtip_hw_debugfs_exit(dd);
        /*
         * Delete our gendisk structure. This also removes the device
@@ -4152,10 +4210,20 @@ static int __init mtip_init(void)
        }
        mtip_major = error;
+        if (!dfs_parent) {
+                dfs_parent = debugfs_create_dir("rssd", NULL);
+                if (IS_ERR_OR_NULL(dfs_parent)) {
+                        printk(KERN_WARNING "Error creating debugfs parent\n");
+                        dfs_parent = NULL;
+                }
+        }
        /* Register our PCI operations. */
        error = pci_register_driver(&mtip_pci_driver);
-        if (error)
+        if (error) {
+                debugfs_remove(dfs_parent);
                unregister_blkdev(mtip_major, MTIP_DRV_NAME);
+        }
        return error;
 }
@@ -4172,6 +4240,8 @@ static int __init mtip_init(void)
 */
 static void __exit mtip_exit(void)
 {
+        debugfs_remove_recursive(dfs_parent);
        /* Release the allocated major block device number. */
        unregister_blkdev(mtip_major, MTIP_DRV_NAME);
diff --git a/drivers/block/mtip32xx/mtip32xx.h b/drivers/block/mtip32xx/mtip32xx.h
index b2c88da26b2a..f51fc23d17bb 100644
--- a/drivers/block/mtip32xx/mtip32xx.h
+++ b/drivers/block/mtip32xx/mtip32xx.h
@@ -26,7 +26,6 @@
 #include <linux/ata.h>
 #include <linux/interrupt.h>
 #include <linux/genhd.h>
-#include <linux/version.h>
 /* Offset of Subsystem Device ID in pci confoguration space */
 #define PCI_SUBSYSTEM_DEVICEID  0x2E
@@ -111,6 +110,8 @@
 #define dbg_printk(format, arg...)
 #endif
+#define MTIP_DFS_MAX_BUF_SIZE 1024
 #define __force_bit2int (unsigned int __force)
 enum {
@@ -447,6 +448,8 @@ struct driver_data {
        unsigned long dd_flag; /* NOTE: use atomic bit operations on this */
        struct task_struct *mtip_svc_handler; /* task_struct of svc thd */
+        struct dentry *dfs_node;
 };
 #endif
diff --git a/drivers/block/nbd.c b/drivers/block/nbd.c
index 061427a75d37..d07c9f7fded6 100644
--- a/drivers/block/nbd.c
+++ b/drivers/block/nbd.c
@@ -154,6 +154,7 @@ static int sock_xmit(struct nbd_device *nbd, int send, void *buf, int size,
        struct msghdr msg;
        struct kvec iov;
        sigset_t blocked, oldset;
+        unsigned long pflags = current->flags;
        if (unlikely(!sock)) {
                dev_err(disk_to_dev(nbd->disk),
@@ -167,8 +168,9 @@ static int sock_xmit(struct nbd_device *nbd, int send, void *buf, int size,
        siginitsetinv(&blocked, sigmask(SIGKILL));
        sigprocmask(SIG_SETMASK, &blocked, &oldset);
+        current->flags |= PF_MEMALLOC;
        do {
-                sock->sk->sk_allocation = GFP_NOIO;
+                sock->sk->sk_allocation = GFP_NOIO | __GFP_MEMALLOC;
                iov.iov_base = buf;
                iov.iov_len = size;
                msg.msg_name = NULL;
@@ -214,6 +216,7 @@ static int sock_xmit(struct nbd_device *nbd, int send, void *buf, int size,
        } while (size > 0);
        sigprocmask(SIG_SETMASK, &oldset, NULL);
+        tsk_restore_flags(current, pflags, PF_MEMALLOC);
        return result;
 }
@@ -405,6 +408,7 @@ static int nbd_do_it(struct nbd_device *nbd)
        BUG_ON(nbd->magic != NBD_MAGIC);
+        sk_set_memalloc(nbd->sock->sk);
        nbd->pid = task_pid_nr(current);
        ret = device_create_file(disk_to_dev(nbd->disk), &pid_attr);
        if (ret) {
@@ -481,7 +485,7 @@ static void nbd_handle_req(struct nbd_device *nbd, struct request *req)
                nbd_end_request(req);
        } else {
                spin_lock(&nbd->queue_lock);
-                list_add(&req->queuelist, &nbd->queue_head);
+                list_add_tail(&req->queuelist, &nbd->queue_head);
                spin_unlock(&nbd->queue_lock);
        }
diff --git a/drivers/block/rbd.c b/drivers/block/rbd.c
index 65665c9c42c6..9917943a3572 100644
--- a/drivers/block/rbd.c
+++ b/drivers/block/rbd.c
@@ -55,8 +55,6 @@
 #define RBD_MINORS_PER_MAJOR    256             /* max minors per blkdev */
-#define RBD_MAX_MD_NAME_LEN     (RBD_MAX_OBJ_NAME_LEN + sizeof(RBD_SUFFIX))
-#define RBD_MAX_POOL_NAME_LEN   64
 #define RBD_MAX_SNAP_NAME_LEN   32
 #define RBD_MAX_OPT_LEN         1024
@@ -78,13 +76,12 @@
 */
 struct rbd_image_header {
        u64 image_size;
-        char block_name[32];
+        char *object_prefix;
        __u8 obj_order;
        __u8 crypt_type;
        __u8 comp_type;
        struct ceph_snap_context *snapc;
        size_t snap_names_len;
-        u64 snap_seq;
        u32 total_snaps;
        char *snap_names;
@@ -150,7 +147,7 @@ struct rbd_snap {
 * a single device
 */
 struct rbd_device {
-        int                     id;             /* blkdev unique id */
+        int                     dev_id;         /* blkdev unique id */
        int                     major;          /* blkdev assigned major */
        struct gendisk          *disk;          /* blkdev's gendisk and rq */
@@ -163,20 +160,24 @@ struct rbd_device {
        spinlock_t              lock;           /* queue lock */
        struct rbd_image_header header;
-        char                    obj[RBD_MAX_OBJ_NAME_LEN]; /* rbd image name */
+        char                    *image_name;
-        int                     obj_len;
+        size_t                  image_name_len;
-        char                    obj_md_name[RBD_MAX_MD_NAME_LEN]; /* hdr nm. */
+        char                    *header_name;
-        char                    pool_name[RBD_MAX_POOL_NAME_LEN];
+        char                    *pool_name;
-        int                     poolid;
+        int                     pool_id;
        struct ceph_osd_event   *watch_event;
        struct ceph_osd_request *watch_request;
        /* protects updating the header */
        struct rw_semaphore     header_rwsem;
-        char                    snap_name[RBD_MAX_SNAP_NAME_LEN];
+        /* name of the snapshot this device reads from */
+        char                    *snap_name;
+        /* id of the snapshot this device reads from */
        u64                     snap_id;        /* current snapshot id */
-        int read_only;
+        /* whether the snap_id this device reads from still exists */
+        bool                    snap_exists;
+        int                     read_only;
        struct list_head        node;
@@ -201,8 +202,7 @@ static ssize_t rbd_snap_add(struct device *dev,
                            struct device_attribute *attr,
                            const char *buf,
                            size_t count);
-static void __rbd_remove_snap_dev(struct rbd_device *rbd_dev,
+static void __rbd_remove_snap_dev(struct rbd_snap *snap);
-                                  struct rbd_snap *snap);
 static ssize_t rbd_add(struct bus_type *bus, const char *buf,
                       size_t count);
@@ -240,7 +240,7 @@ static void rbd_put_dev(struct rbd_device *rbd_dev)
        put_device(&rbd_dev->dev);
 }
-static int __rbd_refresh_header(struct rbd_device *rbd_dev);
+static int rbd_refresh_header(struct rbd_device *rbd_dev, u64 *hver);
 static int rbd_open(struct block_device *bdev, fmode_t mode)
 {
@@ -273,9 +273,9 @@ static const struct block_device_operations rbd_bd_ops = {
 /*
 * Initialize an rbd client instance.
- * We own *opt.
+ * We own *ceph_opts.
 */
-static struct rbd_client *rbd_client_create(struct ceph_options *opt,
+static struct rbd_client *rbd_client_create(struct ceph_options *ceph_opts,
                                            struct rbd_options *rbd_opts)
 {
        struct rbd_client *rbdc;
@@ -291,10 +291,10 @@ static struct rbd_client *rbd_client_create(struct ceph_options *opt,
        mutex_lock_nested(&ctl_mutex, SINGLE_DEPTH_NESTING);
-        rbdc->client = ceph_create_client(opt, rbdc, 0, 0);
+        rbdc->client = ceph_create_client(ceph_opts, rbdc, 0, 0);
        if (IS_ERR(rbdc->client))
                goto out_mutex;
-        opt = NULL; /* Now rbdc->client is responsible for opt */
+        ceph_opts = NULL; /* Now rbdc->client is responsible for ceph_opts */
        ret = ceph_open_session(rbdc->client);
        if (ret < 0)
@@ -317,23 +317,23 @@ out_mutex:
        mutex_unlock(&ctl_mutex);
        kfree(rbdc);
 out_opt:
-        if (opt)
+        if (ceph_opts)
-                ceph_destroy_options(opt);
+                ceph_destroy_options(ceph_opts);
        return ERR_PTR(ret);
 }
 /*
 * Find a ceph client with specific addr and configuration.
 */
-static struct rbd_client *__rbd_client_find(struct ceph_options *opt)
+static struct rbd_client *__rbd_client_find(struct ceph_options *ceph_opts)
 {
        struct rbd_client *client_node;
-        if (opt->flags & CEPH_OPT_NOSHARE)
+        if (ceph_opts->flags & CEPH_OPT_NOSHARE)
                return NULL;
        list_for_each_entry(client_node, &rbd_client_list, node)
-                if (ceph_compare_options(opt, client_node->client) == 0)
+                if (!ceph_compare_options(ceph_opts, client_node->client))
                        return client_node;
        return NULL;
 }
@@ -349,7 +349,7 @@ enum {
        /* string args above */
 };
-static match_table_t rbdopt_tokens = {
+static match_table_t rbd_opts_tokens = {
        {Opt_notify_timeout, "notify_timeout=%d"},
        /* int args above */
        /* string args above */
@@ -358,11 +358,11 @@ static match_table_t rbdopt_tokens = {
 static int parse_rbd_opts_token(char *c, void *private)
 {
-        struct rbd_options *rbdopt = private;
+        struct rbd_options *rbd_opts = private;
        substring_t argstr[MAX_OPT_ARGS];
        int token, intval, ret;
-        token = match_token(c, rbdopt_tokens, argstr);
+        token = match_token(c, rbd_opts_tokens, argstr);
        if (token < 0)
                return -EINVAL;
@@ -383,7 +383,7 @@ static int parse_rbd_opts_token(char *c, void *private)
        switch (token) {
        case Opt_notify_timeout:
-                rbdopt->notify_timeout = intval;
+                rbd_opts->notify_timeout = intval;
                break;
        default:
                BUG_ON(token);
@@ -400,7 +400,7 @@ static struct rbd_client *rbd_get_client(const char *mon_addr,
                                         char *options)
 {
        struct rbd_client *rbdc;
-        struct ceph_options *opt;
+        struct ceph_options *ceph_opts;
        struct rbd_options *rbd_opts;
        rbd_opts = kzalloc(sizeof(*rbd_opts), GFP_KERNEL);
@@ -409,29 +409,29 @@ static struct rbd_client *rbd_get_client(const char *mon_addr,
        rbd_opts->notify_timeout = RBD_NOTIFY_TIMEOUT_DEFAULT;
-        opt = ceph_parse_options(options, mon_addr,
+        ceph_opts = ceph_parse_options(options, mon_addr,
-                                mon_addr + mon_addr_len,
+                                        mon_addr + mon_addr_len,
-                                parse_rbd_opts_token, rbd_opts);
+                                        parse_rbd_opts_token, rbd_opts);
-        if (IS_ERR(opt)) {
+        if (IS_ERR(ceph_opts)) {
                kfree(rbd_opts);
-                return ERR_CAST(opt);
+                return ERR_CAST(ceph_opts);
        }
        spin_lock(&rbd_client_list_lock);
-        rbdc = __rbd_client_find(opt);
+        rbdc = __rbd_client_find(ceph_opts);
        if (rbdc) {
                /* using an existing client */
                kref_get(&rbdc->kref);
                spin_unlock(&rbd_client_list_lock);
-                ceph_destroy_options(opt);
+                ceph_destroy_options(ceph_opts);
                kfree(rbd_opts);
                return rbdc;
        }
        spin_unlock(&rbd_client_list_lock);
-        rbdc = rbd_client_create(opt, rbd_opts);
+        rbdc = rbd_client_create(ceph_opts, rbd_opts);
        if (IS_ERR(rbdc))
                kfree(rbd_opts);
@@ -480,46 +480,60 @@ static void rbd_coll_release(struct kref *kref)
        kfree(coll);
 }
+static bool rbd_dev_ondisk_valid(struct rbd_image_header_ondisk *ondisk)
+{
+        return !memcmp(&ondisk->text,
+                        RBD_HEADER_TEXT, sizeof (RBD_HEADER_TEXT));
+}
 /*
 * Create a new header structure, translate header format from the on-disk
 * header.
 */
 static int rbd_header_from_disk(struct rbd_image_header *header,
                                 struct rbd_image_header_ondisk *ondisk,
-                                 u32 allocated_snaps,
+                                 u32 allocated_snaps)
-                                 gfp_t gfp_flags)
 {
-        u32 i, snap_count;
+        u32 snap_count;
-        if (memcmp(ondisk, RBD_HEADER_TEXT, sizeof(RBD_HEADER_TEXT)))
+        if (!rbd_dev_ondisk_valid(ondisk))
                return -ENXIO;
        snap_count = le32_to_cpu(ondisk->snap_count);
-        if (snap_count > (UINT_MAX - sizeof(struct ceph_snap_context))
+        if (snap_count > (SIZE_MAX - sizeof(struct ceph_snap_context))
-                         / sizeof (*ondisk))
+                                 / sizeof (u64))
                return -EINVAL;
        header->snapc = kmalloc(sizeof(struct ceph_snap_context) +
-                                snap_count * sizeof (*ondisk),
+                                snap_count * sizeof(u64),
-                                gfp_flags);
+                                GFP_KERNEL);
        if (!header->snapc)
                return -ENOMEM;
-        header->snap_names_len = le64_to_cpu(ondisk->snap_names_len);
        if (snap_count) {
+                header->snap_names_len = le64_to_cpu(ondisk->snap_names_len);
                header->snap_names = kmalloc(header->snap_names_len,
-                                             gfp_flags);
+                                             GFP_KERNEL);
                if (!header->snap_names)
                        goto err_snapc;
                header->snap_sizes = kmalloc(snap_count * sizeof(u64),
-                                             gfp_flags);
+                                             GFP_KERNEL);
                if (!header->snap_sizes)
                        goto err_names;
        } else {
+                WARN_ON(ondisk->snap_names_len);
+                header->snap_names_len = 0;
                header->snap_names = NULL;
                header->snap_sizes = NULL;
        }
-        memcpy(header->block_name, ondisk->block_name,
+        header->object_prefix = kmalloc(sizeof (ondisk->block_name) + 1,
+                                        GFP_KERNEL);
+        if (!header->object_prefix)
+                goto err_sizes;
+        memcpy(header->object_prefix, ondisk->block_name,
               sizeof(ondisk->block_name));
+        header->object_prefix[sizeof (ondisk->block_name)] = '\0';
        header->image_size = le64_to_cpu(ondisk->image_size);
        header->obj_order = ondisk->options.order;
@@ -527,11 +541,13 @@ static int rbd_header_from_disk(struct rbd_image_header *header,
        header->comp_type = ondisk->options.comp_type;
        atomic_set(&header->snapc->nref, 1);
-        header->snap_seq = le64_to_cpu(ondisk->snap_seq);
+        header->snapc->seq = le64_to_cpu(ondisk->snap_seq);
        header->snapc->num_snaps = snap_count;
        header->total_snaps = snap_count;
        if (snap_count && allocated_snaps == snap_count) {
+                int i;
                for (i = 0; i < snap_count; i++) {
                        header->snapc->snaps[i] =
                                le64_to_cpu(ondisk->snaps[i].id);
@@ -540,16 +556,22 @@ static int rbd_header_from_disk(struct rbd_image_header *header,
                }
                /* copy snapshot names */
-                memcpy(header->snap_names, &ondisk->snaps[i],
+                memcpy(header->snap_names, &ondisk->snaps[snap_count],
                        header->snap_names_len);
        }
        return 0;
+err_sizes:
+        kfree(header->snap_sizes);
+        header->snap_sizes = NULL;
 err_names:
        kfree(header->snap_names);
+        header->snap_names = NULL;
 err_snapc:
        kfree(header->snapc);
+        header->snapc = NULL;
        return -ENOMEM;
 }
@@ -575,52 +597,50 @@ static int snap_by_name(struct rbd_image_header *header, const char *snap_name,
        return -ENOENT;
 }
-static int rbd_header_set_snap(struct rbd_device *dev, u64 *size)
+static int rbd_header_set_snap(struct rbd_device *rbd_dev, u64 *size)
 {
-        struct rbd_image_header *header = &dev->header;
+        int ret;
-        struct ceph_snap_context *snapc = header->snapc;
-        int ret = -ENOENT;
-        BUILD_BUG_ON(sizeof (dev->snap_name) < sizeof (RBD_SNAP_HEAD_NAME));
-        down_write(&dev->header_rwsem);
+        down_write(&rbd_dev->header_rwsem);
-        if (!memcmp(dev->snap_name, RBD_SNAP_HEAD_NAME,
+        if (!memcmp(rbd_dev->snap_name, RBD_SNAP_HEAD_NAME,
                    sizeof (RBD_SNAP_HEAD_NAME))) {
-                if (header->total_snaps)
+                rbd_dev->snap_id = CEPH_NOSNAP;
-                        snapc->seq = header->snap_seq;
+                rbd_dev->snap_exists = false;
-                else
+                rbd_dev->read_only = 0;
-                        snapc->seq = 0;
-                dev->snap_id = CEPH_NOSNAP;
-                dev->read_only = 0;
                if (size)
-                        *size = header->image_size;
+                        *size = rbd_dev->header.image_size;
        } else {
-                ret = snap_by_name(header, dev->snap_name, &snapc->seq, size);
+                u64 snap_id = 0;
+                ret = snap_by_name(&rbd_dev->header, rbd_dev->snap_name,
+                                        &snap_id, size);
                if (ret < 0)
                        goto done;
-                dev->snap_id = snapc->seq;
+                rbd_dev->snap_id = snap_id;
-                dev->read_only = 1;
+                rbd_dev->snap_exists = true;
+                rbd_dev->read_only = 1;
        }
        ret = 0;
 done:
-        up_write(&dev->header_rwsem);
+        up_write(&rbd_dev->header_rwsem);
        return ret;
 }
 static void rbd_header_free(struct rbd_image_header *header)
 {
-        kfree(header->snapc);
+        kfree(header->object_prefix);
-        kfree(header->snap_names);
        kfree(header->snap_sizes);
+        kfree(header->snap_names);
+        ceph_put_snap_context(header->snapc);
 }
 /*
 * get the actual striped segment name, offset and length
 */
 static u64 rbd_get_segment(struct rbd_image_header *header,
-                           const char *block_name,
+                           const char *object_prefix,
                           u64 ofs, u64 len,
                           char *seg_name, u64 *segofs)
 {
@@ -628,7 +648,7 @@ static u64 rbd_get_segment(struct rbd_image_header *header,
        if (seg_name)
                snprintf(seg_name, RBD_MAX_SEG_NAME_LEN,
-                         "%s.%012llx", block_name, seg);
+                         "%s.%012llx", object_prefix, seg);
        ofs = ofs & ((1 << header->obj_order) - 1);
        len = min_t(u64, len, (1 << header->obj_order) - ofs);
@@ -726,9 +746,8 @@ static struct bio *bio_chain_clone(struct bio **old, struct bio **next,
                         * split_bio will BUG_ON if this is not the case
                         */
                        dout("bio_chain_clone split! total=%d remaining=%d"
-                             "bi_size=%d\n",
+                             "bi_size=%u\n",
-                             (int)total, (int)len-total,
+                             total, len - total, old_chain->bi_size);
-                             (int)old_chain->bi_size);
                        /* split the bio. We'll release it either in the next
                           call, or it will have to be released outside */
@@ -777,22 +796,24 @@ err_out:
 /*
 * helpers for osd request op vectors.
 */
-static int rbd_create_rw_ops(struct ceph_osd_req_op **ops,
+static struct ceph_osd_req_op *rbd_create_rw_ops(int num_ops,
-                            int num_ops,
+                                        int opcode, u32 payload_len)
-                            int opcode,
+{
-                            u32 payload_len)
+        struct ceph_osd_req_op *ops;
-{
-        *ops = kzalloc(sizeof(struct ceph_osd_req_op) * (num_ops + 1),
+        ops = kzalloc(sizeof (*ops) * (num_ops + 1), GFP_NOIO);
-                       GFP_NOIO);
+        if (!ops)
-        if (!*ops)
+                return NULL;
-                return -ENOMEM;
-        (*ops)[0].op = opcode;
+        ops[0].op = opcode;
        /*
         * op extent offset and length will be set later on
         * in calc_raw_layout()
         */
-        (*ops)[0].payload_len = payload_len;
+        ops[0].payload_len = payload_len;
-        return 0;
+        return ops;
 }
 static void rbd_destroy_ops(struct ceph_osd_req_op *ops)
@@ -808,8 +829,8 @@ static void rbd_coll_end_req_index(struct request *rq,
        struct request_queue *q;
        int min, max, i;
-        dout("rbd_coll_end_req_index %p index %d ret %d len %lld\n",
+        dout("rbd_coll_end_req_index %p index %d ret %d len %llu\n",
-             coll, index, ret, len);
+             coll, index, ret, (unsigned long long) len);
        if (!rq)
                return;
@@ -848,16 +869,15 @@ static void rbd_coll_end_req(struct rbd_request *req,
 * Send ceph osd request
 */
 static int rbd_do_request(struct request *rq,
-                          struct rbd_device *dev,
+                          struct rbd_device *rbd_dev,
                          struct ceph_snap_context *snapc,
                          u64 snapid,
-                          const char *obj, u64 ofs, u64 len,
+                          const char *object_name, u64 ofs, u64 len,
                          struct bio *bio,
                          struct page **pages,
                          int num_pages,
                          int flags,
                          struct ceph_osd_req_op *ops,
-                          int num_reply,
                          struct rbd_req_coll *coll,
                          int coll_index,
                          void (*rbd_cb)(struct ceph_osd_request *req,
@@ -887,15 +907,13 @@ static int rbd_do_request(struct request *rq,
                req_data->coll_index = coll_index;
        }
-        dout("rbd_do_request obj=%s ofs=%lld len=%lld\n", obj, len, ofs);
+        dout("rbd_do_request object_name=%s ofs=%llu len=%llu\n", object_name,
+                (unsigned long long) ofs, (unsigned long long) len);
-        down_read(&dev->header_rwsem);
-        osdc = &dev->rbd_client->client->osdc;
+        osdc = &rbd_dev->rbd_client->client->osdc;
        req = ceph_osdc_alloc_request(osdc, flags, snapc, ops,
                                        false, GFP_NOIO, pages, bio);
        if (!req) {
-                up_read(&dev->header_rwsem);
                ret = -ENOMEM;
                goto done_pages;
        }
@@ -912,7 +930,7 @@ static int rbd_do_request(struct request *rq,
        reqhead = req->r_request->front.iov_base;
        reqhead->snapid = cpu_to_le64(CEPH_NOSNAP);
-        strncpy(req->r_oid, obj, sizeof(req->r_oid));
+        strncpy(req->r_oid, object_name, sizeof(req->r_oid));
        req->r_oid_len = strlen(req->r_oid);
        layout = &req->r_file_layout;
@@ -920,7 +938,7 @@ static int rbd_do_request(struct request *rq,
        layout->fl_stripe_unit = cpu_to_le32(1 << RBD_MAX_OBJ_ORDER);
        layout->fl_stripe_count = cpu_to_le32(1);
        layout->fl_object_size = cpu_to_le32(1 << RBD_MAX_OBJ_ORDER);
-        layout->fl_pg_pool = cpu_to_le32(dev->poolid);
+        layout->fl_pg_pool = cpu_to_le32(rbd_dev->pool_id);
        ceph_calc_raw_layout(osdc, layout, snapid, ofs, &len, &bno,
                                req, ops);
@@ -929,7 +947,6 @@ static int rbd_do_request(struct request *rq,
                                snapc,
                                &mtime,
                                req->r_oid, req->r_oid_len);
-        up_read(&dev->header_rwsem);
        if (linger_req) {
                ceph_osdc_set_request_linger(osdc, req);
@@ -944,8 +961,9 @@ static int rbd_do_request(struct request *rq,
                ret = ceph_osdc_wait_request(osdc, req);
                if (ver)
                        *ver = le64_to_cpu(req->r_reassert_version.version);
-                dout("reassert_ver=%lld\n",
+                dout("reassert_ver=%llu\n",
-                     le64_to_cpu(req->r_reassert_version.version));
+                        (unsigned long long)
+                                le64_to_cpu(req->r_reassert_version.version));
                ceph_osdc_put_request(req);
        }
        return ret;
@@ -977,9 +995,10 @@ static void rbd_req_cb(struct ceph_osd_request *req, struct ceph_msg *msg)
        op = (void *)(replyhead + 1);
        rc = le32_to_cpu(replyhead->result);
        bytes = le64_to_cpu(op->extent.length);
-        read_op = (le32_to_cpu(op->op) == CEPH_OSD_OP_READ);
+        read_op = (le16_to_cpu(op->op) == CEPH_OSD_OP_READ);
-        dout("rbd_req_cb bytes=%lld readop=%d rc=%d\n", bytes, read_op, rc);
+        dout("rbd_req_cb bytes=%llu readop=%d rc=%d\n",
+                (unsigned long long) bytes, read_op, (int) rc);
        if (rc == -ENOENT && read_op) {
                zero_bio_chain(req_data->bio, 0);
@@ -1006,14 +1025,12 @@ static void rbd_simple_req_cb(struct ceph_osd_request *req, struct ceph_msg *msg
 /*
 * Do a synchronous ceph osd operation
 */
-static int rbd_req_sync_op(struct rbd_device *dev,
+static int rbd_req_sync_op(struct rbd_device *rbd_dev,
                           struct ceph_snap_context *snapc,
                           u64 snapid,
-                           int opcode,
                           int flags,
-                           struct ceph_osd_req_op *orig_ops,
+                           struct ceph_osd_req_op *ops,
-                           int num_reply,
+                           const char *object_name,
-                           const char *obj,
                           u64 ofs, u64 len,
                           char *buf,
                           struct ceph_osd_request **linger_req,
@@ -1022,45 +1039,28 @@ static int rbd_req_sync_op(struct rbd_device *dev,
        int ret;
        struct page **pages;
        int num_pages;
-        struct ceph_osd_req_op *ops = orig_ops;
-        u32 payload_len;
+        BUG_ON(ops == NULL);
        num_pages = calc_pages_for(ofs , len);
        pages = ceph_alloc_page_vector(num_pages, GFP_KERNEL);
        if (IS_ERR(pages))
                return PTR_ERR(pages);
-        if (!orig_ops) {
+        ret = rbd_do_request(NULL, rbd_dev, snapc, snapid,
-                payload_len = (flags & CEPH_OSD_FLAG_WRITE ? len : 0);
+                          object_name, ofs, len, NULL,
-                ret = rbd_create_rw_ops(&ops, 1, opcode, payload_len);
-                if (ret < 0)
-                        goto done;
-                if ((flags & CEPH_OSD_FLAG_WRITE) && buf) {
-                        ret = ceph_copy_to_page_vector(pages, buf, ofs, len);
-                        if (ret < 0)
-                                goto done_ops;
-                }
-        }
-        ret = rbd_do_request(NULL, dev, snapc, snapid,
-                          obj, ofs, len, NULL,
                          pages, num_pages,
                          flags,
                          ops,
-                          2,
                          NULL, 0,
                          NULL,
                          linger_req, ver);
        if (ret < 0)
-                goto done_ops;
+                goto done;
        if ((flags & CEPH_OSD_FLAG_READ) && buf)
                ret = ceph_copy_from_page_vector(pages, buf, ofs, ret);
-done_ops:
-        if (!orig_ops)
-                rbd_destroy_ops(ops);
 done:
        ceph_release_page_vector(pages, num_pages);
        return ret;
@@ -1070,10 +1070,10 @@ done:
 * Do an asynchronous ceph osd operation
 */
 static int rbd_do_op(struct request *rq,
-                     struct rbd_device *rbd_dev ,
+                     struct rbd_device *rbd_dev,
                     struct ceph_snap_context *snapc,
                     u64 snapid,
-                     int opcode, int flags, int num_reply,
+                     int opcode, int flags,
                     u64 ofs, u64 len,
                     struct bio *bio,
                     struct rbd_req_coll *coll,
@@ -1091,14 +1091,15 @@ static int rbd_do_op(struct request *rq,
                return -ENOMEM;
        seg_len = rbd_get_segment(&rbd_dev->header,
-                                  rbd_dev->header.block_name,
+                                  rbd_dev->header.object_prefix,
                                  ofs, len,
                                  seg_name, &seg_ofs);
        payload_len = (flags & CEPH_OSD_FLAG_WRITE ? seg_len : 0);
-        ret = rbd_create_rw_ops(&ops, 1, opcode, payload_len);
+        ret = -ENOMEM;
-        if (ret < 0)
+        ops = rbd_create_rw_ops(1, opcode, payload_len);
+        if (!ops)
                goto done;
        /* we've taken care of segment sizes earlier when we
@@ -1112,7 +1113,6 @@ static int rbd_do_op(struct request *rq,
                             NULL, 0,
                             flags,
                             ops,
-                             num_reply,
                             coll, coll_index,
                             rbd_req_cb, 0, NULL);
@@ -1136,7 +1136,6 @@ static int rbd_req_write(struct request *rq,
        return rbd_do_op(rq, rbd_dev, snapc, CEPH_NOSNAP,
                         CEPH_OSD_OP_WRITE,
                         CEPH_OSD_FLAG_WRITE | CEPH_OSD_FLAG_ONDISK,
-                         2,
                         ofs, len, bio, coll, coll_index);
 }
@@ -1155,55 +1154,58 @@ static int rbd_req_read(struct request *rq,
                         snapid,
                         CEPH_OSD_OP_READ,
                         CEPH_OSD_FLAG_READ,
-                         2,
                         ofs, len, bio, coll, coll_index);
 }
 /*
 * Request sync osd read
 */
-static int rbd_req_sync_read(struct rbd_device *dev,
+static int rbd_req_sync_read(struct rbd_device *rbd_dev,
-                          struct ceph_snap_context *snapc,
                          u64 snapid,
-                          const char *obj,
+                          const char *object_name,
                          u64 ofs, u64 len,
                          char *buf,
                          u64 *ver)
 {
-        return rbd_req_sync_op(dev, NULL,
+        struct ceph_osd_req_op *ops;
+        int ret;
+        ops = rbd_create_rw_ops(1, CEPH_OSD_OP_READ, 0);
+        if (!ops)
+                return -ENOMEM;
+        ret = rbd_req_sync_op(rbd_dev, NULL,
                               snapid,
-                               CEPH_OSD_OP_READ,
                               CEPH_OSD_FLAG_READ,
-                               NULL,
+                               ops, object_name, ofs, len, buf, NULL, ver);
-                               1, obj, ofs, len, buf, NULL, ver);
+        rbd_destroy_ops(ops);
+        return ret;
 }
 /*
 * Request sync osd watch
 */
-static int rbd_req_sync_notify_ack(struct rbd_device *dev,
+static int rbd_req_sync_notify_ack(struct rbd_device *rbd_dev,
                                   u64 ver,
-                                   u64 notify_id,
+                                   u64 notify_id)
-                                   const char *obj)
 {
        struct ceph_osd_req_op *ops;
-        struct page **pages = NULL;
        int ret;
-        ret = rbd_create_rw_ops(&ops, 1, CEPH_OSD_OP_NOTIFY_ACK, 0);
+        ops = rbd_create_rw_ops(1, CEPH_OSD_OP_NOTIFY_ACK, 0);
-        if (ret < 0)
+        if (!ops)
-                return ret;
+                return -ENOMEM;
-        ops[0].watch.ver = cpu_to_le64(dev->header.obj_version);
+        ops[0].watch.ver = cpu_to_le64(ver);
        ops[0].watch.cookie = notify_id;
        ops[0].watch.flag = 0;
-        ret = rbd_do_request(NULL, dev, NULL, CEPH_NOSNAP,
+        ret = rbd_do_request(NULL, rbd_dev, NULL, CEPH_NOSNAP,
-                          obj, 0, 0, NULL,
+                          rbd_dev->header_name, 0, 0, NULL,
-                          pages, 0,
+                          NULL, 0,
                          CEPH_OSD_FLAG_READ,
                          ops,
-                          1,
                          NULL, 0,
                          rbd_simple_req_cb, 0, NULL);
@@ -1213,54 +1215,53 @@ static int rbd_req_sync_notify_ack(struct rbd_device *dev,
 static void rbd_watch_cb(u64 ver, u64 notify_id, u8 opcode, void *data)
 {
-        struct rbd_device *dev = (struct rbd_device *)data;
+        struct rbd_device *rbd_dev = (struct rbd_device *)data;
+        u64 hver;
        int rc;
-        if (!dev)
+        if (!rbd_dev)
                return;
-        dout("rbd_watch_cb %s notify_id=%lld opcode=%d\n", dev->obj_md_name,
+        dout("rbd_watch_cb %s notify_id=%llu opcode=%u\n",
-                notify_id, (int)opcode);
+                rbd_dev->header_name, (unsigned long long) notify_id,
-        mutex_lock_nested(&ctl_mutex, SINGLE_DEPTH_NESTING);
+                (unsigned int) opcode);
-        rc = __rbd_refresh_header(dev);
+        rc = rbd_refresh_header(rbd_dev, &hver);
-        mutex_unlock(&ctl_mutex);
        if (rc)
                pr_warning(RBD_DRV_NAME "%d got notification but failed to "
-                           " update snaps: %d\n", dev->major, rc);
+                           " update snaps: %d\n", rbd_dev->major, rc);
-        rbd_req_sync_notify_ack(dev, ver, notify_id, dev->obj_md_name);
+        rbd_req_sync_notify_ack(rbd_dev, hver, notify_id);
 }
 /*
 * Request sync osd watch
 */
-static int rbd_req_sync_watch(struct rbd_device *dev,
+static int rbd_req_sync_watch(struct rbd_device *rbd_dev)
-                              const char *obj,
-                              u64 ver)
 {
        struct ceph_osd_req_op *ops;
-        struct ceph_osd_client *osdc = &dev->rbd_client->client->osdc;
+        struct ceph_osd_client *osdc = &rbd_dev->rbd_client->client->osdc;
+        int ret;
-        int ret = rbd_create_rw_ops(&ops, 1, CEPH_OSD_OP_WATCH, 0);
+        ops = rbd_create_rw_ops(1, CEPH_OSD_OP_WATCH, 0);
-        if (ret < 0)
+        if (!ops)
-                return ret;
+                return -ENOMEM;
        ret = ceph_osdc_create_event(osdc, rbd_watch_cb, 0,
-                                     (void *)dev, &dev->watch_event);
+                                     (void *)rbd_dev, &rbd_dev->watch_event);
        if (ret < 0)
                goto fail;
-        ops[0].watch.ver = cpu_to_le64(ver);
+        ops[0].watch.ver = cpu_to_le64(rbd_dev->header.obj_version);
-        ops[0].watch.cookie = cpu_to_le64(dev->watch_event->cookie);
+        ops[0].watch.cookie = cpu_to_le64(rbd_dev->watch_event->cookie);
        ops[0].watch.flag = 1;
-        ret = rbd_req_sync_op(dev, NULL,
+        ret = rbd_req_sync_op(rbd_dev, NULL,
                              CEPH_NOSNAP,
-                              0,
                              CEPH_OSD_FLAG_WRITE | CEPH_OSD_FLAG_ONDISK,
                              ops,
-                              1, obj, 0, 0, NULL,
+                              rbd_dev->header_name,
-                              &dev->watch_request, NULL);
+                              0, 0, NULL,
+                              &rbd_dev->watch_request, NULL);
        if (ret < 0)
                goto fail_event;
@@ -1269,8 +1270,8 @@ static int rbd_req_sync_watch(struct rbd_device *dev,
        return 0;
 fail_event:
-        ceph_osdc_cancel_event(dev->watch_event);
+        ceph_osdc_cancel_event(rbd_dev->watch_event);
-        dev->watch_event = NULL;
+        rbd_dev->watch_event = NULL;
 fail:
        rbd_destroy_ops(ops);
        return ret;
@@ -1279,64 +1280,65 @@ fail:
 /*
 * Request sync osd unwatch
 */
-static int rbd_req_sync_unwatch(struct rbd_device *dev,
+static int rbd_req_sync_unwatch(struct rbd_device *rbd_dev)
-                                const char *obj)
 {
        struct ceph_osd_req_op *ops;
+        int ret;
-        int ret = rbd_create_rw_ops(&ops, 1, CEPH_OSD_OP_WATCH, 0);
+        ops = rbd_create_rw_ops(1, CEPH_OSD_OP_WATCH, 0);
-        if (ret < 0)
+        if (!ops)
-                return ret;
+                return -ENOMEM;
        ops[0].watch.ver = 0;
-        ops[0].watch.cookie = cpu_to_le64(dev->watch_event->cookie);
+        ops[0].watch.cookie = cpu_to_le64(rbd_dev->watch_event->cookie);
        ops[0].watch.flag = 0;
-        ret = rbd_req_sync_op(dev, NULL,
+        ret = rbd_req_sync_op(rbd_dev, NULL,
                              CEPH_NOSNAP,
-                              0,
                              CEPH_OSD_FLAG_WRITE | CEPH_OSD_FLAG_ONDISK,
                              ops,
-                              1, obj, 0, 0, NULL, NULL, NULL);
+                              rbd_dev->header_name,
+                              0, 0, NULL, NULL, NULL);
        rbd_destroy_ops(ops);
-        ceph_osdc_cancel_event(dev->watch_event);
+        ceph_osdc_cancel_event(rbd_dev->watch_event);
-        dev->watch_event = NULL;
+        rbd_dev->watch_event = NULL;
        return ret;
 }
 struct rbd_notify_info {
-        struct rbd_device *dev;
+        struct rbd_device *rbd_dev;
 };
 static void rbd_notify_cb(u64 ver, u64 notify_id, u8 opcode, void *data)
 {
-        struct rbd_device *dev = (struct rbd_device *)data;
+        struct rbd_device *rbd_dev = (struct rbd_device *)data;
-        if (!dev)
+        if (!rbd_dev)
                return;
-        dout("rbd_notify_cb %s notify_id=%lld opcode=%d\n", dev->obj_md_name,
+        dout("rbd_notify_cb %s notify_id=%llu opcode=%u\n",
-                notify_id, (int)opcode);
+                        rbd_dev->header_name, (unsigned long long) notify_id,
+                        (unsigned int) opcode);
 }
 /*
 * Request sync osd notify
 */
-static int rbd_req_sync_notify(struct rbd_device *dev,
+static int rbd_req_sync_notify(struct rbd_device *rbd_dev)
-                          const char *obj)
 {
        struct ceph_osd_req_op *ops;
-        struct ceph_osd_client *osdc = &dev->rbd_client->client->osdc;
+        struct ceph_osd_client *osdc = &rbd_dev->rbd_client->client->osdc;
        struct ceph_osd_event *event;
        struct rbd_notify_info info;
        int payload_len = sizeof(u32) + sizeof(u32);
        int ret;
-        ret = rbd_create_rw_ops(&ops, 1, CEPH_OSD_OP_NOTIFY, payload_len);
+        ops = rbd_create_rw_ops(1, CEPH_OSD_OP_NOTIFY, payload_len);
-        if (ret < 0)
+        if (!ops)
-                return ret;
+                return -ENOMEM;
-        info.dev = dev;
+        info.rbd_dev = rbd_dev;
        ret = ceph_osdc_create_event(osdc, rbd_notify_cb, 1,
                                     (void *)&info, &event);
@@ -1349,12 +1351,12 @@ static int rbd_req_sync_notify(struct rbd_device *dev,
        ops[0].watch.prot_ver = RADOS_NOTIFY_VER;
        ops[0].watch.timeout = 12;
-        ret = rbd_req_sync_op(dev, NULL,
+        ret = rbd_req_sync_op(rbd_dev, NULL,
                               CEPH_NOSNAP,
-                               0,
                               CEPH_OSD_FLAG_WRITE | CEPH_OSD_FLAG_ONDISK,
                               ops,
-                               1, obj, 0, 0, NULL, NULL, NULL);
+                               rbd_dev->header_name,
+                               0, 0, NULL, NULL, NULL);
        if (ret < 0)
                goto fail_event;
@@ -1373,36 +1375,37 @@ fail:
 /*
 * Request sync osd read
 */
-static int rbd_req_sync_exec(struct rbd_device *dev,
+static int rbd_req_sync_exec(struct rbd_device *rbd_dev,
-                             const char *obj,
+                             const char *object_name,
-                             const char *cls,
+                             const char *class_name,
-                             const char *method,
+                             const char *method_name,
                             const char *data,
                             int len,
                             u64 *ver)
 {
        struct ceph_osd_req_op *ops;
-        int cls_len = strlen(cls);
+        int class_name_len = strlen(class_name);
-        int method_len = strlen(method);
+        int method_name_len = strlen(method_name);
-        int ret = rbd_create_rw_ops(&ops, 1, CEPH_OSD_OP_CALL,
+        int ret;
-                                    cls_len + method_len + len);
-        if (ret < 0)
-                return ret;
-        ops[0].cls.class_name = cls;
+        ops = rbd_create_rw_ops(1, CEPH_OSD_OP_CALL,
-        ops[0].cls.class_len = (__u8)cls_len;
+                                    class_name_len + method_name_len + len);
-        ops[0].cls.method_name = method;
+        if (!ops)
-        ops[0].cls.method_len = (__u8)method_len;
+                return -ENOMEM;
+        ops[0].cls.class_name = class_name;
+        ops[0].cls.class_len = (__u8) class_name_len;
+        ops[0].cls.method_name = method_name;
+        ops[0].cls.method_len = (__u8) method_name_len;
        ops[0].cls.argc = 0;
        ops[0].cls.indata = data;
        ops[0].cls.indata_len = len;
-        ret = rbd_req_sync_op(dev, NULL,
+        ret = rbd_req_sync_op(rbd_dev, NULL,
                               CEPH_NOSNAP,
-                               0,
                               CEPH_OSD_FLAG_WRITE | CEPH_OSD_FLAG_ONDISK,
                               ops,
-                               1, obj, 0, 0, NULL, NULL, ver);
+                               object_name, 0, 0, NULL, NULL, ver);
        rbd_destroy_ops(ops);
@@ -1437,10 +1440,12 @@ static void rbd_rq_fn(struct request_queue *q)
                struct bio *bio;
                struct bio *rq_bio, *next_bio = NULL;
                bool do_write;
-                int size, op_size = 0;
+                unsigned int size;
+                u64 op_size = 0;
                u64 ofs;
                int num_segs, cur_seg = 0;
                struct rbd_req_coll *coll;
+                struct ceph_snap_context *snapc;
                /* peek at request from block layer */
                if (!rq)
@@ -1467,23 +1472,38 @@ static void rbd_rq_fn(struct request_queue *q)
                spin_unlock_irq(q->queue_lock);
+                down_read(&rbd_dev->header_rwsem);
+                if (rbd_dev->snap_id != CEPH_NOSNAP && !rbd_dev->snap_exists) {
+                        up_read(&rbd_dev->header_rwsem);
+                        dout("request for non-existent snapshot");
+                        spin_lock_irq(q->queue_lock);
+                        __blk_end_request_all(rq, -ENXIO);
+                        continue;
+                }
+                snapc = ceph_get_snap_context(rbd_dev->header.snapc);
+                up_read(&rbd_dev->header_rwsem);
                dout("%s 0x%x bytes at 0x%llx\n",
                     do_write ? "write" : "read",
-                     size, blk_rq_pos(rq) * SECTOR_SIZE);
+                     size, (unsigned long long) blk_rq_pos(rq) * SECTOR_SIZE);
                num_segs = rbd_get_num_segments(&rbd_dev->header, ofs, size);
                coll = rbd_alloc_coll(num_segs);
                if (!coll) {
                        spin_lock_irq(q->queue_lock);
                        __blk_end_request_all(rq, -ENOMEM);
+                        ceph_put_snap_context(snapc);
                        continue;
                }
                do {
                        /* a bio clone to be passed down to OSD req */
-                        dout("rq->bio->bi_vcnt=%d\n", rq->bio->bi_vcnt);
+                        dout("rq->bio->bi_vcnt=%hu\n", rq->bio->bi_vcnt);
                        op_size = rbd_get_segment(&rbd_dev->header,
-                                                  rbd_dev->header.block_name,
+                                                  rbd_dev->header.object_prefix,
                                                  ofs, size,
                                                  NULL, NULL);
                        kref_get(&coll->kref);
@@ -1499,7 +1519,7 @@ static void rbd_rq_fn(struct request_queue *q)
                        /* init OSD command: write or read */
                        if (do_write)
                                rbd_req_write(rq, rbd_dev,
-                                              rbd_dev->header.snapc,
+                                              snapc,
                                              ofs,
                                              op_size, bio,
                                              coll, cur_seg);
@@ -1522,6 +1542,8 @@ next_seg:
                if (bp)
                        bio_pair_release(bp);
                spin_lock_irq(q->queue_lock);
+                ceph_put_snap_context(snapc);
        }
 }
@@ -1592,18 +1614,19 @@ static int rbd_read_header(struct rbd_device *rbd_dev,
                        return -ENOMEM;
                rc = rbd_req_sync_read(rbd_dev,
-                                       NULL, CEPH_NOSNAP,
+                                       CEPH_NOSNAP,
-                                       rbd_dev->obj_md_name,
+                                       rbd_dev->header_name,
                                       0, len,
                                       (char *)dh, &ver);
                if (rc < 0)
                        goto out_dh;
-                rc = rbd_header_from_disk(header, dh, snap_count, GFP_KERNEL);
+                rc = rbd_header_from_disk(header, dh, snap_count);
                if (rc < 0) {
                        if (rc == -ENXIO)
                                pr_warning("unrecognized header format"
-                                           " for image %s", rbd_dev->obj);
+                                           " for image %s\n",
+                                           rbd_dev->image_name);
                        goto out_dh;
                }
@@ -1628,7 +1651,7 @@ out_dh:
 /*
 * create a snapshot
 */
-static int rbd_header_add_snap(struct rbd_device *dev,
+static int rbd_header_add_snap(struct rbd_device *rbd_dev,
                               const char *snap_name,
                               gfp_t gfp_flags)
 {
@@ -1636,16 +1659,15 @@ static int rbd_header_add_snap(struct rbd_device *dev,
        u64 new_snapid;
        int ret;
        void *data, *p, *e;
-        u64 ver;
        struct ceph_mon_client *monc;
        /* we should create a snapshot only if we're pointing at the head */
-        if (dev->snap_id != CEPH_NOSNAP)
+        if (rbd_dev->snap_id != CEPH_NOSNAP)
                return -EINVAL;
-        monc = &dev->rbd_client->client->monc;
+        monc = &rbd_dev->rbd_client->client->monc;
-        ret = ceph_monc_create_snapid(monc, dev->poolid, &new_snapid);
+        ret = ceph_monc_create_snapid(monc, rbd_dev->pool_id, &new_snapid);
-        dout("created snapid=%lld\n", new_snapid);
+        dout("created snapid=%llu\n", (unsigned long long) new_snapid);
        if (ret < 0)
                return ret;
@@ -1659,19 +1681,13 @@ static int rbd_header_add_snap(struct rbd_device *dev,
        ceph_encode_string_safe(&p, e, snap_name, name_len, bad);
        ceph_encode_64_safe(&p, e, new_snapid, bad);
-        ret = rbd_req_sync_exec(dev, dev->obj_md_name, "rbd", "snap_add",
+        ret = rbd_req_sync_exec(rbd_dev, rbd_dev->header_name,
-                                data, p - data, &ver);
+                                "rbd", "snap_add",
+                                data, p - data, NULL);
        kfree(data);
-        if (ret < 0)
+        return ret < 0 ? ret : 0;
-                return ret;
-        down_write(&dev->header_rwsem);
-        dev->header.snapc->seq = new_snapid;
-        up_write(&dev->header_rwsem);
-        return 0;
 bad:
        return -ERANGE;
 }
@@ -1679,52 +1695,52 @@ bad:
 static void __rbd_remove_all_snaps(struct rbd_device *rbd_dev)
 {
        struct rbd_snap *snap;
+        struct rbd_snap *next;
-        while (!list_empty(&rbd_dev->snaps)) {
+        list_for_each_entry_safe(snap, next, &rbd_dev->snaps, node)
-                snap = list_first_entry(&rbd_dev->snaps, struct rbd_snap, node);
+                __rbd_remove_snap_dev(snap);
-                __rbd_remove_snap_dev(rbd_dev, snap);
-        }
 }
 /*
 * only read the first part of the ondisk header, without the snaps info
 */
-static int __rbd_refresh_header(struct rbd_device *rbd_dev)
+static int __rbd_refresh_header(struct rbd_device *rbd_dev, u64 *hver)
 {
        int ret;
        struct rbd_image_header h;
-        u64 snap_seq;
-        int follow_seq = 0;
        ret = rbd_read_header(rbd_dev, &h);
        if (ret < 0)
                return ret;
-        /* resized? */
-        set_capacity(rbd_dev->disk, h.image_size / SECTOR_SIZE);
        down_write(&rbd_dev->header_rwsem);
-        snap_seq = rbd_dev->header.snapc->seq;
+        /* resized? */
-        if (rbd_dev->header.total_snaps &&
+        if (rbd_dev->snap_id == CEPH_NOSNAP) {
-            rbd_dev->header.snapc->snaps[0] == snap_seq)
+                sector_t size = (sector_t) h.image_size / SECTOR_SIZE;
-                /* pointing at the head, will need to follow that
-                   if head moves */
-                follow_seq = 1;
-        kfree(rbd_dev->header.snapc);
+                dout("setting size to %llu sectors", (unsigned long long) size);
-        kfree(rbd_dev->header.snap_names);
+                set_capacity(rbd_dev->disk, size);
+        }
+        /* rbd_dev->header.object_prefix shouldn't change */
        kfree(rbd_dev->header.snap_sizes);
+        kfree(rbd_dev->header.snap_names);
+        /* osd requests may still refer to snapc */
+        ceph_put_snap_context(rbd_dev->header.snapc);
+        if (hver)
+                *hver = h.obj_version;
+        rbd_dev->header.obj_version = h.obj_version;
+        rbd_dev->header.image_size = h.image_size;
        rbd_dev->header.total_snaps = h.total_snaps;
        rbd_dev->header.snapc = h.snapc;
        rbd_dev->header.snap_names = h.snap_names;
        rbd_dev->header.snap_names_len = h.snap_names_len;
        rbd_dev->header.snap_sizes = h.snap_sizes;
-        if (follow_seq)
+        /* Free the extra copy of the object prefix */
-                rbd_dev->header.snapc->seq = rbd_dev->header.snapc->snaps[0];
+        WARN_ON(strcmp(rbd_dev->header.object_prefix, h.object_prefix));
-        else
+        kfree(h.object_prefix);
-                rbd_dev->header.snapc->seq = snap_seq;
        ret = __rbd_init_snaps_header(rbd_dev);
@@ -1733,6 +1749,17 @@ static int __rbd_refresh_header(struct rbd_device *rbd_dev)
        return ret;
 }
+static int rbd_refresh_header(struct rbd_device *rbd_dev, u64 *hver)
+{
+        int ret;
+        mutex_lock_nested(&ctl_mutex, SINGLE_DEPTH_NESTING);
+        ret = __rbd_refresh_header(rbd_dev, hver);
+        mutex_unlock(&ctl_mutex);
+        return ret;
+}
 static int rbd_init_disk(struct rbd_device *rbd_dev)
 {
        struct gendisk *disk;
@@ -1762,7 +1789,7 @@ static int rbd_init_disk(struct rbd_device *rbd_dev)
                goto out;
        snprintf(disk->disk_name, sizeof(disk->disk_name), RBD_DRV_NAME "%d",
-                 rbd_dev->id);
+                 rbd_dev->dev_id);
        disk->major = rbd_dev->major;
        disk->first_minor = 0;
        disk->fops = &rbd_bd_ops;
@@ -1819,8 +1846,13 @@ static ssize_t rbd_size_show(struct device *dev,
                             struct device_attribute *attr, char *buf)
 {
        struct rbd_device *rbd_dev = dev_to_rbd_dev(dev);
+        sector_t size;
+        down_read(&rbd_dev->header_rwsem);
+        size = get_capacity(rbd_dev->disk);
+        up_read(&rbd_dev->header_rwsem);
-        return sprintf(buf, "%llu\n", (unsigned long long)rbd_dev->header.image_size);
+        return sprintf(buf, "%llu\n", (unsigned long long) size * SECTOR_SIZE);
 }
 static ssize_t rbd_major_show(struct device *dev,
@@ -1848,12 +1880,20 @@ static ssize_t rbd_pool_show(struct device *dev,
        return sprintf(buf, "%s\n", rbd_dev->pool_name);
 }
+static ssize_t rbd_pool_id_show(struct device *dev,
+                             struct device_attribute *attr, char *buf)
+{
+        struct rbd_device *rbd_dev = dev_to_rbd_dev(dev);
+        return sprintf(buf, "%d\n", rbd_dev->pool_id);
+}
 static ssize_t rbd_name_show(struct device *dev,
                             struct device_attribute *attr, char *buf)
 {
        struct rbd_device *rbd_dev = dev_to_rbd_dev(dev);
-        return sprintf(buf, "%s\n", rbd_dev->obj);
+        return sprintf(buf, "%s\n", rbd_dev->image_name);
 }
 static ssize_t rbd_snap_show(struct device *dev,
@@ -1871,23 +1911,18 @@ static ssize_t rbd_image_refresh(struct device *dev,
                                 size_t size)
 {
        struct rbd_device *rbd_dev = dev_to_rbd_dev(dev);
-        int rc;
+        int ret;
-        int ret = size;
-        mutex_lock_nested(&ctl_mutex, SINGLE_DEPTH_NESTING);
-        rc = __rbd_refresh_header(rbd_dev);
+        ret = rbd_refresh_header(rbd_dev, NULL);
-        if (rc < 0)
-                ret = rc;
-        mutex_unlock(&ctl_mutex);
+        return ret < 0 ? ret : size;
-        return ret;
 }
 static DEVICE_ATTR(size, S_IRUGO, rbd_size_show, NULL);
 static DEVICE_ATTR(major, S_IRUGO, rbd_major_show, NULL);
 static DEVICE_ATTR(client_id, S_IRUGO, rbd_client_id_show, NULL);
 static DEVICE_ATTR(pool, S_IRUGO, rbd_pool_show, NULL);
+static DEVICE_ATTR(pool_id, S_IRUGO, rbd_pool_id_show, NULL);
 static DEVICE_ATTR(name, S_IRUGO, rbd_name_show, NULL);
 static DEVICE_ATTR(refresh, S_IWUSR, NULL, rbd_image_refresh);
 static DEVICE_ATTR(current_snap, S_IRUGO, rbd_snap_show, NULL);
@@ -1898,6 +1933,7 @@ static struct attribute *rbd_attrs[] = {
        &dev_attr_major.attr,
        &dev_attr_client_id.attr,
        &dev_attr_pool.attr,
+        &dev_attr_pool_id.attr,
        &dev_attr_name.attr,
        &dev_attr_current_snap.attr,
        &dev_attr_refresh.attr,
@@ -1977,15 +2013,13 @@ static struct device_type rbd_snap_device_type = {
        .release        = rbd_snap_dev_release,
 };
-static void __rbd_remove_snap_dev(struct rbd_device *rbd_dev,
+static void __rbd_remove_snap_dev(struct rbd_snap *snap)
-                                  struct rbd_snap *snap)
 {
        list_del(&snap->node);
        device_unregister(&snap->dev);
 }
-static int rbd_register_snap_dev(struct rbd_device *rbd_dev,
+static int rbd_register_snap_dev(struct rbd_snap *snap,
-                                  struct rbd_snap *snap,
                                  struct device *parent)
 {
        struct device *dev = &snap->dev;
@@ -2000,29 +2034,36 @@ static int rbd_register_snap_dev(struct rbd_device *rbd_dev,
        return ret;
 }
-static int __rbd_add_snap_dev(struct rbd_device *rbd_dev,
+static struct rbd_snap *__rbd_add_snap_dev(struct rbd_device *rbd_dev,
-                              int i, const char *name,
+                                              int i, const char *name)
-                              struct rbd_snap **snapp)
 {
+        struct rbd_snap *snap;
        int ret;
-        struct rbd_snap *snap = kzalloc(sizeof(*snap), GFP_KERNEL);
+        snap = kzalloc(sizeof (*snap), GFP_KERNEL);
        if (!snap)
-                return -ENOMEM;
+                return ERR_PTR(-ENOMEM);
+        ret = -ENOMEM;
        snap->name = kstrdup(name, GFP_KERNEL);
+        if (!snap->name)
+                goto err;
        snap->size = rbd_dev->header.snap_sizes[i];
        snap->id = rbd_dev->header.snapc->snaps[i];
        if (device_is_registered(&rbd_dev->dev)) {
-                ret = rbd_register_snap_dev(rbd_dev, snap,
+                ret = rbd_register_snap_dev(snap, &rbd_dev->dev);
-                                             &rbd_dev->dev);
                if (ret < 0)
                        goto err;
        }
-        *snapp = snap;
-        return 0;
+        return snap;
 err:
        kfree(snap->name);
        kfree(snap);
-        return ret;
+        return ERR_PTR(ret);
 }
 /*
@@ -2055,7 +2096,6 @@ static int __rbd_init_snaps_header(struct rbd_device *rbd_dev)
        const char *name, *first_name;
        int i = rbd_dev->header.total_snaps;
        struct rbd_snap *snap, *old_snap = NULL;
-        int ret;
        struct list_head *p, *n;
        first_name = rbd_dev->header.snap_names;
@@ -2070,8 +2110,15 @@ static int __rbd_init_snaps_header(struct rbd_device *rbd_dev)
                        cur_id = rbd_dev->header.snapc->snaps[i - 1];
                if (!i || old_snap->id < cur_id) {
-                        /* old_snap->id was skipped, thus was removed */
+                        /*
-                        __rbd_remove_snap_dev(rbd_dev, old_snap);
+                         * old_snap->id was skipped, thus was
+                         * removed.  If this rbd_dev is mapped to
+                         * the removed snapshot, record that it no
+                         * longer exists, to prevent further I/O.
+                         */
+                        if (rbd_dev->snap_id == old_snap->id)
+                                rbd_dev->snap_exists = false;
+                        __rbd_remove_snap_dev(old_snap);
                        continue;
                }
                if (old_snap->id == cur_id) {
@@ -2091,9 +2138,9 @@ static int __rbd_init_snaps_header(struct rbd_device *rbd_dev)
                        if (cur_id >= old_snap->id)
                                break;
                        /* a new snapshot */
-                        ret = __rbd_add_snap_dev(rbd_dev, i - 1, name, &snap);
+                        snap = __rbd_add_snap_dev(rbd_dev, i - 1, name);
-                        if (ret < 0)
+                        if (IS_ERR(snap))
-                                return ret;
+                                return PTR_ERR(snap);
                        /* note that we add it backward so using n and not p */
                        list_add(&snap->node, n);
@@ -2107,9 +2154,9 @@ static int __rbd_init_snaps_header(struct rbd_device *rbd_dev)
                        WARN_ON(1);
                        return -EINVAL;
                }
-                ret = __rbd_add_snap_dev(rbd_dev, i - 1, name, &snap);
+                snap = __rbd_add_snap_dev(rbd_dev, i - 1, name);
-                if (ret < 0)
+                if (IS_ERR(snap))
-                        return ret;
+                        return PTR_ERR(snap);
                list_add(&snap->node, &rbd_dev->snaps);
        }
@@ -2129,14 +2176,13 @@ static int rbd_bus_add_dev(struct rbd_device *rbd_dev)
        dev->type = &rbd_device_type;
        dev->parent = &rbd_root_dev;
        dev->release = rbd_dev_release;
-        dev_set_name(dev, "%d", rbd_dev->id);
+        dev_set_name(dev, "%d", rbd_dev->dev_id);
        ret = device_register(dev);
        if (ret < 0)
                goto out;
        list_for_each_entry(snap, &rbd_dev->snaps, node) {
-                ret = rbd_register_snap_dev(rbd_dev, snap,
+                ret = rbd_register_snap_dev(snap, &rbd_dev->dev);
-                                             &rbd_dev->dev);
                if (ret < 0)
                        break;
        }
@@ -2155,12 +2201,9 @@ static int rbd_init_watch_dev(struct rbd_device *rbd_dev)
        int ret, rc;
        do {
-                ret = rbd_req_sync_watch(rbd_dev, rbd_dev->obj_md_name,
+                ret = rbd_req_sync_watch(rbd_dev);
-                                         rbd_dev->header.obj_version);
                if (ret == -ERANGE) {
-                        mutex_lock_nested(&ctl_mutex, SINGLE_DEPTH_NESTING);
+                        rc = rbd_refresh_header(rbd_dev, NULL);
-                        rc = __rbd_refresh_header(rbd_dev);
-                        mutex_unlock(&ctl_mutex);
                        if (rc < 0)
                                return rc;
                }
@@ -2177,7 +2220,7 @@ static atomic64_t rbd_id_max = ATOMIC64_INIT(0);
 */
 static void rbd_id_get(struct rbd_device *rbd_dev)
 {
-        rbd_dev->id = atomic64_inc_return(&rbd_id_max);
+        rbd_dev->dev_id = atomic64_inc_return(&rbd_id_max);
        spin_lock(&rbd_dev_list_lock);
        list_add_tail(&rbd_dev->node, &rbd_dev_list);
@@ -2191,7 +2234,7 @@ static void rbd_id_get(struct rbd_device *rbd_dev)
 static void rbd_id_put(struct rbd_device *rbd_dev)
 {
        struct list_head *tmp;
-        int rbd_id = rbd_dev->id;
+        int rbd_id = rbd_dev->dev_id;
        int max_id;
        BUG_ON(rbd_id < 1);
@@ -2282,19 +2325,58 @@ static inline size_t copy_token(const char **buf,
 }
 /*
- * This fills in the pool_name, obj, obj_len, snap_name, obj_len,
+ * Finds the next token in *buf, dynamically allocates a buffer big
+ * enough to hold a copy of it, and copies the token into the new
+ * buffer.  The copy is guaranteed to be terminated with '\0'.  Note
+ * that a duplicate buffer is created even for a zero-length token.
+ *
+ * Returns a pointer to the newly-allocated duplicate, or a null
+ * pointer if memory for the duplicate was not available.  If
+ * the lenp argument is a non-null pointer, the length of the token
+ * (not including the '\0') is returned in *lenp.
+ *
+ * If successful, the *buf pointer will be updated to point beyond
+ * the end of the found token.
+ *
+ * Note: uses GFP_KERNEL for allocation.
+ */
+static inline char *dup_token(const char **buf, size_t *lenp)
+{
+        char *dup;
+        size_t len;
+        len = next_token(buf);
+        dup = kmalloc(len + 1, GFP_KERNEL);
+        if (!dup)
+                return NULL;
+        memcpy(dup, *buf, len);
+        *(dup + len) = '\0';
+        *buf += len;
+        if (lenp)
+                *lenp = len;
+        return dup;
+}
+/*
+ * This fills in the pool_name, image_name, image_name_len, snap_name,
 * rbd_dev, rbd_md_name, and name fields of the given rbd_dev, based
 * on the list of monitor addresses and other options provided via
 * /sys/bus/rbd/add.
+ *
+ * Note: rbd_dev is assumed to have been initially zero-filled.
 */
 static int rbd_add_parse_args(struct rbd_device *rbd_dev,
                              const char *buf,
                              const char **mon_addrs,
                              size_t *mon_addrs_size,
                              char *options,
-                              size_t options_size)
+                             size_t options_size)
 {
-        size_t  len;
+        size_t len;
+        int ret;
        /* The first four tokens are required */
@@ -2310,56 +2392,74 @@ static int rbd_add_parse_args(struct rbd_device *rbd_dev,
        if (!len || len >= options_size)
                return -EINVAL;
-        len = copy_token(&buf, rbd_dev->pool_name, sizeof (rbd_dev->pool_name));
+        ret = -ENOMEM;
-        if (!len || len >= sizeof (rbd_dev->pool_name))
+        rbd_dev->pool_name = dup_token(&buf, NULL);
-                return -EINVAL;
+        if (!rbd_dev->pool_name)
+                goto out_err;
-        len = copy_token(&buf, rbd_dev->obj, sizeof (rbd_dev->obj));
-        if (!len || len >= sizeof (rbd_dev->obj))
-                return -EINVAL;
-        /* We have the object length in hand, save it. */
+        rbd_dev->image_name = dup_token(&buf, &rbd_dev->image_name_len);
+        if (!rbd_dev->image_name)
+                goto out_err;
-        rbd_dev->obj_len = len;
+        /* Create the name of the header object */
-        BUILD_BUG_ON(RBD_MAX_MD_NAME_LEN
+        rbd_dev->header_name = kmalloc(rbd_dev->image_name_len
-                                < RBD_MAX_OBJ_NAME_LEN + sizeof (RBD_SUFFIX));
+                                                + sizeof (RBD_SUFFIX),
-        sprintf(rbd_dev->obj_md_name, "%s%s", rbd_dev->obj, RBD_SUFFIX);
+                                        GFP_KERNEL);
+        if (!rbd_dev->header_name)
+                goto out_err;
+        sprintf(rbd_dev->header_name, "%s%s", rbd_dev->image_name, RBD_SUFFIX);
        /*
-         * The snapshot name is optional, but it's an error if it's
+         * The snapshot name is optional.  If none is is supplied,
-         * too long.  If no snapshot is supplied, fill in the default.
+         * we use the default value.
         */
-        len = copy_token(&buf, rbd_dev->snap_name, sizeof (rbd_dev->snap_name));
+        rbd_dev->snap_name = dup_token(&buf, &len);
-        if (!len)
+        if (!rbd_dev->snap_name)
+                goto out_err;
+        if (!len) {
+                /* Replace the empty name with the default */
+                kfree(rbd_dev->snap_name);
+                rbd_dev->snap_name
+                        = kmalloc(sizeof (RBD_SNAP_HEAD_NAME), GFP_KERNEL);
+                if (!rbd_dev->snap_name)
+                        goto out_err;
                memcpy(rbd_dev->snap_name, RBD_SNAP_HEAD_NAME,
                        sizeof (RBD_SNAP_HEAD_NAME));
-        else if (len >= sizeof (rbd_dev->snap_name))
+        }
-                return -EINVAL;
        return 0;
+out_err:
+        kfree(rbd_dev->header_name);
+        kfree(rbd_dev->image_name);
+        kfree(rbd_dev->pool_name);
+        rbd_dev->pool_name = NULL;
+        return ret;
 }
 static ssize_t rbd_add(struct bus_type *bus,
                       const char *buf,
                       size_t count)
 {
-        struct rbd_device *rbd_dev;
+        char *options;
+        struct rbd_device *rbd_dev = NULL;
        const char *mon_addrs = NULL;
        size_t mon_addrs_size = 0;
-        char *options = NULL;
        struct ceph_osd_client *osdc;
        int rc = -ENOMEM;
        if (!try_module_get(THIS_MODULE))
                return -ENODEV;
-        rbd_dev = kzalloc(sizeof(*rbd_dev), GFP_KERNEL);
-        if (!rbd_dev)
-                goto err_nomem;
        options = kmalloc(count, GFP_KERNEL);
        if (!options)
                goto err_nomem;
+        rbd_dev = kzalloc(sizeof(*rbd_dev), GFP_KERNEL);
+        if (!rbd_dev)
+                goto err_nomem;
        /* static rbd_device initialization */
        spin_lock_init(&rbd_dev->lock);
@@ -2367,15 +2467,13 @@ static ssize_t rbd_add(struct bus_type *bus,
        INIT_LIST_HEAD(&rbd_dev->snaps);
        init_rwsem(&rbd_dev->header_rwsem);
-        init_rwsem(&rbd_dev->header_rwsem);
        /* generate unique id: find highest unique id, add one */
        rbd_id_get(rbd_dev);
        /* Fill in the device name, now that we have its id. */
        BUILD_BUG_ON(DEV_NAME_LEN
                        < sizeof (RBD_DRV_NAME) + MAX_INT_FORMAT_WIDTH);
-        sprintf(rbd_dev->name, "%s%d", RBD_DRV_NAME, rbd_dev->id);
+        sprintf(rbd_dev->name, "%s%d", RBD_DRV_NAME, rbd_dev->dev_id);
        /* parse add command */
        rc = rbd_add_parse_args(rbd_dev, buf, &mon_addrs, &mon_addrs_size,
@@ -2395,7 +2493,7 @@ static ssize_t rbd_add(struct bus_type *bus,
        rc = ceph_pg_poolid_by_name(osdc->osdmap, rbd_dev->pool_name);
        if (rc < 0)
                goto err_out_client;
-        rbd_dev->poolid = rc;
+        rbd_dev->pool_id = rc;
        /* register our block device */
        rc = register_blkdev(0, rbd_dev->name);
@@ -2435,10 +2533,16 @@ err_out_blkdev:
 err_out_client:
        rbd_put_client(rbd_dev);
 err_put_id:
+        if (rbd_dev->pool_name) {
+                kfree(rbd_dev->snap_name);
+                kfree(rbd_dev->header_name);
+                kfree(rbd_dev->image_name);
+                kfree(rbd_dev->pool_name);
+        }
        rbd_id_put(rbd_dev);
 err_nomem:
-        kfree(options);
        kfree(rbd_dev);
+        kfree(options);
        dout("Error adding device %s\n", buf);
        module_put(THIS_MODULE);
@@ -2446,7 +2550,7 @@ err_nomem:
        return (ssize_t) rc;
 }
-static struct rbd_device *__rbd_get_dev(unsigned long id)
+static struct rbd_device *__rbd_get_dev(unsigned long dev_id)
 {
        struct list_head *tmp;
        struct rbd_device *rbd_dev;
@@ -2454,7 +2558,7 @@ static struct rbd_device *__rbd_get_dev(unsigned long id)
        spin_lock(&rbd_dev_list_lock);
        list_for_each(tmp, &rbd_dev_list) {
                rbd_dev = list_entry(tmp, struct rbd_device, node);
-                if (rbd_dev->id == id) {
+                if (rbd_dev->dev_id == dev_id) {
                        spin_unlock(&rbd_dev_list_lock);
                        return rbd_dev;
                }
@@ -2474,7 +2578,7 @@ static void rbd_dev_release(struct device *dev)
                                                    rbd_dev->watch_request);
        }
        if (rbd_dev->watch_event)
-                rbd_req_sync_unwatch(rbd_dev, rbd_dev->obj_md_name);
+                rbd_req_sync_unwatch(rbd_dev);
        rbd_put_client(rbd_dev);
@@ -2483,6 +2587,10 @@ static void rbd_dev_release(struct device *dev)
        unregister_blkdev(rbd_dev->major, rbd_dev->name);
        /* done with the id, and with the rbd_dev */
+        kfree(rbd_dev->snap_name);
+        kfree(rbd_dev->header_name);
+        kfree(rbd_dev->pool_name);
+        kfree(rbd_dev->image_name);
        rbd_id_put(rbd_dev);
        kfree(rbd_dev);
@@ -2544,7 +2652,7 @@ static ssize_t rbd_snap_add(struct device *dev,
        if (ret < 0)
                goto err_unlock;
-        ret = __rbd_refresh_header(rbd_dev);
+        ret = __rbd_refresh_header(rbd_dev, NULL);
        if (ret < 0)
                goto err_unlock;
@@ -2553,7 +2661,7 @@ static ssize_t rbd_snap_add(struct device *dev,
        mutex_unlock(&ctl_mutex);
        /* make a best effort, don't error if failed */
-        rbd_req_sync_notify(rbd_dev, rbd_dev->obj_md_name);
+        rbd_req_sync_notify(rbd_dev);
        ret = count;
        kfree(name);
diff --git a/drivers/block/rbd_types.h b/drivers/block/rbd_types.h
index 950708688f17..0924e9e41a60 100644
--- a/drivers/block/rbd_types.h
+++ b/drivers/block/rbd_types.h
@@ -31,7 +31,6 @@
 #define RBD_MIN_OBJ_ORDER       16
 #define RBD_MAX_OBJ_ORDER       30
-#define RBD_MAX_OBJ_NAME_LEN    96
 #define RBD_MAX_SEG_NAME_LEN    128
 #define RBD_COMP_NONE           0
diff --git a/drivers/block/umem.c b/drivers/block/umem.c
index aa2712060bfb..eb0d8216f557 100644
--- a/drivers/block/umem.c
+++ b/drivers/block/umem.c
@@ -513,6 +513,21 @@ static void process_page(unsigned long data)
        }
 }
+static void mm_unplug(struct blk_plug_cb *cb, bool from_schedule)
+{
+        struct cardinfo *card = cb->data;
+        spin_lock_irq(&card->lock);
+        activate(card);
+        spin_unlock_irq(&card->lock);
+        kfree(cb);
+}
+static int mm_check_plugged(struct cardinfo *card)
+{
+        return !!blk_check_plugged(mm_unplug, card, sizeof(struct blk_plug_cb));
+}
 static void mm_make_request(struct request_queue *q, struct bio *bio)
 {
        struct cardinfo *card = q->queuedata;
@@ -523,6 +538,8 @@ static void mm_make_request(struct request_queue *q, struct bio *bio)
        *card->biotail = bio;
        bio->bi_next = NULL;
        card->biotail = &bio->bi_next;
+        if (bio->bi_rw & REQ_SYNC || !mm_check_plugged(card))
+                activate(card);
        spin_unlock_irq(&card->lock);
        return;
diff --git a/drivers/block/virtio_blk.c b/drivers/block/virtio_blk.c
index 693187df7601..c0bbeb470754 100644
--- a/drivers/block/virtio_blk.c
+++ b/drivers/block/virtio_blk.c
@@ -21,8 +21,6 @@ struct workqueue_struct *virtblk_wq;
 struct virtio_blk
 {
-        spinlock_t lock;
        struct virtio_device *vdev;
        struct virtqueue *vq;
@@ -65,7 +63,7 @@ static void blk_done(struct virtqueue *vq)
        unsigned int len;
        unsigned long flags;
-        spin_lock_irqsave(&vblk->lock, flags);
+        spin_lock_irqsave(vblk->disk->queue->queue_lock, flags);
        while ((vbr = virtqueue_get_buf(vblk->vq, &len)) != NULL) {
                int error;
@@ -99,7 +97,7 @@ static void blk_done(struct virtqueue *vq)
        }
        /* In case queue is stopped waiting for more buffers. */
        blk_start_queue(vblk->disk->queue);
-        spin_unlock_irqrestore(&vblk->lock, flags);
+        spin_unlock_irqrestore(vblk->disk->queue->queue_lock, flags);
 }
 static bool do_req(struct request_queue *q, struct virtio_blk *vblk,
@@ -397,6 +395,83 @@ static int virtblk_name_format(char *prefix, int index, char *buf, int buflen)
        return 0;
 }
+static int virtblk_get_cache_mode(struct virtio_device *vdev)
+{
+        u8 writeback;
+        int err;
+        err = virtio_config_val(vdev, VIRTIO_BLK_F_CONFIG_WCE,
+                                offsetof(struct virtio_blk_config, wce),
+                                &writeback);
+        if (err)
+                writeback = virtio_has_feature(vdev, VIRTIO_BLK_F_WCE);
+        return writeback;
+}
+static void virtblk_update_cache_mode(struct virtio_device *vdev)
+{
+        u8 writeback = virtblk_get_cache_mode(vdev);
+        struct virtio_blk *vblk = vdev->priv;
+        if (writeback)
+                blk_queue_flush(vblk->disk->queue, REQ_FLUSH);
+        else
+                blk_queue_flush(vblk->disk->queue, 0);
+        revalidate_disk(vblk->disk);
+}
+static const char *const virtblk_cache_types[] = {
+        "write through", "write back"
+};
+static ssize_t
+virtblk_cache_type_store(struct device *dev, struct device_attribute *attr,
+                         const char *buf, size_t count)
+{
+        struct gendisk *disk = dev_to_disk(dev);
+        struct virtio_blk *vblk = disk->private_data;
+        struct virtio_device *vdev = vblk->vdev;
+        int i;
+        u8 writeback;
+        BUG_ON(!virtio_has_feature(vblk->vdev, VIRTIO_BLK_F_CONFIG_WCE));
+        for (i = ARRAY_SIZE(virtblk_cache_types); --i >= 0; )
+                if (sysfs_streq(buf, virtblk_cache_types[i]))
+                        break;
+        if (i < 0)
+                return -EINVAL;
+        writeback = i;
+        vdev->config->set(vdev,
+                          offsetof(struct virtio_blk_config, wce),
+                          &writeback, sizeof(writeback));
+        virtblk_update_cache_mode(vdev);
+        return count;
+}
+static ssize_t
+virtblk_cache_type_show(struct device *dev, struct device_attribute *attr,
+                         char *buf)
+{
+        struct gendisk *disk = dev_to_disk(dev);
+        struct virtio_blk *vblk = disk->private_data;
+        u8 writeback = virtblk_get_cache_mode(vblk->vdev);
+        BUG_ON(writeback >= ARRAY_SIZE(virtblk_cache_types));
+        return snprintf(buf, 40, "%s\n", virtblk_cache_types[writeback]);
+}
+static const struct device_attribute dev_attr_cache_type_ro =
+        __ATTR(cache_type, S_IRUGO,
+               virtblk_cache_type_show, NULL);
+static const struct device_attribute dev_attr_cache_type_rw =
+        __ATTR(cache_type, S_IRUGO|S_IWUSR,
+               virtblk_cache_type_show, virtblk_cache_type_store);
 static int __devinit virtblk_probe(struct virtio_device *vdev)
 {
        struct virtio_blk *vblk;
@@ -431,7 +506,6 @@ static int __devinit virtblk_probe(struct virtio_device *vdev)
                goto out_free_index;
        }
-        spin_lock_init(&vblk->lock);
        vblk->vdev = vdev;
        vblk->sg_elems = sg_elems;
        sg_init_table(vblk->sg, vblk->sg_elems);
@@ -456,7 +530,7 @@ static int __devinit virtblk_probe(struct virtio_device *vdev)
                goto out_mempool;
        }
-        q = vblk->disk->queue = blk_init_queue(do_virtblk_request, &vblk->lock);
+        q = vblk->disk->queue = blk_init_queue(do_virtblk_request, NULL);
        if (!q) {
                err = -ENOMEM;
                goto out_put_disk;
@@ -474,8 +548,7 @@ static int __devinit virtblk_probe(struct virtio_device *vdev)
        vblk->index = index;
        /* configure queue flush support */
-        if (virtio_has_feature(vdev, VIRTIO_BLK_F_FLUSH))
+        virtblk_update_cache_mode(vdev);
-                blk_queue_flush(q, REQ_FLUSH);
        /* If disk is read-only in the host, the guest should obey */
        if (virtio_has_feature(vdev, VIRTIO_BLK_F_RO))
@@ -553,6 +626,14 @@ static int __devinit virtblk_probe(struct virtio_device *vdev)
        if (err)
                goto out_del_disk;
+        if (virtio_has_feature(vdev, VIRTIO_BLK_F_CONFIG_WCE))
+                err = device_create_file(disk_to_dev(vblk->disk),
+                                         &dev_attr_cache_type_rw);
+        else
+                err = device_create_file(disk_to_dev(vblk->disk),
+                                         &dev_attr_cache_type_ro);
+        if (err)
+                goto out_del_disk;
        return 0;
 out_del_disk:
@@ -576,30 +657,20 @@ static void __devexit virtblk_remove(struct virtio_device *vdev)
 {
        struct virtio_blk *vblk = vdev->priv;
        int index = vblk->index;
-        struct virtblk_req *vbr;
-        unsigned long flags;
        /* Prevent config work handler from accessing the device. */
        mutex_lock(&vblk->config_lock);
        vblk->config_enable = false;
        mutex_unlock(&vblk->config_lock);
+        del_gendisk(vblk->disk);
+        blk_cleanup_queue(vblk->disk->queue);
        /* Stop all the virtqueues. */
        vdev->config->reset(vdev);
        flush_work(&vblk->config_work);
-        del_gendisk(vblk->disk);
-        /* Abort requests dispatched to driver. */
-        spin_lock_irqsave(&vblk->lock, flags);
-        while ((vbr = virtqueue_detach_unused_buf(vblk->vq))) {
-                __blk_end_request_all(vbr->req, -EIO);
-                mempool_free(vbr, vblk->pool);
-        }
-        spin_unlock_irqrestore(&vblk->lock, flags);
-        blk_cleanup_queue(vblk->disk->queue);
        put_disk(vblk->disk);
        mempool_destroy(vblk->pool);
        vdev->config->del_vqs(vdev);
@@ -655,7 +726,7 @@ static const struct virtio_device_id id_table[] = {
 static unsigned int features[] = {
        VIRTIO_BLK_F_SEG_MAX, VIRTIO_BLK_F_SIZE_MAX, VIRTIO_BLK_F_GEOMETRY,
        VIRTIO_BLK_F_RO, VIRTIO_BLK_F_BLK_SIZE, VIRTIO_BLK_F_SCSI,
-        VIRTIO_BLK_F_FLUSH, VIRTIO_BLK_F_TOPOLOGY
+        VIRTIO_BLK_F_WCE, VIRTIO_BLK_F_TOPOLOGY, VIRTIO_BLK_F_CONFIG_WCE
 };
 /*
diff --git a/drivers/block/xen-blkback/common.h b/drivers/block/xen-blkback/common.h
index 773cf27dc23f..9ad3b5ec1dc1 100644
--- a/drivers/block/xen-blkback/common.h
+++ b/drivers/block/xen-blkback/common.h
@@ -257,6 +257,7 @@ static inline void blkif_get_x86_32_req(struct blkif_request *dst,
                break;
        case BLKIF_OP_DISCARD:
                dst->u.discard.flag = src->u.discard.flag;
+                dst->u.discard.id = src->u.discard.id;
                dst->u.discard.sector_number = src->u.discard.sector_number;
                dst->u.discard.nr_sectors = src->u.discard.nr_sectors;
                break;
@@ -287,6 +288,7 @@ static inline void blkif_get_x86_64_req(struct blkif_request *dst,
                break;
        case BLKIF_OP_DISCARD:
                dst->u.discard.flag = src->u.discard.flag;
+                dst->u.discard.id = src->u.discard.id;
                dst->u.discard.sector_number = src->u.discard.sector_number;
                dst->u.discard.nr_sectors = src->u.discard.nr_sectors;
                break;
diff --git a/drivers/block/xen-blkfront.c b/drivers/block/xen-blkfront.c
index 60eed4bdd2e4..2c2d2e5c1597 100644
--- a/drivers/block/xen-blkfront.c
+++ b/drivers/block/xen-blkfront.c
@@ -141,14 +141,36 @@ static int get_id_from_freelist(struct blkfront_info *info)
        return free;
 }
-static void add_id_to_freelist(struct blkfront_info *info,
+static int add_id_to_freelist(struct blkfront_info *info,
                               unsigned long id)
 {
+        if (info->shadow[id].req.u.rw.id != id)
+                return -EINVAL;
+        if (info->shadow[id].request == NULL)
+                return -EINVAL;
        info->shadow[id].req.u.rw.id  = info->shadow_free;
        info->shadow[id].request = NULL;
        info->shadow_free = id;
+        return 0;
 }
+static const char *op_name(int op)
+{
+        static const char *const names[] = {
+                [BLKIF_OP_READ] = "read",
+                [BLKIF_OP_WRITE] = "write",
+                [BLKIF_OP_WRITE_BARRIER] = "barrier",
+                [BLKIF_OP_FLUSH_DISKCACHE] = "flush",
+                [BLKIF_OP_DISCARD] = "discard" };
+        if (op < 0 || op >= ARRAY_SIZE(names))
+                return "unknown";
+        if (!names[op])
+                return "reserved";
+        return names[op];
+}
 static int xlbd_reserve_minors(unsigned int minor, unsigned int nr)
 {
        unsigned int end = minor + nr;
@@ -746,20 +768,36 @@ static irqreturn_t blkif_interrupt(int irq, void *dev_id)
                bret = RING_GET_RESPONSE(&info->ring, i);
                id   = bret->id;
+                /*
+                 * The backend has messed up and given us an id that we would
+                 * never have given to it (we stamp it up to BLK_RING_SIZE -
+                 * look in get_id_from_freelist.
+                 */
+                if (id >= BLK_RING_SIZE) {
+                        WARN(1, "%s: response to %s has incorrect id (%ld)\n",
+                             info->gd->disk_name, op_name(bret->operation), id);
+                        /* We can't safely get the 'struct request' as
+                         * the id is busted. */
+                        continue;
+                }
                req  = info->shadow[id].request;
                if (bret->operation != BLKIF_OP_DISCARD)
                        blkif_completion(&info->shadow[id]);
-                add_id_to_freelist(info, id);
+                if (add_id_to_freelist(info, id)) {
+                        WARN(1, "%s: response to %s (id %ld) couldn't be recycled!\n",
+                             info->gd->disk_name, op_name(bret->operation), id);
+                        continue;
+                }
                error = (bret->status == BLKIF_RSP_OKAY) ? 0 : -EIO;
                switch (bret->operation) {
                case BLKIF_OP_DISCARD:
                        if (unlikely(bret->status == BLKIF_RSP_EOPNOTSUPP)) {
                                struct request_queue *rq = info->rq;
-                                printk(KERN_WARNING "blkfront: %s: discard op failed\n",
+                                printk(KERN_WARNING "blkfront: %s: %s op failed\n",
-                                           info->gd->disk_name);
+                                           info->gd->disk_name, op_name(bret->operation));
                                error = -EOPNOTSUPP;
                                info->feature_discard = 0;
                                info->feature_secdiscard = 0;
@@ -771,18 +809,14 @@ static irqreturn_t blkif_interrupt(int irq, void *dev_id)
                case BLKIF_OP_FLUSH_DISKCACHE:
                case BLKIF_OP_WRITE_BARRIER:
                        if (unlikely(bret->status == BLKIF_RSP_EOPNOTSUPP)) {
-                                printk(KERN_WARNING "blkfront: %s: write %s op failed\n",
+                                printk(KERN_WARNING "blkfront: %s: %s op failed\n",
-                                       info->flush_op == BLKIF_OP_WRITE_BARRIER ?
+                                       info->gd->disk_name, op_name(bret->operation));
-                                       "barrier" :  "flush disk cache",
-                                       info->gd->disk_name);
                                error = -EOPNOTSUPP;
                        }
                        if (unlikely(bret->status == BLKIF_RSP_ERROR &&
                                     info->shadow[id].req.u.rw.nr_segments == 0)) {
-                                printk(KERN_WARNING "blkfront: %s: empty write %s op failed\n",
+                                printk(KERN_WARNING "blkfront: %s: empty %s op failed\n",
-                                       info->flush_op == BLKIF_OP_WRITE_BARRIER ?
+                                       info->gd->disk_name, op_name(bret->operation));
-                                       "barrier" :  "flush disk cache",
-                                       info->gd->disk_name);
                                error = -EOPNOTSUPP;
                        }
                        if (unlikely(error)) {
@@ -854,9 +888,8 @@ static int setup_blkring(struct xenbus_device *dev,
        if (err)
                goto fail;
-        err = bind_evtchn_to_irqhandler(info->evtchn,
+        err = bind_evtchn_to_irqhandler(info->evtchn, blkif_interrupt, 0,
-                                        blkif_interrupt,
+                                        "blkif", info);
-                                        IRQF_SAMPLE_RANDOM, "blkif", info);
        if (err <= 0) {
                xenbus_dev_fatal(dev, err,
                                 "bind_evtchn_to_irqhandler failed");
diff --git a/drivers/bluetooth/Kconfig b/drivers/bluetooth/Kconfig
index 5ccf142ef0b8..e9f203eadb1f 100644
--- a/drivers/bluetooth/Kconfig
+++ b/drivers/bluetooth/Kconfig
@@ -81,6 +81,18 @@ config BT_HCIUART_LL
          Say Y here to compile support for HCILL protocol.
+config BT_HCIUART_3WIRE
+        bool "Three-wire UART (H5) protocol support"
+        depends on BT_HCIUART
+        help
+          The HCI Three-wire UART Transport Layer makes it possible to
+          user the Bluetooth HCI over a serial port interface. The HCI
+          Three-wire UART Transport Layer assumes that the UART
+          communication may have bit errors, overrun errors or burst
+          errors and thereby making CTS/RTS lines unnecessary.
+          Say Y here to compile support for Three-wire UART protocol.
 config BT_HCIBCM203X
        tristate "HCI BCM203x USB driver"
        depends on USB
diff --git a/drivers/bluetooth/Makefile b/drivers/bluetooth/Makefile
index f4460f4f4b78..4afae20df512 100644
--- a/drivers/bluetooth/Makefile
+++ b/drivers/bluetooth/Makefile
@@ -28,4 +28,5 @@ hci_uart-$(CONFIG_BT_HCIUART_H4)	+= hci_h4.o
 hci_uart-$(CONFIG_BT_HCIUART_BCSP)      += hci_bcsp.o
 hci_uart-$(CONFIG_BT_HCIUART_LL)        += hci_ll.o
 hci_uart-$(CONFIG_BT_HCIUART_ATH3K)     += hci_ath.o
+hci_uart-$(CONFIG_BT_HCIUART_3WIRE)     += hci_h5.o
 hci_uart-objs                           := $(hci_uart-y)
diff --git a/drivers/bluetooth/ath3k.c b/drivers/bluetooth/ath3k.c
index ad591bd240ec..11f36e502136 100644
--- a/drivers/bluetooth/ath3k.c
+++ b/drivers/bluetooth/ath3k.c
@@ -63,6 +63,7 @@ static struct usb_device_id ath3k_table[] = {
        /* Atheros AR3011 with sflash firmware*/
        { USB_DEVICE(0x0CF3, 0x3002) },
+        { USB_DEVICE(0x0CF3, 0xE019) },
        { USB_DEVICE(0x13d3, 0x3304) },
        { USB_DEVICE(0x0930, 0x0215) },
        { USB_DEVICE(0x0489, 0xE03D) },
@@ -77,6 +78,8 @@ static struct usb_device_id ath3k_table[] = {
        { USB_DEVICE(0x04CA, 0x3005) },
        { USB_DEVICE(0x13d3, 0x3362) },
        { USB_DEVICE(0x0CF3, 0xE004) },
+        { USB_DEVICE(0x0930, 0x0219) },
+        { USB_DEVICE(0x0489, 0xe057) },
        /* Atheros AR5BBU12 with sflash firmware */
        { USB_DEVICE(0x0489, 0xE02C) },
@@ -101,6 +104,8 @@ static struct usb_device_id ath3k_blist_tbl[] = {
        { USB_DEVICE(0x04ca, 0x3005), .driver_info = BTUSB_ATH3012 },
        { USB_DEVICE(0x13d3, 0x3362), .driver_info = BTUSB_ATH3012 },
        { USB_DEVICE(0x0cf3, 0xe004), .driver_info = BTUSB_ATH3012 },
+        { USB_DEVICE(0x0930, 0x0219), .driver_info = BTUSB_ATH3012 },
+        { USB_DEVICE(0x0489, 0xe057), .driver_info = BTUSB_ATH3012 },
        /* Atheros AR5BBU22 with sflash firmware */
        { USB_DEVICE(0x0489, 0xE03C), .driver_info = BTUSB_ATH3012 },
diff --git a/drivers/bluetooth/bluecard_cs.c b/drivers/bluetooth/bluecard_cs.c
index 1fcd92380356..66c3a6770c41 100644
--- a/drivers/bluetooth/bluecard_cs.c
+++ b/drivers/bluetooth/bluecard_cs.c
@@ -231,12 +231,12 @@ static void bluecard_write_wakeup(bluecard_info_t *info)
        }
        do {
-                register unsigned int iobase = info->p_dev->resource[0]->start;
+                unsigned int iobase = info->p_dev->resource[0]->start;
-                register unsigned int offset;
+                unsigned int offset;
-                register unsigned char command;
+                unsigned char command;
-                register unsigned long ready_bit;
+                unsigned long ready_bit;
                register struct sk_buff *skb;
-                register int len;
+                int len;
                clear_bit(XMIT_WAKEUP, &(info->tx_state));
@@ -621,7 +621,6 @@ static int bluecard_hci_flush(struct hci_dev *hdev)
 static int bluecard_hci_open(struct hci_dev *hdev)
 {
        bluecard_info_t *info = hci_get_drvdata(hdev);
-        unsigned int iobase = info->p_dev->resource[0]->start;
        if (test_bit(CARD_HAS_PCCARD_ID, &(info->hw_state)))
                bluecard_hci_set_baud_rate(hdev, DEFAULT_BAUD_RATE);
@@ -630,6 +629,8 @@ static int bluecard_hci_open(struct hci_dev *hdev)
                return 0;
        if (test_bit(CARD_HAS_PCCARD_ID, &(info->hw_state))) {
+                unsigned int iobase = info->p_dev->resource[0]->start;
                /* Enable LED */
                outb(0x08 | 0x20, iobase + 0x30);
        }
@@ -641,7 +642,6 @@ static int bluecard_hci_open(struct hci_dev *hdev)
 static int bluecard_hci_close(struct hci_dev *hdev)
 {
        bluecard_info_t *info = hci_get_drvdata(hdev);
-        unsigned int iobase = info->p_dev->resource[0]->start;
        if (!test_and_clear_bit(HCI_RUNNING, &(hdev->flags)))
                return 0;
@@ -649,6 +649,8 @@ static int bluecard_hci_close(struct hci_dev *hdev)
        bluecard_hci_flush(hdev);
        if (test_bit(CARD_HAS_PCCARD_ID, &(info->hw_state))) {
+                unsigned int iobase = info->p_dev->resource[0]->start;
                /* Disable LED */
                outb(0x00, iobase + 0x30);
        }
diff --git a/drivers/bluetooth/bpa10x.c b/drivers/bluetooth/bpa10x.c
index 609861a53c28..29caaed2d715 100644
--- a/drivers/bluetooth/bpa10x.c
+++ b/drivers/bluetooth/bpa10x.c
@@ -470,7 +470,7 @@ static int bpa10x_probe(struct usb_interface *intf, const struct usb_device_id *
        hdev->flush    = bpa10x_flush;
        hdev->send     = bpa10x_send_frame;
-        set_bit(HCI_QUIRK_NO_RESET, &hdev->quirks);
+        set_bit(HCI_QUIRK_RESET_ON_CLOSE, &hdev->quirks);
        err = hci_register_dev(hdev);
        if (err < 0) {
diff --git a/drivers/bluetooth/bt3c_cs.c b/drivers/bluetooth/bt3c_cs.c
index 308c8599ab55..8925b6d672a6 100644
--- a/drivers/bluetooth/bt3c_cs.c
+++ b/drivers/bluetooth/bt3c_cs.c
@@ -186,9 +186,9 @@ static void bt3c_write_wakeup(bt3c_info_t *info)
                return;
        do {
-                register unsigned int iobase = info->p_dev->resource[0]->start;
+                unsigned int iobase = info->p_dev->resource[0]->start;
                register struct sk_buff *skb;
-                register int len;
+                int len;
                if (!pcmcia_dev_present(info->p_dev))
                        break;
@@ -664,7 +664,7 @@ static int bt3c_check_config(struct pcmcia_device *p_dev, void *priv_data)
 {
        int *try = priv_data;
-        if (try == 0)
+        if (!try)
                p_dev->io_lines = 16;
        if ((p_dev->resource[0]->end != 8) || (p_dev->resource[0]->start == 0))
diff --git a/drivers/bluetooth/btmrvl_drv.h b/drivers/bluetooth/btmrvl_drv.h
index 94f2d65131c4..27068d149380 100644
--- a/drivers/bluetooth/btmrvl_drv.h
+++ b/drivers/bluetooth/btmrvl_drv.h
@@ -136,7 +136,7 @@ int btmrvl_remove_card(struct btmrvl_private *priv);
 void btmrvl_interrupt(struct btmrvl_private *priv);
-void btmrvl_check_evtpkt(struct btmrvl_private *priv, struct sk_buff *skb);
+bool btmrvl_check_evtpkt(struct btmrvl_private *priv, struct sk_buff *skb);
 int btmrvl_process_event(struct btmrvl_private *priv, struct sk_buff *skb);
 int btmrvl_send_module_cfg_cmd(struct btmrvl_private *priv, int subcmd);
diff --git a/drivers/bluetooth/btmrvl_main.c b/drivers/bluetooth/btmrvl_main.c
index 681ca9d18e12..3a4343b3bd6d 100644
--- a/drivers/bluetooth/btmrvl_main.c
+++ b/drivers/bluetooth/btmrvl_main.c
@@ -44,23 +44,35 @@ void btmrvl_interrupt(struct btmrvl_private *priv)
 }
 EXPORT_SYMBOL_GPL(btmrvl_interrupt);
-void btmrvl_check_evtpkt(struct btmrvl_private *priv, struct sk_buff *skb)
+bool btmrvl_check_evtpkt(struct btmrvl_private *priv, struct sk_buff *skb)
 {
        struct hci_event_hdr *hdr = (void *) skb->data;
-        struct hci_ev_cmd_complete *ec;
-        u16 opcode, ocf;
        if (hdr->evt == HCI_EV_CMD_COMPLETE) {
+                struct hci_ev_cmd_complete *ec;
+                u16 opcode, ocf, ogf;
                ec = (void *) (skb->data + HCI_EVENT_HDR_SIZE);
                opcode = __le16_to_cpu(ec->opcode);
                ocf = hci_opcode_ocf(opcode);
+                ogf = hci_opcode_ogf(opcode);
                if (ocf == BT_CMD_MODULE_CFG_REQ &&
                                        priv->btmrvl_dev.sendcmdflag) {
                        priv->btmrvl_dev.sendcmdflag = false;
                        priv->adapter->cmd_complete = true;
                        wake_up_interruptible(&priv->adapter->cmd_wait_q);
                }
+                if (ogf == OGF) {
+                        BT_DBG("vendor event skipped: ogf 0x%4.4x ocf 0x%4.4x",
+                               ogf, ocf);
+                        kfree_skb(skb);
+                        return false;
+                }
        }
+        return true;
 }
 EXPORT_SYMBOL_GPL(btmrvl_check_evtpkt);
diff --git a/drivers/bluetooth/btmrvl_sdio.c b/drivers/bluetooth/btmrvl_sdio.c
index a853244e7fd7..6a9e9717d3ab 100644
--- a/drivers/bluetooth/btmrvl_sdio.c
+++ b/drivers/bluetooth/btmrvl_sdio.c
@@ -110,6 +110,9 @@ static const struct sdio_device_id btmrvl_sdio_ids[] = {
        /* Marvell SD8787 Bluetooth device */
        { SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, 0x911A),
                        .driver_data = (unsigned long) &btmrvl_sdio_sd8787 },
+        /* Marvell SD8787 Bluetooth AMP device */
+        { SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, 0x911B),
+                        .driver_data = (unsigned long) &btmrvl_sdio_sd8787 },
        /* Marvell SD8797 Bluetooth device */
        { SDIO_DEVICE(SDIO_VENDOR_ID_MARVELL, 0x912A),
                        .driver_data = (unsigned long) &btmrvl_sdio_sd8797 },
@@ -562,10 +565,13 @@ static int btmrvl_sdio_card_to_host(struct btmrvl_private *priv)
                skb_put(skb, buf_len);
                skb_pull(skb, SDIO_HEADER_LEN);
-                if (type == HCI_EVENT_PKT)
+                if (type == HCI_EVENT_PKT) {
-                        btmrvl_check_evtpkt(priv, skb);
+                        if (btmrvl_check_evtpkt(priv, skb))
+                                hci_recv_frame(skb);
+                } else {
+                        hci_recv_frame(skb);
+                }
-                hci_recv_frame(skb);
                hdev->stat.byte_rx += buf_len;
                break;
diff --git a/drivers/bluetooth/btuart_cs.c b/drivers/bluetooth/btuart_cs.c
index c4fc2f3fc32c..21e803a6a281 100644
--- a/drivers/bluetooth/btuart_cs.c
+++ b/drivers/bluetooth/btuart_cs.c
@@ -140,9 +140,9 @@ static void btuart_write_wakeup(btuart_info_t *info)
        }
        do {
-                register unsigned int iobase = info->p_dev->resource[0]->start;
+                unsigned int iobase = info->p_dev->resource[0]->start;
                register struct sk_buff *skb;
-                register int len;
+                int len;
                clear_bit(XMIT_WAKEUP, &(info->tx_state));
@@ -593,7 +593,7 @@ static int btuart_check_config(struct pcmcia_device *p_dev, void *priv_data)
 {
        int *try = priv_data;
-        if (try == 0)
+        if (!try)
                p_dev->io_lines = 16;
        if ((p_dev->resource[0]->end != 8) || (p_dev->resource[0]->start == 0))
diff --git a/drivers/bluetooth/btusb.c b/drivers/bluetooth/btusb.c
index c9463af8e564..cef3bac1a543 100644
--- a/drivers/bluetooth/btusb.c
+++ b/drivers/bluetooth/btusb.c
@@ -21,15 +21,7 @@
 *
 */
-#include <linux/kernel.h>
 #include <linux/module.h>
-#include <linux/init.h>
-#include <linux/slab.h>
-#include <linux/types.h>
-#include <linux/sched.h>
-#include <linux/errno.h>
-#include <linux/skbuff.h>
 #include <linux/usb.h>
 #include <net/bluetooth/bluetooth.h>
@@ -106,6 +98,7 @@ static struct usb_device_id btusb_table[] = {
        { USB_DEVICE(0x0a5c, 0x21e6) },
        { USB_DEVICE(0x0a5c, 0x21e8) },
        { USB_DEVICE(0x0a5c, 0x21f3) },
+        { USB_DEVICE(0x0a5c, 0x21f4) },
        { USB_DEVICE(0x413c, 0x8197) },
        /* Foxconn - Hon Hai */
@@ -125,6 +118,7 @@ static struct usb_device_id blacklist_table[] = {
        /* Atheros 3011 with sflash firmware */
        { USB_DEVICE(0x0cf3, 0x3002), .driver_info = BTUSB_IGNORE },
+        { USB_DEVICE(0x0cf3, 0xe019), .driver_info = BTUSB_IGNORE },
        { USB_DEVICE(0x13d3, 0x3304), .driver_info = BTUSB_IGNORE },
        { USB_DEVICE(0x0930, 0x0215), .driver_info = BTUSB_IGNORE },
        { USB_DEVICE(0x0489, 0xe03d), .driver_info = BTUSB_IGNORE },
@@ -139,6 +133,8 @@ static struct usb_device_id blacklist_table[] = {
        { USB_DEVICE(0x04ca, 0x3005), .driver_info = BTUSB_ATH3012 },
        { USB_DEVICE(0x13d3, 0x3362), .driver_info = BTUSB_ATH3012 },
        { USB_DEVICE(0x0cf3, 0xe004), .driver_info = BTUSB_ATH3012 },
+        { USB_DEVICE(0x0930, 0x0219), .driver_info = BTUSB_ATH3012 },
+        { USB_DEVICE(0x0489, 0xe057), .driver_info = BTUSB_ATH3012 },
        /* Atheros AR5BBU12 with sflash firmware */
        { USB_DEVICE(0x0489, 0xe02c), .driver_info = BTUSB_IGNORE },
@@ -1026,7 +1022,7 @@ static int btusb_probe(struct usb_interface *intf,
        data->isoc = usb_ifnum_to_if(data->udev, 1);
        if (!reset)
-                set_bit(HCI_QUIRK_NO_RESET, &hdev->quirks);
+                set_bit(HCI_QUIRK_RESET_ON_CLOSE, &hdev->quirks);
        if (force_scofix || id->driver_info & BTUSB_WRONG_SCO_MTU) {
                if (!disable_scofix)
@@ -1038,7 +1034,7 @@ static int btusb_probe(struct usb_interface *intf,
        if (id->driver_info & BTUSB_DIGIANSWER) {
                data->cmdreq_type = USB_TYPE_VENDOR;
-                set_bit(HCI_QUIRK_NO_RESET, &hdev->quirks);
+                set_bit(HCI_QUIRK_RESET_ON_CLOSE, &hdev->quirks);
        }
        if (id->driver_info & BTUSB_CSR) {
@@ -1046,7 +1042,7 @@ static int btusb_probe(struct usb_interface *intf,
                /* Old firmware would otherwise execute USB reset */
                if (le16_to_cpu(udev->descriptor.bcdDevice) < 0x117)
-                        set_bit(HCI_QUIRK_NO_RESET, &hdev->quirks);
+                        set_bit(HCI_QUIRK_RESET_ON_CLOSE, &hdev->quirks);
        }
        if (id->driver_info & BTUSB_SNIFFER) {
diff --git a/drivers/bluetooth/dtl1_cs.c b/drivers/bluetooth/dtl1_cs.c
index 6e8d96189684..97a7784db4a2 100644
--- a/drivers/bluetooth/dtl1_cs.c
+++ b/drivers/bluetooth/dtl1_cs.c
@@ -144,9 +144,9 @@ static void dtl1_write_wakeup(dtl1_info_t *info)
        }
        do {
-                register unsigned int iobase = info->p_dev->resource[0]->start;
+                unsigned int iobase = info->p_dev->resource[0]->start;
                register struct sk_buff *skb;
-                register int len;
+                int len;
                clear_bit(XMIT_WAKEUP, &(info->tx_state));
@@ -586,29 +586,31 @@ static int dtl1_confcheck(struct pcmcia_device *p_dev, void *priv_data)
 static int dtl1_config(struct pcmcia_device *link)
 {
        dtl1_info_t *info = link->priv;
-        int i;
+        int ret;
        /* Look for a generic full-sized window */
        link->resource[0]->end = 8;
-        if (pcmcia_loop_config(link, dtl1_confcheck, NULL) < 0)
+        ret = pcmcia_loop_config(link, dtl1_confcheck, NULL);
+        if (ret)
                goto failed;
-        i = pcmcia_request_irq(link, dtl1_interrupt);
+        ret = pcmcia_request_irq(link, dtl1_interrupt);
-        if (i != 0)
+        if (ret)
                goto failed;
-        i = pcmcia_enable_device(link);
+        ret = pcmcia_enable_device(link);
-        if (i != 0)
+        if (ret)
                goto failed;
-        if (dtl1_open(info) != 0)
+        ret = dtl1_open(info);
+        if (ret)
                goto failed;
        return 0;
 failed:
        dtl1_detach(link);
-        return -ENODEV;
+        return ret;
 }
 static const struct pcmcia_device_id dtl1_ids[] = {
diff --git a/drivers/bluetooth/hci_bcsp.c b/drivers/bluetooth/hci_bcsp.c
index 661a8dc4d2f8..57e502e06080 100644
--- a/drivers/bluetooth/hci_bcsp.c
+++ b/drivers/bluetooth/hci_bcsp.c
@@ -552,7 +552,7 @@ static u16 bscp_get_crc(struct bcsp_struct *bcsp)
 static int bcsp_recv(struct hci_uart *hu, void *data, int count)
 {
        struct bcsp_struct *bcsp = hu->priv;
-        register unsigned char *ptr;
+        unsigned char *ptr;
        BT_DBG("hu %p count %d rx_state %d rx_count %ld", 
                hu, count, bcsp->rx_state, bcsp->rx_count);
diff --git a/drivers/bluetooth/hci_h4.c b/drivers/bluetooth/hci_h4.c
index 748329468d26..c60623f206d4 100644
--- a/drivers/bluetooth/hci_h4.c
+++ b/drivers/bluetooth/hci_h4.c
@@ -126,7 +126,7 @@ static int h4_enqueue(struct hci_uart *hu, struct sk_buff *skb)
 static inline int h4_check_data_len(struct h4_struct *h4, int len)
 {
-        register int room = skb_tailroom(h4->rx_skb);
+        int room = skb_tailroom(h4->rx_skb);
        BT_DBG("len %d room %d", len, room);
diff --git a/drivers/bluetooth/hci_h5.c b/drivers/bluetooth/hci_h5.c
new file mode 100644
index 000000000000..b6154d5a07a5
--- /dev/null
+++ b/drivers/bluetooth/hci_h5.c
@@ -0,0 +1,747 @@
+/*
+ *
+ *  Bluetooth HCI Three-wire UART driver
+ *
+ *  Copyright (C) 2012  Intel Corporation
+ *
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ */
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/skbuff.h>
+#include <net/bluetooth/bluetooth.h>
+#include <net/bluetooth/hci_core.h>
+#include "hci_uart.h"
+#define HCI_3WIRE_ACK_PKT       0
+#define HCI_3WIRE_LINK_PKT      15
+/* Sliding window size */
+#define H5_TX_WIN_MAX           4
+#define H5_ACK_TIMEOUT  msecs_to_jiffies(250)
+#define H5_SYNC_TIMEOUT msecs_to_jiffies(100)
+/*
+ * Maximum Three-wire packet:
+ *     4 byte header + max value for 12-bit length + 2 bytes for CRC
+ */
+#define H5_MAX_LEN (4 + 0xfff + 2)
+/* Convenience macros for reading Three-wire header values */
+#define H5_HDR_SEQ(hdr)         ((hdr)[0] & 0x07)
+#define H5_HDR_ACK(hdr)         (((hdr)[0] >> 3) & 0x07)
+#define H5_HDR_CRC(hdr)         (((hdr)[0] >> 6) & 0x01)
+#define H5_HDR_RELIABLE(hdr)    (((hdr)[0] >> 7) & 0x01)
+#define H5_HDR_PKT_TYPE(hdr)    ((hdr)[1] & 0x0f)
+#define H5_HDR_LEN(hdr)         ((((hdr)[1] >> 4) & 0xff) + ((hdr)[2] << 4))
+#define SLIP_DELIMITER  0xc0
+#define SLIP_ESC        0xdb
+#define SLIP_ESC_DELIM  0xdc
+#define SLIP_ESC_ESC    0xdd
+/* H5 state flags */
+enum {
+        H5_RX_ESC,      /* SLIP escape mode */
+        H5_TX_ACK_REQ,  /* Pending ack to send */
+};
+struct h5 {
+        struct sk_buff_head     unack;          /* Unack'ed packets queue */
+        struct sk_buff_head     rel;            /* Reliable packets queue */
+        struct sk_buff_head     unrel;          /* Unreliable packets queue */
+        unsigned long           flags;
+        struct sk_buff          *rx_skb;        /* Receive buffer */
+        size_t                  rx_pending;     /* Expecting more bytes */
+        u8                      rx_ack;         /* Last ack number received */
+        int                     (*rx_func) (struct hci_uart *hu, u8 c);
+        struct timer_list       timer;          /* Retransmission timer */
+        u8                      tx_seq;         /* Next seq number to send */
+        u8                      tx_ack;         /* Next ack number to send */
+        u8                      tx_win;         /* Sliding window size */
+        enum {
+                H5_UNINITIALIZED,
+                H5_INITIALIZED,
+                H5_ACTIVE,
+        } state;
+        enum {
+                H5_AWAKE,
+                H5_SLEEPING,
+                H5_WAKING_UP,
+        } sleep;
+};
+static void h5_reset_rx(struct h5 *h5);
+static void h5_link_control(struct hci_uart *hu, const void *data, size_t len)
+{
+        struct h5 *h5 = hu->priv;
+        struct sk_buff *nskb;
+        nskb = alloc_skb(3, GFP_ATOMIC);
+        if (!nskb)
+                return;
+        bt_cb(nskb)->pkt_type = HCI_3WIRE_LINK_PKT;
+        memcpy(skb_put(nskb, len), data, len);
+        skb_queue_tail(&h5->unrel, nskb);
+}
+static u8 h5_cfg_field(struct h5 *h5)
+{
+        u8 field = 0;
+        /* Sliding window size (first 3 bits) */
+        field |= (h5->tx_win & 7);
+        return field;
+}
+static void h5_timed_event(unsigned long arg)
+{
+        const unsigned char sync_req[] = { 0x01, 0x7e };
+        unsigned char conf_req[] = { 0x03, 0xfc, 0x01 };
+        struct hci_uart *hu = (struct hci_uart *) arg;
+        struct h5 *h5 = hu->priv;
+        struct sk_buff *skb;
+        unsigned long flags;
+        BT_DBG("%s", hu->hdev->name);
+        if (h5->state == H5_UNINITIALIZED)
+                h5_link_control(hu, sync_req, sizeof(sync_req));
+        if (h5->state == H5_INITIALIZED) {
+                conf_req[2] = h5_cfg_field(h5);
+                h5_link_control(hu, conf_req, sizeof(conf_req));
+        }
+        if (h5->state != H5_ACTIVE) {
+                mod_timer(&h5->timer, jiffies + H5_SYNC_TIMEOUT);
+                goto wakeup;
+        }
+        if (h5->sleep != H5_AWAKE) {
+                h5->sleep = H5_SLEEPING;
+                goto wakeup;
+        }
+        BT_DBG("hu %p retransmitting %u pkts", hu, h5->unack.qlen);
+        spin_lock_irqsave_nested(&h5->unack.lock, flags, SINGLE_DEPTH_NESTING);
+        while ((skb = __skb_dequeue_tail(&h5->unack)) != NULL) {
+                h5->tx_seq = (h5->tx_seq - 1) & 0x07;
+                skb_queue_head(&h5->rel, skb);
+        }
+        spin_unlock_irqrestore(&h5->unack.lock, flags);
+wakeup:
+        hci_uart_tx_wakeup(hu);
+}
+static int h5_open(struct hci_uart *hu)
+{
+        struct h5 *h5;
+        const unsigned char sync[] = { 0x01, 0x7e };
+        BT_DBG("hu %p", hu);
+        h5 = kzalloc(sizeof(*h5), GFP_KERNEL);
+        if (!h5)
+                return -ENOMEM;
+        hu->priv = h5;
+        skb_queue_head_init(&h5->unack);
+        skb_queue_head_init(&h5->rel);
+        skb_queue_head_init(&h5->unrel);
+        h5_reset_rx(h5);
+        init_timer(&h5->timer);
+        h5->timer.function = h5_timed_event;
+        h5->timer.data = (unsigned long) hu;
+        h5->tx_win = H5_TX_WIN_MAX;
+        set_bit(HCI_UART_INIT_PENDING, &hu->hdev_flags);
+        /* Send initial sync request */
+        h5_link_control(hu, sync, sizeof(sync));
+        mod_timer(&h5->timer, jiffies + H5_SYNC_TIMEOUT);
+        return 0;
+}
+static int h5_close(struct hci_uart *hu)
+{
+        struct h5 *h5 = hu->priv;
+        skb_queue_purge(&h5->unack);
+        skb_queue_purge(&h5->rel);
+        skb_queue_purge(&h5->unrel);
+        del_timer(&h5->timer);
+        kfree(h5);
+        return 0;
+}
+static void h5_pkt_cull(struct h5 *h5)
+{
+        struct sk_buff *skb, *tmp;
+        unsigned long flags;
+        int i, to_remove;
+        u8 seq;
+        spin_lock_irqsave(&h5->unack.lock, flags);
+        to_remove = skb_queue_len(&h5->unack);
+        if (to_remove == 0)
+                goto unlock;
+        seq = h5->tx_seq;
+        while (to_remove > 0) {
+                if (h5->rx_ack == seq)
+                        break;
+                to_remove--;
+                seq = (seq - 1) % 8;
+        }
+        if (seq != h5->rx_ack)
+                BT_ERR("Controller acked invalid packet");
+        i = 0;
+        skb_queue_walk_safe(&h5->unack, skb, tmp) {
+                if (i++ >= to_remove)
+                        break;
+                __skb_unlink(skb, &h5->unack);
+                kfree_skb(skb);
+        }
+        if (skb_queue_empty(&h5->unack))
+                del_timer(&h5->timer);
+unlock:
+        spin_unlock_irqrestore(&h5->unack.lock, flags);
+}
+static void h5_handle_internal_rx(struct hci_uart *hu)
+{
+        struct h5 *h5 = hu->priv;
+        const unsigned char sync_req[] = { 0x01, 0x7e };
+        const unsigned char sync_rsp[] = { 0x02, 0x7d };
+        unsigned char conf_req[] = { 0x03, 0xfc, 0x01 };
+        const unsigned char conf_rsp[] = { 0x04, 0x7b };
+        const unsigned char wakeup_req[] = { 0x05, 0xfa };
+        const unsigned char woken_req[] = { 0x06, 0xf9 };
+        const unsigned char sleep_req[] = { 0x07, 0x78 };
+        const unsigned char *hdr = h5->rx_skb->data;
+        const unsigned char *data = &h5->rx_skb->data[4];
+        BT_DBG("%s", hu->hdev->name);
+        if (H5_HDR_PKT_TYPE(hdr) != HCI_3WIRE_LINK_PKT)
+                return;
+        if (H5_HDR_LEN(hdr) < 2)
+                return;
+        conf_req[2] = h5_cfg_field(h5);
+        if (memcmp(data, sync_req, 2) == 0) {
+                h5_link_control(hu, sync_rsp, 2);
+        } else if (memcmp(data, sync_rsp, 2) == 0) {
+                h5->state = H5_INITIALIZED;
+                h5_link_control(hu, conf_req, 3);
+        } else if (memcmp(data, conf_req, 2) == 0) {
+                h5_link_control(hu, conf_rsp, 2);
+                h5_link_control(hu, conf_req, 3);
+        } else if (memcmp(data, conf_rsp, 2) == 0) {
+                if (H5_HDR_LEN(hdr) > 2)
+                        h5->tx_win = (data[2] & 7);
+                BT_DBG("Three-wire init complete. tx_win %u", h5->tx_win);
+                h5->state = H5_ACTIVE;
+                hci_uart_init_ready(hu);
+                return;
+        } else if (memcmp(data, sleep_req, 2) == 0) {
+                BT_DBG("Peer went to sleep");
+                h5->sleep = H5_SLEEPING;
+                return;
+        } else if (memcmp(data, woken_req, 2) == 0) {
+                BT_DBG("Peer woke up");
+                h5->sleep = H5_AWAKE;
+        } else if (memcmp(data, wakeup_req, 2) == 0) {
+                BT_DBG("Peer requested wakeup");
+                h5_link_control(hu, woken_req, 2);
+                h5->sleep = H5_AWAKE;
+        } else {
+                BT_DBG("Link Control: 0x%02hhx 0x%02hhx", data[0], data[1]);
+                return;
+        }
+        hci_uart_tx_wakeup(hu);
+}
+static void h5_complete_rx_pkt(struct hci_uart *hu)
+{
+        struct h5 *h5 = hu->priv;
+        const unsigned char *hdr = h5->rx_skb->data;
+        if (H5_HDR_RELIABLE(hdr)) {
+                h5->tx_ack = (h5->tx_ack + 1) % 8;
+                set_bit(H5_TX_ACK_REQ, &h5->flags);
+                hci_uart_tx_wakeup(hu);
+        }
+        h5->rx_ack = H5_HDR_ACK(hdr);
+        h5_pkt_cull(h5);
+        switch (H5_HDR_PKT_TYPE(hdr)) {
+        case HCI_EVENT_PKT:
+        case HCI_ACLDATA_PKT:
+        case HCI_SCODATA_PKT:
+                bt_cb(h5->rx_skb)->pkt_type = H5_HDR_PKT_TYPE(hdr);
+                /* Remove Three-wire header */
+                skb_pull(h5->rx_skb, 4);
+                hci_recv_frame(h5->rx_skb);
+                h5->rx_skb = NULL;
+                break;
+        default:
+                h5_handle_internal_rx(hu);
+                break;
+        }
+        h5_reset_rx(h5);
+}
+static int h5_rx_crc(struct hci_uart *hu, unsigned char c)
+{
+        struct h5 *h5 = hu->priv;
+        h5_complete_rx_pkt(hu);
+        h5_reset_rx(h5);
+        return 0;
+}
+static int h5_rx_payload(struct hci_uart *hu, unsigned char c)
+{
+        struct h5 *h5 = hu->priv;
+        const unsigned char *hdr = h5->rx_skb->data;
+        if (H5_HDR_CRC(hdr)) {
+                h5->rx_func = h5_rx_crc;
+                h5->rx_pending = 2;
+        } else {
+                h5_complete_rx_pkt(hu);
+                h5_reset_rx(h5);
+        }
+        return 0;
+}
+static int h5_rx_3wire_hdr(struct hci_uart *hu, unsigned char c)
+{
+        struct h5 *h5 = hu->priv;
+        const unsigned char *hdr = h5->rx_skb->data;
+        BT_DBG("%s rx: seq %u ack %u crc %u rel %u type %u len %u",
+               hu->hdev->name, H5_HDR_SEQ(hdr), H5_HDR_ACK(hdr),
+               H5_HDR_CRC(hdr), H5_HDR_RELIABLE(hdr), H5_HDR_PKT_TYPE(hdr),
+               H5_HDR_LEN(hdr));
+        if (((hdr[0] + hdr[1] + hdr[2] + hdr[3]) & 0xff) != 0xff) {
+                BT_ERR("Invalid header checksum");
+                h5_reset_rx(h5);
+                return 0;
+        }
+        if (H5_HDR_RELIABLE(hdr) && H5_HDR_SEQ(hdr) != h5->tx_ack) {
+                BT_ERR("Out-of-order packet arrived (%u != %u)",
+                       H5_HDR_SEQ(hdr), h5->tx_ack);
+                h5_reset_rx(h5);
+                return 0;
+        }
+        if (h5->state != H5_ACTIVE &&
+            H5_HDR_PKT_TYPE(hdr) != HCI_3WIRE_LINK_PKT) {
+                BT_ERR("Non-link packet received in non-active state");
+                h5_reset_rx(h5);
+        }
+        h5->rx_func = h5_rx_payload;
+        h5->rx_pending = H5_HDR_LEN(hdr);
+        return 0;
+}
+static int h5_rx_pkt_start(struct hci_uart *hu, unsigned char c)
+{
+        struct h5 *h5 = hu->priv;
+        if (c == SLIP_DELIMITER)
+                return 1;
+        h5->rx_func = h5_rx_3wire_hdr;
+        h5->rx_pending = 4;
+        h5->rx_skb = bt_skb_alloc(H5_MAX_LEN, GFP_ATOMIC);
+        if (!h5->rx_skb) {
+                BT_ERR("Can't allocate mem for new packet");
+                h5_reset_rx(h5);
+                return -ENOMEM;
+        }
+        h5->rx_skb->dev = (void *) hu->hdev;
+        return 0;
+}
+static int h5_rx_delimiter(struct hci_uart *hu, unsigned char c)
+{
+        struct h5 *h5 = hu->priv;
+        if (c == SLIP_DELIMITER)
+                h5->rx_func = h5_rx_pkt_start;
+        return 1;
+}
+static void h5_unslip_one_byte(struct h5 *h5, unsigned char c)
+{
+        const u8 delim = SLIP_DELIMITER, esc = SLIP_ESC;
+        const u8 *byte = &c;
+        if (!test_bit(H5_RX_ESC, &h5->flags) && c == SLIP_ESC) {
+                set_bit(H5_RX_ESC, &h5->flags);
+                return;
+        }
+        if (test_and_clear_bit(H5_RX_ESC, &h5->flags)) {
+                switch (c) {
+                case SLIP_ESC_DELIM:
+                        byte = &delim;
+                        break;
+                case SLIP_ESC_ESC:
+                        byte = &esc;
+                        break;
+                default:
+                        BT_ERR("Invalid esc byte 0x%02hhx", c);
+                        h5_reset_rx(h5);
+                        return;
+                }
+        }
+        memcpy(skb_put(h5->rx_skb, 1), byte, 1);
+        h5->rx_pending--;
+        BT_DBG("unsliped 0x%02hhx, rx_pending %zu", *byte, h5->rx_pending);
+}
+static void h5_reset_rx(struct h5 *h5)
+{
+        if (h5->rx_skb) {
+                kfree_skb(h5->rx_skb);
+                h5->rx_skb = NULL;
+        }
+        h5->rx_func = h5_rx_delimiter;
+        h5->rx_pending = 0;
+        clear_bit(H5_RX_ESC, &h5->flags);
+}
+static int h5_recv(struct hci_uart *hu, void *data, int count)
+{
+        struct h5 *h5 = hu->priv;
+        unsigned char *ptr = data;
+        BT_DBG("%s pending %zu count %d", hu->hdev->name, h5->rx_pending,
+               count);
+        while (count > 0) {
+                int processed;
+                if (h5->rx_pending > 0) {
+                        if (*ptr == SLIP_DELIMITER) {
+                                BT_ERR("Too short H5 packet");
+                                h5_reset_rx(h5);
+                                continue;
+                        }
+                        h5_unslip_one_byte(h5, *ptr);
+                        ptr++; count--;
+                        continue;
+                }
+                processed = h5->rx_func(hu, *ptr);
+                if (processed < 0)
+                        return processed;
+                ptr += processed;
+                count -= processed;
+        }
+        return 0;
+}
+static int h5_enqueue(struct hci_uart *hu, struct sk_buff *skb)
+{
+        struct h5 *h5 = hu->priv;
+        if (skb->len > 0xfff) {
+                BT_ERR("Packet too long (%u bytes)", skb->len);
+                kfree_skb(skb);
+                return 0;
+        }
+        if (h5->state != H5_ACTIVE) {
+                BT_ERR("Ignoring HCI data in non-active state");
+                kfree_skb(skb);
+                return 0;
+        }
+        switch (bt_cb(skb)->pkt_type) {
+        case HCI_ACLDATA_PKT:
+        case HCI_COMMAND_PKT:
+                skb_queue_tail(&h5->rel, skb);
+                break;
+        case HCI_SCODATA_PKT:
+                skb_queue_tail(&h5->unrel, skb);
+                break;
+        default:
+                BT_ERR("Unknown packet type %u", bt_cb(skb)->pkt_type);
+                kfree_skb(skb);
+                break;
+        }
+        return 0;
+}
+static void h5_slip_delim(struct sk_buff *skb)
+{
+        const char delim = SLIP_DELIMITER;
+        memcpy(skb_put(skb, 1), &delim, 1);
+}
+static void h5_slip_one_byte(struct sk_buff *skb, u8 c)
+{
+        const char esc_delim[2] = { SLIP_ESC, SLIP_ESC_DELIM };
+        const char esc_esc[2] = { SLIP_ESC, SLIP_ESC_ESC };
+        switch (c) {
+        case SLIP_DELIMITER:
+                memcpy(skb_put(skb, 2), &esc_delim, 2);
+                break;
+        case SLIP_ESC:
+                memcpy(skb_put(skb, 2), &esc_esc, 2);
+                break;
+        default:
+                memcpy(skb_put(skb, 1), &c, 1);
+        }
+}
+static bool valid_packet_type(u8 type)
+{
+        switch (type) {
+        case HCI_ACLDATA_PKT:
+        case HCI_COMMAND_PKT:
+        case HCI_SCODATA_PKT:
+        case HCI_3WIRE_LINK_PKT:
+        case HCI_3WIRE_ACK_PKT:
+                return true;
+        default:
+                return false;
+        }
+}
+static struct sk_buff *h5_prepare_pkt(struct hci_uart *hu, u8 pkt_type,
+                                      const u8 *data, size_t len)
+{
+        struct h5 *h5 = hu->priv;
+        struct sk_buff *nskb;
+        u8 hdr[4];
+        int i;
+        if (!valid_packet_type(pkt_type)) {
+                BT_ERR("Unknown packet type %u", pkt_type);
+                return NULL;
+        }
+        /*
+         * Max len of packet: (original len + 4 (H5 hdr) + 2 (crc)) * 2
+         * (because bytes 0xc0 and 0xdb are escaped, worst case is when
+         * the packet is all made of 0xc0 and 0xdb) + 2 (0xc0
+         * delimiters at start and end).
+         */
+        nskb = alloc_skb((len + 6) * 2 + 2, GFP_ATOMIC);
+        if (!nskb)
+                return NULL;
+        bt_cb(nskb)->pkt_type = pkt_type;
+        h5_slip_delim(nskb);
+        hdr[0] = h5->tx_ack << 3;
+        clear_bit(H5_TX_ACK_REQ, &h5->flags);
+        /* Reliable packet? */
+        if (pkt_type == HCI_ACLDATA_PKT || pkt_type == HCI_COMMAND_PKT) {
+                hdr[0] |= 1 << 7;
+                hdr[0] |= h5->tx_seq;
+                h5->tx_seq = (h5->tx_seq + 1) % 8;
+        }
+        hdr[1] = pkt_type | ((len & 0x0f) << 4);
+        hdr[2] = len >> 4;
+        hdr[3] = ~((hdr[0] + hdr[1] + hdr[2]) & 0xff);
+        BT_DBG("%s tx: seq %u ack %u crc %u rel %u type %u len %u",
+               hu->hdev->name, H5_HDR_SEQ(hdr), H5_HDR_ACK(hdr),
+               H5_HDR_CRC(hdr), H5_HDR_RELIABLE(hdr), H5_HDR_PKT_TYPE(hdr),
+               H5_HDR_LEN(hdr));
+        for (i = 0; i < 4; i++)
+                h5_slip_one_byte(nskb, hdr[i]);
+        for (i = 0; i < len; i++)
+                h5_slip_one_byte(nskb, data[i]);
+        h5_slip_delim(nskb);
+        return nskb;
+}
+static struct sk_buff *h5_dequeue(struct hci_uart *hu)
+{
+        struct h5 *h5 = hu->priv;
+        unsigned long flags;
+        struct sk_buff *skb, *nskb;
+        if (h5->sleep != H5_AWAKE) {
+                const unsigned char wakeup_req[] = { 0x05, 0xfa };
+                if (h5->sleep == H5_WAKING_UP)
+                        return NULL;
+                h5->sleep = H5_WAKING_UP;
+                BT_DBG("Sending wakeup request");
+                mod_timer(&h5->timer, jiffies + HZ / 100);
+                return h5_prepare_pkt(hu, HCI_3WIRE_LINK_PKT, wakeup_req, 2);
+        }
+        if ((skb = skb_dequeue(&h5->unrel)) != NULL) {
+                nskb = h5_prepare_pkt(hu, bt_cb(skb)->pkt_type,
+                                      skb->data, skb->len);
+                if (nskb) {
+                        kfree_skb(skb);
+                        return nskb;
+                }
+                skb_queue_head(&h5->unrel, skb);
+                BT_ERR("Could not dequeue pkt because alloc_skb failed");
+        }
+        spin_lock_irqsave_nested(&h5->unack.lock, flags, SINGLE_DEPTH_NESTING);
+        if (h5->unack.qlen >= h5->tx_win)
+                goto unlock;
+        if ((skb = skb_dequeue(&h5->rel)) != NULL) {
+                nskb = h5_prepare_pkt(hu, bt_cb(skb)->pkt_type,
+                                      skb->data, skb->len);
+                if (nskb) {
+                        __skb_queue_tail(&h5->unack, skb);
+                        mod_timer(&h5->timer, jiffies + H5_ACK_TIMEOUT);
+                        spin_unlock_irqrestore(&h5->unack.lock, flags);
+                        return nskb;
+                }
+                skb_queue_head(&h5->rel, skb);
+                BT_ERR("Could not dequeue pkt because alloc_skb failed");
+        }
+unlock:
+        spin_unlock_irqrestore(&h5->unack.lock, flags);
+        if (test_bit(H5_TX_ACK_REQ, &h5->flags))
+                return h5_prepare_pkt(hu, HCI_3WIRE_ACK_PKT, NULL, 0);
+        return NULL;
+}
+static int h5_flush(struct hci_uart *hu)
+{
+        BT_DBG("hu %p", hu);
+        return 0;
+}
+static struct hci_uart_proto h5p = {
+        .id             = HCI_UART_3WIRE,
+        .open           = h5_open,
+        .close          = h5_close,
+        .recv           = h5_recv,
+        .enqueue        = h5_enqueue,
+        .dequeue        = h5_dequeue,
+        .flush          = h5_flush,
+};
+int __init h5_init(void)
+{
+        int err = hci_uart_register_proto(&h5p);
+        if (!err)
+                BT_INFO("HCI Three-wire UART (H5) protocol initialized");
+        else
+                BT_ERR("HCI Three-wire UART (H5) protocol init failed");
+        return err;
+}
+int __exit h5_deinit(void)
+{
+        return hci_uart_unregister_proto(&h5p);
+}
diff --git a/drivers/bluetooth/hci_ldisc.c b/drivers/bluetooth/hci_ldisc.c
index e564579a6115..74e0966b3ead 100644
--- a/drivers/bluetooth/hci_ldisc.c
+++ b/drivers/bluetooth/hci_ldisc.c
@@ -156,6 +156,35 @@ restart:
        return 0;
 }
+static void hci_uart_init_work(struct work_struct *work)
+{
+        struct hci_uart *hu = container_of(work, struct hci_uart, init_ready);
+        int err;
+        if (!test_and_clear_bit(HCI_UART_INIT_PENDING, &hu->hdev_flags))
+                return;
+        err = hci_register_dev(hu->hdev);
+        if (err < 0) {
+                BT_ERR("Can't register HCI device");
+                hci_free_dev(hu->hdev);
+                hu->hdev = NULL;
+                hu->proto->close(hu);
+        }
+        set_bit(HCI_UART_REGISTERED, &hu->flags);
+}
+int hci_uart_init_ready(struct hci_uart *hu)
+{
+        if (!test_bit(HCI_UART_INIT_PENDING, &hu->hdev_flags))
+                return -EALREADY;
+        schedule_work(&hu->init_ready);
+        return 0;
+}
 /* ------- Interface to HCI layer ------ */
 /* Initialize device */
 static int hci_uart_open(struct hci_dev *hdev)
@@ -264,6 +293,8 @@ static int hci_uart_tty_open(struct tty_struct *tty)
        hu->tty = tty;
        tty->receive_room = 65536;
+        INIT_WORK(&hu->init_ready, hci_uart_init_work);
        spin_lock_init(&hu->rx_lock);
        /* Flush any pending characters in the driver and line discipline. */
@@ -286,28 +317,30 @@ static int hci_uart_tty_open(struct tty_struct *tty)
 static void hci_uart_tty_close(struct tty_struct *tty)
 {
        struct hci_uart *hu = (void *)tty->disc_data;
+        struct hci_dev *hdev;
        BT_DBG("tty %p", tty);
        /* Detach from the tty */
        tty->disc_data = NULL;
-        if (hu) {
+        if (!hu)
-                struct hci_dev *hdev = hu->hdev;
+                return;
-                if (hdev)
+        hdev = hu->hdev;
-                        hci_uart_close(hdev);
+        if (hdev)
+                hci_uart_close(hdev);
-                if (test_and_clear_bit(HCI_UART_PROTO_SET, &hu->flags)) {
+        if (test_and_clear_bit(HCI_UART_PROTO_SET, &hu->flags)) {
-                        if (hdev) {
+                if (hdev) {
+                        if (test_bit(HCI_UART_REGISTERED, &hu->flags))
                                hci_unregister_dev(hdev);
-                                hci_free_dev(hdev);
+                        hci_free_dev(hdev);
-                        }
-                        hu->proto->close(hu);
                }
+                hu->proto->close(hu);
-                kfree(hu);
        }
+        kfree(hu);
 }
 /* hci_uart_tty_wakeup()
@@ -394,19 +427,24 @@ static int hci_uart_register_dev(struct hci_uart *hu)
                set_bit(HCI_QUIRK_RAW_DEVICE, &hdev->quirks);
        if (!test_bit(HCI_UART_RESET_ON_INIT, &hu->hdev_flags))
-                set_bit(HCI_QUIRK_NO_RESET, &hdev->quirks);
+                set_bit(HCI_QUIRK_RESET_ON_CLOSE, &hdev->quirks);
        if (test_bit(HCI_UART_CREATE_AMP, &hu->hdev_flags))
                hdev->dev_type = HCI_AMP;
        else
                hdev->dev_type = HCI_BREDR;
+        if (test_bit(HCI_UART_INIT_PENDING, &hu->hdev_flags))
+                return 0;
        if (hci_register_dev(hdev) < 0) {
                BT_ERR("Can't register HCI device");
                hci_free_dev(hdev);
                return -ENODEV;
        }
+        set_bit(HCI_UART_REGISTERED, &hu->flags);
        return 0;
 }
@@ -558,6 +596,9 @@ static int __init hci_uart_init(void)
 #ifdef CONFIG_BT_HCIUART_ATH3K
        ath_init();
 #endif
+#ifdef CONFIG_BT_HCIUART_3WIRE
+        h5_init();
+#endif
        return 0;
 }
@@ -578,6 +619,9 @@ static void __exit hci_uart_exit(void)
 #ifdef CONFIG_BT_HCIUART_ATH3K
        ath_deinit();
 #endif
+#ifdef CONFIG_BT_HCIUART_3WIRE
+        h5_deinit();
+#endif
        /* Release tty registration of line discipline */
        if ((err = tty_unregister_ldisc(N_HCI)))
diff --git a/drivers/bluetooth/hci_ll.c b/drivers/bluetooth/hci_ll.c
index b874c0efde24..ff6d589c34a5 100644
--- a/drivers/bluetooth/hci_ll.c
+++ b/drivers/bluetooth/hci_ll.c
@@ -348,7 +348,7 @@ static int ll_enqueue(struct hci_uart *hu, struct sk_buff *skb)
 static inline int ll_check_data_len(struct ll_struct *ll, int len)
 {
-        register int room = skb_tailroom(ll->rx_skb);
+        int room = skb_tailroom(ll->rx_skb);
        BT_DBG("len %d room %d", len, room);
@@ -374,11 +374,11 @@ static inline int ll_check_data_len(struct ll_struct *ll, int len)
 static int ll_recv(struct hci_uart *hu, void *data, int count)
 {
        struct ll_struct *ll = hu->priv;
-        register char *ptr;
+        char *ptr;
        struct hci_event_hdr *eh;
        struct hci_acl_hdr   *ah;
        struct hci_sco_hdr   *sh;
-        register int len, type, dlen;
+        int len, type, dlen;
        BT_DBG("hu %p count %d rx_state %ld rx_count %ld", hu, count, ll->rx_state, ll->rx_count);
diff --git a/drivers/bluetooth/hci_uart.h b/drivers/bluetooth/hci_uart.h
index 6cf6ab22ad21..fffa61ff5cb1 100644
--- a/drivers/bluetooth/hci_uart.h
+++ b/drivers/bluetooth/hci_uart.h
@@ -47,6 +47,7 @@
 #define HCI_UART_RAW_DEVICE     0
 #define HCI_UART_RESET_ON_INIT  1
 #define HCI_UART_CREATE_AMP     2
+#define HCI_UART_INIT_PENDING   3
 struct hci_uart;
@@ -66,6 +67,8 @@ struct hci_uart {
        unsigned long           flags;
        unsigned long           hdev_flags;
+        struct work_struct      init_ready;
        struct hci_uart_proto   *proto;
        void                    *priv;
@@ -76,6 +79,7 @@ struct hci_uart {
 /* HCI_UART proto flag bits */
 #define HCI_UART_PROTO_SET      0
+#define HCI_UART_REGISTERED     1
 /* TX states  */
 #define HCI_UART_SENDING        1
@@ -84,6 +88,7 @@ struct hci_uart {
 int hci_uart_register_proto(struct hci_uart_proto *p);
 int hci_uart_unregister_proto(struct hci_uart_proto *p);
 int hci_uart_tx_wakeup(struct hci_uart *hu);
+int hci_uart_init_ready(struct hci_uart *hu);
 #ifdef CONFIG_BT_HCIUART_H4
 int h4_init(void);
@@ -104,3 +109,8 @@ int ll_deinit(void);
 int ath_init(void);
 int ath_deinit(void);
 #endif
+#ifdef CONFIG_BT_HCIUART_3WIRE
+int h5_init(void);
+int h5_deinit(void);
+#endif
diff --git a/drivers/char/agp/intel-agp.c b/drivers/char/agp/intel-agp.c
index 0a4185279417..b130df0a1958 100644
--- a/drivers/char/agp/intel-agp.c
+++ b/drivers/char/agp/intel-agp.c
@@ -12,6 +12,7 @@
 #include <asm/smp.h>
 #include "agp.h"
 #include "intel-agp.h"
+#include <drm/intel-gtt.h>
 int intel_agp_enabled;
 EXPORT_SYMBOL(intel_agp_enabled);
@@ -747,7 +748,7 @@ static int __devinit agp_intel_probe(struct pci_dev *pdev,
        bridge->capndx = cap_ptr;
-        if (intel_gmch_probe(pdev, bridge))
+        if (intel_gmch_probe(pdev, NULL, bridge))
                goto found_gmch;
        for (i = 0; intel_agp_chipsets[i].name != NULL; i++) {
@@ -824,7 +825,7 @@ static void __devexit agp_intel_remove(struct pci_dev *pdev)
        agp_remove_bridge(bridge);
-        intel_gmch_remove(pdev);
+        intel_gmch_remove();
        agp_put_bridge(bridge);
 }
@@ -902,17 +903,6 @@ static struct pci_device_id agp_intel_pci_table[] = {
        ID(PCI_DEVICE_ID_INTEL_IRONLAKE_M_HB),
        ID(PCI_DEVICE_ID_INTEL_IRONLAKE_MA_HB),
        ID(PCI_DEVICE_ID_INTEL_IRONLAKE_MC2_HB),
-        ID(PCI_DEVICE_ID_INTEL_SANDYBRIDGE_HB),
-        ID(PCI_DEVICE_ID_INTEL_SANDYBRIDGE_M_HB),
-        ID(PCI_DEVICE_ID_INTEL_SANDYBRIDGE_S_HB),
-        ID(PCI_DEVICE_ID_INTEL_IVYBRIDGE_HB),
-        ID(PCI_DEVICE_ID_INTEL_IVYBRIDGE_M_HB),
-        ID(PCI_DEVICE_ID_INTEL_IVYBRIDGE_S_HB),
-        ID(PCI_DEVICE_ID_INTEL_VALLEYVIEW_HB),
-        ID(PCI_DEVICE_ID_INTEL_HASWELL_HB),
-        ID(PCI_DEVICE_ID_INTEL_HASWELL_M_HB),
-        ID(PCI_DEVICE_ID_INTEL_HASWELL_S_HB),
-        ID(PCI_DEVICE_ID_INTEL_HASWELL_E_HB),
        { }
 };
diff --git a/drivers/char/agp/intel-agp.h b/drivers/char/agp/intel-agp.h
index 8e2d9140f300..6ec0fff79bc2 100644
--- a/drivers/char/agp/intel-agp.h
+++ b/drivers/char/agp/intel-agp.h
@@ -64,6 +64,7 @@
 #define I830_PTE_SYSTEM_CACHED  0x00000006
 /* GT PTE cache control fields */
 #define GEN6_PTE_UNCACHED       0x00000002
+#define HSW_PTE_UNCACHED        0x00000000
 #define GEN6_PTE_LLC            0x00000004
 #define GEN6_PTE_LLC_MLC        0x00000006
 #define GEN6_PTE_GFDT           0x00000008
@@ -239,19 +240,45 @@
 #define PCI_DEVICE_ID_INTEL_IVYBRIDGE_S_GT2_IG          0x016A
 #define PCI_DEVICE_ID_INTEL_VALLEYVIEW_HB               0x0F00 /* VLV1 */
 #define PCI_DEVICE_ID_INTEL_VALLEYVIEW_IG               0x0F30
-#define PCI_DEVICE_ID_INTEL_HASWELL_HB                          0x0400 /* Desktop */
+#define PCI_DEVICE_ID_INTEL_HASWELL_HB                  0x0400 /* Desktop */
 #define PCI_DEVICE_ID_INTEL_HASWELL_D_GT1_IG            0x0402
 #define PCI_DEVICE_ID_INTEL_HASWELL_D_GT2_IG            0x0412
-#define PCI_DEVICE_ID_INTEL_HASWELL_M_HB                        0x0404 /* Mobile */
+#define PCI_DEVICE_ID_INTEL_HASWELL_D_GT2_PLUS_IG       0x0422
+#define PCI_DEVICE_ID_INTEL_HASWELL_M_HB                0x0404 /* Mobile */
 #define PCI_DEVICE_ID_INTEL_HASWELL_M_GT1_IG            0x0406
 #define PCI_DEVICE_ID_INTEL_HASWELL_M_GT2_IG            0x0416
-#define PCI_DEVICE_ID_INTEL_HASWELL_S_HB                        0x0408 /* Server */
+#define PCI_DEVICE_ID_INTEL_HASWELL_M_GT2_PLUS_IG       0x0426
+#define PCI_DEVICE_ID_INTEL_HASWELL_S_HB                0x0408 /* Server */
 #define PCI_DEVICE_ID_INTEL_HASWELL_S_GT1_IG            0x040a
 #define PCI_DEVICE_ID_INTEL_HASWELL_S_GT2_IG            0x041a
-#define PCI_DEVICE_ID_INTEL_HASWELL_SDV         0x0c16 /* SDV */
+#define PCI_DEVICE_ID_INTEL_HASWELL_S_GT2_PLUS_IG       0x042a
-#define PCI_DEVICE_ID_INTEL_HASWELL_E_HB                        0x0c04
+#define PCI_DEVICE_ID_INTEL_HASWELL_E_HB                0x0c04
+#define PCI_DEVICE_ID_INTEL_HASWELL_SDV_D_GT1_IG        0x0C02
+#define PCI_DEVICE_ID_INTEL_HASWELL_SDV_D_GT2_IG        0x0C12
+#define PCI_DEVICE_ID_INTEL_HASWELL_SDV_D_GT2_PLUS_IG   0x0C22
+#define PCI_DEVICE_ID_INTEL_HASWELL_SDV_M_GT1_IG        0x0C06
+#define PCI_DEVICE_ID_INTEL_HASWELL_SDV_M_GT2_IG        0x0C16
+#define PCI_DEVICE_ID_INTEL_HASWELL_SDV_M_GT2_PLUS_IG   0x0C26
+#define PCI_DEVICE_ID_INTEL_HASWELL_SDV_S_GT1_IG        0x0C0A
+#define PCI_DEVICE_ID_INTEL_HASWELL_SDV_S_GT2_IG        0x0C1A
+#define PCI_DEVICE_ID_INTEL_HASWELL_SDV_S_GT2_PLUS_IG   0x0C2A
+#define PCI_DEVICE_ID_INTEL_HASWELL_ULT_D_GT1_IG        0x0A02
+#define PCI_DEVICE_ID_INTEL_HASWELL_ULT_D_GT2_IG        0x0A12
+#define PCI_DEVICE_ID_INTEL_HASWELL_ULT_D_GT2_PLUS_IG   0x0A22
+#define PCI_DEVICE_ID_INTEL_HASWELL_ULT_M_GT1_IG        0x0A06
+#define PCI_DEVICE_ID_INTEL_HASWELL_ULT_M_GT2_IG        0x0A16
+#define PCI_DEVICE_ID_INTEL_HASWELL_ULT_M_GT2_PLUS_IG   0x0A26
+#define PCI_DEVICE_ID_INTEL_HASWELL_ULT_S_GT1_IG        0x0A0A
+#define PCI_DEVICE_ID_INTEL_HASWELL_ULT_S_GT2_IG        0x0A1A
+#define PCI_DEVICE_ID_INTEL_HASWELL_ULT_S_GT2_PLUS_IG   0x0A2A
+#define PCI_DEVICE_ID_INTEL_HASWELL_CRW_D_GT1_IG        0x0D12
+#define PCI_DEVICE_ID_INTEL_HASWELL_CRW_D_GT2_IG        0x0D22
+#define PCI_DEVICE_ID_INTEL_HASWELL_CRW_D_GT2_PLUS_IG   0x0D32
+#define PCI_DEVICE_ID_INTEL_HASWELL_CRW_M_GT1_IG        0x0D16
+#define PCI_DEVICE_ID_INTEL_HASWELL_CRW_M_GT2_IG        0x0D26
+#define PCI_DEVICE_ID_INTEL_HASWELL_CRW_M_GT2_PLUS_IG   0x0D36
+#define PCI_DEVICE_ID_INTEL_HASWELL_CRW_S_GT1_IG        0x0D1A
+#define PCI_DEVICE_ID_INTEL_HASWELL_CRW_S_GT2_IG        0x0D2A
+#define PCI_DEVICE_ID_INTEL_HASWELL_CRW_S_GT2_PLUS_IG   0x0D3A
-int intel_gmch_probe(struct pci_dev *pdev,
-                               struct agp_bridge_data *bridge);
-void intel_gmch_remove(struct pci_dev *pdev);
 #endif
diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c
index 1237e7575c3f..58e32f7c3229 100644
--- a/drivers/char/agp/intel-gtt.c
+++ b/drivers/char/agp/intel-gtt.c
@@ -66,7 +66,6 @@ static struct _intel_private {
        struct pci_dev *bridge_dev;
        u8 __iomem *registers;
        phys_addr_t gtt_bus_addr;
-        phys_addr_t gma_bus_addr;
        u32 PGETBL_save;
        u32 __iomem *gtt;               /* I915G */
        bool clear_fake_agp; /* on first access via agp, fill with scratch */
@@ -76,6 +75,7 @@ static struct _intel_private {
        struct resource ifp_resource;
        int resource_valid;
        struct page *scratch_page;
+        int refcount;
 } intel_private;
 #define INTEL_GTT_GEN   intel_private.driver->gen
@@ -648,6 +648,7 @@ static void intel_gtt_cleanup(void)
 static int intel_gtt_init(void)
 {
+        u32 gma_addr;
        u32 gtt_map_size;
        int ret;
@@ -694,6 +695,15 @@ static int intel_gtt_init(void)
                return ret;
        }
+        if (INTEL_GTT_GEN <= 2)
+                pci_read_config_dword(intel_private.pcidev, I810_GMADDR,
+                                      &gma_addr);
+        else
+                pci_read_config_dword(intel_private.pcidev, I915_GMADDR,
+                                      &gma_addr);
+        intel_private.base.gma_bus_addr = (gma_addr & PCI_BASE_ADDRESS_MEM_MASK);
        return 0;
 }
@@ -767,20 +777,10 @@ static void i830_write_entry(dma_addr_t addr, unsigned int entry,
        writel(addr | pte_flags, intel_private.gtt + entry);
 }
-static bool intel_enable_gtt(void)
+bool intel_enable_gtt(void)
 {
-        u32 gma_addr;
        u8 __iomem *reg;
-        if (INTEL_GTT_GEN <= 2)
-                pci_read_config_dword(intel_private.pcidev, I810_GMADDR,
-                                      &gma_addr);
-        else
-                pci_read_config_dword(intel_private.pcidev, I915_GMADDR,
-                                      &gma_addr);
-        intel_private.gma_bus_addr = (gma_addr & PCI_BASE_ADDRESS_MEM_MASK);
        if (INTEL_GTT_GEN >= 6)
            return true;
@@ -823,6 +823,7 @@ static bool intel_enable_gtt(void)
        return true;
 }
+EXPORT_SYMBOL(intel_enable_gtt);
 static int i830_setup(void)
 {
@@ -860,7 +861,7 @@ static int intel_fake_agp_configure(void)
            return -EIO;
        intel_private.clear_fake_agp = true;
-        agp_bridge->gart_bus_addr = intel_private.gma_bus_addr;
+        agp_bridge->gart_bus_addr = intel_private.base.gma_bus_addr;
        return 0;
 }
@@ -1155,6 +1156,30 @@ static bool gen6_check_flags(unsigned int flags)
        return true;
 }
+static void haswell_write_entry(dma_addr_t addr, unsigned int entry,
+                                unsigned int flags)
+{
+        unsigned int type_mask = flags & ~AGP_USER_CACHED_MEMORY_GFDT;
+        unsigned int gfdt = flags & AGP_USER_CACHED_MEMORY_GFDT;
+        u32 pte_flags;
+        if (type_mask == AGP_USER_MEMORY)
+                pte_flags = HSW_PTE_UNCACHED | I810_PTE_VALID;
+        else if (type_mask == AGP_USER_CACHED_MEMORY_LLC_MLC) {
+                pte_flags = GEN6_PTE_LLC_MLC | I810_PTE_VALID;
+                if (gfdt)
+                        pte_flags |= GEN6_PTE_GFDT;
+        } else { /* set 'normal'/'cached' to LLC by default */
+                pte_flags = GEN6_PTE_LLC | I810_PTE_VALID;
+                if (gfdt)
+                        pte_flags |= GEN6_PTE_GFDT;
+        }
+        /* gen6 has bit11-4 for physical addr bit39-32 */
+        addr |= (addr >> 28) & 0xff0;
+        writel(addr | pte_flags, intel_private.gtt + entry);
+}
 static void gen6_write_entry(dma_addr_t addr, unsigned int entry,
                             unsigned int flags)
 {
@@ -1182,9 +1207,17 @@ static void gen6_write_entry(dma_addr_t addr, unsigned int entry,
 static void valleyview_write_entry(dma_addr_t addr, unsigned int entry,
                                   unsigned int flags)
 {
+        unsigned int type_mask = flags & ~AGP_USER_CACHED_MEMORY_GFDT;
+        unsigned int gfdt = flags & AGP_USER_CACHED_MEMORY_GFDT;
        u32 pte_flags;
-        pte_flags = GEN6_PTE_UNCACHED | I810_PTE_VALID;
+        if (type_mask == AGP_USER_MEMORY)
+                pte_flags = GEN6_PTE_UNCACHED | I810_PTE_VALID;
+        else {
+                pte_flags = GEN6_PTE_LLC | I810_PTE_VALID;
+                if (gfdt)
+                        pte_flags |= GEN6_PTE_GFDT;
+        }
        /* gen6 has bit11-4 for physical addr bit39-32 */
        addr |= (addr >> 28) & 0xff0;
@@ -1244,6 +1277,7 @@ static int i9xx_setup(void)
                switch (INTEL_GTT_GEN) {
                case 5:
                case 6:
+                case 7:
                        gtt_offset = MB(2);
                        break;
                case 4:
@@ -1372,6 +1406,15 @@ static const struct intel_gtt_driver sandybridge_gtt_driver = {
        .check_flags = gen6_check_flags,
        .chipset_flush = i9xx_chipset_flush,
 };
+static const struct intel_gtt_driver haswell_gtt_driver = {
+        .gen = 6,
+        .setup = i9xx_setup,
+        .cleanup = gen6_cleanup,
+        .write_entry = haswell_write_entry,
+        .dma_mask_size = 40,
+        .check_flags = gen6_check_flags,
+        .chipset_flush = i9xx_chipset_flush,
+};
 static const struct intel_gtt_driver valleyview_gtt_driver = {
        .gen = 7,
        .setup = i9xx_setup,
@@ -1379,7 +1422,6 @@ static const struct intel_gtt_driver valleyview_gtt_driver = {
        .write_entry = valleyview_write_entry,
        .dma_mask_size = 40,
        .check_flags = gen6_check_flags,
-        .chipset_flush = i9xx_chipset_flush,
 };
 /* Table to describe Intel GMCH and AGP/PCIE GART drivers.  At least one of
@@ -1490,19 +1532,77 @@ static const struct intel_gtt_driver_description {
        { PCI_DEVICE_ID_INTEL_VALLEYVIEW_IG,
            "ValleyView", &valleyview_gtt_driver },
        { PCI_DEVICE_ID_INTEL_HASWELL_D_GT1_IG,
-            "Haswell", &sandybridge_gtt_driver },
+            "Haswell", &haswell_gtt_driver },
        { PCI_DEVICE_ID_INTEL_HASWELL_D_GT2_IG,
-            "Haswell", &sandybridge_gtt_driver },
+            "Haswell", &haswell_gtt_driver },
+        { PCI_DEVICE_ID_INTEL_HASWELL_D_GT2_PLUS_IG,
+            "Haswell", &haswell_gtt_driver },
        { PCI_DEVICE_ID_INTEL_HASWELL_M_GT1_IG,
-            "Haswell", &sandybridge_gtt_driver },
+            "Haswell", &haswell_gtt_driver },
        { PCI_DEVICE_ID_INTEL_HASWELL_M_GT2_IG,
-            "Haswell", &sandybridge_gtt_driver },
+            "Haswell", &haswell_gtt_driver },
+        { PCI_DEVICE_ID_INTEL_HASWELL_M_GT2_PLUS_IG,
+            "Haswell", &haswell_gtt_driver },
        { PCI_DEVICE_ID_INTEL_HASWELL_S_GT1_IG,
-            "Haswell", &sandybridge_gtt_driver },
+            "Haswell", &haswell_gtt_driver },
        { PCI_DEVICE_ID_INTEL_HASWELL_S_GT2_IG,
-            "Haswell", &sandybridge_gtt_driver },
+            "Haswell", &haswell_gtt_driver },
-        { PCI_DEVICE_ID_INTEL_HASWELL_SDV,
+        { PCI_DEVICE_ID_INTEL_HASWELL_S_GT2_PLUS_IG,
-            "Haswell", &sandybridge_gtt_driver },
+            "Haswell", &haswell_gtt_driver },
+        { PCI_DEVICE_ID_INTEL_HASWELL_SDV_D_GT1_IG,
+            "Haswell", &haswell_gtt_driver },
+        { PCI_DEVICE_ID_INTEL_HASWELL_SDV_D_GT2_IG,
+            "Haswell", &haswell_gtt_driver },
+        { PCI_DEVICE_ID_INTEL_HASWELL_SDV_D_GT2_PLUS_IG,
+            "Haswell", &haswell_gtt_driver },
+        { PCI_DEVICE_ID_INTEL_HASWELL_SDV_M_GT1_IG,
+            "Haswell", &haswell_gtt_driver },
+        { PCI_DEVICE_ID_INTEL_HASWELL_SDV_M_GT2_IG,
+            "Haswell", &haswell_gtt_driver },
+        { PCI_DEVICE_ID_INTEL_HASWELL_SDV_M_GT2_PLUS_IG,
+            "Haswell", &haswell_gtt_driver },
+        { PCI_DEVICE_ID_INTEL_HASWELL_SDV_S_GT1_IG,
+            "Haswell", &haswell_gtt_driver },
+        { PCI_DEVICE_ID_INTEL_HASWELL_SDV_S_GT2_IG,
+            "Haswell", &haswell_gtt_driver },
+        { PCI_DEVICE_ID_INTEL_HASWELL_SDV_S_GT2_PLUS_IG,
+            "Haswell", &haswell_gtt_driver },
+        { PCI_DEVICE_ID_INTEL_HASWELL_ULT_D_GT1_IG,
+            "Haswell", &haswell_gtt_driver },
+        { PCI_DEVICE_ID_INTEL_HASWELL_ULT_D_GT2_IG,
+            "Haswell", &haswell_gtt_driver },
+        { PCI_DEVICE_ID_INTEL_HASWELL_ULT_D_GT2_PLUS_IG,
+            "Haswell", &haswell_gtt_driver },
+        { PCI_DEVICE_ID_INTEL_HASWELL_ULT_M_GT1_IG,
+            "Haswell", &haswell_gtt_driver },
+        { PCI_DEVICE_ID_INTEL_HASWELL_ULT_M_GT2_IG,
+            "Haswell", &haswell_gtt_driver },
+        { PCI_DEVICE_ID_INTEL_HASWELL_ULT_M_GT2_PLUS_IG,
+            "Haswell", &haswell_gtt_driver },
+        { PCI_DEVICE_ID_INTEL_HASWELL_ULT_S_GT1_IG,
+            "Haswell", &haswell_gtt_driver },
+        { PCI_DEVICE_ID_INTEL_HASWELL_ULT_S_GT2_IG,
+            "Haswell", &haswell_gtt_driver },
+        { PCI_DEVICE_ID_INTEL_HASWELL_ULT_S_GT2_PLUS_IG,
+            "Haswell", &haswell_gtt_driver },
+        { PCI_DEVICE_ID_INTEL_HASWELL_CRW_D_GT1_IG,
+            "Haswell", &haswell_gtt_driver },
+        { PCI_DEVICE_ID_INTEL_HASWELL_CRW_D_GT2_IG,
+            "Haswell", &haswell_gtt_driver },
+        { PCI_DEVICE_ID_INTEL_HASWELL_CRW_D_GT2_PLUS_IG,
+            "Haswell", &haswell_gtt_driver },
+        { PCI_DEVICE_ID_INTEL_HASWELL_CRW_M_GT1_IG,
+            "Haswell", &haswell_gtt_driver },
+        { PCI_DEVICE_ID_INTEL_HASWELL_CRW_M_GT2_IG,
+            "Haswell", &haswell_gtt_driver },
+        { PCI_DEVICE_ID_INTEL_HASWELL_CRW_M_GT2_PLUS_IG,
+            "Haswell", &haswell_gtt_driver },
+        { PCI_DEVICE_ID_INTEL_HASWELL_CRW_S_GT1_IG,
+            "Haswell", &haswell_gtt_driver },
+        { PCI_DEVICE_ID_INTEL_HASWELL_CRW_S_GT2_IG,
+            "Haswell", &haswell_gtt_driver },
+        { PCI_DEVICE_ID_INTEL_HASWELL_CRW_S_GT2_PLUS_IG,
+            "Haswell", &haswell_gtt_driver },
        { 0, NULL, NULL }
 };
@@ -1523,14 +1623,32 @@ static int find_gmch(u16 device)
        return 1;
 }
-int intel_gmch_probe(struct pci_dev *pdev,
+int intel_gmch_probe(struct pci_dev *bridge_pdev, struct pci_dev *gpu_pdev,
-                                      struct agp_bridge_data *bridge)
+                     struct agp_bridge_data *bridge)
 {
        int i, mask;
-        intel_private.driver = NULL;
+        /*
+         * Can be called from the fake agp driver but also directly from
+         * drm/i915.ko. Hence we need to check whether everything is set up
+         * already.
+         */
+        if (intel_private.driver) {
+                intel_private.refcount++;
+                return 1;
+        }
        for (i = 0; intel_gtt_chipsets[i].name != NULL; i++) {
-                if (find_gmch(intel_gtt_chipsets[i].gmch_chip_id)) {
+                if (gpu_pdev) {
+                        if (gpu_pdev->device ==
+                            intel_gtt_chipsets[i].gmch_chip_id) {
+                                intel_private.pcidev = pci_dev_get(gpu_pdev);
+                                intel_private.driver =
+                                        intel_gtt_chipsets[i].gtt_driver;
+                                break;
+                        }
+                } else if (find_gmch(intel_gtt_chipsets[i].gmch_chip_id)) {
                        intel_private.driver =
                                intel_gtt_chipsets[i].gtt_driver;
                        break;
@@ -1540,13 +1658,17 @@ int intel_gmch_probe(struct pci_dev *pdev,
        if (!intel_private.driver)
                return 0;
-        bridge->driver = &intel_fake_agp_driver;
+        intel_private.refcount++;
-        bridge->dev_private_data = &intel_private;
-        bridge->dev = pdev;
+        if (bridge) {
+                bridge->driver = &intel_fake_agp_driver;
+                bridge->dev_private_data = &intel_private;
+                bridge->dev = bridge_pdev;
+        }
-        intel_private.bridge_dev = pci_dev_get(pdev);
+        intel_private.bridge_dev = pci_dev_get(bridge_pdev);
-        dev_info(&pdev->dev, "Intel %s Chipset\n", intel_gtt_chipsets[i].name);
+        dev_info(&bridge_pdev->dev, "Intel %s Chipset\n", intel_gtt_chipsets[i].name);
        mask = intel_private.driver->dma_mask_size;
        if (pci_set_dma_mask(intel_private.pcidev, DMA_BIT_MASK(mask)))
@@ -1556,11 +1678,11 @@ int intel_gmch_probe(struct pci_dev *pdev,
                pci_set_consistent_dma_mask(intel_private.pcidev,
                                            DMA_BIT_MASK(mask));
-        /*if (bridge->driver == &intel_810_driver)
+        if (intel_gtt_init() != 0) {
-                return 1;*/
+                intel_gmch_remove();
-        if (intel_gtt_init() != 0)
                return 0;
+        }
        return 1;
 }
@@ -1579,12 +1701,16 @@ void intel_gtt_chipset_flush(void)
 }
 EXPORT_SYMBOL(intel_gtt_chipset_flush);
-void intel_gmch_remove(struct pci_dev *pdev)
+void intel_gmch_remove(void)
 {
+        if (--intel_private.refcount)
+                return;
        if (intel_private.pcidev)
                pci_dev_put(intel_private.pcidev);
        if (intel_private.bridge_dev)
                pci_dev_put(intel_private.bridge_dev);
+        intel_private.driver = NULL;
 }
 EXPORT_SYMBOL(intel_gmch_remove);
diff --git a/drivers/char/bsr.c b/drivers/char/bsr.c
index 0c688232aab3..97467053a01b 100644
--- a/drivers/char/bsr.c
+++ b/drivers/char/bsr.c
@@ -297,7 +297,6 @@ static int __init bsr_init(void)
        struct device_node *np;
        dev_t bsr_dev;
        int ret = -ENODEV;
-        int result;
        np = of_find_compatible_node(NULL, NULL, "ibm,bsr");
        if (!np)
@@ -306,13 +305,14 @@ static int __init bsr_init(void)
        bsr_class = class_create(THIS_MODULE, "bsr");
        if (IS_ERR(bsr_class)) {
                printk(KERN_ERR "class_create() failed for bsr_class\n");
+                ret = PTR_ERR(bsr_class);
                goto out_err_1;
        }
        bsr_class->dev_attrs = bsr_dev_attrs;
-        result = alloc_chrdev_region(&bsr_dev, 0, BSR_MAX_DEVS, "bsr");
+        ret = alloc_chrdev_region(&bsr_dev, 0, BSR_MAX_DEVS, "bsr");
        bsr_major = MAJOR(bsr_dev);
-        if (result < 0) {
+        if (ret < 0) {
                printk(KERN_ERR "alloc_chrdev_region() failed for bsr\n");
                goto out_err_2;
        }
diff --git a/drivers/char/hw_random/Kconfig b/drivers/char/hw_random/Kconfig
index f45dad39a18b..7c0d391996b5 100644
--- a/drivers/char/hw_random/Kconfig
+++ b/drivers/char/hw_random/Kconfig
@@ -73,6 +73,20 @@ config HW_RANDOM_ATMEL
          If unsure, say Y.
+config HW_RANDOM_BCM63XX
+        tristate "Broadcom BCM63xx Random Number Generator support"
+        depends on HW_RANDOM && BCM63XX
+        default HW_RANDOM
+        ---help---
+          This driver provides kernel-side support for the Random Number
+          Generator hardware found on the Broadcom BCM63xx SoCs.
+          To compile this driver as a module, choose M here: the
+          module will be called bcm63xx-rng
+          If unusure, say Y.
 config HW_RANDOM_GEODE
        tristate "AMD Geode HW Random Number Generator support"
        depends on HW_RANDOM && X86_32 && PCI
@@ -263,3 +277,15 @@ config HW_RANDOM_PSERIES
          module will be called pseries-rng.
          If unsure, say Y.
+config HW_RANDOM_EXYNOS
+        tristate "EXYNOS HW random number generator support"
+        depends on HW_RANDOM && HAS_IOMEM && HAVE_CLK
+        ---help---
+          This driver provides kernel-side support for the Random Number
+          Generator hardware found on EXYNOS SOCs.
+          To compile this driver as a module, choose M here: the
+          module will be called exynos-rng.
+          If unsure, say Y.
diff --git a/drivers/char/hw_random/Makefile b/drivers/char/hw_random/Makefile
index d901dfa30321..39a757ca15b6 100644
--- a/drivers/char/hw_random/Makefile
+++ b/drivers/char/hw_random/Makefile
@@ -8,6 +8,7 @@ obj-$(CONFIG_HW_RANDOM_TIMERIOMEM) += timeriomem-rng.o
 obj-$(CONFIG_HW_RANDOM_INTEL) += intel-rng.o
 obj-$(CONFIG_HW_RANDOM_AMD) += amd-rng.o
 obj-$(CONFIG_HW_RANDOM_ATMEL) += atmel-rng.o
+obj-$(CONFIG_HW_RANDOM_BCM63XX) += bcm63xx-rng.o
 obj-$(CONFIG_HW_RANDOM_GEODE) += geode-rng.o
 obj-$(CONFIG_HW_RANDOM_N2RNG) += n2-rng.o
 n2-rng-y := n2-drv.o n2-asm.o
@@ -23,3 +24,4 @@ obj-$(CONFIG_HW_RANDOM_NOMADIK) += nomadik-rng.o
 obj-$(CONFIG_HW_RANDOM_PICOXCELL) += picoxcell-rng.o
 obj-$(CONFIG_HW_RANDOM_PPC4XX) += ppc4xx-rng.o
 obj-$(CONFIG_HW_RANDOM_PSERIES) += pseries-rng.o
+obj-$(CONFIG_HW_RANDOM_EXYNOS)  += exynos-rng.o
diff --git a/drivers/char/hw_random/atmel-rng.c b/drivers/char/hw_random/atmel-rng.c
index f518b99f53f5..731c9046cf7b 100644
--- a/drivers/char/hw_random/atmel-rng.c
+++ b/drivers/char/hw_random/atmel-rng.c
@@ -34,8 +34,15 @@ static int atmel_trng_read(struct hwrng *rng, void *buf, size_t max,
        u32 *data = buf;
        /* data ready? */
-        if (readl(trng->base + TRNG_ODATA) & 1) {
+        if (readl(trng->base + TRNG_ISR) & 1) {
                *data = readl(trng->base + TRNG_ODATA);
+                /*
+                  ensure data ready is only set again AFTER the next data
+                  word is ready in case it got set between checking ISR
+                  and reading ODATA, so we don't risk re-reading the
+                  same word
+                */
+                readl(trng->base + TRNG_ISR);
                return 4;
        } else
                return 0;
diff --git a/drivers/char/hw_random/bcm63xx-rng.c b/drivers/char/hw_random/bcm63xx-rng.c
new file mode 100644
index 000000000000..aec6a4277caa
--- /dev/null
+++ b/drivers/char/hw_random/bcm63xx-rng.c
@@ -0,0 +1,175 @@
+/*
+ * Broadcom BCM63xx Random Number Generator support
+ *
+ * Copyright (C) 2011, Florian Fainelli <florian@openwrt.org>
+ * Copyright (C) 2009, Broadcom Corporation
+ *
+ */
+#include <linux/module.h>
+#include <linux/slab.h>
+#include <linux/io.h>
+#include <linux/err.h>
+#include <linux/clk.h>
+#include <linux/platform_device.h>
+#include <linux/hw_random.h>
+#include <bcm63xx_io.h>
+#include <bcm63xx_regs.h>
+struct bcm63xx_rng_priv {
+        struct clk *clk;
+        void __iomem *regs;
+};
+#define to_rng_priv(rng)        ((struct bcm63xx_rng_priv *)rng->priv)
+static int bcm63xx_rng_init(struct hwrng *rng)
+{
+        struct bcm63xx_rng_priv *priv = to_rng_priv(rng);
+        u32 val;
+        val = bcm_readl(priv->regs + RNG_CTRL);
+        val |= RNG_EN;
+        bcm_writel(val, priv->regs + RNG_CTRL);
+        return 0;
+}
+static void bcm63xx_rng_cleanup(struct hwrng *rng)
+{
+        struct bcm63xx_rng_priv *priv = to_rng_priv(rng);
+        u32 val;
+        val = bcm_readl(priv->regs + RNG_CTRL);
+        val &= ~RNG_EN;
+        bcm_writel(val, priv->regs + RNG_CTRL);
+}
+static int bcm63xx_rng_data_present(struct hwrng *rng, int wait)
+{
+        struct bcm63xx_rng_priv *priv = to_rng_priv(rng);
+        return bcm_readl(priv->regs + RNG_STAT) & RNG_AVAIL_MASK;
+}
+static int bcm63xx_rng_data_read(struct hwrng *rng, u32 *data)
+{
+        struct bcm63xx_rng_priv *priv = to_rng_priv(rng);
+        *data = bcm_readl(priv->regs + RNG_DATA);
+        return 4;
+}
+static int __devinit bcm63xx_rng_probe(struct platform_device *pdev)
+{
+        struct resource *r;
+        struct clk *clk;
+        int ret;
+        struct bcm63xx_rng_priv *priv;
+        struct hwrng *rng;
+        r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+        if (!r) {
+                dev_err(&pdev->dev, "no iomem resource\n");
+                ret = -ENXIO;
+                goto out;
+        }
+        priv = kzalloc(sizeof(*priv), GFP_KERNEL);
+        if (!priv) {
+                dev_err(&pdev->dev, "no memory for private structure\n");
+                ret = -ENOMEM;
+                goto out;
+        }
+        rng = kzalloc(sizeof(*rng), GFP_KERNEL);
+        if (!rng) {
+                dev_err(&pdev->dev, "no memory for rng structure\n");
+                ret = -ENOMEM;
+                goto out_free_priv;
+        }
+        platform_set_drvdata(pdev, rng);
+        rng->priv = (unsigned long)priv;
+        rng->name = pdev->name;
+        rng->init = bcm63xx_rng_init;
+        rng->cleanup = bcm63xx_rng_cleanup;
+        rng->data_present = bcm63xx_rng_data_present;
+        rng->data_read = bcm63xx_rng_data_read;
+        clk = clk_get(&pdev->dev, "ipsec");
+        if (IS_ERR(clk)) {
+                dev_err(&pdev->dev, "no clock for device\n");
+                ret = PTR_ERR(clk);
+                goto out_free_rng;
+        }
+        priv->clk = clk;
+        if (!devm_request_mem_region(&pdev->dev, r->start,
+                                        resource_size(r), pdev->name)) {
+                dev_err(&pdev->dev, "request mem failed");
+                ret = -ENOMEM;
+                goto out_free_rng;
+        }
+        priv->regs = devm_ioremap_nocache(&pdev->dev, r->start,
+                                        resource_size(r));
+        if (!priv->regs) {
+                dev_err(&pdev->dev, "ioremap failed");
+                ret = -ENOMEM;
+                goto out_free_rng;
+        }
+        clk_enable(clk);
+        ret = hwrng_register(rng);
+        if (ret) {
+                dev_err(&pdev->dev, "failed to register rng device\n");
+                goto out_clk_disable;
+        }
+        dev_info(&pdev->dev, "registered RNG driver\n");
+        return 0;
+out_clk_disable:
+        clk_disable(clk);
+out_free_rng:
+        platform_set_drvdata(pdev, NULL);
+        kfree(rng);
+out_free_priv:
+        kfree(priv);
+out:
+        return ret;
+}
+static int __devexit bcm63xx_rng_remove(struct platform_device *pdev)
+{
+        struct hwrng *rng = platform_get_drvdata(pdev);
+        struct bcm63xx_rng_priv *priv = to_rng_priv(rng);
+        hwrng_unregister(rng);
+        clk_disable(priv->clk);
+        kfree(priv);
+        kfree(rng);
+        platform_set_drvdata(pdev, NULL);
+        return 0;
+}
+static struct platform_driver bcm63xx_rng_driver = {
+        .probe          = bcm63xx_rng_probe,
+        .remove         = __devexit_p(bcm63xx_rng_remove),
+        .driver         = {
+                .name   = "bcm63xx-rng",
+                .owner  = THIS_MODULE,
+        },
+};
+module_platform_driver(bcm63xx_rng_driver);
+MODULE_AUTHOR("Florian Fainelli <florian@openwrt.org>");
+MODULE_DESCRIPTION("Broadcom BCM63xx RNG driver");
+MODULE_LICENSE("GPL");
diff --git a/drivers/char/hw_random/exynos-rng.c b/drivers/char/hw_random/exynos-rng.c
new file mode 100644
index 000000000000..232ba9ce579c
--- /dev/null
+++ b/drivers/char/hw_random/exynos-rng.c
@@ -0,0 +1,182 @@
+/*
+ * exynos-rng.c - Random Number Generator driver for the exynos
+ *
+ * Copyright (C) 2012 Samsung Electronics
+ * Jonghwa Lee <jonghwa3.lee@smasung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation;
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ */
+#include <linux/hw_random.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/platform_device.h>
+#include <linux/clk.h>
+#include <linux/pm_runtime.h>
+#include <linux/err.h>
+#define EXYNOS_PRNG_STATUS_OFFSET       0x10
+#define EXYNOS_PRNG_SEED_OFFSET         0x140
+#define EXYNOS_PRNG_OUT1_OFFSET         0x160
+#define SEED_SETTING_DONE               BIT(1)
+#define PRNG_START                      0x18
+#define PRNG_DONE                       BIT(5)
+#define EXYNOS_AUTOSUSPEND_DELAY        100
+struct exynos_rng {
+        struct device *dev;
+        struct hwrng rng;
+        void __iomem *mem;
+        struct clk *clk;
+};
+static u32 exynos_rng_readl(struct exynos_rng *rng, u32 offset)
+{
+        return  __raw_readl(rng->mem + offset);
+}
+static void exynos_rng_writel(struct exynos_rng *rng, u32 val, u32 offset)
+{
+        __raw_writel(val, rng->mem + offset);
+}
+static int exynos_init(struct hwrng *rng)
+{
+        struct exynos_rng *exynos_rng = container_of(rng,
+                                                struct exynos_rng, rng);
+        int i;
+        int ret = 0;
+        pm_runtime_get_sync(exynos_rng->dev);
+        for (i = 0 ; i < 5 ; i++)
+                exynos_rng_writel(exynos_rng, jiffies,
+                                EXYNOS_PRNG_SEED_OFFSET + 4*i);
+        if (!(exynos_rng_readl(exynos_rng, EXYNOS_PRNG_STATUS_OFFSET)
+                                                 & SEED_SETTING_DONE))
+                ret = -EIO;
+        pm_runtime_put_noidle(exynos_rng->dev);
+        return ret;
+}
+static int exynos_read(struct hwrng *rng, void *buf,
+                                        size_t max, bool wait)
+{
+        struct exynos_rng *exynos_rng = container_of(rng,
+                                                struct exynos_rng, rng);
+        u32 *data = buf;
+        pm_runtime_get_sync(exynos_rng->dev);
+        exynos_rng_writel(exynos_rng, PRNG_START, 0);
+        while (!(exynos_rng_readl(exynos_rng,
+                        EXYNOS_PRNG_STATUS_OFFSET) & PRNG_DONE))
+                cpu_relax();
+        exynos_rng_writel(exynos_rng, PRNG_DONE, EXYNOS_PRNG_STATUS_OFFSET);
+        *data = exynos_rng_readl(exynos_rng, EXYNOS_PRNG_OUT1_OFFSET);
+        pm_runtime_mark_last_busy(exynos_rng->dev);
+        pm_runtime_autosuspend(exynos_rng->dev);
+        return 4;
+}
+static int __devinit exynos_rng_probe(struct platform_device *pdev)
+{
+        struct exynos_rng *exynos_rng;
+        exynos_rng = devm_kzalloc(&pdev->dev, sizeof(struct exynos_rng),
+                                        GFP_KERNEL);
+        if (!exynos_rng)
+                return -ENOMEM;
+        exynos_rng->dev = &pdev->dev;
+        exynos_rng->rng.name = "exynos";
+        exynos_rng->rng.init =  exynos_init;
+        exynos_rng->rng.read = exynos_read;
+        exynos_rng->clk = devm_clk_get(&pdev->dev, "secss");
+        if (IS_ERR(exynos_rng->clk)) {
+                dev_err(&pdev->dev, "Couldn't get clock.\n");
+                return -ENOENT;
+        }
+        exynos_rng->mem = devm_request_and_ioremap(&pdev->dev,
+                        platform_get_resource(pdev, IORESOURCE_MEM, 0));
+        if (!exynos_rng->mem)
+                return -EBUSY;
+        platform_set_drvdata(pdev, exynos_rng);
+        pm_runtime_set_autosuspend_delay(&pdev->dev, EXYNOS_AUTOSUSPEND_DELAY);
+        pm_runtime_use_autosuspend(&pdev->dev);
+        pm_runtime_enable(&pdev->dev);
+        return hwrng_register(&exynos_rng->rng);
+}
+static int __devexit exynos_rng_remove(struct platform_device *pdev)
+{
+        struct exynos_rng *exynos_rng = platform_get_drvdata(pdev);
+        hwrng_unregister(&exynos_rng->rng);
+        return 0;
+}
+static int exynos_rng_runtime_suspend(struct device *dev)
+{
+        struct platform_device *pdev = to_platform_device(dev);
+        struct exynos_rng *exynos_rng = platform_get_drvdata(pdev);
+        clk_disable_unprepare(exynos_rng->clk);
+        return 0;
+}
+static int exynos_rng_runtime_resume(struct device *dev)
+{
+        struct platform_device *pdev = to_platform_device(dev);
+        struct exynos_rng *exynos_rng = platform_get_drvdata(pdev);
+        return clk_prepare_enable(exynos_rng->clk);
+}
+UNIVERSAL_DEV_PM_OPS(exynos_rng_pm_ops, exynos_rng_runtime_suspend,
+                                        exynos_rng_runtime_resume, NULL);
+static struct platform_driver exynos_rng_driver = {
+        .driver         = {
+                .name   = "exynos-rng",
+                .owner  = THIS_MODULE,
+                .pm     = &exynos_rng_pm_ops,
+        },
+        .probe          = exynos_rng_probe,
+        .remove         = __devexit_p(exynos_rng_remove),
+};
+module_platform_driver(exynos_rng_driver);
+MODULE_DESCRIPTION("EXYNOS 4 H/W Random Number Generator driver");
+MODULE_AUTHOR("Jonghwa Lee <jonghwa3.lee@samsung.com>");
+MODULE_LICENSE("GPL");
diff --git a/drivers/char/hw_random/mxc-rnga.c b/drivers/char/hw_random/mxc-rnga.c
index 187c6be80f43..85074de5042e 100644
--- a/drivers/char/hw_random/mxc-rnga.c
+++ b/drivers/char/hw_random/mxc-rnga.c
@@ -24,6 +24,7 @@
 #include <linux/ioport.h>
 #include <linux/platform_device.h>
 #include <linux/hw_random.h>
+#include <linux/delay.h>
 #include <linux/io.h>
 /* RNGA Registers */
@@ -60,16 +61,20 @@
 static struct platform_device *rng_dev;
-static int mxc_rnga_data_present(struct hwrng *rng)
+static int mxc_rnga_data_present(struct hwrng *rng, int wait)
 {
-        int level;
        void __iomem *rng_base = (void __iomem *)rng->priv;
+        int i;
-        /* how many random numbers is in FIFO? [0-16] */
-        level = ((__raw_readl(rng_base + RNGA_STATUS) &
+        for (i = 0; i < 20; i++) {
-                        RNGA_STATUS_LEVEL_MASK) >> 8);
+                /* how many random numbers are in FIFO? [0-16] */
+                int level = (__raw_readl(rng_base + RNGA_STATUS) &
-        return level > 0 ? 1 : 0;
+                                RNGA_STATUS_LEVEL_MASK) >> 8;
+                if (level || !wait)
+                        return !!level;
+                udelay(10);
+        }
+        return 0;
 }
 static int mxc_rnga_data_read(struct hwrng *rng, u32 * data)
diff --git a/drivers/char/hw_random/omap-rng.c b/drivers/char/hw_random/omap-rng.c
index 1412565c01af..4fbdceb6f773 100644
--- a/drivers/char/hw_random/omap-rng.c
+++ b/drivers/char/hw_random/omap-rng.c
@@ -160,24 +160,26 @@ static int __exit omap_rng_remove(struct platform_device *pdev)
        return 0;
 }
-#ifdef CONFIG_PM
+#ifdef CONFIG_PM_SLEEP
-static int omap_rng_suspend(struct platform_device *pdev, pm_message_t message)
+static int omap_rng_suspend(struct device *dev)
 {
        omap_rng_write_reg(RNG_MASK_REG, 0x0);
        return 0;
 }
-static int omap_rng_resume(struct platform_device *pdev)
+static int omap_rng_resume(struct device *dev)
 {
        omap_rng_write_reg(RNG_MASK_REG, 0x1);
        return 0;
 }
+static SIMPLE_DEV_PM_OPS(omap_rng_pm, omap_rng_suspend, omap_rng_resume);
+#define OMAP_RNG_PM     (&omap_rng_pm)
 #else
-#define omap_rng_suspend        NULL
+#define OMAP_RNG_PM     NULL
-#define omap_rng_resume         NULL
 #endif
@@ -188,11 +190,10 @@ static struct platform_driver omap_rng_driver = {
        .driver = {
                .name           = "omap_rng",
                .owner          = THIS_MODULE,
+                .pm             = OMAP_RNG_PM,
        },
        .probe          = omap_rng_probe,
        .remove         = __exit_p(omap_rng_remove),
-        .suspend        = omap_rng_suspend,
-        .resume         = omap_rng_resume
 };
 static int __init omap_rng_init(void)
diff --git a/drivers/char/hw_random/virtio-rng.c b/drivers/char/hw_random/virtio-rng.c
index 723725bbb96b..5708299507d0 100644
--- a/drivers/char/hw_random/virtio-rng.c
+++ b/drivers/char/hw_random/virtio-rng.c
@@ -55,6 +55,7 @@ static void register_buffer(u8 *buf, size_t size)
 static int virtio_read(struct hwrng *rng, void *buf, size_t size, bool wait)
 {
+        int ret;
        if (!busy) {
                busy = true;
@@ -65,7 +66,9 @@ static int virtio_read(struct hwrng *rng, void *buf, size_t size, bool wait)
        if (!wait)
                return 0;
-        wait_for_completion(&have_data);
+        ret = wait_for_completion_killable(&have_data);
+        if (ret < 0)
+                return ret;
        busy = false;
@@ -85,7 +88,7 @@ static struct hwrng virtio_hwrng = {
        .read           = virtio_read,
 };
-static int virtrng_probe(struct virtio_device *vdev)
+static int probe_common(struct virtio_device *vdev)
 {
        int err;
@@ -103,13 +106,37 @@ static int virtrng_probe(struct virtio_device *vdev)
        return 0;
 }
-static void __devexit virtrng_remove(struct virtio_device *vdev)
+static void remove_common(struct virtio_device *vdev)
 {
        vdev->config->reset(vdev);
+        busy = false;
        hwrng_unregister(&virtio_hwrng);
        vdev->config->del_vqs(vdev);
 }
+static int virtrng_probe(struct virtio_device *vdev)
+{
+        return probe_common(vdev);
+}
+static void __devexit virtrng_remove(struct virtio_device *vdev)
+{
+        remove_common(vdev);
+}
+#ifdef CONFIG_PM
+static int virtrng_freeze(struct virtio_device *vdev)
+{
+        remove_common(vdev);
+        return 0;
+}
+static int virtrng_restore(struct virtio_device *vdev)
+{
+        return probe_common(vdev);
+}
+#endif
 static struct virtio_device_id id_table[] = {
        { VIRTIO_ID_RNG, VIRTIO_DEV_ANY_ID },
        { 0 },
@@ -121,6 +148,10 @@ static struct virtio_driver virtio_rng_driver = {
        .id_table =     id_table,
        .probe =        virtrng_probe,
        .remove =       __devexit_p(virtrng_remove),
+#ifdef CONFIG_PM
+        .freeze =       virtrng_freeze,
+        .restore =      virtrng_restore,
+#endif
 };
 static int __init init(void)
diff --git a/drivers/char/ipmi/ipmi_si_intf.c b/drivers/char/ipmi/ipmi_si_intf.c
index 1e638fff40ea..83f85cf7fb1b 100644
--- a/drivers/char/ipmi/ipmi_si_intf.c
+++ b/drivers/char/ipmi/ipmi_si_intf.c
@@ -2503,18 +2503,6 @@ static void __devexit ipmi_pci_remove(struct pci_dev *pdev)
        cleanup_one_si(info);
 }
-#ifdef CONFIG_PM
-static int ipmi_pci_suspend(struct pci_dev *pdev, pm_message_t state)
-{
-        return 0;
-}
-static int ipmi_pci_resume(struct pci_dev *pdev)
-{
-        return 0;
-}
-#endif
 static struct pci_device_id ipmi_pci_devices[] = {
        { PCI_DEVICE(PCI_HP_VENDOR_ID, PCI_MMC_DEVICE_ID) },
        { PCI_DEVICE_CLASS(PCI_ERMC_CLASSCODE, PCI_ERMC_CLASSCODE_MASK) },
@@ -2527,10 +2515,6 @@ static struct pci_driver ipmi_pci_driver = {
        .id_table =     ipmi_pci_devices,
        .probe =        ipmi_pci_probe,
        .remove =       __devexit_p(ipmi_pci_remove),
-#ifdef CONFIG_PM
-        .suspend =      ipmi_pci_suspend,
-        .resume =       ipmi_pci_resume,
-#endif
 };
 #endif /* CONFIG_PCI */
diff --git a/drivers/char/ipmi/ipmi_watchdog.c b/drivers/char/ipmi/ipmi_watchdog.c
index 7ed356e52035..37b8be7cba95 100644
--- a/drivers/char/ipmi/ipmi_watchdog.c
+++ b/drivers/char/ipmi/ipmi_watchdog.c
@@ -141,17 +141,6 @@
 #define IPMI_WDOG_TIMER_NOT_INIT_RESP   0x80
-/* These are here until the real ones get into the watchdog.h interface. */
-#ifndef WDIOC_GETTIMEOUT
-#define WDIOC_GETTIMEOUT        _IOW(WATCHDOG_IOCTL_BASE, 20, int)
-#endif
-#ifndef WDIOC_SET_PRETIMEOUT
-#define WDIOC_SET_PRETIMEOUT     _IOW(WATCHDOG_IOCTL_BASE, 21, int)
-#endif
-#ifndef WDIOC_GET_PRETIMEOUT
-#define WDIOC_GET_PRETIMEOUT     _IOW(WATCHDOG_IOCTL_BASE, 22, int)
-#endif
 static DEFINE_MUTEX(ipmi_watchdog_mutex);
 static bool nowayout = WATCHDOG_NOWAYOUT;
@@ -732,7 +721,6 @@ static int ipmi_ioctl(struct file *file,
                        return -EFAULT;
                return 0;
-        case WDIOC_SET_PRETIMEOUT:
        case WDIOC_SETPRETIMEOUT:
                i = copy_from_user(&val, argp, sizeof(int));
                if (i)
@@ -740,7 +728,6 @@ static int ipmi_ioctl(struct file *file,
                pretimeout = val;
                return ipmi_set_timeout(IPMI_SET_TIMEOUT_HB_IF_NECESSARY);
-        case WDIOC_GET_PRETIMEOUT:
        case WDIOC_GETPRETIMEOUT:
                i = copy_to_user(argp, &pretimeout, sizeof(pretimeout));
                if (i)
diff --git a/drivers/char/mem.c b/drivers/char/mem.c
index 67c3371723cc..e5eedfa24c91 100644
--- a/drivers/char/mem.c
+++ b/drivers/char/mem.c
@@ -27,14 +27,16 @@
 #include <linux/splice.h>
 #include <linux/pfn.h>
 #include <linux/export.h>
+#include <linux/io.h>
 #include <asm/uaccess.h>
-#include <asm/io.h>
 #ifdef CONFIG_IA64
 # include <linux/efi.h>
 #endif
+#define DEVPORT_MINOR   4
 static inline unsigned long size_inside_page(unsigned long start,
                                             unsigned long size)
 {
@@ -894,6 +896,13 @@ static int __init chr_dev_init(void)
        for (minor = 1; minor < ARRAY_SIZE(devlist); minor++) {
                if (!devlist[minor].name)
                        continue;
+                /*
+                 * Create /dev/port? 
+                 */
+                if ((minor == DEVPORT_MINOR) && !arch_has_dev_port())
+                        continue;
                device_create(mem_class, NULL, MKDEV(MEM_MAJOR, minor),
                              NULL, devlist[minor].name);
        }
diff --git a/drivers/char/mspec.c b/drivers/char/mspec.c
index 8b78750f1efe..845f97fd1832 100644
--- a/drivers/char/mspec.c
+++ b/drivers/char/mspec.c
@@ -283,7 +283,7 @@ mspec_mmap(struct file *file, struct vm_area_struct *vma,
        vdata->flags = flags;
        vdata->type = type;
        spin_lock_init(&vdata->lock);
-        vdata->refcnt = ATOMIC_INIT(1);
+        atomic_set(&vdata->refcnt, 1);
        vma->vm_private_data = vdata;
        vma->vm_flags |= (VM_IO | VM_RESERVED | VM_PFNMAP | VM_DONTEXPAND);
diff --git a/drivers/char/random.c b/drivers/char/random.c
index 4ec04a754733..b86eae9b77df 100644
--- a/drivers/char/random.c
+++ b/drivers/char/random.c
@@ -125,21 +125,26 @@
 * The current exported interfaces for gathering environmental noise
 * from the devices are:
 *
+ *      void add_device_randomness(const void *buf, unsigned int size);
 *      void add_input_randomness(unsigned int type, unsigned int code,
 *                                unsigned int value);
- *      void add_interrupt_randomness(int irq);
+ *      void add_interrupt_randomness(int irq, int irq_flags);
 *      void add_disk_randomness(struct gendisk *disk);
 *
+ * add_device_randomness() is for adding data to the random pool that
+ * is likely to differ between two devices (or possibly even per boot).
+ * This would be things like MAC addresses or serial numbers, or the
+ * read-out of the RTC. This does *not* add any actual entropy to the
+ * pool, but it initializes the pool to different values for devices
+ * that might otherwise be identical and have very little entropy
+ * available to them (particularly common in the embedded world).
+ *
 * add_input_randomness() uses the input layer interrupt timing, as well as
 * the event type information from the hardware.
 *
- * add_interrupt_randomness() uses the inter-interrupt timing as random
+ * add_interrupt_randomness() uses the interrupt timing as random
- * inputs to the entropy pool.  Note that not all interrupts are good
+ * inputs to the entropy pool. Using the cycle counters and the irq source
- * sources of randomness!  For example, the timer interrupts is not a
+ * as inputs, it feeds the randomness roughly once a second.
- * good choice, because the periodicity of the interrupts is too
- * regular, and hence predictable to an attacker.  Network Interface
- * Controller interrupts are a better measure, since the timing of the
- * NIC interrupts are more unpredictable.
 *
 * add_disk_randomness() uses what amounts to the seek time of block
 * layer request events, on a per-disk_devt basis, as input to the
@@ -248,6 +253,8 @@
 #include <linux/percpu.h>
 #include <linux/cryptohash.h>
 #include <linux/fips.h>
+#include <linux/ptrace.h>
+#include <linux/kmemcheck.h>
 #ifdef CONFIG_GENERIC_HARDIRQS
 # include <linux/irq.h>
@@ -256,8 +263,12 @@
 #include <asm/processor.h>
 #include <asm/uaccess.h>
 #include <asm/irq.h>
+#include <asm/irq_regs.h>
 #include <asm/io.h>
+#define CREATE_TRACE_POINTS
+#include <trace/events/random.h>
 /*
 * Configuration information
 */
@@ -266,6 +277,8 @@
 #define SEC_XFER_SIZE 512
 #define EXTRACT_SIZE 10
+#define LONGS(x) (((x) + sizeof(unsigned long) - 1)/sizeof(unsigned long))
 /*
 * The minimum number of bits of entropy before we wake up a read on
 * /dev/random.  Should be enough to do a significant reseed.
@@ -420,8 +433,10 @@ struct entropy_store {
        /* read-write data: */
        spinlock_t lock;
        unsigned add_ptr;
+        unsigned input_rotate;
        int entropy_count;
-        int input_rotate;
+        int entropy_total;
+        unsigned int initialized:1;
        __u8 last_data[EXTRACT_SIZE];
 };
@@ -454,6 +469,10 @@ static struct entropy_store nonblocking_pool = {
        .pool = nonblocking_pool_data
 };
+static __u32 const twist_table[8] = {
+        0x00000000, 0x3b6e20c8, 0x76dc4190, 0x4db26158,
+        0xedb88320, 0xd6d6a3e8, 0x9b64c2b0, 0xa00ae278 };
 /*
 * This function adds bytes into the entropy "pool".  It does not
 * update the entropy estimate.  The caller should call
@@ -464,29 +483,24 @@ static struct entropy_store nonblocking_pool = {
 * it's cheap to do so and helps slightly in the expected case where
 * the entropy is concentrated in the low-order bits.
 */
-static void mix_pool_bytes_extract(struct entropy_store *r, const void *in,
+static void _mix_pool_bytes(struct entropy_store *r, const void *in,
-                                   int nbytes, __u8 out[64])
+                            int nbytes, __u8 out[64])
 {
-        static __u32 const twist_table[8] = {
-                0x00000000, 0x3b6e20c8, 0x76dc4190, 0x4db26158,
-                0xedb88320, 0xd6d6a3e8, 0x9b64c2b0, 0xa00ae278 };
        unsigned long i, j, tap1, tap2, tap3, tap4, tap5;
        int input_rotate;
        int wordmask = r->poolinfo->poolwords - 1;
        const char *bytes = in;
        __u32 w;
-        unsigned long flags;
-        /* Taps are constant, so we can load them without holding r->lock.  */
        tap1 = r->poolinfo->tap1;
        tap2 = r->poolinfo->tap2;
        tap3 = r->poolinfo->tap3;
        tap4 = r->poolinfo->tap4;
        tap5 = r->poolinfo->tap5;
-        spin_lock_irqsave(&r->lock, flags);
+        smp_rmb();
-        input_rotate = r->input_rotate;
+        input_rotate = ACCESS_ONCE(r->input_rotate);
-        i = r->add_ptr;
+        i = ACCESS_ONCE(r->add_ptr);
        /* mix one byte at a time to simplify size handling and churn faster */
        while (nbytes--) {
@@ -513,19 +527,61 @@ static void mix_pool_bytes_extract(struct entropy_store *r, const void *in,
                input_rotate += i ? 7 : 14;
        }
-        r->input_rotate = input_rotate;
+        ACCESS_ONCE(r->input_rotate) = input_rotate;
-        r->add_ptr = i;
+        ACCESS_ONCE(r->add_ptr) = i;
+        smp_wmb();
        if (out)
                for (j = 0; j < 16; j++)
                        ((__u32 *)out)[j] = r->pool[(i - j) & wordmask];
+}
+static void __mix_pool_bytes(struct entropy_store *r, const void *in,
+                             int nbytes, __u8 out[64])
+{
+        trace_mix_pool_bytes_nolock(r->name, nbytes, _RET_IP_);
+        _mix_pool_bytes(r, in, nbytes, out);
+}
+static void mix_pool_bytes(struct entropy_store *r, const void *in,
+                           int nbytes, __u8 out[64])
+{
+        unsigned long flags;
+        trace_mix_pool_bytes(r->name, nbytes, _RET_IP_);
+        spin_lock_irqsave(&r->lock, flags);
+        _mix_pool_bytes(r, in, nbytes, out);
        spin_unlock_irqrestore(&r->lock, flags);
 }
-static void mix_pool_bytes(struct entropy_store *r, const void *in, int bytes)
+struct fast_pool {
+        __u32           pool[4];
+        unsigned long   last;
+        unsigned short  count;
+        unsigned char   rotate;
+        unsigned char   last_timer_intr;
+};
+/*
+ * This is a fast mixing routine used by the interrupt randomness
+ * collector.  It's hardcoded for an 128 bit pool and assumes that any
+ * locks that might be needed are taken by the caller.
+ */
+static void fast_mix(struct fast_pool *f, const void *in, int nbytes)
 {
-       mix_pool_bytes_extract(r, in, bytes, NULL);
+        const char      *bytes = in;
+        __u32           w;
+        unsigned        i = f->count;
+        unsigned        input_rotate = f->rotate;
+        while (nbytes--) {
+                w = rol32(*bytes++, input_rotate & 31) ^ f->pool[i & 3] ^
+                        f->pool[(i + 1) & 3];
+                f->pool[i & 3] = (w >> 3) ^ twist_table[w & 7];
+                input_rotate += (i++ & 3) ? 7 : 14;
+        }
+        f->count = i;
+        f->rotate = input_rotate;
 }
 /*
@@ -533,30 +589,38 @@ static void mix_pool_bytes(struct entropy_store *r, const void *in, int bytes)
 */
 static void credit_entropy_bits(struct entropy_store *r, int nbits)
 {
-        unsigned long flags;
+        int entropy_count, orig;
-        int entropy_count;
        if (!nbits)
                return;
-        spin_lock_irqsave(&r->lock, flags);
        DEBUG_ENT("added %d entropy credits to %s\n", nbits, r->name);
-        entropy_count = r->entropy_count;
+retry:
+        entropy_count = orig = ACCESS_ONCE(r->entropy_count);
        entropy_count += nbits;
        if (entropy_count < 0) {
                DEBUG_ENT("negative entropy/overflow\n");
                entropy_count = 0;
        } else if (entropy_count > r->poolinfo->POOLBITS)
                entropy_count = r->poolinfo->POOLBITS;
-        r->entropy_count = entropy_count;
+        if (cmpxchg(&r->entropy_count, orig, entropy_count) != orig)
+                goto retry;
+        if (!r->initialized && nbits > 0) {
+                r->entropy_total += nbits;
+                if (r->entropy_total > 128)
+                        r->initialized = 1;
+        }
+        trace_credit_entropy_bits(r->name, nbits, entropy_count,
+                                  r->entropy_total, _RET_IP_);
        /* should we wake readers? */
        if (r == &input_pool && entropy_count >= random_read_wakeup_thresh) {
                wake_up_interruptible(&random_read_wait);
                kill_fasync(&fasync, SIGIO, POLL_IN);
        }
-        spin_unlock_irqrestore(&r->lock, flags);
 }
 /*********************************************************************
@@ -572,42 +636,24 @@ struct timer_rand_state {
        unsigned dont_count_entropy:1;
 };
-#ifndef CONFIG_GENERIC_HARDIRQS
+/*
+ * Add device- or boot-specific data to the input and nonblocking
-static struct timer_rand_state *irq_timer_state[NR_IRQS];
+ * pools to help initialize them to unique values.
+ *
-static struct timer_rand_state *get_timer_rand_state(unsigned int irq)
+ * None of this adds any entropy, it is meant to avoid the
-{
+ * problem of the nonblocking pool having similar initial state
-        return irq_timer_state[irq];
+ * across largely identical devices.
-}
+ */
+void add_device_randomness(const void *buf, unsigned int size)
-static void set_timer_rand_state(unsigned int irq,
-                                 struct timer_rand_state *state)
-{
-        irq_timer_state[irq] = state;
-}
-#else
-static struct timer_rand_state *get_timer_rand_state(unsigned int irq)
-{
-        struct irq_desc *desc;
-        desc = irq_to_desc(irq);
-        return desc->timer_rand_state;
-}
-static void set_timer_rand_state(unsigned int irq,
-                                 struct timer_rand_state *state)
 {
-        struct irq_desc *desc;
+        unsigned long time = get_cycles() ^ jiffies;
-        desc = irq_to_desc(irq);
+        mix_pool_bytes(&input_pool, buf, size, NULL);
+        mix_pool_bytes(&input_pool, &time, sizeof(time), NULL);
-        desc->timer_rand_state = state;
+        mix_pool_bytes(&nonblocking_pool, buf, size, NULL);
+        mix_pool_bytes(&nonblocking_pool, &time, sizeof(time), NULL);
 }
-#endif
+EXPORT_SYMBOL(add_device_randomness);
 static struct timer_rand_state input_timer_state;
@@ -637,13 +683,9 @@ static void add_timer_randomness(struct timer_rand_state *state, unsigned num)
                goto out;
        sample.jiffies = jiffies;
+        sample.cycles = get_cycles();
-        /* Use arch random value, fall back to cycles */
-        if (!arch_get_random_int(&sample.cycles))
-                sample.cycles = get_cycles();
        sample.num = num;
-        mix_pool_bytes(&input_pool, &sample, sizeof(sample));
+        mix_pool_bytes(&input_pool, &sample, sizeof(sample), NULL);
        /*
         * Calculate number of bits of randomness we probably added.
@@ -700,17 +742,48 @@ void add_input_randomness(unsigned int type, unsigned int code,
 }
 EXPORT_SYMBOL_GPL(add_input_randomness);
-void add_interrupt_randomness(int irq)
+static DEFINE_PER_CPU(struct fast_pool, irq_randomness);
+void add_interrupt_randomness(int irq, int irq_flags)
 {
-        struct timer_rand_state *state;
+        struct entropy_store    *r;
+        struct fast_pool        *fast_pool = &__get_cpu_var(irq_randomness);
+        struct pt_regs          *regs = get_irq_regs();
+        unsigned long           now = jiffies;
+        __u32                   input[4], cycles = get_cycles();
+        input[0] = cycles ^ jiffies;
+        input[1] = irq;
+        if (regs) {
+                __u64 ip = instruction_pointer(regs);
+                input[2] = ip;
+                input[3] = ip >> 32;
+        }
-        state = get_timer_rand_state(irq);
+        fast_mix(fast_pool, input, sizeof(input));
-        if (state == NULL)
+        if ((fast_pool->count & 1023) &&
+            !time_after(now, fast_pool->last + HZ))
                return;
-        DEBUG_ENT("irq event %d\n", irq);
+        fast_pool->last = now;
-        add_timer_randomness(state, 0x100 + irq);
+        r = nonblocking_pool.initialized ? &input_pool : &nonblocking_pool;
+        __mix_pool_bytes(r, &fast_pool->pool, sizeof(fast_pool->pool), NULL);
+        /*
+         * If we don't have a valid cycle counter, and we see
+         * back-to-back timer interrupts, then skip giving credit for
+         * any entropy.
+         */
+        if (cycles == 0) {
+                if (irq_flags & __IRQF_TIMER) {
+                        if (fast_pool->last_timer_intr)
+                                return;
+                        fast_pool->last_timer_intr = 1;
+                } else
+                        fast_pool->last_timer_intr = 0;
+        }
+        credit_entropy_bits(r, 1);
 }
 #ifdef CONFIG_BLOCK
@@ -742,7 +815,7 @@ static ssize_t extract_entropy(struct entropy_store *r, void *buf,
 */
 static void xfer_secondary_pool(struct entropy_store *r, size_t nbytes)
 {
-        __u32 tmp[OUTPUT_POOL_WORDS];
+        __u32   tmp[OUTPUT_POOL_WORDS];
        if (r->pull && r->entropy_count < nbytes * 8 &&
            r->entropy_count < r->poolinfo->POOLBITS) {
@@ -761,7 +834,7 @@ static void xfer_secondary_pool(struct entropy_store *r, size_t nbytes)
                bytes = extract_entropy(r->pull, tmp, bytes,
                                        random_read_wakeup_thresh / 8, rsvd);
-                mix_pool_bytes(r, tmp, bytes);
+                mix_pool_bytes(r, tmp, bytes, NULL);
                credit_entropy_bits(r, bytes*8);
        }
 }
@@ -820,13 +893,19 @@ static size_t account(struct entropy_store *r, size_t nbytes, int min,
 static void extract_buf(struct entropy_store *r, __u8 *out)
 {
        int i;
-        __u32 hash[5], workspace[SHA_WORKSPACE_WORDS];
+        union {
+                __u32 w[5];
+                unsigned long l[LONGS(EXTRACT_SIZE)];
+        } hash;
+        __u32 workspace[SHA_WORKSPACE_WORDS];
        __u8 extract[64];
+        unsigned long flags;
        /* Generate a hash across the pool, 16 words (512 bits) at a time */
-        sha_init(hash);
+        sha_init(hash.w);
+        spin_lock_irqsave(&r->lock, flags);
        for (i = 0; i < r->poolinfo->poolwords; i += 16)
-                sha_transform(hash, (__u8 *)(r->pool + i), workspace);
+                sha_transform(hash.w, (__u8 *)(r->pool + i), workspace);
        /*
         * We mix the hash back into the pool to prevent backtracking
@@ -837,13 +916,14 @@ static void extract_buf(struct entropy_store *r, __u8 *out)
         * brute-forcing the feedback as hard as brute-forcing the
         * hash.
         */
-        mix_pool_bytes_extract(r, hash, sizeof(hash), extract);
+        __mix_pool_bytes(r, hash.w, sizeof(hash.w), extract);
+        spin_unlock_irqrestore(&r->lock, flags);
        /*
         * To avoid duplicates, we atomically extract a portion of the
         * pool while mixing, and hash one final time.
         */
-        sha_transform(hash, extract, workspace);
+        sha_transform(hash.w, extract, workspace);
        memset(extract, 0, sizeof(extract));
        memset(workspace, 0, sizeof(workspace));
@@ -852,20 +932,32 @@ static void extract_buf(struct entropy_store *r, __u8 *out)
         * pattern, we fold it in half. Thus, we always feed back
         * twice as much data as we output.
         */
-        hash[0] ^= hash[3];
+        hash.w[0] ^= hash.w[3];
-        hash[1] ^= hash[4];
+        hash.w[1] ^= hash.w[4];
-        hash[2] ^= rol32(hash[2], 16);
+        hash.w[2] ^= rol32(hash.w[2], 16);
-        memcpy(out, hash, EXTRACT_SIZE);
-        memset(hash, 0, sizeof(hash));
+        /*
+         * If we have a architectural hardware random number
+         * generator, mix that in, too.
+         */
+        for (i = 0; i < LONGS(EXTRACT_SIZE); i++) {
+                unsigned long v;
+                if (!arch_get_random_long(&v))
+                        break;
+                hash.l[i] ^= v;
+        }
+        memcpy(out, &hash, EXTRACT_SIZE);
+        memset(&hash, 0, sizeof(hash));
 }
 static ssize_t extract_entropy(struct entropy_store *r, void *buf,
-                               size_t nbytes, int min, int reserved)
+                                 size_t nbytes, int min, int reserved)
 {
        ssize_t ret = 0, i;
        __u8 tmp[EXTRACT_SIZE];
-        unsigned long flags;
+        trace_extract_entropy(r->name, nbytes, r->entropy_count, _RET_IP_);
        xfer_secondary_pool(r, nbytes);
        nbytes = account(r, nbytes, min, reserved);
@@ -873,6 +965,8 @@ static ssize_t extract_entropy(struct entropy_store *r, void *buf,
                extract_buf(r, tmp);
                if (fips_enabled) {
+                        unsigned long flags;
                        spin_lock_irqsave(&r->lock, flags);
                        if (!memcmp(tmp, r->last_data, EXTRACT_SIZE))
                                panic("Hardware RNG duplicated output!\n");
@@ -898,6 +992,7 @@ static ssize_t extract_entropy_user(struct entropy_store *r, void __user *buf,
        ssize_t ret = 0, i;
        __u8 tmp[EXTRACT_SIZE];
+        trace_extract_entropy_user(r->name, nbytes, r->entropy_count, _RET_IP_);
        xfer_secondary_pool(r, nbytes);
        nbytes = account(r, nbytes, 0, 0);
@@ -931,17 +1026,35 @@ static ssize_t extract_entropy_user(struct entropy_store *r, void __user *buf,
 /*
 * This function is the exported kernel interface.  It returns some
- * number of good random numbers, suitable for seeding TCP sequence
+ * number of good random numbers, suitable for key generation, seeding
- * numbers, etc.
+ * TCP sequence numbers, etc.  It does not use the hw random number
+ * generator, if available; use get_random_bytes_arch() for that.
 */
 void get_random_bytes(void *buf, int nbytes)
 {
+        extract_entropy(&nonblocking_pool, buf, nbytes, 0, 0);
+}
+EXPORT_SYMBOL(get_random_bytes);
+/*
+ * This function will use the architecture-specific hardware random
+ * number generator if it is available.  The arch-specific hw RNG will
+ * almost certainly be faster than what we can do in software, but it
+ * is impossible to verify that it is implemented securely (as
+ * opposed, to, say, the AES encryption of a sequence number using a
+ * key known by the NSA).  So it's useful if we need the speed, but
+ * only if we're willing to trust the hardware manufacturer not to
+ * have put in a back door.
+ */
+void get_random_bytes_arch(void *buf, int nbytes)
+{
        char *p = buf;
+        trace_get_random_bytes(nbytes, _RET_IP_);
        while (nbytes) {
                unsigned long v;
                int chunk = min(nbytes, (int)sizeof(unsigned long));
-                
                if (!arch_get_random_long(&v))
                        break;
                
@@ -950,9 +1063,11 @@ void get_random_bytes(void *buf, int nbytes)
                nbytes -= chunk;
        }
-        extract_entropy(&nonblocking_pool, p, nbytes, 0, 0);
+        if (nbytes)
+                extract_entropy(&nonblocking_pool, p, nbytes, 0, 0);
 }
-EXPORT_SYMBOL(get_random_bytes);
+EXPORT_SYMBOL(get_random_bytes_arch);
 /*
 * init_std_data - initialize pool with system data
@@ -966,23 +1081,30 @@ EXPORT_SYMBOL(get_random_bytes);
 static void init_std_data(struct entropy_store *r)
 {
        int i;
-        ktime_t now;
+        ktime_t now = ktime_get_real();
-        unsigned long flags;
+        unsigned long rv;
-        spin_lock_irqsave(&r->lock, flags);
        r->entropy_count = 0;
-        spin_unlock_irqrestore(&r->lock, flags);
+        r->entropy_total = 0;
+        mix_pool_bytes(r, &now, sizeof(now), NULL);
-        now = ktime_get_real();
+        for (i = r->poolinfo->POOLBYTES; i > 0; i -= sizeof(rv)) {
-        mix_pool_bytes(r, &now, sizeof(now));
+                if (!arch_get_random_long(&rv))
-        for (i = r->poolinfo->POOLBYTES; i > 0; i -= sizeof flags) {
-                if (!arch_get_random_long(&flags))
                        break;
-                mix_pool_bytes(r, &flags, sizeof(flags));
+                mix_pool_bytes(r, &rv, sizeof(rv), NULL);
        }
-        mix_pool_bytes(r, utsname(), sizeof(*(utsname())));
+        mix_pool_bytes(r, utsname(), sizeof(*(utsname())), NULL);
 }
+/*
+ * Note that setup_arch() may call add_device_randomness()
+ * long before we get here. This allows seeding of the pools
+ * with some platform dependent data very early in the boot
+ * process. But it limits our options here. We must use
+ * statically allocated structures that already have all
+ * initializations complete at compile time. We should also
+ * take care not to overwrite the precious per platform data
+ * we were given.
+ */
 static int rand_initialize(void)
 {
        init_std_data(&input_pool);
@@ -992,24 +1114,6 @@ static int rand_initialize(void)
 }
 module_init(rand_initialize);
-void rand_initialize_irq(int irq)
-{
-        struct timer_rand_state *state;
-        state = get_timer_rand_state(irq);
-        if (state)
-                return;
-        /*
-         * If kzalloc returns null, we just won't use that entropy
-         * source.
-         */
-        state = kzalloc(sizeof(struct timer_rand_state), GFP_KERNEL);
-        if (state)
-                set_timer_rand_state(irq, state);
-}
 #ifdef CONFIG_BLOCK
 void rand_initialize_disk(struct gendisk *disk)
 {
@@ -1117,7 +1221,7 @@ write_pool(struct entropy_store *r, const char __user *buffer, size_t count)
                count -= bytes;
                p += bytes;
-                mix_pool_bytes(r, buf, bytes);
+                mix_pool_bytes(r, buf, bytes, NULL);
                cond_resched();
        }
@@ -1279,6 +1383,7 @@ static int proc_do_uuid(ctl_table *table, int write,
 }
 static int sysctl_poolsize = INPUT_POOL_WORDS * 32;
+extern ctl_table random_table[];
 ctl_table random_table[] = {
        {
                .procname       = "poolsize",
@@ -1344,7 +1449,7 @@ late_initcall(random_int_secret_init);
 * value is not cryptographically secure but for several uses the cost of
 * depleting entropy is too high
 */
-DEFINE_PER_CPU(__u32 [MD5_DIGEST_WORDS], get_random_int_hash);
+static DEFINE_PER_CPU(__u32 [MD5_DIGEST_WORDS], get_random_int_hash);
 unsigned int get_random_int(void)
 {
        __u32 *hash;
diff --git a/drivers/char/sonypi.c b/drivers/char/sonypi.c
index 45713f0e7d61..f87780502b41 100644
--- a/drivers/char/sonypi.c
+++ b/drivers/char/sonypi.c
@@ -1459,7 +1459,7 @@ static int __devexit sonypi_remove(struct platform_device *dev)
 #ifdef CONFIG_PM
 static int old_camera_power;
-static int sonypi_suspend(struct platform_device *dev, pm_message_t state)
+static int sonypi_suspend(struct device *dev)
 {
        old_camera_power = sonypi_device.camera_power;
        sonypi_disable();
@@ -1467,14 +1467,16 @@ static int sonypi_suspend(struct platform_device *dev, pm_message_t state)
        return 0;
 }
-static int sonypi_resume(struct platform_device *dev)
+static int sonypi_resume(struct device *dev)
 {
        sonypi_enable(old_camera_power);
        return 0;
 }
+static SIMPLE_DEV_PM_OPS(sonypi_pm, sonypi_suspend, sonypi_resume);
+#define SONYPI_PM       (&sonypi_pm)
 #else
-#define sonypi_suspend  NULL
+#define SONYPI_PM       NULL
-#define sonypi_resume   NULL
 #endif
 static void sonypi_shutdown(struct platform_device *dev)
@@ -1486,12 +1488,11 @@ static struct platform_driver sonypi_driver = {
        .driver         = {
                .name   = "sonypi",
                .owner  = THIS_MODULE,
+                .pm     = SONYPI_PM,
        },
        .probe          = sonypi_probe,
        .remove         = __devexit_p(sonypi_remove),
        .shutdown       = sonypi_shutdown,
-        .suspend        = sonypi_suspend,
-        .resume         = sonypi_resume,
 };
 static struct platform_device *sonypi_platform_device;
diff --git a/drivers/char/tpm/tpm.c b/drivers/char/tpm/tpm.c
index ad7c7320dd1b..817f0ee202b6 100644
--- a/drivers/char/tpm/tpm.c
+++ b/drivers/char/tpm/tpm.c
@@ -827,10 +827,10 @@ EXPORT_SYMBOL_GPL(tpm_pcr_extend);
 int tpm_do_selftest(struct tpm_chip *chip)
 {
        int rc;
-        u8 digest[TPM_DIGEST_SIZE];
        unsigned int loops;
        unsigned int delay_msec = 1000;
        unsigned long duration;
+        struct tpm_cmd_t cmd;
        duration = tpm_calc_ordinal_duration(chip,
                                             TPM_ORD_CONTINUE_SELFTEST);
@@ -845,7 +845,15 @@ int tpm_do_selftest(struct tpm_chip *chip)
                return rc;
        do {
-                rc = __tpm_pcr_read(chip, 0, digest);
+                /* Attempt to read a PCR value */
+                cmd.header.in = pcrread_header;
+                cmd.params.pcrread_in.pcr_idx = cpu_to_be32(0);
+                rc = tpm_transmit(chip, (u8 *) &cmd, READ_PCR_RESULT_SIZE);
+                if (rc < TPM_HEADER_SIZE)
+                        return -EFAULT;
+                rc = be32_to_cpu(cmd.header.out.return_code);
                if (rc == TPM_ERR_DISABLED || rc == TPM_ERR_DEACTIVATED) {
                        dev_info(chip->dev,
                                 "TPM is disabled/deactivated (0x%X)\n", rc);
@@ -1274,7 +1282,7 @@ static struct tpm_input_header savestate_header = {
 * We are about to suspend. Save the TPM state
 * so that it can be restored.
 */
-int tpm_pm_suspend(struct device *dev, pm_message_t pm_state)
+int tpm_pm_suspend(struct device *dev)
 {
        struct tpm_chip *chip = dev_get_drvdata(dev);
        struct tpm_cmd_t cmd;
@@ -1322,6 +1330,9 @@ EXPORT_SYMBOL_GPL(tpm_pm_resume);
 void tpm_dev_vendor_release(struct tpm_chip *chip)
 {
+        if (!chip)
+                return;
        if (chip->vendor.release)
                chip->vendor.release(chip->dev);
@@ -1339,6 +1350,9 @@ void tpm_dev_release(struct device *dev)
 {
        struct tpm_chip *chip = dev_get_drvdata(dev);
+        if (!chip)
+                return;
        tpm_dev_vendor_release(chip);
        chip->release(dev);
@@ -1405,15 +1419,12 @@ struct tpm_chip *tpm_register_hardware(struct device *dev,
                        "unable to misc_register %s, minor %d\n",
                        chip->vendor.miscdev.name,
                        chip->vendor.miscdev.minor);
-                put_device(chip->dev);
+                goto put_device;
-                return NULL;
        }
        if (sysfs_create_group(&dev->kobj, chip->vendor.attr_group)) {
                misc_deregister(&chip->vendor.miscdev);
-                put_device(chip->dev);
+                goto put_device;
-                return NULL;
        }
        chip->bios_dir = tpm_bios_log_setup(devname);
@@ -1425,6 +1436,8 @@ struct tpm_chip *tpm_register_hardware(struct device *dev,
        return chip;
+put_device:
+        put_device(chip->dev);
 out_free:
        kfree(chip);
        kfree(devname);
diff --git a/drivers/char/tpm/tpm.h b/drivers/char/tpm/tpm.h
index b1c5280ac159..917f727e6740 100644
--- a/drivers/char/tpm/tpm.h
+++ b/drivers/char/tpm/tpm.h
@@ -299,7 +299,7 @@ extern ssize_t tpm_write(struct file *, const char __user *, size_t,
                         loff_t *);
 extern ssize_t tpm_read(struct file *, char __user *, size_t, loff_t *);
 extern void tpm_remove_hardware(struct device *);
-extern int tpm_pm_suspend(struct device *, pm_message_t);
+extern int tpm_pm_suspend(struct device *);
 extern int tpm_pm_resume(struct device *);
 extern int wait_for_tpm_stat(struct tpm_chip *, u8, unsigned long,
                             wait_queue_head_t *);
diff --git a/drivers/char/tpm/tpm_atmel.c b/drivers/char/tpm/tpm_atmel.c
index c64a1bc65349..678d57019dc4 100644
--- a/drivers/char/tpm/tpm_atmel.c
+++ b/drivers/char/tpm/tpm_atmel.c
@@ -168,22 +168,14 @@ static void atml_plat_remove(void)
        }
 }
-static int tpm_atml_suspend(struct platform_device *dev, pm_message_t msg)
+static SIMPLE_DEV_PM_OPS(tpm_atml_pm, tpm_pm_suspend, tpm_pm_resume);
-{
-        return tpm_pm_suspend(&dev->dev, msg);
-}
-static int tpm_atml_resume(struct platform_device *dev)
-{
-        return tpm_pm_resume(&dev->dev);
-}
 static struct platform_driver atml_drv = {
        .driver = {
                .name = "tpm_atmel",
                .owner          = THIS_MODULE,
+                .pm             = &tpm_atml_pm,
        },
-        .suspend = tpm_atml_suspend,
-        .resume = tpm_atml_resume,
 };
 static int __init init_atmel(void)
diff --git a/drivers/char/tpm/tpm_infineon.c b/drivers/char/tpm/tpm_infineon.c
index 76da32e11f18..3251a44e8ceb 100644
--- a/drivers/char/tpm/tpm_infineon.c
+++ b/drivers/char/tpm/tpm_infineon.c
@@ -4,8 +4,8 @@
 * SLD 9630 TT 1.1 and SLB 9635 TT 1.2 Trusted Platform Module
 * Specifications at www.trustedcomputinggroup.org
 *
- * Copyright (C) 2005, Marcel Selhorst <m.selhorst@sirrix.com>
+ * Copyright (C) 2005, Marcel Selhorst <tpmdd@selhorst.net>
- * Sirrix AG - security technologies, http://www.sirrix.com and
+ * Sirrix AG - security technologies <tpmdd@sirrix.com> and
 * Applied Data Security Group, Ruhr-University Bochum, Germany
 * Project-Homepage: http://www.trust.rub.de/projects/linux-device-driver-infineon-tpm/ 
 *
@@ -671,7 +671,7 @@ static void __exit cleanup_inf(void)
 module_init(init_inf);
 module_exit(cleanup_inf);
-MODULE_AUTHOR("Marcel Selhorst <m.selhorst@sirrix.com>");
+MODULE_AUTHOR("Marcel Selhorst <tpmdd@sirrix.com>");
 MODULE_DESCRIPTION("Driver for Infineon TPM SLD 9630 TT 1.1 / SLB 9635 TT 1.2");
 MODULE_VERSION("1.9.2");
 MODULE_LICENSE("GPL");
diff --git a/drivers/char/tpm/tpm_nsc.c b/drivers/char/tpm/tpm_nsc.c
index 4d2464871ada..640c9a427b59 100644
--- a/drivers/char/tpm/tpm_nsc.c
+++ b/drivers/char/tpm/tpm_nsc.c
@@ -274,22 +274,13 @@ static void tpm_nsc_remove(struct device *dev)
        }
 }
-static int tpm_nsc_suspend(struct platform_device *dev, pm_message_t msg)
+static SIMPLE_DEV_PM_OPS(tpm_nsc_pm, tpm_pm_suspend, tpm_pm_resume);
-{
-        return tpm_pm_suspend(&dev->dev, msg);
-}
-static int tpm_nsc_resume(struct platform_device *dev)
-{
-        return tpm_pm_resume(&dev->dev);
-}
 static struct platform_driver nsc_drv = {
-        .suspend         = tpm_nsc_suspend,
-        .resume          = tpm_nsc_resume,
        .driver          = {
                .name    = "tpm_nsc",
                .owner   = THIS_MODULE,
+                .pm      = &tpm_nsc_pm,
        },
 };
diff --git a/drivers/char/tpm/tpm_tis.c b/drivers/char/tpm/tpm_tis.c
index d2a70cae76df..c4be3519a587 100644
--- a/drivers/char/tpm/tpm_tis.c
+++ b/drivers/char/tpm/tpm_tis.c
@@ -750,7 +750,7 @@ static int __devinit tpm_tis_pnp_init(struct pnp_dev *pnp_dev,
 static int tpm_tis_pnp_suspend(struct pnp_dev *dev, pm_message_t msg)
 {
-        return tpm_pm_suspend(&dev->dev, msg);
+        return tpm_pm_suspend(&dev->dev);
 }
 static int tpm_tis_pnp_resume(struct pnp_dev *dev)
@@ -806,27 +806,27 @@ module_param_string(hid, tpm_pnp_tbl[TIS_HID_USR_IDX].id,
                    sizeof(tpm_pnp_tbl[TIS_HID_USR_IDX].id), 0444);
 MODULE_PARM_DESC(hid, "Set additional specific HID for this driver to probe");
 #endif
-static int tpm_tis_suspend(struct platform_device *dev, pm_message_t msg)
-{
-        return tpm_pm_suspend(&dev->dev, msg);
-}
-static int tpm_tis_resume(struct platform_device *dev)
+#ifdef CONFIG_PM_SLEEP
+static int tpm_tis_resume(struct device *dev)
 {
-        struct tpm_chip *chip = dev_get_drvdata(&dev->dev);
+        struct tpm_chip *chip = dev_get_drvdata(dev);
        if (chip->vendor.irq)
                tpm_tis_reenable_interrupts(chip);
-        return tpm_pm_resume(&dev->dev);
+        return tpm_pm_resume(dev);
 }
+#endif
+static SIMPLE_DEV_PM_OPS(tpm_tis_pm, tpm_pm_suspend, tpm_tis_resume);
 static struct platform_driver tis_drv = {
        .driver = {
                .name = "tpm_tis",
                .owner          = THIS_MODULE,
+                .pm             = &tpm_tis_pm,
        },
-        .suspend = tpm_tis_suspend,
-        .resume = tpm_tis_resume,
 };
 static struct platform_device *pdev;
diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
index 4864407e3fc4..7f0b5ca78516 100644
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@ -25,7 +25,6 @@ menu "Common Clock Framework"
 config COMMON_CLK_DEBUG
        bool "DebugFS representation of clock tree"
-        depends on COMMON_CLK
        select DEBUG_FS
        ---help---
          Creates a directory hierchy in debugfs for visualizing the clk
@@ -34,4 +33,11 @@ config COMMON_CLK_DEBUG
          clk_flags, clk_prepare_count, clk_enable_count &
          clk_notifier_count.
+config COMMON_CLK_WM831X
+        tristate "Clock driver for WM831x/2x PMICs"
+        depends on MFD_WM831X
+        ---help---
+          Supports the clocking subsystem of the WM831x/2x series of
+          PMICs from Wolfson Microlectronics.
 endmenu
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index b9a5158a30b1..5869ea387054 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -1,7 +1,15 @@
+# common clock types
 obj-$(CONFIG_CLKDEV_LOOKUP)     += clkdev.o
 obj-$(CONFIG_COMMON_CLK)        += clk.o clk-fixed-rate.o clk-gate.o \
                                   clk-mux.o clk-divider.o clk-fixed-factor.o
 # SoCs specific
+obj-$(CONFIG_ARCH_NOMADIK)      += clk-nomadik.o
+obj-$(CONFIG_ARCH_HIGHBANK)     += clk-highbank.o
 obj-$(CONFIG_ARCH_MXS)          += mxs/
+obj-$(CONFIG_ARCH_SOCFPGA)      += socfpga/
 obj-$(CONFIG_PLAT_SPEAR)        += spear/
+obj-$(CONFIG_ARCH_U300)         += clk-u300.o
+obj-$(CONFIG_ARCH_INTEGRATOR)   += versatile/
+# Chip specific
+obj-$(CONFIG_COMMON_CLK_WM831X) += clk-wm831x.o
diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c
index 8ea11b444528..a9204c69148d 100644
--- a/drivers/clk/clk-divider.c
+++ b/drivers/clk/clk-divider.c
@@ -30,18 +30,89 @@
 #define to_clk_divider(_hw) container_of(_hw, struct clk_divider, hw)
 #define div_mask(d)     ((1 << (d->width)) - 1)
+#define is_power_of_two(i)      !(i & ~i)
+static unsigned int _get_table_maxdiv(const struct clk_div_table *table)
+{
+        unsigned int maxdiv = 0;
+        const struct clk_div_table *clkt;
+        for (clkt = table; clkt->div; clkt++)
+                if (clkt->div > maxdiv)
+                        maxdiv = clkt->div;
+        return maxdiv;
+}
+static unsigned int _get_maxdiv(struct clk_divider *divider)
+{
+        if (divider->flags & CLK_DIVIDER_ONE_BASED)
+                return div_mask(divider);
+        if (divider->flags & CLK_DIVIDER_POWER_OF_TWO)
+                return 1 << div_mask(divider);
+        if (divider->table)
+                return _get_table_maxdiv(divider->table);
+        return div_mask(divider) + 1;
+}
+static unsigned int _get_table_div(const struct clk_div_table *table,
+                                                        unsigned int val)
+{
+        const struct clk_div_table *clkt;
+        for (clkt = table; clkt->div; clkt++)
+                if (clkt->val == val)
+                        return clkt->div;
+        return 0;
+}
+static unsigned int _get_div(struct clk_divider *divider, unsigned int val)
+{
+        if (divider->flags & CLK_DIVIDER_ONE_BASED)
+                return val;
+        if (divider->flags & CLK_DIVIDER_POWER_OF_TWO)
+                return 1 << val;
+        if (divider->table)
+                return _get_table_div(divider->table, val);
+        return val + 1;
+}
+static unsigned int _get_table_val(const struct clk_div_table *table,
+                                                        unsigned int div)
+{
+        const struct clk_div_table *clkt;
+        for (clkt = table; clkt->div; clkt++)
+                if (clkt->div == div)
+                        return clkt->val;
+        return 0;
+}
+static unsigned int _get_val(struct clk_divider *divider, u8 div)
+{
+        if (divider->flags & CLK_DIVIDER_ONE_BASED)
+                return div;
+        if (divider->flags & CLK_DIVIDER_POWER_OF_TWO)
+                return __ffs(div);
+        if (divider->table)
+                return  _get_table_val(divider->table, div);
+        return div - 1;
+}
 static unsigned long clk_divider_recalc_rate(struct clk_hw *hw,
                unsigned long parent_rate)
 {
        struct clk_divider *divider = to_clk_divider(hw);
-        unsigned int div;
+        unsigned int div, val;
-        div = readl(divider->reg) >> divider->shift;
+        val = readl(divider->reg) >> divider->shift;
-        div &= div_mask(divider);
+        val &= div_mask(divider);
-        if (!(divider->flags & CLK_DIVIDER_ONE_BASED))
+        div = _get_div(divider, val);
-                div++;
+        if (!div) {
+                WARN(1, "%s: Invalid divisor for clock %s\n", __func__,
+                                                __clk_get_name(hw->clk));
+                return parent_rate;
+        }
        return parent_rate / div;
 }
@@ -52,6 +123,26 @@ static unsigned long clk_divider_recalc_rate(struct clk_hw *hw,
 */
 #define MULT_ROUND_UP(r, m) ((r) * (m) + (m) - 1)
+static bool _is_valid_table_div(const struct clk_div_table *table,
+                                                         unsigned int div)
+{
+        const struct clk_div_table *clkt;
+        for (clkt = table; clkt->div; clkt++)
+                if (clkt->div == div)
+                        return true;
+        return false;
+}
+static bool _is_valid_div(struct clk_divider *divider, unsigned int div)
+{
+        if (divider->flags & CLK_DIVIDER_POWER_OF_TWO)
+                return is_power_of_two(div);
+        if (divider->table)
+                return _is_valid_table_div(divider->table, div);
+        return true;
+}
 static int clk_divider_bestdiv(struct clk_hw *hw, unsigned long rate,
                unsigned long *best_parent_rate)
 {
@@ -62,10 +153,7 @@ static int clk_divider_bestdiv(struct clk_hw *hw, unsigned long rate,
        if (!rate)
                rate = 1;
-        maxdiv = (1 << divider->width);
+        maxdiv = _get_maxdiv(divider);
-        if (divider->flags & CLK_DIVIDER_ONE_BASED)
-                maxdiv--;
        if (!(__clk_get_flags(hw->clk) & CLK_SET_RATE_PARENT)) {
                parent_rate = *best_parent_rate;
@@ -82,6 +170,8 @@ static int clk_divider_bestdiv(struct clk_hw *hw, unsigned long rate,
        maxdiv = min(ULONG_MAX / rate, maxdiv);
        for (i = 1; i <= maxdiv; i++) {
+                if (!_is_valid_div(divider, i))
+                        continue;
                parent_rate = __clk_round_rate(__clk_get_parent(hw->clk),
                                MULT_ROUND_UP(rate, i));
                now = parent_rate / i;
@@ -93,9 +183,7 @@ static int clk_divider_bestdiv(struct clk_hw *hw, unsigned long rate,
        }
        if (!bestdiv) {
-                bestdiv = (1 << divider->width);
+                bestdiv = _get_maxdiv(divider);
-                if (divider->flags & CLK_DIVIDER_ONE_BASED)
-                        bestdiv--;
                *best_parent_rate = __clk_round_rate(__clk_get_parent(hw->clk), 1);
        }
@@ -115,24 +203,22 @@ static int clk_divider_set_rate(struct clk_hw *hw, unsigned long rate,
                                unsigned long parent_rate)
 {
        struct clk_divider *divider = to_clk_divider(hw);
-        unsigned int div;
+        unsigned int div, value;
        unsigned long flags = 0;
        u32 val;
        div = parent_rate / rate;
+        value = _get_val(divider, div);
-        if (!(divider->flags & CLK_DIVIDER_ONE_BASED))
+        if (value > div_mask(divider))
-                div--;
+                value = div_mask(divider);
-        if (div > div_mask(divider))
-                div = div_mask(divider);
        if (divider->lock)
                spin_lock_irqsave(divider->lock, flags);
        val = readl(divider->reg);
        val &= ~(div_mask(divider) << divider->shift);
-        val |= div << divider->shift;
+        val |= value << divider->shift;
        writel(val, divider->reg);
        if (divider->lock)
@@ -148,22 +234,11 @@ const struct clk_ops clk_divider_ops = {
 };
 EXPORT_SYMBOL_GPL(clk_divider_ops);
-/**
+static struct clk *_register_divider(struct device *dev, const char *name,
- * clk_register_divider - register a divider clock with the clock framework
- * @dev: device registering this clock
- * @name: name of this clock
- * @parent_name: name of clock's parent
- * @flags: framework-specific flags
- * @reg: register address to adjust divider
- * @shift: number of bits to shift the bitfield
- * @width: width of the bitfield
- * @clk_divider_flags: divider-specific flags for this clock
- * @lock: shared register lock for this clock
- */
-struct clk *clk_register_divider(struct device *dev, const char *name,
                const char *parent_name, unsigned long flags,
                void __iomem *reg, u8 shift, u8 width,
-                u8 clk_divider_flags, spinlock_t *lock)
+                u8 clk_divider_flags, const struct clk_div_table *table,
+                spinlock_t *lock)
 {
        struct clk_divider *div;
        struct clk *clk;
@@ -178,7 +253,7 @@ struct clk *clk_register_divider(struct device *dev, const char *name,
        init.name = name;
        init.ops = &clk_divider_ops;
-        init.flags = flags;
+        init.flags = flags | CLK_IS_BASIC;
        init.parent_names = (parent_name ? &parent_name: NULL);
        init.num_parents = (parent_name ? 1 : 0);
@@ -189,6 +264,7 @@ struct clk *clk_register_divider(struct device *dev, const char *name,
        div->flags = clk_divider_flags;
        div->lock = lock;
        div->hw.init = &init;
+        div->table = table;
        /* register the clock */
        clk = clk_register(dev, &div->hw);
@@ -198,3 +274,48 @@ struct clk *clk_register_divider(struct device *dev, const char *name,
        return clk;
 }
+/**
+ * clk_register_divider - register a divider clock with the clock framework
+ * @dev: device registering this clock
+ * @name: name of this clock
+ * @parent_name: name of clock's parent
+ * @flags: framework-specific flags
+ * @reg: register address to adjust divider
+ * @shift: number of bits to shift the bitfield
+ * @width: width of the bitfield
+ * @clk_divider_flags: divider-specific flags for this clock
+ * @lock: shared register lock for this clock
+ */
+struct clk *clk_register_divider(struct device *dev, const char *name,
+                const char *parent_name, unsigned long flags,
+                void __iomem *reg, u8 shift, u8 width,
+                u8 clk_divider_flags, spinlock_t *lock)
+{
+        return _register_divider(dev, name, parent_name, flags, reg, shift,
+                        width, clk_divider_flags, NULL, lock);
+}
+/**
+ * clk_register_divider_table - register a table based divider clock with
+ * the clock framework
+ * @dev: device registering this clock
+ * @name: name of this clock
+ * @parent_name: name of clock's parent
+ * @flags: framework-specific flags
+ * @reg: register address to adjust divider
+ * @shift: number of bits to shift the bitfield
+ * @width: width of the bitfield
+ * @clk_divider_flags: divider-specific flags for this clock
+ * @table: array of divider/value pairs ending with a div set to 0
+ * @lock: shared register lock for this clock
+ */
+struct clk *clk_register_divider_table(struct device *dev, const char *name,
+                const char *parent_name, unsigned long flags,
+                void __iomem *reg, u8 shift, u8 width,
+                u8 clk_divider_flags, const struct clk_div_table *table,
+                spinlock_t *lock)
+{
+        return _register_divider(dev, name, parent_name, flags, reg, shift,
+                        width, clk_divider_flags, table, lock);
+}
diff --git a/drivers/clk/clk-fixed-factor.c b/drivers/clk/clk-fixed-factor.c
index c8c003e217ad..a4899855c0f6 100644
--- a/drivers/clk/clk-fixed-factor.c
+++ b/drivers/clk/clk-fixed-factor.c
@@ -82,7 +82,7 @@ struct clk *clk_register_fixed_factor(struct device *dev, const char *name,
        init.name = name;
        init.ops = &clk_fixed_factor_ops;
-        init.flags = flags;
+        init.flags = flags | CLK_IS_BASIC;
        init.parent_names = &parent_name;
        init.num_parents = 1;
diff --git a/drivers/clk/clk-fixed-rate.c b/drivers/clk/clk-fixed-rate.c
index cbd246229786..f5ec0eebd4d7 100644
--- a/drivers/clk/clk-fixed-rate.c
+++ b/drivers/clk/clk-fixed-rate.c
@@ -14,6 +14,7 @@
 #include <linux/slab.h>
 #include <linux/io.h>
 #include <linux/err.h>
+#include <linux/of.h>
 /*
 * DOC: basic fixed-rate clock that cannot gate
@@ -63,7 +64,7 @@ struct clk *clk_register_fixed_rate(struct device *dev, const char *name,
        init.name = name;
        init.ops = &clk_fixed_rate_ops;
-        init.flags = flags;
+        init.flags = flags | CLK_IS_BASIC;
        init.parent_names = (parent_name ? &parent_name: NULL);
        init.num_parents = (parent_name ? 1 : 0);
@@ -79,3 +80,25 @@ struct clk *clk_register_fixed_rate(struct device *dev, const char *name,
        return clk;
 }
+#ifdef CONFIG_OF
+/**
+ * of_fixed_clk_setup() - Setup function for simple fixed rate clock
+ */
+void __init of_fixed_clk_setup(struct device_node *node)
+{
+        struct clk *clk;
+        const char *clk_name = node->name;
+        u32 rate;
+        if (of_property_read_u32(node, "clock-frequency", &rate))
+                return;
+        of_property_read_string(node, "clock-output-names", &clk_name);
+        clk = clk_register_fixed_rate(NULL, clk_name, NULL, CLK_IS_ROOT, rate);
+        if (clk)
+                of_clk_add_provider(node, of_clk_src_simple_get, clk);
+}
+EXPORT_SYMBOL_GPL(of_fixed_clk_setup);
+#endif
diff --git a/drivers/clk/clk-gate.c b/drivers/clk/clk-gate.c
index 578465e04be6..15114febfd92 100644
--- a/drivers/clk/clk-gate.c
+++ b/drivers/clk/clk-gate.c
@@ -130,7 +130,7 @@ struct clk *clk_register_gate(struct device *dev, const char *name,
        init.name = name;
        init.ops = &clk_gate_ops;
-        init.flags = flags;
+        init.flags = flags | CLK_IS_BASIC;
        init.parent_names = (parent_name ? &parent_name: NULL);
        init.num_parents = (parent_name ? 1 : 0);
diff --git a/drivers/clk/clk-highbank.c b/drivers/clk/clk-highbank.c
new file mode 100644
index 000000000000..52fecadf004a
--- /dev/null
+++ b/drivers/clk/clk-highbank.c
@@ -0,0 +1,346 @@
+/*
+ * Copyright 2011-2012 Calxeda, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+#include <linux/kernel.h>
+#include <linux/slab.h>
+#include <linux/err.h>
+#include <linux/clk-provider.h>
+#include <linux/io.h>
+#include <linux/of.h>
+extern void __iomem *sregs_base;
+#define HB_PLL_LOCK_500         0x20000000
+#define HB_PLL_LOCK             0x10000000
+#define HB_PLL_DIVF_SHIFT       20
+#define HB_PLL_DIVF_MASK        0x0ff00000
+#define HB_PLL_DIVQ_SHIFT       16
+#define HB_PLL_DIVQ_MASK        0x00070000
+#define HB_PLL_DIVR_SHIFT       8
+#define HB_PLL_DIVR_MASK        0x00001f00
+#define HB_PLL_RANGE_SHIFT      4
+#define HB_PLL_RANGE_MASK       0x00000070
+#define HB_PLL_BYPASS           0x00000008
+#define HB_PLL_RESET            0x00000004
+#define HB_PLL_EXT_BYPASS       0x00000002
+#define HB_PLL_EXT_ENA          0x00000001
+#define HB_PLL_VCO_MIN_FREQ     2133000000
+#define HB_PLL_MAX_FREQ         HB_PLL_VCO_MIN_FREQ
+#define HB_PLL_MIN_FREQ         (HB_PLL_VCO_MIN_FREQ / 64)
+#define HB_A9_BCLK_DIV_MASK     0x00000006
+#define HB_A9_BCLK_DIV_SHIFT    1
+#define HB_A9_PCLK_DIV          0x00000001
+struct hb_clk {
+        struct clk_hw   hw;
+        void __iomem    *reg;
+        char *parent_name;
+};
+#define to_hb_clk(p) container_of(p, struct hb_clk, hw)
+static int clk_pll_prepare(struct clk_hw *hwclk)
+        {
+        struct hb_clk *hbclk = to_hb_clk(hwclk);
+        u32 reg;
+        reg = readl(hbclk->reg);
+        reg &= ~HB_PLL_RESET;
+        writel(reg, hbclk->reg);
+        while ((readl(hbclk->reg) & HB_PLL_LOCK) == 0)
+                ;
+        while ((readl(hbclk->reg) & HB_PLL_LOCK_500) == 0)
+                ;
+        return 0;
+}
+static void clk_pll_unprepare(struct clk_hw *hwclk)
+{
+        struct hb_clk *hbclk = to_hb_clk(hwclk);
+        u32 reg;
+        reg = readl(hbclk->reg);
+        reg |= HB_PLL_RESET;
+        writel(reg, hbclk->reg);
+}
+static int clk_pll_enable(struct clk_hw *hwclk)
+{
+        struct hb_clk *hbclk = to_hb_clk(hwclk);
+        u32 reg;
+        reg = readl(hbclk->reg);
+        reg |= HB_PLL_EXT_ENA;
+        writel(reg, hbclk->reg);
+        return 0;
+}
+static void clk_pll_disable(struct clk_hw *hwclk)
+{
+        struct hb_clk *hbclk = to_hb_clk(hwclk);
+        u32 reg;
+        reg = readl(hbclk->reg);
+        reg &= ~HB_PLL_EXT_ENA;
+        writel(reg, hbclk->reg);
+}
+static unsigned long clk_pll_recalc_rate(struct clk_hw *hwclk,
+                                         unsigned long parent_rate)
+{
+        struct hb_clk *hbclk = to_hb_clk(hwclk);
+        unsigned long divf, divq, vco_freq, reg;
+        reg = readl(hbclk->reg);
+        if (reg & HB_PLL_EXT_BYPASS)
+                return parent_rate;
+        divf = (reg & HB_PLL_DIVF_MASK) >> HB_PLL_DIVF_SHIFT;
+        divq = (reg & HB_PLL_DIVQ_MASK) >> HB_PLL_DIVQ_SHIFT;
+        vco_freq = parent_rate * (divf + 1);
+        return vco_freq / (1 << divq);
+}
+static void clk_pll_calc(unsigned long rate, unsigned long ref_freq,
+                        u32 *pdivq, u32 *pdivf)
+{
+        u32 divq, divf;
+        unsigned long vco_freq;
+        if (rate < HB_PLL_MIN_FREQ)
+                rate = HB_PLL_MIN_FREQ;
+        if (rate > HB_PLL_MAX_FREQ)
+                rate = HB_PLL_MAX_FREQ;
+        for (divq = 1; divq <= 6; divq++) {
+                if ((rate * (1 << divq)) >= HB_PLL_VCO_MIN_FREQ)
+                        break;
+        }
+        vco_freq = rate * (1 << divq);
+        divf = (vco_freq + (ref_freq / 2)) / ref_freq;
+        divf--;
+        *pdivq = divq;
+        *pdivf = divf;
+}
+static long clk_pll_round_rate(struct clk_hw *hwclk, unsigned long rate,
+                               unsigned long *parent_rate)
+{
+        u32 divq, divf;
+        unsigned long ref_freq = *parent_rate;
+        clk_pll_calc(rate, ref_freq, &divq, &divf);
+        return (ref_freq * (divf + 1)) / (1 << divq);
+}
+static int clk_pll_set_rate(struct clk_hw *hwclk, unsigned long rate,
+                            unsigned long parent_rate)
+{
+        struct hb_clk *hbclk = to_hb_clk(hwclk);
+        u32 divq, divf;
+        u32 reg;
+        clk_pll_calc(rate, parent_rate, &divq, &divf);
+        reg = readl(hbclk->reg);
+        if (divf != ((reg & HB_PLL_DIVF_MASK) >> HB_PLL_DIVF_SHIFT)) {
+                /* Need to re-lock PLL, so put it into bypass mode */
+                reg |= HB_PLL_EXT_BYPASS;
+                writel(reg | HB_PLL_EXT_BYPASS, hbclk->reg);
+                writel(reg | HB_PLL_RESET, hbclk->reg);
+                reg &= ~(HB_PLL_DIVF_MASK | HB_PLL_DIVQ_MASK);
+                reg |= (divf << HB_PLL_DIVF_SHIFT) | (divq << HB_PLL_DIVQ_SHIFT);
+                writel(reg | HB_PLL_RESET, hbclk->reg);
+                writel(reg, hbclk->reg);
+                while ((readl(hbclk->reg) & HB_PLL_LOCK) == 0)
+                        ;
+                while ((readl(hbclk->reg) & HB_PLL_LOCK_500) == 0)
+                        ;
+                reg |= HB_PLL_EXT_ENA;
+                reg &= ~HB_PLL_EXT_BYPASS;
+        } else {
+                reg &= ~HB_PLL_DIVQ_MASK;
+                reg |= divq << HB_PLL_DIVQ_SHIFT;
+        }
+        writel(reg, hbclk->reg);
+        return 0;
+}
+static const struct clk_ops clk_pll_ops = {
+        .prepare = clk_pll_prepare,
+        .unprepare = clk_pll_unprepare,
+        .enable = clk_pll_enable,
+        .disable = clk_pll_disable,
+        .recalc_rate = clk_pll_recalc_rate,
+        .round_rate = clk_pll_round_rate,
+        .set_rate = clk_pll_set_rate,
+};
+static unsigned long clk_cpu_periphclk_recalc_rate(struct clk_hw *hwclk,
+                                                   unsigned long parent_rate)
+{
+        struct hb_clk *hbclk = to_hb_clk(hwclk);
+        u32 div = (readl(hbclk->reg) & HB_A9_PCLK_DIV) ? 8 : 4;
+        return parent_rate / div;
+}
+static const struct clk_ops a9periphclk_ops = {
+        .recalc_rate = clk_cpu_periphclk_recalc_rate,
+};
+static unsigned long clk_cpu_a9bclk_recalc_rate(struct clk_hw *hwclk,
+                                                unsigned long parent_rate)
+{
+        struct hb_clk *hbclk = to_hb_clk(hwclk);
+        u32 div = (readl(hbclk->reg) & HB_A9_BCLK_DIV_MASK) >> HB_A9_BCLK_DIV_SHIFT;
+        return parent_rate / (div + 2);
+}
+static const struct clk_ops a9bclk_ops = {
+        .recalc_rate = clk_cpu_a9bclk_recalc_rate,
+};
+static unsigned long clk_periclk_recalc_rate(struct clk_hw *hwclk,
+                                             unsigned long parent_rate)
+{
+        struct hb_clk *hbclk = to_hb_clk(hwclk);
+        u32 div;
+        div = readl(hbclk->reg) & 0x1f;
+        div++;
+        div *= 2;
+        return parent_rate / div;
+}
+static long clk_periclk_round_rate(struct clk_hw *hwclk, unsigned long rate,
+                                   unsigned long *parent_rate)
+{
+        u32 div;
+        div = *parent_rate / rate;
+        div++;
+        div &= ~0x1;
+        return *parent_rate / div;
+}
+static int clk_periclk_set_rate(struct clk_hw *hwclk, unsigned long rate,
+                                unsigned long parent_rate)
+{
+        struct hb_clk *hbclk = to_hb_clk(hwclk);
+        u32 div;
+        div = parent_rate / rate;
+        if (div & 0x1)
+                return -EINVAL;
+        writel(div >> 1, hbclk->reg);
+        return 0;
+}
+static const struct clk_ops periclk_ops = {
+        .recalc_rate = clk_periclk_recalc_rate,
+        .round_rate = clk_periclk_round_rate,
+        .set_rate = clk_periclk_set_rate,
+};
+static __init struct clk *hb_clk_init(struct device_node *node, const struct clk_ops *ops)
+{
+        u32 reg;
+        struct clk *clk;
+        struct hb_clk *hb_clk;
+        const char *clk_name = node->name;
+        const char *parent_name;
+        struct clk_init_data init;
+        int rc;
+        rc = of_property_read_u32(node, "reg", &reg);
+        if (WARN_ON(rc))
+                return NULL;
+        hb_clk = kzalloc(sizeof(*hb_clk), GFP_KERNEL);
+        if (WARN_ON(!hb_clk))
+                return NULL;
+        hb_clk->reg = sregs_base + reg;
+        of_property_read_string(node, "clock-output-names", &clk_name);
+        init.name = clk_name;
+        init.ops = ops;
+        init.flags = 0;
+        parent_name = of_clk_get_parent_name(node, 0);
+        init.parent_names = &parent_name;
+        init.num_parents = 1;
+        hb_clk->hw.init = &init;
+        clk = clk_register(NULL, &hb_clk->hw);
+        if (WARN_ON(IS_ERR(clk))) {
+                kfree(hb_clk);
+                return NULL;
+        }
+        rc = of_clk_add_provider(node, of_clk_src_simple_get, clk);
+        return clk;
+}
+static void __init hb_pll_init(struct device_node *node)
+{
+        hb_clk_init(node, &clk_pll_ops);
+}
+static void __init hb_a9periph_init(struct device_node *node)
+{
+        hb_clk_init(node, &a9periphclk_ops);
+}
+static void __init hb_a9bus_init(struct device_node *node)
+{
+        struct clk *clk = hb_clk_init(node, &a9bclk_ops);
+        clk_prepare_enable(clk);
+}
+static void __init hb_emmc_init(struct device_node *node)
+{
+        hb_clk_init(node, &periclk_ops);
+}
+static const __initconst struct of_device_id clk_match[] = {
+        { .compatible = "fixed-clock", .data = of_fixed_clk_setup, },
+        { .compatible = "calxeda,hb-pll-clock", .data = hb_pll_init, },
+        { .compatible = "calxeda,hb-a9periph-clock", .data = hb_a9periph_init, },
+        { .compatible = "calxeda,hb-a9bus-clock", .data = hb_a9bus_init, },
+        { .compatible = "calxeda,hb-emmc-clock", .data = hb_emmc_init, },
+        {}
+};
+void __init highbank_clocks_init(void)
+{
+        of_clk_init(clk_match);
+}
diff --git a/drivers/clk/clk-mux.c b/drivers/clk/clk-mux.c
index fd36a8ea73d9..508c032edce4 100644
--- a/drivers/clk/clk-mux.c
+++ b/drivers/clk/clk-mux.c
@@ -106,7 +106,7 @@ struct clk *clk_register_mux(struct device *dev, const char *name,
        init.name = name;
        init.ops = &clk_mux_ops;
-        init.flags = flags;
+        init.flags = flags | CLK_IS_BASIC;
        init.parent_names = parent_names;
        init.num_parents = num_parents;
diff --git a/drivers/clk/clk-nomadik.c b/drivers/clk/clk-nomadik.c
new file mode 100644
index 000000000000..517a8ff7121e
--- /dev/null
+++ b/drivers/clk/clk-nomadik.c
@@ -0,0 +1,47 @@
+#include <linux/clk.h>
+#include <linux/clkdev.h>
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/clk-provider.h>
+/*
+ * The Nomadik clock tree is described in the STN8815A12 DB V4.2
+ * reference manual for the chip, page 94 ff.
+ */
+void __init nomadik_clk_init(void)
+{
+        struct clk *clk;
+        clk = clk_register_fixed_rate(NULL, "apb_pclk", NULL, CLK_IS_ROOT, 0);
+        clk_register_clkdev(clk, "apb_pclk", NULL);
+        clk_register_clkdev(clk, NULL, "gpio.0");
+        clk_register_clkdev(clk, NULL, "gpio.1");
+        clk_register_clkdev(clk, NULL, "gpio.2");
+        clk_register_clkdev(clk, NULL, "gpio.3");
+        clk_register_clkdev(clk, NULL, "rng");
+        /*
+         * The 2.4 MHz TIMCLK reference clock is active at boot time, this is
+         * actually the MXTALCLK @19.2 MHz divided by 8. This clock is used
+         * by the timers and watchdog. See page 105 ff.
+         */
+        clk = clk_register_fixed_rate(NULL, "TIMCLK", NULL, CLK_IS_ROOT,
+                                      2400000);
+        clk_register_clkdev(clk, NULL, "mtu0");
+        clk_register_clkdev(clk, NULL, "mtu1");
+        /*
+         * At boot time, PLL2 is set to generate a set of fixed clocks,
+         * one of them is CLK48, the 48 MHz clock, routed to the UART, MMC/SD
+         * I2C, IrDA, USB and SSP blocks.
+         */
+        clk = clk_register_fixed_rate(NULL, "CLK48", NULL, CLK_IS_ROOT,
+                                      48000000);
+        clk_register_clkdev(clk, NULL, "uart0");
+        clk_register_clkdev(clk, NULL, "uart1");
+        clk_register_clkdev(clk, NULL, "mmci");
+        clk_register_clkdev(clk, NULL, "ssp");
+        clk_register_clkdev(clk, NULL, "nmk-i2c.0");
+        clk_register_clkdev(clk, NULL, "nmk-i2c.1");
+}
diff --git a/drivers/clk/clk-u300.c b/drivers/clk/clk-u300.c
new file mode 100644
index 000000000000..a15f7928fb11
--- /dev/null
+++ b/drivers/clk/clk-u300.c
@@ -0,0 +1,746 @@
+/*
+ * U300 clock implementation
+ * Copyright (C) 2007-2012 ST-Ericsson AB
+ * License terms: GNU General Public License (GPL) version 2
+ * Author: Linus Walleij <linus.walleij@stericsson.com>
+ * Author: Jonas Aaberg <jonas.aberg@stericsson.com>
+ */
+#include <linux/clk.h>
+#include <linux/clkdev.h>
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/clk-provider.h>
+#include <linux/spinlock.h>
+#include <mach/syscon.h>
+/*
+ * The clocking hierarchy currently looks like this.
+ * NOTE: the idea is NOT to show how the clocks are routed on the chip!
+ * The ideas is to show dependencies, so a clock higher up in the
+ * hierarchy has to be on in order for another clock to be on. Now,
+ * both CPU and DMA can actually be on top of the hierarchy, and that
+ * is not modeled currently. Instead we have the backbone AMBA bus on
+ * top. This bus cannot be programmed in any way but conceptually it
+ * needs to be active for the bridges and devices to transport data.
+ *
+ * Please be aware that a few clocks are hw controlled, which mean that
+ * the hw itself can turn on/off or change the rate of the clock when
+ * needed!
+ *
+ *  AMBA bus
+ *  |
+ *  +- CPU
+ *  +- FSMC NANDIF NAND Flash interface
+ *  +- SEMI Shared Memory interface
+ *  +- ISP Image Signal Processor (U335 only)
+ *  +- CDS (U335 only)
+ *  +- DMA Direct Memory Access Controller
+ *  +- AAIF APP/ACC Inteface (Mobile Scalable Link, MSL)
+ *  +- APEX
+ *  +- VIDEO_ENC AVE2/3 Video Encoder
+ *  +- XGAM Graphics Accelerator Controller
+ *  +- AHB
+ *  |
+ *  +- ahb:0 AHB Bridge
+ *  |  |
+ *  |  +- ahb:1 INTCON Interrupt controller
+ *  |  +- ahb:3 MSPRO  Memory Stick Pro controller
+ *  |  +- ahb:4 EMIF   External Memory interface
+ *  |
+ *  +- fast:0 FAST bridge
+ *  |  |
+ *  |  +- fast:1 MMCSD MMC/SD card reader controller
+ *  |  +- fast:2 I2S0  PCM I2S channel 0 controller
+ *  |  +- fast:3 I2S1  PCM I2S channel 1 controller
+ *  |  +- fast:4 I2C0  I2C channel 0 controller
+ *  |  +- fast:5 I2C1  I2C channel 1 controller
+ *  |  +- fast:6 SPI   SPI controller
+ *  |  +- fast:7 UART1 Secondary UART (U335 only)
+ *  |
+ *  +- slow:0 SLOW bridge
+ *     |
+ *     +- slow:1 SYSCON (not possible to control)
+ *     +- slow:2 WDOG Watchdog
+ *     +- slow:3 UART0 primary UART
+ *     +- slow:4 TIMER_APP Application timer - used in Linux
+ *     +- slow:5 KEYPAD controller
+ *     +- slow:6 GPIO controller
+ *     +- slow:7 RTC controller
+ *     +- slow:8 BT Bus Tracer (not used currently)
+ *     +- slow:9 EH Event Handler (not used currently)
+ *     +- slow:a TIMER_ACC Access style timer (not used currently)
+ *     +- slow:b PPM (U335 only, what is that?)
+ */
+/* Global syscon virtual base */
+static void __iomem *syscon_vbase;
+/**
+ * struct clk_syscon - U300 syscon clock
+ * @hw: corresponding clock hardware entry
+ * @hw_ctrld: whether this clock is hardware controlled (for refcount etc)
+ *      and does not need any magic pokes to be enabled/disabled
+ * @reset: state holder, whether this block's reset line is asserted or not
+ * @res_reg: reset line enable/disable flag register
+ * @res_bit: bit for resetting or taking this consumer out of reset
+ * @en_reg: clock line enable/disable flag register
+ * @en_bit: bit for enabling/disabling this consumer clock line
+ * @clk_val: magic value to poke in the register to enable/disable
+ *      this one clock
+ */
+struct clk_syscon {
+        struct clk_hw hw;
+        bool hw_ctrld;
+        bool reset;
+        void __iomem *res_reg;
+        u8 res_bit;
+        void __iomem *en_reg;
+        u8 en_bit;
+        u16 clk_val;
+};
+#define to_syscon(_hw) container_of(_hw, struct clk_syscon, hw)
+static DEFINE_SPINLOCK(syscon_resetreg_lock);
+/*
+ * Reset control functions. We remember if a block has been
+ * taken out of reset and don't remove the reset assertion again
+ * and vice versa. Currently we only remove resets so the
+ * enablement function is defined out.
+ */
+static void syscon_block_reset_enable(struct clk_syscon *sclk)
+{
+        unsigned long iflags;
+        u16 val;
+        /* Not all blocks support resetting */
+        if (!sclk->res_reg)
+                return;
+        spin_lock_irqsave(&syscon_resetreg_lock, iflags);
+        val = readw(sclk->res_reg);
+        val |= BIT(sclk->res_bit);
+        writew(val, sclk->res_reg);
+        spin_unlock_irqrestore(&syscon_resetreg_lock, iflags);
+        sclk->reset = true;
+}
+static void syscon_block_reset_disable(struct clk_syscon *sclk)
+{
+        unsigned long iflags;
+        u16 val;
+        /* Not all blocks support resetting */
+        if (!sclk->res_reg)
+                return;
+        spin_lock_irqsave(&syscon_resetreg_lock, iflags);
+        val = readw(sclk->res_reg);
+        val &= ~BIT(sclk->res_bit);
+        writew(val, sclk->res_reg);
+        spin_unlock_irqrestore(&syscon_resetreg_lock, iflags);
+        sclk->reset = false;
+}
+static int syscon_clk_prepare(struct clk_hw *hw)
+{
+        struct clk_syscon *sclk = to_syscon(hw);
+        /* If the block is in reset, bring it out */
+        if (sclk->reset)
+                syscon_block_reset_disable(sclk);
+        return 0;
+}
+static void syscon_clk_unprepare(struct clk_hw *hw)
+{
+        struct clk_syscon *sclk = to_syscon(hw);
+        /* Please don't force the console into reset */
+        if (sclk->clk_val == U300_SYSCON_SBCER_UART_CLK_EN)
+                return;
+        /* When unpreparing, force block into reset */
+        if (!sclk->reset)
+                syscon_block_reset_enable(sclk);
+}
+static int syscon_clk_enable(struct clk_hw *hw)
+{
+        struct clk_syscon *sclk = to_syscon(hw);
+        /* Don't touch the hardware controlled clocks */
+        if (sclk->hw_ctrld)
+                return 0;
+        /* These cannot be controlled */
+        if (sclk->clk_val == 0xFFFFU)
+                return 0;
+        writew(sclk->clk_val, syscon_vbase + U300_SYSCON_SBCER);
+        return 0;
+}
+static void syscon_clk_disable(struct clk_hw *hw)
+{
+        struct clk_syscon *sclk = to_syscon(hw);
+        /* Don't touch the hardware controlled clocks */
+        if (sclk->hw_ctrld)
+                return;
+        if (sclk->clk_val == 0xFFFFU)
+                return;
+        /* Please don't disable the console port */
+        if (sclk->clk_val == U300_SYSCON_SBCER_UART_CLK_EN)
+                return;
+        writew(sclk->clk_val, syscon_vbase + U300_SYSCON_SBCDR);
+}
+static int syscon_clk_is_enabled(struct clk_hw *hw)
+{
+        struct clk_syscon *sclk = to_syscon(hw);
+        u16 val;
+        /* If no enable register defined, it's always-on */
+        if (!sclk->en_reg)
+                return 1;
+        val = readw(sclk->en_reg);
+        val &= BIT(sclk->en_bit);
+        return val ? 1 : 0;
+}
+static u16 syscon_get_perf(void)
+{
+        u16 val;
+        val = readw(syscon_vbase + U300_SYSCON_CCR);
+        val &= U300_SYSCON_CCR_CLKING_PERFORMANCE_MASK;
+        return val;
+}
+static unsigned long
+syscon_clk_recalc_rate(struct clk_hw *hw,
+                       unsigned long parent_rate)
+{
+        struct clk_syscon *sclk = to_syscon(hw);
+        u16 perf = syscon_get_perf();
+        switch(sclk->clk_val) {
+        case U300_SYSCON_SBCER_FAST_BRIDGE_CLK_EN:
+        case U300_SYSCON_SBCER_I2C0_CLK_EN:
+        case U300_SYSCON_SBCER_I2C1_CLK_EN:
+        case U300_SYSCON_SBCER_MMC_CLK_EN:
+        case U300_SYSCON_SBCER_SPI_CLK_EN:
+                /* The FAST clocks have one progression */
+                switch(perf) {
+                case U300_SYSCON_CCR_CLKING_PERFORMANCE_LOW_POWER:
+                case U300_SYSCON_CCR_CLKING_PERFORMANCE_LOW:
+                        return 13000000;
+                default:
+                        return parent_rate; /* 26 MHz */
+                }
+        case U300_SYSCON_SBCER_DMAC_CLK_EN:
+        case U300_SYSCON_SBCER_NANDIF_CLK_EN:
+        case U300_SYSCON_SBCER_XGAM_CLK_EN:
+                /* AMBA interconnect peripherals */
+                switch(perf) {
+                case U300_SYSCON_CCR_CLKING_PERFORMANCE_LOW_POWER:
+                case U300_SYSCON_CCR_CLKING_PERFORMANCE_LOW:
+                        return 6500000;
+                case U300_SYSCON_CCR_CLKING_PERFORMANCE_INTERMEDIATE:
+                        return 26000000;
+                default:
+                        return parent_rate; /* 52 MHz */
+                }
+        case U300_SYSCON_SBCER_SEMI_CLK_EN:
+        case U300_SYSCON_SBCER_EMIF_CLK_EN:
+                /* EMIF speeds */
+                switch(perf) {
+                case U300_SYSCON_CCR_CLKING_PERFORMANCE_LOW_POWER:
+                case U300_SYSCON_CCR_CLKING_PERFORMANCE_LOW:
+                        return 13000000;
+                case U300_SYSCON_CCR_CLKING_PERFORMANCE_INTERMEDIATE:
+                        return 52000000;
+                default:
+                        return 104000000;
+                }
+        case U300_SYSCON_SBCER_CPU_CLK_EN:
+                /* And the fast CPU clock */
+                switch(perf) {
+                case U300_SYSCON_CCR_CLKING_PERFORMANCE_LOW_POWER:
+                case U300_SYSCON_CCR_CLKING_PERFORMANCE_LOW:
+                        return 13000000;
+                case U300_SYSCON_CCR_CLKING_PERFORMANCE_INTERMEDIATE:
+                        return 52000000;
+                case U300_SYSCON_CCR_CLKING_PERFORMANCE_HIGH:
+                        return 104000000;
+                default:
+                        return parent_rate; /* 208 MHz */
+                }
+        default:
+                /*
+                 * The SLOW clocks and default just inherit the rate of
+                 * their parent (typically PLL13 13 MHz).
+                 */
+                return parent_rate;
+        }
+}
+static long
+syscon_clk_round_rate(struct clk_hw *hw, unsigned long rate,
+                      unsigned long *prate)
+{
+        struct clk_syscon *sclk = to_syscon(hw);
+        if (sclk->clk_val != U300_SYSCON_SBCER_CPU_CLK_EN)
+                return *prate;
+        /* We really only support setting the rate of the CPU clock */
+        if (rate <= 13000000)
+                return 13000000;
+        if (rate <= 52000000)
+                return 52000000;
+        if (rate <= 104000000)
+                return 104000000;
+        return 208000000;
+}
+static int syscon_clk_set_rate(struct clk_hw *hw, unsigned long rate,
+                               unsigned long parent_rate)
+{
+        struct clk_syscon *sclk = to_syscon(hw);
+        u16 val;
+        /* We only support setting the rate of the CPU clock */
+        if (sclk->clk_val != U300_SYSCON_SBCER_CPU_CLK_EN)
+                return -EINVAL;
+        switch (rate) {
+        case 13000000:
+                val = U300_SYSCON_CCR_CLKING_PERFORMANCE_LOW_POWER;
+                break;
+        case 52000000:
+                val = U300_SYSCON_CCR_CLKING_PERFORMANCE_INTERMEDIATE;
+                break;
+        case 104000000:
+                val = U300_SYSCON_CCR_CLKING_PERFORMANCE_HIGH;
+                break;
+        case 208000000:
+                val = U300_SYSCON_CCR_CLKING_PERFORMANCE_BEST;
+                break;
+        default:
+                return -EINVAL;
+        }
+        val |= readw(syscon_vbase + U300_SYSCON_CCR) &
+                ~U300_SYSCON_CCR_CLKING_PERFORMANCE_MASK ;
+        writew(val, syscon_vbase + U300_SYSCON_CCR);
+        return 0;
+}
+static const struct clk_ops syscon_clk_ops = {
+        .prepare = syscon_clk_prepare,
+        .unprepare = syscon_clk_unprepare,
+        .enable = syscon_clk_enable,
+        .disable = syscon_clk_disable,
+        .is_enabled = syscon_clk_is_enabled,
+        .recalc_rate = syscon_clk_recalc_rate,
+        .round_rate = syscon_clk_round_rate,
+        .set_rate = syscon_clk_set_rate,
+};
+static struct clk * __init
+syscon_clk_register(struct device *dev, const char *name,
+                    const char *parent_name, unsigned long flags,
+                    bool hw_ctrld,
+                    void __iomem *res_reg, u8 res_bit,
+                    void __iomem *en_reg, u8 en_bit,
+                    u16 clk_val)
+{
+        struct clk *clk;
+        struct clk_syscon *sclk;
+        struct clk_init_data init;
+        sclk = kzalloc(sizeof(struct clk_syscon), GFP_KERNEL);
+        if (!sclk) {
+                pr_err("could not allocate syscon clock %s\n",
+                        name);
+                return ERR_PTR(-ENOMEM);
+        }
+        init.name = name;
+        init.ops = &syscon_clk_ops;
+        init.flags = flags;
+        init.parent_names = (parent_name ? &parent_name : NULL);
+        init.num_parents = (parent_name ? 1 : 0);
+        sclk->hw.init = &init;
+        sclk->hw_ctrld = hw_ctrld;
+        /* Assume the block is in reset at registration */
+        sclk->reset = true;
+        sclk->res_reg = res_reg;
+        sclk->res_bit = res_bit;
+        sclk->en_reg = en_reg;
+        sclk->en_bit = en_bit;
+        sclk->clk_val = clk_val;
+        clk = clk_register(dev, &sclk->hw);
+        if (IS_ERR(clk))
+                kfree(sclk);
+        return clk;
+}
+/**
+ * struct clk_mclk - U300 MCLK clock (MMC/SD clock)
+ * @hw: corresponding clock hardware entry
+ * @is_mspro: if this is the memory stick clock rather than MMC/SD
+ */
+struct clk_mclk {
+        struct clk_hw hw;
+        bool is_mspro;
+};
+#define to_mclk(_hw) container_of(_hw, struct clk_mclk, hw)
+static int mclk_clk_prepare(struct clk_hw *hw)
+{
+        struct clk_mclk *mclk = to_mclk(hw);
+        u16 val;
+        /* The MMC and MSPRO clocks need some special set-up */
+        if (!mclk->is_mspro) {
+                /* Set default MMC clock divisor to 18.9 MHz */
+                writew(0x0054U, syscon_vbase + U300_SYSCON_MMF0R);
+                val = readw(syscon_vbase + U300_SYSCON_MMCR);
+                /* Disable the MMC feedback clock */
+                val &= ~U300_SYSCON_MMCR_MMC_FB_CLK_SEL_ENABLE;
+                /* Disable MSPRO frequency */
+                val &= ~U300_SYSCON_MMCR_MSPRO_FREQSEL_ENABLE;
+                writew(val, syscon_vbase + U300_SYSCON_MMCR);
+        } else {
+                val = readw(syscon_vbase + U300_SYSCON_MMCR);
+                /* Disable the MMC feedback clock */
+                val &= ~U300_SYSCON_MMCR_MMC_FB_CLK_SEL_ENABLE;
+                /* Enable MSPRO frequency */
+                val |= U300_SYSCON_MMCR_MSPRO_FREQSEL_ENABLE;
+                writew(val, syscon_vbase + U300_SYSCON_MMCR);
+        }
+        return 0;
+}
+static unsigned long
+mclk_clk_recalc_rate(struct clk_hw *hw,
+                     unsigned long parent_rate)
+{
+        u16 perf = syscon_get_perf();
+        switch (perf) {
+        case U300_SYSCON_CCR_CLKING_PERFORMANCE_LOW_POWER:
+                /*
+                 * Here, the 208 MHz PLL gets shut down and the always
+                 * on 13 MHz PLL used for RTC etc kicks into use
+                 * instead.
+                 */
+                return 13000000;
+        case U300_SYSCON_CCR_CLKING_PERFORMANCE_LOW:
+        case U300_SYSCON_CCR_CLKING_PERFORMANCE_INTERMEDIATE:
+        case U300_SYSCON_CCR_CLKING_PERFORMANCE_HIGH:
+        case U300_SYSCON_CCR_CLKING_PERFORMANCE_BEST:
+        {
+                /*
+                 * This clock is under program control. The register is
+                 * divided in two nybbles, bit 7-4 gives cycles-1 to count
+                 * high, bit 3-0 gives cycles-1 to count low. Distribute
+                 * these with no more than 1 cycle difference between
+                 * low and high and add low and high to get the actual
+                 * divisor. The base PLL is 208 MHz. Writing 0x00 will
+                 * divide by 1 and 1 so the highest frequency possible
+                 * is 104 MHz.
+                 *
+                 * e.g. 0x54 =>
+                 * f = 208 / ((5+1) + (4+1)) = 208 / 11 = 18.9 MHz
+                 */
+                u16 val = readw(syscon_vbase + U300_SYSCON_MMF0R) &
+                        U300_SYSCON_MMF0R_MASK;
+                switch (val) {
+                case 0x0054:
+                        return 18900000;
+                case 0x0044:
+                        return 20800000;
+                case 0x0043:
+                        return 23100000;
+                case 0x0033:
+                        return 26000000;
+                case 0x0032:
+                        return 29700000;
+                case 0x0022:
+                        return 34700000;
+                case 0x0021:
+                        return 41600000;
+                case 0x0011:
+                        return 52000000;
+                case 0x0000:
+                        return 104000000;
+                default:
+                        break;
+                }
+        }
+        default:
+                break;
+        }
+        return parent_rate;
+}
+static long
+mclk_clk_round_rate(struct clk_hw *hw, unsigned long rate,
+                    unsigned long *prate)
+{
+        if (rate <= 18900000)
+                return 18900000;
+        if (rate <= 20800000)
+                return 20800000;
+        if (rate <= 23100000)
+                return 23100000;
+        if (rate <= 26000000)
+                return 26000000;
+        if (rate <= 29700000)
+                return 29700000;
+        if (rate <= 34700000)
+                return 34700000;
+        if (rate <= 41600000)
+                return 41600000;
+        /* Highest rate */
+        return 52000000;
+}
+static int mclk_clk_set_rate(struct clk_hw *hw, unsigned long rate,
+                             unsigned long parent_rate)
+{
+        u16 val;
+        u16 reg;
+        switch (rate) {
+        case 18900000:
+                val = 0x0054;
+                break;
+        case 20800000:
+                val = 0x0044;
+                break;
+        case 23100000:
+                val = 0x0043;
+                break;
+        case 26000000:
+                val = 0x0033;
+                break;
+        case 29700000:
+                val = 0x0032;
+                break;
+        case 34700000:
+                val = 0x0022;
+                break;
+        case 41600000:
+                val = 0x0021;
+                break;
+        case 52000000:
+                val = 0x0011;
+                break;
+        case 104000000:
+                val = 0x0000;
+                break;
+        default:
+                return -EINVAL;
+        }
+        reg = readw(syscon_vbase + U300_SYSCON_MMF0R) &
+                ~U300_SYSCON_MMF0R_MASK;
+        writew(reg | val, syscon_vbase + U300_SYSCON_MMF0R);
+        return 0;
+}
+static const struct clk_ops mclk_ops = {
+        .prepare = mclk_clk_prepare,
+        .recalc_rate = mclk_clk_recalc_rate,
+        .round_rate = mclk_clk_round_rate,
+        .set_rate = mclk_clk_set_rate,
+};
+static struct clk * __init
+mclk_clk_register(struct device *dev, const char *name,
+                  const char *parent_name, bool is_mspro)
+{
+        struct clk *clk;
+        struct clk_mclk *mclk;
+        struct clk_init_data init;
+        mclk = kzalloc(sizeof(struct clk_mclk), GFP_KERNEL);
+        if (!mclk) {
+                pr_err("could not allocate MMC/SD clock %s\n",
+                       name);
+                return ERR_PTR(-ENOMEM);
+        }
+        init.name = "mclk";
+        init.ops = &mclk_ops;
+        init.flags = 0;
+        init.parent_names = (parent_name ? &parent_name : NULL);
+        init.num_parents = (parent_name ? 1 : 0);
+        mclk->hw.init = &init;
+        mclk->is_mspro = is_mspro;
+        clk = clk_register(dev, &mclk->hw);
+        if (IS_ERR(clk))
+                kfree(mclk);
+        return clk;
+}
+void __init u300_clk_init(void __iomem *base)
+{
+        u16 val;
+        struct clk *clk;
+        syscon_vbase = base;
+        /* Set system to run at PLL208, max performance, a known state. */
+        val = readw(syscon_vbase + U300_SYSCON_CCR);
+        val &= ~U300_SYSCON_CCR_CLKING_PERFORMANCE_MASK;
+        writew(val, syscon_vbase + U300_SYSCON_CCR);
+        /* Wait for the PLL208 to lock if not locked in yet */
+        while (!(readw(syscon_vbase + U300_SYSCON_CSR) &
+                 U300_SYSCON_CSR_PLL208_LOCK_IND));
+        /* Power management enable */
+        val = readw(syscon_vbase + U300_SYSCON_PMCR);
+        val |= U300_SYSCON_PMCR_PWR_MGNT_ENABLE;
+        writew(val, syscon_vbase + U300_SYSCON_PMCR);
+        /* These are always available (RTC and PLL13) */
+        clk = clk_register_fixed_rate(NULL, "app_32_clk", NULL,
+                                      CLK_IS_ROOT, 32768);
+        /* The watchdog sits directly on the 32 kHz clock */
+        clk_register_clkdev(clk, NULL, "coh901327_wdog");
+        clk = clk_register_fixed_rate(NULL, "pll13", NULL,
+                                      CLK_IS_ROOT, 13000000);
+        /* These derive from PLL208 */
+        clk = clk_register_fixed_rate(NULL, "pll208", NULL,
+                                      CLK_IS_ROOT, 208000000);
+        clk = clk_register_fixed_factor(NULL, "app_208_clk", "pll208",
+                                        0, 1, 1);
+        clk = clk_register_fixed_factor(NULL, "app_104_clk", "pll208",
+                                        0, 1, 2);
+        clk = clk_register_fixed_factor(NULL, "app_52_clk", "pll208",
+                                        0, 1, 4);
+        /* The 52 MHz is divided down to 26 MHz */
+        clk = clk_register_fixed_factor(NULL, "app_26_clk", "app_52_clk",
+                                        0, 1, 2);
+        /* Directly on the AMBA interconnect */
+        clk = syscon_clk_register(NULL, "cpu_clk", "app_208_clk", 0, true,
+                                  syscon_vbase + U300_SYSCON_RRR, 3,
+                                  syscon_vbase + U300_SYSCON_CERR, 3,
+                                  U300_SYSCON_SBCER_CPU_CLK_EN);
+        clk = syscon_clk_register(NULL, "dmac_clk", "app_52_clk", 0, true,
+                                  syscon_vbase + U300_SYSCON_RRR, 4,
+                                  syscon_vbase + U300_SYSCON_CERR, 4,
+                                  U300_SYSCON_SBCER_DMAC_CLK_EN);
+        clk_register_clkdev(clk, NULL, "dma");
+        clk = syscon_clk_register(NULL, "fsmc_clk", "app_52_clk", 0, false,
+                                  syscon_vbase + U300_SYSCON_RRR, 6,
+                                  syscon_vbase + U300_SYSCON_CERR, 6,
+                                  U300_SYSCON_SBCER_NANDIF_CLK_EN);
+        clk_register_clkdev(clk, NULL, "fsmc-nand");
+        clk = syscon_clk_register(NULL, "xgam_clk", "app_52_clk", 0, true,
+                                  syscon_vbase + U300_SYSCON_RRR, 8,
+                                  syscon_vbase + U300_SYSCON_CERR, 8,
+                                  U300_SYSCON_SBCER_XGAM_CLK_EN);
+        clk_register_clkdev(clk, NULL, "xgam");
+        clk = syscon_clk_register(NULL, "semi_clk", "app_104_clk", 0, false,
+                                  syscon_vbase + U300_SYSCON_RRR, 9,
+                                  syscon_vbase + U300_SYSCON_CERR, 9,
+                                  U300_SYSCON_SBCER_SEMI_CLK_EN);
+        clk_register_clkdev(clk, NULL, "semi");
+        /* AHB bridge clocks */
+        clk = syscon_clk_register(NULL, "ahb_subsys_clk", "app_52_clk", 0, true,
+                                  syscon_vbase + U300_SYSCON_RRR, 10,
+                                  syscon_vbase + U300_SYSCON_CERR, 10,
+                                  U300_SYSCON_SBCER_AHB_SUBSYS_BRIDGE_CLK_EN);
+        clk = syscon_clk_register(NULL, "intcon_clk", "ahb_subsys_clk", 0, false,
+                                  syscon_vbase + U300_SYSCON_RRR, 12,
+                                  syscon_vbase + U300_SYSCON_CERR, 12,
+                                  /* Cannot be enabled, just taken out of reset */
+                                  0xFFFFU);
+        clk_register_clkdev(clk, NULL, "intcon");
+        clk = syscon_clk_register(NULL, "emif_clk", "ahb_subsys_clk", 0, false,
+                                  syscon_vbase + U300_SYSCON_RRR, 5,
+                                  syscon_vbase + U300_SYSCON_CERR, 5,
+                                  U300_SYSCON_SBCER_EMIF_CLK_EN);
+        clk_register_clkdev(clk, NULL, "pl172");
+        /* FAST bridge clocks */
+        clk = syscon_clk_register(NULL, "fast_clk", "app_26_clk", 0, true,
+                                  syscon_vbase + U300_SYSCON_RFR, 0,
+                                  syscon_vbase + U300_SYSCON_CEFR, 0,
+                                  U300_SYSCON_SBCER_FAST_BRIDGE_CLK_EN);
+        clk = syscon_clk_register(NULL, "i2c0_p_clk", "fast_clk", 0, false,
+                                  syscon_vbase + U300_SYSCON_RFR, 1,
+                                  syscon_vbase + U300_SYSCON_CEFR, 1,
+                                  U300_SYSCON_SBCER_I2C0_CLK_EN);
+        clk_register_clkdev(clk, NULL, "stu300.0");
+        clk = syscon_clk_register(NULL, "i2c1_p_clk", "fast_clk", 0, false,
+                                  syscon_vbase + U300_SYSCON_RFR, 2,
+                                  syscon_vbase + U300_SYSCON_CEFR, 2,
+                                  U300_SYSCON_SBCER_I2C1_CLK_EN);
+        clk_register_clkdev(clk, NULL, "stu300.1");
+        clk = syscon_clk_register(NULL, "mmc_p_clk", "fast_clk", 0, false,
+                                  syscon_vbase + U300_SYSCON_RFR, 5,
+                                  syscon_vbase + U300_SYSCON_CEFR, 5,
+                                  U300_SYSCON_SBCER_MMC_CLK_EN);
+        clk_register_clkdev(clk, "apb_pclk", "mmci");
+        clk = syscon_clk_register(NULL, "spi_p_clk", "fast_clk", 0, false,
+                                  syscon_vbase + U300_SYSCON_RFR, 6,
+                                  syscon_vbase + U300_SYSCON_CEFR, 6,
+                                  U300_SYSCON_SBCER_SPI_CLK_EN);
+        /* The SPI has no external clock for the outward bus, uses the pclk */
+        clk_register_clkdev(clk, NULL, "pl022");
+        clk_register_clkdev(clk, "apb_pclk", "pl022");
+        /* SLOW bridge clocks */
+        clk = syscon_clk_register(NULL, "slow_clk", "pll13", 0, true,
+                                  syscon_vbase + U300_SYSCON_RSR, 0,
+                                  syscon_vbase + U300_SYSCON_CESR, 0,
+                                  U300_SYSCON_SBCER_SLOW_BRIDGE_CLK_EN);
+        clk = syscon_clk_register(NULL, "uart0_clk", "slow_clk", 0, false,
+                                  syscon_vbase + U300_SYSCON_RSR, 1,
+                                  syscon_vbase + U300_SYSCON_CESR, 1,
+                                  U300_SYSCON_SBCER_UART_CLK_EN);
+        /* Same clock is used for APB and outward bus */
+        clk_register_clkdev(clk, NULL, "uart0");
+        clk_register_clkdev(clk, "apb_pclk", "uart0");
+        clk = syscon_clk_register(NULL, "gpio_clk", "slow_clk", 0, false,
+                                  syscon_vbase + U300_SYSCON_RSR, 4,
+                                  syscon_vbase + U300_SYSCON_CESR, 4,
+                                  U300_SYSCON_SBCER_GPIO_CLK_EN);
+        clk_register_clkdev(clk, NULL, "u300-gpio");
+        clk = syscon_clk_register(NULL, "keypad_clk", "slow_clk", 0, false,
+                                  syscon_vbase + U300_SYSCON_RSR, 5,
+                                  syscon_vbase + U300_SYSCON_CESR, 6,
+                                  U300_SYSCON_SBCER_KEYPAD_CLK_EN);
+        clk_register_clkdev(clk, NULL, "coh901461-keypad");
+        clk = syscon_clk_register(NULL, "rtc_clk", "slow_clk", 0, true,
+                                  syscon_vbase + U300_SYSCON_RSR, 6,
+                                  /* No clock enable register bit */
+                                  NULL, 0, 0xFFFFU);
+        clk_register_clkdev(clk, NULL, "rtc-coh901331");
+        clk = syscon_clk_register(NULL, "app_tmr_clk", "slow_clk", 0, false,
+                                  syscon_vbase + U300_SYSCON_RSR, 7,
+                                  syscon_vbase + U300_SYSCON_CESR, 7,
+                                  U300_SYSCON_SBCER_APP_TMR_CLK_EN);
+        clk_register_clkdev(clk, NULL, "apptimer");
+        clk = syscon_clk_register(NULL, "acc_tmr_clk", "slow_clk", 0, false,
+                                  syscon_vbase + U300_SYSCON_RSR, 8,
+                                  syscon_vbase + U300_SYSCON_CESR, 8,
+                                  U300_SYSCON_SBCER_ACC_TMR_CLK_EN);
+        clk_register_clkdev(clk, NULL, "timer");
+        /* Then this special MMC/SD clock */
+        clk = mclk_clk_register(NULL, "mmc_clk", "mmc_p_clk", false);
+        clk_register_clkdev(clk, NULL, "mmci");
+}
diff --git a/drivers/clk/clk-wm831x.c b/drivers/clk/clk-wm831x.c
new file mode 100644
index 000000000000..e7b7765e85f3
--- /dev/null
+++ b/drivers/clk/clk-wm831x.c
@@ -0,0 +1,428 @@
+/*
+ * WM831x clock control
+ *
+ * Copyright 2011-2 Wolfson Microelectronics PLC.
+ *
+ * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ *
+ */
+#include <linux/clk.h>
+#include <linux/clk-provider.h>
+#include <linux/delay.h>
+#include <linux/module.h>
+#include <linux/slab.h>
+#include <linux/platform_device.h>
+#include <linux/mfd/wm831x/core.h>
+struct wm831x_clk {
+        struct wm831x *wm831x;
+        struct clk_hw xtal_hw;
+        struct clk_hw fll_hw;
+        struct clk_hw clkout_hw;
+        struct clk *xtal;
+        struct clk *fll;
+        struct clk *clkout;
+        bool xtal_ena;
+};
+static int wm831x_xtal_is_enabled(struct clk_hw *hw)
+{
+        struct wm831x_clk *clkdata = container_of(hw, struct wm831x_clk,
+                                                  xtal_hw);
+        return clkdata->xtal_ena;
+}
+static unsigned long wm831x_xtal_recalc_rate(struct clk_hw *hw,
+                                             unsigned long parent_rate)
+{
+        struct wm831x_clk *clkdata = container_of(hw, struct wm831x_clk,
+                                                  xtal_hw);
+        if (clkdata->xtal_ena)
+                return 32768;
+        else
+                return 0;
+}
+static const struct clk_ops wm831x_xtal_ops = {
+        .is_enabled = wm831x_xtal_is_enabled,
+        .recalc_rate = wm831x_xtal_recalc_rate,
+};
+static struct clk_init_data wm831x_xtal_init = {
+        .name = "xtal",
+        .ops = &wm831x_xtal_ops,
+        .flags = CLK_IS_ROOT,
+};
+static const unsigned long wm831x_fll_auto_rates[] = {
+         2048000,
+        11289600,
+        12000000,
+        12288000,
+        19200000,
+        22579600,
+        24000000,
+        24576000,
+};
+static int wm831x_fll_is_enabled(struct clk_hw *hw)
+{
+        struct wm831x_clk *clkdata = container_of(hw, struct wm831x_clk,
+                                                  fll_hw);
+        struct wm831x *wm831x = clkdata->wm831x;
+        int ret;
+        ret = wm831x_reg_read(wm831x, WM831X_FLL_CONTROL_1);
+        if (ret < 0) {
+                dev_err(wm831x->dev, "Unable to read FLL_CONTROL_1: %d\n",
+                        ret);
+                return true;
+        }
+        return (ret & WM831X_FLL_ENA) != 0;
+}
+static int wm831x_fll_prepare(struct clk_hw *hw)
+{
+        struct wm831x_clk *clkdata = container_of(hw, struct wm831x_clk,
+                                                  fll_hw);
+        struct wm831x *wm831x = clkdata->wm831x;
+        int ret;
+        ret = wm831x_set_bits(wm831x, WM831X_FLL_CONTROL_2,
+                              WM831X_FLL_ENA, WM831X_FLL_ENA);
+        if (ret != 0)
+                dev_crit(wm831x->dev, "Failed to enable FLL: %d\n", ret);
+        usleep_range(2000, 2000);
+        return ret;
+}
+static void wm831x_fll_unprepare(struct clk_hw *hw)
+{
+        struct wm831x_clk *clkdata = container_of(hw, struct wm831x_clk,
+                                                  fll_hw);
+        struct wm831x *wm831x = clkdata->wm831x;
+        int ret;
+        ret = wm831x_set_bits(wm831x, WM831X_FLL_CONTROL_2, WM831X_FLL_ENA, 0);
+        if (ret != 0)
+                dev_crit(wm831x->dev, "Failed to disaable FLL: %d\n", ret);
+}
+static unsigned long wm831x_fll_recalc_rate(struct clk_hw *hw,
+                                            unsigned long parent_rate)
+{
+        struct wm831x_clk *clkdata = container_of(hw, struct wm831x_clk,
+                                                  fll_hw);
+        struct wm831x *wm831x = clkdata->wm831x;
+        int ret;
+        ret = wm831x_reg_read(wm831x, WM831X_CLOCK_CONTROL_2);
+        if (ret < 0) {
+                dev_err(wm831x->dev, "Unable to read CLOCK_CONTROL_2: %d\n",
+                        ret);
+                return 0;
+        }
+        if (ret & WM831X_FLL_AUTO)
+                return wm831x_fll_auto_rates[ret & WM831X_FLL_AUTO_FREQ_MASK];
+        dev_err(wm831x->dev, "FLL only supported in AUTO mode\n");
+        return 0;
+}
+static long wm831x_fll_round_rate(struct clk_hw *hw, unsigned long rate,
+                                  unsigned long *unused)
+{
+        int best = 0;
+        int i;
+        for (i = 0; i < ARRAY_SIZE(wm831x_fll_auto_rates); i++)
+                if (abs(wm831x_fll_auto_rates[i] - rate) <
+                    abs(wm831x_fll_auto_rates[best] - rate))
+                        best = i;
+        return wm831x_fll_auto_rates[best];
+}
+static int wm831x_fll_set_rate(struct clk_hw *hw, unsigned long rate,
+                               unsigned long parent_rate)
+{
+        struct wm831x_clk *clkdata = container_of(hw, struct wm831x_clk,
+                                                  fll_hw);
+        struct wm831x *wm831x = clkdata->wm831x;
+        int i;
+        for (i = 0; i < ARRAY_SIZE(wm831x_fll_auto_rates); i++)
+                if (wm831x_fll_auto_rates[i] == rate)
+                        break;
+        if (i == ARRAY_SIZE(wm831x_fll_auto_rates))
+                return -EINVAL;
+        if (wm831x_fll_is_enabled(hw))
+                return -EPERM;
+        return wm831x_set_bits(wm831x, WM831X_CLOCK_CONTROL_2,
+                               WM831X_FLL_AUTO_FREQ_MASK, i);
+}
+static const char *wm831x_fll_parents[] = {
+        "xtal",
+        "clkin",
+};
+static u8 wm831x_fll_get_parent(struct clk_hw *hw)
+{
+        struct wm831x_clk *clkdata = container_of(hw, struct wm831x_clk,
+                                                  fll_hw);
+        struct wm831x *wm831x = clkdata->wm831x;
+        int ret;
+        /* AUTO mode is always clocked from the crystal */
+        ret = wm831x_reg_read(wm831x, WM831X_CLOCK_CONTROL_2);
+        if (ret < 0) {
+                dev_err(wm831x->dev, "Unable to read CLOCK_CONTROL_2: %d\n",
+                        ret);
+                return 0;
+        }
+        if (ret & WM831X_FLL_AUTO)
+                return 0;
+        ret = wm831x_reg_read(wm831x, WM831X_FLL_CONTROL_5);
+        if (ret < 0) {
+                dev_err(wm831x->dev, "Unable to read FLL_CONTROL_5: %d\n",
+                        ret);
+                return 0;
+        }
+        switch (ret & WM831X_FLL_CLK_SRC_MASK) {
+        case 0:
+                return 0;
+        case 1:
+                return 1;
+        default:
+                dev_err(wm831x->dev, "Unsupported FLL clock source %d\n",
+                        ret & WM831X_FLL_CLK_SRC_MASK);
+                return 0;
+        }
+}
+static const struct clk_ops wm831x_fll_ops = {
+        .is_enabled = wm831x_fll_is_enabled,
+        .prepare = wm831x_fll_prepare,
+        .unprepare = wm831x_fll_unprepare,
+        .round_rate = wm831x_fll_round_rate,
+        .recalc_rate = wm831x_fll_recalc_rate,
+        .set_rate = wm831x_fll_set_rate,
+        .get_parent = wm831x_fll_get_parent,
+};
+static struct clk_init_data wm831x_fll_init = {
+        .name = "fll",
+        .ops = &wm831x_fll_ops,
+        .parent_names = wm831x_fll_parents,
+        .num_parents = ARRAY_SIZE(wm831x_fll_parents),
+        .flags = CLK_SET_RATE_GATE,
+};
+static int wm831x_clkout_is_enabled(struct clk_hw *hw)
+{
+        struct wm831x_clk *clkdata = container_of(hw, struct wm831x_clk,
+                                                  clkout_hw);
+        struct wm831x *wm831x = clkdata->wm831x;
+        int ret;
+        ret = wm831x_reg_read(wm831x, WM831X_CLOCK_CONTROL_1);
+        if (ret < 0) {
+                dev_err(wm831x->dev, "Unable to read CLOCK_CONTROL_1: %d\n",
+                        ret);
+                return true;
+        }
+        return (ret & WM831X_CLKOUT_ENA) != 0;
+}
+static int wm831x_clkout_prepare(struct clk_hw *hw)
+{
+        struct wm831x_clk *clkdata = container_of(hw, struct wm831x_clk,
+                                                  clkout_hw);
+        struct wm831x *wm831x = clkdata->wm831x;
+        int ret;
+        ret = wm831x_reg_unlock(wm831x);
+        if (ret != 0) {
+                dev_crit(wm831x->dev, "Failed to lock registers: %d\n", ret);
+                return ret;
+        }
+        ret = wm831x_set_bits(wm831x, WM831X_CLOCK_CONTROL_1,
+                              WM831X_CLKOUT_ENA, WM831X_CLKOUT_ENA);
+        if (ret != 0)
+                dev_crit(wm831x->dev, "Failed to enable CLKOUT: %d\n", ret);
+        wm831x_reg_lock(wm831x);
+        return ret;
+}
+static void wm831x_clkout_unprepare(struct clk_hw *hw)
+{
+        struct wm831x_clk *clkdata = container_of(hw, struct wm831x_clk,
+                                                  clkout_hw);
+        struct wm831x *wm831x = clkdata->wm831x;
+        int ret;
+        ret = wm831x_reg_unlock(wm831x);
+        if (ret != 0) {
+                dev_crit(wm831x->dev, "Failed to lock registers: %d\n", ret);
+                return;
+        }
+        ret = wm831x_set_bits(wm831x, WM831X_CLOCK_CONTROL_1,
+                              WM831X_CLKOUT_ENA, 0);
+        if (ret != 0)
+                dev_crit(wm831x->dev, "Failed to disable CLKOUT: %d\n", ret);
+        wm831x_reg_lock(wm831x);
+}
+static const char *wm831x_clkout_parents[] = {
+        "xtal",
+        "fll",
+};
+static u8 wm831x_clkout_get_parent(struct clk_hw *hw)
+{
+        struct wm831x_clk *clkdata = container_of(hw, struct wm831x_clk,
+                                                  clkout_hw);
+        struct wm831x *wm831x = clkdata->wm831x;
+        int ret;
+        ret = wm831x_reg_read(wm831x, WM831X_CLOCK_CONTROL_1);
+        if (ret < 0) {
+                dev_err(wm831x->dev, "Unable to read CLOCK_CONTROL_1: %d\n",
+                        ret);
+                return 0;
+        }
+        if (ret & WM831X_CLKOUT_SRC)
+                return 0;
+        else
+                return 1;
+}
+static int wm831x_clkout_set_parent(struct clk_hw *hw, u8 parent)
+{
+        struct wm831x_clk *clkdata = container_of(hw, struct wm831x_clk,
+                                                  clkout_hw);
+        struct wm831x *wm831x = clkdata->wm831x;
+        return wm831x_set_bits(wm831x, WM831X_CLOCK_CONTROL_1,
+                               WM831X_CLKOUT_SRC,
+                               parent << WM831X_CLKOUT_SRC_SHIFT);
+}
+static const struct clk_ops wm831x_clkout_ops = {
+        .is_enabled = wm831x_clkout_is_enabled,
+        .prepare = wm831x_clkout_prepare,
+        .unprepare = wm831x_clkout_unprepare,
+        .get_parent = wm831x_clkout_get_parent,
+        .set_parent = wm831x_clkout_set_parent,
+};
+static struct clk_init_data wm831x_clkout_init = {
+        .name = "clkout",
+        .ops = &wm831x_clkout_ops,
+        .parent_names = wm831x_clkout_parents,
+        .num_parents = ARRAY_SIZE(wm831x_clkout_parents),
+        .flags = CLK_SET_RATE_PARENT,
+};
+static __devinit int wm831x_clk_probe(struct platform_device *pdev)
+{
+        struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
+        struct wm831x_clk *clkdata;
+        int ret;
+        clkdata = devm_kzalloc(&pdev->dev, sizeof(*clkdata), GFP_KERNEL);
+        if (!clkdata)
+                return -ENOMEM;
+        /* XTAL_ENA can only be set via OTP/InstantConfig so just read once */
+        ret = wm831x_reg_read(wm831x, WM831X_CLOCK_CONTROL_2);
+        if (ret < 0) {
+                dev_err(wm831x->dev, "Unable to read CLOCK_CONTROL_2: %d\n",
+                        ret);
+                return ret;
+        }
+        clkdata->xtal_ena = ret & WM831X_XTAL_ENA;
+        clkdata->xtal_hw.init = &wm831x_xtal_init;
+        clkdata->xtal = clk_register(&pdev->dev, &clkdata->xtal_hw);
+        if (!clkdata->xtal)
+                return -EINVAL;
+        clkdata->fll_hw.init = &wm831x_fll_init;
+        clkdata->fll = clk_register(&pdev->dev, &clkdata->fll_hw);
+        if (!clkdata->fll) {
+                ret = -EINVAL;
+                goto err_xtal;
+        }
+        clkdata->clkout_hw.init = &wm831x_clkout_init;
+        clkdata->clkout = clk_register(&pdev->dev, &clkdata->clkout_hw);
+        if (!clkdata->clkout) {
+                ret = -EINVAL;
+                goto err_fll;
+        }
+        dev_set_drvdata(&pdev->dev, clkdata);
+        return 0;
+err_fll:
+        clk_unregister(clkdata->fll);
+err_xtal:
+        clk_unregister(clkdata->xtal);
+        return ret;
+}
+static int __devexit wm831x_clk_remove(struct platform_device *pdev)
+{
+        struct wm831x_clk *clkdata = dev_get_drvdata(&pdev->dev);
+        clk_unregister(clkdata->clkout);
+        clk_unregister(clkdata->fll);
+        clk_unregister(clkdata->xtal);
+        return 0;
+}
+static struct platform_driver wm831x_clk_driver = {
+        .probe = wm831x_clk_probe,
+        .remove = __devexit_p(wm831x_clk_remove),
+        .driver         = {
+                .name   = "wm831x-clk",
+                .owner  = THIS_MODULE,
+        },
+};
+module_platform_driver(wm831x_clk_driver);
+/* Module information */
+MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
+MODULE_DESCRIPTION("WM831x clock driver");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:wm831x-clk");
diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
index 687b00d67c8a..efdfd009c270 100644
--- a/drivers/clk/clk.c
+++ b/drivers/clk/clk.c
@@ -16,6 +16,7 @@
 #include <linux/err.h>
 #include <linux/list.h>
 #include <linux/slab.h>
+#include <linux/of.h>
 static DEFINE_SPINLOCK(enable_lock);
 static DEFINE_MUTEX(prepare_lock);
@@ -464,6 +465,9 @@ static void __clk_disable(struct clk *clk)
        if (!clk)
                return;
+        if (WARN_ON(IS_ERR(clk)))
+                return;
        if (WARN_ON(clk->enable_count == 0))
                return;
@@ -850,18 +854,21 @@ static void clk_change_rate(struct clk *clk)
 {
        struct clk *child;
        unsigned long old_rate;
+        unsigned long best_parent_rate = 0;
        struct hlist_node *tmp;
        old_rate = clk->rate;
+        if (clk->parent)
+                best_parent_rate = clk->parent->rate;
        if (clk->ops->set_rate)
-                clk->ops->set_rate(clk->hw, clk->new_rate, clk->parent->rate);
+                clk->ops->set_rate(clk->hw, clk->new_rate, best_parent_rate);
        if (clk->ops->recalc_rate)
-                clk->rate = clk->ops->recalc_rate(clk->hw,
+                clk->rate = clk->ops->recalc_rate(clk->hw, best_parent_rate);
-                                clk->parent->rate);
        else
-                clk->rate = clk->parent->rate;
+                clk->rate = best_parent_rate;
        if (clk->notifier_count && old_rate != clk->rate)
                __clk_notify(clk, POST_RATE_CHANGE, old_rate, clk->rate);
@@ -999,7 +1006,7 @@ static struct clk *__clk_init_parent(struct clk *clk)
        if (!clk->parents)
                clk->parents =
-                        kmalloc((sizeof(struct clk*) * clk->num_parents),
+                        kzalloc((sizeof(struct clk*) * clk->num_parents),
                                        GFP_KERNEL);
        if (!clk->parents)
@@ -1064,21 +1071,24 @@ static int __clk_set_parent(struct clk *clk, struct clk *parent)
        old_parent = clk->parent;
-        /* find index of new parent clock using cached parent ptrs */
+        if (!clk->parents)
-        for (i = 0; i < clk->num_parents; i++)
+                clk->parents = kzalloc((sizeof(struct clk*) * clk->num_parents),
-                if (clk->parents[i] == parent)
+                                                                GFP_KERNEL);
-                        break;
        /*
-         * find index of new parent clock using string name comparison
+         * find index of new parent clock using cached parent ptrs,
-         * also try to cache the parent to avoid future calls to __clk_lookup
+         * or if not yet cached, use string name comparison and cache
+         * them now to avoid future calls to __clk_lookup.
         */
-        if (i == clk->num_parents)
+        for (i = 0; i < clk->num_parents; i++) {
-                for (i = 0; i < clk->num_parents; i++)
+                if (clk->parents && clk->parents[i] == parent)
-                        if (!strcmp(clk->parent_names[i], parent->name)) {
+                        break;
+                else if (!strcmp(clk->parent_names[i], parent->name)) {
+                        if (clk->parents)
                                clk->parents[i] = __clk_lookup(parent->name);
-                                break;
+                        break;
-                        }
+                }
+        }
        if (i == clk->num_parents) {
                pr_debug("%s: clock %s is not a possible parent of clock %s\n",
@@ -1229,8 +1239,8 @@ int __clk_init(struct device *dev, struct clk *clk)
         * If clk->parents is not NULL we skip this entire block.  This allows
         * for clock drivers to statically initialize clk->parents.
         */
-        if (clk->num_parents && !clk->parents) {
+        if (clk->num_parents > 1 && !clk->parents) {
-                clk->parents = kmalloc((sizeof(struct clk*) * clk->num_parents),
+                clk->parents = kzalloc((sizeof(struct clk*) * clk->num_parents),
                                GFP_KERNEL);
                /*
                 * __clk_lookup returns NULL for parents that have not been
@@ -1544,3 +1554,142 @@ int clk_notifier_unregister(struct clk *clk, struct notifier_block *nb)
        return ret;
 }
 EXPORT_SYMBOL_GPL(clk_notifier_unregister);
+#ifdef CONFIG_OF
+/**
+ * struct of_clk_provider - Clock provider registration structure
+ * @link: Entry in global list of clock providers
+ * @node: Pointer to device tree node of clock provider
+ * @get: Get clock callback.  Returns NULL or a struct clk for the
+ *       given clock specifier
+ * @data: context pointer to be passed into @get callback
+ */
+struct of_clk_provider {
+        struct list_head link;
+        struct device_node *node;
+        struct clk *(*get)(struct of_phandle_args *clkspec, void *data);
+        void *data;
+};
+static LIST_HEAD(of_clk_providers);
+static DEFINE_MUTEX(of_clk_lock);
+struct clk *of_clk_src_simple_get(struct of_phandle_args *clkspec,
+                                     void *data)
+{
+        return data;
+}
+EXPORT_SYMBOL_GPL(of_clk_src_simple_get);
+/**
+ * of_clk_add_provider() - Register a clock provider for a node
+ * @np: Device node pointer associated with clock provider
+ * @clk_src_get: callback for decoding clock
+ * @data: context pointer for @clk_src_get callback.
+ */
+int of_clk_add_provider(struct device_node *np,
+                        struct clk *(*clk_src_get)(struct of_phandle_args *clkspec,
+                                                   void *data),
+                        void *data)
+{
+        struct of_clk_provider *cp;
+        cp = kzalloc(sizeof(struct of_clk_provider), GFP_KERNEL);
+        if (!cp)
+                return -ENOMEM;
+        cp->node = of_node_get(np);
+        cp->data = data;
+        cp->get = clk_src_get;
+        mutex_lock(&of_clk_lock);
+        list_add(&cp->link, &of_clk_providers);
+        mutex_unlock(&of_clk_lock);
+        pr_debug("Added clock from %s\n", np->full_name);
+        return 0;
+}
+EXPORT_SYMBOL_GPL(of_clk_add_provider);
+/**
+ * of_clk_del_provider() - Remove a previously registered clock provider
+ * @np: Device node pointer associated with clock provider
+ */
+void of_clk_del_provider(struct device_node *np)
+{
+        struct of_clk_provider *cp;
+        mutex_lock(&of_clk_lock);
+        list_for_each_entry(cp, &of_clk_providers, link) {
+                if (cp->node == np) {
+                        list_del(&cp->link);
+                        of_node_put(cp->node);
+                        kfree(cp);
+                        break;
+                }
+        }
+        mutex_unlock(&of_clk_lock);
+}
+EXPORT_SYMBOL_GPL(of_clk_del_provider);
+struct clk *of_clk_get_from_provider(struct of_phandle_args *clkspec)
+{
+        struct of_clk_provider *provider;
+        struct clk *clk = ERR_PTR(-ENOENT);
+        /* Check if we have such a provider in our array */
+        mutex_lock(&of_clk_lock);
+        list_for_each_entry(provider, &of_clk_providers, link) {
+                if (provider->node == clkspec->np)
+                        clk = provider->get(clkspec, provider->data);
+                if (!IS_ERR(clk))
+                        break;
+        }
+        mutex_unlock(&of_clk_lock);
+        return clk;
+}
+const char *of_clk_get_parent_name(struct device_node *np, int index)
+{
+        struct of_phandle_args clkspec;
+        const char *clk_name;
+        int rc;
+        if (index < 0)
+                return NULL;
+        rc = of_parse_phandle_with_args(np, "clocks", "#clock-cells", index,
+                                        &clkspec);
+        if (rc)
+                return NULL;
+        if (of_property_read_string_index(clkspec.np, "clock-output-names",
+                                          clkspec.args_count ? clkspec.args[0] : 0,
+                                          &clk_name) < 0)
+                clk_name = clkspec.np->name;
+        of_node_put(clkspec.np);
+        return clk_name;
+}
+EXPORT_SYMBOL_GPL(of_clk_get_parent_name);
+/**
+ * of_clk_init() - Scan and init clock providers from the DT
+ * @matches: array of compatible values and init functions for providers.
+ *
+ * This function scans the device tree for matching clock providers and
+ * calls their initialization functions
+ */
+void __init of_clk_init(const struct of_device_id *matches)
+{
+        struct device_node *np;
+        for_each_matching_node(np, matches) {
+                const struct of_device_id *match = of_match_node(matches, np);
+                of_clk_init_cb_t clk_init_cb = match->data;
+                clk_init_cb(np);
+        }
+}
+#endif
diff --git a/drivers/clk/clkdev.c b/drivers/clk/clkdev.c
index c535cf8c5770..d423c9bdd71a 100644
--- a/drivers/clk/clkdev.c
+++ b/drivers/clk/clkdev.c
@@ -19,10 +19,80 @@
 #include <linux/mutex.h>
 #include <linux/clk.h>
 #include <linux/clkdev.h>
+#include <linux/of.h>
 static LIST_HEAD(clocks);
 static DEFINE_MUTEX(clocks_mutex);
+#if defined(CONFIG_OF) && defined(CONFIG_COMMON_CLK)
+struct clk *of_clk_get(struct device_node *np, int index)
+{
+        struct of_phandle_args clkspec;
+        struct clk *clk;
+        int rc;
+        if (index < 0)
+                return ERR_PTR(-EINVAL);
+        rc = of_parse_phandle_with_args(np, "clocks", "#clock-cells", index,
+                                        &clkspec);
+        if (rc)
+                return ERR_PTR(rc);
+        clk = of_clk_get_from_provider(&clkspec);
+        of_node_put(clkspec.np);
+        return clk;
+}
+EXPORT_SYMBOL(of_clk_get);
+/**
+ * of_clk_get_by_name() - Parse and lookup a clock referenced by a device node
+ * @np: pointer to clock consumer node
+ * @name: name of consumer's clock input, or NULL for the first clock reference
+ *
+ * This function parses the clocks and clock-names properties,
+ * and uses them to look up the struct clk from the registered list of clock
+ * providers.
+ */
+struct clk *of_clk_get_by_name(struct device_node *np, const char *name)
+{
+        struct clk *clk = ERR_PTR(-ENOENT);
+        /* Walk up the tree of devices looking for a clock that matches */
+        while (np) {
+                int index = 0;
+                /*
+                 * For named clocks, first look up the name in the
+                 * "clock-names" property.  If it cannot be found, then
+                 * index will be an error code, and of_clk_get() will fail.
+                 */
+                if (name)
+                        index = of_property_match_string(np, "clock-names", name);
+                clk = of_clk_get(np, index);
+                if (!IS_ERR(clk))
+                        break;
+                else if (name && index >= 0) {
+                        pr_err("ERROR: could not get clock %s:%s(%i)\n",
+                                np->full_name, name ? name : "", index);
+                        return clk;
+                }
+                /*
+                 * No matching clock found on this node.  If the parent node
+                 * has a "clock-ranges" property, then we can try one of its
+                 * clocks.
+                 */
+                np = np->parent;
+                if (np && !of_get_property(np, "clock-ranges", NULL))
+                        break;
+        }
+        return clk;
+}
+EXPORT_SYMBOL(of_clk_get_by_name);
+#endif
 /*
 * Find the correct struct clk for the device and connection ID.
 * We do slightly fuzzy matching here:
@@ -83,6 +153,13 @@ EXPORT_SYMBOL(clk_get_sys);
 struct clk *clk_get(struct device *dev, const char *con_id)
 {
        const char *dev_id = dev ? dev_name(dev) : NULL;
+        struct clk *clk;
+        if (dev) {
+                clk = of_clk_get_by_name(dev->of_node, con_id);
+                if (!IS_ERR(clk) && __clk_get(clk))
+                        return clk;
+        }
        return clk_get_sys(dev_id, con_id);
 }
diff --git a/drivers/clk/mxs/clk-imx23.c b/drivers/clk/mxs/clk-imx23.c
index f7be225f544c..844043ad0fe4 100644
--- a/drivers/clk/mxs/clk-imx23.c
+++ b/drivers/clk/mxs/clk-imx23.c
@@ -71,7 +71,7 @@ static void __init clk_misc_init(void)
        __mxs_setl(30 << BP_FRAC_IOFRAC, FRAC);
 }
-static struct clk_lookup uart_lookups[] __initdata = {
+static struct clk_lookup uart_lookups[] = {
        { .dev_id = "duart", },
        { .dev_id = "mxs-auart.0", },
        { .dev_id = "mxs-auart.1", },
@@ -80,33 +80,33 @@ static struct clk_lookup uart_lookups[] __initdata = {
        { .dev_id = "80070000.serial", },
 };
-static struct clk_lookup hbus_lookups[] __initdata = {
+static struct clk_lookup hbus_lookups[] = {
        { .dev_id = "imx23-dma-apbh", },
        { .dev_id = "80004000.dma-apbh", },
 };
-static struct clk_lookup xbus_lookups[] __initdata = {
+static struct clk_lookup xbus_lookups[] = {
        { .dev_id = "duart", .con_id = "apb_pclk"},
        { .dev_id = "80070000.serial", .con_id = "apb_pclk"},
        { .dev_id = "imx23-dma-apbx", },
        { .dev_id = "80024000.dma-apbx", },
 };
-static struct clk_lookup ssp_lookups[] __initdata = {
+static struct clk_lookup ssp_lookups[] = {
        { .dev_id = "imx23-mmc.0", },
        { .dev_id = "imx23-mmc.1", },
        { .dev_id = "80010000.ssp", },
        { .dev_id = "80034000.ssp", },
 };
-static struct clk_lookup lcdif_lookups[] __initdata = {
+static struct clk_lookup lcdif_lookups[] = {
        { .dev_id = "imx23-fb", },
        { .dev_id = "80030000.lcdif", },
 };
-static struct clk_lookup gpmi_lookups[] __initdata = {
+static struct clk_lookup gpmi_lookups[] = {
        { .dev_id = "imx23-gpmi-nand", },
-        { .dev_id = "8000c000.gpmi", },
+        { .dev_id = "8000c000.gpmi-nand", },
 };
 static const char *sel_pll[]  __initconst = { "pll", "ref_xtal", };
@@ -189,6 +189,7 @@ int __init mx23_clocks_init(void)
                }
        clk_register_clkdev(clks[clk32k], NULL, "timrot");
+        clk_register_clkdev(clks[pwm], NULL, "80064000.pwm");
        clk_register_clkdevs(clks[hbus], hbus_lookups, ARRAY_SIZE(hbus_lookups));
        clk_register_clkdevs(clks[xbus], xbus_lookups, ARRAY_SIZE(xbus_lookups));
        clk_register_clkdevs(clks[uart], uart_lookups, ARRAY_SIZE(uart_lookups));
diff --git a/drivers/clk/mxs/clk-imx28.c b/drivers/clk/mxs/clk-imx28.c
index 2826a2606a29..e3aab67b3eb7 100644
--- a/drivers/clk/mxs/clk-imx28.c
+++ b/drivers/clk/mxs/clk-imx28.c
@@ -112,15 +112,15 @@ static void __init clk_misc_init(void)
        /*
         * 480 MHz seems too high to be ssp clock source directly,
-         * so set frac0 to get a 288 MHz ref_io0.
+         * so set frac0 to get a 288 MHz ref_io0 and ref_io1.
         */
        val = readl_relaxed(FRAC0);
-        val &= ~(0x3f << BP_FRAC0_IO0FRAC);
+        val &= ~((0x3f << BP_FRAC0_IO0FRAC) | (0x3f << BP_FRAC0_IO1FRAC));
-        val |= 30 << BP_FRAC0_IO0FRAC;
+        val |= (30 << BP_FRAC0_IO0FRAC) | (30 << BP_FRAC0_IO1FRAC);
        writel_relaxed(val, FRAC0);
 }
-static struct clk_lookup uart_lookups[] __initdata = {
+static struct clk_lookup uart_lookups[] = {
        { .dev_id = "duart", },
        { .dev_id = "mxs-auart.0", },
        { .dev_id = "mxs-auart.1", },
@@ -135,71 +135,71 @@ static struct clk_lookup uart_lookups[] __initdata = {
        { .dev_id = "80074000.serial", },
 };
-static struct clk_lookup hbus_lookups[] __initdata = {
+static struct clk_lookup hbus_lookups[] = {
        { .dev_id = "imx28-dma-apbh", },
        { .dev_id = "80004000.dma-apbh", },
 };
-static struct clk_lookup xbus_lookups[] __initdata = {
+static struct clk_lookup xbus_lookups[] = {
        { .dev_id = "duart", .con_id = "apb_pclk"},
        { .dev_id = "80074000.serial", .con_id = "apb_pclk"},
        { .dev_id = "imx28-dma-apbx", },
        { .dev_id = "80024000.dma-apbx", },
 };
-static struct clk_lookup ssp0_lookups[] __initdata = {
+static struct clk_lookup ssp0_lookups[] = {
        { .dev_id = "imx28-mmc.0", },
        { .dev_id = "80010000.ssp", },
 };
-static struct clk_lookup ssp1_lookups[] __initdata = {
+static struct clk_lookup ssp1_lookups[] = {
        { .dev_id = "imx28-mmc.1", },
        { .dev_id = "80012000.ssp", },
 };
-static struct clk_lookup ssp2_lookups[] __initdata = {
+static struct clk_lookup ssp2_lookups[] = {
        { .dev_id = "imx28-mmc.2", },
        { .dev_id = "80014000.ssp", },
 };
-static struct clk_lookup ssp3_lookups[] __initdata = {
+static struct clk_lookup ssp3_lookups[] = {
        { .dev_id = "imx28-mmc.3", },
        { .dev_id = "80016000.ssp", },
 };
-static struct clk_lookup lcdif_lookups[] __initdata = {
+static struct clk_lookup lcdif_lookups[] = {
        { .dev_id = "imx28-fb", },
        { .dev_id = "80030000.lcdif", },
 };
-static struct clk_lookup gpmi_lookups[] __initdata = {
+static struct clk_lookup gpmi_lookups[] = {
        { .dev_id = "imx28-gpmi-nand", },
-        { .dev_id = "8000c000.gpmi", },
+        { .dev_id = "8000c000.gpmi-nand", },
 };
-static struct clk_lookup fec_lookups[] __initdata = {
+static struct clk_lookup fec_lookups[] = {
        { .dev_id = "imx28-fec.0", },
        { .dev_id = "imx28-fec.1", },
        { .dev_id = "800f0000.ethernet", },
        { .dev_id = "800f4000.ethernet", },
 };
-static struct clk_lookup can0_lookups[] __initdata = {
+static struct clk_lookup can0_lookups[] = {
        { .dev_id = "flexcan.0", },
        { .dev_id = "80032000.can", },
 };
-static struct clk_lookup can1_lookups[] __initdata = {
+static struct clk_lookup can1_lookups[] = {
        { .dev_id = "flexcan.1", },
        { .dev_id = "80034000.can", },
 };
-static struct clk_lookup saif0_lookups[] __initdata = {
+static struct clk_lookup saif0_lookups[] = {
        { .dev_id = "mxs-saif.0", },
        { .dev_id = "80042000.saif", },
 };
-static struct clk_lookup saif1_lookups[] __initdata = {
+static struct clk_lookup saif1_lookups[] = {
        { .dev_id = "mxs-saif.1", },
        { .dev_id = "80046000.saif", },
 };
@@ -245,8 +245,8 @@ int __init mx28_clocks_init(void)
        clks[pll2] = mxs_clk_pll("pll2", "ref_xtal", PLL2CTRL0, 23, 50000000);
        clks[ref_cpu] = mxs_clk_ref("ref_cpu", "pll0", FRAC0, 0);
        clks[ref_emi] = mxs_clk_ref("ref_emi", "pll0", FRAC0, 1);
-        clks[ref_io0] = mxs_clk_ref("ref_io0", "pll0", FRAC0, 2);
+        clks[ref_io1] = mxs_clk_ref("ref_io1", "pll0", FRAC0, 2);
-        clks[ref_io1] = mxs_clk_ref("ref_io1", "pll0", FRAC0, 3);
+        clks[ref_io0] = mxs_clk_ref("ref_io0", "pll0", FRAC0, 3);
        clks[ref_pix] = mxs_clk_ref("ref_pix", "pll0", FRAC1, 0);
        clks[ref_hsadc] = mxs_clk_ref("ref_hsadc", "pll0", FRAC1, 1);
        clks[ref_gpmi] = mxs_clk_ref("ref_gpmi", "pll0", FRAC1, 2);
@@ -314,6 +314,7 @@ int __init mx28_clocks_init(void)
        clk_register_clkdev(clks[clk32k], NULL, "timrot");
        clk_register_clkdev(clks[enet_out], NULL, "enet_out");
+        clk_register_clkdev(clks[pwm], NULL, "80064000.pwm");
        clk_register_clkdevs(clks[hbus], hbus_lookups, ARRAY_SIZE(hbus_lookups));
        clk_register_clkdevs(clks[xbus], xbus_lookups, ARRAY_SIZE(xbus_lookups));
        clk_register_clkdevs(clks[uart], uart_lookups, ARRAY_SIZE(uart_lookups));
@@ -328,6 +329,10 @@ int __init mx28_clocks_init(void)
        clk_register_clkdevs(clks[fec], fec_lookups, ARRAY_SIZE(fec_lookups));
        clk_register_clkdevs(clks[can0], can0_lookups, ARRAY_SIZE(can0_lookups));
        clk_register_clkdevs(clks[can1], can1_lookups, ARRAY_SIZE(can1_lookups));
+        clk_register_clkdev(clks[usb0_pwr], NULL, "8007c000.usbphy");
+        clk_register_clkdev(clks[usb1_pwr], NULL, "8007e000.usbphy");
+        clk_register_clkdev(clks[usb0], NULL, "80080000.usb");
+        clk_register_clkdev(clks[usb1], NULL, "80090000.usb");
        for (i = 0; i < ARRAY_SIZE(clks_init_on); i++)
                clk_prepare_enable(clks[clks_init_on[i]]);
diff --git a/drivers/clk/socfpga/Makefile b/drivers/clk/socfpga/Makefile
new file mode 100644
index 000000000000..0303c0b99cd0
--- /dev/null
+++ b/drivers/clk/socfpga/Makefile
@@ -0,0 +1 @@
+obj-y += clk.o
diff --git a/drivers/clk/socfpga/clk.c b/drivers/clk/socfpga/clk.c
new file mode 100644
index 000000000000..2c855a6394ff
--- /dev/null
+++ b/drivers/clk/socfpga/clk.c
@@ -0,0 +1,51 @@
+/*
+ *  Copyright (C) 2012 Altera Corporation <www.altera.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+#include <linux/clk.h>
+#include <linux/clkdev.h>
+#include <linux/clk-provider.h>
+#define SOCFPGA_OSC1_CLK        10000000
+#define SOCFPGA_MPU_CLK         800000000
+#define SOCFPGA_MAIN_QSPI_CLK           432000000
+#define SOCFPGA_MAIN_NAND_SDMMC_CLK     250000000
+#define SOCFPGA_S2F_USR_CLK             125000000
+void __init socfpga_init_clocks(void)
+{
+        struct clk *clk;
+        clk = clk_register_fixed_rate(NULL, "osc1_clk", NULL, CLK_IS_ROOT, SOCFPGA_OSC1_CLK);
+        clk_register_clkdev(clk, "osc1_clk", NULL);
+        clk = clk_register_fixed_rate(NULL, "mpu_clk", NULL, CLK_IS_ROOT, SOCFPGA_MPU_CLK);
+        clk_register_clkdev(clk, "mpu_clk", NULL);
+        clk = clk_register_fixed_rate(NULL, "main_clk", NULL, CLK_IS_ROOT, SOCFPGA_MPU_CLK/2);
+        clk_register_clkdev(clk, "main_clk", NULL);
+        clk = clk_register_fixed_rate(NULL, "dbg_base_clk", NULL, CLK_IS_ROOT, SOCFPGA_MPU_CLK/2);
+        clk_register_clkdev(clk, "dbg_base_clk", NULL);
+        clk = clk_register_fixed_rate(NULL, "main_qspi_clk", NULL, CLK_IS_ROOT, SOCFPGA_MAIN_QSPI_CLK);
+        clk_register_clkdev(clk, "main_qspi_clk", NULL);
+        clk = clk_register_fixed_rate(NULL, "main_nand_sdmmc_clk", NULL, CLK_IS_ROOT, SOCFPGA_MAIN_NAND_SDMMC_CLK);
+        clk_register_clkdev(clk, "main_nand_sdmmc_clk", NULL);
+        clk = clk_register_fixed_rate(NULL, "s2f_usr_clk", NULL, CLK_IS_ROOT, SOCFPGA_S2F_USR_CLK);
+        clk_register_clkdev(clk, "s2f_usr_clk", NULL);
+}
diff --git a/drivers/clk/spear/clk-aux-synth.c b/drivers/clk/spear/clk-aux-synth.c
index af34074e702b..6756e7c3bc07 100644
--- a/drivers/clk/spear/clk-aux-synth.c
+++ b/drivers/clk/spear/clk-aux-synth.c
@@ -1,6 +1,6 @@
 /*
 * Copyright (C) 2012 ST Microelectronics
- * Viresh Kumar <viresh.kumar@st.com>
+ * Viresh Kumar <viresh.linux@gmail.com>
 *
 * This file is licensed under the terms of the GNU General Public
 * License version 2. This program is licensed "as is" without any
diff --git a/drivers/clk/spear/clk-frac-synth.c b/drivers/clk/spear/clk-frac-synth.c
index 4dbdb3fe18e0..958aa3ad1d60 100644
--- a/drivers/clk/spear/clk-frac-synth.c
+++ b/drivers/clk/spear/clk-frac-synth.c
@@ -1,6 +1,6 @@
 /*
 * Copyright (C) 2012 ST Microelectronics
- * Viresh Kumar <viresh.kumar@st.com>
+ * Viresh Kumar <viresh.linux@gmail.com>
 *
 * This file is licensed under the terms of the GNU General Public
 * License version 2. This program is licensed "as is" without any
diff --git a/drivers/clk/spear/clk-gpt-synth.c b/drivers/clk/spear/clk-gpt-synth.c
index b471c9762a97..1afc18c4effc 100644
--- a/drivers/clk/spear/clk-gpt-synth.c
+++ b/drivers/clk/spear/clk-gpt-synth.c
@@ -1,6 +1,6 @@
 /*
 * Copyright (C) 2012 ST Microelectronics
- * Viresh Kumar <viresh.kumar@st.com>
+ * Viresh Kumar <viresh.linux@gmail.com>
 *
 * This file is licensed under the terms of the GNU General Public
 * License version 2. This program is licensed "as is" without any
diff --git a/drivers/clk/spear/clk-vco-pll.c b/drivers/clk/spear/clk-vco-pll.c
index dcd4bdf4b0d9..5f1b6badeb15 100644
--- a/drivers/clk/spear/clk-vco-pll.c
+++ b/drivers/clk/spear/clk-vco-pll.c
@@ -1,6 +1,6 @@
 /*
 * Copyright (C) 2012 ST Microelectronics
- * Viresh Kumar <viresh.kumar@st.com>
+ * Viresh Kumar <viresh.linux@gmail.com>
 *
 * This file is licensed under the terms of the GNU General Public
 * License version 2. This program is licensed "as is" without any
diff --git a/drivers/clk/spear/clk.c b/drivers/clk/spear/clk.c
index 376d4e5ff326..7cd63788d546 100644
--- a/drivers/clk/spear/clk.c
+++ b/drivers/clk/spear/clk.c
@@ -1,6 +1,6 @@
 /*
 * Copyright (C) 2012 ST Microelectronics
- * Viresh Kumar <viresh.kumar@st.com>
+ * Viresh Kumar <viresh.linux@gmail.com>
 *
 * This file is licensed under the terms of the GNU General Public
 * License version 2. This program is licensed "as is" without any
diff --git a/drivers/clk/spear/clk.h b/drivers/clk/spear/clk.h
index 3321c46a071c..931737677dfa 100644
--- a/drivers/clk/spear/clk.h
+++ b/drivers/clk/spear/clk.h
@@ -2,7 +2,7 @@
 * Clock framework definitions for SPEAr platform
 *
 * Copyright (C) 2012 ST Microelectronics
- * Viresh Kumar <viresh.kumar@st.com>
+ * Viresh Kumar <viresh.linux@gmail.com>
 *
 * This file is licensed under the terms of the GNU General Public
 * License version 2. This program is licensed "as is" without any
diff --git a/drivers/clk/spear/spear1310_clock.c b/drivers/clk/spear/spear1310_clock.c
index 42b68df9aeef..0fcec2aae19c 100644
--- a/drivers/clk/spear/spear1310_clock.c
+++ b/drivers/clk/spear/spear1310_clock.c
@@ -4,7 +4,7 @@
 * SPEAr1310 machine clock framework source file
 *
 * Copyright (C) 2012 ST Microelectronics
- * Viresh Kumar <viresh.kumar@st.com>
+ * Viresh Kumar <viresh.linux@gmail.com>
 *
 * This file is licensed under the terms of the GNU General Public
 * License version 2. This program is licensed "as is" without any
@@ -345,31 +345,30 @@ static struct frac_rate_tbl gen_rtbl[] = {
 /* clock parents */
 static const char *vco_parents[] = { "osc_24m_clk", "osc_25m_clk", };
 static const char *gpt_parents[] = { "osc_24m_clk", "apb_clk", };
-static const char *uart0_parents[] = { "pll5_clk", "uart_synth_gate_clk", };
+static const char *uart0_parents[] = { "pll5_clk", "uart_syn_gclk", };
-static const char *c3_parents[] = { "pll5_clk", "c3_synth_gate_clk", };
+static const char *c3_parents[] = { "pll5_clk", "c3_syn_gclk", };
-static const char *gmac_phy_input_parents[] = { "gmii_125m_pad_clk", "pll2_clk",
+static const char *gmac_phy_input_parents[] = { "gmii_pad_clk", "pll2_clk",
        "osc_25m_clk", };
-static const char *gmac_phy_parents[] = { "gmac_phy_input_mux_clk",
+static const char *gmac_phy_parents[] = { "phy_input_mclk", "phy_syn_gclk", };
-        "gmac_phy_synth_gate_clk", };
 static const char *clcd_synth_parents[] = { "vco1div4_clk", "pll2_clk", };
-static const char *clcd_pixel_parents[] = { "pll5_clk", "clcd_synth_clk", };
+static const char *clcd_pixel_parents[] = { "pll5_clk", "clcd_syn_clk", };
 static const char *i2s_src_parents[] = { "vco1div2_clk", "none", "pll3_clk",
        "i2s_src_pad_clk", };
-static const char *i2s_ref_parents[] = { "i2s_src_mux_clk", "i2s_prs1_clk", };
+static const char *i2s_ref_parents[] = { "i2s_src_mclk", "i2s_prs1_clk", };
 static const char *gen_synth0_1_parents[] = { "vco1div4_clk", "vco3div2_clk",
        "pll3_clk", };
 static const char *gen_synth2_3_parents[] = { "vco1div4_clk", "vco3div2_clk",
        "pll2_clk", };
 static const char *rmii_phy_parents[] = { "ras_tx50_clk", "none",
-        "ras_pll2_clk", "ras_synth0_clk", };
+        "ras_pll2_clk", "ras_syn0_clk", };
 static const char *smii_rgmii_phy_parents[] = { "none", "ras_tx125_clk",
-        "ras_pll2_clk", "ras_synth0_clk", };
+        "ras_pll2_clk", "ras_syn0_clk", };
-static const char *uart_parents[] = { "ras_apb_clk", "gen_synth3_clk", };
+static const char *uart_parents[] = { "ras_apb_clk", "gen_syn3_clk", };
-static const char *i2c_parents[] = { "ras_apb_clk", "gen_synth1_clk", };
+static const char *i2c_parents[] = { "ras_apb_clk", "gen_syn1_clk", };
-static const char *ssp1_parents[] = { "ras_apb_clk", "gen_synth1_clk",
+static const char *ssp1_parents[] = { "ras_apb_clk", "gen_syn1_clk",
        "ras_plclk0_clk", };
-static const char *pci_parents[] = { "ras_pll3_clk", "gen_synth2_clk", };
+static const char *pci_parents[] = { "ras_pll3_clk", "gen_syn2_clk", };
-static const char *tdm_parents[] = { "ras_pll3_clk", "gen_synth1_clk", };
+static const char *tdm_parents[] = { "ras_pll3_clk", "gen_syn1_clk", };
 void __init spear1310_clk_init(void)
 {
@@ -390,9 +389,9 @@ void __init spear1310_clk_init(void)
                        25000000);
        clk_register_clkdev(clk, "osc_25m_clk", NULL);
-        clk = clk_register_fixed_rate(NULL, "gmii_125m_pad_clk", NULL,
+        clk = clk_register_fixed_rate(NULL, "gmii_pad_clk", NULL, CLK_IS_ROOT,
-                        CLK_IS_ROOT, 125000000);
+                        125000000);
-        clk_register_clkdev(clk, "gmii_125m_pad_clk", NULL);
+        clk_register_clkdev(clk, "gmii_pad_clk", NULL);
        clk = clk_register_fixed_rate(NULL, "i2s_src_pad_clk", NULL,
                        CLK_IS_ROOT, 12288000);
@@ -406,34 +405,34 @@ void __init spear1310_clk_init(void)
        /* clock derived from 24 or 25 MHz osc clk */
        /* vco-pll */
-        clk = clk_register_mux(NULL, "vco1_mux_clk", vco_parents,
+        clk = clk_register_mux(NULL, "vco1_mclk", vco_parents,
                        ARRAY_SIZE(vco_parents), 0, SPEAR1310_PLL_CFG,
                        SPEAR1310_PLL1_CLK_SHIFT, SPEAR1310_PLL_CLK_MASK, 0,
                        &_lock);
-        clk_register_clkdev(clk, "vco1_mux_clk", NULL);
+        clk_register_clkdev(clk, "vco1_mclk", NULL);
-        clk = clk_register_vco_pll("vco1_clk", "pll1_clk", NULL, "vco1_mux_clk",
+        clk = clk_register_vco_pll("vco1_clk", "pll1_clk", NULL, "vco1_mclk",
                        0, SPEAR1310_PLL1_CTR, SPEAR1310_PLL1_FRQ, pll_rtbl,
                        ARRAY_SIZE(pll_rtbl), &_lock, &clk1, NULL);
        clk_register_clkdev(clk, "vco1_clk", NULL);
        clk_register_clkdev(clk1, "pll1_clk", NULL);
-        clk = clk_register_mux(NULL, "vco2_mux_clk", vco_parents,
+        clk = clk_register_mux(NULL, "vco2_mclk", vco_parents,
                        ARRAY_SIZE(vco_parents), 0, SPEAR1310_PLL_CFG,
                        SPEAR1310_PLL2_CLK_SHIFT, SPEAR1310_PLL_CLK_MASK, 0,
                        &_lock);
-        clk_register_clkdev(clk, "vco2_mux_clk", NULL);
+        clk_register_clkdev(clk, "vco2_mclk", NULL);
-        clk = clk_register_vco_pll("vco2_clk", "pll2_clk", NULL, "vco2_mux_clk",
+        clk = clk_register_vco_pll("vco2_clk", "pll2_clk", NULL, "vco2_mclk",
                        0, SPEAR1310_PLL2_CTR, SPEAR1310_PLL2_FRQ, pll_rtbl,
                        ARRAY_SIZE(pll_rtbl), &_lock, &clk1, NULL);
        clk_register_clkdev(clk, "vco2_clk", NULL);
        clk_register_clkdev(clk1, "pll2_clk", NULL);
-        clk = clk_register_mux(NULL, "vco3_mux_clk", vco_parents,
+        clk = clk_register_mux(NULL, "vco3_mclk", vco_parents,
                        ARRAY_SIZE(vco_parents), 0, SPEAR1310_PLL_CFG,
                        SPEAR1310_PLL3_CLK_SHIFT, SPEAR1310_PLL_CLK_MASK, 0,
                        &_lock);
-        clk_register_clkdev(clk, "vco3_mux_clk", NULL);
+        clk_register_clkdev(clk, "vco3_mclk", NULL);
-        clk = clk_register_vco_pll("vco3_clk", "pll3_clk", NULL, "vco3_mux_clk",
+        clk = clk_register_vco_pll("vco3_clk", "pll3_clk", NULL, "vco3_mclk",
                        0, SPEAR1310_PLL3_CTR, SPEAR1310_PLL3_FRQ, pll_rtbl,
                        ARRAY_SIZE(pll_rtbl), &_lock, &clk1, NULL);
        clk_register_clkdev(clk, "vco3_clk", NULL);
@@ -473,7 +472,7 @@ void __init spear1310_clk_init(void)
        /* peripherals */
        clk_register_fixed_factor(NULL, "thermal_clk", "osc_24m_clk", 0, 1,
                        128);
-        clk = clk_register_gate(NULL, "thermal_gate_clk", "thermal_clk", 0,
+        clk = clk_register_gate(NULL, "thermal_gclk", "thermal_clk", 0,
                        SPEAR1310_PERIP2_CLK_ENB, SPEAR1310_THSENS_CLK_ENB, 0,
                        &_lock);
        clk_register_clkdev(clk, NULL, "spear_thermal");
@@ -500,177 +499,176 @@ void __init spear1310_clk_init(void)
        clk_register_clkdev(clk, "apb_clk", NULL);
        /* gpt clocks */
-        clk = clk_register_mux(NULL, "gpt0_mux_clk", gpt_parents,
+        clk = clk_register_mux(NULL, "gpt0_mclk", gpt_parents,
                        ARRAY_SIZE(gpt_parents), 0, SPEAR1310_PERIP_CLK_CFG,
                        SPEAR1310_GPT0_CLK_SHIFT, SPEAR1310_GPT_CLK_MASK, 0,
                        &_lock);
-        clk_register_clkdev(clk, "gpt0_mux_clk", NULL);
+        clk_register_clkdev(clk, "gpt0_mclk", NULL);
-        clk = clk_register_gate(NULL, "gpt0_clk", "gpt0_mux_clk", 0,
+        clk = clk_register_gate(NULL, "gpt0_clk", "gpt0_mclk", 0,
                        SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_GPT0_CLK_ENB, 0,
                        &_lock);
        clk_register_clkdev(clk, NULL, "gpt0");
-        clk = clk_register_mux(NULL, "gpt1_mux_clk", gpt_parents,
+        clk = clk_register_mux(NULL, "gpt1_mclk", gpt_parents,
                        ARRAY_SIZE(gpt_parents), 0, SPEAR1310_PERIP_CLK_CFG,
                        SPEAR1310_GPT1_CLK_SHIFT, SPEAR1310_GPT_CLK_MASK, 0,
                        &_lock);
-        clk_register_clkdev(clk, "gpt1_mux_clk", NULL);
+        clk_register_clkdev(clk, "gpt1_mclk", NULL);
-        clk = clk_register_gate(NULL, "gpt1_clk", "gpt1_mux_clk", 0,
+        clk = clk_register_gate(NULL, "gpt1_clk", "gpt1_mclk", 0,
                        SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_GPT1_CLK_ENB, 0,
                        &_lock);
        clk_register_clkdev(clk, NULL, "gpt1");
-        clk = clk_register_mux(NULL, "gpt2_mux_clk", gpt_parents,
+        clk = clk_register_mux(NULL, "gpt2_mclk", gpt_parents,
                        ARRAY_SIZE(gpt_parents), 0, SPEAR1310_PERIP_CLK_CFG,
                        SPEAR1310_GPT2_CLK_SHIFT, SPEAR1310_GPT_CLK_MASK, 0,
                        &_lock);
-        clk_register_clkdev(clk, "gpt2_mux_clk", NULL);
+        clk_register_clkdev(clk, "gpt2_mclk", NULL);
-        clk = clk_register_gate(NULL, "gpt2_clk", "gpt2_mux_clk", 0,
+        clk = clk_register_gate(NULL, "gpt2_clk", "gpt2_mclk", 0,
                        SPEAR1310_PERIP2_CLK_ENB, SPEAR1310_GPT2_CLK_ENB, 0,
                        &_lock);
        clk_register_clkdev(clk, NULL, "gpt2");
-        clk = clk_register_mux(NULL, "gpt3_mux_clk", gpt_parents,
+        clk = clk_register_mux(NULL, "gpt3_mclk", gpt_parents,
                        ARRAY_SIZE(gpt_parents), 0, SPEAR1310_PERIP_CLK_CFG,
                        SPEAR1310_GPT3_CLK_SHIFT, SPEAR1310_GPT_CLK_MASK, 0,
                        &_lock);
-        clk_register_clkdev(clk, "gpt3_mux_clk", NULL);
+        clk_register_clkdev(clk, "gpt3_mclk", NULL);
-        clk = clk_register_gate(NULL, "gpt3_clk", "gpt3_mux_clk", 0,
+        clk = clk_register_gate(NULL, "gpt3_clk", "gpt3_mclk", 0,
                        SPEAR1310_PERIP2_CLK_ENB, SPEAR1310_GPT3_CLK_ENB, 0,
                        &_lock);
        clk_register_clkdev(clk, NULL, "gpt3");
        /* others */
-        clk = clk_register_aux("uart_synth_clk", "uart_synth_gate_clk",
+        clk = clk_register_aux("uart_syn_clk", "uart_syn_gclk", "vco1div2_clk",
-                        "vco1div2_clk", 0, SPEAR1310_UART_CLK_SYNT, NULL,
+                        0, SPEAR1310_UART_CLK_SYNT, NULL, aux_rtbl,
-                        aux_rtbl, ARRAY_SIZE(aux_rtbl), &_lock, &clk1);
+                        ARRAY_SIZE(aux_rtbl), &_lock, &clk1);
-        clk_register_clkdev(clk, "uart_synth_clk", NULL);
+        clk_register_clkdev(clk, "uart_syn_clk", NULL);
-        clk_register_clkdev(clk1, "uart_synth_gate_clk", NULL);
+        clk_register_clkdev(clk1, "uart_syn_gclk", NULL);
-        clk = clk_register_mux(NULL, "uart0_mux_clk", uart0_parents,
+        clk = clk_register_mux(NULL, "uart0_mclk", uart0_parents,
                        ARRAY_SIZE(uart0_parents), 0, SPEAR1310_PERIP_CLK_CFG,
                        SPEAR1310_UART_CLK_SHIFT, SPEAR1310_UART_CLK_MASK, 0,
                        &_lock);
-        clk_register_clkdev(clk, "uart0_mux_clk", NULL);
+        clk_register_clkdev(clk, "uart0_mclk", NULL);
-        clk = clk_register_gate(NULL, "uart0_clk", "uart0_mux_clk", 0,
+        clk = clk_register_gate(NULL, "uart0_clk", "uart0_mclk", 0,
                        SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_UART_CLK_ENB, 0,
                        &_lock);
        clk_register_clkdev(clk, NULL, "e0000000.serial");
-        clk = clk_register_aux("sdhci_synth_clk", "sdhci_synth_gate_clk",
+        clk = clk_register_aux("sdhci_syn_clk", "sdhci_syn_gclk",
                        "vco1div2_clk", 0, SPEAR1310_SDHCI_CLK_SYNT, NULL,
                        aux_rtbl, ARRAY_SIZE(aux_rtbl), &_lock, &clk1);
-        clk_register_clkdev(clk, "sdhci_synth_clk", NULL);
+        clk_register_clkdev(clk, "sdhci_syn_clk", NULL);
-        clk_register_clkdev(clk1, "sdhci_synth_gate_clk", NULL);
+        clk_register_clkdev(clk1, "sdhci_syn_gclk", NULL);
-        clk = clk_register_gate(NULL, "sdhci_clk", "sdhci_synth_gate_clk", 0,
+        clk = clk_register_gate(NULL, "sdhci_clk", "sdhci_syn_gclk", 0,
                        SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_SDHCI_CLK_ENB, 0,
                        &_lock);
        clk_register_clkdev(clk, NULL, "b3000000.sdhci");
-        clk = clk_register_aux("cfxd_synth_clk", "cfxd_synth_gate_clk",
+        clk = clk_register_aux("cfxd_syn_clk", "cfxd_syn_gclk", "vco1div2_clk",
-                        "vco1div2_clk", 0, SPEAR1310_CFXD_CLK_SYNT, NULL,
+                        0, SPEAR1310_CFXD_CLK_SYNT, NULL, aux_rtbl,
-                        aux_rtbl, ARRAY_SIZE(aux_rtbl), &_lock, &clk1);
+                        ARRAY_SIZE(aux_rtbl), &_lock, &clk1);
-        clk_register_clkdev(clk, "cfxd_synth_clk", NULL);
+        clk_register_clkdev(clk, "cfxd_syn_clk", NULL);
-        clk_register_clkdev(clk1, "cfxd_synth_gate_clk", NULL);
+        clk_register_clkdev(clk1, "cfxd_syn_gclk", NULL);
-        clk = clk_register_gate(NULL, "cfxd_clk", "cfxd_synth_gate_clk", 0,
+        clk = clk_register_gate(NULL, "cfxd_clk", "cfxd_syn_gclk", 0,
                        SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_CFXD_CLK_ENB, 0,
                        &_lock);
        clk_register_clkdev(clk, NULL, "b2800000.cf");
        clk_register_clkdev(clk, NULL, "arasan_xd");
-        clk = clk_register_aux("c3_synth_clk", "c3_synth_gate_clk",
+        clk = clk_register_aux("c3_syn_clk", "c3_syn_gclk", "vco1div2_clk",
-                        "vco1div2_clk", 0, SPEAR1310_C3_CLK_SYNT, NULL,
+                        0, SPEAR1310_C3_CLK_SYNT, NULL, aux_rtbl,
-                        aux_rtbl, ARRAY_SIZE(aux_rtbl), &_lock, &clk1);
+                        ARRAY_SIZE(aux_rtbl), &_lock, &clk1);
-        clk_register_clkdev(clk, "c3_synth_clk", NULL);
+        clk_register_clkdev(clk, "c3_syn_clk", NULL);
-        clk_register_clkdev(clk1, "c3_synth_gate_clk", NULL);
+        clk_register_clkdev(clk1, "c3_syn_gclk", NULL);
-        clk = clk_register_mux(NULL, "c3_mux_clk", c3_parents,
+        clk = clk_register_mux(NULL, "c3_mclk", c3_parents,
                        ARRAY_SIZE(c3_parents), 0, SPEAR1310_PERIP_CLK_CFG,
                        SPEAR1310_C3_CLK_SHIFT, SPEAR1310_C3_CLK_MASK, 0,
                        &_lock);
-        clk_register_clkdev(clk, "c3_mux_clk", NULL);
+        clk_register_clkdev(clk, "c3_mclk", NULL);
-        clk = clk_register_gate(NULL, "c3_clk", "c3_mux_clk", 0,
+        clk = clk_register_gate(NULL, "c3_clk", "c3_mclk", 0,
                        SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_C3_CLK_ENB, 0,
                        &_lock);
        clk_register_clkdev(clk, NULL, "c3");
        /* gmac */
-        clk = clk_register_mux(NULL, "gmac_phy_input_mux_clk",
+        clk = clk_register_mux(NULL, "phy_input_mclk", gmac_phy_input_parents,
-                        gmac_phy_input_parents,
                        ARRAY_SIZE(gmac_phy_input_parents), 0,
                        SPEAR1310_GMAC_CLK_CFG,
                        SPEAR1310_GMAC_PHY_INPUT_CLK_SHIFT,
                        SPEAR1310_GMAC_PHY_INPUT_CLK_MASK, 0, &_lock);
-        clk_register_clkdev(clk, "gmac_phy_input_mux_clk", NULL);
+        clk_register_clkdev(clk, "phy_input_mclk", NULL);
-        clk = clk_register_aux("gmac_phy_synth_clk", "gmac_phy_synth_gate_clk",
+        clk = clk_register_aux("phy_syn_clk", "phy_syn_gclk", "phy_input_mclk",
-                        "gmac_phy_input_mux_clk", 0, SPEAR1310_GMAC_CLK_SYNT,
+                        0, SPEAR1310_GMAC_CLK_SYNT, NULL, gmac_rtbl,
-                        NULL, gmac_rtbl, ARRAY_SIZE(gmac_rtbl), &_lock, &clk1);
+                        ARRAY_SIZE(gmac_rtbl), &_lock, &clk1);
-        clk_register_clkdev(clk, "gmac_phy_synth_clk", NULL);
+        clk_register_clkdev(clk, "phy_syn_clk", NULL);
-        clk_register_clkdev(clk1, "gmac_phy_synth_gate_clk", NULL);
+        clk_register_clkdev(clk1, "phy_syn_gclk", NULL);
-        clk = clk_register_mux(NULL, "gmac_phy_mux_clk", gmac_phy_parents,
+        clk = clk_register_mux(NULL, "phy_mclk", gmac_phy_parents,
                        ARRAY_SIZE(gmac_phy_parents), 0,
                        SPEAR1310_PERIP_CLK_CFG, SPEAR1310_GMAC_PHY_CLK_SHIFT,
                        SPEAR1310_GMAC_PHY_CLK_MASK, 0, &_lock);
        clk_register_clkdev(clk, NULL, "stmmacphy.0");
        /* clcd */
-        clk = clk_register_mux(NULL, "clcd_synth_mux_clk", clcd_synth_parents,
+        clk = clk_register_mux(NULL, "clcd_syn_mclk", clcd_synth_parents,
                        ARRAY_SIZE(clcd_synth_parents), 0,
                        SPEAR1310_CLCD_CLK_SYNT, SPEAR1310_CLCD_SYNT_CLK_SHIFT,
                        SPEAR1310_CLCD_SYNT_CLK_MASK, 0, &_lock);
-        clk_register_clkdev(clk, "clcd_synth_mux_clk", NULL);
+        clk_register_clkdev(clk, "clcd_syn_mclk", NULL);
-        clk = clk_register_frac("clcd_synth_clk", "clcd_synth_mux_clk", 0,
+        clk = clk_register_frac("clcd_syn_clk", "clcd_syn_mclk", 0,
                        SPEAR1310_CLCD_CLK_SYNT, clcd_rtbl,
                        ARRAY_SIZE(clcd_rtbl), &_lock);
-        clk_register_clkdev(clk, "clcd_synth_clk", NULL);
+        clk_register_clkdev(clk, "clcd_syn_clk", NULL);
-        clk = clk_register_mux(NULL, "clcd_pixel_mux_clk", clcd_pixel_parents,
+        clk = clk_register_mux(NULL, "clcd_pixel_mclk", clcd_pixel_parents,
                        ARRAY_SIZE(clcd_pixel_parents), 0,
                        SPEAR1310_PERIP_CLK_CFG, SPEAR1310_CLCD_CLK_SHIFT,
                        SPEAR1310_CLCD_CLK_MASK, 0, &_lock);
        clk_register_clkdev(clk, "clcd_pixel_clk", NULL);
-        clk = clk_register_gate(NULL, "clcd_clk", "clcd_pixel_mux_clk", 0,
+        clk = clk_register_gate(NULL, "clcd_clk", "clcd_pixel_mclk", 0,
                        SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_CLCD_CLK_ENB, 0,
                        &_lock);
        clk_register_clkdev(clk, "clcd_clk", NULL);
        /* i2s */
-        clk = clk_register_mux(NULL, "i2s_src_mux_clk", i2s_src_parents,
+        clk = clk_register_mux(NULL, "i2s_src_mclk", i2s_src_parents,
                        ARRAY_SIZE(i2s_src_parents), 0, SPEAR1310_I2S_CLK_CFG,
                        SPEAR1310_I2S_SRC_CLK_SHIFT, SPEAR1310_I2S_SRC_CLK_MASK,
                        0, &_lock);
        clk_register_clkdev(clk, "i2s_src_clk", NULL);
-        clk = clk_register_aux("i2s_prs1_clk", NULL, "i2s_src_mux_clk", 0,
+        clk = clk_register_aux("i2s_prs1_clk", NULL, "i2s_src_mclk", 0,
                        SPEAR1310_I2S_CLK_CFG, &i2s_prs1_masks, i2s_prs1_rtbl,
                        ARRAY_SIZE(i2s_prs1_rtbl), &_lock, NULL);
        clk_register_clkdev(clk, "i2s_prs1_clk", NULL);
-        clk = clk_register_mux(NULL, "i2s_ref_mux_clk", i2s_ref_parents,
+        clk = clk_register_mux(NULL, "i2s_ref_mclk", i2s_ref_parents,
                        ARRAY_SIZE(i2s_ref_parents), 0, SPEAR1310_I2S_CLK_CFG,
                        SPEAR1310_I2S_REF_SHIFT, SPEAR1310_I2S_REF_SEL_MASK, 0,
                        &_lock);
        clk_register_clkdev(clk, "i2s_ref_clk", NULL);
-        clk = clk_register_gate(NULL, "i2s_ref_pad_clk", "i2s_ref_mux_clk", 0,
+        clk = clk_register_gate(NULL, "i2s_ref_pad_clk", "i2s_ref_mclk", 0,
                        SPEAR1310_PERIP2_CLK_ENB, SPEAR1310_I2S_REF_PAD_CLK_ENB,
                        0, &_lock);
        clk_register_clkdev(clk, "i2s_ref_pad_clk", NULL);
-        clk = clk_register_aux("i2s_sclk_clk", "i2s_sclk_gate_clk",
+        clk = clk_register_aux("i2s_sclk_clk", "i2s_sclk_gclk",
                        "i2s_ref_pad_clk", 0, SPEAR1310_I2S_CLK_CFG,
                        &i2s_sclk_masks, i2s_sclk_rtbl,
                        ARRAY_SIZE(i2s_sclk_rtbl), &_lock, &clk1);
        clk_register_clkdev(clk, "i2s_sclk_clk", NULL);
-        clk_register_clkdev(clk1, "i2s_sclk_gate_clk", NULL);
+        clk_register_clkdev(clk1, "i2s_sclk_gclk", NULL);
        /* clock derived from ahb clk */
        clk = clk_register_gate(NULL, "i2c0_clk", "ahb_clk", 0,
@@ -747,13 +745,13 @@ void __init spear1310_clk_init(void)
                        &_lock);
        clk_register_clkdev(clk, "sysram1_clk", NULL);
-        clk = clk_register_aux("adc_synth_clk", "adc_synth_gate_clk", "ahb_clk",
+        clk = clk_register_aux("adc_syn_clk", "adc_syn_gclk", "ahb_clk",
                        0, SPEAR1310_ADC_CLK_SYNT, NULL, adc_rtbl,
                        ARRAY_SIZE(adc_rtbl), &_lock, &clk1);
-        clk_register_clkdev(clk, "adc_synth_clk", NULL);
+        clk_register_clkdev(clk, "adc_syn_clk", NULL);
-        clk_register_clkdev(clk1, "adc_synth_gate_clk", NULL);
+        clk_register_clkdev(clk1, "adc_syn_gclk", NULL);
-        clk = clk_register_gate(NULL, "adc_clk", "adc_synth_gate_clk", 0,
+        clk = clk_register_gate(NULL, "adc_clk", "adc_syn_gclk", 0,
                        SPEAR1310_PERIP1_CLK_ENB, SPEAR1310_ADC_CLK_ENB, 0,
                        &_lock);
        clk_register_clkdev(clk, NULL, "adc_clk");
@@ -790,37 +788,37 @@ void __init spear1310_clk_init(void)
        clk_register_clkdev(clk, NULL, "e0300000.kbd");
        /* RAS clks */
-        clk = clk_register_mux(NULL, "gen_synth0_1_mux_clk",
+        clk = clk_register_mux(NULL, "gen_syn0_1_mclk", gen_synth0_1_parents,
-                        gen_synth0_1_parents, ARRAY_SIZE(gen_synth0_1_parents),
+                        ARRAY_SIZE(gen_synth0_1_parents), 0, SPEAR1310_PLL_CFG,
-                        0, SPEAR1310_PLL_CFG, SPEAR1310_RAS_SYNT0_1_CLK_SHIFT,
+                        SPEAR1310_RAS_SYNT0_1_CLK_SHIFT,
                        SPEAR1310_RAS_SYNT_CLK_MASK, 0, &_lock);
-        clk_register_clkdev(clk, "gen_synth0_1_clk", NULL);
+        clk_register_clkdev(clk, "gen_syn0_1_clk", NULL);
-        clk = clk_register_mux(NULL, "gen_synth2_3_mux_clk",
+        clk = clk_register_mux(NULL, "gen_syn2_3_mclk", gen_synth2_3_parents,
-                        gen_synth2_3_parents, ARRAY_SIZE(gen_synth2_3_parents),
+                        ARRAY_SIZE(gen_synth2_3_parents), 0, SPEAR1310_PLL_CFG,
-                        0, SPEAR1310_PLL_CFG, SPEAR1310_RAS_SYNT2_3_CLK_SHIFT,
+                        SPEAR1310_RAS_SYNT2_3_CLK_SHIFT,
                        SPEAR1310_RAS_SYNT_CLK_MASK, 0, &_lock);
-        clk_register_clkdev(clk, "gen_synth2_3_clk", NULL);
+        clk_register_clkdev(clk, "gen_syn2_3_clk", NULL);
-        clk = clk_register_frac("gen_synth0_clk", "gen_synth0_1_clk", 0,
+        clk = clk_register_frac("gen_syn0_clk", "gen_syn0_1_clk", 0,
                        SPEAR1310_RAS_CLK_SYNT0, gen_rtbl, ARRAY_SIZE(gen_rtbl),
                        &_lock);
-        clk_register_clkdev(clk, "gen_synth0_clk", NULL);
+        clk_register_clkdev(clk, "gen_syn0_clk", NULL);
-        clk = clk_register_frac("gen_synth1_clk", "gen_synth0_1_clk", 0,
+        clk = clk_register_frac("gen_syn1_clk", "gen_syn0_1_clk", 0,
                        SPEAR1310_RAS_CLK_SYNT1, gen_rtbl, ARRAY_SIZE(gen_rtbl),
                        &_lock);
-        clk_register_clkdev(clk, "gen_synth1_clk", NULL);
+        clk_register_clkdev(clk, "gen_syn1_clk", NULL);
-        clk = clk_register_frac("gen_synth2_clk", "gen_synth2_3_clk", 0,
+        clk = clk_register_frac("gen_syn2_clk", "gen_syn2_3_clk", 0,
                        SPEAR1310_RAS_CLK_SYNT2, gen_rtbl, ARRAY_SIZE(gen_rtbl),
                        &_lock);
-        clk_register_clkdev(clk, "gen_synth2_clk", NULL);
+        clk_register_clkdev(clk, "gen_syn2_clk", NULL);
-        clk = clk_register_frac("gen_synth3_clk", "gen_synth2_3_clk", 0,
+        clk = clk_register_frac("gen_syn3_clk", "gen_syn2_3_clk", 0,
                        SPEAR1310_RAS_CLK_SYNT3, gen_rtbl, ARRAY_SIZE(gen_rtbl),
                        &_lock);
-        clk_register_clkdev(clk, "gen_synth3_clk", NULL);
+        clk_register_clkdev(clk, "gen_syn3_clk", NULL);
        clk = clk_register_gate(NULL, "ras_osc_24m_clk", "osc_24m_clk", 0,
                        SPEAR1310_RAS_CLK_ENB, SPEAR1310_OSC_24M_CLK_ENB, 0,
@@ -847,7 +845,7 @@ void __init spear1310_clk_init(void)
                        &_lock);
        clk_register_clkdev(clk, "ras_pll3_clk", NULL);
-        clk = clk_register_gate(NULL, "ras_tx125_clk", "gmii_125m_pad_clk", 0,
+        clk = clk_register_gate(NULL, "ras_tx125_clk", "gmii_pad_clk", 0,
                        SPEAR1310_RAS_CLK_ENB, SPEAR1310_C125M_PAD_CLK_ENB, 0,
                        &_lock);
        clk_register_clkdev(clk, "ras_tx125_clk", NULL);
@@ -912,7 +910,7 @@ void __init spear1310_clk_init(void)
                        &_lock);
        clk_register_clkdev(clk, NULL, "5c700000.eth");
-        clk = clk_register_mux(NULL, "smii_rgmii_phy_mux_clk",
+        clk = clk_register_mux(NULL, "smii_rgmii_phy_mclk",
                        smii_rgmii_phy_parents,
                        ARRAY_SIZE(smii_rgmii_phy_parents), 0,
                        SPEAR1310_RAS_CTRL_REG1,
@@ -922,184 +920,184 @@ void __init spear1310_clk_init(void)
        clk_register_clkdev(clk, NULL, "stmmacphy.2");
        clk_register_clkdev(clk, NULL, "stmmacphy.4");
-        clk = clk_register_mux(NULL, "rmii_phy_mux_clk", rmii_phy_parents,
+        clk = clk_register_mux(NULL, "rmii_phy_mclk", rmii_phy_parents,
                        ARRAY_SIZE(rmii_phy_parents), 0,
                        SPEAR1310_RAS_CTRL_REG1, SPEAR1310_RMII_PHY_CLK_SHIFT,
                        SPEAR1310_PHY_CLK_MASK, 0, &_lock);
        clk_register_clkdev(clk, NULL, "stmmacphy.3");
-        clk = clk_register_mux(NULL, "uart1_mux_clk", uart_parents,
+        clk = clk_register_mux(NULL, "uart1_mclk", uart_parents,
                        ARRAY_SIZE(uart_parents), 0, SPEAR1310_RAS_CTRL_REG0,
                        SPEAR1310_UART1_CLK_SHIFT, SPEAR1310_RAS_UART_CLK_MASK,
                        0, &_lock);
-        clk_register_clkdev(clk, "uart1_mux_clk", NULL);
+        clk_register_clkdev(clk, "uart1_mclk", NULL);
-        clk = clk_register_gate(NULL, "uart1_clk", "uart1_mux_clk", 0,
+        clk = clk_register_gate(NULL, "uart1_clk", "uart1_mclk", 0,
                        SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_UART1_CLK_ENB, 0,
                        &_lock);
        clk_register_clkdev(clk, NULL, "5c800000.serial");
-        clk = clk_register_mux(NULL, "uart2_mux_clk", uart_parents,
+        clk = clk_register_mux(NULL, "uart2_mclk", uart_parents,
                        ARRAY_SIZE(uart_parents), 0, SPEAR1310_RAS_CTRL_REG0,
                        SPEAR1310_UART2_CLK_SHIFT, SPEAR1310_RAS_UART_CLK_MASK,
                        0, &_lock);
-        clk_register_clkdev(clk, "uart2_mux_clk", NULL);
+        clk_register_clkdev(clk, "uart2_mclk", NULL);
-        clk = clk_register_gate(NULL, "uart2_clk", "uart2_mux_clk", 0,
+        clk = clk_register_gate(NULL, "uart2_clk", "uart2_mclk", 0,
                        SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_UART2_CLK_ENB, 0,
                        &_lock);
        clk_register_clkdev(clk, NULL, "5c900000.serial");
-        clk = clk_register_mux(NULL, "uart3_mux_clk", uart_parents,
+        clk = clk_register_mux(NULL, "uart3_mclk", uart_parents,
                        ARRAY_SIZE(uart_parents), 0, SPEAR1310_RAS_CTRL_REG0,
                        SPEAR1310_UART3_CLK_SHIFT, SPEAR1310_RAS_UART_CLK_MASK,
                        0, &_lock);
-        clk_register_clkdev(clk, "uart3_mux_clk", NULL);
+        clk_register_clkdev(clk, "uart3_mclk", NULL);
-        clk = clk_register_gate(NULL, "uart3_clk", "uart3_mux_clk", 0,
+        clk = clk_register_gate(NULL, "uart3_clk", "uart3_mclk", 0,
                        SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_UART3_CLK_ENB, 0,
                        &_lock);
        clk_register_clkdev(clk, NULL, "5ca00000.serial");
-        clk = clk_register_mux(NULL, "uart4_mux_clk", uart_parents,
+        clk = clk_register_mux(NULL, "uart4_mclk", uart_parents,
                        ARRAY_SIZE(uart_parents), 0, SPEAR1310_RAS_CTRL_REG0,
                        SPEAR1310_UART4_CLK_SHIFT, SPEAR1310_RAS_UART_CLK_MASK,
                        0, &_lock);
-        clk_register_clkdev(clk, "uart4_mux_clk", NULL);
+        clk_register_clkdev(clk, "uart4_mclk", NULL);
-        clk = clk_register_gate(NULL, "uart4_clk", "uart4_mux_clk", 0,
+        clk = clk_register_gate(NULL, "uart4_clk", "uart4_mclk", 0,
                        SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_UART4_CLK_ENB, 0,
                        &_lock);
        clk_register_clkdev(clk, NULL, "5cb00000.serial");
-        clk = clk_register_mux(NULL, "uart5_mux_clk", uart_parents,
+        clk = clk_register_mux(NULL, "uart5_mclk", uart_parents,
                        ARRAY_SIZE(uart_parents), 0, SPEAR1310_RAS_CTRL_REG0,
                        SPEAR1310_UART5_CLK_SHIFT, SPEAR1310_RAS_UART_CLK_MASK,
                        0, &_lock);
-        clk_register_clkdev(clk, "uart5_mux_clk", NULL);
+        clk_register_clkdev(clk, "uart5_mclk", NULL);
-        clk = clk_register_gate(NULL, "uart5_clk", "uart5_mux_clk", 0,
+        clk = clk_register_gate(NULL, "uart5_clk", "uart5_mclk", 0,
                        SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_UART5_CLK_ENB, 0,
                        &_lock);
        clk_register_clkdev(clk, NULL, "5cc00000.serial");
-        clk = clk_register_mux(NULL, "i2c1_mux_clk", i2c_parents,
+        clk = clk_register_mux(NULL, "i2c1_mclk", i2c_parents,
                        ARRAY_SIZE(i2c_parents), 0, SPEAR1310_RAS_CTRL_REG0,
                        SPEAR1310_I2C1_CLK_SHIFT, SPEAR1310_I2C_CLK_MASK, 0,
                        &_lock);
-        clk_register_clkdev(clk, "i2c1_mux_clk", NULL);
+        clk_register_clkdev(clk, "i2c1_mclk", NULL);
-        clk = clk_register_gate(NULL, "i2c1_clk", "i2c1_mux_clk", 0,
+        clk = clk_register_gate(NULL, "i2c1_clk", "i2c1_mclk", 0,
                        SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_I2C1_CLK_ENB, 0,
                        &_lock);
        clk_register_clkdev(clk, NULL, "5cd00000.i2c");
-        clk = clk_register_mux(NULL, "i2c2_mux_clk", i2c_parents,
+        clk = clk_register_mux(NULL, "i2c2_mclk", i2c_parents,
                        ARRAY_SIZE(i2c_parents), 0, SPEAR1310_RAS_CTRL_REG0,
                        SPEAR1310_I2C2_CLK_SHIFT, SPEAR1310_I2C_CLK_MASK, 0,
                        &_lock);
-        clk_register_clkdev(clk, "i2c2_mux_clk", NULL);
+        clk_register_clkdev(clk, "i2c2_mclk", NULL);
-        clk = clk_register_gate(NULL, "i2c2_clk", "i2c2_mux_clk", 0,
+        clk = clk_register_gate(NULL, "i2c2_clk", "i2c2_mclk", 0,
                        SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_I2C2_CLK_ENB, 0,
                        &_lock);
        clk_register_clkdev(clk, NULL, "5ce00000.i2c");
-        clk = clk_register_mux(NULL, "i2c3_mux_clk", i2c_parents,
+        clk = clk_register_mux(NULL, "i2c3_mclk", i2c_parents,
                        ARRAY_SIZE(i2c_parents), 0, SPEAR1310_RAS_CTRL_REG0,
                        SPEAR1310_I2C3_CLK_SHIFT, SPEAR1310_I2C_CLK_MASK, 0,
                        &_lock);
-        clk_register_clkdev(clk, "i2c3_mux_clk", NULL);
+        clk_register_clkdev(clk, "i2c3_mclk", NULL);
-        clk = clk_register_gate(NULL, "i2c3_clk", "i2c3_mux_clk", 0,
+        clk = clk_register_gate(NULL, "i2c3_clk", "i2c3_mclk", 0,
                        SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_I2C3_CLK_ENB, 0,
                        &_lock);
        clk_register_clkdev(clk, NULL, "5cf00000.i2c");
-        clk = clk_register_mux(NULL, "i2c4_mux_clk", i2c_parents,
+        clk = clk_register_mux(NULL, "i2c4_mclk", i2c_parents,
                        ARRAY_SIZE(i2c_parents), 0, SPEAR1310_RAS_CTRL_REG0,
                        SPEAR1310_I2C4_CLK_SHIFT, SPEAR1310_I2C_CLK_MASK, 0,
                        &_lock);
-        clk_register_clkdev(clk, "i2c4_mux_clk", NULL);
+        clk_register_clkdev(clk, "i2c4_mclk", NULL);
-        clk = clk_register_gate(NULL, "i2c4_clk", "i2c4_mux_clk", 0,
+        clk = clk_register_gate(NULL, "i2c4_clk", "i2c4_mclk", 0,
                        SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_I2C4_CLK_ENB, 0,
                        &_lock);
        clk_register_clkdev(clk, NULL, "5d000000.i2c");
-        clk = clk_register_mux(NULL, "i2c5_mux_clk", i2c_parents,
+        clk = clk_register_mux(NULL, "i2c5_mclk", i2c_parents,
                        ARRAY_SIZE(i2c_parents), 0, SPEAR1310_RAS_CTRL_REG0,
                        SPEAR1310_I2C5_CLK_SHIFT, SPEAR1310_I2C_CLK_MASK, 0,
                        &_lock);
-        clk_register_clkdev(clk, "i2c5_mux_clk", NULL);
+        clk_register_clkdev(clk, "i2c5_mclk", NULL);
-        clk = clk_register_gate(NULL, "i2c5_clk", "i2c5_mux_clk", 0,
+        clk = clk_register_gate(NULL, "i2c5_clk", "i2c5_mclk", 0,
                        SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_I2C5_CLK_ENB, 0,
                        &_lock);
        clk_register_clkdev(clk, NULL, "5d100000.i2c");
-        clk = clk_register_mux(NULL, "i2c6_mux_clk", i2c_parents,
+        clk = clk_register_mux(NULL, "i2c6_mclk", i2c_parents,
                        ARRAY_SIZE(i2c_parents), 0, SPEAR1310_RAS_CTRL_REG0,
                        SPEAR1310_I2C6_CLK_SHIFT, SPEAR1310_I2C_CLK_MASK, 0,
                        &_lock);
-        clk_register_clkdev(clk, "i2c6_mux_clk", NULL);
+        clk_register_clkdev(clk, "i2c6_mclk", NULL);
-        clk = clk_register_gate(NULL, "i2c6_clk", "i2c6_mux_clk", 0,
+        clk = clk_register_gate(NULL, "i2c6_clk", "i2c6_mclk", 0,
                        SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_I2C6_CLK_ENB, 0,
                        &_lock);
        clk_register_clkdev(clk, NULL, "5d200000.i2c");
-        clk = clk_register_mux(NULL, "i2c7_mux_clk", i2c_parents,
+        clk = clk_register_mux(NULL, "i2c7_mclk", i2c_parents,
                        ARRAY_SIZE(i2c_parents), 0, SPEAR1310_RAS_CTRL_REG0,
                        SPEAR1310_I2C7_CLK_SHIFT, SPEAR1310_I2C_CLK_MASK, 0,
                        &_lock);
-        clk_register_clkdev(clk, "i2c7_mux_clk", NULL);
+        clk_register_clkdev(clk, "i2c7_mclk", NULL);
-        clk = clk_register_gate(NULL, "i2c7_clk", "i2c7_mux_clk", 0,
+        clk = clk_register_gate(NULL, "i2c7_clk", "i2c7_mclk", 0,
                        SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_I2C7_CLK_ENB, 0,
                        &_lock);
        clk_register_clkdev(clk, NULL, "5d300000.i2c");
-        clk = clk_register_mux(NULL, "ssp1_mux_clk", ssp1_parents,
+        clk = clk_register_mux(NULL, "ssp1_mclk", ssp1_parents,
                        ARRAY_SIZE(ssp1_parents), 0, SPEAR1310_RAS_CTRL_REG0,
                        SPEAR1310_SSP1_CLK_SHIFT, SPEAR1310_SSP1_CLK_MASK, 0,
                        &_lock);
-        clk_register_clkdev(clk, "ssp1_mux_clk", NULL);
+        clk_register_clkdev(clk, "ssp1_mclk", NULL);
-        clk = clk_register_gate(NULL, "ssp1_clk", "ssp1_mux_clk", 0,
+        clk = clk_register_gate(NULL, "ssp1_clk", "ssp1_mclk", 0,
                        SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_SSP1_CLK_ENB, 0,
                        &_lock);
        clk_register_clkdev(clk, NULL, "5d400000.spi");
-        clk = clk_register_mux(NULL, "pci_mux_clk", pci_parents,
+        clk = clk_register_mux(NULL, "pci_mclk", pci_parents,
                        ARRAY_SIZE(pci_parents), 0, SPEAR1310_RAS_CTRL_REG0,
                        SPEAR1310_PCI_CLK_SHIFT, SPEAR1310_PCI_CLK_MASK, 0,
                        &_lock);
-        clk_register_clkdev(clk, "pci_mux_clk", NULL);
+        clk_register_clkdev(clk, "pci_mclk", NULL);
-        clk = clk_register_gate(NULL, "pci_clk", "pci_mux_clk", 0,
+        clk = clk_register_gate(NULL, "pci_clk", "pci_mclk", 0,
                        SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_PCI_CLK_ENB, 0,
                        &_lock);
        clk_register_clkdev(clk, NULL, "pci");
-        clk = clk_register_mux(NULL, "tdm1_mux_clk", tdm_parents,
+        clk = clk_register_mux(NULL, "tdm1_mclk", tdm_parents,
                        ARRAY_SIZE(tdm_parents), 0, SPEAR1310_RAS_CTRL_REG0,
                        SPEAR1310_TDM1_CLK_SHIFT, SPEAR1310_TDM_CLK_MASK, 0,
                        &_lock);
-        clk_register_clkdev(clk, "tdm1_mux_clk", NULL);
+        clk_register_clkdev(clk, "tdm1_mclk", NULL);
-        clk = clk_register_gate(NULL, "tdm1_clk", "tdm1_mux_clk", 0,
+        clk = clk_register_gate(NULL, "tdm1_clk", "tdm1_mclk", 0,
                        SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_TDM1_CLK_ENB, 0,
                        &_lock);
        clk_register_clkdev(clk, NULL, "tdm_hdlc.0");
-        clk = clk_register_mux(NULL, "tdm2_mux_clk", tdm_parents,
+        clk = clk_register_mux(NULL, "tdm2_mclk", tdm_parents,
                        ARRAY_SIZE(tdm_parents), 0, SPEAR1310_RAS_CTRL_REG0,
                        SPEAR1310_TDM2_CLK_SHIFT, SPEAR1310_TDM_CLK_MASK, 0,
                        &_lock);
-        clk_register_clkdev(clk, "tdm2_mux_clk", NULL);
+        clk_register_clkdev(clk, "tdm2_mclk", NULL);
-        clk = clk_register_gate(NULL, "tdm2_clk", "tdm2_mux_clk", 0,
+        clk = clk_register_gate(NULL, "tdm2_clk", "tdm2_mclk", 0,
                        SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_TDM2_CLK_ENB, 0,
                        &_lock);
        clk_register_clkdev(clk, NULL, "tdm_hdlc.1");
diff --git a/drivers/clk/spear/spear1340_clock.c b/drivers/clk/spear/spear1340_clock.c
index f130919d5bf8..2352cee7f645 100644
--- a/drivers/clk/spear/spear1340_clock.c
+++ b/drivers/clk/spear/spear1340_clock.c
@@ -4,7 +4,7 @@
 * SPEAr1340 machine clock framework source file
 *
 * Copyright (C) 2012 ST Microelectronics
- * Viresh Kumar <viresh.kumar@st.com>
+ * Viresh Kumar <viresh.linux@gmail.com>
 *
 * This file is licensed under the terms of the GNU General Public
 * License version 2. This program is licensed "as is" without any
@@ -369,27 +369,25 @@ static struct frac_rate_tbl gen_rtbl[] = {
 /* clock parents */
 static const char *vco_parents[] = { "osc_24m_clk", "osc_25m_clk", };
-static const char *sys_parents[] = { "none", "pll1_clk", "none", "none",
+static const char *sys_parents[] = { "pll1_clk", "pll1_clk", "pll1_clk",
-        "sys_synth_clk", "none", "pll2_clk", "pll3_clk", };
+        "pll1_clk", "sys_synth_clk", "sys_synth_clk", "pll2_clk", "pll3_clk", };
-static const char *ahb_parents[] = { "cpu_div3_clk", "amba_synth_clk", };
+static const char *ahb_parents[] = { "cpu_div3_clk", "amba_syn_clk", };
 static const char *gpt_parents[] = { "osc_24m_clk", "apb_clk", };
 static const char *uart0_parents[] = { "pll5_clk", "osc_24m_clk",
-        "uart0_synth_gate_clk", };
+        "uart0_syn_gclk", };
 static const char *uart1_parents[] = { "pll5_clk", "osc_24m_clk",
-        "uart1_synth_gate_clk", };
+        "uart1_syn_gclk", };
-static const char *c3_parents[] = { "pll5_clk", "c3_synth_gate_clk", };
+static const char *c3_parents[] = { "pll5_clk", "c3_syn_gclk", };
-static const char *gmac_phy_input_parents[] = { "gmii_125m_pad_clk", "pll2_clk",
+static const char *gmac_phy_input_parents[] = { "gmii_pad_clk", "pll2_clk",
        "osc_25m_clk", };
-static const char *gmac_phy_parents[] = { "gmac_phy_input_mux_clk",
+static const char *gmac_phy_parents[] = { "phy_input_mclk", "phy_syn_gclk", };
-        "gmac_phy_synth_gate_clk", };
 static const char *clcd_synth_parents[] = { "vco1div4_clk", "pll2_clk", };
-static const char *clcd_pixel_parents[] = { "pll5_clk", "clcd_synth_clk", };
+static const char *clcd_pixel_parents[] = { "pll5_clk", "clcd_syn_clk", };
 static const char *i2s_src_parents[] = { "vco1div2_clk", "pll2_clk", "pll3_clk",
        "i2s_src_pad_clk", };
-static const char *i2s_ref_parents[] = { "i2s_src_mux_clk", "i2s_prs1_clk", };
+static const char *i2s_ref_parents[] = { "i2s_src_mclk", "i2s_prs1_clk", };
-static const char *spdif_out_parents[] = { "i2s_src_pad_clk", "gen_synth2_clk",
+static const char *spdif_out_parents[] = { "i2s_src_pad_clk", "gen_syn2_clk", };
-};
+static const char *spdif_in_parents[] = { "pll2_clk", "gen_syn3_clk", };
-static const char *spdif_in_parents[] = { "pll2_clk", "gen_synth3_clk", };
 static const char *gen_synth0_1_parents[] = { "vco1div4_clk", "vco3div2_clk",
        "pll3_clk", };
@@ -415,9 +413,9 @@ void __init spear1340_clk_init(void)
                        25000000);
        clk_register_clkdev(clk, "osc_25m_clk", NULL);
-        clk = clk_register_fixed_rate(NULL, "gmii_125m_pad_clk", NULL,
+        clk = clk_register_fixed_rate(NULL, "gmii_pad_clk", NULL, CLK_IS_ROOT,
-                        CLK_IS_ROOT, 125000000);
+                        125000000);
-        clk_register_clkdev(clk, "gmii_125m_pad_clk", NULL);
+        clk_register_clkdev(clk, "gmii_pad_clk", NULL);
        clk = clk_register_fixed_rate(NULL, "i2s_src_pad_clk", NULL,
                        CLK_IS_ROOT, 12288000);
@@ -431,35 +429,35 @@ void __init spear1340_clk_init(void)
        /* clock derived from 24 or 25 MHz osc clk */
        /* vco-pll */
-        clk = clk_register_mux(NULL, "vco1_mux_clk", vco_parents,
+        clk = clk_register_mux(NULL, "vco1_mclk", vco_parents,
                        ARRAY_SIZE(vco_parents), 0, SPEAR1340_PLL_CFG,
                        SPEAR1340_PLL1_CLK_SHIFT, SPEAR1340_PLL_CLK_MASK, 0,
                        &_lock);
-        clk_register_clkdev(clk, "vco1_mux_clk", NULL);
+        clk_register_clkdev(clk, "vco1_mclk", NULL);
-        clk = clk_register_vco_pll("vco1_clk", "pll1_clk", NULL, "vco1_mux_clk",
+        clk = clk_register_vco_pll("vco1_clk", "pll1_clk", NULL, "vco1_mclk", 0,
-                        0, SPEAR1340_PLL1_CTR, SPEAR1340_PLL1_FRQ, pll_rtbl,
+                        SPEAR1340_PLL1_CTR, SPEAR1340_PLL1_FRQ, pll_rtbl,
                        ARRAY_SIZE(pll_rtbl), &_lock, &clk1, NULL);
        clk_register_clkdev(clk, "vco1_clk", NULL);
        clk_register_clkdev(clk1, "pll1_clk", NULL);
-        clk = clk_register_mux(NULL, "vco2_mux_clk", vco_parents,
+        clk = clk_register_mux(NULL, "vco2_mclk", vco_parents,
                        ARRAY_SIZE(vco_parents), 0, SPEAR1340_PLL_CFG,
                        SPEAR1340_PLL2_CLK_SHIFT, SPEAR1340_PLL_CLK_MASK, 0,
                        &_lock);
-        clk_register_clkdev(clk, "vco2_mux_clk", NULL);
+        clk_register_clkdev(clk, "vco2_mclk", NULL);
-        clk = clk_register_vco_pll("vco2_clk", "pll2_clk", NULL, "vco2_mux_clk",
+        clk = clk_register_vco_pll("vco2_clk", "pll2_clk", NULL, "vco2_mclk", 0,
-                        0, SPEAR1340_PLL2_CTR, SPEAR1340_PLL2_FRQ, pll_rtbl,
+                        SPEAR1340_PLL2_CTR, SPEAR1340_PLL2_FRQ, pll_rtbl,
                        ARRAY_SIZE(pll_rtbl), &_lock, &clk1, NULL);
        clk_register_clkdev(clk, "vco2_clk", NULL);
        clk_register_clkdev(clk1, "pll2_clk", NULL);
-        clk = clk_register_mux(NULL, "vco3_mux_clk", vco_parents,
+        clk = clk_register_mux(NULL, "vco3_mclk", vco_parents,
                        ARRAY_SIZE(vco_parents), 0, SPEAR1340_PLL_CFG,
                        SPEAR1340_PLL3_CLK_SHIFT, SPEAR1340_PLL_CLK_MASK, 0,
                        &_lock);
-        clk_register_clkdev(clk, "vco3_mux_clk", NULL);
+        clk_register_clkdev(clk, "vco3_mclk", NULL);
-        clk = clk_register_vco_pll("vco3_clk", "pll3_clk", NULL, "vco3_mux_clk",
+        clk = clk_register_vco_pll("vco3_clk", "pll3_clk", NULL, "vco3_mclk", 0,
-                        0, SPEAR1340_PLL3_CTR, SPEAR1340_PLL3_FRQ, pll_rtbl,
+                        SPEAR1340_PLL3_CTR, SPEAR1340_PLL3_FRQ, pll_rtbl,
                        ARRAY_SIZE(pll_rtbl), &_lock, &clk1, NULL);
        clk_register_clkdev(clk, "vco3_clk", NULL);
        clk_register_clkdev(clk1, "pll3_clk", NULL);
@@ -498,7 +496,7 @@ void __init spear1340_clk_init(void)
        /* peripherals */
        clk_register_fixed_factor(NULL, "thermal_clk", "osc_24m_clk", 0, 1,
                        128);
-        clk = clk_register_gate(NULL, "thermal_gate_clk", "thermal_clk", 0,
+        clk = clk_register_gate(NULL, "thermal_gclk", "thermal_clk", 0,
                        SPEAR1340_PERIP2_CLK_ENB, SPEAR1340_THSENS_CLK_ENB, 0,
                        &_lock);
        clk_register_clkdev(clk, NULL, "spear_thermal");
@@ -509,23 +507,23 @@ void __init spear1340_clk_init(void)
        clk_register_clkdev(clk, "ddr_clk", NULL);
        /* clock derived from pll1 clk */
-        clk = clk_register_frac("sys_synth_clk", "vco1div2_clk", 0,
+        clk = clk_register_frac("sys_syn_clk", "vco1div2_clk", 0,
                        SPEAR1340_SYS_CLK_SYNT, sys_synth_rtbl,
                        ARRAY_SIZE(sys_synth_rtbl), &_lock);
-        clk_register_clkdev(clk, "sys_synth_clk", NULL);
+        clk_register_clkdev(clk, "sys_syn_clk", NULL);
-        clk = clk_register_frac("amba_synth_clk", "vco1div2_clk", 0,
+        clk = clk_register_frac("amba_syn_clk", "vco1div2_clk", 0,
                        SPEAR1340_AMBA_CLK_SYNT, amba_synth_rtbl,
                        ARRAY_SIZE(amba_synth_rtbl), &_lock);
-        clk_register_clkdev(clk, "amba_synth_clk", NULL);
+        clk_register_clkdev(clk, "amba_syn_clk", NULL);
-        clk = clk_register_mux(NULL, "sys_mux_clk", sys_parents,
+        clk = clk_register_mux(NULL, "sys_mclk", sys_parents,
                        ARRAY_SIZE(sys_parents), 0, SPEAR1340_SYS_CLK_CTRL,
                        SPEAR1340_SCLK_SRC_SEL_SHIFT,
                        SPEAR1340_SCLK_SRC_SEL_MASK, 0, &_lock);
        clk_register_clkdev(clk, "sys_clk", NULL);
-        clk = clk_register_fixed_factor(NULL, "cpu_clk", "sys_mux_clk", 0, 1,
+        clk = clk_register_fixed_factor(NULL, "cpu_clk", "sys_mclk", 0, 1,
                        2);
        clk_register_clkdev(clk, "cpu_clk", NULL);
@@ -548,194 +546,193 @@ void __init spear1340_clk_init(void)
        clk_register_clkdev(clk, "apb_clk", NULL);
        /* gpt clocks */
-        clk = clk_register_mux(NULL, "gpt0_mux_clk", gpt_parents,
+        clk = clk_register_mux(NULL, "gpt0_mclk", gpt_parents,
                        ARRAY_SIZE(gpt_parents), 0, SPEAR1340_PERIP_CLK_CFG,
                        SPEAR1340_GPT0_CLK_SHIFT, SPEAR1340_GPT_CLK_MASK, 0,
                        &_lock);
-        clk_register_clkdev(clk, "gpt0_mux_clk", NULL);
+        clk_register_clkdev(clk, "gpt0_mclk", NULL);
-        clk = clk_register_gate(NULL, "gpt0_clk", "gpt0_mux_clk", 0,
+        clk = clk_register_gate(NULL, "gpt0_clk", "gpt0_mclk", 0,
                        SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_GPT0_CLK_ENB, 0,
                        &_lock);
        clk_register_clkdev(clk, NULL, "gpt0");
-        clk = clk_register_mux(NULL, "gpt1_mux_clk", gpt_parents,
+        clk = clk_register_mux(NULL, "gpt1_mclk", gpt_parents,
                        ARRAY_SIZE(gpt_parents), 0, SPEAR1340_PERIP_CLK_CFG,
                        SPEAR1340_GPT1_CLK_SHIFT, SPEAR1340_GPT_CLK_MASK, 0,
                        &_lock);
-        clk_register_clkdev(clk, "gpt1_mux_clk", NULL);
+        clk_register_clkdev(clk, "gpt1_mclk", NULL);
-        clk = clk_register_gate(NULL, "gpt1_clk", "gpt1_mux_clk", 0,
+        clk = clk_register_gate(NULL, "gpt1_clk", "gpt1_mclk", 0,
                        SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_GPT1_CLK_ENB, 0,
                        &_lock);
        clk_register_clkdev(clk, NULL, "gpt1");
-        clk = clk_register_mux(NULL, "gpt2_mux_clk", gpt_parents,
+        clk = clk_register_mux(NULL, "gpt2_mclk", gpt_parents,
                        ARRAY_SIZE(gpt_parents), 0, SPEAR1340_PERIP_CLK_CFG,
                        SPEAR1340_GPT2_CLK_SHIFT, SPEAR1340_GPT_CLK_MASK, 0,
                        &_lock);
-        clk_register_clkdev(clk, "gpt2_mux_clk", NULL);
+        clk_register_clkdev(clk, "gpt2_mclk", NULL);
-        clk = clk_register_gate(NULL, "gpt2_clk", "gpt2_mux_clk", 0,
+        clk = clk_register_gate(NULL, "gpt2_clk", "gpt2_mclk", 0,
                        SPEAR1340_PERIP2_CLK_ENB, SPEAR1340_GPT2_CLK_ENB, 0,
                        &_lock);
        clk_register_clkdev(clk, NULL, "gpt2");
-        clk = clk_register_mux(NULL, "gpt3_mux_clk", gpt_parents,
+        clk = clk_register_mux(NULL, "gpt3_mclk", gpt_parents,
                        ARRAY_SIZE(gpt_parents), 0, SPEAR1340_PERIP_CLK_CFG,
                        SPEAR1340_GPT3_CLK_SHIFT, SPEAR1340_GPT_CLK_MASK, 0,
                        &_lock);
-        clk_register_clkdev(clk, "gpt3_mux_clk", NULL);
+        clk_register_clkdev(clk, "gpt3_mclk", NULL);
-        clk = clk_register_gate(NULL, "gpt3_clk", "gpt3_mux_clk", 0,
+        clk = clk_register_gate(NULL, "gpt3_clk", "gpt3_mclk", 0,
                        SPEAR1340_PERIP2_CLK_ENB, SPEAR1340_GPT3_CLK_ENB, 0,
                        &_lock);
        clk_register_clkdev(clk, NULL, "gpt3");
        /* others */
-        clk = clk_register_aux("uart0_synth_clk", "uart0_synth_gate_clk",
+        clk = clk_register_aux("uart0_syn_clk", "uart0_syn_gclk",
                        "vco1div2_clk", 0, SPEAR1340_UART0_CLK_SYNT, NULL,
                        aux_rtbl, ARRAY_SIZE(aux_rtbl), &_lock, &clk1);
-        clk_register_clkdev(clk, "uart0_synth_clk", NULL);
+        clk_register_clkdev(clk, "uart0_syn_clk", NULL);
-        clk_register_clkdev(clk1, "uart0_synth_gate_clk", NULL);
+        clk_register_clkdev(clk1, "uart0_syn_gclk", NULL);
-        clk = clk_register_mux(NULL, "uart0_mux_clk", uart0_parents,
+        clk = clk_register_mux(NULL, "uart0_mclk", uart0_parents,
                        ARRAY_SIZE(uart0_parents), 0, SPEAR1340_PERIP_CLK_CFG,
                        SPEAR1340_UART0_CLK_SHIFT, SPEAR1340_UART_CLK_MASK, 0,
                        &_lock);
-        clk_register_clkdev(clk, "uart0_mux_clk", NULL);
+        clk_register_clkdev(clk, "uart0_mclk", NULL);
-        clk = clk_register_gate(NULL, "uart0_clk", "uart0_mux_clk", 0,
+        clk = clk_register_gate(NULL, "uart0_clk", "uart0_mclk", 0,
                        SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_UART0_CLK_ENB, 0,
                        &_lock);
        clk_register_clkdev(clk, NULL, "e0000000.serial");
-        clk = clk_register_aux("uart1_synth_clk", "uart1_synth_gate_clk",
+        clk = clk_register_aux("uart1_syn_clk", "uart1_syn_gclk",
                        "vco1div2_clk", 0, SPEAR1340_UART1_CLK_SYNT, NULL,
                        aux_rtbl, ARRAY_SIZE(aux_rtbl), &_lock, &clk1);
-        clk_register_clkdev(clk, "uart1_synth_clk", NULL);
+        clk_register_clkdev(clk, "uart1_syn_clk", NULL);
-        clk_register_clkdev(clk1, "uart1_synth_gate_clk", NULL);
+        clk_register_clkdev(clk1, "uart1_syn_gclk", NULL);
-        clk = clk_register_mux(NULL, "uart1_mux_clk", uart1_parents,
+        clk = clk_register_mux(NULL, "uart1_mclk", uart1_parents,
                        ARRAY_SIZE(uart1_parents), 0, SPEAR1340_PERIP_CLK_CFG,
                        SPEAR1340_UART1_CLK_SHIFT, SPEAR1340_UART_CLK_MASK, 0,
                        &_lock);
-        clk_register_clkdev(clk, "uart1_mux_clk", NULL);
+        clk_register_clkdev(clk, "uart1_mclk", NULL);
-        clk = clk_register_gate(NULL, "uart1_clk", "uart1_mux_clk", 0,
+        clk = clk_register_gate(NULL, "uart1_clk", "uart1_mclk", 0,
-                        SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_UART1_CLK_ENB, 0,
+                        SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_UART1_CLK_ENB, 0,
                        &_lock);
        clk_register_clkdev(clk, NULL, "b4100000.serial");
-        clk = clk_register_aux("sdhci_synth_clk", "sdhci_synth_gate_clk",
+        clk = clk_register_aux("sdhci_syn_clk", "sdhci_syn_gclk",
                        "vco1div2_clk", 0, SPEAR1340_SDHCI_CLK_SYNT, NULL,
                        aux_rtbl, ARRAY_SIZE(aux_rtbl), &_lock, &clk1);
-        clk_register_clkdev(clk, "sdhci_synth_clk", NULL);
+        clk_register_clkdev(clk, "sdhci_syn_clk", NULL);
-        clk_register_clkdev(clk1, "sdhci_synth_gate_clk", NULL);
+        clk_register_clkdev(clk1, "sdhci_syn_gclk", NULL);
-        clk = clk_register_gate(NULL, "sdhci_clk", "sdhci_synth_gate_clk", 0,
+        clk = clk_register_gate(NULL, "sdhci_clk", "sdhci_syn_gclk", 0,
                        SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_SDHCI_CLK_ENB, 0,
                        &_lock);
        clk_register_clkdev(clk, NULL, "b3000000.sdhci");
-        clk = clk_register_aux("cfxd_synth_clk", "cfxd_synth_gate_clk",
+        clk = clk_register_aux("cfxd_syn_clk", "cfxd_syn_gclk", "vco1div2_clk",
-                        "vco1div2_clk", 0, SPEAR1340_CFXD_CLK_SYNT, NULL,
+                        0, SPEAR1340_CFXD_CLK_SYNT, NULL, aux_rtbl,
-                        aux_rtbl, ARRAY_SIZE(aux_rtbl), &_lock, &clk1);
+                        ARRAY_SIZE(aux_rtbl), &_lock, &clk1);
-        clk_register_clkdev(clk, "cfxd_synth_clk", NULL);
+        clk_register_clkdev(clk, "cfxd_syn_clk", NULL);
-        clk_register_clkdev(clk1, "cfxd_synth_gate_clk", NULL);
+        clk_register_clkdev(clk1, "cfxd_syn_gclk", NULL);
-        clk = clk_register_gate(NULL, "cfxd_clk", "cfxd_synth_gate_clk", 0,
+        clk = clk_register_gate(NULL, "cfxd_clk", "cfxd_syn_gclk", 0,
                        SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_CFXD_CLK_ENB, 0,
                        &_lock);
        clk_register_clkdev(clk, NULL, "b2800000.cf");
        clk_register_clkdev(clk, NULL, "arasan_xd");
-        clk = clk_register_aux("c3_synth_clk", "c3_synth_gate_clk",
+        clk = clk_register_aux("c3_syn_clk", "c3_syn_gclk", "vco1div2_clk", 0,
-                        "vco1div2_clk", 0, SPEAR1340_C3_CLK_SYNT, NULL,
+                        SPEAR1340_C3_CLK_SYNT, NULL, aux_rtbl,
-                        aux_rtbl, ARRAY_SIZE(aux_rtbl), &_lock, &clk1);
+                        ARRAY_SIZE(aux_rtbl), &_lock, &clk1);
-        clk_register_clkdev(clk, "c3_synth_clk", NULL);
+        clk_register_clkdev(clk, "c3_syn_clk", NULL);
-        clk_register_clkdev(clk1, "c3_synth_gate_clk", NULL);
+        clk_register_clkdev(clk1, "c3_syn_gclk", NULL);
-        clk = clk_register_mux(NULL, "c3_mux_clk", c3_parents,
+        clk = clk_register_mux(NULL, "c3_mclk", c3_parents,
                        ARRAY_SIZE(c3_parents), 0, SPEAR1340_PERIP_CLK_CFG,
                        SPEAR1340_C3_CLK_SHIFT, SPEAR1340_C3_CLK_MASK, 0,
                        &_lock);
-        clk_register_clkdev(clk, "c3_mux_clk", NULL);
+        clk_register_clkdev(clk, "c3_mclk", NULL);
-        clk = clk_register_gate(NULL, "c3_clk", "c3_mux_clk", 0,
+        clk = clk_register_gate(NULL, "c3_clk", "c3_mclk", 0,
                        SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_C3_CLK_ENB, 0,
                        &_lock);
        clk_register_clkdev(clk, NULL, "c3");
        /* gmac */
-        clk = clk_register_mux(NULL, "gmac_phy_input_mux_clk",
+        clk = clk_register_mux(NULL, "phy_input_mclk", gmac_phy_input_parents,
-                        gmac_phy_input_parents,
                        ARRAY_SIZE(gmac_phy_input_parents), 0,
                        SPEAR1340_GMAC_CLK_CFG,
                        SPEAR1340_GMAC_PHY_INPUT_CLK_SHIFT,
                        SPEAR1340_GMAC_PHY_INPUT_CLK_MASK, 0, &_lock);
-        clk_register_clkdev(clk, "gmac_phy_input_mux_clk", NULL);
+        clk_register_clkdev(clk, "phy_input_mclk", NULL);
-        clk = clk_register_aux("gmac_phy_synth_clk", "gmac_phy_synth_gate_clk",
+        clk = clk_register_aux("phy_syn_clk", "phy_syn_gclk", "phy_input_mclk",
-                        "gmac_phy_input_mux_clk", 0, SPEAR1340_GMAC_CLK_SYNT,
+                        0, SPEAR1340_GMAC_CLK_SYNT, NULL, gmac_rtbl,
-                        NULL, gmac_rtbl, ARRAY_SIZE(gmac_rtbl), &_lock, &clk1);
+                        ARRAY_SIZE(gmac_rtbl), &_lock, &clk1);
-        clk_register_clkdev(clk, "gmac_phy_synth_clk", NULL);
+        clk_register_clkdev(clk, "phy_syn_clk", NULL);
-        clk_register_clkdev(clk1, "gmac_phy_synth_gate_clk", NULL);
+        clk_register_clkdev(clk1, "phy_syn_gclk", NULL);
-        clk = clk_register_mux(NULL, "gmac_phy_mux_clk", gmac_phy_parents,
+        clk = clk_register_mux(NULL, "phy_mclk", gmac_phy_parents,
                        ARRAY_SIZE(gmac_phy_parents), 0,
                        SPEAR1340_PERIP_CLK_CFG, SPEAR1340_GMAC_PHY_CLK_SHIFT,
                        SPEAR1340_GMAC_PHY_CLK_MASK, 0, &_lock);
        clk_register_clkdev(clk, NULL, "stmmacphy.0");
        /* clcd */
-        clk = clk_register_mux(NULL, "clcd_synth_mux_clk", clcd_synth_parents,
+        clk = clk_register_mux(NULL, "clcd_syn_mclk", clcd_synth_parents,
                        ARRAY_SIZE(clcd_synth_parents), 0,
                        SPEAR1340_CLCD_CLK_SYNT, SPEAR1340_CLCD_SYNT_CLK_SHIFT,
                        SPEAR1340_CLCD_SYNT_CLK_MASK, 0, &_lock);
-        clk_register_clkdev(clk, "clcd_synth_mux_clk", NULL);
+        clk_register_clkdev(clk, "clcd_syn_mclk", NULL);
-        clk = clk_register_frac("clcd_synth_clk", "clcd_synth_mux_clk", 0,
+        clk = clk_register_frac("clcd_syn_clk", "clcd_syn_mclk", 0,
                        SPEAR1340_CLCD_CLK_SYNT, clcd_rtbl,
                        ARRAY_SIZE(clcd_rtbl), &_lock);
-        clk_register_clkdev(clk, "clcd_synth_clk", NULL);
+        clk_register_clkdev(clk, "clcd_syn_clk", NULL);
-        clk = clk_register_mux(NULL, "clcd_pixel_mux_clk", clcd_pixel_parents,
+        clk = clk_register_mux(NULL, "clcd_pixel_mclk", clcd_pixel_parents,
                        ARRAY_SIZE(clcd_pixel_parents), 0,
                        SPEAR1340_PERIP_CLK_CFG, SPEAR1340_CLCD_CLK_SHIFT,
                        SPEAR1340_CLCD_CLK_MASK, 0, &_lock);
        clk_register_clkdev(clk, "clcd_pixel_clk", NULL);
-        clk = clk_register_gate(NULL, "clcd_clk", "clcd_pixel_mux_clk", 0,
+        clk = clk_register_gate(NULL, "clcd_clk", "clcd_pixel_mclk", 0,
                        SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_CLCD_CLK_ENB, 0,
                        &_lock);
        clk_register_clkdev(clk, "clcd_clk", NULL);
        /* i2s */
-        clk = clk_register_mux(NULL, "i2s_src_mux_clk", i2s_src_parents,
+        clk = clk_register_mux(NULL, "i2s_src_mclk", i2s_src_parents,
                        ARRAY_SIZE(i2s_src_parents), 0, SPEAR1340_I2S_CLK_CFG,
                        SPEAR1340_I2S_SRC_CLK_SHIFT, SPEAR1340_I2S_SRC_CLK_MASK,
                        0, &_lock);
        clk_register_clkdev(clk, "i2s_src_clk", NULL);
-        clk = clk_register_aux("i2s_prs1_clk", NULL, "i2s_src_mux_clk", 0,
+        clk = clk_register_aux("i2s_prs1_clk", NULL, "i2s_src_mclk", 0,
                        SPEAR1340_I2S_CLK_CFG, &i2s_prs1_masks, i2s_prs1_rtbl,
                        ARRAY_SIZE(i2s_prs1_rtbl), &_lock, NULL);
        clk_register_clkdev(clk, "i2s_prs1_clk", NULL);
-        clk = clk_register_mux(NULL, "i2s_ref_mux_clk", i2s_ref_parents,
+        clk = clk_register_mux(NULL, "i2s_ref_mclk", i2s_ref_parents,
                        ARRAY_SIZE(i2s_ref_parents), 0, SPEAR1340_I2S_CLK_CFG,
                        SPEAR1340_I2S_REF_SHIFT, SPEAR1340_I2S_REF_SEL_MASK, 0,
                        &_lock);
        clk_register_clkdev(clk, "i2s_ref_clk", NULL);
-        clk = clk_register_gate(NULL, "i2s_ref_pad_clk", "i2s_ref_mux_clk", 0,
+        clk = clk_register_gate(NULL, "i2s_ref_pad_clk", "i2s_ref_mclk", 0,
                        SPEAR1340_PERIP2_CLK_ENB, SPEAR1340_I2S_REF_PAD_CLK_ENB,
                        0, &_lock);
        clk_register_clkdev(clk, "i2s_ref_pad_clk", NULL);
-        clk = clk_register_aux("i2s_sclk_clk", "i2s_sclk_gate_clk",
+        clk = clk_register_aux("i2s_sclk_clk", "i2s_sclk_gclk", "i2s_ref_mclk",
-                        "i2s_ref_mux_clk", 0, SPEAR1340_I2S_CLK_CFG,
+                        0, SPEAR1340_I2S_CLK_CFG, &i2s_sclk_masks,
-                        &i2s_sclk_masks, i2s_sclk_rtbl,
+                        i2s_sclk_rtbl, ARRAY_SIZE(i2s_sclk_rtbl), &_lock,
-                        ARRAY_SIZE(i2s_sclk_rtbl), &_lock, &clk1);
+                        &clk1);
        clk_register_clkdev(clk, "i2s_sclk_clk", NULL);
-        clk_register_clkdev(clk1, "i2s_sclk_gate_clk", NULL);
+        clk_register_clkdev(clk1, "i2s_sclk_gclk", NULL);
        /* clock derived from ahb clk */
        clk = clk_register_gate(NULL, "i2c0_clk", "ahb_clk", 0,
@@ -744,7 +741,7 @@ void __init spear1340_clk_init(void)
        clk_register_clkdev(clk, NULL, "e0280000.i2c");
        clk = clk_register_gate(NULL, "i2c1_clk", "ahb_clk", 0,
-                        SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_I2C1_CLK_ENB, 0,
+                        SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_I2C1_CLK_ENB, 0,
                        &_lock);
        clk_register_clkdev(clk, NULL, "b4000000.i2c");
@@ -800,13 +797,13 @@ void __init spear1340_clk_init(void)
                        &_lock);
        clk_register_clkdev(clk, "sysram1_clk", NULL);
-        clk = clk_register_aux("adc_synth_clk", "adc_synth_gate_clk", "ahb_clk",
+        clk = clk_register_aux("adc_syn_clk", "adc_syn_gclk", "ahb_clk",
                        0, SPEAR1340_ADC_CLK_SYNT, NULL, adc_rtbl,
                        ARRAY_SIZE(adc_rtbl), &_lock, &clk1);
-        clk_register_clkdev(clk, "adc_synth_clk", NULL);
+        clk_register_clkdev(clk, "adc_syn_clk", NULL);
-        clk_register_clkdev(clk1, "adc_synth_gate_clk", NULL);
+        clk_register_clkdev(clk1, "adc_syn_gclk", NULL);
-        clk = clk_register_gate(NULL, "adc_clk", "adc_synth_gate_clk", 0,
+        clk = clk_register_gate(NULL, "adc_clk", "adc_syn_gclk", 0,
                        SPEAR1340_PERIP1_CLK_ENB, SPEAR1340_ADC_CLK_ENB, 0,
                        &_lock);
        clk_register_clkdev(clk, NULL, "adc_clk");
@@ -843,39 +840,39 @@ void __init spear1340_clk_init(void)
        clk_register_clkdev(clk, NULL, "e0300000.kbd");
        /* RAS clks */
-        clk = clk_register_mux(NULL, "gen_synth0_1_mux_clk",
+        clk = clk_register_mux(NULL, "gen_syn0_1_mclk", gen_synth0_1_parents,
-                        gen_synth0_1_parents, ARRAY_SIZE(gen_synth0_1_parents),
+                        ARRAY_SIZE(gen_synth0_1_parents), 0, SPEAR1340_PLL_CFG,
-                        0, SPEAR1340_PLL_CFG, SPEAR1340_GEN_SYNT0_1_CLK_SHIFT,
+                        SPEAR1340_GEN_SYNT0_1_CLK_SHIFT,
                        SPEAR1340_GEN_SYNT_CLK_MASK, 0, &_lock);
-        clk_register_clkdev(clk, "gen_synth0_1_clk", NULL);
+        clk_register_clkdev(clk, "gen_syn0_1_clk", NULL);
-        clk = clk_register_mux(NULL, "gen_synth2_3_mux_clk",
+        clk = clk_register_mux(NULL, "gen_syn2_3_mclk", gen_synth2_3_parents,
-                        gen_synth2_3_parents, ARRAY_SIZE(gen_synth2_3_parents),
+                        ARRAY_SIZE(gen_synth2_3_parents), 0, SPEAR1340_PLL_CFG,
-                        0, SPEAR1340_PLL_CFG, SPEAR1340_GEN_SYNT2_3_CLK_SHIFT,
+                        SPEAR1340_GEN_SYNT2_3_CLK_SHIFT,
                        SPEAR1340_GEN_SYNT_CLK_MASK, 0, &_lock);
-        clk_register_clkdev(clk, "gen_synth2_3_clk", NULL);
+        clk_register_clkdev(clk, "gen_syn2_3_clk", NULL);
-        clk = clk_register_frac("gen_synth0_clk", "gen_synth0_1_clk", 0,
+        clk = clk_register_frac("gen_syn0_clk", "gen_syn0_1_clk", 0,
                        SPEAR1340_GEN_CLK_SYNT0, gen_rtbl, ARRAY_SIZE(gen_rtbl),
                        &_lock);
-        clk_register_clkdev(clk, "gen_synth0_clk", NULL);
+        clk_register_clkdev(clk, "gen_syn0_clk", NULL);
-        clk = clk_register_frac("gen_synth1_clk", "gen_synth0_1_clk", 0,
+        clk = clk_register_frac("gen_syn1_clk", "gen_syn0_1_clk", 0,
                        SPEAR1340_GEN_CLK_SYNT1, gen_rtbl, ARRAY_SIZE(gen_rtbl),
                        &_lock);
-        clk_register_clkdev(clk, "gen_synth1_clk", NULL);
+        clk_register_clkdev(clk, "gen_syn1_clk", NULL);
-        clk = clk_register_frac("gen_synth2_clk", "gen_synth2_3_clk", 0,
+        clk = clk_register_frac("gen_syn2_clk", "gen_syn2_3_clk", 0,
                        SPEAR1340_GEN_CLK_SYNT2, gen_rtbl, ARRAY_SIZE(gen_rtbl),
                        &_lock);
-        clk_register_clkdev(clk, "gen_synth2_clk", NULL);
+        clk_register_clkdev(clk, "gen_syn2_clk", NULL);
-        clk = clk_register_frac("gen_synth3_clk", "gen_synth2_3_clk", 0,
+        clk = clk_register_frac("gen_syn3_clk", "gen_syn2_3_clk", 0,
                        SPEAR1340_GEN_CLK_SYNT3, gen_rtbl, ARRAY_SIZE(gen_rtbl),
                        &_lock);
-        clk_register_clkdev(clk, "gen_synth3_clk", NULL);
+        clk_register_clkdev(clk, "gen_syn3_clk", NULL);
-        clk = clk_register_gate(NULL, "mali_clk", "gen_synth3_clk", 0,
+        clk = clk_register_gate(NULL, "mali_clk", "gen_syn3_clk", 0,
                        SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_MALI_CLK_ENB, 0,
                        &_lock);
        clk_register_clkdev(clk, NULL, "mali");
@@ -890,74 +887,74 @@ void __init spear1340_clk_init(void)
                        &_lock);
        clk_register_clkdev(clk, NULL, "spear_cec.1");
-        clk = clk_register_mux(NULL, "spdif_out_mux_clk", spdif_out_parents,
+        clk = clk_register_mux(NULL, "spdif_out_mclk", spdif_out_parents,
                        ARRAY_SIZE(spdif_out_parents), 0,
                        SPEAR1340_PERIP_CLK_CFG, SPEAR1340_SPDIF_OUT_CLK_SHIFT,
                        SPEAR1340_SPDIF_CLK_MASK, 0, &_lock);
-        clk_register_clkdev(clk, "spdif_out_mux_clk", NULL);
+        clk_register_clkdev(clk, "spdif_out_mclk", NULL);
-        clk = clk_register_gate(NULL, "spdif_out_clk", "spdif_out_mux_clk", 0,
+        clk = clk_register_gate(NULL, "spdif_out_clk", "spdif_out_mclk", 0,
                        SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_SPDIF_OUT_CLK_ENB,
                        0, &_lock);
        clk_register_clkdev(clk, NULL, "spdif-out");
-        clk = clk_register_mux(NULL, "spdif_in_mux_clk", spdif_in_parents,
+        clk = clk_register_mux(NULL, "spdif_in_mclk", spdif_in_parents,
                        ARRAY_SIZE(spdif_in_parents), 0,
                        SPEAR1340_PERIP_CLK_CFG, SPEAR1340_SPDIF_IN_CLK_SHIFT,
                        SPEAR1340_SPDIF_CLK_MASK, 0, &_lock);
-        clk_register_clkdev(clk, "spdif_in_mux_clk", NULL);
+        clk_register_clkdev(clk, "spdif_in_mclk", NULL);
-        clk = clk_register_gate(NULL, "spdif_in_clk", "spdif_in_mux_clk", 0,
+        clk = clk_register_gate(NULL, "spdif_in_clk", "spdif_in_mclk", 0,
                        SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_SPDIF_IN_CLK_ENB, 0,
                        &_lock);
        clk_register_clkdev(clk, NULL, "spdif-in");
-        clk = clk_register_gate(NULL, "acp_clk", "acp_mux_clk", 0,
+        clk = clk_register_gate(NULL, "acp_clk", "acp_mclk", 0,
                        SPEAR1340_PERIP2_CLK_ENB, SPEAR1340_ACP_CLK_ENB, 0,
                        &_lock);
        clk_register_clkdev(clk, NULL, "acp_clk");
-        clk = clk_register_gate(NULL, "plgpio_clk", "plgpio_mux_clk", 0,
+        clk = clk_register_gate(NULL, "plgpio_clk", "plgpio_mclk", 0,
                        SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_PLGPIO_CLK_ENB, 0,
                        &_lock);
        clk_register_clkdev(clk, NULL, "plgpio");
-        clk = clk_register_gate(NULL, "video_dec_clk", "video_dec_mux_clk", 0,
+        clk = clk_register_gate(NULL, "video_dec_clk", "video_dec_mclk", 0,
                        SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_VIDEO_DEC_CLK_ENB,
                        0, &_lock);
        clk_register_clkdev(clk, NULL, "video_dec");
-        clk = clk_register_gate(NULL, "video_enc_clk", "video_enc_mux_clk", 0,
+        clk = clk_register_gate(NULL, "video_enc_clk", "video_enc_mclk", 0,
                        SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_VIDEO_ENC_CLK_ENB,
                        0, &_lock);
        clk_register_clkdev(clk, NULL, "video_enc");
-        clk = clk_register_gate(NULL, "video_in_clk", "video_in_mux_clk", 0,
+        clk = clk_register_gate(NULL, "video_in_clk", "video_in_mclk", 0,
                        SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_VIDEO_IN_CLK_ENB, 0,
                        &_lock);
        clk_register_clkdev(clk, NULL, "spear_vip");
-        clk = clk_register_gate(NULL, "cam0_clk", "cam0_mux_clk", 0,
+        clk = clk_register_gate(NULL, "cam0_clk", "cam0_mclk", 0,
                        SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_CAM0_CLK_ENB, 0,
                        &_lock);
        clk_register_clkdev(clk, NULL, "spear_camif.0");
-        clk = clk_register_gate(NULL, "cam1_clk", "cam1_mux_clk", 0,
+        clk = clk_register_gate(NULL, "cam1_clk", "cam1_mclk", 0,
                        SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_CAM1_CLK_ENB, 0,
                        &_lock);
        clk_register_clkdev(clk, NULL, "spear_camif.1");
-        clk = clk_register_gate(NULL, "cam2_clk", "cam2_mux_clk", 0,
+        clk = clk_register_gate(NULL, "cam2_clk", "cam2_mclk", 0,
                        SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_CAM2_CLK_ENB, 0,
                        &_lock);
        clk_register_clkdev(clk, NULL, "spear_camif.2");
-        clk = clk_register_gate(NULL, "cam3_clk", "cam3_mux_clk", 0,
+        clk = clk_register_gate(NULL, "cam3_clk", "cam3_mclk", 0,
                        SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_CAM3_CLK_ENB, 0,
                        &_lock);
        clk_register_clkdev(clk, NULL, "spear_camif.3");
-        clk = clk_register_gate(NULL, "pwm_clk", "pwm_mux_clk", 0,
+        clk = clk_register_gate(NULL, "pwm_clk", "pwm_mclk", 0,
                        SPEAR1340_PERIP3_CLK_ENB, SPEAR1340_PWM_CLK_ENB, 0,
                        &_lock);
        clk_register_clkdev(clk, NULL, "pwm");
diff --git a/drivers/clk/spear/spear3xx_clock.c b/drivers/clk/spear/spear3xx_clock.c
index 440bb3e4c971..c3157454bb3f 100644
--- a/drivers/clk/spear/spear3xx_clock.c
+++ b/drivers/clk/spear/spear3xx_clock.c
@@ -2,7 +2,7 @@
 * SPEAr3xx machines clock framework source file
 *
 * Copyright (C) 2012 ST Microelectronics
- * Viresh Kumar <viresh.kumar@st.com>
+ * Viresh Kumar <viresh.linux@gmail.com>
 *
 * This file is licensed under the terms of the GNU General Public
 * License version 2. This program is licensed "as is" without any
@@ -122,12 +122,12 @@ static struct gpt_rate_tbl gpt_rtbl[] = {
 };
 /* clock parents */
-static const char *uart0_parents[] = { "pll3_48m_clk", "uart_synth_gate_clk", };
+static const char *uart0_parents[] = { "pll3_clk", "uart_syn_gclk", };
-static const char *firda_parents[] = { "pll3_48m_clk", "firda_synth_gate_clk",
+static const char *firda_parents[] = { "pll3_clk", "firda_syn_gclk",
 };
-static const char *gpt0_parents[] = { "pll3_48m_clk", "gpt0_synth_clk", };
+static const char *gpt0_parents[] = { "pll3_clk", "gpt0_syn_clk", };
-static const char *gpt1_parents[] = { "pll3_48m_clk", "gpt1_synth_clk", };
+static const char *gpt1_parents[] = { "pll3_clk", "gpt1_syn_clk", };
-static const char *gpt2_parents[] = { "pll3_48m_clk", "gpt2_synth_clk", };
+static const char *gpt2_parents[] = { "pll3_clk", "gpt2_syn_clk", };
 static const char *gen2_3_parents[] = { "pll1_clk", "pll2_clk", };
 static const char *ddr_parents[] = { "ahb_clk", "ahbmult2_clk", "none",
        "pll2_clk", };
@@ -137,7 +137,7 @@ static void __init spear300_clk_init(void)
 {
        struct clk *clk;
-        clk = clk_register_fixed_factor(NULL, "clcd_clk", "ras_pll3_48m_clk", 0,
+        clk = clk_register_fixed_factor(NULL, "clcd_clk", "ras_pll3_clk", 0,
                        1, 1);
        clk_register_clkdev(clk, NULL, "60000000.clcd");
@@ -219,15 +219,11 @@ static void __init spear310_clk_init(void)
        #define SPEAR320_UARTX_PCLK_VAL_SYNTH1          0x0
        #define SPEAR320_UARTX_PCLK_VAL_APB             0x1
-static const char *i2s_ref_parents[] = { "ras_pll2_clk",
+static const char *i2s_ref_parents[] = { "ras_pll2_clk", "ras_syn2_gclk", };
-        "ras_gen2_synth_gate_clk", };
+static const char *sdhci_parents[] = { "ras_pll3_clk", "ras_syn3_gclk", };
-static const char *sdhci_parents[] = { "ras_pll3_48m_clk",
-        "ras_gen3_synth_gate_clk",
-};
 static const char *smii0_parents[] = { "smii_125m_pad", "ras_pll2_clk",
-        "ras_gen0_synth_gate_clk", };
+        "ras_syn0_gclk", };
-static const char *uartx_parents[] = { "ras_gen1_synth_gate_clk", "ras_apb_clk",
+static const char *uartx_parents[] = { "ras_syn1_gclk", "ras_apb_clk", };
-};
 static void __init spear320_clk_init(void)
 {
@@ -237,7 +233,7 @@ static void __init spear320_clk_init(void)
                        CLK_IS_ROOT, 125000000);
        clk_register_clkdev(clk, "smii_125m_pad", NULL);
-        clk = clk_register_fixed_factor(NULL, "clcd_clk", "ras_pll3_48m_clk", 0,
+        clk = clk_register_fixed_factor(NULL, "clcd_clk", "ras_pll3_clk", 0,
                        1, 1);
        clk_register_clkdev(clk, NULL, "90000000.clcd");
@@ -363,9 +359,9 @@ void __init spear3xx_clk_init(void)
        clk_register_clkdev(clk, NULL, "fc900000.rtc");
        /* clock derived from 24 MHz osc clk */
-        clk = clk_register_fixed_rate(NULL, "pll3_48m_clk", "osc_24m_clk", 0,
+        clk = clk_register_fixed_rate(NULL, "pll3_clk", "osc_24m_clk", 0,
                        48000000);
-        clk_register_clkdev(clk, "pll3_48m_clk", NULL);
+        clk_register_clkdev(clk, "pll3_clk", NULL);
        clk = clk_register_fixed_factor(NULL, "wdt_clk", "osc_24m_clk", 0, 1,
                        1);
@@ -392,98 +388,98 @@ void __init spear3xx_clk_init(void)
                        HCLK_RATIO_MASK, 0, &_lock);
        clk_register_clkdev(clk, "ahb_clk", NULL);
-        clk = clk_register_aux("uart_synth_clk", "uart_synth_gate_clk",
+        clk = clk_register_aux("uart_syn_clk", "uart_syn_gclk", "pll1_clk", 0,
-                        "pll1_clk", 0, UART_CLK_SYNT, NULL, aux_rtbl,
+                        UART_CLK_SYNT, NULL, aux_rtbl, ARRAY_SIZE(aux_rtbl),
-                        ARRAY_SIZE(aux_rtbl), &_lock, &clk1);
+                        &_lock, &clk1);
-        clk_register_clkdev(clk, "uart_synth_clk", NULL);
+        clk_register_clkdev(clk, "uart_syn_clk", NULL);
-        clk_register_clkdev(clk1, "uart_synth_gate_clk", NULL);
+        clk_register_clkdev(clk1, "uart_syn_gclk", NULL);
-        clk = clk_register_mux(NULL, "uart0_mux_clk", uart0_parents,
+        clk = clk_register_mux(NULL, "uart0_mclk", uart0_parents,
                        ARRAY_SIZE(uart0_parents), 0, PERIP_CLK_CFG,
                        UART_CLK_SHIFT, UART_CLK_MASK, 0, &_lock);
-        clk_register_clkdev(clk, "uart0_mux_clk", NULL);
+        clk_register_clkdev(clk, "uart0_mclk", NULL);
-        clk = clk_register_gate(NULL, "uart0", "uart0_mux_clk", 0,
+        clk = clk_register_gate(NULL, "uart0", "uart0_mclk", 0, PERIP1_CLK_ENB,
-                        PERIP1_CLK_ENB, UART_CLK_ENB, 0, &_lock);
+                        UART_CLK_ENB, 0, &_lock);
        clk_register_clkdev(clk, NULL, "d0000000.serial");
-        clk = clk_register_aux("firda_synth_clk", "firda_synth_gate_clk",
+        clk = clk_register_aux("firda_syn_clk", "firda_syn_gclk", "pll1_clk", 0,
-                        "pll1_clk", 0, FIRDA_CLK_SYNT, NULL, aux_rtbl,
+                        FIRDA_CLK_SYNT, NULL, aux_rtbl, ARRAY_SIZE(aux_rtbl),
-                        ARRAY_SIZE(aux_rtbl), &_lock, &clk1);
+                        &_lock, &clk1);
-        clk_register_clkdev(clk, "firda_synth_clk", NULL);
+        clk_register_clkdev(clk, "firda_syn_clk", NULL);
-        clk_register_clkdev(clk1, "firda_synth_gate_clk", NULL);
+        clk_register_clkdev(clk1, "firda_syn_gclk", NULL);
-        clk = clk_register_mux(NULL, "firda_mux_clk", firda_parents,
+        clk = clk_register_mux(NULL, "firda_mclk", firda_parents,
                        ARRAY_SIZE(firda_parents), 0, PERIP_CLK_CFG,
                        FIRDA_CLK_SHIFT, FIRDA_CLK_MASK, 0, &_lock);
-        clk_register_clkdev(clk, "firda_mux_clk", NULL);
+        clk_register_clkdev(clk, "firda_mclk", NULL);
-        clk = clk_register_gate(NULL, "firda_clk", "firda_mux_clk", 0,
+        clk = clk_register_gate(NULL, "firda_clk", "firda_mclk", 0,
                        PERIP1_CLK_ENB, FIRDA_CLK_ENB, 0, &_lock);
        clk_register_clkdev(clk, NULL, "firda");
        /* gpt clocks */
-        clk_register_gpt("gpt0_synth_clk", "pll1_clk", 0, PRSC0_CLK_CFG,
+        clk_register_gpt("gpt0_syn_clk", "pll1_clk", 0, PRSC0_CLK_CFG, gpt_rtbl,
-                        gpt_rtbl, ARRAY_SIZE(gpt_rtbl), &_lock);
+                        ARRAY_SIZE(gpt_rtbl), &_lock);
        clk = clk_register_mux(NULL, "gpt0_clk", gpt0_parents,
                        ARRAY_SIZE(gpt0_parents), 0, PERIP_CLK_CFG,
                        GPT0_CLK_SHIFT, GPT_CLK_MASK, 0, &_lock);
        clk_register_clkdev(clk, NULL, "gpt0");
-        clk_register_gpt("gpt1_synth_clk", "pll1_clk", 0, PRSC1_CLK_CFG,
+        clk_register_gpt("gpt1_syn_clk", "pll1_clk", 0, PRSC1_CLK_CFG, gpt_rtbl,
-                        gpt_rtbl, ARRAY_SIZE(gpt_rtbl), &_lock);
+                        ARRAY_SIZE(gpt_rtbl), &_lock);
-        clk = clk_register_mux(NULL, "gpt1_mux_clk", gpt1_parents,
+        clk = clk_register_mux(NULL, "gpt1_mclk", gpt1_parents,
                        ARRAY_SIZE(gpt1_parents), 0, PERIP_CLK_CFG,
                        GPT1_CLK_SHIFT, GPT_CLK_MASK, 0, &_lock);
-        clk_register_clkdev(clk, "gpt1_mux_clk", NULL);
+        clk_register_clkdev(clk, "gpt1_mclk", NULL);
-        clk = clk_register_gate(NULL, "gpt1_clk", "gpt1_mux_clk", 0,
+        clk = clk_register_gate(NULL, "gpt1_clk", "gpt1_mclk", 0,
                        PERIP1_CLK_ENB, GPT1_CLK_ENB, 0, &_lock);
        clk_register_clkdev(clk, NULL, "gpt1");
-        clk_register_gpt("gpt2_synth_clk", "pll1_clk", 0, PRSC2_CLK_CFG,
+        clk_register_gpt("gpt2_syn_clk", "pll1_clk", 0, PRSC2_CLK_CFG, gpt_rtbl,
-                        gpt_rtbl, ARRAY_SIZE(gpt_rtbl), &_lock);
+                        ARRAY_SIZE(gpt_rtbl), &_lock);
-        clk = clk_register_mux(NULL, "gpt2_mux_clk", gpt2_parents,
+        clk = clk_register_mux(NULL, "gpt2_mclk", gpt2_parents,
                        ARRAY_SIZE(gpt2_parents), 0, PERIP_CLK_CFG,
                        GPT2_CLK_SHIFT, GPT_CLK_MASK, 0, &_lock);
-        clk_register_clkdev(clk, "gpt2_mux_clk", NULL);
+        clk_register_clkdev(clk, "gpt2_mclk", NULL);
-        clk = clk_register_gate(NULL, "gpt2_clk", "gpt2_mux_clk", 0,
+        clk = clk_register_gate(NULL, "gpt2_clk", "gpt2_mclk", 0,
                        PERIP1_CLK_ENB, GPT2_CLK_ENB, 0, &_lock);
        clk_register_clkdev(clk, NULL, "gpt2");
        /* general synths clocks */
-        clk = clk_register_aux("gen0_synth_clk", "gen0_synth_gate_clk",
+        clk = clk_register_aux("gen0_syn_clk", "gen0_syn_gclk", "pll1_clk",
-                        "pll1_clk", 0, GEN0_CLK_SYNT, NULL, aux_rtbl,
+                        0, GEN0_CLK_SYNT, NULL, aux_rtbl, ARRAY_SIZE(aux_rtbl),
-                        ARRAY_SIZE(aux_rtbl), &_lock, &clk1);
+                        &_lock, &clk1);
-        clk_register_clkdev(clk, "gen0_synth_clk", NULL);
+        clk_register_clkdev(clk, "gen0_syn_clk", NULL);
-        clk_register_clkdev(clk1, "gen0_synth_gate_clk", NULL);
+        clk_register_clkdev(clk1, "gen0_syn_gclk", NULL);
-        clk = clk_register_aux("gen1_synth_clk", "gen1_synth_gate_clk",
+        clk = clk_register_aux("gen1_syn_clk", "gen1_syn_gclk", "pll1_clk",
-                        "pll1_clk", 0, GEN1_CLK_SYNT, NULL, aux_rtbl,
+                        0, GEN1_CLK_SYNT, NULL, aux_rtbl, ARRAY_SIZE(aux_rtbl),
-                        ARRAY_SIZE(aux_rtbl), &_lock, &clk1);
+                        &_lock, &clk1);
-        clk_register_clkdev(clk, "gen1_synth_clk", NULL);
+        clk_register_clkdev(clk, "gen1_syn_clk", NULL);
-        clk_register_clkdev(clk1, "gen1_synth_gate_clk", NULL);
+        clk_register_clkdev(clk1, "gen1_syn_gclk", NULL);
-        clk = clk_register_mux(NULL, "gen2_3_parent_clk", gen2_3_parents,
+        clk = clk_register_mux(NULL, "gen2_3_par_clk", gen2_3_parents,
                        ARRAY_SIZE(gen2_3_parents), 0, CORE_CLK_CFG,
                        GEN_SYNTH2_3_CLK_SHIFT, GEN_SYNTH2_3_CLK_MASK, 0,
                        &_lock);
-        clk_register_clkdev(clk, "gen2_3_parent_clk", NULL);
+        clk_register_clkdev(clk, "gen2_3_par_clk", NULL);
-        clk = clk_register_aux("gen2_synth_clk", "gen2_synth_gate_clk",
+        clk = clk_register_aux("gen2_syn_clk", "gen2_syn_gclk",
-                        "gen2_3_parent_clk", 0, GEN2_CLK_SYNT, NULL, aux_rtbl,
+                        "gen2_3_par_clk", 0, GEN2_CLK_SYNT, NULL, aux_rtbl,
                        ARRAY_SIZE(aux_rtbl), &_lock, &clk1);
-        clk_register_clkdev(clk, "gen2_synth_clk", NULL);
+        clk_register_clkdev(clk, "gen2_syn_clk", NULL);
-        clk_register_clkdev(clk1, "gen2_synth_gate_clk", NULL);
+        clk_register_clkdev(clk1, "gen2_syn_gclk", NULL);
-        clk = clk_register_aux("gen3_synth_clk", "gen3_synth_gate_clk",
+        clk = clk_register_aux("gen3_syn_clk", "gen3_syn_gclk",
-                        "gen2_3_parent_clk", 0, GEN3_CLK_SYNT, NULL, aux_rtbl,
+                        "gen2_3_par_clk", 0, GEN3_CLK_SYNT, NULL, aux_rtbl,
                        ARRAY_SIZE(aux_rtbl), &_lock, &clk1);
-        clk_register_clkdev(clk, "gen3_synth_clk", NULL);
+        clk_register_clkdev(clk, "gen3_syn_clk", NULL);
-        clk_register_clkdev(clk1, "gen3_synth_gate_clk", NULL);
+        clk_register_clkdev(clk1, "gen3_syn_gclk", NULL);
        /* clock derived from pll3 clk */
-        clk = clk_register_gate(NULL, "usbh_clk", "pll3_48m_clk", 0,
+        clk = clk_register_gate(NULL, "usbh_clk", "pll3_clk", 0, PERIP1_CLK_ENB,
-                        PERIP1_CLK_ENB, USBH_CLK_ENB, 0, &_lock);
+                        USBH_CLK_ENB, 0, &_lock);
        clk_register_clkdev(clk, "usbh_clk", NULL);
        clk = clk_register_fixed_factor(NULL, "usbh.0_clk", "usbh_clk", 0, 1,
@@ -494,8 +490,8 @@ void __init spear3xx_clk_init(void)
                        1);
        clk_register_clkdev(clk, "usbh.1_clk", NULL);
-        clk = clk_register_gate(NULL, "usbd_clk", "pll3_48m_clk", 0,
+        clk = clk_register_gate(NULL, "usbd_clk", "pll3_clk", 0, PERIP1_CLK_ENB,
-                        PERIP1_CLK_ENB, USBD_CLK_ENB, 0, &_lock);
+                        USBD_CLK_ENB, 0, &_lock);
        clk_register_clkdev(clk, NULL, "designware_udc");
        /* clock derived from ahb clk */
@@ -579,29 +575,25 @@ void __init spear3xx_clk_init(void)
                        RAS_CLK_ENB, RAS_PLL2_CLK_ENB, 0, &_lock);
        clk_register_clkdev(clk, "ras_pll2_clk", NULL);
-        clk = clk_register_gate(NULL, "ras_pll3_48m_clk", "pll3_48m_clk", 0,
+        clk = clk_register_gate(NULL, "ras_pll3_clk", "pll3_clk", 0,
                        RAS_CLK_ENB, RAS_48M_CLK_ENB, 0, &_lock);
-        clk_register_clkdev(clk, "ras_pll3_48m_clk", NULL);
+        clk_register_clkdev(clk, "ras_pll3_clk", NULL);
-        clk = clk_register_gate(NULL, "ras_gen0_synth_gate_clk",
+        clk = clk_register_gate(NULL, "ras_syn0_gclk", "gen0_syn_gclk", 0,
-                        "gen0_synth_gate_clk", 0, RAS_CLK_ENB,
+                        RAS_CLK_ENB, RAS_SYNT0_CLK_ENB, 0, &_lock);
-                        RAS_SYNT0_CLK_ENB, 0, &_lock);
+        clk_register_clkdev(clk, "ras_syn0_gclk", NULL);
-        clk_register_clkdev(clk, "ras_gen0_synth_gate_clk", NULL);
+        clk = clk_register_gate(NULL, "ras_syn1_gclk", "gen1_syn_gclk", 0,
-        clk = clk_register_gate(NULL, "ras_gen1_synth_gate_clk",
+                        RAS_CLK_ENB, RAS_SYNT1_CLK_ENB, 0, &_lock);
-                        "gen1_synth_gate_clk", 0, RAS_CLK_ENB,
+        clk_register_clkdev(clk, "ras_syn1_gclk", NULL);
-                        RAS_SYNT1_CLK_ENB, 0, &_lock);
-        clk_register_clkdev(clk, "ras_gen1_synth_gate_clk", NULL);
+        clk = clk_register_gate(NULL, "ras_syn2_gclk", "gen2_syn_gclk", 0,
+                        RAS_CLK_ENB, RAS_SYNT2_CLK_ENB, 0, &_lock);
-        clk = clk_register_gate(NULL, "ras_gen2_synth_gate_clk",
+        clk_register_clkdev(clk, "ras_syn2_gclk", NULL);
-                        "gen2_synth_gate_clk", 0, RAS_CLK_ENB,
-                        RAS_SYNT2_CLK_ENB, 0, &_lock);
+        clk = clk_register_gate(NULL, "ras_syn3_gclk", "gen3_syn_gclk", 0,
-        clk_register_clkdev(clk, "ras_gen2_synth_gate_clk", NULL);
+                        RAS_CLK_ENB, RAS_SYNT3_CLK_ENB, 0, &_lock);
+        clk_register_clkdev(clk, "ras_syn3_gclk", NULL);
-        clk = clk_register_gate(NULL, "ras_gen3_synth_gate_clk",
-                        "gen3_synth_gate_clk", 0, RAS_CLK_ENB,
-                        RAS_SYNT3_CLK_ENB, 0, &_lock);
-        clk_register_clkdev(clk, "ras_gen3_synth_gate_clk", NULL);
        if (of_machine_is_compatible("st,spear300"))
                spear300_clk_init();
diff --git a/drivers/clk/spear/spear6xx_clock.c b/drivers/clk/spear/spear6xx_clock.c
index f9a20b382304..a98d0866f541 100644
--- a/drivers/clk/spear/spear6xx_clock.c
+++ b/drivers/clk/spear/spear6xx_clock.c
@@ -2,7 +2,7 @@
 * SPEAr6xx machines clock framework source file
 *
 * Copyright (C) 2012 ST Microelectronics
- * Viresh Kumar <viresh.kumar@st.com>
+ * Viresh Kumar <viresh.linux@gmail.com>
 *
 * This file is licensed under the terms of the GNU General Public
 * License version 2. This program is licensed "as is" without any
@@ -97,13 +97,12 @@ static struct aux_rate_tbl aux_rtbl[] = {
        {.xscale = 1, .yscale = 2, .eq = 1}, /* 166 MHz */
 };
-static const char *clcd_parents[] = { "pll3_48m_clk", "clcd_synth_gate_clk", };
+static const char *clcd_parents[] = { "pll3_clk", "clcd_syn_gclk", };
-static const char *firda_parents[] = { "pll3_48m_clk", "firda_synth_gate_clk",
+static const char *firda_parents[] = { "pll3_clk", "firda_syn_gclk", };
-};
+static const char *uart_parents[] = { "pll3_clk", "uart_syn_gclk", };
-static const char *uart_parents[] = { "pll3_48m_clk", "uart_synth_gate_clk", };
+static const char *gpt0_1_parents[] = { "pll3_clk", "gpt0_1_syn_clk", };
-static const char *gpt0_1_parents[] = { "pll3_48m_clk", "gpt0_1_synth_clk", };
+static const char *gpt2_parents[] = { "pll3_clk", "gpt2_syn_clk", };
-static const char *gpt2_parents[] = { "pll3_48m_clk", "gpt2_synth_clk", };
+static const char *gpt3_parents[] = { "pll3_clk", "gpt3_syn_clk", };
-static const char *gpt3_parents[] = { "pll3_48m_clk", "gpt3_synth_clk", };
 static const char *ddr_parents[] = { "ahb_clk", "ahbmult2_clk", "none",
        "pll2_clk", };
@@ -136,9 +135,9 @@ void __init spear6xx_clk_init(void)
        clk_register_clkdev(clk, NULL, "rtc-spear");
        /* clock derived from 30 MHz osc clk */
-        clk = clk_register_fixed_rate(NULL, "pll3_48m_clk", "osc_24m_clk", 0,
+        clk = clk_register_fixed_rate(NULL, "pll3_clk", "osc_24m_clk", 0,
                        48000000);
-        clk_register_clkdev(clk, "pll3_48m_clk", NULL);
+        clk_register_clkdev(clk, "pll3_clk", NULL);
        clk = clk_register_vco_pll("vco1_clk", "pll1_clk", NULL, "osc_30m_clk",
                        0, PLL1_CTR, PLL1_FRQ, pll_rtbl, ARRAY_SIZE(pll_rtbl),
@@ -146,9 +145,9 @@ void __init spear6xx_clk_init(void)
        clk_register_clkdev(clk, "vco1_clk", NULL);
        clk_register_clkdev(clk1, "pll1_clk", NULL);
-        clk = clk_register_vco_pll("vco2_clk", "pll2_clk", NULL,
+        clk = clk_register_vco_pll("vco2_clk", "pll2_clk", NULL, "osc_30m_clk",
-                        "osc_30m_clk", 0, PLL2_CTR, PLL2_FRQ, pll_rtbl,
+                        0, PLL2_CTR, PLL2_FRQ, pll_rtbl, ARRAY_SIZE(pll_rtbl),
-                        ARRAY_SIZE(pll_rtbl), &_lock, &clk1, NULL);
+                        &_lock, &clk1, NULL);
        clk_register_clkdev(clk, "vco2_clk", NULL);
        clk_register_clkdev(clk1, "pll2_clk", NULL);
@@ -165,111 +164,111 @@ void __init spear6xx_clk_init(void)
                        HCLK_RATIO_MASK, 0, &_lock);
        clk_register_clkdev(clk, "ahb_clk", NULL);
-        clk = clk_register_aux("uart_synth_clk", "uart_synth_gate_clk",
+        clk = clk_register_aux("uart_syn_clk", "uart_syn_gclk", "pll1_clk", 0,
-                        "pll1_clk", 0, UART_CLK_SYNT, NULL, aux_rtbl,
+                        UART_CLK_SYNT, NULL, aux_rtbl, ARRAY_SIZE(aux_rtbl),
-                        ARRAY_SIZE(aux_rtbl), &_lock, &clk1);
+                        &_lock, &clk1);
-        clk_register_clkdev(clk, "uart_synth_clk", NULL);
+        clk_register_clkdev(clk, "uart_syn_clk", NULL);
-        clk_register_clkdev(clk1, "uart_synth_gate_clk", NULL);
+        clk_register_clkdev(clk1, "uart_syn_gclk", NULL);
-        clk = clk_register_mux(NULL, "uart_mux_clk", uart_parents,
+        clk = clk_register_mux(NULL, "uart_mclk", uart_parents,
                        ARRAY_SIZE(uart_parents), 0, PERIP_CLK_CFG,
                        UART_CLK_SHIFT, UART_CLK_MASK, 0, &_lock);
-        clk_register_clkdev(clk, "uart_mux_clk", NULL);
+        clk_register_clkdev(clk, "uart_mclk", NULL);
-        clk = clk_register_gate(NULL, "uart0", "uart_mux_clk", 0,
+        clk = clk_register_gate(NULL, "uart0", "uart_mclk", 0, PERIP1_CLK_ENB,
-                        PERIP1_CLK_ENB, UART0_CLK_ENB, 0, &_lock);
+                        UART0_CLK_ENB, 0, &_lock);
        clk_register_clkdev(clk, NULL, "d0000000.serial");
-        clk = clk_register_gate(NULL, "uart1", "uart_mux_clk", 0,
+        clk = clk_register_gate(NULL, "uart1", "uart_mclk", 0, PERIP1_CLK_ENB,
-                        PERIP1_CLK_ENB, UART1_CLK_ENB, 0, &_lock);
+                        UART1_CLK_ENB, 0, &_lock);
        clk_register_clkdev(clk, NULL, "d0080000.serial");
-        clk = clk_register_aux("firda_synth_clk", "firda_synth_gate_clk",
+        clk = clk_register_aux("firda_syn_clk", "firda_syn_gclk", "pll1_clk",
-                        "pll1_clk", 0, FIRDA_CLK_SYNT, NULL, aux_rtbl,
+                        0, FIRDA_CLK_SYNT, NULL, aux_rtbl, ARRAY_SIZE(aux_rtbl),
-                        ARRAY_SIZE(aux_rtbl), &_lock, &clk1);
+                        &_lock, &clk1);
-        clk_register_clkdev(clk, "firda_synth_clk", NULL);
+        clk_register_clkdev(clk, "firda_syn_clk", NULL);
-        clk_register_clkdev(clk1, "firda_synth_gate_clk", NULL);
+        clk_register_clkdev(clk1, "firda_syn_gclk", NULL);
-        clk = clk_register_mux(NULL, "firda_mux_clk", firda_parents,
+        clk = clk_register_mux(NULL, "firda_mclk", firda_parents,
                        ARRAY_SIZE(firda_parents), 0, PERIP_CLK_CFG,
                        FIRDA_CLK_SHIFT, FIRDA_CLK_MASK, 0, &_lock);
-        clk_register_clkdev(clk, "firda_mux_clk", NULL);
+        clk_register_clkdev(clk, "firda_mclk", NULL);
-        clk = clk_register_gate(NULL, "firda_clk", "firda_mux_clk", 0,
+        clk = clk_register_gate(NULL, "firda_clk", "firda_mclk", 0,
                        PERIP1_CLK_ENB, FIRDA_CLK_ENB, 0, &_lock);
        clk_register_clkdev(clk, NULL, "firda");
-        clk = clk_register_aux("clcd_synth_clk", "clcd_synth_gate_clk",
+        clk = clk_register_aux("clcd_syn_clk", "clcd_syn_gclk", "pll1_clk",
-                        "pll1_clk", 0, CLCD_CLK_SYNT, NULL, aux_rtbl,
+                        0, CLCD_CLK_SYNT, NULL, aux_rtbl, ARRAY_SIZE(aux_rtbl),
-                        ARRAY_SIZE(aux_rtbl), &_lock, &clk1);
+                        &_lock, &clk1);
-        clk_register_clkdev(clk, "clcd_synth_clk", NULL);
+        clk_register_clkdev(clk, "clcd_syn_clk", NULL);
-        clk_register_clkdev(clk1, "clcd_synth_gate_clk", NULL);
+        clk_register_clkdev(clk1, "clcd_syn_gclk", NULL);
-        clk = clk_register_mux(NULL, "clcd_mux_clk", clcd_parents,
+        clk = clk_register_mux(NULL, "clcd_mclk", clcd_parents,
                        ARRAY_SIZE(clcd_parents), 0, PERIP_CLK_CFG,
                        CLCD_CLK_SHIFT, CLCD_CLK_MASK, 0, &_lock);
-        clk_register_clkdev(clk, "clcd_mux_clk", NULL);
+        clk_register_clkdev(clk, "clcd_mclk", NULL);
-        clk = clk_register_gate(NULL, "clcd_clk", "clcd_mux_clk", 0,
+        clk = clk_register_gate(NULL, "clcd_clk", "clcd_mclk", 0,
                        PERIP1_CLK_ENB, CLCD_CLK_ENB, 0, &_lock);
        clk_register_clkdev(clk, NULL, "clcd");
        /* gpt clocks */
-        clk = clk_register_gpt("gpt0_1_synth_clk", "pll1_clk", 0, PRSC0_CLK_CFG,
+        clk = clk_register_gpt("gpt0_1_syn_clk", "pll1_clk", 0, PRSC0_CLK_CFG,
                        gpt_rtbl, ARRAY_SIZE(gpt_rtbl), &_lock);
-        clk_register_clkdev(clk, "gpt0_1_synth_clk", NULL);
+        clk_register_clkdev(clk, "gpt0_1_syn_clk", NULL);
-        clk = clk_register_mux(NULL, "gpt0_mux_clk", gpt0_1_parents,
+        clk = clk_register_mux(NULL, "gpt0_mclk", gpt0_1_parents,
                        ARRAY_SIZE(gpt0_1_parents), 0, PERIP_CLK_CFG,
                        GPT0_CLK_SHIFT, GPT_CLK_MASK, 0, &_lock);
        clk_register_clkdev(clk, NULL, "gpt0");
-        clk = clk_register_mux(NULL, "gpt1_mux_clk", gpt0_1_parents,
+        clk = clk_register_mux(NULL, "gpt1_mclk", gpt0_1_parents,
                        ARRAY_SIZE(gpt0_1_parents), 0, PERIP_CLK_CFG,
                        GPT1_CLK_SHIFT, GPT_CLK_MASK, 0, &_lock);
-        clk_register_clkdev(clk, "gpt1_mux_clk", NULL);
+        clk_register_clkdev(clk, "gpt1_mclk", NULL);
-        clk = clk_register_gate(NULL, "gpt1_clk", "gpt1_mux_clk", 0,
+        clk = clk_register_gate(NULL, "gpt1_clk", "gpt1_mclk", 0,
                        PERIP1_CLK_ENB, GPT1_CLK_ENB, 0, &_lock);
        clk_register_clkdev(clk, NULL, "gpt1");
-        clk = clk_register_gpt("gpt2_synth_clk", "pll1_clk", 0, PRSC1_CLK_CFG,
+        clk = clk_register_gpt("gpt2_syn_clk", "pll1_clk", 0, PRSC1_CLK_CFG,
                        gpt_rtbl, ARRAY_SIZE(gpt_rtbl), &_lock);
-        clk_register_clkdev(clk, "gpt2_synth_clk", NULL);
+        clk_register_clkdev(clk, "gpt2_syn_clk", NULL);
-        clk = clk_register_mux(NULL, "gpt2_mux_clk", gpt2_parents,
+        clk = clk_register_mux(NULL, "gpt2_mclk", gpt2_parents,
                        ARRAY_SIZE(gpt2_parents), 0, PERIP_CLK_CFG,
                        GPT2_CLK_SHIFT, GPT_CLK_MASK, 0, &_lock);
-        clk_register_clkdev(clk, "gpt2_mux_clk", NULL);
+        clk_register_clkdev(clk, "gpt2_mclk", NULL);
-        clk = clk_register_gate(NULL, "gpt2_clk", "gpt2_mux_clk", 0,
+        clk = clk_register_gate(NULL, "gpt2_clk", "gpt2_mclk", 0,
                        PERIP1_CLK_ENB, GPT2_CLK_ENB, 0, &_lock);
        clk_register_clkdev(clk, NULL, "gpt2");
-        clk = clk_register_gpt("gpt3_synth_clk", "pll1_clk", 0, PRSC2_CLK_CFG,
+        clk = clk_register_gpt("gpt3_syn_clk", "pll1_clk", 0, PRSC2_CLK_CFG,
                        gpt_rtbl, ARRAY_SIZE(gpt_rtbl), &_lock);
-        clk_register_clkdev(clk, "gpt3_synth_clk", NULL);
+        clk_register_clkdev(clk, "gpt3_syn_clk", NULL);
-        clk = clk_register_mux(NULL, "gpt3_mux_clk", gpt3_parents,
+        clk = clk_register_mux(NULL, "gpt3_mclk", gpt3_parents,
                        ARRAY_SIZE(gpt3_parents), 0, PERIP_CLK_CFG,
                        GPT3_CLK_SHIFT, GPT_CLK_MASK, 0, &_lock);
-        clk_register_clkdev(clk, "gpt3_mux_clk", NULL);
+        clk_register_clkdev(clk, "gpt3_mclk", NULL);
-        clk = clk_register_gate(NULL, "gpt3_clk", "gpt3_mux_clk", 0,
+        clk = clk_register_gate(NULL, "gpt3_clk", "gpt3_mclk", 0,
                        PERIP1_CLK_ENB, GPT3_CLK_ENB, 0, &_lock);
        clk_register_clkdev(clk, NULL, "gpt3");
        /* clock derived from pll3 clk */
-        clk = clk_register_gate(NULL, "usbh0_clk", "pll3_48m_clk", 0,
+        clk = clk_register_gate(NULL, "usbh0_clk", "pll3_clk", 0,
                        PERIP1_CLK_ENB, USBH0_CLK_ENB, 0, &_lock);
        clk_register_clkdev(clk, NULL, "usbh.0_clk");
-        clk = clk_register_gate(NULL, "usbh1_clk", "pll3_48m_clk", 0,
+        clk = clk_register_gate(NULL, "usbh1_clk", "pll3_clk", 0,
                        PERIP1_CLK_ENB, USBH1_CLK_ENB, 0, &_lock);
        clk_register_clkdev(clk, NULL, "usbh.1_clk");
-        clk = clk_register_gate(NULL, "usbd_clk", "pll3_48m_clk", 0,
+        clk = clk_register_gate(NULL, "usbd_clk", "pll3_clk", 0, PERIP1_CLK_ENB,
-                        PERIP1_CLK_ENB, USBD_CLK_ENB, 0, &_lock);
+                        USBD_CLK_ENB, 0, &_lock);
        clk_register_clkdev(clk, NULL, "designware_udc");
        /* clock derived from ahb clk */
@@ -278,9 +277,8 @@ void __init spear6xx_clk_init(void)
        clk_register_clkdev(clk, "ahbmult2_clk", NULL);
        clk = clk_register_mux(NULL, "ddr_clk", ddr_parents,
-                        ARRAY_SIZE(ddr_parents),
+                        ARRAY_SIZE(ddr_parents), 0, PLL_CLK_CFG, MCTR_CLK_SHIFT,
-                        0, PLL_CLK_CFG, MCTR_CLK_SHIFT, MCTR_CLK_MASK, 0,
+                        MCTR_CLK_MASK, 0, &_lock);
-                        &_lock);
        clk_register_clkdev(clk, "ddr_clk", NULL);
        clk = clk_register_divider(NULL, "apb_clk", "ahb_clk",
@@ -298,7 +296,7 @@ void __init spear6xx_clk_init(void)
        clk = clk_register_gate(NULL, "gmac_clk", "ahb_clk", 0, PERIP1_CLK_ENB,
                        GMAC_CLK_ENB, 0, &_lock);
-        clk_register_clkdev(clk, NULL, "gmac");
+        clk_register_clkdev(clk, NULL, "e0800000.ethernet");
        clk = clk_register_gate(NULL, "i2c_clk", "ahb_clk", 0, PERIP1_CLK_ENB,
                        I2C_CLK_ENB, 0, &_lock);
diff --git a/drivers/clk/versatile/Makefile b/drivers/clk/versatile/Makefile
new file mode 100644
index 000000000000..50cf6a2ee693
--- /dev/null
+++ b/drivers/clk/versatile/Makefile
@@ -0,0 +1,3 @@
+# Makefile for Versatile-specific clocks
+obj-$(CONFIG_ICST)              += clk-icst.o
+obj-$(CONFIG_ARCH_INTEGRATOR)   += clk-integrator.o
diff --git a/drivers/clk/versatile/clk-icst.c b/drivers/clk/versatile/clk-icst.c
new file mode 100644
index 000000000000..f555b50a5fa5
--- /dev/null
+++ b/drivers/clk/versatile/clk-icst.c
@@ -0,0 +1,100 @@
+/*
+ * Driver for the ICST307 VCO clock found in the ARM Reference designs.
+ * We wrap the custom interface from <asm/hardware/icst.h> into the generic
+ * clock framework.
+ *
+ * TODO: when all ARM reference designs are migrated to generic clocks, the
+ * ICST clock code from the ARM tree should probably be merged into this
+ * file.
+ */
+#include <linux/clk.h>
+#include <linux/clkdev.h>
+#include <linux/err.h>
+#include <linux/clk-provider.h>
+#include "clk-icst.h"
+/**
+ * struct clk_icst - ICST VCO clock wrapper
+ * @hw: corresponding clock hardware entry
+ * @params: parameters for this ICST instance
+ * @rate: current rate
+ * @setvco: function to commit ICST settings to hardware
+ */
+struct clk_icst {
+        struct clk_hw hw;
+        const struct icst_params *params;
+        unsigned long rate;
+        struct icst_vco (*getvco)(void);
+        void (*setvco)(struct icst_vco);
+};
+#define to_icst(_hw) container_of(_hw, struct clk_icst, hw)
+static unsigned long icst_recalc_rate(struct clk_hw *hw,
+                                      unsigned long parent_rate)
+{
+        struct clk_icst *icst = to_icst(hw);
+        struct icst_vco vco;
+        vco = icst->getvco();
+        icst->rate = icst_hz(icst->params, vco);
+        return icst->rate;
+}
+static long icst_round_rate(struct clk_hw *hw, unsigned long rate,
+                            unsigned long *prate)
+{
+        struct clk_icst *icst = to_icst(hw);
+        struct icst_vco vco;
+        vco = icst_hz_to_vco(icst->params, rate);
+        return icst_hz(icst->params, vco);
+}
+static int icst_set_rate(struct clk_hw *hw, unsigned long rate,
+                         unsigned long parent_rate)
+{
+        struct clk_icst *icst = to_icst(hw);
+        struct icst_vco vco;
+        vco = icst_hz_to_vco(icst->params, rate);
+        icst->rate = icst_hz(icst->params, vco);
+        icst->setvco(vco);
+        return 0;
+}
+static const struct clk_ops icst_ops = {
+        .recalc_rate = icst_recalc_rate,
+        .round_rate = icst_round_rate,
+        .set_rate = icst_set_rate,
+};
+struct clk * __init icst_clk_register(struct device *dev,
+                                      const struct clk_icst_desc *desc)
+{
+        struct clk *clk;
+        struct clk_icst *icst;
+        struct clk_init_data init;
+        icst = kzalloc(sizeof(struct clk_icst), GFP_KERNEL);
+        if (!icst) {
+                pr_err("could not allocate ICST clock!\n");
+                return ERR_PTR(-ENOMEM);
+        }
+        init.name = "icst";
+        init.ops = &icst_ops;
+        init.flags = CLK_IS_ROOT;
+        init.parent_names = NULL;
+        init.num_parents = 0;
+        icst->hw.init = &init;
+        icst->params = desc->params;
+        icst->getvco = desc->getvco;
+        icst->setvco = desc->setvco;
+        clk = clk_register(dev, &icst->hw);
+        if (IS_ERR(clk))
+                kfree(icst);
+        return clk;
+}
diff --git a/drivers/clk/versatile/clk-icst.h b/drivers/clk/versatile/clk-icst.h
new file mode 100644
index 000000000000..71b4c56c1410
--- /dev/null
+++ b/drivers/clk/versatile/clk-icst.h
@@ -0,0 +1,10 @@
+#include <asm/hardware/icst.h>
+struct clk_icst_desc {
+        const struct icst_params *params;
+        struct icst_vco (*getvco)(void);
+        void (*setvco)(struct icst_vco);
+};
+struct clk *icst_clk_register(struct device *dev,
+                              const struct clk_icst_desc *desc);
diff --git a/drivers/clk/versatile/clk-integrator.c b/drivers/clk/versatile/clk-integrator.c
new file mode 100644
index 000000000000..a5053921bf7f
--- /dev/null
+++ b/drivers/clk/versatile/clk-integrator.c
@@ -0,0 +1,111 @@
+#include <linux/clk.h>
+#include <linux/clkdev.h>
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/clk-provider.h>
+#include <mach/hardware.h>
+#include <mach/platform.h>
+#include "clk-icst.h"
+/*
+ * Implementation of the ARM Integrator/AP and Integrator/CP clock tree.
+ * Inspired by portions of:
+ * plat-versatile/clock.c and plat-versatile/include/plat/clock.h
+ */
+#define CM_LOCK         (__io_address(INTEGRATOR_HDR_BASE)+INTEGRATOR_HDR_LOCK_OFFSET)
+#define CM_AUXOSC       (__io_address(INTEGRATOR_HDR_BASE)+0x1c)
+/**
+ * cp_auxvco_get() - get ICST VCO settings for the Integrator/CP
+ * @vco: ICST VCO parameters to update with hardware status
+ */
+static struct icst_vco cp_auxvco_get(void)
+{
+        u32 val;
+        struct icst_vco vco;
+        val = readl(CM_AUXOSC);
+        vco.v = val & 0x1ff;
+        vco.r = (val >> 9) & 0x7f;
+        vco.s = (val >> 16) & 03;
+        return vco;
+}
+/**
+ * cp_auxvco_set() - commit changes to Integrator/CP ICST VCO
+ * @vco: ICST VCO parameters to commit
+ */
+static void cp_auxvco_set(struct icst_vco vco)
+{
+        u32 val;
+        val = readl(CM_AUXOSC) & ~0x7ffff;
+        val |= vco.v | (vco.r << 9) | (vco.s << 16);
+        /* This magic unlocks the CM VCO so it can be controlled */
+        writel(0xa05f, CM_LOCK);
+        writel(val, CM_AUXOSC);
+        /* This locks the CM again */
+        writel(0, CM_LOCK);
+}
+static const struct icst_params cp_auxvco_params = {
+        .ref            = 24000000,
+        .vco_max        = ICST525_VCO_MAX_5V,
+        .vco_min        = ICST525_VCO_MIN,
+        .vd_min         = 8,
+        .vd_max         = 263,
+        .rd_min         = 3,
+        .rd_max         = 65,
+        .s2div          = icst525_s2div,
+        .idx2s          = icst525_idx2s,
+};
+static const struct clk_icst_desc __initdata cp_icst_desc = {
+        .params = &cp_auxvco_params,
+        .getvco = cp_auxvco_get,
+        .setvco = cp_auxvco_set,
+};
+/*
+ * integrator_clk_init() - set up the integrator clock tree
+ * @is_cp: pass true if it's the Integrator/CP else AP is assumed
+ */
+void __init integrator_clk_init(bool is_cp)
+{
+        struct clk *clk;
+        /* APB clock dummy */
+        clk = clk_register_fixed_rate(NULL, "apb_pclk", NULL, CLK_IS_ROOT, 0);
+        clk_register_clkdev(clk, "apb_pclk", NULL);
+        /* UART reference clock */
+        clk = clk_register_fixed_rate(NULL, "uartclk", NULL, CLK_IS_ROOT,
+                                14745600);
+        clk_register_clkdev(clk, NULL, "uart0");
+        clk_register_clkdev(clk, NULL, "uart1");
+        if (is_cp)
+                clk_register_clkdev(clk, NULL, "mmci");
+        /* 24 MHz clock */
+        clk = clk_register_fixed_rate(NULL, "clk24mhz", NULL, CLK_IS_ROOT,
+                                24000000);
+        clk_register_clkdev(clk, NULL, "kmi0");
+        clk_register_clkdev(clk, NULL, "kmi1");
+        if (!is_cp)
+                clk_register_clkdev(clk, NULL, "ap_timer");
+        if (!is_cp)
+                return;
+        /* 1 MHz clock */
+        clk = clk_register_fixed_rate(NULL, "clk1mhz", NULL, CLK_IS_ROOT,
+                                1000000);
+        clk_register_clkdev(clk, NULL, "sp804");
+        /* ICST VCO clock used on the Integrator/CP CLCD */
+        clk = icst_clk_register(NULL, &cp_icst_desc);
+        clk_register_clkdev(clk, NULL, "clcd");
+}
diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index 99c6b203e6cd..d53cd0afc200 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -16,6 +16,12 @@ config CLKSRC_MMIO
 config DW_APB_TIMER
        bool
+config DW_APB_TIMER_OF
+        bool
+config ARMADA_370_XP_TIMER
+        bool
 config CLKSRC_DBX500_PRCMU
        bool "Clocksource PRCMU Timer"
        depends on UX500_SOC_DB8500
diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index dd3e661a124d..b65d0c56ab35 100644
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -10,4 +10,6 @@ obj-$(CONFIG_EM_TIMER_STI)	+= em_sti.o
 obj-$(CONFIG_CLKBLD_I8253)      += i8253.o
 obj-$(CONFIG_CLKSRC_MMIO)       += mmio.o
 obj-$(CONFIG_DW_APB_TIMER)      += dw_apb_timer.o
-obj-$(CONFIG_CLKSRC_DBX500_PRCMU)       += clksrc-dbx500-prcmu.o
-\ No newline at end of file
+obj-$(CONFIG_DW_APB_TIMER_OF)   += dw_apb_timer_of.o
+obj-$(CONFIG_CLKSRC_DBX500_PRCMU)       += clksrc-dbx500-prcmu.o
+obj-$(CONFIG_ARMADA_370_XP_TIMER)       += time-armada-370-xp.o
diff --git a/drivers/clocksource/cs5535-clockevt.c b/drivers/clocksource/cs5535-clockevt.c
index 540795cd0760..d9279385304d 100644
--- a/drivers/clocksource/cs5535-clockevt.c
+++ b/drivers/clocksource/cs5535-clockevt.c
@@ -53,7 +53,7 @@ static struct cs5535_mfgpt_timer *cs5535_event_clock;
 #define MFGPT_PERIODIC (MFGPT_HZ / HZ)
 /*
- * The MFPGT timers on the CS5536 provide us with suitable timers to use
+ * The MFGPT timers on the CS5536 provide us with suitable timers to use
 * as clock event sources - not as good as a HPET or APIC, but certainly
 * better than the PIT.  This isn't a general purpose MFGPT driver, but
 * a simplified one designed specifically to act as a clock event source.
@@ -144,7 +144,7 @@ static int __init cs5535_mfgpt_init(void)
        timer = cs5535_mfgpt_alloc_timer(MFGPT_TIMER_ANY, MFGPT_DOMAIN_WORKING);
        if (!timer) {
-                printk(KERN_ERR DRV_NAME ": Could not allocate MFPGT timer\n");
+                printk(KERN_ERR DRV_NAME ": Could not allocate MFGPT timer\n");
                return -ENODEV;
        }
        cs5535_event_clock = timer;
diff --git a/drivers/clocksource/dw_apb_timer_of.c b/drivers/clocksource/dw_apb_timer_of.c
new file mode 100644
index 000000000000..f7dba5b79b44
--- /dev/null
+++ b/drivers/clocksource/dw_apb_timer_of.c
@@ -0,0 +1,131 @@
+/*
+ * Copyright (C) 2012 Altera Corporation
+ * Copyright (c) 2011 Picochip Ltd., Jamie Iles
+ *
+ * Modified from mach-picoxcell/time.c
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+#include <linux/dw_apb_timer.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <asm/mach/time.h>
+#include <asm/sched_clock.h>
+static void timer_get_base_and_rate(struct device_node *np,
+                                    void __iomem **base, u32 *rate)
+{
+        *base = of_iomap(np, 0);
+        if (!*base)
+                panic("Unable to map regs for %s", np->name);
+        if (of_property_read_u32(np, "clock-freq", rate) &&
+                of_property_read_u32(np, "clock-frequency", rate))
+                panic("No clock-frequency property for %s", np->name);
+}
+static void add_clockevent(struct device_node *event_timer)
+{
+        void __iomem *iobase;
+        struct dw_apb_clock_event_device *ced;
+        u32 irq, rate;
+        irq = irq_of_parse_and_map(event_timer, 0);
+        if (irq == NO_IRQ)
+                panic("No IRQ for clock event timer");
+        timer_get_base_and_rate(event_timer, &iobase, &rate);
+        ced = dw_apb_clockevent_init(0, event_timer->name, 300, iobase, irq,
+                                     rate);
+        if (!ced)
+                panic("Unable to initialise clockevent device");
+        dw_apb_clockevent_register(ced);
+}
+static void add_clocksource(struct device_node *source_timer)
+{
+        void __iomem *iobase;
+        struct dw_apb_clocksource *cs;
+        u32 rate;
+        timer_get_base_and_rate(source_timer, &iobase, &rate);
+        cs = dw_apb_clocksource_init(300, source_timer->name, iobase, rate);
+        if (!cs)
+                panic("Unable to initialise clocksource device");
+        dw_apb_clocksource_start(cs);
+        dw_apb_clocksource_register(cs);
+}
+static void __iomem *sched_io_base;
+static u32 read_sched_clock(void)
+{
+        return __raw_readl(sched_io_base);
+}
+static const struct of_device_id sptimer_ids[] __initconst = {
+        { .compatible = "picochip,pc3x2-rtc" },
+        { .compatible = "snps,dw-apb-timer-sp" },
+        { /* Sentinel */ },
+};
+static void init_sched_clock(void)
+{
+        struct device_node *sched_timer;
+        u32 rate;
+        sched_timer = of_find_matching_node(NULL, sptimer_ids);
+        if (!sched_timer)
+                panic("No RTC for sched clock to use");
+        timer_get_base_and_rate(sched_timer, &sched_io_base, &rate);
+        of_node_put(sched_timer);
+        setup_sched_clock(read_sched_clock, 32, rate);
+}
+static const struct of_device_id osctimer_ids[] __initconst = {
+        { .compatible = "picochip,pc3x2-timer" },
+        { .compatible = "snps,dw-apb-timer-osc" },
+        {},
+};
+static void __init timer_init(void)
+{
+        struct device_node *event_timer, *source_timer;
+        event_timer = of_find_matching_node(NULL, osctimer_ids);
+        if (!event_timer)
+                panic("No timer for clockevent");
+        add_clockevent(event_timer);
+        source_timer = of_find_matching_node(event_timer, osctimer_ids);
+        if (!source_timer)
+                panic("No timer for clocksource");
+        add_clocksource(source_timer);
+        of_node_put(source_timer);
+        init_sched_clock();
+}
+struct sys_timer dw_apb_timer = {
+        .init = timer_init,
+};
diff --git a/drivers/clocksource/sh_cmt.c b/drivers/clocksource/sh_cmt.c
index 32fe9ef5cc5c..98b06baafcc6 100644
--- a/drivers/clocksource/sh_cmt.c
+++ b/drivers/clocksource/sh_cmt.c
@@ -48,13 +48,13 @@ struct sh_cmt_priv {
        unsigned long next_match_value;
        unsigned long max_match_value;
        unsigned long rate;
-        spinlock_t lock;
+        raw_spinlock_t lock;
        struct clock_event_device ced;
        struct clocksource cs;
        unsigned long total_cycles;
 };
-static DEFINE_SPINLOCK(sh_cmt_lock);
+static DEFINE_RAW_SPINLOCK(sh_cmt_lock);
 #define CMSTR -1 /* shared register */
 #define CMCSR 0 /* channel register */
@@ -139,7 +139,7 @@ static void sh_cmt_start_stop_ch(struct sh_cmt_priv *p, int start)
        unsigned long flags, value;
        /* start stop register shared by multiple timer channels */
-        spin_lock_irqsave(&sh_cmt_lock, flags);
+        raw_spin_lock_irqsave(&sh_cmt_lock, flags);
        value = sh_cmt_read(p, CMSTR);
        if (start)
@@ -148,7 +148,7 @@ static void sh_cmt_start_stop_ch(struct sh_cmt_priv *p, int start)
                value &= ~(1 << cfg->timer_bit);
        sh_cmt_write(p, CMSTR, value);
-        spin_unlock_irqrestore(&sh_cmt_lock, flags);
+        raw_spin_unlock_irqrestore(&sh_cmt_lock, flags);
 }
 static int sh_cmt_enable(struct sh_cmt_priv *p, unsigned long *rate)
@@ -328,9 +328,9 @@ static void sh_cmt_set_next(struct sh_cmt_priv *p, unsigned long delta)
 {
        unsigned long flags;
-        spin_lock_irqsave(&p->lock, flags);
+        raw_spin_lock_irqsave(&p->lock, flags);
        __sh_cmt_set_next(p, delta);
-        spin_unlock_irqrestore(&p->lock, flags);
+        raw_spin_unlock_irqrestore(&p->lock, flags);
 }
 static irqreturn_t sh_cmt_interrupt(int irq, void *dev_id)
@@ -385,7 +385,7 @@ static int sh_cmt_start(struct sh_cmt_priv *p, unsigned long flag)
        int ret = 0;
        unsigned long flags;
-        spin_lock_irqsave(&p->lock, flags);
+        raw_spin_lock_irqsave(&p->lock, flags);
        if (!(p->flags & (FLAG_CLOCKEVENT | FLAG_CLOCKSOURCE)))
                ret = sh_cmt_enable(p, &p->rate);
@@ -398,7 +398,7 @@ static int sh_cmt_start(struct sh_cmt_priv *p, unsigned long flag)
        if ((flag == FLAG_CLOCKSOURCE) && (!(p->flags & FLAG_CLOCKEVENT)))
                __sh_cmt_set_next(p, p->max_match_value);
 out:
-        spin_unlock_irqrestore(&p->lock, flags);
+        raw_spin_unlock_irqrestore(&p->lock, flags);
        return ret;
 }
@@ -408,7 +408,7 @@ static void sh_cmt_stop(struct sh_cmt_priv *p, unsigned long flag)
        unsigned long flags;
        unsigned long f;
-        spin_lock_irqsave(&p->lock, flags);
+        raw_spin_lock_irqsave(&p->lock, flags);
        f = p->flags & (FLAG_CLOCKEVENT | FLAG_CLOCKSOURCE);
        p->flags &= ~flag;
@@ -420,7 +420,7 @@ static void sh_cmt_stop(struct sh_cmt_priv *p, unsigned long flag)
        if ((flag == FLAG_CLOCKEVENT) && (p->flags & FLAG_CLOCKSOURCE))
                __sh_cmt_set_next(p, p->max_match_value);
-        spin_unlock_irqrestore(&p->lock, flags);
+        raw_spin_unlock_irqrestore(&p->lock, flags);
 }
 static struct sh_cmt_priv *cs_to_sh_cmt(struct clocksource *cs)
@@ -435,13 +435,13 @@ static cycle_t sh_cmt_clocksource_read(struct clocksource *cs)
        unsigned long value;
        int has_wrapped;
-        spin_lock_irqsave(&p->lock, flags);
+        raw_spin_lock_irqsave(&p->lock, flags);
        value = p->total_cycles;
        raw = sh_cmt_get_counter(p, &has_wrapped);
        if (unlikely(has_wrapped))
                raw += p->match_value + 1;
-        spin_unlock_irqrestore(&p->lock, flags);
+        raw_spin_unlock_irqrestore(&p->lock, flags);
        return value + raw;
 }
@@ -591,7 +591,7 @@ static int sh_cmt_register(struct sh_cmt_priv *p, char *name,
                p->max_match_value = (1 << p->width) - 1;
        p->match_value = p->max_match_value;
-        spin_lock_init(&p->lock);
+        raw_spin_lock_init(&p->lock);
        if (clockevent_rating)
                sh_cmt_register_clockevent(p, name, clockevent_rating);
diff --git a/drivers/clocksource/sh_mtu2.c b/drivers/clocksource/sh_mtu2.c
index a2172f690418..d9b76ca64a61 100644
--- a/drivers/clocksource/sh_mtu2.c
+++ b/drivers/clocksource/sh_mtu2.c
@@ -43,7 +43,7 @@ struct sh_mtu2_priv {
        struct clock_event_device ced;
 };
-static DEFINE_SPINLOCK(sh_mtu2_lock);
+static DEFINE_RAW_SPINLOCK(sh_mtu2_lock);
 #define TSTR -1 /* shared register */
 #define TCR  0 /* channel register */
@@ -107,7 +107,7 @@ static void sh_mtu2_start_stop_ch(struct sh_mtu2_priv *p, int start)
        unsigned long flags, value;
        /* start stop register shared by multiple timer channels */
-        spin_lock_irqsave(&sh_mtu2_lock, flags);
+        raw_spin_lock_irqsave(&sh_mtu2_lock, flags);
        value = sh_mtu2_read(p, TSTR);
        if (start)
@@ -116,7 +116,7 @@ static void sh_mtu2_start_stop_ch(struct sh_mtu2_priv *p, int start)
                value &= ~(1 << cfg->timer_bit);
        sh_mtu2_write(p, TSTR, value);
-        spin_unlock_irqrestore(&sh_mtu2_lock, flags);
+        raw_spin_unlock_irqrestore(&sh_mtu2_lock, flags);
 }
 static int sh_mtu2_enable(struct sh_mtu2_priv *p)
diff --git a/drivers/clocksource/sh_tmu.c b/drivers/clocksource/sh_tmu.c
index 97f54b634be4..c1b51d49d106 100644
--- a/drivers/clocksource/sh_tmu.c
+++ b/drivers/clocksource/sh_tmu.c
@@ -45,7 +45,7 @@ struct sh_tmu_priv {
        struct clocksource cs;
 };
-static DEFINE_SPINLOCK(sh_tmu_lock);
+static DEFINE_RAW_SPINLOCK(sh_tmu_lock);
 #define TSTR -1 /* shared register */
 #define TCOR  0 /* channel register */
@@ -95,7 +95,7 @@ static void sh_tmu_start_stop_ch(struct sh_tmu_priv *p, int start)
        unsigned long flags, value;
        /* start stop register shared by multiple timer channels */
-        spin_lock_irqsave(&sh_tmu_lock, flags);
+        raw_spin_lock_irqsave(&sh_tmu_lock, flags);
        value = sh_tmu_read(p, TSTR);
        if (start)
@@ -104,7 +104,7 @@ static void sh_tmu_start_stop_ch(struct sh_tmu_priv *p, int start)
                value &= ~(1 << cfg->timer_bit);
        sh_tmu_write(p, TSTR, value);
-        spin_unlock_irqrestore(&sh_tmu_lock, flags);
+        raw_spin_unlock_irqrestore(&sh_tmu_lock, flags);
 }
 static int sh_tmu_enable(struct sh_tmu_priv *p)
@@ -245,12 +245,7 @@ static void sh_tmu_clock_event_start(struct sh_tmu_priv *p, int periodic)
        sh_tmu_enable(p);
-        /* TODO: calculate good shift from rate and counter bit width */
+        clockevents_config(ced, p->rate);
-        ced->shift = 32;
-        ced->mult = div_sc(p->rate, NSEC_PER_SEC, ced->shift);
-        ced->max_delta_ns = clockevent_delta2ns(0xffffffff, ced);
-        ced->min_delta_ns = 5000;
        if (periodic) {
                p->periodic = (p->rate + HZ/2) / HZ;
@@ -323,7 +318,8 @@ static void sh_tmu_register_clockevent(struct sh_tmu_priv *p,
        ced->set_mode = sh_tmu_clock_event_mode;
        dev_info(&p->pdev->dev, "used for clock events\n");
-        clockevents_register_device(ced);
+        clockevents_config_and_register(ced, 1, 0x300, 0xffffffff);
        ret = setup_irq(p->irqaction.irq, &p->irqaction);
        if (ret) {
diff --git a/drivers/clocksource/time-armada-370-xp.c b/drivers/clocksource/time-armada-370-xp.c
new file mode 100644
index 000000000000..4674f94957cd
--- /dev/null
+++ b/drivers/clocksource/time-armada-370-xp.c
@@ -0,0 +1,226 @@
+/*
+ * Marvell Armada 370/XP SoC timer handling.
+ *
+ * Copyright (C) 2012 Marvell
+ *
+ * Lior Amsalem <alior@marvell.com>
+ * Gregory CLEMENT <gregory.clement@free-electrons.com>
+ * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ *
+ * Timer 0 is used as free-running clocksource, while timer 1 is
+ * used as clock_event_device.
+ */
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/kernel.h>
+#include <linux/timer.h>
+#include <linux/clockchips.h>
+#include <linux/interrupt.h>
+#include <linux/of.h>
+#include <linux/of_irq.h>
+#include <linux/of_address.h>
+#include <linux/irq.h>
+#include <linux/module.h>
+#include <asm/sched_clock.h>
+/*
+ * Timer block registers.
+ */
+#define TIMER_CTRL_OFF          0x0000
+#define  TIMER0_EN               0x0001
+#define  TIMER0_RELOAD_EN        0x0002
+#define  TIMER0_25MHZ            0x0800
+#define  TIMER0_DIV(div)         ((div) << 19)
+#define  TIMER1_EN               0x0004
+#define  TIMER1_RELOAD_EN        0x0008
+#define  TIMER1_25MHZ            0x1000
+#define  TIMER1_DIV(div)         ((div) << 22)
+#define TIMER_EVENTS_STATUS     0x0004
+#define  TIMER0_CLR_MASK         (~0x1)
+#define  TIMER1_CLR_MASK         (~0x100)
+#define TIMER0_RELOAD_OFF       0x0010
+#define TIMER0_VAL_OFF          0x0014
+#define TIMER1_RELOAD_OFF       0x0018
+#define TIMER1_VAL_OFF          0x001c
+/* Global timers are connected to the coherency fabric clock, and the
+   below divider reduces their incrementing frequency. */
+#define TIMER_DIVIDER_SHIFT     5
+#define TIMER_DIVIDER           (1 << TIMER_DIVIDER_SHIFT)
+/*
+ * SoC-specific data.
+ */
+static void __iomem *timer_base;
+static int timer_irq;
+/*
+ * Number of timer ticks per jiffy.
+ */
+static u32 ticks_per_jiffy;
+static u32 notrace armada_370_xp_read_sched_clock(void)
+{
+        return ~readl(timer_base + TIMER0_VAL_OFF);
+}
+/*
+ * Clockevent handling.
+ */
+static int
+armada_370_xp_clkevt_next_event(unsigned long delta,
+                                struct clock_event_device *dev)
+{
+        u32 u;
+        /*
+         * Clear clockevent timer interrupt.
+         */
+        writel(TIMER1_CLR_MASK, timer_base + TIMER_EVENTS_STATUS);
+        /*
+         * Setup new clockevent timer value.
+         */
+        writel(delta, timer_base + TIMER1_VAL_OFF);
+        /*
+         * Enable the timer.
+         */
+        u = readl(timer_base + TIMER_CTRL_OFF);
+        u = ((u & ~TIMER1_RELOAD_EN) | TIMER1_EN |
+             TIMER1_DIV(TIMER_DIVIDER_SHIFT));
+        writel(u, timer_base + TIMER_CTRL_OFF);
+        return 0;
+}
+static void
+armada_370_xp_clkevt_mode(enum clock_event_mode mode,
+                          struct clock_event_device *dev)
+{
+        u32 u;
+        if (mode == CLOCK_EVT_MODE_PERIODIC) {
+                /*
+                 * Setup timer to fire at 1/HZ intervals.
+                 */
+                writel(ticks_per_jiffy - 1, timer_base + TIMER1_RELOAD_OFF);
+                writel(ticks_per_jiffy - 1, timer_base + TIMER1_VAL_OFF);
+                /*
+                 * Enable timer.
+                 */
+                u = readl(timer_base + TIMER_CTRL_OFF);
+                writel((u | TIMER1_EN | TIMER1_RELOAD_EN |
+                        TIMER1_DIV(TIMER_DIVIDER_SHIFT)),
+                       timer_base + TIMER_CTRL_OFF);
+        } else {
+                /*
+                 * Disable timer.
+                 */
+                u = readl(timer_base + TIMER_CTRL_OFF);
+                writel(u & ~TIMER1_EN, timer_base + TIMER_CTRL_OFF);
+                /*
+                 * ACK pending timer interrupt.
+                 */
+                writel(TIMER1_CLR_MASK, timer_base + TIMER_EVENTS_STATUS);
+        }
+}
+static struct clock_event_device armada_370_xp_clkevt = {
+        .name           = "armada_370_xp_tick",
+        .features       = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_PERIODIC,
+        .shift          = 32,
+        .rating         = 300,
+        .set_next_event = armada_370_xp_clkevt_next_event,
+        .set_mode       = armada_370_xp_clkevt_mode,
+};
+static irqreturn_t armada_370_xp_timer_interrupt(int irq, void *dev_id)
+{
+        /*
+         * ACK timer interrupt and call event handler.
+         */
+        writel(TIMER1_CLR_MASK, timer_base + TIMER_EVENTS_STATUS);
+        armada_370_xp_clkevt.event_handler(&armada_370_xp_clkevt);
+        return IRQ_HANDLED;
+}
+static struct irqaction armada_370_xp_timer_irq = {
+        .name           = "armada_370_xp_tick",
+        .flags          = IRQF_DISABLED | IRQF_TIMER,
+        .handler        = armada_370_xp_timer_interrupt
+};
+void __init armada_370_xp_timer_init(void)
+{
+        u32 u;
+        struct device_node *np;
+        unsigned int timer_clk;
+        int ret;
+        np = of_find_compatible_node(NULL, NULL, "marvell,armada-370-xp-timer");
+        timer_base = of_iomap(np, 0);
+        WARN_ON(!timer_base);
+        if (of_find_property(np, "marvell,timer-25Mhz", NULL)) {
+                /* The fixed 25MHz timer is available so let's use it */
+                u = readl(timer_base + TIMER_CTRL_OFF);
+                writel(u | TIMER0_25MHZ | TIMER1_25MHZ,
+                       timer_base + TIMER_CTRL_OFF);
+                timer_clk = 25000000;
+        } else {
+                u32 clk = 0;
+                ret = of_property_read_u32(np, "clock-frequency", &clk);
+                WARN_ON(!clk || ret < 0);
+                u = readl(timer_base + TIMER_CTRL_OFF);
+                writel(u & ~(TIMER0_25MHZ | TIMER1_25MHZ),
+                       timer_base + TIMER_CTRL_OFF);
+                timer_clk = clk / TIMER_DIVIDER;
+        }
+        /* We use timer 0 as clocksource, and timer 1 for
+           clockevents */
+        timer_irq = irq_of_parse_and_map(np, 1);
+        ticks_per_jiffy = (timer_clk + HZ / 2) / HZ;
+        /*
+         * Set scale and timer for sched_clock.
+         */
+        setup_sched_clock(armada_370_xp_read_sched_clock, 32, timer_clk);
+        /*
+         * Setup free-running clocksource timer (interrupts
+         * disabled).
+         */
+        writel(0xffffffff, timer_base + TIMER0_VAL_OFF);
+        writel(0xffffffff, timer_base + TIMER0_RELOAD_OFF);
+        u = readl(timer_base + TIMER_CTRL_OFF);
+        writel((u | TIMER0_EN | TIMER0_RELOAD_EN |
+                TIMER0_DIV(TIMER_DIVIDER_SHIFT)), timer_base + TIMER_CTRL_OFF);
+        clocksource_mmio_init(timer_base + TIMER0_VAL_OFF,
+                              "armada_370_xp_clocksource",
+                              timer_clk, 300, 32, clocksource_mmio_readl_down);
+        /*
+         * Setup clockevent timer (interrupt-driven).
+         */
+        setup_irq(timer_irq, &armada_370_xp_timer_irq);
+        armada_370_xp_clkevt.cpumask = cpumask_of(0);
+        clockevents_config_and_register(&armada_370_xp_clkevt,
+                                        timer_clk, 1, 0xfffffffe);
+}
diff --git a/drivers/connector/cn_proc.c b/drivers/connector/cn_proc.c
index 77e1e6cd66ce..3e92b7d3fcd2 100644
--- a/drivers/connector/cn_proc.c
+++ b/drivers/connector/cn_proc.c
@@ -46,7 +46,7 @@ static DEFINE_PER_CPU(__u32, proc_event_counts) = { 0 };
 static inline void get_seq(__u32 *ts, int *cpu)
 {
        preempt_disable();
-        *ts = __this_cpu_inc_return(proc_event_counts) -1;
+        *ts = __this_cpu_inc_return(proc_event_counts) - 1;
        *cpu = smp_processor_id();
        preempt_enable();
 }
@@ -62,8 +62,8 @@ void proc_fork_connector(struct task_struct *task)
        if (atomic_read(&proc_event_num_listeners) < 1)
                return;
-        msg = (struct cn_msg*)buffer;
+        msg = (struct cn_msg *)buffer;
-        ev = (struct proc_event*)msg->data;
+        ev = (struct proc_event *)msg->data;
        get_seq(&msg->seq, &ev->cpu);
        ktime_get_ts(&ts); /* get high res monotonic timestamp */
        put_unaligned(timespec_to_ns(&ts), (__u64 *)&ev->timestamp_ns);
@@ -93,8 +93,8 @@ void proc_exec_connector(struct task_struct *task)
        if (atomic_read(&proc_event_num_listeners) < 1)
                return;
-        msg = (struct cn_msg*)buffer;
+        msg = (struct cn_msg *)buffer;
-        ev = (struct proc_event*)msg->data;
+        ev = (struct proc_event *)msg->data;
        get_seq(&msg->seq, &ev->cpu);
        ktime_get_ts(&ts); /* get high res monotonic timestamp */
        put_unaligned(timespec_to_ns(&ts), (__u64 *)&ev->timestamp_ns);
@@ -119,8 +119,8 @@ void proc_id_connector(struct task_struct *task, int which_id)
        if (atomic_read(&proc_event_num_listeners) < 1)
                return;
-        msg = (struct cn_msg*)buffer;
+        msg = (struct cn_msg *)buffer;
-        ev = (struct proc_event*)msg->data;
+        ev = (struct proc_event *)msg->data;
        ev->what = which_id;
        ev->event_data.id.process_pid = task->pid;
        ev->event_data.id.process_tgid = task->tgid;
@@ -134,7 +134,7 @@ void proc_id_connector(struct task_struct *task, int which_id)
                ev->event_data.id.e.egid = cred->egid;
        } else {
                rcu_read_unlock();
-                return;
+                return;
        }
        rcu_read_unlock();
        get_seq(&msg->seq, &ev->cpu);
@@ -241,8 +241,8 @@ void proc_exit_connector(struct task_struct *task)
        if (atomic_read(&proc_event_num_listeners) < 1)
                return;
-        msg = (struct cn_msg*)buffer;
+        msg = (struct cn_msg *)buffer;
-        ev = (struct proc_event*)msg->data;
+        ev = (struct proc_event *)msg->data;
        get_seq(&msg->seq, &ev->cpu);
        ktime_get_ts(&ts); /* get high res monotonic timestamp */
        put_unaligned(timespec_to_ns(&ts), (__u64 *)&ev->timestamp_ns);
@@ -276,8 +276,8 @@ static void cn_proc_ack(int err, int rcvd_seq, int rcvd_ack)
        if (atomic_read(&proc_event_num_listeners) < 1)
                return;
-        msg = (struct cn_msg*)buffer;
+        msg = (struct cn_msg *)buffer;
-        ev = (struct proc_event*)msg->data;
+        ev = (struct proc_event *)msg->data;
        msg->seq = rcvd_seq;
        ktime_get_ts(&ts); /* get high res monotonic timestamp */
        put_unaligned(timespec_to_ns(&ts), (__u64 *)&ev->timestamp_ns);
@@ -303,7 +303,7 @@ static void cn_proc_mcast_ctl(struct cn_msg *msg,
        if (msg->len != sizeof(*mc_op))
                return;
-        mc_op = (enum proc_cn_mcast_op*)msg->data;
+        mc_op = (enum proc_cn_mcast_op *)msg->data;
        switch (*mc_op) {
        case PROC_CN_MCAST_LISTEN:
                atomic_inc(&proc_event_num_listeners);
@@ -325,11 +325,11 @@ static void cn_proc_mcast_ctl(struct cn_msg *msg,
 */
 static int __init cn_proc_init(void)
 {
-        int err;
+        int err = cn_add_callback(&cn_proc_event_id,
+                                  "cn_proc",
-        if ((err = cn_add_callback(&cn_proc_event_id, "cn_proc",
+                                  &cn_proc_mcast_ctl);
-                                   &cn_proc_mcast_ctl))) {
+        if (err) {
-                printk(KERN_WARNING "cn_proc failed to register\n");
+                pr_warn("cn_proc failed to register\n");
                return err;
        }
        return 0;
diff --git a/drivers/connector/cn_queue.c b/drivers/connector/cn_queue.c
index c42c9d517790..1f8bf054d11c 100644
--- a/drivers/connector/cn_queue.c
+++ b/drivers/connector/cn_queue.c
@@ -1,5 +1,5 @@
 /*
- *      cn_queue.c
+ *      cn_queue.c
 *
 * 2004+ Copyright (c) Evgeniy Polyakov <zbr@ioremap.net>
 * All rights reserved.
@@ -34,13 +34,14 @@
 static struct cn_callback_entry *
 cn_queue_alloc_callback_entry(struct cn_queue_dev *dev, const char *name,
                              struct cb_id *id,
-                              void (*callback)(struct cn_msg *, struct netlink_skb_parms *))
+                              void (*callback)(struct cn_msg *,
+                                               struct netlink_skb_parms *))
 {
        struct cn_callback_entry *cbq;
        cbq = kzalloc(sizeof(*cbq), GFP_KERNEL);
        if (!cbq) {
-                printk(KERN_ERR "Failed to create new callback queue.\n");
+                pr_err("Failed to create new callback queue.\n");
                return NULL;
        }
@@ -71,7 +72,8 @@ int cn_cb_equal(struct cb_id *i1, struct cb_id *i2)
 int cn_queue_add_callback(struct cn_queue_dev *dev, const char *name,
                          struct cb_id *id,
-                          void (*callback)(struct cn_msg *, struct netlink_skb_parms *))
+                          void (*callback)(struct cn_msg *,
+                                           struct netlink_skb_parms *))
 {
        struct cn_callback_entry *cbq, *__cbq;
        int found = 0;
@@ -149,7 +151,7 @@ void cn_queue_free_dev(struct cn_queue_dev *dev)
        spin_unlock_bh(&dev->queue_lock);
        while (atomic_read(&dev->refcnt)) {
-                printk(KERN_INFO "Waiting for %s to become free: refcnt=%d.\n",
+                pr_info("Waiting for %s to become free: refcnt=%d.\n",
                       dev->name, atomic_read(&dev->refcnt));
                msleep(1000);
        }
diff --git a/drivers/connector/connector.c b/drivers/connector/connector.c
index dde6a0fad408..82fa4f0f91d6 100644
--- a/drivers/connector/connector.c
+++ b/drivers/connector/connector.c
@@ -1,5 +1,5 @@
 /*
- *      connector.c
+ *      connector.c
 *
 * 2004+ Copyright (c) Evgeniy Polyakov <zbr@ioremap.net>
 * All rights reserved.
@@ -101,19 +101,19 @@ int cn_netlink_send(struct cn_msg *msg, u32 __group, gfp_t gfp_mask)
        if (!skb)
                return -ENOMEM;
-        nlh = NLMSG_PUT(skb, 0, msg->seq, NLMSG_DONE, size - sizeof(*nlh));
+        nlh = nlmsg_put(skb, 0, msg->seq, NLMSG_DONE, size - sizeof(*nlh), 0);
+        if (!nlh) {
+                kfree_skb(skb);
+                return -EMSGSIZE;
+        }
-        data = NLMSG_DATA(nlh);
+        data = nlmsg_data(nlh);
        memcpy(data, msg, sizeof(*data) + msg->len);
        NETLINK_CB(skb).dst_group = group;
        return netlink_broadcast(dev->nls, skb, 0, group, gfp_mask);
-nlmsg_failure:
-        kfree_skb(skb);
-        return -EINVAL;
 }
 EXPORT_SYMBOL_GPL(cn_netlink_send);
@@ -185,7 +185,8 @@ static void cn_rx_skb(struct sk_buff *__skb)
 * May sleep.
 */
 int cn_add_callback(struct cb_id *id, const char *name,
-                    void (*callback)(struct cn_msg *, struct netlink_skb_parms *))
+                    void (*callback)(struct cn_msg *,
+                                     struct netlink_skb_parms *))
 {
        int err;
        struct cn_dev *dev = &cdev;
@@ -251,15 +252,20 @@ static const struct file_operations cn_file_ops = {
        .release = single_release
 };
+static struct cn_dev cdev = {
+        .input   = cn_rx_skb,
+};
 static int __devinit cn_init(void)
 {
        struct cn_dev *dev = &cdev;
+        struct netlink_kernel_cfg cfg = {
-        dev->input = cn_rx_skb;
+                .groups = CN_NETLINK_USERS + 0xf,
+                .input  = dev->input,
+        };
        dev->nls = netlink_kernel_create(&init_net, NETLINK_CONNECTOR,
-                                         CN_NETLINK_USERS + 0xf,
+                                         THIS_MODULE, &cfg);
-                                         dev->input, NULL, THIS_MODULE);
        if (!dev->nls)
                return -EIO;
diff --git a/drivers/cpufreq/cpufreq.c b/drivers/cpufreq/cpufreq.c
index 7f2f149ae40f..fb8a5279c5d8 100644
--- a/drivers/cpufreq/cpufreq.c
+++ b/drivers/cpufreq/cpufreq.c
@@ -138,7 +138,7 @@ void disable_cpufreq(void)
 static LIST_HEAD(cpufreq_governor_list);
 static DEFINE_MUTEX(cpufreq_governor_mutex);
-struct cpufreq_policy *cpufreq_cpu_get(unsigned int cpu)
+static struct cpufreq_policy *__cpufreq_cpu_get(unsigned int cpu, bool sysfs)
 {
        struct cpufreq_policy *data;
        unsigned long flags;
@@ -162,7 +162,7 @@ struct cpufreq_policy *cpufreq_cpu_get(unsigned int cpu)
        if (!data)
                goto err_out_put_module;
-        if (!kobject_get(&data->kobj))
+        if (!sysfs && !kobject_get(&data->kobj))
                goto err_out_put_module;
        spin_unlock_irqrestore(&cpufreq_driver_lock, flags);
@@ -175,16 +175,35 @@ err_out_unlock:
 err_out:
        return NULL;
 }
+struct cpufreq_policy *cpufreq_cpu_get(unsigned int cpu)
+{
+        return __cpufreq_cpu_get(cpu, false);
+}
 EXPORT_SYMBOL_GPL(cpufreq_cpu_get);
+static struct cpufreq_policy *cpufreq_cpu_get_sysfs(unsigned int cpu)
+{
+        return __cpufreq_cpu_get(cpu, true);
+}
-void cpufreq_cpu_put(struct cpufreq_policy *data)
+static void __cpufreq_cpu_put(struct cpufreq_policy *data, bool sysfs)
 {
-        kobject_put(&data->kobj);
+        if (!sysfs)
+                kobject_put(&data->kobj);
        module_put(cpufreq_driver->owner);
 }
+void cpufreq_cpu_put(struct cpufreq_policy *data)
+{
+        __cpufreq_cpu_put(data, false);
+}
 EXPORT_SYMBOL_GPL(cpufreq_cpu_put);
+static void cpufreq_cpu_put_sysfs(struct cpufreq_policy *data)
+{
+        __cpufreq_cpu_put(data, true);
+}
 /*********************************************************************
 *            EXTERNALLY AFFECTING FREQUENCY CHANGES                 *
@@ -617,7 +636,7 @@ static ssize_t show(struct kobject *kobj, struct attribute *attr, char *buf)
        struct cpufreq_policy *policy = to_policy(kobj);
        struct freq_attr *fattr = to_attr(attr);
        ssize_t ret = -EINVAL;
-        policy = cpufreq_cpu_get(policy->cpu);
+        policy = cpufreq_cpu_get_sysfs(policy->cpu);
        if (!policy)
                goto no_policy;
@@ -631,7 +650,7 @@ static ssize_t show(struct kobject *kobj, struct attribute *attr, char *buf)
        unlock_policy_rwsem_read(policy->cpu);
 fail:
-        cpufreq_cpu_put(policy);
+        cpufreq_cpu_put_sysfs(policy);
 no_policy:
        return ret;
 }
@@ -642,7 +661,7 @@ static ssize_t store(struct kobject *kobj, struct attribute *attr,
        struct cpufreq_policy *policy = to_policy(kobj);
        struct freq_attr *fattr = to_attr(attr);
        ssize_t ret = -EINVAL;
-        policy = cpufreq_cpu_get(policy->cpu);
+        policy = cpufreq_cpu_get_sysfs(policy->cpu);
        if (!policy)
                goto no_policy;
@@ -656,7 +675,7 @@ static ssize_t store(struct kobject *kobj, struct attribute *attr,
        unlock_policy_rwsem_write(policy->cpu);
 fail:
-        cpufreq_cpu_put(policy);
+        cpufreq_cpu_put_sysfs(policy);
 no_policy:
        return ret;
 }
diff --git a/drivers/cpufreq/exynos-cpufreq.c b/drivers/cpufreq/exynos-cpufreq.c
index b243a7ee01f6..af2d81e10f71 100644
--- a/drivers/cpufreq/exynos-cpufreq.c
+++ b/drivers/cpufreq/exynos-cpufreq.c
@@ -62,8 +62,18 @@ static int exynos_target(struct cpufreq_policy *policy,
                goto out;
        }
-        if (cpufreq_frequency_table_target(policy, freq_table,
+        /*
-                                           freqs.old, relation, &old_index)) {
+         * The policy max have been changed so that we cannot get proper
+         * old_index with cpufreq_frequency_table_target(). Thus, ignore
+         * policy and get the index from the raw freqeuncy table.
+         */
+        for (old_index = 0;
+                freq_table[old_index].frequency != CPUFREQ_TABLE_END;
+                old_index++)
+                if (freq_table[old_index].frequency == freqs.old)
+                        break;
+        if (freq_table[old_index].frequency == CPUFREQ_TABLE_END) {
                ret = -EINVAL;
                goto out;
        }
diff --git a/drivers/cpufreq/exynos5250-cpufreq.c b/drivers/cpufreq/exynos5250-cpufreq.c
index a88331644ebf..e64c253cb169 100644
--- a/drivers/cpufreq/exynos5250-cpufreq.c
+++ b/drivers/cpufreq/exynos5250-cpufreq.c
@@ -65,20 +65,20 @@ static unsigned int clkdiv_cpu0_5250[CPUFREQ_LEVEL_END][8] = {
         * Clock divider value for following
         * { ARM, CPUD, ACP, PERIPH, ATB, PCLK_DBG, APLL, ARM2 }
         */
-        { 0, 3, 7, 7, 6, 1, 3, 0 },     /* 1700 MHz - N/A */
+        { 0, 3, 7, 7, 7, 3, 5, 0 },     /* 1700 MHz */
-        { 0, 3, 7, 7, 6, 1, 3, 0 },     /* 1600 MHz - N/A */
+        { 0, 3, 7, 7, 7, 1, 4, 0 },     /* 1600 MHz */
-        { 0, 3, 7, 7, 5, 1, 3, 0 },     /* 1500 MHz - N/A */
+        { 0, 2, 7, 7, 7, 1, 4, 0 },     /* 1500 MHz */
-        { 0, 3, 7, 7, 6, 1, 3, 0 },     /* 1400 MHz */
+        { 0, 2, 7, 7, 6, 1, 4, 0 },     /* 1400 MHz */
-        { 0, 3, 7, 7, 6, 1, 3, 0 },     /* 1300 MHz */
+        { 0, 2, 7, 7, 6, 1, 3, 0 },     /* 1300 MHz */
-        { 0, 3, 7, 7, 5, 1, 3, 0 },     /* 1200 MHz */
+        { 0, 2, 7, 7, 5, 1, 3, 0 },     /* 1200 MHz */
-        { 0, 2, 7, 7, 5, 1, 2, 0 },     /* 1100 MHz */
+        { 0, 3, 7, 7, 5, 1, 3, 0 },     /* 1100 MHz */
-        { 0, 2, 7, 7, 4, 1, 2, 0 },     /* 1000 MHz */
+        { 0, 1, 7, 7, 4, 1, 2, 0 },     /* 1000 MHz */
-        { 0, 2, 7, 7, 4, 1, 2, 0 },     /* 900 MHz */
+        { 0, 1, 7, 7, 4, 1, 2, 0 },     /* 900 MHz */
-        { 0, 2, 7, 7, 3, 1, 1, 0 },     /* 800 MHz */
+        { 0, 1, 7, 7, 4, 1, 2, 0 },     /* 800 MHz */
        { 0, 1, 7, 7, 3, 1, 1, 0 },     /* 700 MHz */
-        { 0, 1, 7, 7, 2, 1, 1, 0 },     /* 600 MHz */
+        { 0, 1, 7, 7, 3, 1, 1, 0 },     /* 600 MHz */
        { 0, 1, 7, 7, 2, 1, 1, 0 },     /* 500 MHz */
-        { 0, 1, 7, 7, 1, 1, 1, 0 },     /* 400 MHz */
+        { 0, 1, 7, 7, 2, 1, 1, 0 },     /* 400 MHz */
        { 0, 1, 7, 7, 1, 1, 1, 0 },     /* 300 MHz */
        { 0, 1, 7, 7, 1, 1, 1, 0 },     /* 200 MHz */
 };
@@ -87,9 +87,9 @@ static unsigned int clkdiv_cpu1_5250[CPUFREQ_LEVEL_END][2] = {
        /* Clock divider value for following
         * { COPY, HPM }
         */
-        { 0, 2 },       /* 1700 MHz - N/A */
+        { 0, 2 },       /* 1700 MHz */
-        { 0, 2 },       /* 1600 MHz - N/A */
+        { 0, 2 },       /* 1600 MHz */
-        { 0, 2 },       /* 1500 MHz - N/A */
+        { 0, 2 },       /* 1500 MHz */
        { 0, 2 },       /* 1400 MHz */
        { 0, 2 },       /* 1300 MHz */
        { 0, 2 },       /* 1200 MHz */
@@ -106,10 +106,10 @@ static unsigned int clkdiv_cpu1_5250[CPUFREQ_LEVEL_END][2] = {
 };
 static unsigned int exynos5_apll_pms_table[CPUFREQ_LEVEL_END] = {
-        (0),                            /* 1700 MHz - N/A */
+        ((425 << 16) | (6 << 8) | 0),   /* 1700 MHz */
-        (0),                            /* 1600 MHz - N/A */
+        ((200 << 16) | (3 << 8) | 0),   /* 1600 MHz */
-        (0),                            /* 1500 MHz - N/A */
+        ((250 << 16) | (4 << 8) | 0),   /* 1500 MHz */
-        (0),                            /* 1400 MHz */
+        ((175 << 16) | (3 << 8) | 0),   /* 1400 MHz */
        ((325 << 16) | (6 << 8) | 0),   /* 1300 MHz */
        ((200 << 16) | (4 << 8) | 0),   /* 1200 MHz */
        ((275 << 16) | (6 << 8) | 0),   /* 1100 MHz */
@@ -126,9 +126,10 @@ static unsigned int exynos5_apll_pms_table[CPUFREQ_LEVEL_END] = {
 /* ASV group voltage table */
 static const unsigned int asv_voltage_5250[CPUFREQ_LEVEL_END] = {
-        0, 0, 0, 0, 0, 0, 0,    /* 1700 MHz ~ 1100 MHz Not supported */
+        1300000, 1250000, 1225000, 1200000, 1150000,
-        1175000, 1125000, 1075000, 1050000, 1000000,
+        1125000, 1100000, 1075000, 1050000, 1025000,
-        950000, 925000, 925000, 900000
+        1012500, 1000000,  975000,  950000,  937500,
+        925000
 };
 static void set_clkdiv(unsigned int div_index)
@@ -248,15 +249,7 @@ static void __init set_volt_table(void)
 {
        unsigned int i;
-        exynos5250_freq_table[L0].frequency = CPUFREQ_ENTRY_INVALID;
+        max_support_idx = L0;
-        exynos5250_freq_table[L1].frequency = CPUFREQ_ENTRY_INVALID;
-        exynos5250_freq_table[L2].frequency = CPUFREQ_ENTRY_INVALID;
-        exynos5250_freq_table[L3].frequency = CPUFREQ_ENTRY_INVALID;
-        exynos5250_freq_table[L4].frequency = CPUFREQ_ENTRY_INVALID;
-        exynos5250_freq_table[L5].frequency = CPUFREQ_ENTRY_INVALID;
-        exynos5250_freq_table[L6].frequency = CPUFREQ_ENTRY_INVALID;
-        max_support_idx = L7;
        for (i = 0 ; i < CPUFREQ_LEVEL_END ; i++)
                exynos5250_volt_table[i] = asv_voltage_5250[i];
diff --git a/drivers/cpufreq/omap-cpufreq.c b/drivers/cpufreq/omap-cpufreq.c
index 17fa04d08be9..b47034e650a5 100644
--- a/drivers/cpufreq/omap-cpufreq.c
+++ b/drivers/cpufreq/omap-cpufreq.c
@@ -218,7 +218,7 @@ static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy)
        policy->cur = policy->min = policy->max = omap_getspeed(policy->cpu);
-        if (atomic_inc_return(&freq_table_users) == 1)
+        if (!freq_table)
                result = opp_init_cpufreq_table(mpu_dev, &freq_table);
        if (result) {
@@ -227,6 +227,8 @@ static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy)
                goto fail_ck;
        }
+        atomic_inc_return(&freq_table_users);
        result = cpufreq_frequency_table_cpuinfo(policy, freq_table);
        if (result)
                goto fail_table;
diff --git a/drivers/cpufreq/pcc-cpufreq.c b/drivers/cpufreq/pcc-cpufreq.c
index cdc02ac8f41a..503996a94a6a 100644
--- a/drivers/cpufreq/pcc-cpufreq.c
+++ b/drivers/cpufreq/pcc-cpufreq.c
@@ -454,6 +454,7 @@ static int __init pcc_cpufreq_probe(void)
                                        mem_resource->address_length);
        if (pcch_virt_addr == NULL) {
                pr_debug("probe: could not map shared mem region\n");
+                ret = -ENOMEM;
                goto out_free;
        }
        pcch_hdr = pcch_virt_addr;
diff --git a/drivers/cpufreq/s3c2416-cpufreq.c b/drivers/cpufreq/s3c2416-cpufreq.c
index 50d2f15a3c8a..bcc053bc02c4 100644
--- a/drivers/cpufreq/s3c2416-cpufreq.c
+++ b/drivers/cpufreq/s3c2416-cpufreq.c
@@ -153,7 +153,7 @@ static int s3c2416_cpufreq_enter_dvs(struct s3c2416_data *s3c_freq, int idx)
        if (s3c_freq->vddarm) {
                dvfs = &s3c2416_dvfs_table[idx];
-                pr_debug("cpufreq: setting regultor to %d-%d\n",
+                pr_debug("cpufreq: setting regulator to %d-%d\n",
                         dvfs->vddarm_min, dvfs->vddarm_max);
                ret = regulator_set_voltage(s3c_freq->vddarm,
                                            dvfs->vddarm_min,
@@ -186,7 +186,7 @@ static int s3c2416_cpufreq_leave_dvs(struct s3c2416_data *s3c_freq, int idx)
        if (s3c_freq->vddarm) {
                dvfs = &s3c2416_dvfs_table[idx];
-                pr_debug("cpufreq: setting regultor to %d-%d\n",
+                pr_debug("cpufreq: setting regulator to %d-%d\n",
                         dvfs->vddarm_min, dvfs->vddarm_max);
                ret = regulator_set_voltage(s3c_freq->vddarm,
                                            dvfs->vddarm_min,
diff --git a/drivers/cpufreq/speedstep-ich.c b/drivers/cpufreq/speedstep-ich.c
index 7432b3a72cd4..e29b59aa68a8 100644
--- a/drivers/cpufreq/speedstep-ich.c
+++ b/drivers/cpufreq/speedstep-ich.c
@@ -203,7 +203,7 @@ static unsigned int speedstep_detect_chipset(void)
        if (speedstep_chipset_dev) {
                /* speedstep.c causes lockups on Dell Inspirons 8000 and
                 * 8100 which use a pretty old revision of the 82815
-                 * host brige. Abort on these systems.
+                 * host bridge. Abort on these systems.
                 */
                static struct pci_dev *hostbridge;
diff --git a/drivers/cpuidle/Kconfig b/drivers/cpuidle/Kconfig
index 78a666d1e5f5..a76b689e553b 100644
--- a/drivers/cpuidle/Kconfig
+++ b/drivers/cpuidle/Kconfig
@@ -18,3 +18,6 @@ config CPU_IDLE_GOV_MENU
        bool
        depends on CPU_IDLE && NO_HZ
        default y
+config ARCH_NEEDS_CPU_IDLE_COUPLED
+        def_bool n
diff --git a/drivers/cpuidle/Makefile b/drivers/cpuidle/Makefile
index 5634f88379df..38c8f69f30cf 100644
--- a/drivers/cpuidle/Makefile
+++ b/drivers/cpuidle/Makefile
@@ -3,3 +3,4 @@
 #
 obj-y += cpuidle.o driver.o governor.o sysfs.o governors/
+obj-$(CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED) += coupled.o
diff --git a/drivers/cpuidle/coupled.c b/drivers/cpuidle/coupled.c
new file mode 100644
index 000000000000..3265844839bf
--- /dev/null
+++ b/drivers/cpuidle/coupled.c
@@ -0,0 +1,727 @@
+/*
+ * coupled.c - helper functions to enter the same idle state on multiple cpus
+ *
+ * Copyright (c) 2011 Google, Inc.
+ *
+ * Author: Colin Cross <ccross@android.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ */
+#include <linux/kernel.h>
+#include <linux/cpu.h>
+#include <linux/cpuidle.h>
+#include <linux/mutex.h>
+#include <linux/sched.h>
+#include <linux/slab.h>
+#include <linux/spinlock.h>
+#include "cpuidle.h"
+/**
+ * DOC: Coupled cpuidle states
+ *
+ * On some ARM SMP SoCs (OMAP4460, Tegra 2, and probably more), the
+ * cpus cannot be independently powered down, either due to
+ * sequencing restrictions (on Tegra 2, cpu 0 must be the last to
+ * power down), or due to HW bugs (on OMAP4460, a cpu powering up
+ * will corrupt the gic state unless the other cpu runs a work
+ * around).  Each cpu has a power state that it can enter without
+ * coordinating with the other cpu (usually Wait For Interrupt, or
+ * WFI), and one or more "coupled" power states that affect blocks
+ * shared between the cpus (L2 cache, interrupt controller, and
+ * sometimes the whole SoC).  Entering a coupled power state must
+ * be tightly controlled on both cpus.
+ *
+ * This file implements a solution, where each cpu will wait in the
+ * WFI state until all cpus are ready to enter a coupled state, at
+ * which point the coupled state function will be called on all
+ * cpus at approximately the same time.
+ *
+ * Once all cpus are ready to enter idle, they are woken by an smp
+ * cross call.  At this point, there is a chance that one of the
+ * cpus will find work to do, and choose not to enter idle.  A
+ * final pass is needed to guarantee that all cpus will call the
+ * power state enter function at the same time.  During this pass,
+ * each cpu will increment the ready counter, and continue once the
+ * ready counter matches the number of online coupled cpus.  If any
+ * cpu exits idle, the other cpus will decrement their counter and
+ * retry.
+ *
+ * requested_state stores the deepest coupled idle state each cpu
+ * is ready for.  It is assumed that the states are indexed from
+ * shallowest (highest power, lowest exit latency) to deepest
+ * (lowest power, highest exit latency).  The requested_state
+ * variable is not locked.  It is only written from the cpu that
+ * it stores (or by the on/offlining cpu if that cpu is offline),
+ * and only read after all the cpus are ready for the coupled idle
+ * state are are no longer updating it.
+ *
+ * Three atomic counters are used.  alive_count tracks the number
+ * of cpus in the coupled set that are currently or soon will be
+ * online.  waiting_count tracks the number of cpus that are in
+ * the waiting loop, in the ready loop, or in the coupled idle state.
+ * ready_count tracks the number of cpus that are in the ready loop
+ * or in the coupled idle state.
+ *
+ * To use coupled cpuidle states, a cpuidle driver must:
+ *
+ *    Set struct cpuidle_device.coupled_cpus to the mask of all
+ *    coupled cpus, usually the same as cpu_possible_mask if all cpus
+ *    are part of the same cluster.  The coupled_cpus mask must be
+ *    set in the struct cpuidle_device for each cpu.
+ *
+ *    Set struct cpuidle_device.safe_state to a state that is not a
+ *    coupled state.  This is usually WFI.
+ *
+ *    Set CPUIDLE_FLAG_COUPLED in struct cpuidle_state.flags for each
+ *    state that affects multiple cpus.
+ *
+ *    Provide a struct cpuidle_state.enter function for each state
+ *    that affects multiple cpus.  This function is guaranteed to be
+ *    called on all cpus at approximately the same time.  The driver
+ *    should ensure that the cpus all abort together if any cpu tries
+ *    to abort once the function is called.  The function should return
+ *    with interrupts still disabled.
+ */
+/**
+ * struct cpuidle_coupled - data for set of cpus that share a coupled idle state
+ * @coupled_cpus: mask of cpus that are part of the coupled set
+ * @requested_state: array of requested states for cpus in the coupled set
+ * @ready_waiting_counts: combined count of cpus  in ready or waiting loops
+ * @online_count: count of cpus that are online
+ * @refcnt: reference count of cpuidle devices that are using this struct
+ * @prevent: flag to prevent coupled idle while a cpu is hotplugging
+ */
+struct cpuidle_coupled {
+        cpumask_t coupled_cpus;
+        int requested_state[NR_CPUS];
+        atomic_t ready_waiting_counts;
+        int online_count;
+        int refcnt;
+        int prevent;
+};
+#define WAITING_BITS 16
+#define MAX_WAITING_CPUS (1 << WAITING_BITS)
+#define WAITING_MASK (MAX_WAITING_CPUS - 1)
+#define READY_MASK (~WAITING_MASK)
+#define CPUIDLE_COUPLED_NOT_IDLE        (-1)
+static DEFINE_MUTEX(cpuidle_coupled_lock);
+static DEFINE_PER_CPU(struct call_single_data, cpuidle_coupled_poke_cb);
+/*
+ * The cpuidle_coupled_poked_mask mask is used to avoid calling
+ * __smp_call_function_single with the per cpu call_single_data struct already
+ * in use.  This prevents a deadlock where two cpus are waiting for each others
+ * call_single_data struct to be available
+ */
+static cpumask_t cpuidle_coupled_poked_mask;
+/**
+ * cpuidle_coupled_parallel_barrier - synchronize all online coupled cpus
+ * @dev: cpuidle_device of the calling cpu
+ * @a:   atomic variable to hold the barrier
+ *
+ * No caller to this function will return from this function until all online
+ * cpus in the same coupled group have called this function.  Once any caller
+ * has returned from this function, the barrier is immediately available for
+ * reuse.
+ *
+ * The atomic variable a must be initialized to 0 before any cpu calls
+ * this function, will be reset to 0 before any cpu returns from this function.
+ *
+ * Must only be called from within a coupled idle state handler
+ * (state.enter when state.flags has CPUIDLE_FLAG_COUPLED set).
+ *
+ * Provides full smp barrier semantics before and after calling.
+ */
+void cpuidle_coupled_parallel_barrier(struct cpuidle_device *dev, atomic_t *a)
+{
+        int n = dev->coupled->online_count;
+        smp_mb__before_atomic_inc();
+        atomic_inc(a);
+        while (atomic_read(a) < n)
+                cpu_relax();
+        if (atomic_inc_return(a) == n * 2) {
+                atomic_set(a, 0);
+                return;
+        }
+        while (atomic_read(a) > n)
+                cpu_relax();
+}
+/**
+ * cpuidle_state_is_coupled - check if a state is part of a coupled set
+ * @dev: struct cpuidle_device for the current cpu
+ * @drv: struct cpuidle_driver for the platform
+ * @state: index of the target state in drv->states
+ *
+ * Returns true if the target state is coupled with cpus besides this one
+ */
+bool cpuidle_state_is_coupled(struct cpuidle_device *dev,
+        struct cpuidle_driver *drv, int state)
+{
+        return drv->states[state].flags & CPUIDLE_FLAG_COUPLED;
+}
+/**
+ * cpuidle_coupled_set_ready - mark a cpu as ready
+ * @coupled: the struct coupled that contains the current cpu
+ */
+static inline void cpuidle_coupled_set_ready(struct cpuidle_coupled *coupled)
+{
+        atomic_add(MAX_WAITING_CPUS, &coupled->ready_waiting_counts);
+}
+/**
+ * cpuidle_coupled_set_not_ready - mark a cpu as not ready
+ * @coupled: the struct coupled that contains the current cpu
+ *
+ * Decrements the ready counter, unless the ready (and thus the waiting) counter
+ * is equal to the number of online cpus.  Prevents a race where one cpu
+ * decrements the waiting counter and then re-increments it just before another
+ * cpu has decremented its ready counter, leading to the ready counter going
+ * down from the number of online cpus without going through the coupled idle
+ * state.
+ *
+ * Returns 0 if the counter was decremented successfully, -EINVAL if the ready
+ * counter was equal to the number of online cpus.
+ */
+static
+inline int cpuidle_coupled_set_not_ready(struct cpuidle_coupled *coupled)
+{
+        int all;
+        int ret;
+        all = coupled->online_count || (coupled->online_count << WAITING_BITS);
+        ret = atomic_add_unless(&coupled->ready_waiting_counts,
+                -MAX_WAITING_CPUS, all);
+        return ret ? 0 : -EINVAL;
+}
+/**
+ * cpuidle_coupled_no_cpus_ready - check if no cpus in a coupled set are ready
+ * @coupled: the struct coupled that contains the current cpu
+ *
+ * Returns true if all of the cpus in a coupled set are out of the ready loop.
+ */
+static inline int cpuidle_coupled_no_cpus_ready(struct cpuidle_coupled *coupled)
+{
+        int r = atomic_read(&coupled->ready_waiting_counts) >> WAITING_BITS;
+        return r == 0;
+}
+/**
+ * cpuidle_coupled_cpus_ready - check if all cpus in a coupled set are ready
+ * @coupled: the struct coupled that contains the current cpu
+ *
+ * Returns true if all cpus coupled to this target state are in the ready loop
+ */
+static inline bool cpuidle_coupled_cpus_ready(struct cpuidle_coupled *coupled)
+{
+        int r = atomic_read(&coupled->ready_waiting_counts) >> WAITING_BITS;
+        return r == coupled->online_count;
+}
+/**
+ * cpuidle_coupled_cpus_waiting - check if all cpus in a coupled set are waiting
+ * @coupled: the struct coupled that contains the current cpu
+ *
+ * Returns true if all cpus coupled to this target state are in the wait loop
+ */
+static inline bool cpuidle_coupled_cpus_waiting(struct cpuidle_coupled *coupled)
+{
+        int w = atomic_read(&coupled->ready_waiting_counts) & WAITING_MASK;
+        return w == coupled->online_count;
+}
+/**
+ * cpuidle_coupled_no_cpus_waiting - check if no cpus in coupled set are waiting
+ * @coupled: the struct coupled that contains the current cpu
+ *
+ * Returns true if all of the cpus in a coupled set are out of the waiting loop.
+ */
+static inline int cpuidle_coupled_no_cpus_waiting(struct cpuidle_coupled *coupled)
+{
+        int w = atomic_read(&coupled->ready_waiting_counts) & WAITING_MASK;
+        return w == 0;
+}
+/**
+ * cpuidle_coupled_get_state - determine the deepest idle state
+ * @dev: struct cpuidle_device for this cpu
+ * @coupled: the struct coupled that contains the current cpu
+ *
+ * Returns the deepest idle state that all coupled cpus can enter
+ */
+static inline int cpuidle_coupled_get_state(struct cpuidle_device *dev,
+                struct cpuidle_coupled *coupled)
+{
+        int i;
+        int state = INT_MAX;
+        /*
+         * Read barrier ensures that read of requested_state is ordered after
+         * reads of ready_count.  Matches the write barriers
+         * cpuidle_set_state_waiting.
+         */
+        smp_rmb();
+        for_each_cpu_mask(i, coupled->coupled_cpus)
+                if (cpu_online(i) && coupled->requested_state[i] < state)
+                        state = coupled->requested_state[i];
+        return state;
+}
+static void cpuidle_coupled_poked(void *info)
+{
+        int cpu = (unsigned long)info;
+        cpumask_clear_cpu(cpu, &cpuidle_coupled_poked_mask);
+}
+/**
+ * cpuidle_coupled_poke - wake up a cpu that may be waiting
+ * @cpu: target cpu
+ *
+ * Ensures that the target cpu exits it's waiting idle state (if it is in it)
+ * and will see updates to waiting_count before it re-enters it's waiting idle
+ * state.
+ *
+ * If cpuidle_coupled_poked_mask is already set for the target cpu, that cpu
+ * either has or will soon have a pending IPI that will wake it out of idle,
+ * or it is currently processing the IPI and is not in idle.
+ */
+static void cpuidle_coupled_poke(int cpu)
+{
+        struct call_single_data *csd = &per_cpu(cpuidle_coupled_poke_cb, cpu);
+        if (!cpumask_test_and_set_cpu(cpu, &cpuidle_coupled_poked_mask))
+                __smp_call_function_single(cpu, csd, 0);
+}
+/**
+ * cpuidle_coupled_poke_others - wake up all other cpus that may be waiting
+ * @dev: struct cpuidle_device for this cpu
+ * @coupled: the struct coupled that contains the current cpu
+ *
+ * Calls cpuidle_coupled_poke on all other online cpus.
+ */
+static void cpuidle_coupled_poke_others(int this_cpu,
+                struct cpuidle_coupled *coupled)
+{
+        int cpu;
+        for_each_cpu_mask(cpu, coupled->coupled_cpus)
+                if (cpu != this_cpu && cpu_online(cpu))
+                        cpuidle_coupled_poke(cpu);
+}
+/**
+ * cpuidle_coupled_set_waiting - mark this cpu as in the wait loop
+ * @dev: struct cpuidle_device for this cpu
+ * @coupled: the struct coupled that contains the current cpu
+ * @next_state: the index in drv->states of the requested state for this cpu
+ *
+ * Updates the requested idle state for the specified cpuidle device,
+ * poking all coupled cpus out of idle if necessary to let them see the new
+ * state.
+ */
+static void cpuidle_coupled_set_waiting(int cpu,
+                struct cpuidle_coupled *coupled, int next_state)
+{
+        int w;
+        coupled->requested_state[cpu] = next_state;
+        /*
+         * If this is the last cpu to enter the waiting state, poke
+         * all the other cpus out of their waiting state so they can
+         * enter a deeper state.  This can race with one of the cpus
+         * exiting the waiting state due to an interrupt and
+         * decrementing waiting_count, see comment below.
+         *
+         * The atomic_inc_return provides a write barrier to order the write
+         * to requested_state with the later write that increments ready_count.
+         */
+        w = atomic_inc_return(&coupled->ready_waiting_counts) & WAITING_MASK;
+        if (w == coupled->online_count)
+                cpuidle_coupled_poke_others(cpu, coupled);
+}
+/**
+ * cpuidle_coupled_set_not_waiting - mark this cpu as leaving the wait loop
+ * @dev: struct cpuidle_device for this cpu
+ * @coupled: the struct coupled that contains the current cpu
+ *
+ * Removes the requested idle state for the specified cpuidle device.
+ */
+static void cpuidle_coupled_set_not_waiting(int cpu,
+                struct cpuidle_coupled *coupled)
+{
+        /*
+         * Decrementing waiting count can race with incrementing it in
+         * cpuidle_coupled_set_waiting, but that's OK.  Worst case, some
+         * cpus will increment ready_count and then spin until they
+         * notice that this cpu has cleared it's requested_state.
+         */
+        atomic_dec(&coupled->ready_waiting_counts);
+        coupled->requested_state[cpu] = CPUIDLE_COUPLED_NOT_IDLE;
+}
+/**
+ * cpuidle_coupled_set_done - mark this cpu as leaving the ready loop
+ * @cpu: the current cpu
+ * @coupled: the struct coupled that contains the current cpu
+ *
+ * Marks this cpu as no longer in the ready and waiting loops.  Decrements
+ * the waiting count first to prevent another cpu looping back in and seeing
+ * this cpu as waiting just before it exits idle.
+ */
+static void cpuidle_coupled_set_done(int cpu, struct cpuidle_coupled *coupled)
+{
+        cpuidle_coupled_set_not_waiting(cpu, coupled);
+        atomic_sub(MAX_WAITING_CPUS, &coupled->ready_waiting_counts);
+}
+/**
+ * cpuidle_coupled_clear_pokes - spin until the poke interrupt is processed
+ * @cpu - this cpu
+ *
+ * Turns on interrupts and spins until any outstanding poke interrupts have
+ * been processed and the poke bit has been cleared.
+ *
+ * Other interrupts may also be processed while interrupts are enabled, so
+ * need_resched() must be tested after turning interrupts off again to make sure
+ * the interrupt didn't schedule work that should take the cpu out of idle.
+ *
+ * Returns 0 if need_resched was false, -EINTR if need_resched was true.
+ */
+static int cpuidle_coupled_clear_pokes(int cpu)
+{
+        local_irq_enable();
+        while (cpumask_test_cpu(cpu, &cpuidle_coupled_poked_mask))
+                cpu_relax();
+        local_irq_disable();
+        return need_resched() ? -EINTR : 0;
+}
+/**
+ * cpuidle_enter_state_coupled - attempt to enter a state with coupled cpus
+ * @dev: struct cpuidle_device for the current cpu
+ * @drv: struct cpuidle_driver for the platform
+ * @next_state: index of the requested state in drv->states
+ *
+ * Coordinate with coupled cpus to enter the target state.  This is a two
+ * stage process.  In the first stage, the cpus are operating independently,
+ * and may call into cpuidle_enter_state_coupled at completely different times.
+ * To save as much power as possible, the first cpus to call this function will
+ * go to an intermediate state (the cpuidle_device's safe state), and wait for
+ * all the other cpus to call this function.  Once all coupled cpus are idle,
+ * the second stage will start.  Each coupled cpu will spin until all cpus have
+ * guaranteed that they will call the target_state.
+ *
+ * This function must be called with interrupts disabled.  It may enable
+ * interrupts while preparing for idle, and it will always return with
+ * interrupts enabled.
+ */
+int cpuidle_enter_state_coupled(struct cpuidle_device *dev,
+                struct cpuidle_driver *drv, int next_state)
+{
+        int entered_state = -1;
+        struct cpuidle_coupled *coupled = dev->coupled;
+        if (!coupled)
+                return -EINVAL;
+        while (coupled->prevent) {
+                if (cpuidle_coupled_clear_pokes(dev->cpu)) {
+                        local_irq_enable();
+                        return entered_state;
+                }
+                entered_state = cpuidle_enter_state(dev, drv,
+                        dev->safe_state_index);
+        }
+        /* Read barrier ensures online_count is read after prevent is cleared */
+        smp_rmb();
+        cpuidle_coupled_set_waiting(dev->cpu, coupled, next_state);
+retry:
+        /*
+         * Wait for all coupled cpus to be idle, using the deepest state
+         * allowed for a single cpu.
+         */
+        while (!cpuidle_coupled_cpus_waiting(coupled)) {
+                if (cpuidle_coupled_clear_pokes(dev->cpu)) {
+                        cpuidle_coupled_set_not_waiting(dev->cpu, coupled);
+                        goto out;
+                }
+                if (coupled->prevent) {
+                        cpuidle_coupled_set_not_waiting(dev->cpu, coupled);
+                        goto out;
+                }
+                entered_state = cpuidle_enter_state(dev, drv,
+                        dev->safe_state_index);
+        }
+        if (cpuidle_coupled_clear_pokes(dev->cpu)) {
+                cpuidle_coupled_set_not_waiting(dev->cpu, coupled);
+                goto out;
+        }
+        /*
+         * All coupled cpus are probably idle.  There is a small chance that
+         * one of the other cpus just became active.  Increment the ready count,
+         * and spin until all coupled cpus have incremented the counter. Once a
+         * cpu has incremented the ready counter, it cannot abort idle and must
+         * spin until either all cpus have incremented the ready counter, or
+         * another cpu leaves idle and decrements the waiting counter.
+         */
+        cpuidle_coupled_set_ready(coupled);
+        while (!cpuidle_coupled_cpus_ready(coupled)) {
+                /* Check if any other cpus bailed out of idle. */
+                if (!cpuidle_coupled_cpus_waiting(coupled))
+                        if (!cpuidle_coupled_set_not_ready(coupled))
+                                goto retry;
+                cpu_relax();
+        }
+        /* all cpus have acked the coupled state */
+        next_state = cpuidle_coupled_get_state(dev, coupled);
+        entered_state = cpuidle_enter_state(dev, drv, next_state);
+        cpuidle_coupled_set_done(dev->cpu, coupled);
+out:
+        /*
+         * Normal cpuidle states are expected to return with irqs enabled.
+         * That leads to an inefficiency where a cpu receiving an interrupt
+         * that brings it out of idle will process that interrupt before
+         * exiting the idle enter function and decrementing ready_count.  All
+         * other cpus will need to spin waiting for the cpu that is processing
+         * the interrupt.  If the driver returns with interrupts disabled,
+         * all other cpus will loop back into the safe idle state instead of
+         * spinning, saving power.
+         *
+         * Calling local_irq_enable here allows coupled states to return with
+         * interrupts disabled, but won't cause problems for drivers that
+         * exit with interrupts enabled.
+         */
+        local_irq_enable();
+        /*
+         * Wait until all coupled cpus have exited idle.  There is no risk that
+         * a cpu exits and re-enters the ready state because this cpu has
+         * already decremented its waiting_count.
+         */
+        while (!cpuidle_coupled_no_cpus_ready(coupled))
+                cpu_relax();
+        return entered_state;
+}
+static void cpuidle_coupled_update_online_cpus(struct cpuidle_coupled *coupled)
+{
+        cpumask_t cpus;
+        cpumask_and(&cpus, cpu_online_mask, &coupled->coupled_cpus);
+        coupled->online_count = cpumask_weight(&cpus);
+}
+/**
+ * cpuidle_coupled_register_device - register a coupled cpuidle device
+ * @dev: struct cpuidle_device for the current cpu
+ *
+ * Called from cpuidle_register_device to handle coupled idle init.  Finds the
+ * cpuidle_coupled struct for this set of coupled cpus, or creates one if none
+ * exists yet.
+ */
+int cpuidle_coupled_register_device(struct cpuidle_device *dev)
+{
+        int cpu;
+        struct cpuidle_device *other_dev;
+        struct call_single_data *csd;
+        struct cpuidle_coupled *coupled;
+        if (cpumask_empty(&dev->coupled_cpus))
+                return 0;
+        for_each_cpu_mask(cpu, dev->coupled_cpus) {
+                other_dev = per_cpu(cpuidle_devices, cpu);
+                if (other_dev && other_dev->coupled) {
+                        coupled = other_dev->coupled;
+                        goto have_coupled;
+                }
+        }
+        /* No existing coupled info found, create a new one */
+        coupled = kzalloc(sizeof(struct cpuidle_coupled), GFP_KERNEL);
+        if (!coupled)
+                return -ENOMEM;
+        coupled->coupled_cpus = dev->coupled_cpus;
+have_coupled:
+        dev->coupled = coupled;
+        if (WARN_ON(!cpumask_equal(&dev->coupled_cpus, &coupled->coupled_cpus)))
+                coupled->prevent++;
+        cpuidle_coupled_update_online_cpus(coupled);
+        coupled->refcnt++;
+        csd = &per_cpu(cpuidle_coupled_poke_cb, dev->cpu);
+        csd->func = cpuidle_coupled_poked;
+        csd->info = (void *)(unsigned long)dev->cpu;
+        return 0;
+}
+/**
+ * cpuidle_coupled_unregister_device - unregister a coupled cpuidle device
+ * @dev: struct cpuidle_device for the current cpu
+ *
+ * Called from cpuidle_unregister_device to tear down coupled idle.  Removes the
+ * cpu from the coupled idle set, and frees the cpuidle_coupled_info struct if
+ * this was the last cpu in the set.
+ */
+void cpuidle_coupled_unregister_device(struct cpuidle_device *dev)
+{
+        struct cpuidle_coupled *coupled = dev->coupled;
+        if (cpumask_empty(&dev->coupled_cpus))
+                return;
+        if (--coupled->refcnt)
+                kfree(coupled);
+        dev->coupled = NULL;
+}
+/**
+ * cpuidle_coupled_prevent_idle - prevent cpus from entering a coupled state
+ * @coupled: the struct coupled that contains the cpu that is changing state
+ *
+ * Disables coupled cpuidle on a coupled set of cpus.  Used to ensure that
+ * cpu_online_mask doesn't change while cpus are coordinating coupled idle.
+ */
+static void cpuidle_coupled_prevent_idle(struct cpuidle_coupled *coupled)
+{
+        int cpu = get_cpu();
+        /* Force all cpus out of the waiting loop. */
+        coupled->prevent++;
+        cpuidle_coupled_poke_others(cpu, coupled);
+        put_cpu();
+        while (!cpuidle_coupled_no_cpus_waiting(coupled))
+                cpu_relax();
+}
+/**
+ * cpuidle_coupled_allow_idle - allows cpus to enter a coupled state
+ * @coupled: the struct coupled that contains the cpu that is changing state
+ *
+ * Enables coupled cpuidle on a coupled set of cpus.  Used to ensure that
+ * cpu_online_mask doesn't change while cpus are coordinating coupled idle.
+ */
+static void cpuidle_coupled_allow_idle(struct cpuidle_coupled *coupled)
+{
+        int cpu = get_cpu();
+        /*
+         * Write barrier ensures readers see the new online_count when they
+         * see prevent == 0.
+         */
+        smp_wmb();
+        coupled->prevent--;
+        /* Force cpus out of the prevent loop. */
+        cpuidle_coupled_poke_others(cpu, coupled);
+        put_cpu();
+}
+/**
+ * cpuidle_coupled_cpu_notify - notifier called during hotplug transitions
+ * @nb: notifier block
+ * @action: hotplug transition
+ * @hcpu: target cpu number
+ *
+ * Called when a cpu is brought on or offline using hotplug.  Updates the
+ * coupled cpu set appropriately
+ */
+static int cpuidle_coupled_cpu_notify(struct notifier_block *nb,
+                unsigned long action, void *hcpu)
+{
+        int cpu = (unsigned long)hcpu;
+        struct cpuidle_device *dev;
+        switch (action & ~CPU_TASKS_FROZEN) {
+        case CPU_UP_PREPARE:
+        case CPU_DOWN_PREPARE:
+        case CPU_ONLINE:
+        case CPU_DEAD:
+        case CPU_UP_CANCELED:
+        case CPU_DOWN_FAILED:
+                break;
+        default:
+                return NOTIFY_OK;
+        }
+        mutex_lock(&cpuidle_lock);
+        dev = per_cpu(cpuidle_devices, cpu);
+        if (!dev || !dev->coupled)
+                goto out;
+        switch (action & ~CPU_TASKS_FROZEN) {
+        case CPU_UP_PREPARE:
+        case CPU_DOWN_PREPARE:
+                cpuidle_coupled_prevent_idle(dev->coupled);
+                break;
+        case CPU_ONLINE:
+        case CPU_DEAD:
+                cpuidle_coupled_update_online_cpus(dev->coupled);
+                /* Fall through */
+        case CPU_UP_CANCELED:
+        case CPU_DOWN_FAILED:
+                cpuidle_coupled_allow_idle(dev->coupled);
+                break;
+        }
+out:
+        mutex_unlock(&cpuidle_lock);
+        return NOTIFY_OK;
+}
+static struct notifier_block cpuidle_coupled_cpu_notifier = {
+        .notifier_call = cpuidle_coupled_cpu_notify,
+};
+static int __init cpuidle_coupled_init(void)
+{
+        return register_cpu_notifier(&cpuidle_coupled_cpu_notifier);
+}
+core_initcall(cpuidle_coupled_init);
diff --git a/drivers/cpuidle/cpuidle.c b/drivers/cpuidle/cpuidle.c
index d90519cec880..e28f6ea46f1a 100644
--- a/drivers/cpuidle/cpuidle.c
+++ b/drivers/cpuidle/cpuidle.c
@@ -92,6 +92,34 @@ int cpuidle_play_dead(void)
 }
 /**
+ * cpuidle_enter_state - enter the state and update stats
+ * @dev: cpuidle device for this cpu
+ * @drv: cpuidle driver for this cpu
+ * @next_state: index into drv->states of the state to enter
+ */
+int cpuidle_enter_state(struct cpuidle_device *dev, struct cpuidle_driver *drv,
+                int next_state)
+{
+        int entered_state;
+        entered_state = cpuidle_enter_ops(dev, drv, next_state);
+        if (entered_state >= 0) {
+                /* Update cpuidle counters */
+                /* This can be moved to within driver enter routine
+                 * but that results in multiple copies of same code.
+                 */
+                dev->states_usage[entered_state].time +=
+                                (unsigned long long)dev->last_residency;
+                dev->states_usage[entered_state].usage++;
+        } else {
+                dev->last_residency = 0;
+        }
+        return entered_state;
+}
+/**
 * cpuidle_idle_call - the main idle loop
 *
 * NOTE: no locks or semaphores should be used here
@@ -113,15 +141,6 @@ int cpuidle_idle_call(void)
        if (!dev || !dev->enabled)
                return -EBUSY;
-#if 0
-        /* shows regressions, re-enable for 2.6.29 */
-        /*
-         * run any timers that can be run now, at this point
-         * before calculating the idle duration etc.
-         */
-        hrtimer_peek_ahead_timers();
-#endif
        /* ask the governor for the next state */
        next_state = cpuidle_curr_governor->select(drv, dev);
        if (need_resched()) {
@@ -132,23 +151,15 @@ int cpuidle_idle_call(void)
        trace_power_start_rcuidle(POWER_CSTATE, next_state, dev->cpu);
        trace_cpu_idle_rcuidle(next_state, dev->cpu);
-        entered_state = cpuidle_enter_ops(dev, drv, next_state);
+        if (cpuidle_state_is_coupled(dev, drv, next_state))
+                entered_state = cpuidle_enter_state_coupled(dev, drv,
+                                                            next_state);
+        else
+                entered_state = cpuidle_enter_state(dev, drv, next_state);
        trace_power_end_rcuidle(dev->cpu);
        trace_cpu_idle_rcuidle(PWR_EVENT_EXIT, dev->cpu);
-        if (entered_state >= 0) {
-                /* Update cpuidle counters */
-                /* This can be moved to within driver enter routine
-                 * but that results in multiple copies of same code.
-                 */
-                dev->states_usage[entered_state].time +=
-                                (unsigned long long)dev->last_residency;
-                dev->states_usage[entered_state].usage++;
-        } else {
-                dev->last_residency = 0;
-        }
        /* give the governor an opportunity to reflect on the outcome */
        if (cpuidle_curr_governor->reflect)
                cpuidle_curr_governor->reflect(dev, entered_state);
@@ -201,6 +212,22 @@ void cpuidle_resume_and_unlock(void)
 EXPORT_SYMBOL_GPL(cpuidle_resume_and_unlock);
+/* Currently used in suspend/resume path to suspend cpuidle */
+void cpuidle_pause(void)
+{
+        mutex_lock(&cpuidle_lock);
+        cpuidle_uninstall_idle_handler();
+        mutex_unlock(&cpuidle_lock);
+}
+/* Currently used in suspend/resume path to resume cpuidle */
+void cpuidle_resume(void)
+{
+        mutex_lock(&cpuidle_lock);
+        cpuidle_install_idle_handler();
+        mutex_unlock(&cpuidle_lock);
+}
 /**
 * cpuidle_wrap_enter - performs timekeeping and irqen around enter function
 * @dev: pointer to a valid cpuidle_device object
@@ -265,7 +292,7 @@ static void poll_idle_init(struct cpuidle_driver *drv)
        state->power_usage = -1;
        state->flags = 0;
        state->enter = poll_idle;
-        state->disable = 0;
+        state->disabled = false;
 }
 #else
 static void poll_idle_init(struct cpuidle_driver *drv) {}
@@ -283,6 +310,9 @@ int cpuidle_enable_device(struct cpuidle_device *dev)
        int ret, i;
        struct cpuidle_driver *drv = cpuidle_get_driver();
+        if (!dev)
+                return -EINVAL;
        if (dev->enabled)
                return 0;
        if (!drv || !cpuidle_curr_governor)
@@ -367,8 +397,6 @@ static int __cpuidle_register_device(struct cpuidle_device *dev)
        struct device *cpu_dev = get_cpu_device((unsigned long)dev->cpu);
        struct cpuidle_driver *cpuidle_driver = cpuidle_get_driver();
-        if (!dev)
-                return -EINVAL;
        if (!try_module_get(cpuidle_driver->owner))
                return -EINVAL;
@@ -376,13 +404,25 @@ static int __cpuidle_register_device(struct cpuidle_device *dev)
        per_cpu(cpuidle_devices, dev->cpu) = dev;
        list_add(&dev->device_list, &cpuidle_detected_devices);
-        if ((ret = cpuidle_add_sysfs(cpu_dev))) {
+        ret = cpuidle_add_sysfs(cpu_dev);
-                module_put(cpuidle_driver->owner);
+        if (ret)
-                return ret;
+                goto err_sysfs;
-        }
+        ret = cpuidle_coupled_register_device(dev);
+        if (ret)
+                goto err_coupled;
        dev->registered = 1;
        return 0;
+err_coupled:
+        cpuidle_remove_sysfs(cpu_dev);
+        wait_for_completion(&dev->kobj_unregister);
+err_sysfs:
+        list_del(&dev->device_list);
+        per_cpu(cpuidle_devices, dev->cpu) = NULL;
+        module_put(cpuidle_driver->owner);
+        return ret;
 }
 /**
@@ -393,6 +433,9 @@ int cpuidle_register_device(struct cpuidle_device *dev)
 {
        int ret;
+        if (!dev)
+                return -EINVAL;
        mutex_lock(&cpuidle_lock);
        if ((ret = __cpuidle_register_device(dev))) {
@@ -432,6 +475,8 @@ void cpuidle_unregister_device(struct cpuidle_device *dev)
        wait_for_completion(&dev->kobj_unregister);
        per_cpu(cpuidle_devices, dev->cpu) = NULL;
+        cpuidle_coupled_unregister_device(dev);
        cpuidle_resume_and_unlock();
        module_put(cpuidle_driver->owner);
diff --git a/drivers/cpuidle/cpuidle.h b/drivers/cpuidle/cpuidle.h
index 7db186685c27..76e7f696ad8c 100644
--- a/drivers/cpuidle/cpuidle.h
+++ b/drivers/cpuidle/cpuidle.h
@@ -14,6 +14,8 @@ extern struct list_head cpuidle_detected_devices;
 extern struct mutex cpuidle_lock;
 extern spinlock_t cpuidle_driver_lock;
 extern int cpuidle_disabled(void);
+extern int cpuidle_enter_state(struct cpuidle_device *dev,
+                struct cpuidle_driver *drv, int next_state);
 /* idle loop */
 extern void cpuidle_install_idle_handler(void);
@@ -30,4 +32,34 @@ extern void cpuidle_remove_state_sysfs(struct cpuidle_device *device);
 extern int cpuidle_add_sysfs(struct device *dev);
 extern void cpuidle_remove_sysfs(struct device *dev);
+#ifdef CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED
+bool cpuidle_state_is_coupled(struct cpuidle_device *dev,
+                struct cpuidle_driver *drv, int state);
+int cpuidle_enter_state_coupled(struct cpuidle_device *dev,
+                struct cpuidle_driver *drv, int next_state);
+int cpuidle_coupled_register_device(struct cpuidle_device *dev);
+void cpuidle_coupled_unregister_device(struct cpuidle_device *dev);
+#else
+static inline bool cpuidle_state_is_coupled(struct cpuidle_device *dev,
+                struct cpuidle_driver *drv, int state)
+{
+        return false;
+}
+static inline int cpuidle_enter_state_coupled(struct cpuidle_device *dev,
+                struct cpuidle_driver *drv, int next_state)
+{
+        return -1;
+}
+static inline int cpuidle_coupled_register_device(struct cpuidle_device *dev)
+{
+        return 0;
+}
+static inline void cpuidle_coupled_unregister_device(struct cpuidle_device *dev)
+{
+}
+#endif
 #endif /* __DRIVER_CPUIDLE_H */
diff --git a/drivers/cpuidle/driver.c b/drivers/cpuidle/driver.c
index 40cd3f3024df..58bf3b1ac9c4 100644
--- a/drivers/cpuidle/driver.c
+++ b/drivers/cpuidle/driver.c
@@ -16,6 +16,7 @@
 static struct cpuidle_driver *cpuidle_curr_driver;
 DEFINE_SPINLOCK(cpuidle_driver_lock);
+int cpuidle_driver_refcount;
 static void __cpuidle_register_driver(struct cpuidle_driver *drv)
 {
@@ -89,8 +90,34 @@ void cpuidle_unregister_driver(struct cpuidle_driver *drv)
        }
        spin_lock(&cpuidle_driver_lock);
-        cpuidle_curr_driver = NULL;
+        if (!WARN_ON(cpuidle_driver_refcount > 0))
+                cpuidle_curr_driver = NULL;
        spin_unlock(&cpuidle_driver_lock);
 }
 EXPORT_SYMBOL_GPL(cpuidle_unregister_driver);
+struct cpuidle_driver *cpuidle_driver_ref(void)
+{
+        struct cpuidle_driver *drv;
+        spin_lock(&cpuidle_driver_lock);
+        drv = cpuidle_curr_driver;
+        cpuidle_driver_refcount++;
+        spin_unlock(&cpuidle_driver_lock);
+        return drv;
+}
+void cpuidle_driver_unref(void)
+{
+        spin_lock(&cpuidle_driver_lock);
+        if (!WARN_ON(cpuidle_driver_refcount <= 0))
+                cpuidle_driver_refcount--;
+        spin_unlock(&cpuidle_driver_lock);
+}
diff --git a/drivers/cpuidle/governors/menu.c b/drivers/cpuidle/governors/menu.c
index 06335756ea14..5b1f2c372c1f 100644
--- a/drivers/cpuidle/governors/menu.c
+++ b/drivers/cpuidle/governors/menu.c
@@ -281,7 +281,8 @@ static int menu_select(struct cpuidle_driver *drv, struct cpuidle_device *dev)
         * unless the timer is happening really really soon.
         */
        if (data->expected_us > 5 &&
-                drv->states[CPUIDLE_DRIVER_STATE_START].disable == 0)
+            !drv->states[CPUIDLE_DRIVER_STATE_START].disabled &&
+                dev->states_usage[CPUIDLE_DRIVER_STATE_START].disable == 0)
                data->last_state_idx = CPUIDLE_DRIVER_STATE_START;
        /*
@@ -290,8 +291,9 @@ static int menu_select(struct cpuidle_driver *drv, struct cpuidle_device *dev)
         */
        for (i = CPUIDLE_DRIVER_STATE_START; i < drv->state_count; i++) {
                struct cpuidle_state *s = &drv->states[i];
+                struct cpuidle_state_usage *su = &dev->states_usage[i];
-                if (s->disable)
+                if (s->disabled || su->disable)
                        continue;
                if (s->target_residency > data->predicted_us)
                        continue;
diff --git a/drivers/cpuidle/sysfs.c b/drivers/cpuidle/sysfs.c
index 88032b4dc6d2..5f809e337b89 100644
--- a/drivers/cpuidle/sysfs.c
+++ b/drivers/cpuidle/sysfs.c
@@ -217,7 +217,8 @@ struct cpuidle_state_attr {
        struct attribute attr;
        ssize_t (*show)(struct cpuidle_state *, \
                                        struct cpuidle_state_usage *, char *);
-        ssize_t (*store)(struct cpuidle_state *, const char *, size_t);
+        ssize_t (*store)(struct cpuidle_state *, \
+                        struct cpuidle_state_usage *, const char *, size_t);
 };
 #define define_one_state_ro(_name, show) \
@@ -233,21 +234,22 @@ static ssize_t show_state_##_name(struct cpuidle_state *state, \
        return sprintf(buf, "%u\n", state->_name);\
 }
-#define define_store_state_function(_name) \
+#define define_store_state_ull_function(_name) \
 static ssize_t store_state_##_name(struct cpuidle_state *state, \
+                struct cpuidle_state_usage *state_usage, \
                const char *buf, size_t size) \
 { \
-        long value; \
+        unsigned long long value; \
        int err; \
        if (!capable(CAP_SYS_ADMIN)) \
                return -EPERM; \
-        err = kstrtol(buf, 0, &value); \
+        err = kstrtoull(buf, 0, &value); \
        if (err) \
                return err; \
        if (value) \
-                state->disable = 1; \
+                state_usage->_name = 1; \
        else \
-                state->disable = 0; \
+                state_usage->_name = 0; \
        return size; \
 }
@@ -273,8 +275,8 @@ define_show_state_ull_function(usage)
 define_show_state_ull_function(time)
 define_show_state_str_function(name)
 define_show_state_str_function(desc)
-define_show_state_function(disable)
+define_show_state_ull_function(disable)
-define_store_state_function(disable)
+define_store_state_ull_function(disable)
 define_one_state_ro(name, show_state_name);
 define_one_state_ro(desc, show_state_desc);
@@ -318,10 +320,11 @@ static ssize_t cpuidle_state_store(struct kobject *kobj,
 {
        int ret = -EIO;
        struct cpuidle_state *state = kobj_to_state(kobj);
+        struct cpuidle_state_usage *state_usage = kobj_to_state_usage(kobj);
        struct cpuidle_state_attr *cattr = attr_to_stateattr(attr);
        if (cattr->store)
-                ret = cattr->store(state, buf, size);
+                ret = cattr->store(state, state_usage, buf, size);
        return ret;
 }
diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig
index 1092a770482e..7d74d092aa8f 100644
--- a/drivers/crypto/Kconfig
+++ b/drivers/crypto/Kconfig
@@ -298,7 +298,7 @@ config CRYPTO_DEV_TEGRA_AES
          will be called tegra-aes.
 config CRYPTO_DEV_NX
-        tristate "Support for Power7+ in-Nest cryptographic accleration"
+        tristate "Support for Power7+ in-Nest cryptographic acceleration"
        depends on PPC64 && IBMVIO
        select CRYPTO_AES
        select CRYPTO_CBC
@@ -325,4 +325,58 @@ if CRYPTO_DEV_UX500
        source "drivers/crypto/ux500/Kconfig"
 endif # if CRYPTO_DEV_UX500
+config CRYPTO_DEV_BFIN_CRC
+        tristate "Support for Blackfin CRC hardware"
+        depends on BF60x
+        help
+          Newer Blackfin processors have CRC hardware. Select this if you
+          want to use the Blackfin CRC module.
+config CRYPTO_DEV_ATMEL_AES
+        tristate "Support for Atmel AES hw accelerator"
+        depends on ARCH_AT91
+        select CRYPTO_CBC
+        select CRYPTO_ECB
+        select CRYPTO_AES
+        select CRYPTO_ALGAPI
+        select CRYPTO_BLKCIPHER
+        select CONFIG_AT_HDMAC
+        help
+          Some Atmel processors have AES hw accelerator.
+          Select this if you want to use the Atmel module for
+          AES algorithms.
+          To compile this driver as a module, choose M here: the module
+          will be called atmel-aes.
+config CRYPTO_DEV_ATMEL_TDES
+        tristate "Support for Atmel DES/TDES hw accelerator"
+        depends on ARCH_AT91
+        select CRYPTO_DES
+        select CRYPTO_CBC
+        select CRYPTO_ECB
+        select CRYPTO_ALGAPI
+        select CRYPTO_BLKCIPHER
+        help
+          Some Atmel processors have DES/TDES hw accelerator.
+          Select this if you want to use the Atmel module for
+          DES/TDES algorithms.
+          To compile this driver as a module, choose M here: the module
+          will be called atmel-tdes.
+config CRYPTO_DEV_ATMEL_SHA
+        tristate "Support for Atmel SHA1/SHA256 hw accelerator"
+        depends on ARCH_AT91
+        select CRYPTO_SHA1
+        select CRYPTO_SHA256
+        select CRYPTO_ALGAPI
+        help
+          Some Atmel processors have SHA1/SHA256 hw accelerator.
+          Select this if you want to use the Atmel module for
+          SHA1/SHA256 algorithms.
+          To compile this driver as a module, choose M here: the module
+          will be called atmel-sha.
 endif # CRYPTO_HW
diff --git a/drivers/crypto/Makefile b/drivers/crypto/Makefile
index 01390325d72d..880a47b0b023 100644
--- a/drivers/crypto/Makefile
+++ b/drivers/crypto/Makefile
@@ -14,4 +14,9 @@ obj-$(CONFIG_CRYPTO_DEV_OMAP_AES) += omap-aes.o
 obj-$(CONFIG_CRYPTO_DEV_PICOXCELL) += picoxcell_crypto.o
 obj-$(CONFIG_CRYPTO_DEV_S5P) += s5p-sss.o
 obj-$(CONFIG_CRYPTO_DEV_TEGRA_AES) += tegra-aes.o
-obj-$(CONFIG_CRYPTO_DEV_UX500) += ux500/
-\ No newline at end of file
+obj-$(CONFIG_CRYPTO_DEV_UX500) += ux500/
+obj-$(CONFIG_CRYPTO_DEV_BFIN_CRC) += bfin_crc.o
+obj-$(CONFIG_CRYPTO_DEV_NX) += nx/
+obj-$(CONFIG_CRYPTO_DEV_ATMEL_AES) += atmel-aes.o
+obj-$(CONFIG_CRYPTO_DEV_ATMEL_TDES) += atmel-tdes.o
+obj-$(CONFIG_CRYPTO_DEV_ATMEL_SHA) += atmel-sha.o
diff --git a/drivers/crypto/atmel-aes-regs.h b/drivers/crypto/atmel-aes-regs.h
new file mode 100644
index 000000000000..2786bb1a5aa0
--- /dev/null
+++ b/drivers/crypto/atmel-aes-regs.h
@@ -0,0 +1,62 @@
+#ifndef __ATMEL_AES_REGS_H__
+#define __ATMEL_AES_REGS_H__
+#define AES_CR                  0x00
+#define AES_CR_START            (1 << 0)
+#define AES_CR_SWRST            (1 << 8)
+#define AES_CR_LOADSEED         (1 << 16)
+#define AES_MR                  0x04
+#define AES_MR_CYPHER_DEC               (0 << 0)
+#define AES_MR_CYPHER_ENC               (1 << 0)
+#define AES_MR_DUALBUFF                 (1 << 3)
+#define AES_MR_PROCDLY_MASK             (0xF << 4)
+#define AES_MR_PROCDLY_OFFSET   4
+#define AES_MR_SMOD_MASK                (0x3 << 8)
+#define AES_MR_SMOD_MANUAL              (0x0 << 8)
+#define AES_MR_SMOD_AUTO                (0x1 << 8)
+#define AES_MR_SMOD_IDATAR0             (0x2 << 8)
+#define AES_MR_KEYSIZE_MASK             (0x3 << 10)
+#define AES_MR_KEYSIZE_128              (0x0 << 10)
+#define AES_MR_KEYSIZE_192              (0x1 << 10)
+#define AES_MR_KEYSIZE_256              (0x2 << 10)
+#define AES_MR_OPMOD_MASK               (0x7 << 12)
+#define AES_MR_OPMOD_ECB                (0x0 << 12)
+#define AES_MR_OPMOD_CBC                (0x1 << 12)
+#define AES_MR_OPMOD_OFB                (0x2 << 12)
+#define AES_MR_OPMOD_CFB                (0x3 << 12)
+#define AES_MR_OPMOD_CTR                (0x4 << 12)
+#define AES_MR_LOD                              (0x1 << 15)
+#define AES_MR_CFBS_MASK                (0x7 << 16)
+#define AES_MR_CFBS_128b                (0x0 << 16)
+#define AES_MR_CFBS_64b                 (0x1 << 16)
+#define AES_MR_CFBS_32b                 (0x2 << 16)
+#define AES_MR_CFBS_16b                 (0x3 << 16)
+#define AES_MR_CFBS_8b                  (0x4 << 16)
+#define AES_MR_CKEY_MASK                (0xF << 20)
+#define AES_MR_CKEY_OFFSET              20
+#define AES_MR_CMTYP_MASK               (0x1F << 24)
+#define AES_MR_CMTYP_OFFSET             24
+#define AES_IER         0x10
+#define AES_IDR         0x14
+#define AES_IMR         0x18
+#define AES_ISR         0x1C
+#define AES_INT_DATARDY         (1 << 0)
+#define AES_INT_URAD            (1 << 8)
+#define AES_ISR_URAT_MASK       (0xF << 12)
+#define AES_ISR_URAT_IDR_WR_PROC        (0x0 << 12)
+#define AES_ISR_URAT_ODR_RD_PROC        (0x1 << 12)
+#define AES_ISR_URAT_MR_WR_PROC         (0x2 << 12)
+#define AES_ISR_URAT_ODR_RD_SUBK        (0x3 << 12)
+#define AES_ISR_URAT_MR_WR_SUBK         (0x4 << 12)
+#define AES_ISR_URAT_WOR_RD                     (0x5 << 12)
+#define AES_KEYWR(x)    (0x20 + ((x) * 0x04))
+#define AES_IDATAR(x)   (0x40 + ((x) * 0x04))
+#define AES_ODATAR(x)   (0x50 + ((x) * 0x04))
+#define AES_IVR(x)              (0x60 + ((x) * 0x04))
+#define AES_HW_VERSION  0xFC
+#endif /* __ATMEL_AES_REGS_H__ */
diff --git a/drivers/crypto/atmel-aes.c b/drivers/crypto/atmel-aes.c
new file mode 100644
index 000000000000..6bb20fffbf49
--- /dev/null
+++ b/drivers/crypto/atmel-aes.c
@@ -0,0 +1,1206 @@
+/*
+ * Cryptographic API.
+ *
+ * Support for ATMEL AES HW acceleration.
+ *
+ * Copyright (c) 2012 Eukréa Electromatique - ATMEL
+ * Author: Nicolas Royer <nicolas@eukrea.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ *
+ * Some ideas are from omap-aes.c driver.
+ */
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/slab.h>
+#include <linux/err.h>
+#include <linux/clk.h>
+#include <linux/io.h>
+#include <linux/hw_random.h>
+#include <linux/platform_device.h>
+#include <linux/device.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/errno.h>
+#include <linux/interrupt.h>
+#include <linux/kernel.h>
+#include <linux/clk.h>
+#include <linux/irq.h>
+#include <linux/io.h>
+#include <linux/platform_device.h>
+#include <linux/scatterlist.h>
+#include <linux/dma-mapping.h>
+#include <linux/delay.h>
+#include <linux/crypto.h>
+#include <linux/cryptohash.h>
+#include <crypto/scatterwalk.h>
+#include <crypto/algapi.h>
+#include <crypto/aes.h>
+#include <crypto/hash.h>
+#include <crypto/internal/hash.h>
+#include <linux/platform_data/atmel-aes.h>
+#include "atmel-aes-regs.h"
+#define CFB8_BLOCK_SIZE         1
+#define CFB16_BLOCK_SIZE        2
+#define CFB32_BLOCK_SIZE        4
+#define CFB64_BLOCK_SIZE        8
+/* AES flags */
+#define AES_FLAGS_MODE_MASK     0x01ff
+#define AES_FLAGS_ENCRYPT       BIT(0)
+#define AES_FLAGS_CBC           BIT(1)
+#define AES_FLAGS_CFB           BIT(2)
+#define AES_FLAGS_CFB8          BIT(3)
+#define AES_FLAGS_CFB16         BIT(4)
+#define AES_FLAGS_CFB32         BIT(5)
+#define AES_FLAGS_CFB64         BIT(6)
+#define AES_FLAGS_OFB           BIT(7)
+#define AES_FLAGS_CTR           BIT(8)
+#define AES_FLAGS_INIT          BIT(16)
+#define AES_FLAGS_DMA           BIT(17)
+#define AES_FLAGS_BUSY          BIT(18)
+#define AES_FLAGS_DUALBUFF      BIT(24)
+#define ATMEL_AES_QUEUE_LENGTH  1
+#define ATMEL_AES_CACHE_SIZE    0
+#define ATMEL_AES_DMA_THRESHOLD         16
+struct atmel_aes_dev;
+struct atmel_aes_ctx {
+        struct atmel_aes_dev *dd;
+        int             keylen;
+        u32             key[AES_KEYSIZE_256 / sizeof(u32)];
+};
+struct atmel_aes_reqctx {
+        unsigned long mode;
+};
+struct atmel_aes_dma {
+        struct dma_chan                 *chan;
+        struct dma_slave_config dma_conf;
+};
+struct atmel_aes_dev {
+        struct list_head        list;
+        unsigned long           phys_base;
+        void __iomem            *io_base;
+        struct atmel_aes_ctx    *ctx;
+        struct device           *dev;
+        struct clk              *iclk;
+        int     irq;
+        unsigned long           flags;
+        int     err;
+        spinlock_t              lock;
+        struct crypto_queue     queue;
+        struct tasklet_struct   done_task;
+        struct tasklet_struct   queue_task;
+        struct ablkcipher_request       *req;
+        size_t  total;
+        struct scatterlist      *in_sg;
+        unsigned int            nb_in_sg;
+        struct scatterlist      *out_sg;
+        unsigned int            nb_out_sg;
+        size_t  bufcnt;
+        u8      buf_in[ATMEL_AES_DMA_THRESHOLD] __aligned(sizeof(u32));
+        int     dma_in;
+        struct atmel_aes_dma    dma_lch_in;
+        u8      buf_out[ATMEL_AES_DMA_THRESHOLD] __aligned(sizeof(u32));
+        int     dma_out;
+        struct atmel_aes_dma    dma_lch_out;
+        u32     hw_version;
+};
+struct atmel_aes_drv {
+        struct list_head        dev_list;
+        spinlock_t              lock;
+};
+static struct atmel_aes_drv atmel_aes = {
+        .dev_list = LIST_HEAD_INIT(atmel_aes.dev_list),
+        .lock = __SPIN_LOCK_UNLOCKED(atmel_aes.lock),
+};
+static int atmel_aes_sg_length(struct ablkcipher_request *req,
+                        struct scatterlist *sg)
+{
+        unsigned int total = req->nbytes;
+        int sg_nb;
+        unsigned int len;
+        struct scatterlist *sg_list;
+        sg_nb = 0;
+        sg_list = sg;
+        total = req->nbytes;
+        while (total) {
+                len = min(sg_list->length, total);
+                sg_nb++;
+                total -= len;
+                sg_list = sg_next(sg_list);
+                if (!sg_list)
+                        total = 0;
+        }
+        return sg_nb;
+}
+static inline u32 atmel_aes_read(struct atmel_aes_dev *dd, u32 offset)
+{
+        return readl_relaxed(dd->io_base + offset);
+}
+static inline void atmel_aes_write(struct atmel_aes_dev *dd,
+                                        u32 offset, u32 value)
+{
+        writel_relaxed(value, dd->io_base + offset);
+}
+static void atmel_aes_read_n(struct atmel_aes_dev *dd, u32 offset,
+                                        u32 *value, int count)
+{
+        for (; count--; value++, offset += 4)
+                *value = atmel_aes_read(dd, offset);
+}
+static void atmel_aes_write_n(struct atmel_aes_dev *dd, u32 offset,
+                                        u32 *value, int count)
+{
+        for (; count--; value++, offset += 4)
+                atmel_aes_write(dd, offset, *value);
+}
+static void atmel_aes_dualbuff_test(struct atmel_aes_dev *dd)
+{
+        atmel_aes_write(dd, AES_MR, AES_MR_DUALBUFF);
+        if (atmel_aes_read(dd, AES_MR) & AES_MR_DUALBUFF)
+                dd->flags |= AES_FLAGS_DUALBUFF;
+}
+static struct atmel_aes_dev *atmel_aes_find_dev(struct atmel_aes_ctx *ctx)
+{
+        struct atmel_aes_dev *aes_dd = NULL;
+        struct atmel_aes_dev *tmp;
+        spin_lock_bh(&atmel_aes.lock);
+        if (!ctx->dd) {
+                list_for_each_entry(tmp, &atmel_aes.dev_list, list) {
+                        aes_dd = tmp;
+                        break;
+                }
+                ctx->dd = aes_dd;
+        } else {
+                aes_dd = ctx->dd;
+        }
+        spin_unlock_bh(&atmel_aes.lock);
+        return aes_dd;
+}
+static int atmel_aes_hw_init(struct atmel_aes_dev *dd)
+{
+        clk_prepare_enable(dd->iclk);
+        if (!(dd->flags & AES_FLAGS_INIT)) {
+                atmel_aes_write(dd, AES_CR, AES_CR_SWRST);
+                atmel_aes_dualbuff_test(dd);
+                dd->flags |= AES_FLAGS_INIT;
+                dd->err = 0;
+        }
+        return 0;
+}
+static void atmel_aes_hw_version_init(struct atmel_aes_dev *dd)
+{
+        atmel_aes_hw_init(dd);
+        dd->hw_version = atmel_aes_read(dd, AES_HW_VERSION);
+        clk_disable_unprepare(dd->iclk);
+}
+static void atmel_aes_finish_req(struct atmel_aes_dev *dd, int err)
+{
+        struct ablkcipher_request *req = dd->req;
+        clk_disable_unprepare(dd->iclk);
+        dd->flags &= ~AES_FLAGS_BUSY;
+        req->base.complete(&req->base, err);
+}
+static void atmel_aes_dma_callback(void *data)
+{
+        struct atmel_aes_dev *dd = data;
+        /* dma_lch_out - completed */
+        tasklet_schedule(&dd->done_task);
+}
+static int atmel_aes_crypt_dma(struct atmel_aes_dev *dd)
+{
+        struct dma_async_tx_descriptor  *in_desc, *out_desc;
+        int nb_dma_sg_in, nb_dma_sg_out;
+        dd->nb_in_sg = atmel_aes_sg_length(dd->req, dd->in_sg);
+        if (!dd->nb_in_sg)
+                goto exit_err;
+        nb_dma_sg_in = dma_map_sg(dd->dev, dd->in_sg, dd->nb_in_sg,
+                        DMA_TO_DEVICE);
+        if (!nb_dma_sg_in)
+                goto exit_err;
+        in_desc = dmaengine_prep_slave_sg(dd->dma_lch_in.chan, dd->in_sg,
+                                nb_dma_sg_in, DMA_MEM_TO_DEV,
+                                DMA_PREP_INTERRUPT  |  DMA_CTRL_ACK);
+        if (!in_desc)
+                goto unmap_in;
+        /* callback not needed */
+        dd->nb_out_sg = atmel_aes_sg_length(dd->req, dd->out_sg);
+        if (!dd->nb_out_sg)
+                goto unmap_in;
+        nb_dma_sg_out = dma_map_sg(dd->dev, dd->out_sg, dd->nb_out_sg,
+                        DMA_FROM_DEVICE);
+        if (!nb_dma_sg_out)
+                goto unmap_out;
+        out_desc = dmaengine_prep_slave_sg(dd->dma_lch_out.chan, dd->out_sg,
+                                nb_dma_sg_out, DMA_DEV_TO_MEM,
+                                DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
+        if (!out_desc)
+                goto unmap_out;
+        out_desc->callback = atmel_aes_dma_callback;
+        out_desc->callback_param = dd;
+        dd->total -= dd->req->nbytes;
+        dmaengine_submit(out_desc);
+        dma_async_issue_pending(dd->dma_lch_out.chan);
+        dmaengine_submit(in_desc);
+        dma_async_issue_pending(dd->dma_lch_in.chan);
+        return 0;
+unmap_out:
+        dma_unmap_sg(dd->dev, dd->out_sg, dd->nb_out_sg,
+                DMA_FROM_DEVICE);
+unmap_in:
+        dma_unmap_sg(dd->dev, dd->in_sg, dd->nb_in_sg,
+                DMA_TO_DEVICE);
+exit_err:
+        return -EINVAL;
+}
+static int atmel_aes_crypt_cpu_start(struct atmel_aes_dev *dd)
+{
+        dd->flags &= ~AES_FLAGS_DMA;
+        /* use cache buffers */
+        dd->nb_in_sg = atmel_aes_sg_length(dd->req, dd->in_sg);
+        if (!dd->nb_in_sg)
+                return -EINVAL;
+        dd->nb_out_sg = atmel_aes_sg_length(dd->req, dd->out_sg);
+        if (!dd->nb_in_sg)
+                return -EINVAL;
+        dd->bufcnt = sg_copy_to_buffer(dd->in_sg, dd->nb_in_sg,
+                                        dd->buf_in, dd->total);
+        if (!dd->bufcnt)
+                return -EINVAL;
+        dd->total -= dd->bufcnt;
+        atmel_aes_write(dd, AES_IER, AES_INT_DATARDY);
+        atmel_aes_write_n(dd, AES_IDATAR(0), (u32 *) dd->buf_in,
+                                dd->bufcnt >> 2);
+        return 0;
+}
+static int atmel_aes_crypt_dma_start(struct atmel_aes_dev *dd)
+{
+        int err;
+        if (dd->flags & AES_FLAGS_CFB8) {
+                dd->dma_lch_in.dma_conf.dst_addr_width =
+                        DMA_SLAVE_BUSWIDTH_1_BYTE;
+                dd->dma_lch_out.dma_conf.src_addr_width =
+                        DMA_SLAVE_BUSWIDTH_1_BYTE;
+        } else if (dd->flags & AES_FLAGS_CFB16) {
+                dd->dma_lch_in.dma_conf.dst_addr_width =
+                        DMA_SLAVE_BUSWIDTH_2_BYTES;
+                dd->dma_lch_out.dma_conf.src_addr_width =
+                        DMA_SLAVE_BUSWIDTH_2_BYTES;
+        } else {
+                dd->dma_lch_in.dma_conf.dst_addr_width =
+                        DMA_SLAVE_BUSWIDTH_4_BYTES;
+                dd->dma_lch_out.dma_conf.src_addr_width =
+                        DMA_SLAVE_BUSWIDTH_4_BYTES;
+        }
+        dmaengine_slave_config(dd->dma_lch_in.chan, &dd->dma_lch_in.dma_conf);
+        dmaengine_slave_config(dd->dma_lch_out.chan, &dd->dma_lch_out.dma_conf);
+        dd->flags |= AES_FLAGS_DMA;
+        err = atmel_aes_crypt_dma(dd);
+        return err;
+}
+static int atmel_aes_write_ctrl(struct atmel_aes_dev *dd)
+{
+        int err;
+        u32 valcr = 0, valmr = 0;
+        err = atmel_aes_hw_init(dd);
+        if (err)
+                return err;
+        /* MR register must be set before IV registers */
+        if (dd->ctx->keylen == AES_KEYSIZE_128)
+                valmr |= AES_MR_KEYSIZE_128;
+        else if (dd->ctx->keylen == AES_KEYSIZE_192)
+                valmr |= AES_MR_KEYSIZE_192;
+        else
+                valmr |= AES_MR_KEYSIZE_256;
+        if (dd->flags & AES_FLAGS_CBC) {
+                valmr |= AES_MR_OPMOD_CBC;
+        } else if (dd->flags & AES_FLAGS_CFB) {
+                valmr |= AES_MR_OPMOD_CFB;
+                if (dd->flags & AES_FLAGS_CFB8)
+                        valmr |= AES_MR_CFBS_8b;
+                else if (dd->flags & AES_FLAGS_CFB16)
+                        valmr |= AES_MR_CFBS_16b;
+                else if (dd->flags & AES_FLAGS_CFB32)
+                        valmr |= AES_MR_CFBS_32b;
+                else if (dd->flags & AES_FLAGS_CFB64)
+                        valmr |= AES_MR_CFBS_64b;
+        } else if (dd->flags & AES_FLAGS_OFB) {
+                valmr |= AES_MR_OPMOD_OFB;
+        } else if (dd->flags & AES_FLAGS_CTR) {
+                valmr |= AES_MR_OPMOD_CTR;
+        } else {
+                valmr |= AES_MR_OPMOD_ECB;
+        }
+        if (dd->flags & AES_FLAGS_ENCRYPT)
+                valmr |= AES_MR_CYPHER_ENC;
+        if (dd->total > ATMEL_AES_DMA_THRESHOLD) {
+                valmr |= AES_MR_SMOD_IDATAR0;
+                if (dd->flags & AES_FLAGS_DUALBUFF)
+                        valmr |= AES_MR_DUALBUFF;
+        } else {
+                valmr |= AES_MR_SMOD_AUTO;
+        }
+        atmel_aes_write(dd, AES_CR, valcr);
+        atmel_aes_write(dd, AES_MR, valmr);
+        atmel_aes_write_n(dd, AES_KEYWR(0), dd->ctx->key,
+                                                dd->ctx->keylen >> 2);
+        if (((dd->flags & AES_FLAGS_CBC) || (dd->flags & AES_FLAGS_CFB) ||
+           (dd->flags & AES_FLAGS_OFB) || (dd->flags & AES_FLAGS_CTR)) &&
+           dd->req->info) {
+                atmel_aes_write_n(dd, AES_IVR(0), dd->req->info, 4);
+        }
+        return 0;
+}
+static int atmel_aes_handle_queue(struct atmel_aes_dev *dd,
+                               struct ablkcipher_request *req)
+{
+        struct crypto_async_request *async_req, *backlog;
+        struct atmel_aes_ctx *ctx;
+        struct atmel_aes_reqctx *rctx;
+        unsigned long flags;
+        int err, ret = 0;
+        spin_lock_irqsave(&dd->lock, flags);
+        if (req)
+                ret = ablkcipher_enqueue_request(&dd->queue, req);
+        if (dd->flags & AES_FLAGS_BUSY) {
+                spin_unlock_irqrestore(&dd->lock, flags);
+                return ret;
+        }
+        backlog = crypto_get_backlog(&dd->queue);
+        async_req = crypto_dequeue_request(&dd->queue);
+        if (async_req)
+                dd->flags |= AES_FLAGS_BUSY;
+        spin_unlock_irqrestore(&dd->lock, flags);
+        if (!async_req)
+                return ret;
+        if (backlog)
+                backlog->complete(backlog, -EINPROGRESS);
+        req = ablkcipher_request_cast(async_req);
+        /* assign new request to device */
+        dd->req = req;
+        dd->total = req->nbytes;
+        dd->in_sg = req->src;
+        dd->out_sg = req->dst;
+        rctx = ablkcipher_request_ctx(req);
+        ctx = crypto_ablkcipher_ctx(crypto_ablkcipher_reqtfm(req));
+        rctx->mode &= AES_FLAGS_MODE_MASK;
+        dd->flags = (dd->flags & ~AES_FLAGS_MODE_MASK) | rctx->mode;
+        dd->ctx = ctx;
+        ctx->dd = dd;
+        err = atmel_aes_write_ctrl(dd);
+        if (!err) {
+                if (dd->total > ATMEL_AES_DMA_THRESHOLD)
+                        err = atmel_aes_crypt_dma_start(dd);
+                else
+                        err = atmel_aes_crypt_cpu_start(dd);
+        }
+        if (err) {
+                /* aes_task will not finish it, so do it here */
+                atmel_aes_finish_req(dd, err);
+                tasklet_schedule(&dd->queue_task);
+        }
+        return ret;
+}
+static int atmel_aes_crypt_dma_stop(struct atmel_aes_dev *dd)
+{
+        int err = -EINVAL;
+        if (dd->flags & AES_FLAGS_DMA) {
+                dma_unmap_sg(dd->dev, dd->out_sg,
+                        dd->nb_out_sg, DMA_FROM_DEVICE);
+                dma_unmap_sg(dd->dev, dd->in_sg,
+                        dd->nb_in_sg, DMA_TO_DEVICE);
+                err = 0;
+        }
+        return err;
+}
+static int atmel_aes_crypt(struct ablkcipher_request *req, unsigned long mode)
+{
+        struct atmel_aes_ctx *ctx = crypto_ablkcipher_ctx(
+                        crypto_ablkcipher_reqtfm(req));
+        struct atmel_aes_reqctx *rctx = ablkcipher_request_ctx(req);
+        struct atmel_aes_dev *dd;
+        if (!IS_ALIGNED(req->nbytes, AES_BLOCK_SIZE)) {
+                pr_err("request size is not exact amount of AES blocks\n");
+                return -EINVAL;
+        }
+        dd = atmel_aes_find_dev(ctx);
+        if (!dd)
+                return -ENODEV;
+        rctx->mode = mode;
+        return atmel_aes_handle_queue(dd, req);
+}
+static bool atmel_aes_filter(struct dma_chan *chan, void *slave)
+{
+        struct at_dma_slave     *sl = slave;
+        if (sl && sl->dma_dev == chan->device->dev) {
+                chan->private = sl;
+                return true;
+        } else {
+                return false;
+        }
+}
+static int atmel_aes_dma_init(struct atmel_aes_dev *dd)
+{
+        int err = -ENOMEM;
+        struct aes_platform_data        *pdata;
+        dma_cap_mask_t mask_in, mask_out;
+        pdata = dd->dev->platform_data;
+        if (pdata && pdata->dma_slave->txdata.dma_dev &&
+                pdata->dma_slave->rxdata.dma_dev) {
+                /* Try to grab 2 DMA channels */
+                dma_cap_zero(mask_in);
+                dma_cap_set(DMA_SLAVE, mask_in);
+                dd->dma_lch_in.chan = dma_request_channel(mask_in,
+                                atmel_aes_filter, &pdata->dma_slave->rxdata);
+                if (!dd->dma_lch_in.chan)
+                        goto err_dma_in;
+                dd->dma_lch_in.dma_conf.direction = DMA_MEM_TO_DEV;
+                dd->dma_lch_in.dma_conf.dst_addr = dd->phys_base +
+                        AES_IDATAR(0);
+                dd->dma_lch_in.dma_conf.src_maxburst = 1;
+                dd->dma_lch_in.dma_conf.dst_maxburst = 1;
+                dd->dma_lch_in.dma_conf.device_fc = false;
+                dma_cap_zero(mask_out);
+                dma_cap_set(DMA_SLAVE, mask_out);
+                dd->dma_lch_out.chan = dma_request_channel(mask_out,
+                                atmel_aes_filter, &pdata->dma_slave->txdata);
+                if (!dd->dma_lch_out.chan)
+                        goto err_dma_out;
+                dd->dma_lch_out.dma_conf.direction = DMA_DEV_TO_MEM;
+                dd->dma_lch_out.dma_conf.src_addr = dd->phys_base +
+                        AES_ODATAR(0);
+                dd->dma_lch_out.dma_conf.src_maxburst = 1;
+                dd->dma_lch_out.dma_conf.dst_maxburst = 1;
+                dd->dma_lch_out.dma_conf.device_fc = false;
+                return 0;
+        } else {
+                return -ENODEV;
+        }
+err_dma_out:
+        dma_release_channel(dd->dma_lch_in.chan);
+err_dma_in:
+        return err;
+}
+static void atmel_aes_dma_cleanup(struct atmel_aes_dev *dd)
+{
+        dma_release_channel(dd->dma_lch_in.chan);
+        dma_release_channel(dd->dma_lch_out.chan);
+}
+static int atmel_aes_setkey(struct crypto_ablkcipher *tfm, const u8 *key,
+                           unsigned int keylen)
+{
+        struct atmel_aes_ctx *ctx = crypto_ablkcipher_ctx(tfm);
+        if (keylen != AES_KEYSIZE_128 && keylen != AES_KEYSIZE_192 &&
+                   keylen != AES_KEYSIZE_256) {
+                crypto_ablkcipher_set_flags(tfm, CRYPTO_TFM_RES_BAD_KEY_LEN);
+                return -EINVAL;
+        }
+        memcpy(ctx->key, key, keylen);
+        ctx->keylen = keylen;
+        return 0;
+}
+static int atmel_aes_ecb_encrypt(struct ablkcipher_request *req)
+{
+        return atmel_aes_crypt(req,
+                AES_FLAGS_ENCRYPT);
+}
+static int atmel_aes_ecb_decrypt(struct ablkcipher_request *req)
+{
+        return atmel_aes_crypt(req,
+                0);
+}
+static int atmel_aes_cbc_encrypt(struct ablkcipher_request *req)
+{
+        return atmel_aes_crypt(req,
+                AES_FLAGS_ENCRYPT | AES_FLAGS_CBC);
+}
+static int atmel_aes_cbc_decrypt(struct ablkcipher_request *req)
+{
+        return atmel_aes_crypt(req,
+                AES_FLAGS_CBC);
+}
+static int atmel_aes_ofb_encrypt(struct ablkcipher_request *req)
+{
+        return atmel_aes_crypt(req,
+                AES_FLAGS_ENCRYPT | AES_FLAGS_OFB);
+}
+static int atmel_aes_ofb_decrypt(struct ablkcipher_request *req)
+{
+        return atmel_aes_crypt(req,
+                AES_FLAGS_OFB);
+}
+static int atmel_aes_cfb_encrypt(struct ablkcipher_request *req)
+{
+        return atmel_aes_crypt(req,
+                AES_FLAGS_ENCRYPT | AES_FLAGS_CFB);
+}
+static int atmel_aes_cfb_decrypt(struct ablkcipher_request *req)
+{
+        return atmel_aes_crypt(req,
+                AES_FLAGS_CFB);
+}
+static int atmel_aes_cfb64_encrypt(struct ablkcipher_request *req)
+{
+        return atmel_aes_crypt(req,
+                AES_FLAGS_ENCRYPT | AES_FLAGS_CFB | AES_FLAGS_CFB64);
+}
+static int atmel_aes_cfb64_decrypt(struct ablkcipher_request *req)
+{
+        return atmel_aes_crypt(req,
+                AES_FLAGS_CFB | AES_FLAGS_CFB64);
+}
+static int atmel_aes_cfb32_encrypt(struct ablkcipher_request *req)
+{
+        return atmel_aes_crypt(req,
+                AES_FLAGS_ENCRYPT | AES_FLAGS_CFB | AES_FLAGS_CFB32);
+}
+static int atmel_aes_cfb32_decrypt(struct ablkcipher_request *req)
+{
+        return atmel_aes_crypt(req,
+                AES_FLAGS_CFB | AES_FLAGS_CFB32);
+}
+static int atmel_aes_cfb16_encrypt(struct ablkcipher_request *req)
+{
+        return atmel_aes_crypt(req,
+                AES_FLAGS_ENCRYPT | AES_FLAGS_CFB | AES_FLAGS_CFB16);
+}
+static int atmel_aes_cfb16_decrypt(struct ablkcipher_request *req)
+{
+        return atmel_aes_crypt(req,
+                AES_FLAGS_CFB | AES_FLAGS_CFB16);
+}
+static int atmel_aes_cfb8_encrypt(struct ablkcipher_request *req)
+{
+        return atmel_aes_crypt(req,
+                AES_FLAGS_ENCRYPT |     AES_FLAGS_CFB | AES_FLAGS_CFB8);
+}
+static int atmel_aes_cfb8_decrypt(struct ablkcipher_request *req)
+{
+        return atmel_aes_crypt(req,
+                AES_FLAGS_CFB | AES_FLAGS_CFB8);
+}
+static int atmel_aes_ctr_encrypt(struct ablkcipher_request *req)
+{
+        return atmel_aes_crypt(req,
+                AES_FLAGS_ENCRYPT | AES_FLAGS_CTR);
+}
+static int atmel_aes_ctr_decrypt(struct ablkcipher_request *req)
+{
+        return atmel_aes_crypt(req,
+                AES_FLAGS_CTR);
+}
+static int atmel_aes_cra_init(struct crypto_tfm *tfm)
+{
+        tfm->crt_ablkcipher.reqsize = sizeof(struct atmel_aes_reqctx);
+        return 0;
+}
+static void atmel_aes_cra_exit(struct crypto_tfm *tfm)
+{
+}
+static struct crypto_alg aes_algs[] = {
+{
+        .cra_name               = "ecb(aes)",
+        .cra_driver_name        = "atmel-ecb-aes",
+        .cra_priority           = 100,
+        .cra_flags              = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
+        .cra_blocksize          = AES_BLOCK_SIZE,
+        .cra_ctxsize            = sizeof(struct atmel_aes_ctx),
+        .cra_alignmask          = 0x0,
+        .cra_type               = &crypto_ablkcipher_type,
+        .cra_module             = THIS_MODULE,
+        .cra_init               = atmel_aes_cra_init,
+        .cra_exit               = atmel_aes_cra_exit,
+        .cra_u.ablkcipher = {
+                .min_keysize    = AES_MIN_KEY_SIZE,
+                .max_keysize    = AES_MAX_KEY_SIZE,
+                .setkey         = atmel_aes_setkey,
+                .encrypt        = atmel_aes_ecb_encrypt,
+                .decrypt        = atmel_aes_ecb_decrypt,
+        }
+},
+{
+        .cra_name               = "cbc(aes)",
+        .cra_driver_name        = "atmel-cbc-aes",
+        .cra_priority           = 100,
+        .cra_flags              = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
+        .cra_blocksize          = AES_BLOCK_SIZE,
+        .cra_ctxsize            = sizeof(struct atmel_aes_ctx),
+        .cra_alignmask          = 0x0,
+        .cra_type               = &crypto_ablkcipher_type,
+        .cra_module             = THIS_MODULE,
+        .cra_init               = atmel_aes_cra_init,
+        .cra_exit               = atmel_aes_cra_exit,
+        .cra_u.ablkcipher = {
+                .min_keysize    = AES_MIN_KEY_SIZE,
+                .max_keysize    = AES_MAX_KEY_SIZE,
+                .ivsize         = AES_BLOCK_SIZE,
+                .setkey         = atmel_aes_setkey,
+                .encrypt        = atmel_aes_cbc_encrypt,
+                .decrypt        = atmel_aes_cbc_decrypt,
+        }
+},
+{
+        .cra_name               = "ofb(aes)",
+        .cra_driver_name        = "atmel-ofb-aes",
+        .cra_priority           = 100,
+        .cra_flags              = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
+        .cra_blocksize          = AES_BLOCK_SIZE,
+        .cra_ctxsize            = sizeof(struct atmel_aes_ctx),
+        .cra_alignmask          = 0x0,
+        .cra_type               = &crypto_ablkcipher_type,
+        .cra_module             = THIS_MODULE,
+        .cra_init               = atmel_aes_cra_init,
+        .cra_exit               = atmel_aes_cra_exit,
+        .cra_u.ablkcipher = {
+                .min_keysize    = AES_MIN_KEY_SIZE,
+                .max_keysize    = AES_MAX_KEY_SIZE,
+                .ivsize         = AES_BLOCK_SIZE,
+                .setkey         = atmel_aes_setkey,
+                .encrypt        = atmel_aes_ofb_encrypt,
+                .decrypt        = atmel_aes_ofb_decrypt,
+        }
+},
+{
+        .cra_name               = "cfb(aes)",
+        .cra_driver_name        = "atmel-cfb-aes",
+        .cra_priority           = 100,
+        .cra_flags              = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
+        .cra_blocksize          = AES_BLOCK_SIZE,
+        .cra_ctxsize            = sizeof(struct atmel_aes_ctx),
+        .cra_alignmask          = 0x0,
+        .cra_type               = &crypto_ablkcipher_type,
+        .cra_module             = THIS_MODULE,
+        .cra_init               = atmel_aes_cra_init,
+        .cra_exit               = atmel_aes_cra_exit,
+        .cra_u.ablkcipher = {
+                .min_keysize    = AES_MIN_KEY_SIZE,
+                .max_keysize    = AES_MAX_KEY_SIZE,
+                .ivsize         = AES_BLOCK_SIZE,
+                .setkey         = atmel_aes_setkey,
+                .encrypt        = atmel_aes_cfb_encrypt,
+                .decrypt        = atmel_aes_cfb_decrypt,
+        }
+},
+{
+        .cra_name               = "cfb32(aes)",
+        .cra_driver_name        = "atmel-cfb32-aes",
+        .cra_priority           = 100,
+        .cra_flags              = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
+        .cra_blocksize          = CFB32_BLOCK_SIZE,
+        .cra_ctxsize            = sizeof(struct atmel_aes_ctx),
+        .cra_alignmask          = 0x0,
+        .cra_type               = &crypto_ablkcipher_type,
+        .cra_module             = THIS_MODULE,
+        .cra_init               = atmel_aes_cra_init,
+        .cra_exit               = atmel_aes_cra_exit,
+        .cra_u.ablkcipher = {
+                .min_keysize    = AES_MIN_KEY_SIZE,
+                .max_keysize    = AES_MAX_KEY_SIZE,
+                .ivsize         = AES_BLOCK_SIZE,
+                .setkey         = atmel_aes_setkey,
+                .encrypt        = atmel_aes_cfb32_encrypt,
+                .decrypt        = atmel_aes_cfb32_decrypt,
+        }
+},
+{
+        .cra_name               = "cfb16(aes)",
+        .cra_driver_name        = "atmel-cfb16-aes",
+        .cra_priority           = 100,
+        .cra_flags              = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
+        .cra_blocksize          = CFB16_BLOCK_SIZE,
+        .cra_ctxsize            = sizeof(struct atmel_aes_ctx),
+        .cra_alignmask          = 0x0,
+        .cra_type               = &crypto_ablkcipher_type,
+        .cra_module             = THIS_MODULE,
+        .cra_init               = atmel_aes_cra_init,
+        .cra_exit               = atmel_aes_cra_exit,
+        .cra_u.ablkcipher = {
+                .min_keysize    = AES_MIN_KEY_SIZE,
+                .max_keysize    = AES_MAX_KEY_SIZE,
+                .ivsize         = AES_BLOCK_SIZE,
+                .setkey         = atmel_aes_setkey,
+                .encrypt        = atmel_aes_cfb16_encrypt,
+                .decrypt        = atmel_aes_cfb16_decrypt,
+        }
+},
+{
+        .cra_name               = "cfb8(aes)",
+        .cra_driver_name        = "atmel-cfb8-aes",
+        .cra_priority           = 100,
+        .cra_flags              = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
+        .cra_blocksize          = CFB64_BLOCK_SIZE,
+        .cra_ctxsize            = sizeof(struct atmel_aes_ctx),
+        .cra_alignmask          = 0x0,
+        .cra_type               = &crypto_ablkcipher_type,
+        .cra_module             = THIS_MODULE,
+        .cra_init               = atmel_aes_cra_init,
+        .cra_exit               = atmel_aes_cra_exit,
+        .cra_u.ablkcipher = {
+                .min_keysize    = AES_MIN_KEY_SIZE,
+                .max_keysize    = AES_MAX_KEY_SIZE,
+                .ivsize         = AES_BLOCK_SIZE,
+                .setkey         = atmel_aes_setkey,
+                .encrypt        = atmel_aes_cfb8_encrypt,
+                .decrypt        = atmel_aes_cfb8_decrypt,
+        }
+},
+{
+        .cra_name               = "ctr(aes)",
+        .cra_driver_name        = "atmel-ctr-aes",
+        .cra_priority           = 100,
+        .cra_flags              = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
+        .cra_blocksize          = AES_BLOCK_SIZE,
+        .cra_ctxsize            = sizeof(struct atmel_aes_ctx),
+        .cra_alignmask          = 0x0,
+        .cra_type               = &crypto_ablkcipher_type,
+        .cra_module             = THIS_MODULE,
+        .cra_init               = atmel_aes_cra_init,
+        .cra_exit               = atmel_aes_cra_exit,
+        .cra_u.ablkcipher = {
+                .min_keysize    = AES_MIN_KEY_SIZE,
+                .max_keysize    = AES_MAX_KEY_SIZE,
+                .ivsize         = AES_BLOCK_SIZE,
+                .setkey         = atmel_aes_setkey,
+                .encrypt        = atmel_aes_ctr_encrypt,
+                .decrypt        = atmel_aes_ctr_decrypt,
+        }
+},
+};
+static struct crypto_alg aes_cfb64_alg[] = {
+{
+        .cra_name               = "cfb64(aes)",
+        .cra_driver_name        = "atmel-cfb64-aes",
+        .cra_priority           = 100,
+        .cra_flags              = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
+        .cra_blocksize          = CFB64_BLOCK_SIZE,
+        .cra_ctxsize            = sizeof(struct atmel_aes_ctx),
+        .cra_alignmask          = 0x0,
+        .cra_type               = &crypto_ablkcipher_type,
+        .cra_module             = THIS_MODULE,
+        .cra_init               = atmel_aes_cra_init,
+        .cra_exit               = atmel_aes_cra_exit,
+        .cra_u.ablkcipher = {
+                .min_keysize    = AES_MIN_KEY_SIZE,
+                .max_keysize    = AES_MAX_KEY_SIZE,
+                .ivsize         = AES_BLOCK_SIZE,
+                .setkey         = atmel_aes_setkey,
+                .encrypt        = atmel_aes_cfb64_encrypt,
+                .decrypt        = atmel_aes_cfb64_decrypt,
+        }
+},
+};
+static void atmel_aes_queue_task(unsigned long data)
+{
+        struct atmel_aes_dev *dd = (struct atmel_aes_dev *)data;
+        atmel_aes_handle_queue(dd, NULL);
+}
+static void atmel_aes_done_task(unsigned long data)
+{
+        struct atmel_aes_dev *dd = (struct atmel_aes_dev *) data;
+        int err;
+        if (!(dd->flags & AES_FLAGS_DMA)) {
+                atmel_aes_read_n(dd, AES_ODATAR(0), (u32 *) dd->buf_out,
+                                dd->bufcnt >> 2);
+                if (sg_copy_from_buffer(dd->out_sg, dd->nb_out_sg,
+                        dd->buf_out, dd->bufcnt))
+                        err = 0;
+                else
+                        err = -EINVAL;
+                goto cpu_end;
+        }
+        err = atmel_aes_crypt_dma_stop(dd);
+        err = dd->err ? : err;
+        if (dd->total && !err) {
+                err = atmel_aes_crypt_dma_start(dd);
+                if (!err)
+                        return; /* DMA started. Not fininishing. */
+        }
+cpu_end:
+        atmel_aes_finish_req(dd, err);
+        atmel_aes_handle_queue(dd, NULL);
+}
+static irqreturn_t atmel_aes_irq(int irq, void *dev_id)
+{
+        struct atmel_aes_dev *aes_dd = dev_id;
+        u32 reg;
+        reg = atmel_aes_read(aes_dd, AES_ISR);
+        if (reg & atmel_aes_read(aes_dd, AES_IMR)) {
+                atmel_aes_write(aes_dd, AES_IDR, reg);
+                if (AES_FLAGS_BUSY & aes_dd->flags)
+                        tasklet_schedule(&aes_dd->done_task);
+                else
+                        dev_warn(aes_dd->dev, "AES interrupt when no active requests.\n");
+                return IRQ_HANDLED;
+        }
+        return IRQ_NONE;
+}
+static void atmel_aes_unregister_algs(struct atmel_aes_dev *dd)
+{
+        int i;
+        for (i = 0; i < ARRAY_SIZE(aes_algs); i++)
+                crypto_unregister_alg(&aes_algs[i]);
+        if (dd->hw_version >= 0x130)
+                crypto_unregister_alg(&aes_cfb64_alg[0]);
+}
+static int atmel_aes_register_algs(struct atmel_aes_dev *dd)
+{
+        int err, i, j;
+        for (i = 0; i < ARRAY_SIZE(aes_algs); i++) {
+                INIT_LIST_HEAD(&aes_algs[i].cra_list);
+                err = crypto_register_alg(&aes_algs[i]);
+                if (err)
+                        goto err_aes_algs;
+        }
+        atmel_aes_hw_version_init(dd);
+        if (dd->hw_version >= 0x130) {
+                INIT_LIST_HEAD(&aes_cfb64_alg[0].cra_list);
+                err = crypto_register_alg(&aes_cfb64_alg[0]);
+                if (err)
+                        goto err_aes_cfb64_alg;
+        }
+        return 0;
+err_aes_cfb64_alg:
+        i = ARRAY_SIZE(aes_algs);
+err_aes_algs:
+        for (j = 0; j < i; j++)
+                crypto_unregister_alg(&aes_algs[j]);
+        return err;
+}
+static int __devinit atmel_aes_probe(struct platform_device *pdev)
+{
+        struct atmel_aes_dev *aes_dd;
+        struct aes_platform_data        *pdata;
+        struct device *dev = &pdev->dev;
+        struct resource *aes_res;
+        unsigned long aes_phys_size;
+        int err;
+        pdata = pdev->dev.platform_data;
+        if (!pdata) {
+                err = -ENXIO;
+                goto aes_dd_err;
+        }
+        aes_dd = kzalloc(sizeof(struct atmel_aes_dev), GFP_KERNEL);
+        if (aes_dd == NULL) {
+                dev_err(dev, "unable to alloc data struct.\n");
+                err = -ENOMEM;
+                goto aes_dd_err;
+        }
+        aes_dd->dev = dev;
+        platform_set_drvdata(pdev, aes_dd);
+        INIT_LIST_HEAD(&aes_dd->list);
+        tasklet_init(&aes_dd->done_task, atmel_aes_done_task,
+                                        (unsigned long)aes_dd);
+        tasklet_init(&aes_dd->queue_task, atmel_aes_queue_task,
+                                        (unsigned long)aes_dd);
+        crypto_init_queue(&aes_dd->queue, ATMEL_AES_QUEUE_LENGTH);
+        aes_dd->irq = -1;
+        /* Get the base address */
+        aes_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+        if (!aes_res) {
+                dev_err(dev, "no MEM resource info\n");
+                err = -ENODEV;
+                goto res_err;
+        }
+        aes_dd->phys_base = aes_res->start;
+        aes_phys_size = resource_size(aes_res);
+        /* Get the IRQ */
+        aes_dd->irq = platform_get_irq(pdev,  0);
+        if (aes_dd->irq < 0) {
+                dev_err(dev, "no IRQ resource info\n");
+                err = aes_dd->irq;
+                goto aes_irq_err;
+        }
+        err = request_irq(aes_dd->irq, atmel_aes_irq, IRQF_SHARED, "atmel-aes",
+                                                aes_dd);
+        if (err) {
+                dev_err(dev, "unable to request aes irq.\n");
+                goto aes_irq_err;
+        }
+        /* Initializing the clock */
+        aes_dd->iclk = clk_get(&pdev->dev, NULL);
+        if (IS_ERR(aes_dd->iclk)) {
+                dev_err(dev, "clock intialization failed.\n");
+                err = PTR_ERR(aes_dd->iclk);
+                goto clk_err;
+        }
+        aes_dd->io_base = ioremap(aes_dd->phys_base, aes_phys_size);
+        if (!aes_dd->io_base) {
+                dev_err(dev, "can't ioremap\n");
+                err = -ENOMEM;
+                goto aes_io_err;
+        }
+        err = atmel_aes_dma_init(aes_dd);
+        if (err)
+                goto err_aes_dma;
+        spin_lock(&atmel_aes.lock);
+        list_add_tail(&aes_dd->list, &atmel_aes.dev_list);
+        spin_unlock(&atmel_aes.lock);
+        err = atmel_aes_register_algs(aes_dd);
+        if (err)
+                goto err_algs;
+        dev_info(dev, "Atmel AES\n");
+        return 0;
+err_algs:
+        spin_lock(&atmel_aes.lock);
+        list_del(&aes_dd->list);
+        spin_unlock(&atmel_aes.lock);
+        atmel_aes_dma_cleanup(aes_dd);
+err_aes_dma:
+        iounmap(aes_dd->io_base);
+aes_io_err:
+        clk_put(aes_dd->iclk);
+clk_err:
+        free_irq(aes_dd->irq, aes_dd);
+aes_irq_err:
+res_err:
+        tasklet_kill(&aes_dd->done_task);
+        tasklet_kill(&aes_dd->queue_task);
+        kfree(aes_dd);
+        aes_dd = NULL;
+aes_dd_err:
+        dev_err(dev, "initialization failed.\n");
+        return err;
+}
+static int __devexit atmel_aes_remove(struct platform_device *pdev)
+{
+        static struct atmel_aes_dev *aes_dd;
+        aes_dd = platform_get_drvdata(pdev);
+        if (!aes_dd)
+                return -ENODEV;
+        spin_lock(&atmel_aes.lock);
+        list_del(&aes_dd->list);
+        spin_unlock(&atmel_aes.lock);
+        atmel_aes_unregister_algs(aes_dd);
+        tasklet_kill(&aes_dd->done_task);
+        tasklet_kill(&aes_dd->queue_task);
+        atmel_aes_dma_cleanup(aes_dd);
+        iounmap(aes_dd->io_base);
+        clk_put(aes_dd->iclk);
+        if (aes_dd->irq > 0)
+                free_irq(aes_dd->irq, aes_dd);
+        kfree(aes_dd);
+        aes_dd = NULL;
+        return 0;
+}
+static struct platform_driver atmel_aes_driver = {
+        .probe          = atmel_aes_probe,
+        .remove         = __devexit_p(atmel_aes_remove),
+        .driver         = {
+                .name   = "atmel_aes",
+                .owner  = THIS_MODULE,
+        },
+};
+module_platform_driver(atmel_aes_driver);
+MODULE_DESCRIPTION("Atmel AES hw acceleration support.");
+MODULE_LICENSE("GPL v2");
+MODULE_AUTHOR("Nicolas Royer - Eukréa Electromatique");
diff --git a/drivers/crypto/atmel-sha-regs.h b/drivers/crypto/atmel-sha-regs.h
new file mode 100644
index 000000000000..dc53a20d7da1
--- /dev/null
+++ b/drivers/crypto/atmel-sha-regs.h
@@ -0,0 +1,46 @@
+#ifndef __ATMEL_SHA_REGS_H__
+#define __ATMEL_SHA_REGS_H__
+#define SHA_REG_DIGEST(x)               (0x80 + ((x) * 0x04))
+#define SHA_REG_DIN(x)                  (0x40 + ((x) * 0x04))
+#define SHA_CR                          0x00
+#define SHA_CR_START                    (1 << 0)
+#define SHA_CR_FIRST                    (1 << 4)
+#define SHA_CR_SWRST                    (1 << 8)
+#define SHA_MR                          0x04
+#define SHA_MR_MODE_MASK                (0x3 << 0)
+#define SHA_MR_MODE_MANUAL              0x0
+#define SHA_MR_MODE_AUTO                0x1
+#define SHA_MR_MODE_PDC                 0x2
+#define SHA_MR_DUALBUFF                 (1 << 3)
+#define SHA_MR_PROCDLY                  (1 << 4)
+#define SHA_MR_ALGO_SHA1                (0 << 8)
+#define SHA_MR_ALGO_SHA256              (1 << 8)
+#define SHA_IER                         0x10
+#define SHA_IDR                         0x14
+#define SHA_IMR                         0x18
+#define SHA_ISR                         0x1C
+#define SHA_INT_DATARDY                 (1 << 0)
+#define SHA_INT_ENDTX                   (1 << 1)
+#define SHA_INT_TXBUFE                  (1 << 2)
+#define SHA_INT_URAD                    (1 << 8)
+#define SHA_ISR_URAT_MASK               (0x7 << 12)
+#define SHA_ISR_URAT_IDR                (0x0 << 12)
+#define SHA_ISR_URAT_ODR                (0x1 << 12)
+#define SHA_ISR_URAT_MR                 (0x2 << 12)
+#define SHA_ISR_URAT_WO                 (0x5 << 12)
+#define SHA_TPR                         0x108
+#define SHA_TCR                         0x10C
+#define SHA_TNPR                        0x118
+#define SHA_TNCR                        0x11C
+#define SHA_PTCR                        0x120
+#define SHA_PTCR_TXTEN          (1 << 8)
+#define SHA_PTCR_TXTDIS         (1 << 9)
+#define SHA_PTSR                        0x124
+#define SHA_PTSR_TXTEN          (1 << 8)
+#endif /* __ATMEL_SHA_REGS_H__ */
diff --git a/drivers/crypto/atmel-sha.c b/drivers/crypto/atmel-sha.c
new file mode 100644
index 000000000000..f938b9d79b66
--- /dev/null
+++ b/drivers/crypto/atmel-sha.c
@@ -0,0 +1,1112 @@
+/*
+ * Cryptographic API.
+ *
+ * Support for ATMEL SHA1/SHA256 HW acceleration.
+ *
+ * Copyright (c) 2012 Eukréa Electromatique - ATMEL
+ * Author: Nicolas Royer <nicolas@eukrea.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ *
+ * Some ideas are from omap-sham.c drivers.
+ */
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/slab.h>
+#include <linux/err.h>
+#include <linux/clk.h>
+#include <linux/io.h>
+#include <linux/hw_random.h>
+#include <linux/platform_device.h>
+#include <linux/device.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/errno.h>
+#include <linux/interrupt.h>
+#include <linux/kernel.h>
+#include <linux/clk.h>
+#include <linux/irq.h>
+#include <linux/io.h>
+#include <linux/platform_device.h>
+#include <linux/scatterlist.h>
+#include <linux/dma-mapping.h>
+#include <linux/delay.h>
+#include <linux/crypto.h>
+#include <linux/cryptohash.h>
+#include <crypto/scatterwalk.h>
+#include <crypto/algapi.h>
+#include <crypto/sha.h>
+#include <crypto/hash.h>
+#include <crypto/internal/hash.h>
+#include "atmel-sha-regs.h"
+/* SHA flags */
+#define SHA_FLAGS_BUSY                  BIT(0)
+#define SHA_FLAGS_FINAL                 BIT(1)
+#define SHA_FLAGS_DMA_ACTIVE    BIT(2)
+#define SHA_FLAGS_OUTPUT_READY  BIT(3)
+#define SHA_FLAGS_INIT                  BIT(4)
+#define SHA_FLAGS_CPU                   BIT(5)
+#define SHA_FLAGS_DMA_READY             BIT(6)
+#define SHA_FLAGS_FINUP         BIT(16)
+#define SHA_FLAGS_SG            BIT(17)
+#define SHA_FLAGS_SHA1          BIT(18)
+#define SHA_FLAGS_SHA256        BIT(19)
+#define SHA_FLAGS_ERROR         BIT(20)
+#define SHA_FLAGS_PAD           BIT(21)
+#define SHA_FLAGS_DUALBUFF      BIT(24)
+#define SHA_OP_UPDATE   1
+#define SHA_OP_FINAL    2
+#define SHA_BUFFER_LEN          PAGE_SIZE
+#define ATMEL_SHA_DMA_THRESHOLD         56
+struct atmel_sha_dev;
+struct atmel_sha_reqctx {
+        struct atmel_sha_dev    *dd;
+        unsigned long   flags;
+        unsigned long   op;
+        u8      digest[SHA256_DIGEST_SIZE] __aligned(sizeof(u32));
+        size_t  digcnt;
+        size_t  bufcnt;
+        size_t  buflen;
+        dma_addr_t      dma_addr;
+        /* walk state */
+        struct scatterlist      *sg;
+        unsigned int    offset; /* offset in current sg */
+        unsigned int    total;  /* total request */
+        u8      buffer[0] __aligned(sizeof(u32));
+};
+struct atmel_sha_ctx {
+        struct atmel_sha_dev    *dd;
+        unsigned long           flags;
+        /* fallback stuff */
+        struct crypto_shash     *fallback;
+};
+#define ATMEL_SHA_QUEUE_LENGTH  1
+struct atmel_sha_dev {
+        struct list_head        list;
+        unsigned long           phys_base;
+        struct device           *dev;
+        struct clk                      *iclk;
+        int                                     irq;
+        void __iomem            *io_base;
+        spinlock_t              lock;
+        int                     err;
+        struct tasklet_struct   done_task;
+        unsigned long           flags;
+        struct crypto_queue     queue;
+        struct ahash_request    *req;
+};
+struct atmel_sha_drv {
+        struct list_head        dev_list;
+        spinlock_t              lock;
+};
+static struct atmel_sha_drv atmel_sha = {
+        .dev_list = LIST_HEAD_INIT(atmel_sha.dev_list),
+        .lock = __SPIN_LOCK_UNLOCKED(atmel_sha.lock),
+};
+static inline u32 atmel_sha_read(struct atmel_sha_dev *dd, u32 offset)
+{
+        return readl_relaxed(dd->io_base + offset);
+}
+static inline void atmel_sha_write(struct atmel_sha_dev *dd,
+                                        u32 offset, u32 value)
+{
+        writel_relaxed(value, dd->io_base + offset);
+}
+static void atmel_sha_dualbuff_test(struct atmel_sha_dev *dd)
+{
+        atmel_sha_write(dd, SHA_MR, SHA_MR_DUALBUFF);
+        if (atmel_sha_read(dd, SHA_MR) & SHA_MR_DUALBUFF)
+                dd->flags |= SHA_FLAGS_DUALBUFF;
+}
+static size_t atmel_sha_append_sg(struct atmel_sha_reqctx *ctx)
+{
+        size_t count;
+        while ((ctx->bufcnt < ctx->buflen) && ctx->total) {
+                count = min(ctx->sg->length - ctx->offset, ctx->total);
+                count = min(count, ctx->buflen - ctx->bufcnt);
+                if (count <= 0)
+                        break;
+                scatterwalk_map_and_copy(ctx->buffer + ctx->bufcnt, ctx->sg,
+                        ctx->offset, count, 0);
+                ctx->bufcnt += count;
+                ctx->offset += count;
+                ctx->total -= count;
+                if (ctx->offset == ctx->sg->length) {
+                        ctx->sg = sg_next(ctx->sg);
+                        if (ctx->sg)
+                                ctx->offset = 0;
+                        else
+                                ctx->total = 0;
+                }
+        }
+        return 0;
+}
+/*
+ * The purpose of this padding is to ensure that the padded message
+ * is a multiple of 512 bits. The bit "1" is appended at the end of
+ * the message followed by "padlen-1" zero bits. Then a 64 bits block
+ * equals to the message length in bits is appended.
+ *
+ * padlen is calculated as followed:
+ *  - if message length < 56 bytes then padlen = 56 - message length
+ *  - else padlen = 64 + 56 - message length
+ */
+static void atmel_sha_fill_padding(struct atmel_sha_reqctx *ctx, int length)
+{
+        unsigned int index, padlen;
+        u64 bits;
+        u64 size;
+        bits = (ctx->bufcnt + ctx->digcnt + length) << 3;
+        size = cpu_to_be64(bits);
+        index = ctx->bufcnt & 0x3f;
+        padlen = (index < 56) ? (56 - index) : ((64+56) - index);
+        *(ctx->buffer + ctx->bufcnt) = 0x80;
+        memset(ctx->buffer + ctx->bufcnt + 1, 0, padlen-1);
+        memcpy(ctx->buffer + ctx->bufcnt + padlen, &size, 8);
+        ctx->bufcnt += padlen + 8;
+        ctx->flags |= SHA_FLAGS_PAD;
+}
+static int atmel_sha_init(struct ahash_request *req)
+{
+        struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
+        struct atmel_sha_ctx *tctx = crypto_ahash_ctx(tfm);
+        struct atmel_sha_reqctx *ctx = ahash_request_ctx(req);
+        struct atmel_sha_dev *dd = NULL;
+        struct atmel_sha_dev *tmp;
+        spin_lock_bh(&atmel_sha.lock);
+        if (!tctx->dd) {
+                list_for_each_entry(tmp, &atmel_sha.dev_list, list) {
+                        dd = tmp;
+                        break;
+                }
+                tctx->dd = dd;
+        } else {
+                dd = tctx->dd;
+        }
+        spin_unlock_bh(&atmel_sha.lock);
+        ctx->dd = dd;
+        ctx->flags = 0;
+        dev_dbg(dd->dev, "init: digest size: %d\n",
+                crypto_ahash_digestsize(tfm));
+        if (crypto_ahash_digestsize(tfm) == SHA1_DIGEST_SIZE)
+                ctx->flags |= SHA_FLAGS_SHA1;
+        else if (crypto_ahash_digestsize(tfm) == SHA256_DIGEST_SIZE)
+                ctx->flags |= SHA_FLAGS_SHA256;
+        ctx->bufcnt = 0;
+        ctx->digcnt = 0;
+        ctx->buflen = SHA_BUFFER_LEN;
+        return 0;
+}
+static void atmel_sha_write_ctrl(struct atmel_sha_dev *dd, int dma)
+{
+        struct atmel_sha_reqctx *ctx = ahash_request_ctx(dd->req);
+        u32 valcr = 0, valmr = SHA_MR_MODE_AUTO;
+        if (likely(dma)) {
+                atmel_sha_write(dd, SHA_IER, SHA_INT_TXBUFE);
+                valmr = SHA_MR_MODE_PDC;
+                if (dd->flags & SHA_FLAGS_DUALBUFF)
+                        valmr = SHA_MR_DUALBUFF;
+        } else {
+                atmel_sha_write(dd, SHA_IER, SHA_INT_DATARDY);
+        }
+        if (ctx->flags & SHA_FLAGS_SHA256)
+                valmr |= SHA_MR_ALGO_SHA256;
+        /* Setting CR_FIRST only for the first iteration */
+        if (!ctx->digcnt)
+                valcr = SHA_CR_FIRST;
+        atmel_sha_write(dd, SHA_CR, valcr);
+        atmel_sha_write(dd, SHA_MR, valmr);
+}
+static int atmel_sha_xmit_cpu(struct atmel_sha_dev *dd, const u8 *buf,
+                              size_t length, int final)
+{
+        struct atmel_sha_reqctx *ctx = ahash_request_ctx(dd->req);
+        int count, len32;
+        const u32 *buffer = (const u32 *)buf;
+        dev_dbg(dd->dev, "xmit_cpu: digcnt: %d, length: %d, final: %d\n",
+                                                ctx->digcnt, length, final);
+        atmel_sha_write_ctrl(dd, 0);
+        /* should be non-zero before next lines to disable clocks later */
+        ctx->digcnt += length;
+        if (final)
+                dd->flags |= SHA_FLAGS_FINAL; /* catch last interrupt */
+        len32 = DIV_ROUND_UP(length, sizeof(u32));
+        dd->flags |= SHA_FLAGS_CPU;
+        for (count = 0; count < len32; count++)
+                atmel_sha_write(dd, SHA_REG_DIN(count), buffer[count]);
+        return -EINPROGRESS;
+}
+static int atmel_sha_xmit_pdc(struct atmel_sha_dev *dd, dma_addr_t dma_addr1,
+                size_t length1, dma_addr_t dma_addr2, size_t length2, int final)
+{
+        struct atmel_sha_reqctx *ctx = ahash_request_ctx(dd->req);
+        int len32;
+        dev_dbg(dd->dev, "xmit_pdc: digcnt: %d, length: %d, final: %d\n",
+                                                ctx->digcnt, length1, final);
+        len32 = DIV_ROUND_UP(length1, sizeof(u32));
+        atmel_sha_write(dd, SHA_PTCR, SHA_PTCR_TXTDIS);
+        atmel_sha_write(dd, SHA_TPR, dma_addr1);
+        atmel_sha_write(dd, SHA_TCR, len32);
+        len32 = DIV_ROUND_UP(length2, sizeof(u32));
+        atmel_sha_write(dd, SHA_TNPR, dma_addr2);
+        atmel_sha_write(dd, SHA_TNCR, len32);
+        atmel_sha_write_ctrl(dd, 1);
+        /* should be non-zero before next lines to disable clocks later */
+        ctx->digcnt += length1;
+        if (final)
+                dd->flags |= SHA_FLAGS_FINAL; /* catch last interrupt */
+        dd->flags |=  SHA_FLAGS_DMA_ACTIVE;
+        /* Start DMA transfer */
+        atmel_sha_write(dd, SHA_PTCR, SHA_PTCR_TXTEN);
+        return -EINPROGRESS;
+}
+static int atmel_sha_update_cpu(struct atmel_sha_dev *dd)
+{
+        struct atmel_sha_reqctx *ctx = ahash_request_ctx(dd->req);
+        int bufcnt;
+        atmel_sha_append_sg(ctx);
+        atmel_sha_fill_padding(ctx, 0);
+        bufcnt = ctx->bufcnt;
+        ctx->bufcnt = 0;
+        return atmel_sha_xmit_cpu(dd, ctx->buffer, bufcnt, 1);
+}
+static int atmel_sha_xmit_dma_map(struct atmel_sha_dev *dd,
+                                        struct atmel_sha_reqctx *ctx,
+                                        size_t length, int final)
+{
+        ctx->dma_addr = dma_map_single(dd->dev, ctx->buffer,
+                                ctx->buflen + SHA1_BLOCK_SIZE, DMA_TO_DEVICE);
+        if (dma_mapping_error(dd->dev, ctx->dma_addr)) {
+                dev_err(dd->dev, "dma %u bytes error\n", ctx->buflen +
+                                SHA1_BLOCK_SIZE);
+                return -EINVAL;
+        }
+        ctx->flags &= ~SHA_FLAGS_SG;
+        /* next call does not fail... so no unmap in the case of error */
+        return atmel_sha_xmit_pdc(dd, ctx->dma_addr, length, 0, 0, final);
+}
+static int atmel_sha_update_dma_slow(struct atmel_sha_dev *dd)
+{
+        struct atmel_sha_reqctx *ctx = ahash_request_ctx(dd->req);
+        unsigned int final;
+        size_t count;
+        atmel_sha_append_sg(ctx);
+        final = (ctx->flags & SHA_FLAGS_FINUP) && !ctx->total;
+        dev_dbg(dd->dev, "slow: bufcnt: %u, digcnt: %d, final: %d\n",
+                                         ctx->bufcnt, ctx->digcnt, final);
+        if (final)
+                atmel_sha_fill_padding(ctx, 0);
+        if (final || (ctx->bufcnt == ctx->buflen && ctx->total)) {
+                count = ctx->bufcnt;
+                ctx->bufcnt = 0;
+                return atmel_sha_xmit_dma_map(dd, ctx, count, final);
+        }
+        return 0;
+}
+static int atmel_sha_update_dma_start(struct atmel_sha_dev *dd)
+{
+        struct atmel_sha_reqctx *ctx = ahash_request_ctx(dd->req);
+        unsigned int length, final, tail;
+        struct scatterlist *sg;
+        unsigned int count;
+        if (!ctx->total)
+                return 0;
+        if (ctx->bufcnt || ctx->offset)
+                return atmel_sha_update_dma_slow(dd);
+        dev_dbg(dd->dev, "fast: digcnt: %d, bufcnt: %u, total: %u\n",
+                        ctx->digcnt, ctx->bufcnt, ctx->total);
+        sg = ctx->sg;
+        if (!IS_ALIGNED(sg->offset, sizeof(u32)))
+                return atmel_sha_update_dma_slow(dd);
+        if (!sg_is_last(sg) && !IS_ALIGNED(sg->length, SHA1_BLOCK_SIZE))
+                /* size is not SHA1_BLOCK_SIZE aligned */
+                return atmel_sha_update_dma_slow(dd);
+        length = min(ctx->total, sg->length);
+        if (sg_is_last(sg)) {
+                if (!(ctx->flags & SHA_FLAGS_FINUP)) {
+                        /* not last sg must be SHA1_BLOCK_SIZE aligned */
+                        tail = length & (SHA1_BLOCK_SIZE - 1);
+                        length -= tail;
+                        if (length == 0) {
+                                /* offset where to start slow */
+                                ctx->offset = length;
+                                return atmel_sha_update_dma_slow(dd);
+                        }
+                }
+        }
+        ctx->total -= length;
+        ctx->offset = length; /* offset where to start slow */
+        final = (ctx->flags & SHA_FLAGS_FINUP) && !ctx->total;
+        /* Add padding */
+        if (final) {
+                tail = length & (SHA1_BLOCK_SIZE - 1);
+                length -= tail;
+                ctx->total += tail;
+                ctx->offset = length; /* offset where to start slow */
+                sg = ctx->sg;
+                atmel_sha_append_sg(ctx);
+                atmel_sha_fill_padding(ctx, length);
+                ctx->dma_addr = dma_map_single(dd->dev, ctx->buffer,
+                        ctx->buflen + SHA1_BLOCK_SIZE, DMA_TO_DEVICE);
+                if (dma_mapping_error(dd->dev, ctx->dma_addr)) {
+                        dev_err(dd->dev, "dma %u bytes error\n",
+                                ctx->buflen + SHA1_BLOCK_SIZE);
+                        return -EINVAL;
+                }
+                if (length == 0) {
+                        ctx->flags &= ~SHA_FLAGS_SG;
+                        count = ctx->bufcnt;
+                        ctx->bufcnt = 0;
+                        return atmel_sha_xmit_pdc(dd, ctx->dma_addr, count, 0,
+                                        0, final);
+                } else {
+                        ctx->sg = sg;
+                        if (!dma_map_sg(dd->dev, ctx->sg, 1,
+                                DMA_TO_DEVICE)) {
+                                        dev_err(dd->dev, "dma_map_sg  error\n");
+                                        return -EINVAL;
+                        }
+                        ctx->flags |= SHA_FLAGS_SG;
+                        count = ctx->bufcnt;
+                        ctx->bufcnt = 0;
+                        return atmel_sha_xmit_pdc(dd, sg_dma_address(ctx->sg),
+                                        length, ctx->dma_addr, count, final);
+                }
+        }
+        if (!dma_map_sg(dd->dev, ctx->sg, 1, DMA_TO_DEVICE)) {
+                dev_err(dd->dev, "dma_map_sg  error\n");
+                return -EINVAL;
+        }
+        ctx->flags |= SHA_FLAGS_SG;
+        /* next call does not fail... so no unmap in the case of error */
+        return atmel_sha_xmit_pdc(dd, sg_dma_address(ctx->sg), length, 0,
+                                                                0, final);
+}
+static int atmel_sha_update_dma_stop(struct atmel_sha_dev *dd)
+{
+        struct atmel_sha_reqctx *ctx = ahash_request_ctx(dd->req);
+        if (ctx->flags & SHA_FLAGS_SG) {
+                dma_unmap_sg(dd->dev, ctx->sg, 1, DMA_TO_DEVICE);
+                if (ctx->sg->length == ctx->offset) {
+                        ctx->sg = sg_next(ctx->sg);
+                        if (ctx->sg)
+                                ctx->offset = 0;
+                }
+                if (ctx->flags & SHA_FLAGS_PAD)
+                        dma_unmap_single(dd->dev, ctx->dma_addr,
+                                ctx->buflen + SHA1_BLOCK_SIZE, DMA_TO_DEVICE);
+        } else {
+                dma_unmap_single(dd->dev, ctx->dma_addr, ctx->buflen +
+                                                SHA1_BLOCK_SIZE, DMA_TO_DEVICE);
+        }
+        return 0;
+}
+static int atmel_sha_update_req(struct atmel_sha_dev *dd)
+{
+        struct ahash_request *req = dd->req;
+        struct atmel_sha_reqctx *ctx = ahash_request_ctx(req);
+        int err;
+        dev_dbg(dd->dev, "update_req: total: %u, digcnt: %d, finup: %d\n",
+                 ctx->total, ctx->digcnt, (ctx->flags & SHA_FLAGS_FINUP) != 0);
+        if (ctx->flags & SHA_FLAGS_CPU)
+                err = atmel_sha_update_cpu(dd);
+        else
+                err = atmel_sha_update_dma_start(dd);
+        /* wait for dma completion before can take more data */
+        dev_dbg(dd->dev, "update: err: %d, digcnt: %d\n",
+                        err, ctx->digcnt);
+        return err;
+}
+static int atmel_sha_final_req(struct atmel_sha_dev *dd)
+{
+        struct ahash_request *req = dd->req;
+        struct atmel_sha_reqctx *ctx = ahash_request_ctx(req);
+        int err = 0;
+        int count;
+        if (ctx->bufcnt >= ATMEL_SHA_DMA_THRESHOLD) {
+                atmel_sha_fill_padding(ctx, 0);
+                count = ctx->bufcnt;
+                ctx->bufcnt = 0;
+                err = atmel_sha_xmit_dma_map(dd, ctx, count, 1);
+        }
+        /* faster to handle last block with cpu */
+        else {
+                atmel_sha_fill_padding(ctx, 0);
+                count = ctx->bufcnt;
+                ctx->bufcnt = 0;
+                err = atmel_sha_xmit_cpu(dd, ctx->buffer, count, 1);
+        }
+        dev_dbg(dd->dev, "final_req: err: %d\n", err);
+        return err;
+}
+static void atmel_sha_copy_hash(struct ahash_request *req)
+{
+        struct atmel_sha_reqctx *ctx = ahash_request_ctx(req);
+        u32 *hash = (u32 *)ctx->digest;
+        int i;
+        if (likely(ctx->flags & SHA_FLAGS_SHA1))
+                for (i = 0; i < SHA1_DIGEST_SIZE / sizeof(u32); i++)
+                        hash[i] = atmel_sha_read(ctx->dd, SHA_REG_DIGEST(i));
+        else
+                for (i = 0; i < SHA256_DIGEST_SIZE / sizeof(u32); i++)
+                        hash[i] = atmel_sha_read(ctx->dd, SHA_REG_DIGEST(i));
+}
+static void atmel_sha_copy_ready_hash(struct ahash_request *req)
+{
+        struct atmel_sha_reqctx *ctx = ahash_request_ctx(req);
+        if (!req->result)
+                return;
+        if (likely(ctx->flags & SHA_FLAGS_SHA1))
+                memcpy(req->result, ctx->digest, SHA1_DIGEST_SIZE);
+        else
+                memcpy(req->result, ctx->digest, SHA256_DIGEST_SIZE);
+}
+static int atmel_sha_finish(struct ahash_request *req)
+{
+        struct atmel_sha_reqctx *ctx = ahash_request_ctx(req);
+        struct atmel_sha_dev *dd = ctx->dd;
+        int err = 0;
+        if (ctx->digcnt)
+                atmel_sha_copy_ready_hash(req);
+        dev_dbg(dd->dev, "digcnt: %d, bufcnt: %d\n", ctx->digcnt,
+                ctx->bufcnt);
+        return err;
+}
+static void atmel_sha_finish_req(struct ahash_request *req, int err)
+{
+        struct atmel_sha_reqctx *ctx = ahash_request_ctx(req);
+        struct atmel_sha_dev *dd = ctx->dd;
+        if (!err) {
+                atmel_sha_copy_hash(req);
+                if (SHA_FLAGS_FINAL & dd->flags)
+                        err = atmel_sha_finish(req);
+        } else {
+                ctx->flags |= SHA_FLAGS_ERROR;
+        }
+        /* atomic operation is not needed here */
+        dd->flags &= ~(SHA_FLAGS_BUSY | SHA_FLAGS_FINAL | SHA_FLAGS_CPU |
+                        SHA_FLAGS_DMA_READY | SHA_FLAGS_OUTPUT_READY);
+        clk_disable_unprepare(dd->iclk);
+        if (req->base.complete)
+                req->base.complete(&req->base, err);
+        /* handle new request */
+        tasklet_schedule(&dd->done_task);
+}
+static int atmel_sha_hw_init(struct atmel_sha_dev *dd)
+{
+        clk_prepare_enable(dd->iclk);
+        if (SHA_FLAGS_INIT & dd->flags) {
+                atmel_sha_write(dd, SHA_CR, SHA_CR_SWRST);
+                atmel_sha_dualbuff_test(dd);
+                dd->flags |= SHA_FLAGS_INIT;
+                dd->err = 0;
+        }
+        return 0;
+}
+static int atmel_sha_handle_queue(struct atmel_sha_dev *dd,
+                                  struct ahash_request *req)
+{
+        struct crypto_async_request *async_req, *backlog;
+        struct atmel_sha_reqctx *ctx;
+        unsigned long flags;
+        int err = 0, ret = 0;
+        spin_lock_irqsave(&dd->lock, flags);
+        if (req)
+                ret = ahash_enqueue_request(&dd->queue, req);
+        if (SHA_FLAGS_BUSY & dd->flags) {
+                spin_unlock_irqrestore(&dd->lock, flags);
+                return ret;
+        }
+        backlog = crypto_get_backlog(&dd->queue);
+        async_req = crypto_dequeue_request(&dd->queue);
+        if (async_req)
+                dd->flags |= SHA_FLAGS_BUSY;
+        spin_unlock_irqrestore(&dd->lock, flags);
+        if (!async_req)
+                return ret;
+        if (backlog)
+                backlog->complete(backlog, -EINPROGRESS);
+        req = ahash_request_cast(async_req);
+        dd->req = req;
+        ctx = ahash_request_ctx(req);
+        dev_dbg(dd->dev, "handling new req, op: %lu, nbytes: %d\n",
+                                                ctx->op, req->nbytes);
+        err = atmel_sha_hw_init(dd);
+        if (err)
+                goto err1;
+        if (ctx->op == SHA_OP_UPDATE) {
+                err = atmel_sha_update_req(dd);
+                if (err != -EINPROGRESS && (ctx->flags & SHA_FLAGS_FINUP)) {
+                        /* no final() after finup() */
+                        err = atmel_sha_final_req(dd);
+                }
+        } else if (ctx->op == SHA_OP_FINAL) {
+                err = atmel_sha_final_req(dd);
+        }
+err1:
+        if (err != -EINPROGRESS)
+                /* done_task will not finish it, so do it here */
+                atmel_sha_finish_req(req, err);
+        dev_dbg(dd->dev, "exit, err: %d\n", err);
+        return ret;
+}
+static int atmel_sha_enqueue(struct ahash_request *req, unsigned int op)
+{
+        struct atmel_sha_reqctx *ctx = ahash_request_ctx(req);
+        struct atmel_sha_ctx *tctx = crypto_tfm_ctx(req->base.tfm);
+        struct atmel_sha_dev *dd = tctx->dd;
+        ctx->op = op;
+        return atmel_sha_handle_queue(dd, req);
+}
+static int atmel_sha_update(struct ahash_request *req)
+{
+        struct atmel_sha_reqctx *ctx = ahash_request_ctx(req);
+        if (!req->nbytes)
+                return 0;
+        ctx->total = req->nbytes;
+        ctx->sg = req->src;
+        ctx->offset = 0;
+        if (ctx->flags & SHA_FLAGS_FINUP) {
+                if (ctx->bufcnt + ctx->total < ATMEL_SHA_DMA_THRESHOLD)
+                        /* faster to use CPU for short transfers */
+                        ctx->flags |= SHA_FLAGS_CPU;
+        } else if (ctx->bufcnt + ctx->total < ctx->buflen) {
+                atmel_sha_append_sg(ctx);
+                return 0;
+        }
+        return atmel_sha_enqueue(req, SHA_OP_UPDATE);
+}
+static int atmel_sha_final(struct ahash_request *req)
+{
+        struct atmel_sha_reqctx *ctx = ahash_request_ctx(req);
+        struct atmel_sha_ctx *tctx = crypto_tfm_ctx(req->base.tfm);
+        struct atmel_sha_dev *dd = tctx->dd;
+        int err = 0;
+        ctx->flags |= SHA_FLAGS_FINUP;
+        if (ctx->flags & SHA_FLAGS_ERROR)
+                return 0; /* uncompleted hash is not needed */
+        if (ctx->bufcnt) {
+                return atmel_sha_enqueue(req, SHA_OP_FINAL);
+        } else if (!(ctx->flags & SHA_FLAGS_PAD)) { /* add padding */
+                err = atmel_sha_hw_init(dd);
+                if (err)
+                        goto err1;
+                dd->flags |= SHA_FLAGS_BUSY;
+                err = atmel_sha_final_req(dd);
+        } else {
+                /* copy ready hash (+ finalize hmac) */
+                return atmel_sha_finish(req);
+        }
+err1:
+        if (err != -EINPROGRESS)
+                /* done_task will not finish it, so do it here */
+                atmel_sha_finish_req(req, err);
+        return err;
+}
+static int atmel_sha_finup(struct ahash_request *req)
+{
+        struct atmel_sha_reqctx *ctx = ahash_request_ctx(req);
+        int err1, err2;
+        ctx->flags |= SHA_FLAGS_FINUP;
+        err1 = atmel_sha_update(req);
+        if (err1 == -EINPROGRESS || err1 == -EBUSY)
+                return err1;
+        /*
+         * final() has to be always called to cleanup resources
+         * even if udpate() failed, except EINPROGRESS
+         */
+        err2 = atmel_sha_final(req);
+        return err1 ?: err2;
+}
+static int atmel_sha_digest(struct ahash_request *req)
+{
+        return atmel_sha_init(req) ?: atmel_sha_finup(req);
+}
+static int atmel_sha_cra_init_alg(struct crypto_tfm *tfm, const char *alg_base)
+{
+        struct atmel_sha_ctx *tctx = crypto_tfm_ctx(tfm);
+        const char *alg_name = crypto_tfm_alg_name(tfm);
+        /* Allocate a fallback and abort if it failed. */
+        tctx->fallback = crypto_alloc_shash(alg_name, 0,
+                                            CRYPTO_ALG_NEED_FALLBACK);
+        if (IS_ERR(tctx->fallback)) {
+                pr_err("atmel-sha: fallback driver '%s' could not be loaded.\n",
+                                alg_name);
+                return PTR_ERR(tctx->fallback);
+        }
+        crypto_ahash_set_reqsize(__crypto_ahash_cast(tfm),
+                                 sizeof(struct atmel_sha_reqctx) +
+                                 SHA_BUFFER_LEN + SHA256_BLOCK_SIZE);
+        return 0;
+}
+static int atmel_sha_cra_init(struct crypto_tfm *tfm)
+{
+        return atmel_sha_cra_init_alg(tfm, NULL);
+}
+static void atmel_sha_cra_exit(struct crypto_tfm *tfm)
+{
+        struct atmel_sha_ctx *tctx = crypto_tfm_ctx(tfm);
+        crypto_free_shash(tctx->fallback);
+        tctx->fallback = NULL;
+}
+static struct ahash_alg sha_algs[] = {
+{
+        .init           = atmel_sha_init,
+        .update         = atmel_sha_update,
+        .final          = atmel_sha_final,
+        .finup          = atmel_sha_finup,
+        .digest         = atmel_sha_digest,
+        .halg = {
+                .digestsize     = SHA1_DIGEST_SIZE,
+                .base   = {
+                        .cra_name               = "sha1",
+                        .cra_driver_name        = "atmel-sha1",
+                        .cra_priority           = 100,
+                        .cra_flags              = CRYPTO_ALG_ASYNC |
+                                                CRYPTO_ALG_NEED_FALLBACK,
+                        .cra_blocksize          = SHA1_BLOCK_SIZE,
+                        .cra_ctxsize            = sizeof(struct atmel_sha_ctx),
+                        .cra_alignmask          = 0,
+                        .cra_module             = THIS_MODULE,
+                        .cra_init               = atmel_sha_cra_init,
+                        .cra_exit               = atmel_sha_cra_exit,
+                }
+        }
+},
+{
+        .init           = atmel_sha_init,
+        .update         = atmel_sha_update,
+        .final          = atmel_sha_final,
+        .finup          = atmel_sha_finup,
+        .digest         = atmel_sha_digest,
+        .halg = {
+                .digestsize     = SHA256_DIGEST_SIZE,
+                .base   = {
+                        .cra_name               = "sha256",
+                        .cra_driver_name        = "atmel-sha256",
+                        .cra_priority           = 100,
+                        .cra_flags              = CRYPTO_ALG_ASYNC |
+                                                CRYPTO_ALG_NEED_FALLBACK,
+                        .cra_blocksize          = SHA256_BLOCK_SIZE,
+                        .cra_ctxsize            = sizeof(struct atmel_sha_ctx),
+                        .cra_alignmask          = 0,
+                        .cra_module             = THIS_MODULE,
+                        .cra_init               = atmel_sha_cra_init,
+                        .cra_exit               = atmel_sha_cra_exit,
+                }
+        }
+},
+};
+static void atmel_sha_done_task(unsigned long data)
+{
+        struct atmel_sha_dev *dd = (struct atmel_sha_dev *)data;
+        int err = 0;
+        if (!(SHA_FLAGS_BUSY & dd->flags)) {
+                atmel_sha_handle_queue(dd, NULL);
+                return;
+        }
+        if (SHA_FLAGS_CPU & dd->flags) {
+                if (SHA_FLAGS_OUTPUT_READY & dd->flags) {
+                        dd->flags &= ~SHA_FLAGS_OUTPUT_READY;
+                        goto finish;
+                }
+        } else if (SHA_FLAGS_DMA_READY & dd->flags) {
+                if (SHA_FLAGS_DMA_ACTIVE & dd->flags) {
+                        dd->flags &= ~SHA_FLAGS_DMA_ACTIVE;
+                        atmel_sha_update_dma_stop(dd);
+                        if (dd->err) {
+                                err = dd->err;
+                                goto finish;
+                        }
+                }
+                if (SHA_FLAGS_OUTPUT_READY & dd->flags) {
+                        /* hash or semi-hash ready */
+                        dd->flags &= ~(SHA_FLAGS_DMA_READY |
+                                                SHA_FLAGS_OUTPUT_READY);
+                        err = atmel_sha_update_dma_start(dd);
+                        if (err != -EINPROGRESS)
+                                goto finish;
+                }
+        }
+        return;
+finish:
+        /* finish curent request */
+        atmel_sha_finish_req(dd->req, err);
+}
+static irqreturn_t atmel_sha_irq(int irq, void *dev_id)
+{
+        struct atmel_sha_dev *sha_dd = dev_id;
+        u32 reg;
+        reg = atmel_sha_read(sha_dd, SHA_ISR);
+        if (reg & atmel_sha_read(sha_dd, SHA_IMR)) {
+                atmel_sha_write(sha_dd, SHA_IDR, reg);
+                if (SHA_FLAGS_BUSY & sha_dd->flags) {
+                        sha_dd->flags |= SHA_FLAGS_OUTPUT_READY;
+                        if (!(SHA_FLAGS_CPU & sha_dd->flags))
+                                sha_dd->flags |= SHA_FLAGS_DMA_READY;
+                        tasklet_schedule(&sha_dd->done_task);
+                } else {
+                        dev_warn(sha_dd->dev, "SHA interrupt when no active requests.\n");
+                }
+                return IRQ_HANDLED;
+        }
+        return IRQ_NONE;
+}
+static void atmel_sha_unregister_algs(struct atmel_sha_dev *dd)
+{
+        int i;
+        for (i = 0; i < ARRAY_SIZE(sha_algs); i++)
+                crypto_unregister_ahash(&sha_algs[i]);
+}
+static int atmel_sha_register_algs(struct atmel_sha_dev *dd)
+{
+        int err, i, j;
+        for (i = 0; i < ARRAY_SIZE(sha_algs); i++) {
+                err = crypto_register_ahash(&sha_algs[i]);
+                if (err)
+                        goto err_sha_algs;
+        }
+        return 0;
+err_sha_algs:
+        for (j = 0; j < i; j++)
+                crypto_unregister_ahash(&sha_algs[j]);
+        return err;
+}
+static int __devinit atmel_sha_probe(struct platform_device *pdev)
+{
+        struct atmel_sha_dev *sha_dd;
+        struct device *dev = &pdev->dev;
+        struct resource *sha_res;
+        unsigned long sha_phys_size;
+        int err;
+        sha_dd = kzalloc(sizeof(struct atmel_sha_dev), GFP_KERNEL);
+        if (sha_dd == NULL) {
+                dev_err(dev, "unable to alloc data struct.\n");
+                err = -ENOMEM;
+                goto sha_dd_err;
+        }
+        sha_dd->dev = dev;
+        platform_set_drvdata(pdev, sha_dd);
+        INIT_LIST_HEAD(&sha_dd->list);
+        tasklet_init(&sha_dd->done_task, atmel_sha_done_task,
+                                        (unsigned long)sha_dd);
+        crypto_init_queue(&sha_dd->queue, ATMEL_SHA_QUEUE_LENGTH);
+        sha_dd->irq = -1;
+        /* Get the base address */
+        sha_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+        if (!sha_res) {
+                dev_err(dev, "no MEM resource info\n");
+                err = -ENODEV;
+                goto res_err;
+        }
+        sha_dd->phys_base = sha_res->start;
+        sha_phys_size = resource_size(sha_res);
+        /* Get the IRQ */
+        sha_dd->irq = platform_get_irq(pdev,  0);
+        if (sha_dd->irq < 0) {
+                dev_err(dev, "no IRQ resource info\n");
+                err = sha_dd->irq;
+                goto res_err;
+        }
+        err = request_irq(sha_dd->irq, atmel_sha_irq, IRQF_SHARED, "atmel-sha",
+                                                sha_dd);
+        if (err) {
+                dev_err(dev, "unable to request sha irq.\n");
+                goto res_err;
+        }
+        /* Initializing the clock */
+        sha_dd->iclk = clk_get(&pdev->dev, NULL);
+        if (IS_ERR(sha_dd->iclk)) {
+                dev_err(dev, "clock intialization failed.\n");
+                err = PTR_ERR(sha_dd->iclk);
+                goto clk_err;
+        }
+        sha_dd->io_base = ioremap(sha_dd->phys_base, sha_phys_size);
+        if (!sha_dd->io_base) {
+                dev_err(dev, "can't ioremap\n");
+                err = -ENOMEM;
+                goto sha_io_err;
+        }
+        spin_lock(&atmel_sha.lock);
+        list_add_tail(&sha_dd->list, &atmel_sha.dev_list);
+        spin_unlock(&atmel_sha.lock);
+        err = atmel_sha_register_algs(sha_dd);
+        if (err)
+                goto err_algs;
+        dev_info(dev, "Atmel SHA1/SHA256\n");
+        return 0;
+err_algs:
+        spin_lock(&atmel_sha.lock);
+        list_del(&sha_dd->list);
+        spin_unlock(&atmel_sha.lock);
+        iounmap(sha_dd->io_base);
+sha_io_err:
+        clk_put(sha_dd->iclk);
+clk_err:
+        free_irq(sha_dd->irq, sha_dd);
+res_err:
+        tasklet_kill(&sha_dd->done_task);
+        kfree(sha_dd);
+        sha_dd = NULL;
+sha_dd_err:
+        dev_err(dev, "initialization failed.\n");
+        return err;
+}
+static int __devexit atmel_sha_remove(struct platform_device *pdev)
+{
+        static struct atmel_sha_dev *sha_dd;
+        sha_dd = platform_get_drvdata(pdev);
+        if (!sha_dd)
+                return -ENODEV;
+        spin_lock(&atmel_sha.lock);
+        list_del(&sha_dd->list);
+        spin_unlock(&atmel_sha.lock);
+        atmel_sha_unregister_algs(sha_dd);
+        tasklet_kill(&sha_dd->done_task);
+        iounmap(sha_dd->io_base);
+        clk_put(sha_dd->iclk);
+        if (sha_dd->irq >= 0)
+                free_irq(sha_dd->irq, sha_dd);
+        kfree(sha_dd);
+        sha_dd = NULL;
+        return 0;
+}
+static struct platform_driver atmel_sha_driver = {
+        .probe          = atmel_sha_probe,
+        .remove         = __devexit_p(atmel_sha_remove),
+        .driver         = {
+                .name   = "atmel_sha",
+                .owner  = THIS_MODULE,
+        },
+};
+module_platform_driver(atmel_sha_driver);
+MODULE_DESCRIPTION("Atmel SHA1/SHA256 hw acceleration support.");
+MODULE_LICENSE("GPL v2");
+MODULE_AUTHOR("Nicolas Royer - Eukréa Electromatique");
diff --git a/drivers/crypto/atmel-tdes-regs.h b/drivers/crypto/atmel-tdes-regs.h
new file mode 100644
index 000000000000..5ac2a900d80c
--- /dev/null
+++ b/drivers/crypto/atmel-tdes-regs.h
@@ -0,0 +1,89 @@
+#ifndef __ATMEL_TDES_REGS_H__
+#define __ATMEL_TDES_REGS_H__
+#define TDES_CR                 0x00
+#define TDES_CR_START                   (1 << 0)
+#define TDES_CR_SWRST                   (1 << 8)
+#define TDES_CR_LOADSEED                (1 << 16)
+#define TDES_MR                 0x04
+#define TDES_MR_CYPHER_DEC              (0 << 0)
+#define TDES_MR_CYPHER_ENC              (1 << 0)
+#define TDES_MR_TDESMOD_MASK    (0x3 << 1)
+#define TDES_MR_TDESMOD_DES             (0x0 << 1)
+#define TDES_MR_TDESMOD_TDES    (0x1 << 1)
+#define TDES_MR_TDESMOD_XTEA    (0x2 << 1)
+#define TDES_MR_KEYMOD_3KEY             (0 << 4)
+#define TDES_MR_KEYMOD_2KEY             (1 << 4)
+#define TDES_MR_SMOD_MASK               (0x3 << 8)
+#define TDES_MR_SMOD_MANUAL             (0x0 << 8)
+#define TDES_MR_SMOD_AUTO               (0x1 << 8)
+#define TDES_MR_SMOD_PDC                (0x2 << 8)
+#define TDES_MR_OPMOD_MASK              (0x3 << 12)
+#define TDES_MR_OPMOD_ECB               (0x0 << 12)
+#define TDES_MR_OPMOD_CBC               (0x1 << 12)
+#define TDES_MR_OPMOD_OFB               (0x2 << 12)
+#define TDES_MR_OPMOD_CFB               (0x3 << 12)
+#define TDES_MR_LOD                             (0x1 << 15)
+#define TDES_MR_CFBS_MASK               (0x3 << 16)
+#define TDES_MR_CFBS_64b                (0x0 << 16)
+#define TDES_MR_CFBS_32b                (0x1 << 16)
+#define TDES_MR_CFBS_16b                (0x2 << 16)
+#define TDES_MR_CFBS_8b                 (0x3 << 16)
+#define TDES_MR_CKEY_MASK               (0xF << 20)
+#define TDES_MR_CKEY_OFFSET             20
+#define TDES_MR_CTYPE_MASK              (0x3F << 24)
+#define TDES_MR_CTYPE_OFFSET    24
+#define TDES_IER                0x10
+#define TDES_IDR                0x14
+#define TDES_IMR                0x18
+#define TDES_ISR                0x1C
+#define TDES_INT_DATARDY                (1 << 0)
+#define TDES_INT_ENDRX                  (1 << 1)
+#define TDES_INT_ENDTX                  (1 << 2)
+#define TDES_INT_RXBUFF                 (1 << 3)
+#define TDES_INT_TXBUFE                 (1 << 4)
+#define TDES_INT_URAD                   (1 << 8)
+#define TDES_ISR_URAT_MASK              (0x3 << 12)
+#define TDES_ISR_URAT_IDR               (0x0 << 12)
+#define TDES_ISR_URAT_ODR               (0x1 << 12)
+#define TDES_ISR_URAT_MR                (0x2 << 12)
+#define TDES_ISR_URAT_WO                (0x3 << 12)
+#define TDES_KEY1W1R    0x20
+#define TDES_KEY1W2R    0x24
+#define TDES_KEY2W1R    0x28
+#define TDES_KEY2W2R    0x2C
+#define TDES_KEY3W1R    0x30
+#define TDES_KEY3W2R    0x34
+#define TDES_IDATA1R    0x40
+#define TDES_IDATA2R    0x44
+#define TDES_ODATA1R    0x50
+#define TDES_ODATA2R    0x54
+#define TDES_IV1R               0x60
+#define TDES_IV2R               0x64
+#define TDES_XTEARNDR   0x70
+#define TDES_XTEARNDR_XTEA_RNDS_MASK    (0x3F << 0)
+#define TDES_XTEARNDR_XTEA_RNDS_OFFSET  0
+#define TDES_RPR                0x100
+#define TDES_RCR                0x104
+#define TDES_TPR                0x108
+#define TDES_TCR                0x10C
+#define TDES_RNPR               0x118
+#define TDES_RNCR               0x11C
+#define TDES_TNPR               0x118
+#define TDES_TNCR               0x11C
+#define TDES_PTCR               0x120
+#define TDES_PTCR_RXTEN                 (1 << 0)
+#define TDES_PTCR_RXTDIS                (1 << 1)
+#define TDES_PTCR_TXTEN                 (1 << 8)
+#define TDES_PTCR_TXTDIS                (1 << 9)
+#define TDES_PTSR               0x124
+#define TDES_PTSR_RXTEN                 (1 << 0)
+#define TDES_PTSR_TXTEN                 (1 << 8)
+#endif /* __ATMEL_TDES_REGS_H__ */
diff --git a/drivers/crypto/atmel-tdes.c b/drivers/crypto/atmel-tdes.c
new file mode 100644
index 000000000000..eb2b61e57e2d
--- /dev/null
+++ b/drivers/crypto/atmel-tdes.c
@@ -0,0 +1,1215 @@
+/*
+ * Cryptographic API.
+ *
+ * Support for ATMEL DES/TDES HW acceleration.
+ *
+ * Copyright (c) 2012 Eukréa Electromatique - ATMEL
+ * Author: Nicolas Royer <nicolas@eukrea.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ *
+ * Some ideas are from omap-aes.c drivers.
+ */
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/slab.h>
+#include <linux/err.h>
+#include <linux/clk.h>
+#include <linux/io.h>
+#include <linux/hw_random.h>
+#include <linux/platform_device.h>
+#include <linux/device.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/errno.h>
+#include <linux/interrupt.h>
+#include <linux/kernel.h>
+#include <linux/clk.h>
+#include <linux/irq.h>
+#include <linux/io.h>
+#include <linux/platform_device.h>
+#include <linux/scatterlist.h>
+#include <linux/dma-mapping.h>
+#include <linux/delay.h>
+#include <linux/crypto.h>
+#include <linux/cryptohash.h>
+#include <crypto/scatterwalk.h>
+#include <crypto/algapi.h>
+#include <crypto/des.h>
+#include <crypto/hash.h>
+#include <crypto/internal/hash.h>
+#include "atmel-tdes-regs.h"
+/* TDES flags  */
+#define TDES_FLAGS_MODE_MASK            0x007f
+#define TDES_FLAGS_ENCRYPT      BIT(0)
+#define TDES_FLAGS_CBC          BIT(1)
+#define TDES_FLAGS_CFB          BIT(2)
+#define TDES_FLAGS_CFB8         BIT(3)
+#define TDES_FLAGS_CFB16        BIT(4)
+#define TDES_FLAGS_CFB32        BIT(5)
+#define TDES_FLAGS_OFB          BIT(6)
+#define TDES_FLAGS_INIT         BIT(16)
+#define TDES_FLAGS_FAST         BIT(17)
+#define TDES_FLAGS_BUSY         BIT(18)
+#define ATMEL_TDES_QUEUE_LENGTH 1
+#define CFB8_BLOCK_SIZE         1
+#define CFB16_BLOCK_SIZE        2
+#define CFB32_BLOCK_SIZE        4
+#define CFB64_BLOCK_SIZE        8
+struct atmel_tdes_dev;
+struct atmel_tdes_ctx {
+        struct atmel_tdes_dev *dd;
+        int             keylen;
+        u32             key[3*DES_KEY_SIZE / sizeof(u32)];
+        unsigned long   flags;
+};
+struct atmel_tdes_reqctx {
+        unsigned long mode;
+};
+struct atmel_tdes_dev {
+        struct list_head        list;
+        unsigned long           phys_base;
+        void __iomem            *io_base;
+        struct atmel_tdes_ctx   *ctx;
+        struct device           *dev;
+        struct clk                      *iclk;
+        int                                     irq;
+        unsigned long           flags;
+        int                     err;
+        spinlock_t              lock;
+        struct crypto_queue     queue;
+        struct tasklet_struct   done_task;
+        struct tasklet_struct   queue_task;
+        struct ablkcipher_request       *req;
+        size_t                          total;
+        struct scatterlist      *in_sg;
+        size_t                          in_offset;
+        struct scatterlist      *out_sg;
+        size_t                          out_offset;
+        size_t  buflen;
+        size_t  dma_size;
+        void    *buf_in;
+        int             dma_in;
+        dma_addr_t      dma_addr_in;
+        void    *buf_out;
+        int             dma_out;
+        dma_addr_t      dma_addr_out;
+};
+struct atmel_tdes_drv {
+        struct list_head        dev_list;
+        spinlock_t              lock;
+};
+static struct atmel_tdes_drv atmel_tdes = {
+        .dev_list = LIST_HEAD_INIT(atmel_tdes.dev_list),
+        .lock = __SPIN_LOCK_UNLOCKED(atmel_tdes.lock),
+};
+static int atmel_tdes_sg_copy(struct scatterlist **sg, size_t *offset,
+                        void *buf, size_t buflen, size_t total, int out)
+{
+        unsigned int count, off = 0;
+        while (buflen && total) {
+                count = min((*sg)->length - *offset, total);
+                count = min(count, buflen);
+                if (!count)
+                        return off;
+                scatterwalk_map_and_copy(buf + off, *sg, *offset, count, out);
+                off += count;
+                buflen -= count;
+                *offset += count;
+                total -= count;
+                if (*offset == (*sg)->length) {
+                        *sg = sg_next(*sg);
+                        if (*sg)
+                                *offset = 0;
+                        else
+                                total = 0;
+                }
+        }
+        return off;
+}
+static inline u32 atmel_tdes_read(struct atmel_tdes_dev *dd, u32 offset)
+{
+        return readl_relaxed(dd->io_base + offset);
+}
+static inline void atmel_tdes_write(struct atmel_tdes_dev *dd,
+                                        u32 offset, u32 value)
+{
+        writel_relaxed(value, dd->io_base + offset);
+}
+static void atmel_tdes_write_n(struct atmel_tdes_dev *dd, u32 offset,
+                                        u32 *value, int count)
+{
+        for (; count--; value++, offset += 4)
+                atmel_tdes_write(dd, offset, *value);
+}
+static struct atmel_tdes_dev *atmel_tdes_find_dev(struct atmel_tdes_ctx *ctx)
+{
+        struct atmel_tdes_dev *tdes_dd = NULL;
+        struct atmel_tdes_dev *tmp;
+        spin_lock_bh(&atmel_tdes.lock);
+        if (!ctx->dd) {
+                list_for_each_entry(tmp, &atmel_tdes.dev_list, list) {
+                        tdes_dd = tmp;
+                        break;
+                }
+                ctx->dd = tdes_dd;
+        } else {
+                tdes_dd = ctx->dd;
+        }
+        spin_unlock_bh(&atmel_tdes.lock);
+        return tdes_dd;
+}
+static int atmel_tdes_hw_init(struct atmel_tdes_dev *dd)
+{
+        clk_prepare_enable(dd->iclk);
+        if (!(dd->flags & TDES_FLAGS_INIT)) {
+                atmel_tdes_write(dd, TDES_CR, TDES_CR_SWRST);
+                dd->flags |= TDES_FLAGS_INIT;
+                dd->err = 0;
+        }
+        return 0;
+}
+static int atmel_tdes_write_ctrl(struct atmel_tdes_dev *dd)
+{
+        int err;
+        u32 valcr = 0, valmr = TDES_MR_SMOD_PDC;
+        err = atmel_tdes_hw_init(dd);
+        if (err)
+                return err;
+        atmel_tdes_write(dd, TDES_PTCR, TDES_PTCR_TXTDIS|TDES_PTCR_RXTDIS);
+        /* MR register must be set before IV registers */
+        if (dd->ctx->keylen > (DES_KEY_SIZE << 1)) {
+                valmr |= TDES_MR_KEYMOD_3KEY;
+                valmr |= TDES_MR_TDESMOD_TDES;
+        } else if (dd->ctx->keylen > DES_KEY_SIZE) {
+                valmr |= TDES_MR_KEYMOD_2KEY;
+                valmr |= TDES_MR_TDESMOD_TDES;
+        } else {
+                valmr |= TDES_MR_TDESMOD_DES;
+        }
+        if (dd->flags & TDES_FLAGS_CBC) {
+                valmr |= TDES_MR_OPMOD_CBC;
+        } else if (dd->flags & TDES_FLAGS_CFB) {
+                valmr |= TDES_MR_OPMOD_CFB;
+                if (dd->flags & TDES_FLAGS_CFB8)
+                        valmr |= TDES_MR_CFBS_8b;
+                else if (dd->flags & TDES_FLAGS_CFB16)
+                        valmr |= TDES_MR_CFBS_16b;
+                else if (dd->flags & TDES_FLAGS_CFB32)
+                        valmr |= TDES_MR_CFBS_32b;
+        } else if (dd->flags & TDES_FLAGS_OFB) {
+                valmr |= TDES_MR_OPMOD_OFB;
+        }
+        if ((dd->flags & TDES_FLAGS_ENCRYPT) || (dd->flags & TDES_FLAGS_OFB))
+                valmr |= TDES_MR_CYPHER_ENC;
+        atmel_tdes_write(dd, TDES_CR, valcr);
+        atmel_tdes_write(dd, TDES_MR, valmr);
+        atmel_tdes_write_n(dd, TDES_KEY1W1R, dd->ctx->key,
+                                                dd->ctx->keylen >> 2);
+        if (((dd->flags & TDES_FLAGS_CBC) || (dd->flags & TDES_FLAGS_CFB) ||
+                (dd->flags & TDES_FLAGS_OFB)) && dd->req->info) {
+                atmel_tdes_write_n(dd, TDES_IV1R, dd->req->info, 2);
+        }
+        return 0;
+}
+static int atmel_tdes_crypt_dma_stop(struct atmel_tdes_dev *dd)
+{
+        int err = 0;
+        size_t count;
+        atmel_tdes_write(dd, TDES_PTCR, TDES_PTCR_TXTDIS|TDES_PTCR_RXTDIS);
+        if (dd->flags & TDES_FLAGS_FAST) {
+                dma_unmap_sg(dd->dev, dd->out_sg, 1, DMA_FROM_DEVICE);
+                dma_unmap_sg(dd->dev, dd->in_sg, 1, DMA_TO_DEVICE);
+        } else {
+                dma_sync_single_for_device(dd->dev, dd->dma_addr_out,
+                                           dd->dma_size, DMA_FROM_DEVICE);
+                /* copy data */
+                count = atmel_tdes_sg_copy(&dd->out_sg, &dd->out_offset,
+                                dd->buf_out, dd->buflen, dd->dma_size, 1);
+                if (count != dd->dma_size) {
+                        err = -EINVAL;
+                        pr_err("not all data converted: %u\n", count);
+                }
+        }
+        return err;
+}
+static int atmel_tdes_dma_init(struct atmel_tdes_dev *dd)
+{
+        int err = -ENOMEM;
+        dd->buf_in = (void *)__get_free_pages(GFP_KERNEL, 0);
+        dd->buf_out = (void *)__get_free_pages(GFP_KERNEL, 0);
+        dd->buflen = PAGE_SIZE;
+        dd->buflen &= ~(DES_BLOCK_SIZE - 1);
+        if (!dd->buf_in || !dd->buf_out) {
+                dev_err(dd->dev, "unable to alloc pages.\n");
+                goto err_alloc;
+        }
+        /* MAP here */
+        dd->dma_addr_in = dma_map_single(dd->dev, dd->buf_in,
+                                        dd->buflen, DMA_TO_DEVICE);
+        if (dma_mapping_error(dd->dev, dd->dma_addr_in)) {
+                dev_err(dd->dev, "dma %d bytes error\n", dd->buflen);
+                err = -EINVAL;
+                goto err_map_in;
+        }
+        dd->dma_addr_out = dma_map_single(dd->dev, dd->buf_out,
+                                        dd->buflen, DMA_FROM_DEVICE);
+        if (dma_mapping_error(dd->dev, dd->dma_addr_out)) {
+                dev_err(dd->dev, "dma %d bytes error\n", dd->buflen);
+                err = -EINVAL;
+                goto err_map_out;
+        }
+        return 0;
+err_map_out:
+        dma_unmap_single(dd->dev, dd->dma_addr_in, dd->buflen,
+                DMA_TO_DEVICE);
+err_map_in:
+        free_page((unsigned long)dd->buf_out);
+        free_page((unsigned long)dd->buf_in);
+err_alloc:
+        if (err)
+                pr_err("error: %d\n", err);
+        return err;
+}
+static void atmel_tdes_dma_cleanup(struct atmel_tdes_dev *dd)
+{
+        dma_unmap_single(dd->dev, dd->dma_addr_out, dd->buflen,
+                         DMA_FROM_DEVICE);
+        dma_unmap_single(dd->dev, dd->dma_addr_in, dd->buflen,
+                DMA_TO_DEVICE);
+        free_page((unsigned long)dd->buf_out);
+        free_page((unsigned long)dd->buf_in);
+}
+static int atmel_tdes_crypt_dma(struct crypto_tfm *tfm, dma_addr_t dma_addr_in,
+                               dma_addr_t dma_addr_out, int length)
+{
+        struct atmel_tdes_ctx *ctx = crypto_tfm_ctx(tfm);
+        struct atmel_tdes_dev *dd = ctx->dd;
+        int len32;
+        dd->dma_size = length;
+        if (!(dd->flags & TDES_FLAGS_FAST)) {
+                dma_sync_single_for_device(dd->dev, dma_addr_in, length,
+                                           DMA_TO_DEVICE);
+        }
+        if ((dd->flags & TDES_FLAGS_CFB) && (dd->flags & TDES_FLAGS_CFB8))
+                len32 = DIV_ROUND_UP(length, sizeof(u8));
+        else if ((dd->flags & TDES_FLAGS_CFB) && (dd->flags & TDES_FLAGS_CFB16))
+                len32 = DIV_ROUND_UP(length, sizeof(u16));
+        else
+                len32 = DIV_ROUND_UP(length, sizeof(u32));
+        atmel_tdes_write(dd, TDES_PTCR, TDES_PTCR_TXTDIS|TDES_PTCR_RXTDIS);
+        atmel_tdes_write(dd, TDES_TPR, dma_addr_in);
+        atmel_tdes_write(dd, TDES_TCR, len32);
+        atmel_tdes_write(dd, TDES_RPR, dma_addr_out);
+        atmel_tdes_write(dd, TDES_RCR, len32);
+        /* Enable Interrupt */
+        atmel_tdes_write(dd, TDES_IER, TDES_INT_ENDRX);
+        /* Start DMA transfer */
+        atmel_tdes_write(dd, TDES_PTCR, TDES_PTCR_TXTEN | TDES_PTCR_RXTEN);
+        return 0;
+}
+static int atmel_tdes_crypt_dma_start(struct atmel_tdes_dev *dd)
+{
+        struct crypto_tfm *tfm = crypto_ablkcipher_tfm(
+                                        crypto_ablkcipher_reqtfm(dd->req));
+        int err, fast = 0, in, out;
+        size_t count;
+        dma_addr_t addr_in, addr_out;
+        if (sg_is_last(dd->in_sg) && sg_is_last(dd->out_sg)) {
+                /* check for alignment */
+                in = IS_ALIGNED((u32)dd->in_sg->offset, sizeof(u32));
+                out = IS_ALIGNED((u32)dd->out_sg->offset, sizeof(u32));
+                fast = in && out;
+        }
+        if (fast)  {
+                count = min(dd->total, sg_dma_len(dd->in_sg));
+                count = min(count, sg_dma_len(dd->out_sg));
+                if (count != dd->total) {
+                        pr_err("request length != buffer length\n");
+                        return -EINVAL;
+                }
+                err = dma_map_sg(dd->dev, dd->in_sg, 1, DMA_TO_DEVICE);
+                if (!err) {
+                        dev_err(dd->dev, "dma_map_sg() error\n");
+                        return -EINVAL;
+                }
+                err = dma_map_sg(dd->dev, dd->out_sg, 1,
+                                DMA_FROM_DEVICE);
+                if (!err) {
+                        dev_err(dd->dev, "dma_map_sg() error\n");
+                        dma_unmap_sg(dd->dev, dd->in_sg, 1,
+                                DMA_TO_DEVICE);
+                        return -EINVAL;
+                }
+                addr_in = sg_dma_address(dd->in_sg);
+                addr_out = sg_dma_address(dd->out_sg);
+                dd->flags |= TDES_FLAGS_FAST;
+        } else {
+                /* use cache buffers */
+                count = atmel_tdes_sg_copy(&dd->in_sg, &dd->in_offset,
+                                dd->buf_in, dd->buflen, dd->total, 0);
+                addr_in = dd->dma_addr_in;
+                addr_out = dd->dma_addr_out;
+                dd->flags &= ~TDES_FLAGS_FAST;
+        }
+        dd->total -= count;
+        err = atmel_tdes_crypt_dma(tfm, addr_in, addr_out, count);
+        if (err) {
+                dma_unmap_sg(dd->dev, dd->in_sg, 1, DMA_TO_DEVICE);
+                dma_unmap_sg(dd->dev, dd->out_sg, 1, DMA_TO_DEVICE);
+        }
+        return err;
+}
+static void atmel_tdes_finish_req(struct atmel_tdes_dev *dd, int err)
+{
+        struct ablkcipher_request *req = dd->req;
+        clk_disable_unprepare(dd->iclk);
+        dd->flags &= ~TDES_FLAGS_BUSY;
+        req->base.complete(&req->base, err);
+}
+static int atmel_tdes_handle_queue(struct atmel_tdes_dev *dd,
+                               struct ablkcipher_request *req)
+{
+        struct crypto_async_request *async_req, *backlog;
+        struct atmel_tdes_ctx *ctx;
+        struct atmel_tdes_reqctx *rctx;
+        unsigned long flags;
+        int err, ret = 0;
+        spin_lock_irqsave(&dd->lock, flags);
+        if (req)
+                ret = ablkcipher_enqueue_request(&dd->queue, req);
+        if (dd->flags & TDES_FLAGS_BUSY) {
+                spin_unlock_irqrestore(&dd->lock, flags);
+                return ret;
+        }
+        backlog = crypto_get_backlog(&dd->queue);
+        async_req = crypto_dequeue_request(&dd->queue);
+        if (async_req)
+                dd->flags |= TDES_FLAGS_BUSY;
+        spin_unlock_irqrestore(&dd->lock, flags);
+        if (!async_req)
+                return ret;
+        if (backlog)
+                backlog->complete(backlog, -EINPROGRESS);
+        req = ablkcipher_request_cast(async_req);
+        /* assign new request to device */
+        dd->req = req;
+        dd->total = req->nbytes;
+        dd->in_offset = 0;
+        dd->in_sg = req->src;
+        dd->out_offset = 0;
+        dd->out_sg = req->dst;
+        rctx = ablkcipher_request_ctx(req);
+        ctx = crypto_ablkcipher_ctx(crypto_ablkcipher_reqtfm(req));
+        rctx->mode &= TDES_FLAGS_MODE_MASK;
+        dd->flags = (dd->flags & ~TDES_FLAGS_MODE_MASK) | rctx->mode;
+        dd->ctx = ctx;
+        ctx->dd = dd;
+        err = atmel_tdes_write_ctrl(dd);
+        if (!err)
+                err = atmel_tdes_crypt_dma_start(dd);
+        if (err) {
+                /* des_task will not finish it, so do it here */
+                atmel_tdes_finish_req(dd, err);
+                tasklet_schedule(&dd->queue_task);
+        }
+        return ret;
+}
+static int atmel_tdes_crypt(struct ablkcipher_request *req, unsigned long mode)
+{
+        struct atmel_tdes_ctx *ctx = crypto_ablkcipher_ctx(
+                        crypto_ablkcipher_reqtfm(req));
+        struct atmel_tdes_reqctx *rctx = ablkcipher_request_ctx(req);
+        struct atmel_tdes_dev *dd;
+        if (mode & TDES_FLAGS_CFB8) {
+                if (!IS_ALIGNED(req->nbytes, CFB8_BLOCK_SIZE)) {
+                        pr_err("request size is not exact amount of CFB8 blocks\n");
+                        return -EINVAL;
+                }
+        } else if (mode & TDES_FLAGS_CFB16) {
+                if (!IS_ALIGNED(req->nbytes, CFB16_BLOCK_SIZE)) {
+                        pr_err("request size is not exact amount of CFB16 blocks\n");
+                        return -EINVAL;
+                }
+        } else if (mode & TDES_FLAGS_CFB32) {
+                if (!IS_ALIGNED(req->nbytes, CFB32_BLOCK_SIZE)) {
+                        pr_err("request size is not exact amount of CFB32 blocks\n");
+                        return -EINVAL;
+                }
+        } else if (!IS_ALIGNED(req->nbytes, DES_BLOCK_SIZE)) {
+                pr_err("request size is not exact amount of DES blocks\n");
+                return -EINVAL;
+        }
+        dd = atmel_tdes_find_dev(ctx);
+        if (!dd)
+                return -ENODEV;
+        rctx->mode = mode;
+        return atmel_tdes_handle_queue(dd, req);
+}
+static int atmel_des_setkey(struct crypto_ablkcipher *tfm, const u8 *key,
+                           unsigned int keylen)
+{
+        u32 tmp[DES_EXPKEY_WORDS];
+        int err;
+        struct crypto_tfm *ctfm = crypto_ablkcipher_tfm(tfm);
+        struct atmel_tdes_ctx *ctx = crypto_ablkcipher_ctx(tfm);
+        if (keylen != DES_KEY_SIZE) {
+                crypto_ablkcipher_set_flags(tfm, CRYPTO_TFM_RES_BAD_KEY_LEN);
+                return -EINVAL;
+        }
+        err = des_ekey(tmp, key);
+        if (err == 0 && (ctfm->crt_flags & CRYPTO_TFM_REQ_WEAK_KEY)) {
+                ctfm->crt_flags |= CRYPTO_TFM_RES_WEAK_KEY;
+                return -EINVAL;
+        }
+        memcpy(ctx->key, key, keylen);
+        ctx->keylen = keylen;
+        return 0;
+}
+static int atmel_tdes_setkey(struct crypto_ablkcipher *tfm, const u8 *key,
+                           unsigned int keylen)
+{
+        struct atmel_tdes_ctx *ctx = crypto_ablkcipher_ctx(tfm);
+        const char *alg_name;
+        alg_name = crypto_tfm_alg_name(crypto_ablkcipher_tfm(tfm));
+        /*
+         * HW bug in cfb 3-keys mode.
+         */
+        if (strstr(alg_name, "cfb") && (keylen != 2*DES_KEY_SIZE)) {
+                crypto_ablkcipher_set_flags(tfm, CRYPTO_TFM_RES_BAD_KEY_LEN);
+                return -EINVAL;
+        } else if ((keylen != 2*DES_KEY_SIZE) && (keylen != 3*DES_KEY_SIZE)) {
+                crypto_ablkcipher_set_flags(tfm, CRYPTO_TFM_RES_BAD_KEY_LEN);
+                return -EINVAL;
+        }
+        memcpy(ctx->key, key, keylen);
+        ctx->keylen = keylen;
+        return 0;
+}
+static int atmel_tdes_ecb_encrypt(struct ablkcipher_request *req)
+{
+        return atmel_tdes_crypt(req, TDES_FLAGS_ENCRYPT);
+}
+static int atmel_tdes_ecb_decrypt(struct ablkcipher_request *req)
+{
+        return atmel_tdes_crypt(req, 0);
+}
+static int atmel_tdes_cbc_encrypt(struct ablkcipher_request *req)
+{
+        return atmel_tdes_crypt(req, TDES_FLAGS_ENCRYPT | TDES_FLAGS_CBC);
+}
+static int atmel_tdes_cbc_decrypt(struct ablkcipher_request *req)
+{
+        return atmel_tdes_crypt(req, TDES_FLAGS_CBC);
+}
+static int atmel_tdes_cfb_encrypt(struct ablkcipher_request *req)
+{
+        return atmel_tdes_crypt(req, TDES_FLAGS_ENCRYPT | TDES_FLAGS_CFB);
+}
+static int atmel_tdes_cfb_decrypt(struct ablkcipher_request *req)
+{
+        return atmel_tdes_crypt(req, TDES_FLAGS_CFB);
+}
+static int atmel_tdes_cfb8_encrypt(struct ablkcipher_request *req)
+{
+        return atmel_tdes_crypt(req, TDES_FLAGS_ENCRYPT | TDES_FLAGS_CFB |
+                                                TDES_FLAGS_CFB8);
+}
+static int atmel_tdes_cfb8_decrypt(struct ablkcipher_request *req)
+{
+        return atmel_tdes_crypt(req, TDES_FLAGS_CFB | TDES_FLAGS_CFB8);
+}
+static int atmel_tdes_cfb16_encrypt(struct ablkcipher_request *req)
+{
+        return atmel_tdes_crypt(req, TDES_FLAGS_ENCRYPT | TDES_FLAGS_CFB |
+                                                TDES_FLAGS_CFB16);
+}
+static int atmel_tdes_cfb16_decrypt(struct ablkcipher_request *req)
+{
+        return atmel_tdes_crypt(req, TDES_FLAGS_CFB | TDES_FLAGS_CFB16);
+}
+static int atmel_tdes_cfb32_encrypt(struct ablkcipher_request *req)
+{
+        return atmel_tdes_crypt(req, TDES_FLAGS_ENCRYPT | TDES_FLAGS_CFB |
+                                                TDES_FLAGS_CFB32);
+}
+static int atmel_tdes_cfb32_decrypt(struct ablkcipher_request *req)
+{
+        return atmel_tdes_crypt(req, TDES_FLAGS_CFB | TDES_FLAGS_CFB32);
+}
+static int atmel_tdes_ofb_encrypt(struct ablkcipher_request *req)
+{
+        return atmel_tdes_crypt(req, TDES_FLAGS_ENCRYPT | TDES_FLAGS_OFB);
+}
+static int atmel_tdes_ofb_decrypt(struct ablkcipher_request *req)
+{
+        return atmel_tdes_crypt(req, TDES_FLAGS_OFB);
+}
+static int atmel_tdes_cra_init(struct crypto_tfm *tfm)
+{
+        tfm->crt_ablkcipher.reqsize = sizeof(struct atmel_tdes_reqctx);
+        return 0;
+}
+static void atmel_tdes_cra_exit(struct crypto_tfm *tfm)
+{
+}
+static struct crypto_alg tdes_algs[] = {
+{
+        .cra_name               = "ecb(des)",
+        .cra_driver_name        = "atmel-ecb-des",
+        .cra_priority           = 100,
+        .cra_flags              = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
+        .cra_blocksize          = DES_BLOCK_SIZE,
+        .cra_ctxsize            = sizeof(struct atmel_tdes_ctx),
+        .cra_alignmask          = 0,
+        .cra_type               = &crypto_ablkcipher_type,
+        .cra_module             = THIS_MODULE,
+        .cra_init               = atmel_tdes_cra_init,
+        .cra_exit               = atmel_tdes_cra_exit,
+        .cra_u.ablkcipher = {
+                .min_keysize    = DES_KEY_SIZE,
+                .max_keysize    = DES_KEY_SIZE,
+                .setkey         = atmel_des_setkey,
+                .encrypt        = atmel_tdes_ecb_encrypt,
+                .decrypt        = atmel_tdes_ecb_decrypt,
+        }
+},
+{
+        .cra_name               = "cbc(des)",
+        .cra_driver_name        = "atmel-cbc-des",
+        .cra_priority           = 100,
+        .cra_flags              = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
+        .cra_blocksize          = DES_BLOCK_SIZE,
+        .cra_ctxsize            = sizeof(struct atmel_tdes_ctx),
+        .cra_alignmask          = 0,
+        .cra_type               = &crypto_ablkcipher_type,
+        .cra_module             = THIS_MODULE,
+        .cra_init               = atmel_tdes_cra_init,
+        .cra_exit               = atmel_tdes_cra_exit,
+        .cra_u.ablkcipher = {
+                .min_keysize    = DES_KEY_SIZE,
+                .max_keysize    = DES_KEY_SIZE,
+                .ivsize         = DES_BLOCK_SIZE,
+                .setkey         = atmel_des_setkey,
+                .encrypt        = atmel_tdes_cbc_encrypt,
+                .decrypt        = atmel_tdes_cbc_decrypt,
+        }
+},
+{
+        .cra_name               = "cfb(des)",
+        .cra_driver_name        = "atmel-cfb-des",
+        .cra_priority           = 100,
+        .cra_flags              = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
+        .cra_blocksize          = DES_BLOCK_SIZE,
+        .cra_ctxsize            = sizeof(struct atmel_tdes_ctx),
+        .cra_alignmask          = 0,
+        .cra_type               = &crypto_ablkcipher_type,
+        .cra_module             = THIS_MODULE,
+        .cra_init               = atmel_tdes_cra_init,
+        .cra_exit               = atmel_tdes_cra_exit,
+        .cra_u.ablkcipher = {
+                .min_keysize    = DES_KEY_SIZE,
+                .max_keysize    = DES_KEY_SIZE,
+                .ivsize         = DES_BLOCK_SIZE,
+                .setkey         = atmel_des_setkey,
+                .encrypt        = atmel_tdes_cfb_encrypt,
+                .decrypt        = atmel_tdes_cfb_decrypt,
+        }
+},
+{
+        .cra_name               = "cfb8(des)",
+        .cra_driver_name        = "atmel-cfb8-des",
+        .cra_priority           = 100,
+        .cra_flags              = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
+        .cra_blocksize          = CFB8_BLOCK_SIZE,
+        .cra_ctxsize            = sizeof(struct atmel_tdes_ctx),
+        .cra_alignmask          = 0,
+        .cra_type               = &crypto_ablkcipher_type,
+        .cra_module             = THIS_MODULE,
+        .cra_init               = atmel_tdes_cra_init,
+        .cra_exit               = atmel_tdes_cra_exit,
+        .cra_u.ablkcipher = {
+                .min_keysize    = DES_KEY_SIZE,
+                .max_keysize    = DES_KEY_SIZE,
+                .ivsize         = DES_BLOCK_SIZE,
+                .setkey         = atmel_des_setkey,
+                .encrypt        = atmel_tdes_cfb8_encrypt,
+                .decrypt        = atmel_tdes_cfb8_decrypt,
+        }
+},
+{
+        .cra_name               = "cfb16(des)",
+        .cra_driver_name        = "atmel-cfb16-des",
+        .cra_priority           = 100,
+        .cra_flags              = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
+        .cra_blocksize          = CFB16_BLOCK_SIZE,
+        .cra_ctxsize            = sizeof(struct atmel_tdes_ctx),
+        .cra_alignmask          = 0,
+        .cra_type               = &crypto_ablkcipher_type,
+        .cra_module             = THIS_MODULE,
+        .cra_init               = atmel_tdes_cra_init,
+        .cra_exit               = atmel_tdes_cra_exit,
+        .cra_u.ablkcipher = {
+                .min_keysize    = DES_KEY_SIZE,
+                .max_keysize    = DES_KEY_SIZE,
+                .ivsize         = DES_BLOCK_SIZE,
+                .setkey         = atmel_des_setkey,
+                .encrypt        = atmel_tdes_cfb16_encrypt,
+                .decrypt        = atmel_tdes_cfb16_decrypt,
+        }
+},
+{
+        .cra_name               = "cfb32(des)",
+        .cra_driver_name        = "atmel-cfb32-des",
+        .cra_priority           = 100,
+        .cra_flags              = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
+        .cra_blocksize          = CFB32_BLOCK_SIZE,
+        .cra_ctxsize            = sizeof(struct atmel_tdes_ctx),
+        .cra_alignmask          = 0,
+        .cra_type               = &crypto_ablkcipher_type,
+        .cra_module             = THIS_MODULE,
+        .cra_init               = atmel_tdes_cra_init,
+        .cra_exit               = atmel_tdes_cra_exit,
+        .cra_u.ablkcipher = {
+                .min_keysize    = DES_KEY_SIZE,
+                .max_keysize    = DES_KEY_SIZE,
+                .ivsize         = DES_BLOCK_SIZE,
+                .setkey         = atmel_des_setkey,
+                .encrypt        = atmel_tdes_cfb32_encrypt,
+                .decrypt        = atmel_tdes_cfb32_decrypt,
+        }
+},
+{
+        .cra_name               = "ofb(des)",
+        .cra_driver_name        = "atmel-ofb-des",
+        .cra_priority           = 100,
+        .cra_flags              = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
+        .cra_blocksize          = DES_BLOCK_SIZE,
+        .cra_ctxsize            = sizeof(struct atmel_tdes_ctx),
+        .cra_alignmask          = 0,
+        .cra_type               = &crypto_ablkcipher_type,
+        .cra_module             = THIS_MODULE,
+        .cra_init               = atmel_tdes_cra_init,
+        .cra_exit               = atmel_tdes_cra_exit,
+        .cra_u.ablkcipher = {
+                .min_keysize    = DES_KEY_SIZE,
+                .max_keysize    = DES_KEY_SIZE,
+                .ivsize         = DES_BLOCK_SIZE,
+                .setkey         = atmel_des_setkey,
+                .encrypt        = atmel_tdes_ofb_encrypt,
+                .decrypt        = atmel_tdes_ofb_decrypt,
+        }
+},
+{
+        .cra_name               = "ecb(des3_ede)",
+        .cra_driver_name        = "atmel-ecb-tdes",
+        .cra_priority           = 100,
+        .cra_flags              = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
+        .cra_blocksize          = DES_BLOCK_SIZE,
+        .cra_ctxsize            = sizeof(struct atmel_tdes_ctx),
+        .cra_alignmask          = 0,
+        .cra_type               = &crypto_ablkcipher_type,
+        .cra_module             = THIS_MODULE,
+        .cra_init               = atmel_tdes_cra_init,
+        .cra_exit               = atmel_tdes_cra_exit,
+        .cra_u.ablkcipher = {
+                .min_keysize    = 2 * DES_KEY_SIZE,
+                .max_keysize    = 3 * DES_KEY_SIZE,
+                .setkey         = atmel_tdes_setkey,
+                .encrypt        = atmel_tdes_ecb_encrypt,
+                .decrypt        = atmel_tdes_ecb_decrypt,
+        }
+},
+{
+        .cra_name               = "cbc(des3_ede)",
+        .cra_driver_name        = "atmel-cbc-tdes",
+        .cra_priority           = 100,
+        .cra_flags              = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
+        .cra_blocksize          = DES_BLOCK_SIZE,
+        .cra_ctxsize            = sizeof(struct atmel_tdes_ctx),
+        .cra_alignmask          = 0,
+        .cra_type               = &crypto_ablkcipher_type,
+        .cra_module             = THIS_MODULE,
+        .cra_init               = atmel_tdes_cra_init,
+        .cra_exit               = atmel_tdes_cra_exit,
+        .cra_u.ablkcipher = {
+                .min_keysize    = 2*DES_KEY_SIZE,
+                .max_keysize    = 3*DES_KEY_SIZE,
+                .ivsize         = DES_BLOCK_SIZE,
+                .setkey         = atmel_tdes_setkey,
+                .encrypt        = atmel_tdes_cbc_encrypt,
+                .decrypt        = atmel_tdes_cbc_decrypt,
+        }
+},
+{
+        .cra_name               = "cfb(des3_ede)",
+        .cra_driver_name        = "atmel-cfb-tdes",
+        .cra_priority           = 100,
+        .cra_flags              = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
+        .cra_blocksize          = DES_BLOCK_SIZE,
+        .cra_ctxsize            = sizeof(struct atmel_tdes_ctx),
+        .cra_alignmask          = 0,
+        .cra_type               = &crypto_ablkcipher_type,
+        .cra_module             = THIS_MODULE,
+        .cra_init               = atmel_tdes_cra_init,
+        .cra_exit               = atmel_tdes_cra_exit,
+        .cra_u.ablkcipher = {
+                .min_keysize    = 2*DES_KEY_SIZE,
+                .max_keysize    = 2*DES_KEY_SIZE,
+                .ivsize         = DES_BLOCK_SIZE,
+                .setkey         = atmel_tdes_setkey,
+                .encrypt        = atmel_tdes_cfb_encrypt,
+                .decrypt        = atmel_tdes_cfb_decrypt,
+        }
+},
+{
+        .cra_name               = "cfb8(des3_ede)",
+        .cra_driver_name        = "atmel-cfb8-tdes",
+        .cra_priority           = 100,
+        .cra_flags              = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
+        .cra_blocksize          = CFB8_BLOCK_SIZE,
+        .cra_ctxsize            = sizeof(struct atmel_tdes_ctx),
+        .cra_alignmask          = 0,
+        .cra_type               = &crypto_ablkcipher_type,
+        .cra_module             = THIS_MODULE,
+        .cra_init               = atmel_tdes_cra_init,
+        .cra_exit               = atmel_tdes_cra_exit,
+        .cra_u.ablkcipher = {
+                .min_keysize    = 2*DES_KEY_SIZE,
+                .max_keysize    = 2*DES_KEY_SIZE,
+                .ivsize         = DES_BLOCK_SIZE,
+                .setkey         = atmel_tdes_setkey,
+                .encrypt        = atmel_tdes_cfb8_encrypt,
+                .decrypt        = atmel_tdes_cfb8_decrypt,
+        }
+},
+{
+        .cra_name               = "cfb16(des3_ede)",
+        .cra_driver_name        = "atmel-cfb16-tdes",
+        .cra_priority           = 100,
+        .cra_flags              = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
+        .cra_blocksize          = CFB16_BLOCK_SIZE,
+        .cra_ctxsize            = sizeof(struct atmel_tdes_ctx),
+        .cra_alignmask          = 0,
+        .cra_type               = &crypto_ablkcipher_type,
+        .cra_module             = THIS_MODULE,
+        .cra_init               = atmel_tdes_cra_init,
+        .cra_exit               = atmel_tdes_cra_exit,
+        .cra_u.ablkcipher = {
+                .min_keysize    = 2*DES_KEY_SIZE,
+                .max_keysize    = 2*DES_KEY_SIZE,
+                .ivsize         = DES_BLOCK_SIZE,
+                .setkey         = atmel_tdes_setkey,
+                .encrypt        = atmel_tdes_cfb16_encrypt,
+                .decrypt        = atmel_tdes_cfb16_decrypt,
+        }
+},
+{
+        .cra_name               = "cfb32(des3_ede)",
+        .cra_driver_name        = "atmel-cfb32-tdes",
+        .cra_priority           = 100,
+        .cra_flags              = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
+        .cra_blocksize          = CFB32_BLOCK_SIZE,
+        .cra_ctxsize            = sizeof(struct atmel_tdes_ctx),
+        .cra_alignmask          = 0,
+        .cra_type               = &crypto_ablkcipher_type,
+        .cra_module             = THIS_MODULE,
+        .cra_init               = atmel_tdes_cra_init,
+        .cra_exit               = atmel_tdes_cra_exit,
+        .cra_u.ablkcipher = {
+                .min_keysize    = 2*DES_KEY_SIZE,
+                .max_keysize    = 2*DES_KEY_SIZE,
+                .ivsize         = DES_BLOCK_SIZE,
+                .setkey         = atmel_tdes_setkey,
+                .encrypt        = atmel_tdes_cfb32_encrypt,
+                .decrypt        = atmel_tdes_cfb32_decrypt,
+        }
+},
+{
+        .cra_name               = "ofb(des3_ede)",
+        .cra_driver_name        = "atmel-ofb-tdes",
+        .cra_priority           = 100,
+        .cra_flags              = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
+        .cra_blocksize          = DES_BLOCK_SIZE,
+        .cra_ctxsize            = sizeof(struct atmel_tdes_ctx),
+        .cra_alignmask          = 0,
+        .cra_type               = &crypto_ablkcipher_type,
+        .cra_module             = THIS_MODULE,
+        .cra_init               = atmel_tdes_cra_init,
+        .cra_exit               = atmel_tdes_cra_exit,
+        .cra_u.ablkcipher = {
+                .min_keysize    = 2*DES_KEY_SIZE,
+                .max_keysize    = 3*DES_KEY_SIZE,
+                .ivsize         = DES_BLOCK_SIZE,
+                .setkey         = atmel_tdes_setkey,
+                .encrypt        = atmel_tdes_ofb_encrypt,
+                .decrypt        = atmel_tdes_ofb_decrypt,
+        }
+},
+};
+static void atmel_tdes_queue_task(unsigned long data)
+{
+        struct atmel_tdes_dev *dd = (struct atmel_tdes_dev *)data;
+        atmel_tdes_handle_queue(dd, NULL);
+}
+static void atmel_tdes_done_task(unsigned long data)
+{
+        struct atmel_tdes_dev *dd = (struct atmel_tdes_dev *) data;
+        int err;
+        err = atmel_tdes_crypt_dma_stop(dd);
+        err = dd->err ? : err;
+        if (dd->total && !err) {
+                err = atmel_tdes_crypt_dma_start(dd);
+                if (!err)
+                        return;
+        }
+        atmel_tdes_finish_req(dd, err);
+        atmel_tdes_handle_queue(dd, NULL);
+}
+static irqreturn_t atmel_tdes_irq(int irq, void *dev_id)
+{
+        struct atmel_tdes_dev *tdes_dd = dev_id;
+        u32 reg;
+        reg = atmel_tdes_read(tdes_dd, TDES_ISR);
+        if (reg & atmel_tdes_read(tdes_dd, TDES_IMR)) {
+                atmel_tdes_write(tdes_dd, TDES_IDR, reg);
+                if (TDES_FLAGS_BUSY & tdes_dd->flags)
+                        tasklet_schedule(&tdes_dd->done_task);
+                else
+                        dev_warn(tdes_dd->dev, "TDES interrupt when no active requests.\n");
+                return IRQ_HANDLED;
+        }
+        return IRQ_NONE;
+}
+static void atmel_tdes_unregister_algs(struct atmel_tdes_dev *dd)
+{
+        int i;
+        for (i = 0; i < ARRAY_SIZE(tdes_algs); i++)
+                crypto_unregister_alg(&tdes_algs[i]);
+}
+static int atmel_tdes_register_algs(struct atmel_tdes_dev *dd)
+{
+        int err, i, j;
+        for (i = 0; i < ARRAY_SIZE(tdes_algs); i++) {
+                INIT_LIST_HEAD(&tdes_algs[i].cra_list);
+                err = crypto_register_alg(&tdes_algs[i]);
+                if (err)
+                        goto err_tdes_algs;
+        }
+        return 0;
+err_tdes_algs:
+        for (j = 0; j < i; j++)
+                crypto_unregister_alg(&tdes_algs[j]);
+        return err;
+}
+static int __devinit atmel_tdes_probe(struct platform_device *pdev)
+{
+        struct atmel_tdes_dev *tdes_dd;
+        struct device *dev = &pdev->dev;
+        struct resource *tdes_res;
+        unsigned long tdes_phys_size;
+        int err;
+        tdes_dd = kzalloc(sizeof(struct atmel_tdes_dev), GFP_KERNEL);
+        if (tdes_dd == NULL) {
+                dev_err(dev, "unable to alloc data struct.\n");
+                err = -ENOMEM;
+                goto tdes_dd_err;
+        }
+        tdes_dd->dev = dev;
+        platform_set_drvdata(pdev, tdes_dd);
+        INIT_LIST_HEAD(&tdes_dd->list);
+        tasklet_init(&tdes_dd->done_task, atmel_tdes_done_task,
+                                        (unsigned long)tdes_dd);
+        tasklet_init(&tdes_dd->queue_task, atmel_tdes_queue_task,
+                                        (unsigned long)tdes_dd);
+        crypto_init_queue(&tdes_dd->queue, ATMEL_TDES_QUEUE_LENGTH);
+        tdes_dd->irq = -1;
+        /* Get the base address */
+        tdes_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+        if (!tdes_res) {
+                dev_err(dev, "no MEM resource info\n");
+                err = -ENODEV;
+                goto res_err;
+        }
+        tdes_dd->phys_base = tdes_res->start;
+        tdes_phys_size = resource_size(tdes_res);
+        /* Get the IRQ */
+        tdes_dd->irq = platform_get_irq(pdev,  0);
+        if (tdes_dd->irq < 0) {
+                dev_err(dev, "no IRQ resource info\n");
+                err = tdes_dd->irq;
+                goto res_err;
+        }
+        err = request_irq(tdes_dd->irq, atmel_tdes_irq, IRQF_SHARED,
+                        "atmel-tdes", tdes_dd);
+        if (err) {
+                dev_err(dev, "unable to request tdes irq.\n");
+                goto tdes_irq_err;
+        }
+        /* Initializing the clock */
+        tdes_dd->iclk = clk_get(&pdev->dev, NULL);
+        if (IS_ERR(tdes_dd->iclk)) {
+                dev_err(dev, "clock intialization failed.\n");
+                err = PTR_ERR(tdes_dd->iclk);
+                goto clk_err;
+        }
+        tdes_dd->io_base = ioremap(tdes_dd->phys_base, tdes_phys_size);
+        if (!tdes_dd->io_base) {
+                dev_err(dev, "can't ioremap\n");
+                err = -ENOMEM;
+                goto tdes_io_err;
+        }
+        err = atmel_tdes_dma_init(tdes_dd);
+        if (err)
+                goto err_tdes_dma;
+        spin_lock(&atmel_tdes.lock);
+        list_add_tail(&tdes_dd->list, &atmel_tdes.dev_list);
+        spin_unlock(&atmel_tdes.lock);
+        err = atmel_tdes_register_algs(tdes_dd);
+        if (err)
+                goto err_algs;
+        dev_info(dev, "Atmel DES/TDES\n");
+        return 0;
+err_algs:
+        spin_lock(&atmel_tdes.lock);
+        list_del(&tdes_dd->list);
+        spin_unlock(&atmel_tdes.lock);
+        atmel_tdes_dma_cleanup(tdes_dd);
+err_tdes_dma:
+        iounmap(tdes_dd->io_base);
+tdes_io_err:
+        clk_put(tdes_dd->iclk);
+clk_err:
+        free_irq(tdes_dd->irq, tdes_dd);
+tdes_irq_err:
+res_err:
+        tasklet_kill(&tdes_dd->done_task);
+        tasklet_kill(&tdes_dd->queue_task);
+        kfree(tdes_dd);
+        tdes_dd = NULL;
+tdes_dd_err:
+        dev_err(dev, "initialization failed.\n");
+        return err;
+}
+static int __devexit atmel_tdes_remove(struct platform_device *pdev)
+{
+        static struct atmel_tdes_dev *tdes_dd;
+        tdes_dd = platform_get_drvdata(pdev);
+        if (!tdes_dd)
+                return -ENODEV;
+        spin_lock(&atmel_tdes.lock);
+        list_del(&tdes_dd->list);
+        spin_unlock(&atmel_tdes.lock);
+        atmel_tdes_unregister_algs(tdes_dd);
+        tasklet_kill(&tdes_dd->done_task);
+        tasklet_kill(&tdes_dd->queue_task);
+        atmel_tdes_dma_cleanup(tdes_dd);
+        iounmap(tdes_dd->io_base);
+        clk_put(tdes_dd->iclk);
+        if (tdes_dd->irq >= 0)
+                free_irq(tdes_dd->irq, tdes_dd);
+        kfree(tdes_dd);
+        tdes_dd = NULL;
+        return 0;
+}
+static struct platform_driver atmel_tdes_driver = {
+        .probe          = atmel_tdes_probe,
+        .remove         = __devexit_p(atmel_tdes_remove),
+        .driver         = {
+                .name   = "atmel_tdes",
+                .owner  = THIS_MODULE,
+        },
+};
+module_platform_driver(atmel_tdes_driver);
+MODULE_DESCRIPTION("Atmel DES/TDES hw acceleration support.");
+MODULE_LICENSE("GPL v2");
+MODULE_AUTHOR("Nicolas Royer - Eukréa Electromatique");
diff --git a/drivers/crypto/bfin_crc.c b/drivers/crypto/bfin_crc.c
new file mode 100644
index 000000000000..5398580b4313
--- /dev/null
+++ b/drivers/crypto/bfin_crc.c
@@ -0,0 +1,780 @@
+/*
+ * Cryptographic API.
+ *
+ * Support Blackfin CRC HW acceleration.
+ *
+ * Copyright 2012 Analog Devices Inc.
+ *
+ * Licensed under the GPL-2.
+ */
+#include <linux/err.h>
+#include <linux/device.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/errno.h>
+#include <linux/interrupt.h>
+#include <linux/kernel.h>
+#include <linux/irq.h>
+#include <linux/io.h>
+#include <linux/platform_device.h>
+#include <linux/scatterlist.h>
+#include <linux/dma-mapping.h>
+#include <linux/delay.h>
+#include <linux/unaligned/access_ok.h>
+#include <linux/crypto.h>
+#include <linux/cryptohash.h>
+#include <crypto/scatterwalk.h>
+#include <crypto/algapi.h>
+#include <crypto/hash.h>
+#include <crypto/internal/hash.h>
+#include <asm/blackfin.h>
+#include <asm/bfin_crc.h>
+#include <asm/dma.h>
+#include <asm/portmux.h>
+#define CRC_CCRYPTO_QUEUE_LENGTH        5
+#define DRIVER_NAME "bfin-hmac-crc"
+#define CHKSUM_DIGEST_SIZE      4
+#define CHKSUM_BLOCK_SIZE       1
+#define CRC_MAX_DMA_DESC        100
+#define CRC_CRYPTO_STATE_UPDATE         1
+#define CRC_CRYPTO_STATE_FINALUPDATE    2
+#define CRC_CRYPTO_STATE_FINISH         3
+struct bfin_crypto_crc {
+        struct list_head        list;
+        struct device           *dev;
+        spinlock_t              lock;
+        int                     irq;
+        int                     dma_ch;
+        u32                     poly;
+        volatile struct crc_register *regs;
+        struct ahash_request    *req; /* current request in operation */
+        struct dma_desc_array   *sg_cpu; /* virt addr of sg dma descriptors */
+        dma_addr_t              sg_dma; /* phy addr of sg dma descriptors */
+        u8                      *sg_mid_buf;
+        struct tasklet_struct   done_task;
+        struct crypto_queue     queue; /* waiting requests */
+        u8                      busy:1; /* crc device in operation flag */
+};
+static struct bfin_crypto_crc_list {
+        struct list_head        dev_list;
+        spinlock_t              lock;
+} crc_list;
+struct bfin_crypto_crc_reqctx {
+        struct bfin_crypto_crc  *crc;
+        unsigned int            total;  /* total request bytes */
+        size_t                  sg_buflen; /* bytes for this update */
+        unsigned int            sg_nents;
+        struct scatterlist      *sg; /* sg list head for this update*/
+        struct scatterlist      bufsl[2]; /* chained sg list */
+        size_t                  bufnext_len;
+        size_t                  buflast_len;
+        u8                      bufnext[CHKSUM_DIGEST_SIZE]; /* extra bytes for next udpate */
+        u8                      buflast[CHKSUM_DIGEST_SIZE]; /* extra bytes from last udpate */
+        u8                      flag;
+};
+struct bfin_crypto_crc_ctx {
+        struct bfin_crypto_crc  *crc;
+        u32                     key;
+};
+/*
+ * derive number of elements in scatterlist
+ */
+static int sg_count(struct scatterlist *sg_list)
+{
+        struct scatterlist *sg = sg_list;
+        int sg_nents = 1;
+        if (sg_list == NULL)
+                return 0;
+        while (!sg_is_last(sg)) {
+                sg_nents++;
+                sg = scatterwalk_sg_next(sg);
+        }
+        return sg_nents;
+}
+/*
+ * get element in scatter list by given index
+ */
+static struct scatterlist *sg_get(struct scatterlist *sg_list, unsigned int nents,
+                                unsigned int index)
+{
+        struct scatterlist *sg = NULL;
+        int i;
+        for_each_sg(sg_list, sg, nents, i)
+                if (i == index)
+                        break;
+        return sg;
+}
+static int bfin_crypto_crc_init_hw(struct bfin_crypto_crc *crc, u32 key)
+{
+        crc->regs->datacntrld = 0;
+        crc->regs->control = MODE_CALC_CRC << OPMODE_OFFSET;
+        crc->regs->curresult = key;
+        /* setup CRC interrupts */
+        crc->regs->status = CMPERRI | DCNTEXPI;
+        crc->regs->intrenset = CMPERRI | DCNTEXPI;
+        SSYNC();
+        return 0;
+}
+static int bfin_crypto_crc_init(struct ahash_request *req)
+{
+        struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
+        struct bfin_crypto_crc_ctx *crc_ctx = crypto_ahash_ctx(tfm);
+        struct bfin_crypto_crc_reqctx *ctx = ahash_request_ctx(req);
+        struct bfin_crypto_crc *crc;
+        dev_dbg(crc->dev, "crc_init\n");
+        spin_lock_bh(&crc_list.lock);
+        list_for_each_entry(crc, &crc_list.dev_list, list) {
+                crc_ctx->crc = crc;
+                break;
+        }
+        spin_unlock_bh(&crc_list.lock);
+        if (sg_count(req->src) > CRC_MAX_DMA_DESC) {
+                dev_dbg(crc->dev, "init: requested sg list is too big > %d\n",
+                        CRC_MAX_DMA_DESC);
+                return -EINVAL;
+        }
+        ctx->crc = crc;
+        ctx->bufnext_len = 0;
+        ctx->buflast_len = 0;
+        ctx->sg_buflen = 0;
+        ctx->total = 0;
+        ctx->flag = 0;
+        /* init crc results */
+        put_unaligned_le32(crc_ctx->key, req->result);
+        dev_dbg(crc->dev, "init: digest size: %d\n",
+                crypto_ahash_digestsize(tfm));
+        return bfin_crypto_crc_init_hw(crc, crc_ctx->key);
+}
+static void bfin_crypto_crc_config_dma(struct bfin_crypto_crc *crc)
+{
+        struct scatterlist *sg;
+        struct bfin_crypto_crc_reqctx *ctx = ahash_request_ctx(crc->req);
+        int i = 0, j = 0;
+        unsigned long dma_config;
+        unsigned int dma_count;
+        unsigned int dma_addr;
+        unsigned int mid_dma_count = 0;
+        int dma_mod;
+        dma_map_sg(crc->dev, ctx->sg, ctx->sg_nents, DMA_TO_DEVICE);
+        for_each_sg(ctx->sg, sg, ctx->sg_nents, j) {
+                dma_config = DMAFLOW_ARRAY | RESTART | NDSIZE_3 | DMAEN | PSIZE_32;
+                dma_addr = sg_dma_address(sg);
+                /* deduce extra bytes in last sg */
+                if (sg_is_last(sg))
+                        dma_count = sg_dma_len(sg) - ctx->bufnext_len;
+                else
+                        dma_count = sg_dma_len(sg);
+                if (mid_dma_count) {
+                        /* Append last middle dma buffer to 4 bytes with first
+                           bytes in current sg buffer. Move addr of current
+                           sg and deduce the length of current sg.
+                         */
+                        memcpy(crc->sg_mid_buf +((i-1) << 2) + mid_dma_count,
+                                (void *)dma_addr,
+                                CHKSUM_DIGEST_SIZE - mid_dma_count);
+                        dma_addr += CHKSUM_DIGEST_SIZE - mid_dma_count;
+                        dma_count -= CHKSUM_DIGEST_SIZE - mid_dma_count;
+                }
+                /* chop current sg dma len to multiple of 32 bits */
+                mid_dma_count = dma_count % 4;
+                dma_count &= ~0x3;
+                if (dma_addr % 4 == 0) {
+                        dma_config |= WDSIZE_32;
+                        dma_count >>= 2;
+                        dma_mod = 4;
+                } else if (dma_addr % 2 == 0) {
+                        dma_config |= WDSIZE_16;
+                        dma_count >>= 1;
+                        dma_mod = 2;
+                } else {
+                        dma_config |= WDSIZE_8;
+                        dma_mod = 1;
+                }
+                crc->sg_cpu[i].start_addr = dma_addr;
+                crc->sg_cpu[i].cfg = dma_config;
+                crc->sg_cpu[i].x_count = dma_count;
+                crc->sg_cpu[i].x_modify = dma_mod;
+                dev_dbg(crc->dev, "%d: crc_dma: start_addr:0x%lx, "
+                        "cfg:0x%lx, x_count:0x%lx, x_modify:0x%lx\n",
+                        i, crc->sg_cpu[i].start_addr,
+                        crc->sg_cpu[i].cfg, crc->sg_cpu[i].x_count,
+                        crc->sg_cpu[i].x_modify);
+                i++;
+                if (mid_dma_count) {
+                        /* copy extra bytes to next middle dma buffer */
+                        dma_config = DMAFLOW_ARRAY | RESTART | NDSIZE_3 |
+                                DMAEN | PSIZE_32 | WDSIZE_32;
+                        memcpy(crc->sg_mid_buf + (i << 2),
+                                (void *)(dma_addr + (dma_count << 2)),
+                                mid_dma_count);
+                        /* setup new dma descriptor for next middle dma */
+                        crc->sg_cpu[i].start_addr = dma_map_single(crc->dev,
+                                        crc->sg_mid_buf + (i << 2),
+                                        CHKSUM_DIGEST_SIZE, DMA_TO_DEVICE);
+                        crc->sg_cpu[i].cfg = dma_config;
+                        crc->sg_cpu[i].x_count = 1;
+                        crc->sg_cpu[i].x_modify = CHKSUM_DIGEST_SIZE;
+                        dev_dbg(crc->dev, "%d: crc_dma: start_addr:0x%lx, "
+                                "cfg:0x%lx, x_count:0x%lx, x_modify:0x%lx\n",
+                                i, crc->sg_cpu[i].start_addr,
+                                crc->sg_cpu[i].cfg, crc->sg_cpu[i].x_count,
+                                crc->sg_cpu[i].x_modify);
+                        i++;
+                }
+        }
+        dma_config = DMAFLOW_ARRAY | RESTART | NDSIZE_3 | DMAEN | PSIZE_32 | WDSIZE_32;
+        /* For final update req, append the buffer for next update as well*/
+        if (ctx->bufnext_len && (ctx->flag == CRC_CRYPTO_STATE_FINALUPDATE ||
+                ctx->flag == CRC_CRYPTO_STATE_FINISH)) {
+                crc->sg_cpu[i].start_addr = dma_map_single(crc->dev, ctx->bufnext,
+                                                CHKSUM_DIGEST_SIZE, DMA_TO_DEVICE);
+                crc->sg_cpu[i].cfg = dma_config;
+                crc->sg_cpu[i].x_count = 1;
+                crc->sg_cpu[i].x_modify = CHKSUM_DIGEST_SIZE;
+                dev_dbg(crc->dev, "%d: crc_dma: start_addr:0x%lx, "
+                        "cfg:0x%lx, x_count:0x%lx, x_modify:0x%lx\n",
+                        i, crc->sg_cpu[i].start_addr,
+                        crc->sg_cpu[i].cfg, crc->sg_cpu[i].x_count,
+                        crc->sg_cpu[i].x_modify);
+                i++;
+        }
+        if (i == 0)
+                return;
+        flush_dcache_range((unsigned int)crc->sg_cpu,
+                        (unsigned int)crc->sg_cpu +
+                        i * sizeof(struct dma_desc_array));
+        /* Set the last descriptor to stop mode */
+        crc->sg_cpu[i - 1].cfg &= ~(DMAFLOW | NDSIZE);
+        crc->sg_cpu[i - 1].cfg |= DI_EN;
+        set_dma_curr_desc_addr(crc->dma_ch, (unsigned long *)crc->sg_dma);
+        set_dma_x_count(crc->dma_ch, 0);
+        set_dma_x_modify(crc->dma_ch, 0);
+        SSYNC();
+        set_dma_config(crc->dma_ch, dma_config);
+}
+static int bfin_crypto_crc_handle_queue(struct bfin_crypto_crc *crc,
+                                  struct ahash_request *req)
+{
+        struct crypto_async_request *async_req, *backlog;
+        struct bfin_crypto_crc_reqctx *ctx;
+        struct scatterlist *sg;
+        int ret = 0;
+        int nsg, i, j;
+        unsigned int nextlen;
+        unsigned long flags;
+        spin_lock_irqsave(&crc->lock, flags);
+        if (req)
+                ret = ahash_enqueue_request(&crc->queue, req);
+        if (crc->busy) {
+                spin_unlock_irqrestore(&crc->lock, flags);
+                return ret;
+        }
+        backlog = crypto_get_backlog(&crc->queue);
+        async_req = crypto_dequeue_request(&crc->queue);
+        if (async_req)
+                crc->busy = 1;
+        spin_unlock_irqrestore(&crc->lock, flags);
+        if (!async_req)
+                return ret;
+        if (backlog)
+                backlog->complete(backlog, -EINPROGRESS);
+        req = ahash_request_cast(async_req);
+        crc->req = req;
+        ctx = ahash_request_ctx(req);
+        ctx->sg = NULL;
+        ctx->sg_buflen = 0;
+        ctx->sg_nents = 0;
+        dev_dbg(crc->dev, "handling new req, flag=%u, nbytes: %d\n",
+                                                ctx->flag, req->nbytes);
+        if (ctx->flag == CRC_CRYPTO_STATE_FINISH) {
+                if (ctx->bufnext_len == 0) {
+                        crc->busy = 0;
+                        return 0;
+                }
+                /* Pack last crc update buffer to 32bit */
+                memset(ctx->bufnext + ctx->bufnext_len, 0,
+                                CHKSUM_DIGEST_SIZE - ctx->bufnext_len);
+        } else {
+                /* Pack small data which is less than 32bit to buffer for next update. */
+                if (ctx->bufnext_len + req->nbytes < CHKSUM_DIGEST_SIZE) {
+                        memcpy(ctx->bufnext + ctx->bufnext_len,
+                                sg_virt(req->src), req->nbytes);
+                        ctx->bufnext_len += req->nbytes;
+                        if (ctx->flag == CRC_CRYPTO_STATE_FINALUPDATE &&
+                                ctx->bufnext_len) {
+                                goto finish_update;
+                        } else {
+                                crc->busy = 0;
+                                return 0;
+                        }
+                }
+                if (ctx->bufnext_len) {
+                        /* Chain in extra bytes of last update */
+                        ctx->buflast_len = ctx->bufnext_len;
+                        memcpy(ctx->buflast, ctx->bufnext, ctx->buflast_len);
+                        nsg = ctx->sg_buflen ? 2 : 1;
+                        sg_init_table(ctx->bufsl, nsg);
+                        sg_set_buf(ctx->bufsl, ctx->buflast, ctx->buflast_len);
+                        if (nsg > 1)
+                                scatterwalk_sg_chain(ctx->bufsl, nsg,
+                                                req->src);
+                        ctx->sg = ctx->bufsl;
+                } else
+                        ctx->sg = req->src;
+                /* Chop crc buffer size to multiple of 32 bit */
+                nsg = ctx->sg_nents = sg_count(ctx->sg);
+                ctx->sg_buflen = ctx->buflast_len + req->nbytes;
+                ctx->bufnext_len = ctx->sg_buflen % 4;
+                ctx->sg_buflen &= ~0x3;
+                if (ctx->bufnext_len) {
+                        /* copy extra bytes to buffer for next update */
+                        memset(ctx->bufnext, 0, CHKSUM_DIGEST_SIZE);
+                        nextlen = ctx->bufnext_len;
+                        for (i = nsg - 1; i >= 0; i--) {
+                                sg = sg_get(ctx->sg, nsg, i);
+                                j = min(nextlen, sg_dma_len(sg));
+                                memcpy(ctx->bufnext + nextlen - j,
+                                        sg_virt(sg) + sg_dma_len(sg) - j, j);
+                                if (j == sg_dma_len(sg))
+                                        ctx->sg_nents--;
+                                nextlen -= j;
+                                if (nextlen == 0)
+                                        break;
+                        }
+                }
+        }
+finish_update:
+        if (ctx->bufnext_len && (ctx->flag == CRC_CRYPTO_STATE_FINALUPDATE ||
+                ctx->flag == CRC_CRYPTO_STATE_FINISH))
+                ctx->sg_buflen += CHKSUM_DIGEST_SIZE;
+        /* set CRC data count before start DMA */
+        crc->regs->datacnt = ctx->sg_buflen >> 2;
+        /* setup and enable CRC DMA */
+        bfin_crypto_crc_config_dma(crc);
+        /* finally kick off CRC operation */
+        crc->regs->control |= BLKEN;
+        SSYNC();
+        return -EINPROGRESS;
+}
+static int bfin_crypto_crc_update(struct ahash_request *req)
+{
+        struct bfin_crypto_crc_reqctx *ctx = ahash_request_ctx(req);
+        if (!req->nbytes)
+                return 0;
+        dev_dbg(ctx->crc->dev, "crc_update\n");
+        ctx->total += req->nbytes;
+        ctx->flag = CRC_CRYPTO_STATE_UPDATE;
+        return bfin_crypto_crc_handle_queue(ctx->crc, req);
+}
+static int bfin_crypto_crc_final(struct ahash_request *req)
+{
+        struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
+        struct bfin_crypto_crc_ctx *crc_ctx = crypto_ahash_ctx(tfm);
+        struct bfin_crypto_crc_reqctx *ctx = ahash_request_ctx(req);
+        dev_dbg(ctx->crc->dev, "crc_final\n");
+        ctx->flag = CRC_CRYPTO_STATE_FINISH;
+        crc_ctx->key = 0;
+        return bfin_crypto_crc_handle_queue(ctx->crc, req);
+}
+static int bfin_crypto_crc_finup(struct ahash_request *req)
+{
+        struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
+        struct bfin_crypto_crc_ctx *crc_ctx = crypto_ahash_ctx(tfm);
+        struct bfin_crypto_crc_reqctx *ctx = ahash_request_ctx(req);
+        dev_dbg(ctx->crc->dev, "crc_finishupdate\n");
+        ctx->total += req->nbytes;
+        ctx->flag = CRC_CRYPTO_STATE_FINALUPDATE;
+        crc_ctx->key = 0;
+        return bfin_crypto_crc_handle_queue(ctx->crc, req);
+}
+static int bfin_crypto_crc_digest(struct ahash_request *req)
+{
+        int ret;
+        ret = bfin_crypto_crc_init(req);
+        if (ret)
+                return ret;
+        return bfin_crypto_crc_finup(req);
+}
+static int bfin_crypto_crc_setkey(struct crypto_ahash *tfm, const u8 *key,
+                        unsigned int keylen)
+{
+        struct bfin_crypto_crc_ctx *crc_ctx = crypto_ahash_ctx(tfm);
+        dev_dbg(crc_ctx->crc->dev, "crc_setkey\n");
+        if (keylen != CHKSUM_DIGEST_SIZE) {
+                crypto_ahash_set_flags(tfm, CRYPTO_TFM_RES_BAD_KEY_LEN);
+                return -EINVAL;
+        }
+        crc_ctx->key = get_unaligned_le32(key);
+        return 0;
+}
+static int bfin_crypto_crc_cra_init(struct crypto_tfm *tfm)
+{
+        struct bfin_crypto_crc_ctx *crc_ctx = crypto_tfm_ctx(tfm);
+        crc_ctx->key = 0;
+        crypto_ahash_set_reqsize(__crypto_ahash_cast(tfm),
+                                 sizeof(struct bfin_crypto_crc_reqctx));
+        return 0;
+}
+static void bfin_crypto_crc_cra_exit(struct crypto_tfm *tfm)
+{
+}
+static struct ahash_alg algs = {
+        .init           = bfin_crypto_crc_init,
+        .update         = bfin_crypto_crc_update,
+        .final          = bfin_crypto_crc_final,
+        .finup          = bfin_crypto_crc_finup,
+        .digest         = bfin_crypto_crc_digest,
+        .setkey         = bfin_crypto_crc_setkey,
+        .halg.digestsize        = CHKSUM_DIGEST_SIZE,
+        .halg.base      = {
+                .cra_name               = "hmac(crc32)",
+                .cra_driver_name        = DRIVER_NAME,
+                .cra_priority           = 100,
+                .cra_flags              = CRYPTO_ALG_TYPE_AHASH |
+                                                CRYPTO_ALG_ASYNC,
+                .cra_blocksize          = CHKSUM_BLOCK_SIZE,
+                .cra_ctxsize            = sizeof(struct bfin_crypto_crc_ctx),
+                .cra_alignmask          = 3,
+                .cra_module             = THIS_MODULE,
+                .cra_init               = bfin_crypto_crc_cra_init,
+                .cra_exit               = bfin_crypto_crc_cra_exit,
+        }
+};
+static void bfin_crypto_crc_done_task(unsigned long data)
+{
+        struct bfin_crypto_crc *crc = (struct bfin_crypto_crc *)data;
+        bfin_crypto_crc_handle_queue(crc, NULL);
+}
+static irqreturn_t bfin_crypto_crc_handler(int irq, void *dev_id)
+{
+        struct bfin_crypto_crc *crc = dev_id;
+        if (crc->regs->status & DCNTEXP) {
+                crc->regs->status = DCNTEXP;
+                SSYNC();
+                /* prepare results */
+                put_unaligned_le32(crc->regs->result, crc->req->result);
+                crc->regs->control &= ~BLKEN;
+                crc->busy = 0;
+                if (crc->req->base.complete)
+                        crc->req->base.complete(&crc->req->base, 0);
+                tasklet_schedule(&crc->done_task);
+                return IRQ_HANDLED;
+        } else
+                return IRQ_NONE;
+}
+#ifdef CONFIG_PM
+/**
+ *      bfin_crypto_crc_suspend - suspend crc device
+ *      @pdev: device being suspended
+ *      @state: requested suspend state
+ */
+static int bfin_crypto_crc_suspend(struct platform_device *pdev, pm_message_t state)
+{
+        struct bfin_crypto_crc *crc = platform_get_drvdata(pdev);
+        int i = 100000;
+        while ((crc->regs->control & BLKEN) && --i)
+                cpu_relax();
+        if (i == 0)
+                return -EBUSY;
+        return 0;
+}
+#else
+# define bfin_crypto_crc_suspend NULL
+#endif
+#define bfin_crypto_crc_resume NULL
+/**
+ *      bfin_crypto_crc_probe - Initialize module
+ *
+ */
+static int __devinit bfin_crypto_crc_probe(struct platform_device *pdev)
+{
+        struct device *dev = &pdev->dev;
+        struct resource *res;
+        struct bfin_crypto_crc *crc;
+        unsigned int timeout = 100000;
+        int ret;
+        crc = kzalloc(sizeof(*crc), GFP_KERNEL);
+        if (!crc) {
+                dev_err(&pdev->dev, "fail to malloc bfin_crypto_crc\n");
+                return -ENOMEM;
+        }
+        crc->dev = dev;
+        INIT_LIST_HEAD(&crc->list);
+        spin_lock_init(&crc->lock);
+        tasklet_init(&crc->done_task, bfin_crypto_crc_done_task, (unsigned long)crc);
+        crypto_init_queue(&crc->queue, CRC_CCRYPTO_QUEUE_LENGTH);
+        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+        if (res == NULL) {
+                dev_err(&pdev->dev, "Cannot get IORESOURCE_MEM\n");
+                ret = -ENOENT;
+                goto out_error_free_mem;
+        }
+        crc->regs = ioremap(res->start, resource_size(res));
+        if (!crc->regs) {
+                dev_err(&pdev->dev, "Cannot map CRC IO\n");
+                ret = -ENXIO;
+                goto out_error_free_mem;
+        }
+        crc->irq = platform_get_irq(pdev, 0);
+        if (crc->irq < 0) {
+                dev_err(&pdev->dev, "No CRC DCNTEXP IRQ specified\n");
+                ret = -ENOENT;
+                goto out_error_unmap;
+        }
+        ret = request_irq(crc->irq, bfin_crypto_crc_handler, IRQF_SHARED, dev_name(dev), crc);
+        if (ret) {
+                dev_err(&pdev->dev, "Unable to request blackfin crc irq\n");
+                goto out_error_unmap;
+        }
+        res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
+        if (res == NULL) {
+                dev_err(&pdev->dev, "No CRC DMA channel specified\n");
+                ret = -ENOENT;
+                goto out_error_irq;
+        }
+        crc->dma_ch = res->start;
+        ret = request_dma(crc->dma_ch, dev_name(dev));
+        if (ret) {
+                dev_err(&pdev->dev, "Unable to attach Blackfin CRC DMA channel\n");
+                goto out_error_irq;
+        }
+        crc->sg_cpu = dma_alloc_coherent(&pdev->dev, PAGE_SIZE, &crc->sg_dma, GFP_KERNEL);
+        if (crc->sg_cpu == NULL) {
+                ret = -ENOMEM;
+                goto out_error_dma;
+        }
+        /*
+         * need at most CRC_MAX_DMA_DESC sg + CRC_MAX_DMA_DESC middle  +
+         * 1 last + 1 next dma descriptors
+         */
+        crc->sg_mid_buf = (u8 *)(crc->sg_cpu + ((CRC_MAX_DMA_DESC + 1) << 1));
+        crc->regs->control = 0;
+        SSYNC();
+        crc->regs->poly = crc->poly = (u32)pdev->dev.platform_data;
+        SSYNC();
+        while (!(crc->regs->status & LUTDONE) && (--timeout) > 0)
+                cpu_relax();
+        if (timeout == 0)
+                dev_info(&pdev->dev, "init crc poly timeout\n");
+        spin_lock(&crc_list.lock);
+        list_add(&crc->list, &crc_list.dev_list);
+        spin_unlock(&crc_list.lock);
+        platform_set_drvdata(pdev, crc);
+        ret = crypto_register_ahash(&algs);
+        if (ret) {
+                spin_lock(&crc_list.lock);
+                list_del(&crc->list);
+                spin_unlock(&crc_list.lock);
+                dev_err(&pdev->dev, "Cann't register crypto ahash device\n");
+                goto out_error_dma;
+        }
+        dev_info(&pdev->dev, "initialized\n");
+        return 0;
+out_error_dma:
+        if (crc->sg_cpu)
+                dma_free_coherent(&pdev->dev, PAGE_SIZE, crc->sg_cpu, crc->sg_dma);
+        free_dma(crc->dma_ch);
+out_error_irq:
+        free_irq(crc->irq, crc->dev);
+out_error_unmap:
+        iounmap((void *)crc->regs);
+out_error_free_mem:
+        kfree(crc);
+        return ret;
+}
+/**
+ *      bfin_crypto_crc_remove - Initialize module
+ *
+ */
+static int __devexit bfin_crypto_crc_remove(struct platform_device *pdev)
+{
+        struct bfin_crypto_crc *crc = platform_get_drvdata(pdev);
+        if (!crc)
+                return -ENODEV;
+        spin_lock(&crc_list.lock);
+        list_del(&crc->list);
+        spin_unlock(&crc_list.lock);
+        crypto_unregister_ahash(&algs);
+        tasklet_kill(&crc->done_task);
+        iounmap((void *)crc->regs);
+        free_dma(crc->dma_ch);
+        if (crc->irq > 0)
+                free_irq(crc->irq, crc->dev);
+        kfree(crc);
+        return 0;
+}
+static struct platform_driver bfin_crypto_crc_driver = {
+        .probe     = bfin_crypto_crc_probe,
+        .remove    = __devexit_p(bfin_crypto_crc_remove),
+        .suspend   = bfin_crypto_crc_suspend,
+        .resume    = bfin_crypto_crc_resume,
+        .driver    = {
+                .name  = DRIVER_NAME,
+                .owner = THIS_MODULE,
+        },
+};
+/**
+ *      bfin_crypto_crc_mod_init - Initialize module
+ *
+ *      Checks the module params and registers the platform driver.
+ *      Real work is in the platform probe function.
+ */
+static int __init bfin_crypto_crc_mod_init(void)
+{
+        int ret;
+        pr_info("Blackfin hardware CRC crypto driver\n");
+        INIT_LIST_HEAD(&crc_list.dev_list);
+        spin_lock_init(&crc_list.lock);
+        ret = platform_driver_register(&bfin_crypto_crc_driver);
+        if (ret) {
+                pr_info(KERN_ERR "unable to register driver\n");
+                return ret;
+        }
+        return 0;
+}
+/**
+ *      bfin_crypto_crc_mod_exit - Deinitialize module
+ */
+static void __exit bfin_crypto_crc_mod_exit(void)
+{
+        platform_driver_unregister(&bfin_crypto_crc_driver);
+}
+module_init(bfin_crypto_crc_mod_init);
+module_exit(bfin_crypto_crc_mod_exit);
+MODULE_AUTHOR("Sonic Zhang <sonic.zhang@analog.com>");
+MODULE_DESCRIPTION("Blackfin CRC hardware crypto driver");
+MODULE_LICENSE("GPL");
diff --git a/drivers/crypto/caam/Kconfig b/drivers/crypto/caam/Kconfig
index 2d876bb98ff4..65c7668614ab 100644
--- a/drivers/crypto/caam/Kconfig
+++ b/drivers/crypto/caam/Kconfig
@@ -32,10 +32,13 @@ config CRYPTO_DEV_FSL_CAAM_RINGSIZE
 config CRYPTO_DEV_FSL_CAAM_INTC
        bool "Job Ring interrupt coalescing"
        depends on CRYPTO_DEV_FSL_CAAM
-        default y
+        default n
        help
          Enable the Job Ring's interrupt coalescing feature.
+          Note: the driver already provides adequate
+          interrupt coalescing in software.
 config CRYPTO_DEV_FSL_CAAM_INTC_COUNT_THLD
        int "Job Ring interrupt coalescing count threshold"
        depends on CRYPTO_DEV_FSL_CAAM_INTC
@@ -70,3 +73,28 @@ config CRYPTO_DEV_FSL_CAAM_CRYPTO_API
          To compile this as a module, choose M here: the module
          will be called caamalg.
+config CRYPTO_DEV_FSL_CAAM_AHASH_API
+        tristate "Register hash algorithm implementations with Crypto API"
+        depends on CRYPTO_DEV_FSL_CAAM
+        default y
+        select CRYPTO_AHASH
+        help
+          Selecting this will offload ahash for users of the
+          scatterlist crypto API to the SEC4 via job ring.
+          To compile this as a module, choose M here: the module
+          will be called caamhash.
+config CRYPTO_DEV_FSL_CAAM_RNG_API
+        tristate "Register caam device for hwrng API"
+        depends on CRYPTO_DEV_FSL_CAAM
+        default y
+        select CRYPTO_RNG
+        select HW_RANDOM
+        help
+          Selecting this will register the SEC4 hardware rng to
+          the hw_random API for suppying the kernel entropy pool.
+          To compile this as a module, choose M here: the module
+          will be called caamrng.
diff --git a/drivers/crypto/caam/Makefile b/drivers/crypto/caam/Makefile
index ef39011b4505..b1eb44838db5 100644
--- a/drivers/crypto/caam/Makefile
+++ b/drivers/crypto/caam/Makefile
@@ -4,5 +4,7 @@
 obj-$(CONFIG_CRYPTO_DEV_FSL_CAAM) += caam.o
 obj-$(CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API) += caamalg.o
+obj-$(CONFIG_CRYPTO_DEV_FSL_CAAM_AHASH_API) += caamhash.o
+obj-$(CONFIG_CRYPTO_DEV_FSL_CAAM_RNG_API) += caamrng.o
-caam-objs := ctrl.o jr.o error.o
+caam-objs := ctrl.o jr.o error.o key_gen.o
diff --git a/drivers/crypto/caam/caamalg.c b/drivers/crypto/caam/caamalg.c
index 4eec389184d3..0c1ea8492eff 100644
--- a/drivers/crypto/caam/caamalg.c
+++ b/drivers/crypto/caam/caamalg.c
@@ -37,9 +37,10 @@
 * | ShareDesc Pointer |
 * | SEQ_OUT_PTR       |
 * | (output buffer)   |
+ * | (output length)   |
 * | SEQ_IN_PTR        |
 * | (input buffer)    |
- * | LOAD (to DECO)    |
+ * | (input length)    |
 * ---------------------
 */
@@ -50,6 +51,8 @@
 #include "desc_constr.h"
 #include "jr.h"
 #include "error.h"
+#include "sg_sw_sec4.h"
+#include "key_gen.h"
 /*
 * crypto alg
@@ -62,7 +65,7 @@
 #define CAAM_MAX_IV_LENGTH              16
 /* length of descriptors text */
-#define DESC_JOB_IO_LEN                 (CAAM_CMD_SZ * 3 + CAAM_PTR_SZ * 3)
+#define DESC_JOB_IO_LEN                 (CAAM_CMD_SZ * 5 + CAAM_PTR_SZ * 3)
 #define DESC_AEAD_BASE                  (4 * CAAM_CMD_SZ)
 #define DESC_AEAD_ENC_LEN               (DESC_AEAD_BASE + 16 * CAAM_CMD_SZ)
@@ -143,11 +146,11 @@ static inline void aead_append_ld_iv(u32 *desc, int ivsize)
 */
 static inline void ablkcipher_append_src_dst(u32 *desc)
 {
-        append_math_add(desc, VARSEQOUTLEN, SEQINLEN, REG0, CAAM_CMD_SZ); \
+        append_math_add(desc, VARSEQOUTLEN, SEQINLEN, REG0, CAAM_CMD_SZ);
-        append_math_add(desc, VARSEQINLEN, SEQINLEN, REG0, CAAM_CMD_SZ); \
+        append_math_add(desc, VARSEQINLEN, SEQINLEN, REG0, CAAM_CMD_SZ);
-        append_seq_fifo_load(desc, 0, FIFOLD_CLASS_CLASS1 | \
+        append_seq_fifo_load(desc, 0, FIFOLD_CLASS_CLASS1 |
-                             KEY_VLF | FIFOLD_TYPE_MSG | FIFOLD_TYPE_LAST1); \
+                             KEY_VLF | FIFOLD_TYPE_MSG | FIFOLD_TYPE_LAST1);
-        append_seq_fifo_store(desc, 0, FIFOST_TYPE_MESSAGE_DATA | KEY_VLF); \
+        append_seq_fifo_store(desc, 0, FIFOST_TYPE_MESSAGE_DATA | KEY_VLF);
 }
 /*
@@ -452,121 +455,12 @@ static int aead_setauthsize(struct crypto_aead *authenc,
        return 0;
 }
-struct split_key_result {
+static u32 gen_split_aead_key(struct caam_ctx *ctx, const u8 *key_in,
-        struct completion completion;
+                              u32 authkeylen)
-        int err;
-};
-static void split_key_done(struct device *dev, u32 *desc, u32 err,
-                           void *context)
 {
-        struct split_key_result *res = context;
+        return gen_split_key(ctx->jrdev, ctx->key, ctx->split_key_len,
+                               ctx->split_key_pad_len, key_in, authkeylen,
-#ifdef DEBUG
+                               ctx->alg_op);
-        dev_err(dev, "%s %d: err 0x%x\n", __func__, __LINE__, err);
-#endif
-        if (err) {
-                char tmp[CAAM_ERROR_STR_MAX];
-                dev_err(dev, "%08x: %s\n", err, caam_jr_strstatus(tmp, err));
-        }
-        res->err = err;
-        complete(&res->completion);
-}
-/*
-get a split ipad/opad key
-Split key generation-----------------------------------------------
-[00] 0xb0810008    jobdesc: stidx=1 share=never len=8
-[01] 0x04000014        key: class2->keyreg len=20
-                        @0xffe01000
-[03] 0x84410014  operation: cls2-op sha1 hmac init dec
-[04] 0x24940000     fifold: class2 msgdata-last2 len=0 imm
-[05] 0xa4000001       jump: class2 local all ->1 [06]
-[06] 0x64260028    fifostr: class2 mdsplit-jdk len=40
-                        @0xffe04000
-*/
-static u32 gen_split_key(struct caam_ctx *ctx, const u8 *key_in, u32 authkeylen)
-{
-        struct device *jrdev = ctx->jrdev;
-        u32 *desc;
-        struct split_key_result result;
-        dma_addr_t dma_addr_in, dma_addr_out;
-        int ret = 0;
-        desc = kmalloc(CAAM_CMD_SZ * 6 + CAAM_PTR_SZ * 2, GFP_KERNEL | GFP_DMA);
-        init_job_desc(desc, 0);
-        dma_addr_in = dma_map_single(jrdev, (void *)key_in, authkeylen,
-                                     DMA_TO_DEVICE);
-        if (dma_mapping_error(jrdev, dma_addr_in)) {
-                dev_err(jrdev, "unable to map key input memory\n");
-                kfree(desc);
-                return -ENOMEM;
-        }
-        append_key(desc, dma_addr_in, authkeylen, CLASS_2 |
-                       KEY_DEST_CLASS_REG);
-        /* Sets MDHA up into an HMAC-INIT */
-        append_operation(desc, ctx->alg_op | OP_ALG_DECRYPT |
-                             OP_ALG_AS_INIT);
-        /*
-         * do a FIFO_LOAD of zero, this will trigger the internal key expansion
-           into both pads inside MDHA
-         */
-        append_fifo_load_as_imm(desc, NULL, 0, LDST_CLASS_2_CCB |
-                                FIFOLD_TYPE_MSG | FIFOLD_TYPE_LAST2);
-        /*
-         * FIFO_STORE with the explicit split-key content store
-         * (0x26 output type)
-         */
-        dma_addr_out = dma_map_single(jrdev, ctx->key, ctx->split_key_pad_len,
-                                      DMA_FROM_DEVICE);
-        if (dma_mapping_error(jrdev, dma_addr_out)) {
-                dev_err(jrdev, "unable to map key output memory\n");
-                kfree(desc);
-                return -ENOMEM;
-        }
-        append_fifo_store(desc, dma_addr_out, ctx->split_key_len,
-                          LDST_CLASS_2_CCB | FIFOST_TYPE_SPLIT_KEK);
-#ifdef DEBUG
-        print_hex_dump(KERN_ERR, "ctx.key@"xstr(__LINE__)": ",
-                       DUMP_PREFIX_ADDRESS, 16, 4, key_in, authkeylen, 1);
-        print_hex_dump(KERN_ERR, "jobdesc@"xstr(__LINE__)": ",
-                       DUMP_PREFIX_ADDRESS, 16, 4, desc, desc_bytes(desc), 1);
-#endif
-        result.err = 0;
-        init_completion(&result.completion);
-        ret = caam_jr_enqueue(jrdev, desc, split_key_done, &result);
-        if (!ret) {
-                /* in progress */
-                wait_for_completion_interruptible(&result.completion);
-                ret = result.err;
-#ifdef DEBUG
-                print_hex_dump(KERN_ERR, "ctx.key@"xstr(__LINE__)": ",
-                               DUMP_PREFIX_ADDRESS, 16, 4, ctx->key,
-                               ctx->split_key_pad_len, 1);
-#endif
-        }
-        dma_unmap_single(jrdev, dma_addr_out, ctx->split_key_pad_len,
-                         DMA_FROM_DEVICE);
-        dma_unmap_single(jrdev, dma_addr_in, authkeylen, DMA_TO_DEVICE);
-        kfree(desc);
-        return ret;
 }
 static int aead_setkey(struct crypto_aead *aead,
@@ -610,7 +504,7 @@ static int aead_setkey(struct crypto_aead *aead,
                       DUMP_PREFIX_ADDRESS, 16, 4, key, keylen, 1);
 #endif
-        ret = gen_split_key(ctx, key, authkeylen);
+        ret = gen_split_aead_key(ctx, key, authkeylen);
        if (ret) {
                goto badkey;
        }
@@ -757,72 +651,78 @@ static int ablkcipher_setkey(struct crypto_ablkcipher *ablkcipher,
        return ret;
 }
-struct link_tbl_entry {
-        u64 ptr;
-        u32 len;
-        u8 reserved;
-        u8 buf_pool_id;
-        u16 offset;
-};
 /*
 * aead_edesc - s/w-extended aead descriptor
 * @assoc_nents: number of segments in associated data (SPI+Seq) scatterlist
+ * @assoc_chained: if source is chained
 * @src_nents: number of segments in input scatterlist
+ * @src_chained: if source is chained
 * @dst_nents: number of segments in output scatterlist
+ * @dst_chained: if destination is chained
 * @iv_dma: dma address of iv for checking continuity and link table
 * @desc: h/w descriptor (variable length; must not exceed MAX_CAAM_DESCSIZE)
- * @link_tbl_bytes: length of dma mapped link_tbl space
+ * @sec4_sg_bytes: length of dma mapped sec4_sg space
- * @link_tbl_dma: bus physical mapped address of h/w link table
+ * @sec4_sg_dma: bus physical mapped address of h/w link table
 * @hw_desc: the h/w job descriptor followed by any referenced link tables
 */
 struct aead_edesc {
        int assoc_nents;
+        bool assoc_chained;
        int src_nents;
+        bool src_chained;
        int dst_nents;
+        bool dst_chained;
        dma_addr_t iv_dma;
-        int link_tbl_bytes;
+        int sec4_sg_bytes;
-        dma_addr_t link_tbl_dma;
+        dma_addr_t sec4_sg_dma;
-        struct link_tbl_entry *link_tbl;
+        struct sec4_sg_entry *sec4_sg;
        u32 hw_desc[0];
 };
 /*
 * ablkcipher_edesc - s/w-extended ablkcipher descriptor
 * @src_nents: number of segments in input scatterlist
+ * @src_chained: if source is chained
 * @dst_nents: number of segments in output scatterlist
+ * @dst_chained: if destination is chained
 * @iv_dma: dma address of iv for checking continuity and link table
 * @desc: h/w descriptor (variable length; must not exceed MAX_CAAM_DESCSIZE)
- * @link_tbl_bytes: length of dma mapped link_tbl space
+ * @sec4_sg_bytes: length of dma mapped sec4_sg space
- * @link_tbl_dma: bus physical mapped address of h/w link table
+ * @sec4_sg_dma: bus physical mapped address of h/w link table
 * @hw_desc: the h/w job descriptor followed by any referenced link tables
 */
 struct ablkcipher_edesc {
        int src_nents;
+        bool src_chained;
        int dst_nents;
+        bool dst_chained;
        dma_addr_t iv_dma;
-        int link_tbl_bytes;
+        int sec4_sg_bytes;
-        dma_addr_t link_tbl_dma;
+        dma_addr_t sec4_sg_dma;
-        struct link_tbl_entry *link_tbl;
+        struct sec4_sg_entry *sec4_sg;
        u32 hw_desc[0];
 };
 static void caam_unmap(struct device *dev, struct scatterlist *src,
-                       struct scatterlist *dst, int src_nents, int dst_nents,
+                       struct scatterlist *dst, int src_nents,
-                       dma_addr_t iv_dma, int ivsize, dma_addr_t link_tbl_dma,
+                       bool src_chained, int dst_nents, bool dst_chained,
-                       int link_tbl_bytes)
+                       dma_addr_t iv_dma, int ivsize, dma_addr_t sec4_sg_dma,
+                       int sec4_sg_bytes)
 {
-        if (unlikely(dst != src)) {
+        if (dst != src) {
-                dma_unmap_sg(dev, src, src_nents, DMA_TO_DEVICE);
+                dma_unmap_sg_chained(dev, src, src_nents ? : 1, DMA_TO_DEVICE,
-                dma_unmap_sg(dev, dst, dst_nents, DMA_FROM_DEVICE);
+                                     src_chained);
+                dma_unmap_sg_chained(dev, dst, dst_nents ? : 1, DMA_FROM_DEVICE,
+                                     dst_chained);
        } else {
-                dma_unmap_sg(dev, src, src_nents, DMA_BIDIRECTIONAL);
+                dma_unmap_sg_chained(dev, src, src_nents ? : 1,
+                                     DMA_BIDIRECTIONAL, src_chained);
        }
        if (iv_dma)
                dma_unmap_single(dev, iv_dma, ivsize, DMA_TO_DEVICE);
-        if (link_tbl_bytes)
+        if (sec4_sg_bytes)
-                dma_unmap_single(dev, link_tbl_dma, link_tbl_bytes,
+                dma_unmap_single(dev, sec4_sg_dma, sec4_sg_bytes,
                                 DMA_TO_DEVICE);
 }
@@ -833,12 +733,13 @@ static void aead_unmap(struct device *dev,
        struct crypto_aead *aead = crypto_aead_reqtfm(req);
        int ivsize = crypto_aead_ivsize(aead);
-        dma_unmap_sg(dev, req->assoc, edesc->assoc_nents, DMA_TO_DEVICE);
+        dma_unmap_sg_chained(dev, req->assoc, edesc->assoc_nents,
+                             DMA_TO_DEVICE, edesc->assoc_chained);
        caam_unmap(dev, req->src, req->dst,
-                   edesc->src_nents, edesc->dst_nents,
+                   edesc->src_nents, edesc->src_chained, edesc->dst_nents,
-                   edesc->iv_dma, ivsize, edesc->link_tbl_dma,
+                   edesc->dst_chained, edesc->iv_dma, ivsize,
-                   edesc->link_tbl_bytes);
+                   edesc->sec4_sg_dma, edesc->sec4_sg_bytes);
 }
 static void ablkcipher_unmap(struct device *dev,
@@ -849,9 +750,9 @@ static void ablkcipher_unmap(struct device *dev,
        int ivsize = crypto_ablkcipher_ivsize(ablkcipher);
        caam_unmap(dev, req->src, req->dst,
-                   edesc->src_nents, edesc->dst_nents,
+                   edesc->src_nents, edesc->src_chained, edesc->dst_nents,
-                   edesc->iv_dma, ivsize, edesc->link_tbl_dma,
+                   edesc->dst_chained, edesc->iv_dma, ivsize,
-                   edesc->link_tbl_bytes);
+                   edesc->sec4_sg_dma, edesc->sec4_sg_bytes);
 }
 static void aead_encrypt_done(struct device *jrdev, u32 *desc, u32 err,
@@ -942,7 +843,7 @@ static void aead_decrypt_done(struct device *jrdev, u32 *desc, u32 err,
                       sizeof(struct iphdr) + req->assoclen +
                       ((req->cryptlen > 1500) ? 1500 : req->cryptlen) +
                       ctx->authsize + 36, 1);
-        if (!err && edesc->link_tbl_bytes) {
+        if (!err && edesc->sec4_sg_bytes) {
                struct scatterlist *sg = sg_last(req->src, edesc->src_nents);
                print_hex_dump(KERN_ERR, "sglastout@"xstr(__LINE__)": ",
                               DUMP_PREFIX_ADDRESS, 16, 4, sg_virt(sg),
@@ -1026,50 +927,6 @@ static void ablkcipher_decrypt_done(struct device *jrdev, u32 *desc, u32 err,
        ablkcipher_request_complete(req, err);
 }
-static void sg_to_link_tbl_one(struct link_tbl_entry *link_tbl_ptr,
-                               dma_addr_t dma, u32 len, u32 offset)
-{
-        link_tbl_ptr->ptr = dma;
-        link_tbl_ptr->len = len;
-        link_tbl_ptr->reserved = 0;
-        link_tbl_ptr->buf_pool_id = 0;
-        link_tbl_ptr->offset = offset;
-#ifdef DEBUG
-        print_hex_dump(KERN_ERR, "link_tbl_ptr@"xstr(__LINE__)": ",
-                       DUMP_PREFIX_ADDRESS, 16, 4, link_tbl_ptr,
-                       sizeof(struct link_tbl_entry), 1);
-#endif
-}
-/*
- * convert scatterlist to h/w link table format
- * but does not have final bit; instead, returns last entry
- */
-static struct link_tbl_entry *sg_to_link_tbl(struct scatterlist *sg,
-                                             int sg_count, struct link_tbl_entry
-                                             *link_tbl_ptr, u32 offset)
-{
-        while (sg_count) {
-                sg_to_link_tbl_one(link_tbl_ptr, sg_dma_address(sg),
-                                   sg_dma_len(sg), offset);
-                link_tbl_ptr++;
-                sg = sg_next(sg);
-                sg_count--;
-        }
-        return link_tbl_ptr - 1;
-}
-/*
- * convert scatterlist to h/w link table format
- * scatterlist must have been previously dma mapped
- */
-static void sg_to_link_tbl_last(struct scatterlist *sg, int sg_count,
-                                struct link_tbl_entry *link_tbl_ptr, u32 offset)
-{
-        link_tbl_ptr = sg_to_link_tbl(sg, sg_count, link_tbl_ptr, offset);
-        link_tbl_ptr->len |= 0x40000000;
-}
 /*
 * Fill in aead job descriptor
 */
@@ -1085,7 +942,7 @@ static void init_aead_job(u32 *sh_desc, dma_addr_t ptr,
        u32 *desc = edesc->hw_desc;
        u32 out_options = 0, in_options;
        dma_addr_t dst_dma, src_dma;
-        int len, link_tbl_index = 0;
+        int len, sec4_sg_index = 0;
 #ifdef DEBUG
        debug("assoclen %d cryptlen %d authsize %d\n",
@@ -1111,9 +968,9 @@ static void init_aead_job(u32 *sh_desc, dma_addr_t ptr,
                src_dma = sg_dma_address(req->assoc);
                in_options = 0;
        } else {
-                src_dma = edesc->link_tbl_dma;
+                src_dma = edesc->sec4_sg_dma;
-                link_tbl_index += (edesc->assoc_nents ? : 1) + 1 +
+                sec4_sg_index += (edesc->assoc_nents ? : 1) + 1 +
-                                  (edesc->src_nents ? : 1);
+                                 (edesc->src_nents ? : 1);
                in_options = LDST_SGF;
        }
        if (encrypt)
@@ -1127,7 +984,7 @@ static void init_aead_job(u32 *sh_desc, dma_addr_t ptr,
                if (all_contig) {
                        dst_dma = sg_dma_address(req->src);
                } else {
-                        dst_dma = src_dma + sizeof(struct link_tbl_entry) *
+                        dst_dma = src_dma + sizeof(struct sec4_sg_entry) *
                                  ((edesc->assoc_nents ? : 1) + 1);
                        out_options = LDST_SGF;
                }
@@ -1135,9 +992,9 @@ static void init_aead_job(u32 *sh_desc, dma_addr_t ptr,
                if (!edesc->dst_nents) {
                        dst_dma = sg_dma_address(req->dst);
                } else {
-                        dst_dma = edesc->link_tbl_dma +
+                        dst_dma = edesc->sec4_sg_dma +
-                                  link_tbl_index *
+                                  sec4_sg_index *
-                                  sizeof(struct link_tbl_entry);
+                                  sizeof(struct sec4_sg_entry);
                        out_options = LDST_SGF;
                }
        }
@@ -1163,7 +1020,7 @@ static void init_aead_giv_job(u32 *sh_desc, dma_addr_t ptr,
        u32 *desc = edesc->hw_desc;
        u32 out_options = 0, in_options;
        dma_addr_t dst_dma, src_dma;
-        int len, link_tbl_index = 0;
+        int len, sec4_sg_index = 0;
 #ifdef DEBUG
        debug("assoclen %d cryptlen %d authsize %d\n",
@@ -1188,8 +1045,8 @@ static void init_aead_giv_job(u32 *sh_desc, dma_addr_t ptr,
                src_dma = sg_dma_address(req->assoc);
                in_options = 0;
        } else {
-                src_dma = edesc->link_tbl_dma;
+                src_dma = edesc->sec4_sg_dma;
-                link_tbl_index += edesc->assoc_nents + 1 + edesc->src_nents;
+                sec4_sg_index += edesc->assoc_nents + 1 + edesc->src_nents;
                in_options = LDST_SGF;
        }
        append_seq_in_ptr(desc, src_dma, req->assoclen + ivsize +
@@ -1199,13 +1056,13 @@ static void init_aead_giv_job(u32 *sh_desc, dma_addr_t ptr,
                dst_dma = edesc->iv_dma;
        } else {
                if (likely(req->src == req->dst)) {
-                        dst_dma = src_dma + sizeof(struct link_tbl_entry) *
+                        dst_dma = src_dma + sizeof(struct sec4_sg_entry) *
                                  edesc->assoc_nents;
                        out_options = LDST_SGF;
                } else {
-                        dst_dma = edesc->link_tbl_dma +
+                        dst_dma = edesc->sec4_sg_dma +
-                                  link_tbl_index *
+                                  sec4_sg_index *
-                                  sizeof(struct link_tbl_entry);
+                                  sizeof(struct sec4_sg_entry);
                        out_options = LDST_SGF;
                }
        }
@@ -1226,7 +1083,7 @@ static void init_ablkcipher_job(u32 *sh_desc, dma_addr_t ptr,
        u32 *desc = edesc->hw_desc;
        u32 out_options = 0, in_options;
        dma_addr_t dst_dma, src_dma;
-        int len, link_tbl_index = 0;
+        int len, sec4_sg_index = 0;
 #ifdef DEBUG
        print_hex_dump(KERN_ERR, "presciv@"xstr(__LINE__)": ",
@@ -1244,8 +1101,8 @@ static void init_ablkcipher_job(u32 *sh_desc, dma_addr_t ptr,
                src_dma = edesc->iv_dma;
                in_options = 0;
        } else {
-                src_dma = edesc->link_tbl_dma;
+                src_dma = edesc->sec4_sg_dma;
-                link_tbl_index += (iv_contig ? 0 : 1) + edesc->src_nents;
+                sec4_sg_index += (iv_contig ? 0 : 1) + edesc->src_nents;
                in_options = LDST_SGF;
        }
        append_seq_in_ptr(desc, src_dma, req->nbytes + ivsize, in_options);
@@ -1254,16 +1111,16 @@ static void init_ablkcipher_job(u32 *sh_desc, dma_addr_t ptr,
                if (!edesc->src_nents && iv_contig) {
                        dst_dma = sg_dma_address(req->src);
                } else {
-                        dst_dma = edesc->link_tbl_dma +
+                        dst_dma = edesc->sec4_sg_dma +
-                                sizeof(struct link_tbl_entry);
+                                sizeof(struct sec4_sg_entry);
                        out_options = LDST_SGF;
                }
        } else {
                if (!edesc->dst_nents) {
                        dst_dma = sg_dma_address(req->dst);
                } else {
-                        dst_dma = edesc->link_tbl_dma +
+                        dst_dma = edesc->sec4_sg_dma +
-                                link_tbl_index * sizeof(struct link_tbl_entry);
+                                sec4_sg_index * sizeof(struct sec4_sg_entry);
                        out_options = LDST_SGF;
                }
        }
@@ -1271,28 +1128,6 @@ static void init_ablkcipher_job(u32 *sh_desc, dma_addr_t ptr,
 }
 /*
- * derive number of elements in scatterlist
- */
-static int sg_count(struct scatterlist *sg_list, int nbytes)
-{
-        struct scatterlist *sg = sg_list;
-        int sg_nents = 0;
-        while (nbytes > 0) {
-                sg_nents++;
-                nbytes -= sg->length;
-                if (!sg_is_last(sg) && (sg + 1)->length == 0)
-                        BUG(); /* Not support chaining */
-                sg = scatterwalk_sg_next(sg);
-        }
-        if (likely(sg_nents == 1))
-                return 0;
-        return sg_nents;
-}
-/*
 * allocate and map the aead extended descriptor
 */
 static struct aead_edesc *aead_edesc_alloc(struct aead_request *req,
@@ -1308,25 +1143,26 @@ static struct aead_edesc *aead_edesc_alloc(struct aead_request *req,
        dma_addr_t iv_dma = 0;
        int sgc;
        bool all_contig = true;
+        bool assoc_chained = false, src_chained = false, dst_chained = false;
        int ivsize = crypto_aead_ivsize(aead);
-        int link_tbl_index, link_tbl_len = 0, link_tbl_bytes;
+        int sec4_sg_index, sec4_sg_len = 0, sec4_sg_bytes;
-        assoc_nents = sg_count(req->assoc, req->assoclen);
+        assoc_nents = sg_count(req->assoc, req->assoclen, &assoc_chained);
-        src_nents = sg_count(req->src, req->cryptlen);
+        src_nents = sg_count(req->src, req->cryptlen, &src_chained);
        if (unlikely(req->dst != req->src))
-                dst_nents = sg_count(req->dst, req->cryptlen);
+                dst_nents = sg_count(req->dst, req->cryptlen, &dst_chained);
-        sgc = dma_map_sg(jrdev, req->assoc, assoc_nents ? : 1,
+        sgc = dma_map_sg_chained(jrdev, req->assoc, assoc_nents ? : 1,
-                         DMA_BIDIRECTIONAL);
+                                 DMA_BIDIRECTIONAL, assoc_chained);
        if (likely(req->src == req->dst)) {
-                sgc = dma_map_sg(jrdev, req->src, src_nents ? : 1,
+                sgc = dma_map_sg_chained(jrdev, req->src, src_nents ? : 1,
-                                 DMA_BIDIRECTIONAL);
+                                         DMA_BIDIRECTIONAL, src_chained);
        } else {
-                sgc = dma_map_sg(jrdev, req->src, src_nents ? : 1,
+                sgc = dma_map_sg_chained(jrdev, req->src, src_nents ? : 1,
-                                 DMA_TO_DEVICE);
+                                         DMA_TO_DEVICE, src_chained);
-                sgc = dma_map_sg(jrdev, req->dst, dst_nents ? : 1,
+                sgc = dma_map_sg_chained(jrdev, req->dst, dst_nents ? : 1,
-                                 DMA_FROM_DEVICE);
+                                         DMA_FROM_DEVICE, dst_chained);
        }
        /* Check if data are contiguous */
@@ -1337,50 +1173,53 @@ static struct aead_edesc *aead_edesc_alloc(struct aead_request *req,
                all_contig = false;
                assoc_nents = assoc_nents ? : 1;
                src_nents = src_nents ? : 1;
-                link_tbl_len = assoc_nents + 1 + src_nents;
+                sec4_sg_len = assoc_nents + 1 + src_nents;
        }
-        link_tbl_len += dst_nents;
+        sec4_sg_len += dst_nents;
-        link_tbl_bytes = link_tbl_len * sizeof(struct link_tbl_entry);
+        sec4_sg_bytes = sec4_sg_len * sizeof(struct sec4_sg_entry);
        /* allocate space for base edesc and hw desc commands, link tables */
        edesc = kmalloc(sizeof(struct aead_edesc) + desc_bytes +
-                        link_tbl_bytes, GFP_DMA | flags);
+                        sec4_sg_bytes, GFP_DMA | flags);
        if (!edesc) {
                dev_err(jrdev, "could not allocate extended descriptor\n");
                return ERR_PTR(-ENOMEM);
        }
        edesc->assoc_nents = assoc_nents;
+        edesc->assoc_chained = assoc_chained;
        edesc->src_nents = src_nents;
+        edesc->src_chained = src_chained;
        edesc->dst_nents = dst_nents;
+        edesc->dst_chained = dst_chained;
        edesc->iv_dma = iv_dma;
-        edesc->link_tbl_bytes = link_tbl_bytes;
+        edesc->sec4_sg_bytes = sec4_sg_bytes;
-        edesc->link_tbl = (void *)edesc + sizeof(struct aead_edesc) +
+        edesc->sec4_sg = (void *)edesc + sizeof(struct aead_edesc) +
-                          desc_bytes;
+                         desc_bytes;
-        edesc->link_tbl_dma = dma_map_single(jrdev, edesc->link_tbl,
+        edesc->sec4_sg_dma = dma_map_single(jrdev, edesc->sec4_sg,
-                                             link_tbl_bytes, DMA_TO_DEVICE);
+                                            sec4_sg_bytes, DMA_TO_DEVICE);
        *all_contig_ptr = all_contig;
-        link_tbl_index = 0;
+        sec4_sg_index = 0;
        if (!all_contig) {
-                sg_to_link_tbl(req->assoc,
+                sg_to_sec4_sg(req->assoc,
-                               (assoc_nents ? : 1),
+                              (assoc_nents ? : 1),
-                               edesc->link_tbl +
+                              edesc->sec4_sg +
-                               link_tbl_index, 0);
+                              sec4_sg_index, 0);
-                link_tbl_index += assoc_nents ? : 1;
+                sec4_sg_index += assoc_nents ? : 1;
-                sg_to_link_tbl_one(edesc->link_tbl + link_tbl_index,
+                dma_to_sec4_sg_one(edesc->sec4_sg + sec4_sg_index,
                                   iv_dma, ivsize, 0);
-                link_tbl_index += 1;
+                sec4_sg_index += 1;
-                sg_to_link_tbl_last(req->src,
+                sg_to_sec4_sg_last(req->src,
-                                    (src_nents ? : 1),
+                                   (src_nents ? : 1),
-                                    edesc->link_tbl +
+                                   edesc->sec4_sg +
-                                    link_tbl_index, 0);
+                                   sec4_sg_index, 0);
-                link_tbl_index += src_nents ? : 1;
+                sec4_sg_index += src_nents ? : 1;
        }
        if (dst_nents) {
-                sg_to_link_tbl_last(req->dst, dst_nents,
+                sg_to_sec4_sg_last(req->dst, dst_nents,
-                                    edesc->link_tbl + link_tbl_index, 0);
+                                   edesc->sec4_sg + sec4_sg_index, 0);
        }
        return edesc;
@@ -1487,24 +1326,25 @@ static struct aead_edesc *aead_giv_edesc_alloc(struct aead_givcrypt_request
        int sgc;
        u32 contig = GIV_SRC_CONTIG | GIV_DST_CONTIG;
        int ivsize = crypto_aead_ivsize(aead);
-        int link_tbl_index, link_tbl_len = 0, link_tbl_bytes;
+        bool assoc_chained = false, src_chained = false, dst_chained = false;
+        int sec4_sg_index, sec4_sg_len = 0, sec4_sg_bytes;
-        assoc_nents = sg_count(req->assoc, req->assoclen);
+        assoc_nents = sg_count(req->assoc, req->assoclen, &assoc_chained);
-        src_nents = sg_count(req->src, req->cryptlen);
+        src_nents = sg_count(req->src, req->cryptlen, &src_chained);
        if (unlikely(req->dst != req->src))
-                dst_nents = sg_count(req->dst, req->cryptlen);
+                dst_nents = sg_count(req->dst, req->cryptlen, &dst_chained);
-        sgc = dma_map_sg(jrdev, req->assoc, assoc_nents ? : 1,
+        sgc = dma_map_sg_chained(jrdev, req->assoc, assoc_nents ? : 1,
-                         DMA_BIDIRECTIONAL);
+                                 DMA_BIDIRECTIONAL, assoc_chained);
        if (likely(req->src == req->dst)) {
-                sgc = dma_map_sg(jrdev, req->src, src_nents ? : 1,
+                sgc = dma_map_sg_chained(jrdev, req->src, src_nents ? : 1,
-                                 DMA_BIDIRECTIONAL);
+                                         DMA_BIDIRECTIONAL, src_chained);
        } else {
-                sgc = dma_map_sg(jrdev, req->src, src_nents ? : 1,
+                sgc = dma_map_sg_chained(jrdev, req->src, src_nents ? : 1,
-                                 DMA_TO_DEVICE);
+                                         DMA_TO_DEVICE, src_chained);
-                sgc = dma_map_sg(jrdev, req->dst, dst_nents ? : 1,
+                sgc = dma_map_sg_chained(jrdev, req->dst, dst_nents ? : 1,
-                                 DMA_FROM_DEVICE);
+                                         DMA_FROM_DEVICE, dst_chained);
        }
        /* Check if data are contiguous */
@@ -1516,58 +1356,61 @@ static struct aead_edesc *aead_giv_edesc_alloc(struct aead_givcrypt_request
                contig &= ~GIV_DST_CONTIG;
                if (unlikely(req->src != req->dst)) {
                        dst_nents = dst_nents ? : 1;
-                        link_tbl_len += 1;
+                        sec4_sg_len += 1;
                }
        if (!(contig & GIV_SRC_CONTIG)) {
                assoc_nents = assoc_nents ? : 1;
                src_nents = src_nents ? : 1;
-                link_tbl_len += assoc_nents + 1 + src_nents;
+                sec4_sg_len += assoc_nents + 1 + src_nents;
                if (likely(req->src == req->dst))
                        contig &= ~GIV_DST_CONTIG;
        }
-        link_tbl_len += dst_nents;
+        sec4_sg_len += dst_nents;
-        link_tbl_bytes = link_tbl_len * sizeof(struct link_tbl_entry);
+        sec4_sg_bytes = sec4_sg_len * sizeof(struct sec4_sg_entry);
        /* allocate space for base edesc and hw desc commands, link tables */
        edesc = kmalloc(sizeof(struct aead_edesc) + desc_bytes +
-                        link_tbl_bytes, GFP_DMA | flags);
+                        sec4_sg_bytes, GFP_DMA | flags);
        if (!edesc) {
                dev_err(jrdev, "could not allocate extended descriptor\n");
                return ERR_PTR(-ENOMEM);
        }
        edesc->assoc_nents = assoc_nents;
+        edesc->assoc_chained = assoc_chained;
        edesc->src_nents = src_nents;
+        edesc->src_chained = src_chained;
        edesc->dst_nents = dst_nents;
+        edesc->dst_chained = dst_chained;
        edesc->iv_dma = iv_dma;
-        edesc->link_tbl_bytes = link_tbl_bytes;
+        edesc->sec4_sg_bytes = sec4_sg_bytes;
-        edesc->link_tbl = (void *)edesc + sizeof(struct aead_edesc) +
+        edesc->sec4_sg = (void *)edesc + sizeof(struct aead_edesc) +
-                          desc_bytes;
+                         desc_bytes;
-        edesc->link_tbl_dma = dma_map_single(jrdev, edesc->link_tbl,
+        edesc->sec4_sg_dma = dma_map_single(jrdev, edesc->sec4_sg,
-                                             link_tbl_bytes, DMA_TO_DEVICE);
+                                            sec4_sg_bytes, DMA_TO_DEVICE);
        *contig_ptr = contig;
-        link_tbl_index = 0;
+        sec4_sg_index = 0;
        if (!(contig & GIV_SRC_CONTIG)) {
-                sg_to_link_tbl(req->assoc, assoc_nents,
+                sg_to_sec4_sg(req->assoc, assoc_nents,
-                               edesc->link_tbl +
+                              edesc->sec4_sg +
-                               link_tbl_index, 0);
+                              sec4_sg_index, 0);
-                link_tbl_index += assoc_nents;
+                sec4_sg_index += assoc_nents;
-                sg_to_link_tbl_one(edesc->link_tbl + link_tbl_index,
+                dma_to_sec4_sg_one(edesc->sec4_sg + sec4_sg_index,
                                   iv_dma, ivsize, 0);
-                link_tbl_index += 1;
+                sec4_sg_index += 1;
-                sg_to_link_tbl_last(req->src, src_nents,
+                sg_to_sec4_sg_last(req->src, src_nents,
-                                    edesc->link_tbl +
+                                   edesc->sec4_sg +
-                                    link_tbl_index, 0);
+                                   sec4_sg_index, 0);
-                link_tbl_index += src_nents;
+                sec4_sg_index += src_nents;
        }
        if (unlikely(req->src != req->dst && !(contig & GIV_DST_CONTIG))) {
-                sg_to_link_tbl_one(edesc->link_tbl + link_tbl_index,
+                dma_to_sec4_sg_one(edesc->sec4_sg + sec4_sg_index,
                                   iv_dma, ivsize, 0);
-                link_tbl_index += 1;
+                sec4_sg_index += 1;
-                sg_to_link_tbl_last(req->dst, dst_nents,
+                sg_to_sec4_sg_last(req->dst, dst_nents,
-                                    edesc->link_tbl + link_tbl_index, 0);
+                                   edesc->sec4_sg + sec4_sg_index, 0);
        }
        return edesc;
@@ -1633,27 +1476,28 @@ static struct ablkcipher_edesc *ablkcipher_edesc_alloc(struct ablkcipher_request
        gfp_t flags = (req->base.flags & (CRYPTO_TFM_REQ_MAY_BACKLOG |
                                          CRYPTO_TFM_REQ_MAY_SLEEP)) ?
                       GFP_KERNEL : GFP_ATOMIC;
-        int src_nents, dst_nents = 0, link_tbl_bytes;
+        int src_nents, dst_nents = 0, sec4_sg_bytes;
        struct ablkcipher_edesc *edesc;
        dma_addr_t iv_dma = 0;
        bool iv_contig = false;
        int sgc;
        int ivsize = crypto_ablkcipher_ivsize(ablkcipher);
-        int link_tbl_index;
+        bool src_chained = false, dst_chained = false;
+        int sec4_sg_index;
-        src_nents = sg_count(req->src, req->nbytes);
+        src_nents = sg_count(req->src, req->nbytes, &src_chained);
-        if (unlikely(req->dst != req->src))
+        if (req->dst != req->src)
-                dst_nents = sg_count(req->dst, req->nbytes);
+                dst_nents = sg_count(req->dst, req->nbytes, &dst_chained);
        if (likely(req->src == req->dst)) {
-                sgc = dma_map_sg(jrdev, req->src, src_nents ? : 1,
+                sgc = dma_map_sg_chained(jrdev, req->src, src_nents ? : 1,
-                                 DMA_BIDIRECTIONAL);
+                                         DMA_BIDIRECTIONAL, src_chained);
        } else {
-                sgc = dma_map_sg(jrdev, req->src, src_nents ? : 1,
+                sgc = dma_map_sg_chained(jrdev, req->src, src_nents ? : 1,
-                                 DMA_TO_DEVICE);
+                                         DMA_TO_DEVICE, src_chained);
-                sgc = dma_map_sg(jrdev, req->dst, dst_nents ? : 1,
+                sgc = dma_map_sg_chained(jrdev, req->dst, dst_nents ? : 1,
-                                 DMA_FROM_DEVICE);
+                                         DMA_FROM_DEVICE, dst_chained);
        }
        /*
@@ -1665,44 +1509,46 @@ static struct ablkcipher_edesc *ablkcipher_edesc_alloc(struct ablkcipher_request
                iv_contig = true;
        else
                src_nents = src_nents ? : 1;
-        link_tbl_bytes = ((iv_contig ? 0 : 1) + src_nents + dst_nents) *
+        sec4_sg_bytes = ((iv_contig ? 0 : 1) + src_nents + dst_nents) *
-                         sizeof(struct link_tbl_entry);
+                        sizeof(struct sec4_sg_entry);
        /* allocate space for base edesc and hw desc commands, link tables */
        edesc = kmalloc(sizeof(struct ablkcipher_edesc) + desc_bytes +
-                        link_tbl_bytes, GFP_DMA | flags);
+                        sec4_sg_bytes, GFP_DMA | flags);
        if (!edesc) {
                dev_err(jrdev, "could not allocate extended descriptor\n");
                return ERR_PTR(-ENOMEM);
        }
        edesc->src_nents = src_nents;
+        edesc->src_chained = src_chained;
        edesc->dst_nents = dst_nents;
-        edesc->link_tbl_bytes = link_tbl_bytes;
+        edesc->dst_chained = dst_chained;
-        edesc->link_tbl = (void *)edesc + sizeof(struct ablkcipher_edesc) +
+        edesc->sec4_sg_bytes = sec4_sg_bytes;
-                          desc_bytes;
+        edesc->sec4_sg = (void *)edesc + sizeof(struct ablkcipher_edesc) +
+                         desc_bytes;
-        link_tbl_index = 0;
+        sec4_sg_index = 0;
        if (!iv_contig) {
-                sg_to_link_tbl_one(edesc->link_tbl, iv_dma, ivsize, 0);
+                dma_to_sec4_sg_one(edesc->sec4_sg, iv_dma, ivsize, 0);
-                sg_to_link_tbl_last(req->src, src_nents,
+                sg_to_sec4_sg_last(req->src, src_nents,
-                                    edesc->link_tbl + 1, 0);
+                                   edesc->sec4_sg + 1, 0);
-                link_tbl_index += 1 + src_nents;
+                sec4_sg_index += 1 + src_nents;
        }
-        if (unlikely(dst_nents)) {
+        if (dst_nents) {
-                sg_to_link_tbl_last(req->dst, dst_nents,
+                sg_to_sec4_sg_last(req->dst, dst_nents,
-                        edesc->link_tbl + link_tbl_index, 0);
+                        edesc->sec4_sg + sec4_sg_index, 0);
        }
-        edesc->link_tbl_dma = dma_map_single(jrdev, edesc->link_tbl,
+        edesc->sec4_sg_dma = dma_map_single(jrdev, edesc->sec4_sg,
-                                             link_tbl_bytes, DMA_TO_DEVICE);
+                                            sec4_sg_bytes, DMA_TO_DEVICE);
        edesc->iv_dma = iv_dma;
 #ifdef DEBUG
-        print_hex_dump(KERN_ERR, "ablkcipher link_tbl@"xstr(__LINE__)": ",
+        print_hex_dump(KERN_ERR, "ablkcipher sec4_sg@"xstr(__LINE__)": ",
-                       DUMP_PREFIX_ADDRESS, 16, 4, edesc->link_tbl,
+                       DUMP_PREFIX_ADDRESS, 16, 4, edesc->sec4_sg,
-                       link_tbl_bytes, 1);
+                       sec4_sg_bytes, 1);
 #endif
        *iv_contig_out = iv_contig;
@@ -2227,7 +2073,7 @@ static int caam_cra_init(struct crypto_tfm *tfm)
         * distribute tfms across job rings to ensure in-order
         * crypto request processing per tfm
         */
-        ctx->jrdev = priv->algapi_jr[(tgt_jr / 2) % priv->num_jrs_for_algapi];
+        ctx->jrdev = priv->jrdev[(tgt_jr / 2) % priv->total_jobrs];
        /* copy descriptor header template value */
        ctx->class1_alg_type = OP_TYPE_CLASS1_ALG | caam_alg->class1_alg_type;
@@ -2264,7 +2110,6 @@ static void __exit caam_algapi_exit(void)
        struct device *ctrldev;
        struct caam_drv_private *priv;
        struct caam_crypto_alg *t_alg, *n;
-        int i, err;
        dev_node = of_find_compatible_node(NULL, NULL, "fsl,sec-v4.0");
        if (!dev_node) {
@@ -2289,13 +2134,6 @@ static void __exit caam_algapi_exit(void)
                list_del(&t_alg->entry);
                kfree(t_alg);
        }
-        for (i = 0; i < priv->total_jobrs; i++) {
-                err = caam_jr_deregister(priv->algapi_jr[i]);
-                if (err < 0)
-                        break;
-        }
-        kfree(priv->algapi_jr);
 }
 static struct caam_crypto_alg *caam_alg_alloc(struct device *ctrldev,
@@ -2348,7 +2186,7 @@ static int __init caam_algapi_init(void)
 {
        struct device_node *dev_node;
        struct platform_device *pdev;
-        struct device *ctrldev, **jrdev;
+        struct device *ctrldev;
        struct caam_drv_private *priv;
        int i = 0, err = 0;
@@ -2369,24 +2207,6 @@ static int __init caam_algapi_init(void)
        INIT_LIST_HEAD(&priv->alg_list);
-        jrdev = kmalloc(sizeof(*jrdev) * priv->total_jobrs, GFP_KERNEL);
-        if (!jrdev)
-                return -ENOMEM;
-        for (i = 0; i < priv->total_jobrs; i++) {
-                err = caam_jr_register(ctrldev, &jrdev[i]);
-                if (err < 0)
-                        break;
-        }
-        if (err < 0 && i == 0) {
-                dev_err(ctrldev, "algapi error in job ring registration: %d\n",
-                        err);
-                kfree(jrdev);
-                return err;
-        }
-        priv->num_jrs_for_algapi = i;
-        priv->algapi_jr = jrdev;
        atomic_set(&priv->tfm_count, -1);
        /* register crypto algorithms the device supports */
diff --git a/drivers/crypto/caam/caamhash.c b/drivers/crypto/caam/caamhash.c
new file mode 100644
index 000000000000..895aaf2bca92
--- /dev/null
+++ b/drivers/crypto/caam/caamhash.c
@@ -0,0 +1,1878 @@
+/*
+ * caam - Freescale FSL CAAM support for ahash functions of crypto API
+ *
+ * Copyright 2011 Freescale Semiconductor, Inc.
+ *
+ * Based on caamalg.c crypto API driver.
+ *
+ * relationship of digest job descriptor or first job descriptor after init to
+ * shared descriptors:
+ *
+ * ---------------                     ---------------
+ * | JobDesc #1  |-------------------->|  ShareDesc  |
+ * | *(packet 1) |                     |  (hashKey)  |
+ * ---------------                     | (operation) |
+ *                                     ---------------
+ *
+ * relationship of subsequent job descriptors to shared descriptors:
+ *
+ * ---------------                     ---------------
+ * | JobDesc #2  |-------------------->|  ShareDesc  |
+ * | *(packet 2) |      |------------->|  (hashKey)  |
+ * ---------------      |    |-------->| (operation) |
+ *       .              |    |         | (load ctx2) |
+ *       .              |    |         ---------------
+ * ---------------      |    |
+ * | JobDesc #3  |------|    |
+ * | *(packet 3) |           |
+ * ---------------           |
+ *       .                   |
+ *       .                   |
+ * ---------------           |
+ * | JobDesc #4  |------------
+ * | *(packet 4) |
+ * ---------------
+ *
+ * The SharedDesc never changes for a connection unless rekeyed, but
+ * each packet will likely be in a different place. So all we need
+ * to know to process the packet is where the input is, where the
+ * output goes, and what context we want to process with. Context is
+ * in the SharedDesc, packet references in the JobDesc.
+ *
+ * So, a job desc looks like:
+ *
+ * ---------------------
+ * | Header            |
+ * | ShareDesc Pointer |
+ * | SEQ_OUT_PTR       |
+ * | (output buffer)   |
+ * | (output length)   |
+ * | SEQ_IN_PTR        |
+ * | (input buffer)    |
+ * | (input length)    |
+ * ---------------------
+ */
+#include "compat.h"
+#include "regs.h"
+#include "intern.h"
+#include "desc_constr.h"
+#include "jr.h"
+#include "error.h"
+#include "sg_sw_sec4.h"
+#include "key_gen.h"
+#define CAAM_CRA_PRIORITY               3000
+/* max hash key is max split key size */
+#define CAAM_MAX_HASH_KEY_SIZE          (SHA512_DIGEST_SIZE * 2)
+#define CAAM_MAX_HASH_BLOCK_SIZE        SHA512_BLOCK_SIZE
+#define CAAM_MAX_HASH_DIGEST_SIZE       SHA512_DIGEST_SIZE
+/* length of descriptors text */
+#define DESC_JOB_IO_LEN                 (CAAM_CMD_SZ * 5 + CAAM_PTR_SZ * 3)
+#define DESC_AHASH_BASE                 (4 * CAAM_CMD_SZ)
+#define DESC_AHASH_UPDATE_LEN           (6 * CAAM_CMD_SZ)
+#define DESC_AHASH_UPDATE_FIRST_LEN     (DESC_AHASH_BASE + 4 * CAAM_CMD_SZ)
+#define DESC_AHASH_FINAL_LEN            (DESC_AHASH_BASE + 5 * CAAM_CMD_SZ)
+#define DESC_AHASH_FINUP_LEN            (DESC_AHASH_BASE + 5 * CAAM_CMD_SZ)
+#define DESC_AHASH_DIGEST_LEN           (DESC_AHASH_BASE + 4 * CAAM_CMD_SZ)
+#define DESC_HASH_MAX_USED_BYTES        (DESC_AHASH_FINAL_LEN + \
+                                         CAAM_MAX_HASH_KEY_SIZE)
+#define DESC_HASH_MAX_USED_LEN          (DESC_HASH_MAX_USED_BYTES / CAAM_CMD_SZ)
+/* caam context sizes for hashes: running digest + 8 */
+#define HASH_MSG_LEN                    8
+#define MAX_CTX_LEN                     (HASH_MSG_LEN + SHA512_DIGEST_SIZE)
+#ifdef DEBUG
+/* for print_hex_dumps with line references */
+#define xstr(s) str(s)
+#define str(s) #s
+#define debug(format, arg...) printk(format, arg)
+#else
+#define debug(format, arg...)
+#endif
+/* ahash per-session context */
+struct caam_hash_ctx {
+        struct device *jrdev;
+        u32 sh_desc_update[DESC_HASH_MAX_USED_LEN];
+        u32 sh_desc_update_first[DESC_HASH_MAX_USED_LEN];
+        u32 sh_desc_fin[DESC_HASH_MAX_USED_LEN];
+        u32 sh_desc_digest[DESC_HASH_MAX_USED_LEN];
+        u32 sh_desc_finup[DESC_HASH_MAX_USED_LEN];
+        dma_addr_t sh_desc_update_dma;
+        dma_addr_t sh_desc_update_first_dma;
+        dma_addr_t sh_desc_fin_dma;
+        dma_addr_t sh_desc_digest_dma;
+        dma_addr_t sh_desc_finup_dma;
+        u32 alg_type;
+        u32 alg_op;
+        u8 key[CAAM_MAX_HASH_KEY_SIZE];
+        dma_addr_t key_dma;
+        int ctx_len;
+        unsigned int split_key_len;
+        unsigned int split_key_pad_len;
+};
+/* ahash state */
+struct caam_hash_state {
+        dma_addr_t buf_dma;
+        dma_addr_t ctx_dma;
+        u8 buf_0[CAAM_MAX_HASH_BLOCK_SIZE] ____cacheline_aligned;
+        int buflen_0;
+        u8 buf_1[CAAM_MAX_HASH_BLOCK_SIZE] ____cacheline_aligned;
+        int buflen_1;
+        u8 caam_ctx[MAX_CTX_LEN];
+        int (*update)(struct ahash_request *req);
+        int (*final)(struct ahash_request *req);
+        int (*finup)(struct ahash_request *req);
+        int current_buf;
+};
+/* Common job descriptor seq in/out ptr routines */
+/* Map state->caam_ctx, and append seq_out_ptr command that points to it */
+static inline void map_seq_out_ptr_ctx(u32 *desc, struct device *jrdev,
+                                       struct caam_hash_state *state,
+                                       int ctx_len)
+{
+        state->ctx_dma = dma_map_single(jrdev, state->caam_ctx,
+                                        ctx_len, DMA_FROM_DEVICE);
+        append_seq_out_ptr(desc, state->ctx_dma, ctx_len, 0);
+}
+/* Map req->result, and append seq_out_ptr command that points to it */
+static inline dma_addr_t map_seq_out_ptr_result(u32 *desc, struct device *jrdev,
+                                                u8 *result, int digestsize)
+{
+        dma_addr_t dst_dma;
+        dst_dma = dma_map_single(jrdev, result, digestsize, DMA_FROM_DEVICE);
+        append_seq_out_ptr(desc, dst_dma, digestsize, 0);
+        return dst_dma;
+}
+/* Map current buffer in state and put it in link table */
+static inline dma_addr_t buf_map_to_sec4_sg(struct device *jrdev,
+                                            struct sec4_sg_entry *sec4_sg,
+                                            u8 *buf, int buflen)
+{
+        dma_addr_t buf_dma;
+        buf_dma = dma_map_single(jrdev, buf, buflen, DMA_TO_DEVICE);
+        dma_to_sec4_sg_one(sec4_sg, buf_dma, buflen, 0);
+        return buf_dma;
+}
+/* Map req->src and put it in link table */
+static inline void src_map_to_sec4_sg(struct device *jrdev,
+                                      struct scatterlist *src, int src_nents,
+                                      struct sec4_sg_entry *sec4_sg,
+                                      bool chained)
+{
+        dma_map_sg_chained(jrdev, src, src_nents, DMA_TO_DEVICE, chained);
+        sg_to_sec4_sg_last(src, src_nents, sec4_sg, 0);
+}
+/*
+ * Only put buffer in link table if it contains data, which is possible,
+ * since a buffer has previously been used, and needs to be unmapped,
+ */
+static inline dma_addr_t
+try_buf_map_to_sec4_sg(struct device *jrdev, struct sec4_sg_entry *sec4_sg,
+                       u8 *buf, dma_addr_t buf_dma, int buflen,
+                       int last_buflen)
+{
+        if (buf_dma && !dma_mapping_error(jrdev, buf_dma))
+                dma_unmap_single(jrdev, buf_dma, last_buflen, DMA_TO_DEVICE);
+        if (buflen)
+                buf_dma = buf_map_to_sec4_sg(jrdev, sec4_sg, buf, buflen);
+        else
+                buf_dma = 0;
+        return buf_dma;
+}
+/* Map state->caam_ctx, and add it to link table */
+static inline void ctx_map_to_sec4_sg(u32 *desc, struct device *jrdev,
+                                      struct caam_hash_state *state,
+                                      int ctx_len,
+                                      struct sec4_sg_entry *sec4_sg,
+                                      u32 flag)
+{
+        state->ctx_dma = dma_map_single(jrdev, state->caam_ctx, ctx_len, flag);
+        dma_to_sec4_sg_one(sec4_sg, state->ctx_dma, ctx_len, 0);
+}
+/* Common shared descriptor commands */
+static inline void append_key_ahash(u32 *desc, struct caam_hash_ctx *ctx)
+{
+        append_key_as_imm(desc, ctx->key, ctx->split_key_pad_len,
+                          ctx->split_key_len, CLASS_2 |
+                          KEY_DEST_MDHA_SPLIT | KEY_ENC);
+}
+/* Append key if it has been set */
+static inline void init_sh_desc_key_ahash(u32 *desc, struct caam_hash_ctx *ctx)
+{
+        u32 *key_jump_cmd;
+        init_sh_desc(desc, HDR_SHARE_WAIT);
+        if (ctx->split_key_len) {
+                /* Skip if already shared */
+                key_jump_cmd = append_jump(desc, JUMP_JSL | JUMP_TEST_ALL |
+                                           JUMP_COND_SHRD);
+                append_key_ahash(desc, ctx);
+                set_jump_tgt_here(desc, key_jump_cmd);
+        }
+        /* Propagate errors from shared to job descriptor */
+        append_cmd(desc, SET_OK_NO_PROP_ERRORS | CMD_LOAD);
+}
+/*
+ * For ahash read data from seqin following state->caam_ctx,
+ * and write resulting class2 context to seqout, which may be state->caam_ctx
+ * or req->result
+ */
+static inline void ahash_append_load_str(u32 *desc, int digestsize)
+{
+        /* Calculate remaining bytes to read */
+        append_math_add(desc, VARSEQINLEN, SEQINLEN, REG0, CAAM_CMD_SZ);
+        /* Read remaining bytes */
+        append_seq_fifo_load(desc, 0, FIFOLD_CLASS_CLASS2 | FIFOLD_TYPE_LAST2 |
+                             FIFOLD_TYPE_MSG | KEY_VLF);
+        /* Store class2 context bytes */
+        append_seq_store(desc, digestsize, LDST_CLASS_2_CCB |
+                         LDST_SRCDST_BYTE_CONTEXT);
+}
+/*
+ * For ahash update, final and finup, import context, read and write to seqout
+ */
+static inline void ahash_ctx_data_to_out(u32 *desc, u32 op, u32 state,
+                                         int digestsize,
+                                         struct caam_hash_ctx *ctx)
+{
+        init_sh_desc_key_ahash(desc, ctx);
+        /* Import context from software */
+        append_cmd(desc, CMD_SEQ_LOAD | LDST_SRCDST_BYTE_CONTEXT |
+                   LDST_CLASS_2_CCB | ctx->ctx_len);
+        /* Class 2 operation */
+        append_operation(desc, op | state | OP_ALG_ENCRYPT);
+        /*
+         * Load from buf and/or src and write to req->result or state->context
+         */
+        ahash_append_load_str(desc, digestsize);
+}
+/* For ahash firsts and digest, read and write to seqout */
+static inline void ahash_data_to_out(u32 *desc, u32 op, u32 state,
+                                     int digestsize, struct caam_hash_ctx *ctx)
+{
+        init_sh_desc_key_ahash(desc, ctx);
+        /* Class 2 operation */
+        append_operation(desc, op | state | OP_ALG_ENCRYPT);
+        /*
+         * Load from buf and/or src and write to req->result or state->context
+         */
+        ahash_append_load_str(desc, digestsize);
+}
+static int ahash_set_sh_desc(struct crypto_ahash *ahash)
+{
+        struct caam_hash_ctx *ctx = crypto_ahash_ctx(ahash);
+        int digestsize = crypto_ahash_digestsize(ahash);
+        struct device *jrdev = ctx->jrdev;
+        u32 have_key = 0;
+        u32 *desc;
+        if (ctx->split_key_len)
+                have_key = OP_ALG_AAI_HMAC_PRECOMP;
+        /* ahash_update shared descriptor */
+        desc = ctx->sh_desc_update;
+        init_sh_desc(desc, HDR_SHARE_WAIT);
+        /* Import context from software */
+        append_cmd(desc, CMD_SEQ_LOAD | LDST_SRCDST_BYTE_CONTEXT |
+                   LDST_CLASS_2_CCB | ctx->ctx_len);
+        /* Class 2 operation */
+        append_operation(desc, ctx->alg_type | OP_ALG_AS_UPDATE |
+                         OP_ALG_ENCRYPT);
+        /* Load data and write to result or context */
+        ahash_append_load_str(desc, ctx->ctx_len);
+        ctx->sh_desc_update_dma = dma_map_single(jrdev, desc, desc_bytes(desc),
+                                                 DMA_TO_DEVICE);
+        if (dma_mapping_error(jrdev, ctx->sh_desc_update_dma)) {
+                dev_err(jrdev, "unable to map shared descriptor\n");
+                return -ENOMEM;
+        }
+#ifdef DEBUG
+        print_hex_dump(KERN_ERR, "ahash update shdesc@"xstr(__LINE__)": ",
+                       DUMP_PREFIX_ADDRESS, 16, 4, desc, desc_bytes(desc), 1);
+#endif
+        /* ahash_update_first shared descriptor */
+        desc = ctx->sh_desc_update_first;
+        ahash_data_to_out(desc, have_key | ctx->alg_type, OP_ALG_AS_INIT,
+                          ctx->ctx_len, ctx);
+        ctx->sh_desc_update_first_dma = dma_map_single(jrdev, desc,
+                                                       desc_bytes(desc),
+                                                       DMA_TO_DEVICE);
+        if (dma_mapping_error(jrdev, ctx->sh_desc_update_first_dma)) {
+                dev_err(jrdev, "unable to map shared descriptor\n");
+                return -ENOMEM;
+        }
+#ifdef DEBUG
+        print_hex_dump(KERN_ERR, "ahash update first shdesc@"xstr(__LINE__)": ",
+                       DUMP_PREFIX_ADDRESS, 16, 4, desc, desc_bytes(desc), 1);
+#endif
+        /* ahash_final shared descriptor */
+        desc = ctx->sh_desc_fin;
+        ahash_ctx_data_to_out(desc, have_key | ctx->alg_type,
+                              OP_ALG_AS_FINALIZE, digestsize, ctx);
+        ctx->sh_desc_fin_dma = dma_map_single(jrdev, desc, desc_bytes(desc),
+                                              DMA_TO_DEVICE);
+        if (dma_mapping_error(jrdev, ctx->sh_desc_fin_dma)) {
+                dev_err(jrdev, "unable to map shared descriptor\n");
+                return -ENOMEM;
+        }
+#ifdef DEBUG
+        print_hex_dump(KERN_ERR, "ahash final shdesc@"xstr(__LINE__)": ",
+                       DUMP_PREFIX_ADDRESS, 16, 4, desc,
+                       desc_bytes(desc), 1);
+#endif
+        /* ahash_finup shared descriptor */
+        desc = ctx->sh_desc_finup;
+        ahash_ctx_data_to_out(desc, have_key | ctx->alg_type,
+                              OP_ALG_AS_FINALIZE, digestsize, ctx);
+        ctx->sh_desc_finup_dma = dma_map_single(jrdev, desc, desc_bytes(desc),
+                                                DMA_TO_DEVICE);
+        if (dma_mapping_error(jrdev, ctx->sh_desc_finup_dma)) {
+                dev_err(jrdev, "unable to map shared descriptor\n");
+                return -ENOMEM;
+        }
+#ifdef DEBUG
+        print_hex_dump(KERN_ERR, "ahash finup shdesc@"xstr(__LINE__)": ",
+                       DUMP_PREFIX_ADDRESS, 16, 4, desc,
+                       desc_bytes(desc), 1);
+#endif
+        /* ahash_digest shared descriptor */
+        desc = ctx->sh_desc_digest;
+        ahash_data_to_out(desc, have_key | ctx->alg_type, OP_ALG_AS_INITFINAL,
+                          digestsize, ctx);
+        ctx->sh_desc_digest_dma = dma_map_single(jrdev, desc,
+                                                 desc_bytes(desc),
+                                                 DMA_TO_DEVICE);
+        if (dma_mapping_error(jrdev, ctx->sh_desc_digest_dma)) {
+                dev_err(jrdev, "unable to map shared descriptor\n");
+                return -ENOMEM;
+        }
+#ifdef DEBUG
+        print_hex_dump(KERN_ERR, "ahash digest shdesc@"xstr(__LINE__)": ",
+                       DUMP_PREFIX_ADDRESS, 16, 4, desc,
+                       desc_bytes(desc), 1);
+#endif
+        return 0;
+}
+static u32 gen_split_hash_key(struct caam_hash_ctx *ctx, const u8 *key_in,
+                              u32 keylen)
+{
+        return gen_split_key(ctx->jrdev, ctx->key, ctx->split_key_len,
+                               ctx->split_key_pad_len, key_in, keylen,
+                               ctx->alg_op);
+}
+/* Digest hash size if it is too large */
+static u32 hash_digest_key(struct caam_hash_ctx *ctx, const u8 *key_in,
+                           u32 *keylen, u8 *key_out, u32 digestsize)
+{
+        struct device *jrdev = ctx->jrdev;
+        u32 *desc;
+        struct split_key_result result;
+        dma_addr_t src_dma, dst_dma;
+        int ret = 0;
+        desc = kmalloc(CAAM_CMD_SZ * 6 + CAAM_PTR_SZ * 2, GFP_KERNEL | GFP_DMA);
+        init_job_desc(desc, 0);
+        src_dma = dma_map_single(jrdev, (void *)key_in, *keylen,
+                                 DMA_TO_DEVICE);
+        if (dma_mapping_error(jrdev, src_dma)) {
+                dev_err(jrdev, "unable to map key input memory\n");
+                kfree(desc);
+                return -ENOMEM;
+        }
+        dst_dma = dma_map_single(jrdev, (void *)key_out, digestsize,
+                                 DMA_FROM_DEVICE);
+        if (dma_mapping_error(jrdev, dst_dma)) {
+                dev_err(jrdev, "unable to map key output memory\n");
+                dma_unmap_single(jrdev, src_dma, *keylen, DMA_TO_DEVICE);
+                kfree(desc);
+                return -ENOMEM;
+        }
+        /* Job descriptor to perform unkeyed hash on key_in */
+        append_operation(desc, ctx->alg_type | OP_ALG_ENCRYPT |
+                         OP_ALG_AS_INITFINAL);
+        append_seq_in_ptr(desc, src_dma, *keylen, 0);
+        append_seq_fifo_load(desc, *keylen, FIFOLD_CLASS_CLASS2 |
+                             FIFOLD_TYPE_LAST2 | FIFOLD_TYPE_MSG);
+        append_seq_out_ptr(desc, dst_dma, digestsize, 0);
+        append_seq_store(desc, digestsize, LDST_CLASS_2_CCB |
+                         LDST_SRCDST_BYTE_CONTEXT);
+#ifdef DEBUG
+        print_hex_dump(KERN_ERR, "key_in@"xstr(__LINE__)": ",
+                       DUMP_PREFIX_ADDRESS, 16, 4, key_in, *keylen, 1);
+        print_hex_dump(KERN_ERR, "jobdesc@"xstr(__LINE__)": ",
+                       DUMP_PREFIX_ADDRESS, 16, 4, desc, desc_bytes(desc), 1);
+#endif
+        result.err = 0;
+        init_completion(&result.completion);
+        ret = caam_jr_enqueue(jrdev, desc, split_key_done, &result);
+        if (!ret) {
+                /* in progress */
+                wait_for_completion_interruptible(&result.completion);
+                ret = result.err;
+#ifdef DEBUG
+                print_hex_dump(KERN_ERR, "digested key@"xstr(__LINE__)": ",
+                               DUMP_PREFIX_ADDRESS, 16, 4, key_in,
+                               digestsize, 1);
+#endif
+        }
+        *keylen = digestsize;
+        dma_unmap_single(jrdev, src_dma, *keylen, DMA_TO_DEVICE);
+        dma_unmap_single(jrdev, dst_dma, digestsize, DMA_FROM_DEVICE);
+        kfree(desc);
+        return ret;
+}
+static int ahash_setkey(struct crypto_ahash *ahash,
+                        const u8 *key, unsigned int keylen)
+{
+        /* Sizes for MDHA pads (*not* keys): MD5, SHA1, 224, 256, 384, 512 */
+        static const u8 mdpadlen[] = { 16, 20, 32, 32, 64, 64 };
+        struct caam_hash_ctx *ctx = crypto_ahash_ctx(ahash);
+        struct device *jrdev = ctx->jrdev;
+        int blocksize = crypto_tfm_alg_blocksize(&ahash->base);
+        int digestsize = crypto_ahash_digestsize(ahash);
+        int ret = 0;
+        u8 *hashed_key = NULL;
+#ifdef DEBUG
+        printk(KERN_ERR "keylen %d\n", keylen);
+#endif
+        if (keylen > blocksize) {
+                hashed_key = kmalloc(sizeof(u8) * digestsize, GFP_KERNEL |
+                                     GFP_DMA);
+                if (!hashed_key)
+                        return -ENOMEM;
+                ret = hash_digest_key(ctx, key, &keylen, hashed_key,
+                                      digestsize);
+                if (ret)
+                        goto badkey;
+                key = hashed_key;
+        }
+        /* Pick class 2 key length from algorithm submask */
+        ctx->split_key_len = mdpadlen[(ctx->alg_op & OP_ALG_ALGSEL_SUBMASK) >>
+                                      OP_ALG_ALGSEL_SHIFT] * 2;
+        ctx->split_key_pad_len = ALIGN(ctx->split_key_len, 16);
+#ifdef DEBUG
+        printk(KERN_ERR "split_key_len %d split_key_pad_len %d\n",
+               ctx->split_key_len, ctx->split_key_pad_len);
+        print_hex_dump(KERN_ERR, "key in @"xstr(__LINE__)": ",
+                       DUMP_PREFIX_ADDRESS, 16, 4, key, keylen, 1);
+#endif
+        ret = gen_split_hash_key(ctx, key, keylen);
+        if (ret)
+                goto badkey;
+        ctx->key_dma = dma_map_single(jrdev, ctx->key, ctx->split_key_pad_len,
+                                      DMA_TO_DEVICE);
+        if (dma_mapping_error(jrdev, ctx->key_dma)) {
+                dev_err(jrdev, "unable to map key i/o memory\n");
+                return -ENOMEM;
+        }
+#ifdef DEBUG
+        print_hex_dump(KERN_ERR, "ctx.key@"xstr(__LINE__)": ",
+                       DUMP_PREFIX_ADDRESS, 16, 4, ctx->key,
+                       ctx->split_key_pad_len, 1);
+#endif
+        ret = ahash_set_sh_desc(ahash);
+        if (ret) {
+                dma_unmap_single(jrdev, ctx->key_dma, ctx->split_key_pad_len,
+                                 DMA_TO_DEVICE);
+        }
+        kfree(hashed_key);
+        return ret;
+badkey:
+        kfree(hashed_key);
+        crypto_ahash_set_flags(ahash, CRYPTO_TFM_RES_BAD_KEY_LEN);
+        return -EINVAL;
+}
+/*
+ * ahash_edesc - s/w-extended ahash descriptor
+ * @dst_dma: physical mapped address of req->result
+ * @sec4_sg_dma: physical mapped address of h/w link table
+ * @chained: if source is chained
+ * @src_nents: number of segments in input scatterlist
+ * @sec4_sg_bytes: length of dma mapped sec4_sg space
+ * @sec4_sg: pointer to h/w link table
+ * @hw_desc: the h/w job descriptor followed by any referenced link tables
+ */
+struct ahash_edesc {
+        dma_addr_t dst_dma;
+        dma_addr_t sec4_sg_dma;
+        bool chained;
+        int src_nents;
+        int sec4_sg_bytes;
+        struct sec4_sg_entry *sec4_sg;
+        u32 hw_desc[0];
+};
+static inline void ahash_unmap(struct device *dev,
+                        struct ahash_edesc *edesc,
+                        struct ahash_request *req, int dst_len)
+{
+        if (edesc->src_nents)
+                dma_unmap_sg_chained(dev, req->src, edesc->src_nents,
+                                     DMA_TO_DEVICE, edesc->chained);
+        if (edesc->dst_dma)
+                dma_unmap_single(dev, edesc->dst_dma, dst_len, DMA_FROM_DEVICE);
+        if (edesc->sec4_sg_bytes)
+                dma_unmap_single(dev, edesc->sec4_sg_dma,
+                                 edesc->sec4_sg_bytes, DMA_TO_DEVICE);
+}
+static inline void ahash_unmap_ctx(struct device *dev,
+                        struct ahash_edesc *edesc,
+                        struct ahash_request *req, int dst_len, u32 flag)
+{
+        struct crypto_ahash *ahash = crypto_ahash_reqtfm(req);
+        struct caam_hash_ctx *ctx = crypto_ahash_ctx(ahash);
+        struct caam_hash_state *state = ahash_request_ctx(req);
+        if (state->ctx_dma)
+                dma_unmap_single(dev, state->ctx_dma, ctx->ctx_len, flag);
+        ahash_unmap(dev, edesc, req, dst_len);
+}
+static void ahash_done(struct device *jrdev, u32 *desc, u32 err,
+                       void *context)
+{
+        struct ahash_request *req = context;
+        struct ahash_edesc *edesc;
+        struct crypto_ahash *ahash = crypto_ahash_reqtfm(req);
+        int digestsize = crypto_ahash_digestsize(ahash);
+#ifdef DEBUG
+        struct caam_hash_ctx *ctx = crypto_ahash_ctx(ahash);
+        struct caam_hash_state *state = ahash_request_ctx(req);
+        dev_err(jrdev, "%s %d: err 0x%x\n", __func__, __LINE__, err);
+#endif
+        edesc = (struct ahash_edesc *)((char *)desc -
+                 offsetof(struct ahash_edesc, hw_desc));
+        if (err) {
+                char tmp[CAAM_ERROR_STR_MAX];
+                dev_err(jrdev, "%08x: %s\n", err, caam_jr_strstatus(tmp, err));
+        }
+        ahash_unmap(jrdev, edesc, req, digestsize);
+        kfree(edesc);
+#ifdef DEBUG
+        print_hex_dump(KERN_ERR, "ctx@"xstr(__LINE__)": ",
+                       DUMP_PREFIX_ADDRESS, 16, 4, state->caam_ctx,
+                       ctx->ctx_len, 1);
+        if (req->result)
+                print_hex_dump(KERN_ERR, "result@"xstr(__LINE__)": ",
+                               DUMP_PREFIX_ADDRESS, 16, 4, req->result,
+                               digestsize, 1);
+#endif
+        req->base.complete(&req->base, err);
+}
+static void ahash_done_bi(struct device *jrdev, u32 *desc, u32 err,
+                            void *context)
+{
+        struct ahash_request *req = context;
+        struct ahash_edesc *edesc;
+        struct crypto_ahash *ahash = crypto_ahash_reqtfm(req);
+        struct caam_hash_ctx *ctx = crypto_ahash_ctx(ahash);
+#ifdef DEBUG
+        struct caam_hash_state *state = ahash_request_ctx(req);
+        int digestsize = crypto_ahash_digestsize(ahash);
+        dev_err(jrdev, "%s %d: err 0x%x\n", __func__, __LINE__, err);
+#endif
+        edesc = (struct ahash_edesc *)((char *)desc -
+                 offsetof(struct ahash_edesc, hw_desc));
+        if (err) {
+                char tmp[CAAM_ERROR_STR_MAX];
+                dev_err(jrdev, "%08x: %s\n", err, caam_jr_strstatus(tmp, err));
+        }
+        ahash_unmap_ctx(jrdev, edesc, req, ctx->ctx_len, DMA_BIDIRECTIONAL);
+        kfree(edesc);
+#ifdef DEBUG
+        print_hex_dump(KERN_ERR, "ctx@"xstr(__LINE__)": ",
+                       DUMP_PREFIX_ADDRESS, 16, 4, state->caam_ctx,
+                       ctx->ctx_len, 1);
+        if (req->result)
+                print_hex_dump(KERN_ERR, "result@"xstr(__LINE__)": ",
+                               DUMP_PREFIX_ADDRESS, 16, 4, req->result,
+                               digestsize, 1);
+#endif
+        req->base.complete(&req->base, err);
+}
+static void ahash_done_ctx_src(struct device *jrdev, u32 *desc, u32 err,
+                               void *context)
+{
+        struct ahash_request *req = context;
+        struct ahash_edesc *edesc;
+        struct crypto_ahash *ahash = crypto_ahash_reqtfm(req);
+        int digestsize = crypto_ahash_digestsize(ahash);
+#ifdef DEBUG
+        struct caam_hash_ctx *ctx = crypto_ahash_ctx(ahash);
+        struct caam_hash_state *state = ahash_request_ctx(req);
+        dev_err(jrdev, "%s %d: err 0x%x\n", __func__, __LINE__, err);
+#endif
+        edesc = (struct ahash_edesc *)((char *)desc -
+                 offsetof(struct ahash_edesc, hw_desc));
+        if (err) {
+                char tmp[CAAM_ERROR_STR_MAX];
+                dev_err(jrdev, "%08x: %s\n", err, caam_jr_strstatus(tmp, err));
+        }
+        ahash_unmap_ctx(jrdev, edesc, req, digestsize, DMA_FROM_DEVICE);
+        kfree(edesc);
+#ifdef DEBUG
+        print_hex_dump(KERN_ERR, "ctx@"xstr(__LINE__)": ",
+                       DUMP_PREFIX_ADDRESS, 16, 4, state->caam_ctx,
+                       ctx->ctx_len, 1);
+        if (req->result)
+                print_hex_dump(KERN_ERR, "result@"xstr(__LINE__)": ",
+                               DUMP_PREFIX_ADDRESS, 16, 4, req->result,
+                               digestsize, 1);
+#endif
+        req->base.complete(&req->base, err);
+}
+static void ahash_done_ctx_dst(struct device *jrdev, u32 *desc, u32 err,
+                               void *context)
+{
+        struct ahash_request *req = context;
+        struct ahash_edesc *edesc;
+        struct crypto_ahash *ahash = crypto_ahash_reqtfm(req);
+        struct caam_hash_ctx *ctx = crypto_ahash_ctx(ahash);
+#ifdef DEBUG
+        struct caam_hash_state *state = ahash_request_ctx(req);
+        int digestsize = crypto_ahash_digestsize(ahash);
+        dev_err(jrdev, "%s %d: err 0x%x\n", __func__, __LINE__, err);
+#endif
+        edesc = (struct ahash_edesc *)((char *)desc -
+                 offsetof(struct ahash_edesc, hw_desc));
+        if (err) {
+                char tmp[CAAM_ERROR_STR_MAX];
+                dev_err(jrdev, "%08x: %s\n", err, caam_jr_strstatus(tmp, err));
+        }
+        ahash_unmap_ctx(jrdev, edesc, req, ctx->ctx_len, DMA_TO_DEVICE);
+        kfree(edesc);
+#ifdef DEBUG
+        print_hex_dump(KERN_ERR, "ctx@"xstr(__LINE__)": ",
+                       DUMP_PREFIX_ADDRESS, 16, 4, state->caam_ctx,
+                       ctx->ctx_len, 1);
+        if (req->result)
+                print_hex_dump(KERN_ERR, "result@"xstr(__LINE__)": ",
+                               DUMP_PREFIX_ADDRESS, 16, 4, req->result,
+                               digestsize, 1);
+#endif
+        req->base.complete(&req->base, err);
+}
+/* submit update job descriptor */
+static int ahash_update_ctx(struct ahash_request *req)
+{
+        struct crypto_ahash *ahash = crypto_ahash_reqtfm(req);
+        struct caam_hash_ctx *ctx = crypto_ahash_ctx(ahash);
+        struct caam_hash_state *state = ahash_request_ctx(req);
+        struct device *jrdev = ctx->jrdev;
+        gfp_t flags = (req->base.flags & (CRYPTO_TFM_REQ_MAY_BACKLOG |
+                       CRYPTO_TFM_REQ_MAY_SLEEP)) ? GFP_KERNEL : GFP_ATOMIC;
+        u8 *buf = state->current_buf ? state->buf_1 : state->buf_0;
+        int *buflen = state->current_buf ? &state->buflen_1 : &state->buflen_0;
+        u8 *next_buf = state->current_buf ? state->buf_0 : state->buf_1;
+        int *next_buflen = state->current_buf ? &state->buflen_0 :
+                           &state->buflen_1, last_buflen;
+        int in_len = *buflen + req->nbytes, to_hash;
+        u32 *sh_desc = ctx->sh_desc_update, *desc;
+        dma_addr_t ptr = ctx->sh_desc_update_dma;
+        int src_nents, sec4_sg_bytes, sec4_sg_src_index;
+        struct ahash_edesc *edesc;
+        bool chained = false;
+        int ret = 0;
+        int sh_len;
+        last_buflen = *next_buflen;
+        *next_buflen = in_len & (crypto_tfm_alg_blocksize(&ahash->base) - 1);
+        to_hash = in_len - *next_buflen;
+        if (to_hash) {
+                src_nents = __sg_count(req->src, req->nbytes - (*next_buflen),
+                                       &chained);
+                sec4_sg_src_index = 1 + (*buflen ? 1 : 0);
+                sec4_sg_bytes = (sec4_sg_src_index + src_nents) *
+                                 sizeof(struct sec4_sg_entry);
+                /*
+                 * allocate space for base edesc and hw desc commands,
+                 * link tables
+                 */
+                edesc = kmalloc(sizeof(struct ahash_edesc) + DESC_JOB_IO_LEN +
+                                sec4_sg_bytes, GFP_DMA | flags);
+                if (!edesc) {
+                        dev_err(jrdev,
+                                "could not allocate extended descriptor\n");
+                        return -ENOMEM;
+                }
+                edesc->src_nents = src_nents;
+                edesc->chained = chained;
+                edesc->sec4_sg_bytes = sec4_sg_bytes;
+                edesc->sec4_sg = (void *)edesc + sizeof(struct ahash_edesc) +
+                                 DESC_JOB_IO_LEN;
+                edesc->sec4_sg_dma = dma_map_single(jrdev, edesc->sec4_sg,
+                                                     sec4_sg_bytes,
+                                                     DMA_TO_DEVICE);
+                ctx_map_to_sec4_sg(desc, jrdev, state, ctx->ctx_len,
+                                   edesc->sec4_sg, DMA_BIDIRECTIONAL);
+                state->buf_dma = try_buf_map_to_sec4_sg(jrdev,
+                                                        edesc->sec4_sg + 1,
+                                                        buf, state->buf_dma,
+                                                        *buflen, last_buflen);
+                if (src_nents) {
+                        src_map_to_sec4_sg(jrdev, req->src, src_nents,
+                                           edesc->sec4_sg + sec4_sg_src_index,
+                                           chained);
+                        if (*next_buflen) {
+                                sg_copy_part(next_buf, req->src, to_hash -
+                                             *buflen, req->nbytes);
+                                state->current_buf = !state->current_buf;
+                        }
+                } else {
+                        (edesc->sec4_sg + sec4_sg_src_index - 1)->len |=
+                                                        SEC4_SG_LEN_FIN;
+                }
+                sh_len = desc_len(sh_desc);
+                desc = edesc->hw_desc;
+                init_job_desc_shared(desc, ptr, sh_len, HDR_SHARE_DEFER |
+                                     HDR_REVERSE);
+                append_seq_in_ptr(desc, edesc->sec4_sg_dma, ctx->ctx_len +
+                                       to_hash, LDST_SGF);
+                append_seq_out_ptr(desc, state->ctx_dma, ctx->ctx_len, 0);
+#ifdef DEBUG
+                print_hex_dump(KERN_ERR, "jobdesc@"xstr(__LINE__)": ",
+                               DUMP_PREFIX_ADDRESS, 16, 4, desc,
+                               desc_bytes(desc), 1);
+#endif
+                ret = caam_jr_enqueue(jrdev, desc, ahash_done_bi, req);
+                if (!ret) {
+                        ret = -EINPROGRESS;
+                } else {
+                        ahash_unmap_ctx(jrdev, edesc, req, ctx->ctx_len,
+                                           DMA_BIDIRECTIONAL);
+                        kfree(edesc);
+                }
+        } else if (*next_buflen) {
+                sg_copy(buf + *buflen, req->src, req->nbytes);
+                *buflen = *next_buflen;
+                *next_buflen = last_buflen;
+        }
+#ifdef DEBUG
+        print_hex_dump(KERN_ERR, "buf@"xstr(__LINE__)": ",
+                       DUMP_PREFIX_ADDRESS, 16, 4, buf, *buflen, 1);
+        print_hex_dump(KERN_ERR, "next buf@"xstr(__LINE__)": ",
+                       DUMP_PREFIX_ADDRESS, 16, 4, next_buf,
+                       *next_buflen, 1);
+#endif
+        return ret;
+}
+static int ahash_final_ctx(struct ahash_request *req)
+{
+        struct crypto_ahash *ahash = crypto_ahash_reqtfm(req);
+        struct caam_hash_ctx *ctx = crypto_ahash_ctx(ahash);
+        struct caam_hash_state *state = ahash_request_ctx(req);
+        struct device *jrdev = ctx->jrdev;
+        gfp_t flags = (req->base.flags & (CRYPTO_TFM_REQ_MAY_BACKLOG |
+                       CRYPTO_TFM_REQ_MAY_SLEEP)) ? GFP_KERNEL : GFP_ATOMIC;
+        u8 *buf = state->current_buf ? state->buf_1 : state->buf_0;
+        int buflen = state->current_buf ? state->buflen_1 : state->buflen_0;
+        int last_buflen = state->current_buf ? state->buflen_0 :
+                          state->buflen_1;
+        u32 *sh_desc = ctx->sh_desc_fin, *desc;
+        dma_addr_t ptr = ctx->sh_desc_fin_dma;
+        int sec4_sg_bytes;
+        int digestsize = crypto_ahash_digestsize(ahash);
+        struct ahash_edesc *edesc;
+        int ret = 0;
+        int sh_len;
+        sec4_sg_bytes = (1 + (buflen ? 1 : 0)) * sizeof(struct sec4_sg_entry);
+        /* allocate space for base edesc and hw desc commands, link tables */
+        edesc = kmalloc(sizeof(struct ahash_edesc) + DESC_JOB_IO_LEN +
+                        sec4_sg_bytes, GFP_DMA | flags);
+        if (!edesc) {
+                dev_err(jrdev, "could not allocate extended descriptor\n");
+                return -ENOMEM;
+        }
+        sh_len = desc_len(sh_desc);
+        desc = edesc->hw_desc;
+        init_job_desc_shared(desc, ptr, sh_len, HDR_SHARE_DEFER | HDR_REVERSE);
+        edesc->sec4_sg_bytes = sec4_sg_bytes;
+        edesc->sec4_sg = (void *)edesc + sizeof(struct ahash_edesc) +
+                         DESC_JOB_IO_LEN;
+        edesc->sec4_sg_dma = dma_map_single(jrdev, edesc->sec4_sg,
+                                            sec4_sg_bytes, DMA_TO_DEVICE);
+        edesc->src_nents = 0;
+        ctx_map_to_sec4_sg(desc, jrdev, state, ctx->ctx_len, edesc->sec4_sg,
+                           DMA_TO_DEVICE);
+        state->buf_dma = try_buf_map_to_sec4_sg(jrdev, edesc->sec4_sg + 1,
+                                                buf, state->buf_dma, buflen,
+                                                last_buflen);
+        (edesc->sec4_sg + sec4_sg_bytes - 1)->len |= SEC4_SG_LEN_FIN;
+        append_seq_in_ptr(desc, edesc->sec4_sg_dma, ctx->ctx_len + buflen,
+                          LDST_SGF);
+        edesc->dst_dma = map_seq_out_ptr_result(desc, jrdev, req->result,
+                                                digestsize);
+#ifdef DEBUG
+        print_hex_dump(KERN_ERR, "jobdesc@"xstr(__LINE__)": ",
+                       DUMP_PREFIX_ADDRESS, 16, 4, desc, desc_bytes(desc), 1);
+#endif
+        ret = caam_jr_enqueue(jrdev, desc, ahash_done_ctx_src, req);
+        if (!ret) {
+                ret = -EINPROGRESS;
+        } else {
+                ahash_unmap_ctx(jrdev, edesc, req, digestsize, DMA_FROM_DEVICE);
+                kfree(edesc);
+        }
+        return ret;
+}
+static int ahash_finup_ctx(struct ahash_request *req)
+{
+        struct crypto_ahash *ahash = crypto_ahash_reqtfm(req);
+        struct caam_hash_ctx *ctx = crypto_ahash_ctx(ahash);
+        struct caam_hash_state *state = ahash_request_ctx(req);
+        struct device *jrdev = ctx->jrdev;
+        gfp_t flags = (req->base.flags & (CRYPTO_TFM_REQ_MAY_BACKLOG |
+                       CRYPTO_TFM_REQ_MAY_SLEEP)) ? GFP_KERNEL : GFP_ATOMIC;
+        u8 *buf = state->current_buf ? state->buf_1 : state->buf_0;
+        int buflen = state->current_buf ? state->buflen_1 : state->buflen_0;
+        int last_buflen = state->current_buf ? state->buflen_0 :
+                          state->buflen_1;
+        u32 *sh_desc = ctx->sh_desc_finup, *desc;
+        dma_addr_t ptr = ctx->sh_desc_finup_dma;
+        int sec4_sg_bytes, sec4_sg_src_index;
+        int src_nents;
+        int digestsize = crypto_ahash_digestsize(ahash);
+        struct ahash_edesc *edesc;
+        bool chained = false;
+        int ret = 0;
+        int sh_len;
+        src_nents = __sg_count(req->src, req->nbytes, &chained);
+        sec4_sg_src_index = 1 + (buflen ? 1 : 0);
+        sec4_sg_bytes = (sec4_sg_src_index + src_nents) *
+                         sizeof(struct sec4_sg_entry);
+        /* allocate space for base edesc and hw desc commands, link tables */
+        edesc = kmalloc(sizeof(struct ahash_edesc) + DESC_JOB_IO_LEN +
+                        sec4_sg_bytes, GFP_DMA | flags);
+        if (!edesc) {
+                dev_err(jrdev, "could not allocate extended descriptor\n");
+                return -ENOMEM;
+        }
+        sh_len = desc_len(sh_desc);
+        desc = edesc->hw_desc;
+        init_job_desc_shared(desc, ptr, sh_len, HDR_SHARE_DEFER | HDR_REVERSE);
+        edesc->src_nents = src_nents;
+        edesc->chained = chained;
+        edesc->sec4_sg_bytes = sec4_sg_bytes;
+        edesc->sec4_sg = (void *)edesc + sizeof(struct ahash_edesc) +
+                         DESC_JOB_IO_LEN;
+        edesc->sec4_sg_dma = dma_map_single(jrdev, edesc->sec4_sg,
+                                            sec4_sg_bytes, DMA_TO_DEVICE);
+        ctx_map_to_sec4_sg(desc, jrdev, state, ctx->ctx_len, edesc->sec4_sg,
+                           DMA_TO_DEVICE);
+        state->buf_dma = try_buf_map_to_sec4_sg(jrdev, edesc->sec4_sg + 1,
+                                                buf, state->buf_dma, buflen,
+                                                last_buflen);
+        src_map_to_sec4_sg(jrdev, req->src, src_nents, edesc->sec4_sg +
+                           sec4_sg_src_index, chained);
+        append_seq_in_ptr(desc, edesc->sec4_sg_dma, ctx->ctx_len +
+                               buflen + req->nbytes, LDST_SGF);
+        edesc->dst_dma = map_seq_out_ptr_result(desc, jrdev, req->result,
+                                                digestsize);
+#ifdef DEBUG
+        print_hex_dump(KERN_ERR, "jobdesc@"xstr(__LINE__)": ",
+                       DUMP_PREFIX_ADDRESS, 16, 4, desc, desc_bytes(desc), 1);
+#endif
+        ret = caam_jr_enqueue(jrdev, desc, ahash_done_ctx_src, req);
+        if (!ret) {
+                ret = -EINPROGRESS;
+        } else {
+                ahash_unmap_ctx(jrdev, edesc, req, digestsize, DMA_FROM_DEVICE);
+                kfree(edesc);
+        }
+        return ret;
+}
+static int ahash_digest(struct ahash_request *req)
+{
+        struct crypto_ahash *ahash = crypto_ahash_reqtfm(req);
+        struct caam_hash_ctx *ctx = crypto_ahash_ctx(ahash);
+        struct device *jrdev = ctx->jrdev;
+        gfp_t flags = (req->base.flags & (CRYPTO_TFM_REQ_MAY_BACKLOG |
+                       CRYPTO_TFM_REQ_MAY_SLEEP)) ? GFP_KERNEL : GFP_ATOMIC;
+        u32 *sh_desc = ctx->sh_desc_digest, *desc;
+        dma_addr_t ptr = ctx->sh_desc_digest_dma;
+        int digestsize = crypto_ahash_digestsize(ahash);
+        int src_nents, sec4_sg_bytes;
+        dma_addr_t src_dma;
+        struct ahash_edesc *edesc;
+        bool chained = false;
+        int ret = 0;
+        u32 options;
+        int sh_len;
+        src_nents = sg_count(req->src, req->nbytes, &chained);
+        dma_map_sg_chained(jrdev, req->src, src_nents ? : 1, DMA_TO_DEVICE,
+                           chained);
+        sec4_sg_bytes = src_nents * sizeof(struct sec4_sg_entry);
+        /* allocate space for base edesc and hw desc commands, link tables */
+        edesc = kmalloc(sizeof(struct ahash_edesc) + sec4_sg_bytes +
+                        DESC_JOB_IO_LEN, GFP_DMA | flags);
+        if (!edesc) {
+                dev_err(jrdev, "could not allocate extended descriptor\n");
+                return -ENOMEM;
+        }
+        edesc->sec4_sg = (void *)edesc + sizeof(struct ahash_edesc) +
+                          DESC_JOB_IO_LEN;
+        edesc->sec4_sg_dma = dma_map_single(jrdev, edesc->sec4_sg,
+                                            sec4_sg_bytes, DMA_TO_DEVICE);
+        edesc->src_nents = src_nents;
+        edesc->chained = chained;
+        sh_len = desc_len(sh_desc);
+        desc = edesc->hw_desc;
+        init_job_desc_shared(desc, ptr, sh_len, HDR_SHARE_DEFER | HDR_REVERSE);
+        if (src_nents) {
+                sg_to_sec4_sg_last(req->src, src_nents, edesc->sec4_sg, 0);
+                src_dma = edesc->sec4_sg_dma;
+                options = LDST_SGF;
+        } else {
+                src_dma = sg_dma_address(req->src);
+                options = 0;
+        }
+        append_seq_in_ptr(desc, src_dma, req->nbytes, options);
+        edesc->dst_dma = map_seq_out_ptr_result(desc, jrdev, req->result,
+                                                digestsize);
+#ifdef DEBUG
+        print_hex_dump(KERN_ERR, "jobdesc@"xstr(__LINE__)": ",
+                       DUMP_PREFIX_ADDRESS, 16, 4, desc, desc_bytes(desc), 1);
+#endif
+        ret = caam_jr_enqueue(jrdev, desc, ahash_done, req);
+        if (!ret) {
+                ret = -EINPROGRESS;
+        } else {
+                ahash_unmap(jrdev, edesc, req, digestsize);
+                kfree(edesc);
+        }
+        return ret;
+}
+/* submit ahash final if it the first job descriptor */
+static int ahash_final_no_ctx(struct ahash_request *req)
+{
+        struct crypto_ahash *ahash = crypto_ahash_reqtfm(req);
+        struct caam_hash_ctx *ctx = crypto_ahash_ctx(ahash);
+        struct caam_hash_state *state = ahash_request_ctx(req);
+        struct device *jrdev = ctx->jrdev;
+        gfp_t flags = (req->base.flags & (CRYPTO_TFM_REQ_MAY_BACKLOG |
+                       CRYPTO_TFM_REQ_MAY_SLEEP)) ? GFP_KERNEL : GFP_ATOMIC;
+        u8 *buf = state->current_buf ? state->buf_1 : state->buf_0;
+        int buflen = state->current_buf ? state->buflen_1 : state->buflen_0;
+        u32 *sh_desc = ctx->sh_desc_digest, *desc;
+        dma_addr_t ptr = ctx->sh_desc_digest_dma;
+        int digestsize = crypto_ahash_digestsize(ahash);
+        struct ahash_edesc *edesc;
+        int ret = 0;
+        int sh_len;
+        /* allocate space for base edesc and hw desc commands, link tables */
+        edesc = kmalloc(sizeof(struct ahash_edesc) + DESC_JOB_IO_LEN,
+                        GFP_DMA | flags);
+        if (!edesc) {
+                dev_err(jrdev, "could not allocate extended descriptor\n");
+                return -ENOMEM;
+        }
+        sh_len = desc_len(sh_desc);
+        desc = edesc->hw_desc;
+        init_job_desc_shared(desc, ptr, sh_len, HDR_SHARE_DEFER | HDR_REVERSE);
+        state->buf_dma = dma_map_single(jrdev, buf, buflen, DMA_TO_DEVICE);
+        append_seq_in_ptr(desc, state->buf_dma, buflen, 0);
+        edesc->dst_dma = map_seq_out_ptr_result(desc, jrdev, req->result,
+                                                digestsize);
+        edesc->src_nents = 0;
+#ifdef DEBUG
+        print_hex_dump(KERN_ERR, "jobdesc@"xstr(__LINE__)": ",
+                       DUMP_PREFIX_ADDRESS, 16, 4, desc, desc_bytes(desc), 1);
+#endif
+        ret = caam_jr_enqueue(jrdev, desc, ahash_done, req);
+        if (!ret) {
+                ret = -EINPROGRESS;
+        } else {
+                ahash_unmap(jrdev, edesc, req, digestsize);
+                kfree(edesc);
+        }
+        return ret;
+}
+/* submit ahash update if it the first job descriptor after update */
+static int ahash_update_no_ctx(struct ahash_request *req)
+{
+        struct crypto_ahash *ahash = crypto_ahash_reqtfm(req);
+        struct caam_hash_ctx *ctx = crypto_ahash_ctx(ahash);
+        struct caam_hash_state *state = ahash_request_ctx(req);
+        struct device *jrdev = ctx->jrdev;
+        gfp_t flags = (req->base.flags & (CRYPTO_TFM_REQ_MAY_BACKLOG |
+                       CRYPTO_TFM_REQ_MAY_SLEEP)) ? GFP_KERNEL : GFP_ATOMIC;
+        u8 *buf = state->current_buf ? state->buf_1 : state->buf_0;
+        int *buflen = state->current_buf ? &state->buflen_1 : &state->buflen_0;
+        u8 *next_buf = state->current_buf ? state->buf_0 : state->buf_1;
+        int *next_buflen = state->current_buf ? &state->buflen_0 :
+                           &state->buflen_1;
+        int in_len = *buflen + req->nbytes, to_hash;
+        int sec4_sg_bytes, src_nents;
+        struct ahash_edesc *edesc;
+        u32 *desc, *sh_desc = ctx->sh_desc_update_first;
+        dma_addr_t ptr = ctx->sh_desc_update_first_dma;
+        bool chained = false;
+        int ret = 0;
+        int sh_len;
+        *next_buflen = in_len & (crypto_tfm_alg_blocksize(&ahash->base) - 1);
+        to_hash = in_len - *next_buflen;
+        if (to_hash) {
+                src_nents = __sg_count(req->src, req->nbytes - (*next_buflen),
+                                       &chained);
+                sec4_sg_bytes = (1 + src_nents) *
+                                sizeof(struct sec4_sg_entry);
+                /*
+                 * allocate space for base edesc and hw desc commands,
+                 * link tables
+                 */
+                edesc = kmalloc(sizeof(struct ahash_edesc) + DESC_JOB_IO_LEN +
+                                sec4_sg_bytes, GFP_DMA | flags);
+                if (!edesc) {
+                        dev_err(jrdev,
+                                "could not allocate extended descriptor\n");
+                        return -ENOMEM;
+                }
+                edesc->src_nents = src_nents;
+                edesc->chained = chained;
+                edesc->sec4_sg_bytes = sec4_sg_bytes;
+                edesc->sec4_sg = (void *)edesc + sizeof(struct ahash_edesc) +
+                                 DESC_JOB_IO_LEN;
+                edesc->sec4_sg_dma = dma_map_single(jrdev, edesc->sec4_sg,
+                                                    sec4_sg_bytes,
+                                                    DMA_TO_DEVICE);
+                state->buf_dma = buf_map_to_sec4_sg(jrdev, edesc->sec4_sg,
+                                                    buf, *buflen);
+                src_map_to_sec4_sg(jrdev, req->src, src_nents,
+                                   edesc->sec4_sg + 1, chained);
+                if (*next_buflen) {
+                        sg_copy_part(next_buf, req->src, to_hash - *buflen,
+                                    req->nbytes);
+                        state->current_buf = !state->current_buf;
+                }
+                sh_len = desc_len(sh_desc);
+                desc = edesc->hw_desc;
+                init_job_desc_shared(desc, ptr, sh_len, HDR_SHARE_DEFER |
+                                     HDR_REVERSE);
+                append_seq_in_ptr(desc, edesc->sec4_sg_dma, to_hash, LDST_SGF);
+                map_seq_out_ptr_ctx(desc, jrdev, state, ctx->ctx_len);
+#ifdef DEBUG
+                print_hex_dump(KERN_ERR, "jobdesc@"xstr(__LINE__)": ",
+                               DUMP_PREFIX_ADDRESS, 16, 4, desc,
+                               desc_bytes(desc), 1);
+#endif
+                ret = caam_jr_enqueue(jrdev, desc, ahash_done_ctx_dst, req);
+                if (!ret) {
+                        ret = -EINPROGRESS;
+                        state->update = ahash_update_ctx;
+                        state->finup = ahash_finup_ctx;
+                        state->final = ahash_final_ctx;
+                } else {
+                        ahash_unmap_ctx(jrdev, edesc, req, ctx->ctx_len,
+                                        DMA_TO_DEVICE);
+                        kfree(edesc);
+                }
+        } else if (*next_buflen) {
+                sg_copy(buf + *buflen, req->src, req->nbytes);
+                *buflen = *next_buflen;
+                *next_buflen = 0;
+        }
+#ifdef DEBUG
+        print_hex_dump(KERN_ERR, "buf@"xstr(__LINE__)": ",
+                       DUMP_PREFIX_ADDRESS, 16, 4, buf, *buflen, 1);
+        print_hex_dump(KERN_ERR, "next buf@"xstr(__LINE__)": ",
+                       DUMP_PREFIX_ADDRESS, 16, 4, next_buf,
+                       *next_buflen, 1);
+#endif
+        return ret;
+}
+/* submit ahash finup if it the first job descriptor after update */
+static int ahash_finup_no_ctx(struct ahash_request *req)
+{
+        struct crypto_ahash *ahash = crypto_ahash_reqtfm(req);
+        struct caam_hash_ctx *ctx = crypto_ahash_ctx(ahash);
+        struct caam_hash_state *state = ahash_request_ctx(req);
+        struct device *jrdev = ctx->jrdev;
+        gfp_t flags = (req->base.flags & (CRYPTO_TFM_REQ_MAY_BACKLOG |
+                       CRYPTO_TFM_REQ_MAY_SLEEP)) ? GFP_KERNEL : GFP_ATOMIC;
+        u8 *buf = state->current_buf ? state->buf_1 : state->buf_0;
+        int buflen = state->current_buf ? state->buflen_1 : state->buflen_0;
+        int last_buflen = state->current_buf ? state->buflen_0 :
+                          state->buflen_1;
+        u32 *sh_desc = ctx->sh_desc_digest, *desc;
+        dma_addr_t ptr = ctx->sh_desc_digest_dma;
+        int sec4_sg_bytes, sec4_sg_src_index, src_nents;
+        int digestsize = crypto_ahash_digestsize(ahash);
+        struct ahash_edesc *edesc;
+        bool chained = false;
+        int sh_len;
+        int ret = 0;
+        src_nents = __sg_count(req->src, req->nbytes, &chained);
+        sec4_sg_src_index = 2;
+        sec4_sg_bytes = (sec4_sg_src_index + src_nents) *
+                         sizeof(struct sec4_sg_entry);
+        /* allocate space for base edesc and hw desc commands, link tables */
+        edesc = kmalloc(sizeof(struct ahash_edesc) + DESC_JOB_IO_LEN +
+                        sec4_sg_bytes, GFP_DMA | flags);
+        if (!edesc) {
+                dev_err(jrdev, "could not allocate extended descriptor\n");
+                return -ENOMEM;
+        }
+        sh_len = desc_len(sh_desc);
+        desc = edesc->hw_desc;
+        init_job_desc_shared(desc, ptr, sh_len, HDR_SHARE_DEFER | HDR_REVERSE);
+        edesc->src_nents = src_nents;
+        edesc->chained = chained;
+        edesc->sec4_sg_bytes = sec4_sg_bytes;
+        edesc->sec4_sg = (void *)edesc + sizeof(struct ahash_edesc) +
+                         DESC_JOB_IO_LEN;
+        edesc->sec4_sg_dma = dma_map_single(jrdev, edesc->sec4_sg,
+                                            sec4_sg_bytes, DMA_TO_DEVICE);
+        state->buf_dma = try_buf_map_to_sec4_sg(jrdev, edesc->sec4_sg, buf,
+                                                state->buf_dma, buflen,
+                                                last_buflen);
+        src_map_to_sec4_sg(jrdev, req->src, src_nents, edesc->sec4_sg + 1,
+                           chained);
+        append_seq_in_ptr(desc, edesc->sec4_sg_dma, buflen +
+                               req->nbytes, LDST_SGF);
+        edesc->dst_dma = map_seq_out_ptr_result(desc, jrdev, req->result,
+                                                digestsize);
+#ifdef DEBUG
+        print_hex_dump(KERN_ERR, "jobdesc@"xstr(__LINE__)": ",
+                       DUMP_PREFIX_ADDRESS, 16, 4, desc, desc_bytes(desc), 1);
+#endif
+        ret = caam_jr_enqueue(jrdev, desc, ahash_done, req);
+        if (!ret) {
+                ret = -EINPROGRESS;
+        } else {
+                ahash_unmap(jrdev, edesc, req, digestsize);
+                kfree(edesc);
+        }
+        return ret;
+}
+/* submit first update job descriptor after init */
+static int ahash_update_first(struct ahash_request *req)
+{
+        struct crypto_ahash *ahash = crypto_ahash_reqtfm(req);
+        struct caam_hash_ctx *ctx = crypto_ahash_ctx(ahash);
+        struct caam_hash_state *state = ahash_request_ctx(req);
+        struct device *jrdev = ctx->jrdev;
+        gfp_t flags = (req->base.flags & (CRYPTO_TFM_REQ_MAY_BACKLOG |
+                       CRYPTO_TFM_REQ_MAY_SLEEP)) ? GFP_KERNEL : GFP_ATOMIC;
+        u8 *next_buf = state->buf_0 + state->current_buf *
+                       CAAM_MAX_HASH_BLOCK_SIZE;
+        int *next_buflen = &state->buflen_0 + state->current_buf;
+        int to_hash;
+        u32 *sh_desc = ctx->sh_desc_update_first, *desc;
+        dma_addr_t ptr = ctx->sh_desc_update_first_dma;
+        int sec4_sg_bytes, src_nents;
+        dma_addr_t src_dma;
+        u32 options;
+        struct ahash_edesc *edesc;
+        bool chained = false;
+        int ret = 0;
+        int sh_len;
+        *next_buflen = req->nbytes & (crypto_tfm_alg_blocksize(&ahash->base) -
+                                      1);
+        to_hash = req->nbytes - *next_buflen;
+        if (to_hash) {
+                src_nents = sg_count(req->src, req->nbytes - (*next_buflen),
+                                     &chained);
+                dma_map_sg_chained(jrdev, req->src, src_nents ? : 1,
+                                   DMA_TO_DEVICE, chained);
+                sec4_sg_bytes = src_nents * sizeof(struct sec4_sg_entry);
+                /*
+                 * allocate space for base edesc and hw desc commands,
+                 * link tables
+                 */
+                edesc = kmalloc(sizeof(struct ahash_edesc) + DESC_JOB_IO_LEN +
+                                sec4_sg_bytes, GFP_DMA | flags);
+                if (!edesc) {
+                        dev_err(jrdev,
+                                "could not allocate extended descriptor\n");
+                        return -ENOMEM;
+                }
+                edesc->src_nents = src_nents;
+                edesc->chained = chained;
+                edesc->sec4_sg_bytes = sec4_sg_bytes;
+                edesc->sec4_sg = (void *)edesc + sizeof(struct ahash_edesc) +
+                                 DESC_JOB_IO_LEN;
+                edesc->sec4_sg_dma = dma_map_single(jrdev, edesc->sec4_sg,
+                                                    sec4_sg_bytes,
+                                                    DMA_TO_DEVICE);
+                if (src_nents) {
+                        sg_to_sec4_sg_last(req->src, src_nents,
+                                           edesc->sec4_sg, 0);
+                        src_dma = edesc->sec4_sg_dma;
+                        options = LDST_SGF;
+                } else {
+                        src_dma = sg_dma_address(req->src);
+                        options = 0;
+                }
+                if (*next_buflen)
+                        sg_copy_part(next_buf, req->src, to_hash, req->nbytes);
+                sh_len = desc_len(sh_desc);
+                desc = edesc->hw_desc;
+                init_job_desc_shared(desc, ptr, sh_len, HDR_SHARE_DEFER |
+                                     HDR_REVERSE);
+                append_seq_in_ptr(desc, src_dma, to_hash, options);
+                map_seq_out_ptr_ctx(desc, jrdev, state, ctx->ctx_len);
+#ifdef DEBUG
+                print_hex_dump(KERN_ERR, "jobdesc@"xstr(__LINE__)": ",
+                               DUMP_PREFIX_ADDRESS, 16, 4, desc,
+                               desc_bytes(desc), 1);
+#endif
+                ret = caam_jr_enqueue(jrdev, desc, ahash_done_ctx_dst,
+                                      req);
+                if (!ret) {
+                        ret = -EINPROGRESS;
+                        state->update = ahash_update_ctx;
+                        state->finup = ahash_finup_ctx;
+                        state->final = ahash_final_ctx;
+                } else {
+                        ahash_unmap_ctx(jrdev, edesc, req, ctx->ctx_len,
+                                        DMA_TO_DEVICE);
+                        kfree(edesc);
+                }
+        } else if (*next_buflen) {
+                state->update = ahash_update_no_ctx;
+                state->finup = ahash_finup_no_ctx;
+                state->final = ahash_final_no_ctx;
+                sg_copy(next_buf, req->src, req->nbytes);
+        }
+#ifdef DEBUG
+        print_hex_dump(KERN_ERR, "next buf@"xstr(__LINE__)": ",
+                       DUMP_PREFIX_ADDRESS, 16, 4, next_buf,
+                       *next_buflen, 1);
+#endif
+        return ret;
+}
+static int ahash_finup_first(struct ahash_request *req)
+{
+        return ahash_digest(req);
+}
+static int ahash_init(struct ahash_request *req)
+{
+        struct caam_hash_state *state = ahash_request_ctx(req);
+        state->update = ahash_update_first;
+        state->finup = ahash_finup_first;
+        state->final = ahash_final_no_ctx;
+        state->current_buf = 0;
+        return 0;
+}
+static int ahash_update(struct ahash_request *req)
+{
+        struct caam_hash_state *state = ahash_request_ctx(req);
+        return state->update(req);
+}
+static int ahash_finup(struct ahash_request *req)
+{
+        struct caam_hash_state *state = ahash_request_ctx(req);
+        return state->finup(req);
+}
+static int ahash_final(struct ahash_request *req)
+{
+        struct caam_hash_state *state = ahash_request_ctx(req);
+        return state->final(req);
+}
+static int ahash_export(struct ahash_request *req, void *out)
+{
+        struct crypto_ahash *ahash = crypto_ahash_reqtfm(req);
+        struct caam_hash_ctx *ctx = crypto_ahash_ctx(ahash);
+        struct caam_hash_state *state = ahash_request_ctx(req);
+        memcpy(out, ctx, sizeof(struct caam_hash_ctx));
+        memcpy(out + sizeof(struct caam_hash_ctx), state,
+               sizeof(struct caam_hash_state));
+        return 0;
+}
+static int ahash_import(struct ahash_request *req, const void *in)
+{
+        struct crypto_ahash *ahash = crypto_ahash_reqtfm(req);
+        struct caam_hash_ctx *ctx = crypto_ahash_ctx(ahash);
+        struct caam_hash_state *state = ahash_request_ctx(req);
+        memcpy(ctx, in, sizeof(struct caam_hash_ctx));
+        memcpy(state, in + sizeof(struct caam_hash_ctx),
+               sizeof(struct caam_hash_state));
+        return 0;
+}
+struct caam_hash_template {
+        char name[CRYPTO_MAX_ALG_NAME];
+        char driver_name[CRYPTO_MAX_ALG_NAME];
+        char hmac_name[CRYPTO_MAX_ALG_NAME];
+        char hmac_driver_name[CRYPTO_MAX_ALG_NAME];
+        unsigned int blocksize;
+        struct ahash_alg template_ahash;
+        u32 alg_type;
+        u32 alg_op;
+};
+/* ahash descriptors */
+static struct caam_hash_template driver_hash[] = {
+        {
+                .name = "sha1",
+                .driver_name = "sha1-caam",
+                .hmac_name = "hmac(sha1)",
+                .hmac_driver_name = "hmac-sha1-caam",
+                .blocksize = SHA1_BLOCK_SIZE,
+                .template_ahash = {
+                        .init = ahash_init,
+                        .update = ahash_update,
+                        .final = ahash_final,
+                        .finup = ahash_finup,
+                        .digest = ahash_digest,
+                        .export = ahash_export,
+                        .import = ahash_import,
+                        .setkey = ahash_setkey,
+                        .halg = {
+                                .digestsize = SHA1_DIGEST_SIZE,
+                                },
+                        },
+                .alg_type = OP_ALG_ALGSEL_SHA1,
+                .alg_op = OP_ALG_ALGSEL_SHA1 | OP_ALG_AAI_HMAC,
+        }, {
+                .name = "sha224",
+                .driver_name = "sha224-caam",
+                .hmac_name = "hmac(sha224)",
+                .hmac_driver_name = "hmac-sha224-caam",
+                .blocksize = SHA224_BLOCK_SIZE,
+                .template_ahash = {
+                        .init = ahash_init,
+                        .update = ahash_update,
+                        .final = ahash_final,
+                        .finup = ahash_finup,
+                        .digest = ahash_digest,
+                        .export = ahash_export,
+                        .import = ahash_import,
+                        .setkey = ahash_setkey,
+                        .halg = {
+                                .digestsize = SHA224_DIGEST_SIZE,
+                                },
+                        },
+                .alg_type = OP_ALG_ALGSEL_SHA224,
+                .alg_op = OP_ALG_ALGSEL_SHA224 | OP_ALG_AAI_HMAC,
+        }, {
+                .name = "sha256",
+                .driver_name = "sha256-caam",
+                .hmac_name = "hmac(sha256)",
+                .hmac_driver_name = "hmac-sha256-caam",
+                .blocksize = SHA256_BLOCK_SIZE,
+                .template_ahash = {
+                        .init = ahash_init,
+                        .update = ahash_update,
+                        .final = ahash_final,
+                        .finup = ahash_finup,
+                        .digest = ahash_digest,
+                        .export = ahash_export,
+                        .import = ahash_import,
+                        .setkey = ahash_setkey,
+                        .halg = {
+                                .digestsize = SHA256_DIGEST_SIZE,
+                                },
+                        },
+                .alg_type = OP_ALG_ALGSEL_SHA256,
+                .alg_op = OP_ALG_ALGSEL_SHA256 | OP_ALG_AAI_HMAC,
+        }, {
+                .name = "sha384",
+                .driver_name = "sha384-caam",
+                .hmac_name = "hmac(sha384)",
+                .hmac_driver_name = "hmac-sha384-caam",
+                .blocksize = SHA384_BLOCK_SIZE,
+                .template_ahash = {
+                        .init = ahash_init,
+                        .update = ahash_update,
+                        .final = ahash_final,
+                        .finup = ahash_finup,
+                        .digest = ahash_digest,
+                        .export = ahash_export,
+                        .import = ahash_import,
+                        .setkey = ahash_setkey,
+                        .halg = {
+                                .digestsize = SHA384_DIGEST_SIZE,
+                                },
+                        },
+                .alg_type = OP_ALG_ALGSEL_SHA384,
+                .alg_op = OP_ALG_ALGSEL_SHA384 | OP_ALG_AAI_HMAC,
+        }, {
+                .name = "sha512",
+                .driver_name = "sha512-caam",
+                .hmac_name = "hmac(sha512)",
+                .hmac_driver_name = "hmac-sha512-caam",
+                .blocksize = SHA512_BLOCK_SIZE,
+                .template_ahash = {
+                        .init = ahash_init,
+                        .update = ahash_update,
+                        .final = ahash_final,
+                        .finup = ahash_finup,
+                        .digest = ahash_digest,
+                        .export = ahash_export,
+                        .import = ahash_import,
+                        .setkey = ahash_setkey,
+                        .halg = {
+                                .digestsize = SHA512_DIGEST_SIZE,
+                                },
+                        },
+                .alg_type = OP_ALG_ALGSEL_SHA512,
+                .alg_op = OP_ALG_ALGSEL_SHA512 | OP_ALG_AAI_HMAC,
+        }, {
+                .name = "md5",
+                .driver_name = "md5-caam",
+                .hmac_name = "hmac(md5)",
+                .hmac_driver_name = "hmac-md5-caam",
+                .blocksize = MD5_BLOCK_WORDS * 4,
+                .template_ahash = {
+                        .init = ahash_init,
+                        .update = ahash_update,
+                        .final = ahash_final,
+                        .finup = ahash_finup,
+                        .digest = ahash_digest,
+                        .export = ahash_export,
+                        .import = ahash_import,
+                        .setkey = ahash_setkey,
+                        .halg = {
+                                .digestsize = MD5_DIGEST_SIZE,
+                                },
+                        },
+                .alg_type = OP_ALG_ALGSEL_MD5,
+                .alg_op = OP_ALG_ALGSEL_MD5 | OP_ALG_AAI_HMAC,
+        },
+};
+struct caam_hash_alg {
+        struct list_head entry;
+        struct device *ctrldev;
+        int alg_type;
+        int alg_op;
+        struct ahash_alg ahash_alg;
+};
+static int caam_hash_cra_init(struct crypto_tfm *tfm)
+{
+        struct crypto_ahash *ahash = __crypto_ahash_cast(tfm);
+        struct crypto_alg *base = tfm->__crt_alg;
+        struct hash_alg_common *halg =
+                 container_of(base, struct hash_alg_common, base);
+        struct ahash_alg *alg =
+                 container_of(halg, struct ahash_alg, halg);
+        struct caam_hash_alg *caam_hash =
+                 container_of(alg, struct caam_hash_alg, ahash_alg);
+        struct caam_hash_ctx *ctx = crypto_tfm_ctx(tfm);
+        struct caam_drv_private *priv = dev_get_drvdata(caam_hash->ctrldev);
+        /* Sizes for MDHA running digests: MD5, SHA1, 224, 256, 384, 512 */
+        static const u8 runninglen[] = { HASH_MSG_LEN + MD5_DIGEST_SIZE,
+                                         HASH_MSG_LEN + SHA1_DIGEST_SIZE,
+                                         HASH_MSG_LEN + 32,
+                                         HASH_MSG_LEN + SHA256_DIGEST_SIZE,
+                                         HASH_MSG_LEN + 64,
+                                         HASH_MSG_LEN + SHA512_DIGEST_SIZE };
+        int tgt_jr = atomic_inc_return(&priv->tfm_count);
+        int ret = 0;
+        /*
+         * distribute tfms across job rings to ensure in-order
+         * crypto request processing per tfm
+         */
+        ctx->jrdev = priv->jrdev[tgt_jr % priv->total_jobrs];
+        /* copy descriptor header template value */
+        ctx->alg_type = OP_TYPE_CLASS2_ALG | caam_hash->alg_type;
+        ctx->alg_op = OP_TYPE_CLASS2_ALG | caam_hash->alg_op;
+        ctx->ctx_len = runninglen[(ctx->alg_op & OP_ALG_ALGSEL_SUBMASK) >>
+                                  OP_ALG_ALGSEL_SHIFT];
+        crypto_ahash_set_reqsize(__crypto_ahash_cast(tfm),
+                                 sizeof(struct caam_hash_state));
+        ret = ahash_set_sh_desc(ahash);
+        return ret;
+}
+static void caam_hash_cra_exit(struct crypto_tfm *tfm)
+{
+        struct caam_hash_ctx *ctx = crypto_tfm_ctx(tfm);
+        if (ctx->sh_desc_update_dma &&
+            !dma_mapping_error(ctx->jrdev, ctx->sh_desc_update_dma))
+                dma_unmap_single(ctx->jrdev, ctx->sh_desc_update_dma,
+                                 desc_bytes(ctx->sh_desc_update),
+                                 DMA_TO_DEVICE);
+        if (ctx->sh_desc_update_first_dma &&
+            !dma_mapping_error(ctx->jrdev, ctx->sh_desc_update_first_dma))
+                dma_unmap_single(ctx->jrdev, ctx->sh_desc_update_first_dma,
+                                 desc_bytes(ctx->sh_desc_update_first),
+                                 DMA_TO_DEVICE);
+        if (ctx->sh_desc_fin_dma &&
+            !dma_mapping_error(ctx->jrdev, ctx->sh_desc_fin_dma))
+                dma_unmap_single(ctx->jrdev, ctx->sh_desc_fin_dma,
+                                 desc_bytes(ctx->sh_desc_fin), DMA_TO_DEVICE);
+        if (ctx->sh_desc_digest_dma &&
+            !dma_mapping_error(ctx->jrdev, ctx->sh_desc_digest_dma))
+                dma_unmap_single(ctx->jrdev, ctx->sh_desc_digest_dma,
+                                 desc_bytes(ctx->sh_desc_digest),
+                                 DMA_TO_DEVICE);
+        if (ctx->sh_desc_finup_dma &&
+            !dma_mapping_error(ctx->jrdev, ctx->sh_desc_finup_dma))
+                dma_unmap_single(ctx->jrdev, ctx->sh_desc_finup_dma,
+                                 desc_bytes(ctx->sh_desc_finup), DMA_TO_DEVICE);
+}
+static void __exit caam_algapi_hash_exit(void)
+{
+        struct device_node *dev_node;
+        struct platform_device *pdev;
+        struct device *ctrldev;
+        struct caam_drv_private *priv;
+        struct caam_hash_alg *t_alg, *n;
+        dev_node = of_find_compatible_node(NULL, NULL, "fsl,sec-v4.0");
+        if (!dev_node)
+                return;
+        pdev = of_find_device_by_node(dev_node);
+        if (!pdev)
+                return;
+        ctrldev = &pdev->dev;
+        of_node_put(dev_node);
+        priv = dev_get_drvdata(ctrldev);
+        if (!priv->hash_list.next)
+                return;
+        list_for_each_entry_safe(t_alg, n, &priv->hash_list, entry) {
+                crypto_unregister_ahash(&t_alg->ahash_alg);
+                list_del(&t_alg->entry);
+                kfree(t_alg);
+        }
+}
+static struct caam_hash_alg *
+caam_hash_alloc(struct device *ctrldev, struct caam_hash_template *template,
+                bool keyed)
+{
+        struct caam_hash_alg *t_alg;
+        struct ahash_alg *halg;
+        struct crypto_alg *alg;
+        t_alg = kzalloc(sizeof(struct caam_hash_alg), GFP_KERNEL);
+        if (!t_alg) {
+                dev_err(ctrldev, "failed to allocate t_alg\n");
+                return ERR_PTR(-ENOMEM);
+        }
+        t_alg->ahash_alg = template->template_ahash;
+        halg = &t_alg->ahash_alg;
+        alg = &halg->halg.base;
+        if (keyed) {
+                snprintf(alg->cra_name, CRYPTO_MAX_ALG_NAME, "%s",
+                         template->hmac_name);
+                snprintf(alg->cra_driver_name, CRYPTO_MAX_ALG_NAME, "%s",
+                         template->hmac_driver_name);
+        } else {
+                snprintf(alg->cra_name, CRYPTO_MAX_ALG_NAME, "%s",
+                         template->name);
+                snprintf(alg->cra_driver_name, CRYPTO_MAX_ALG_NAME, "%s",
+                         template->driver_name);
+        }
+        alg->cra_module = THIS_MODULE;
+        alg->cra_init = caam_hash_cra_init;
+        alg->cra_exit = caam_hash_cra_exit;
+        alg->cra_ctxsize = sizeof(struct caam_hash_ctx);
+        alg->cra_priority = CAAM_CRA_PRIORITY;
+        alg->cra_blocksize = template->blocksize;
+        alg->cra_alignmask = 0;
+        alg->cra_flags = CRYPTO_ALG_ASYNC | CRYPTO_ALG_TYPE_AHASH;
+        alg->cra_type = &crypto_ahash_type;
+        t_alg->alg_type = template->alg_type;
+        t_alg->alg_op = template->alg_op;
+        t_alg->ctrldev = ctrldev;
+        return t_alg;
+}
+static int __init caam_algapi_hash_init(void)
+{
+        struct device_node *dev_node;
+        struct platform_device *pdev;
+        struct device *ctrldev;
+        struct caam_drv_private *priv;
+        int i = 0, err = 0;
+        dev_node = of_find_compatible_node(NULL, NULL, "fsl,sec-v4.0");
+        if (!dev_node)
+                return -ENODEV;
+        pdev = of_find_device_by_node(dev_node);
+        if (!pdev)
+                return -ENODEV;
+        ctrldev = &pdev->dev;
+        priv = dev_get_drvdata(ctrldev);
+        of_node_put(dev_node);
+        INIT_LIST_HEAD(&priv->hash_list);
+        atomic_set(&priv->tfm_count, -1);
+        /* register crypto algorithms the device supports */
+        for (i = 0; i < ARRAY_SIZE(driver_hash); i++) {
+                /* TODO: check if h/w supports alg */
+                struct caam_hash_alg *t_alg;
+                /* register hmac version */
+                t_alg = caam_hash_alloc(ctrldev, &driver_hash[i], true);
+                if (IS_ERR(t_alg)) {
+                        err = PTR_ERR(t_alg);
+                        dev_warn(ctrldev, "%s alg allocation failed\n",
+                                 driver_hash[i].driver_name);
+                        continue;
+                }
+                err = crypto_register_ahash(&t_alg->ahash_alg);
+                if (err) {
+                        dev_warn(ctrldev, "%s alg registration failed\n",
+                                t_alg->ahash_alg.halg.base.cra_driver_name);
+                        kfree(t_alg);
+                } else
+                        list_add_tail(&t_alg->entry, &priv->hash_list);
+                /* register unkeyed version */
+                t_alg = caam_hash_alloc(ctrldev, &driver_hash[i], false);
+                if (IS_ERR(t_alg)) {
+                        err = PTR_ERR(t_alg);
+                        dev_warn(ctrldev, "%s alg allocation failed\n",
+                                 driver_hash[i].driver_name);
+                        continue;
+                }
+                err = crypto_register_ahash(&t_alg->ahash_alg);
+                if (err) {
+                        dev_warn(ctrldev, "%s alg registration failed\n",
+                                t_alg->ahash_alg.halg.base.cra_driver_name);
+                        kfree(t_alg);
+                } else
+                        list_add_tail(&t_alg->entry, &priv->hash_list);
+        }
+        return err;
+}
+module_init(caam_algapi_hash_init);
+module_exit(caam_algapi_hash_exit);
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("FSL CAAM support for ahash functions of crypto API");
+MODULE_AUTHOR("Freescale Semiconductor - NMG");
diff --git a/drivers/crypto/caam/caamrng.c b/drivers/crypto/caam/caamrng.c
new file mode 100644
index 000000000000..e2bfe161dece
--- /dev/null
+++ b/drivers/crypto/caam/caamrng.c
@@ -0,0 +1,309 @@
+/*
+ * caam - Freescale FSL CAAM support for hw_random
+ *
+ * Copyright 2011 Freescale Semiconductor, Inc.
+ *
+ * Based on caamalg.c crypto API driver.
+ *
+ * relationship between job descriptors to shared descriptors:
+ *
+ * ---------------                     --------------
+ * | JobDesc #0  |-------------------->| ShareDesc  |
+ * | *(buffer 0) |      |------------->| (generate) |
+ * ---------------      |              | (move)     |
+ *                      |              | (store)    |
+ * ---------------      |              --------------
+ * | JobDesc #1  |------|
+ * | *(buffer 1) |
+ * ---------------
+ *
+ * A job desc looks like this:
+ *
+ * ---------------------
+ * | Header            |
+ * | ShareDesc Pointer |
+ * | SEQ_OUT_PTR       |
+ * | (output buffer)   |
+ * ---------------------
+ *
+ * The SharedDesc never changes, and each job descriptor points to one of two
+ * buffers for each device, from which the data will be copied into the
+ * requested destination
+ */
+#include <linux/hw_random.h>
+#include <linux/completion.h>
+#include <linux/atomic.h>
+#include "compat.h"
+#include "regs.h"
+#include "intern.h"
+#include "desc_constr.h"
+#include "jr.h"
+#include "error.h"
+/*
+ * Maximum buffer size: maximum number of random, cache-aligned bytes that
+ * will be generated and moved to seq out ptr (extlen not allowed)
+ */
+#define RN_BUF_SIZE                     (0xffff / L1_CACHE_BYTES * \
+                                         L1_CACHE_BYTES)
+/* length of descriptors */
+#define DESC_JOB_O_LEN                  (CAAM_CMD_SZ * 2 + CAAM_PTR_SZ * 2)
+#define DESC_RNG_LEN                    (10 * CAAM_CMD_SZ)
+/* Buffer, its dma address and lock */
+struct buf_data {
+        u8 buf[RN_BUF_SIZE];
+        dma_addr_t addr;
+        struct completion filled;
+        u32 hw_desc[DESC_JOB_O_LEN];
+#define BUF_NOT_EMPTY 0
+#define BUF_EMPTY 1
+#define BUF_PENDING 2  /* Empty, but with job pending --don't submit another */
+        atomic_t empty;
+};
+/* rng per-device context */
+struct caam_rng_ctx {
+        struct device *jrdev;
+        dma_addr_t sh_desc_dma;
+        u32 sh_desc[DESC_RNG_LEN];
+        unsigned int cur_buf_idx;
+        int current_buf;
+        struct buf_data bufs[2];
+};
+static struct caam_rng_ctx rng_ctx;
+static inline void rng_unmap_buf(struct device *jrdev, struct buf_data *bd)
+{
+        if (bd->addr)
+                dma_unmap_single(jrdev, bd->addr, RN_BUF_SIZE,
+                                 DMA_FROM_DEVICE);
+}
+static inline void rng_unmap_ctx(struct caam_rng_ctx *ctx)
+{
+        struct device *jrdev = ctx->jrdev;
+        if (ctx->sh_desc_dma)
+                dma_unmap_single(jrdev, ctx->sh_desc_dma, DESC_RNG_LEN,
+                                 DMA_TO_DEVICE);
+        rng_unmap_buf(jrdev, &ctx->bufs[0]);
+        rng_unmap_buf(jrdev, &ctx->bufs[1]);
+}
+static void rng_done(struct device *jrdev, u32 *desc, u32 err, void *context)
+{
+        struct buf_data *bd;
+        bd = (struct buf_data *)((char *)desc -
+              offsetof(struct buf_data, hw_desc));
+        if (err) {
+                char tmp[CAAM_ERROR_STR_MAX];
+                dev_err(jrdev, "%08x: %s\n", err, caam_jr_strstatus(tmp, err));
+        }
+        atomic_set(&bd->empty, BUF_NOT_EMPTY);
+        complete(&bd->filled);
+#ifdef DEBUG
+        print_hex_dump(KERN_ERR, "rng refreshed buf@: ",
+                       DUMP_PREFIX_ADDRESS, 16, 4, bd->buf, RN_BUF_SIZE, 1);
+#endif
+}
+static inline int submit_job(struct caam_rng_ctx *ctx, int to_current)
+{
+        struct buf_data *bd = &ctx->bufs[!(to_current ^ ctx->current_buf)];
+        struct device *jrdev = ctx->jrdev;
+        u32 *desc = bd->hw_desc;
+        int err;
+        dev_dbg(jrdev, "submitting job %d\n", !(to_current ^ ctx->current_buf));
+        init_completion(&bd->filled);
+        err = caam_jr_enqueue(jrdev, desc, rng_done, ctx);
+        if (err)
+                complete(&bd->filled); /* don't wait on failed job*/
+        else
+                atomic_inc(&bd->empty); /* note if pending */
+        return err;
+}
+static int caam_read(struct hwrng *rng, void *data, size_t max, bool wait)
+{
+        struct caam_rng_ctx *ctx = &rng_ctx;
+        struct buf_data *bd = &ctx->bufs[ctx->current_buf];
+        int next_buf_idx, copied_idx;
+        int err;
+        if (atomic_read(&bd->empty)) {
+                /* try to submit job if there wasn't one */
+                if (atomic_read(&bd->empty) == BUF_EMPTY) {
+                        err = submit_job(ctx, 1);
+                        /* if can't submit job, can't even wait */
+                        if (err)
+                                return 0;
+                }
+                /* no immediate data, so exit if not waiting */
+                if (!wait)
+                        return 0;
+                /* waiting for pending job */
+                if (atomic_read(&bd->empty))
+                        wait_for_completion(&bd->filled);
+        }
+        next_buf_idx = ctx->cur_buf_idx + max;
+        dev_dbg(ctx->jrdev, "%s: start reading at buffer %d, idx %d\n",
+                 __func__, ctx->current_buf, ctx->cur_buf_idx);
+        /* if enough data in current buffer */
+        if (next_buf_idx < RN_BUF_SIZE) {
+                memcpy(data, bd->buf + ctx->cur_buf_idx, max);
+                ctx->cur_buf_idx = next_buf_idx;
+                return max;
+        }
+        /* else, copy what's left... */
+        copied_idx = RN_BUF_SIZE - ctx->cur_buf_idx;
+        memcpy(data, bd->buf + ctx->cur_buf_idx, copied_idx);
+        ctx->cur_buf_idx = 0;
+        atomic_set(&bd->empty, BUF_EMPTY);
+        /* ...refill... */
+        submit_job(ctx, 1);
+        /* and use next buffer */
+        ctx->current_buf = !ctx->current_buf;
+        dev_dbg(ctx->jrdev, "switched to buffer %d\n", ctx->current_buf);
+        /* since there already is some data read, don't wait */
+        return copied_idx + caam_read(rng, data + copied_idx,
+                                      max - copied_idx, false);
+}
+static inline void rng_create_sh_desc(struct caam_rng_ctx *ctx)
+{
+        struct device *jrdev = ctx->jrdev;
+        u32 *desc = ctx->sh_desc;
+        init_sh_desc(desc, HDR_SHARE_WAIT);
+        /* Propagate errors from shared to job descriptor */
+        append_cmd(desc, SET_OK_NO_PROP_ERRORS | CMD_LOAD);
+        /* Generate random bytes */
+        append_operation(desc, OP_ALG_ALGSEL_RNG | OP_TYPE_CLASS1_ALG);
+        /* Store bytes */
+        append_seq_fifo_store(desc, RN_BUF_SIZE, FIFOST_TYPE_RNGSTORE);
+        ctx->sh_desc_dma = dma_map_single(jrdev, desc, desc_bytes(desc),
+                                          DMA_TO_DEVICE);
+#ifdef DEBUG
+        print_hex_dump(KERN_ERR, "rng shdesc@: ", DUMP_PREFIX_ADDRESS, 16, 4,
+                       desc, desc_bytes(desc), 1);
+#endif
+}
+static inline void rng_create_job_desc(struct caam_rng_ctx *ctx, int buf_id)
+{
+        struct device *jrdev = ctx->jrdev;
+        struct buf_data *bd = &ctx->bufs[buf_id];
+        u32 *desc = bd->hw_desc;
+        int sh_len = desc_len(ctx->sh_desc);
+        init_job_desc_shared(desc, ctx->sh_desc_dma, sh_len, HDR_SHARE_DEFER |
+                             HDR_REVERSE);
+        bd->addr = dma_map_single(jrdev, bd->buf, RN_BUF_SIZE, DMA_FROM_DEVICE);
+        append_seq_out_ptr_intlen(desc, bd->addr, RN_BUF_SIZE, 0);
+#ifdef DEBUG
+        print_hex_dump(KERN_ERR, "rng job desc@: ", DUMP_PREFIX_ADDRESS, 16, 4,
+                       desc, desc_bytes(desc), 1);
+#endif
+}
+static void caam_cleanup(struct hwrng *rng)
+{
+        int i;
+        struct buf_data *bd;
+        for (i = 0; i < 2; i++) {
+                bd = &rng_ctx.bufs[i];
+                if (atomic_read(&bd->empty) == BUF_PENDING)
+                        wait_for_completion(&bd->filled);
+        }
+        rng_unmap_ctx(&rng_ctx);
+}
+static void caam_init_buf(struct caam_rng_ctx *ctx, int buf_id)
+{
+        struct buf_data *bd = &ctx->bufs[buf_id];
+        rng_create_job_desc(ctx, buf_id);
+        atomic_set(&bd->empty, BUF_EMPTY);
+        submit_job(ctx, buf_id == ctx->current_buf);
+        wait_for_completion(&bd->filled);
+}
+static void caam_init_rng(struct caam_rng_ctx *ctx, struct device *jrdev)
+{
+        ctx->jrdev = jrdev;
+        rng_create_sh_desc(ctx);
+        ctx->current_buf = 0;
+        ctx->cur_buf_idx = 0;
+        caam_init_buf(ctx, 0);
+        caam_init_buf(ctx, 1);
+}
+static struct hwrng caam_rng = {
+        .name           = "rng-caam",
+        .cleanup        = caam_cleanup,
+        .read           = caam_read,
+};
+static void __exit caam_rng_exit(void)
+{
+        hwrng_unregister(&caam_rng);
+}
+static int __init caam_rng_init(void)
+{
+        struct device_node *dev_node;
+        struct platform_device *pdev;
+        struct device *ctrldev;
+        struct caam_drv_private *priv;
+        dev_node = of_find_compatible_node(NULL, NULL, "fsl,sec-v4.0");
+        if (!dev_node)
+                return -ENODEV;
+        pdev = of_find_device_by_node(dev_node);
+        if (!pdev)
+                return -ENODEV;
+        ctrldev = &pdev->dev;
+        priv = dev_get_drvdata(ctrldev);
+        of_node_put(dev_node);
+        caam_init_rng(&rng_ctx, priv->jrdev[0]);
+        dev_info(priv->jrdev[0], "registering rng-caam\n");
+        return hwrng_register(&caam_rng);
+}
+module_init(caam_rng_init);
+module_exit(caam_rng_exit);
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("FSL CAAM support for hw_random API");
+MODULE_AUTHOR("Freescale Semiconductor - NMG");
diff --git a/drivers/crypto/caam/compat.h b/drivers/crypto/caam/compat.h
index a63bc65fae86..762aeff626ac 100644
--- a/drivers/crypto/caam/compat.h
+++ b/drivers/crypto/caam/compat.h
@@ -11,6 +11,7 @@
 #include <linux/device.h>
 #include <linux/interrupt.h>
 #include <linux/crypto.h>
+#include <linux/hash.h>
 #include <linux/hw_random.h>
 #include <linux/of_platform.h>
 #include <linux/dma-mapping.h>
@@ -33,5 +34,6 @@
 #include <crypto/authenc.h>
 #include <crypto/scatterwalk.h>
 #include <crypto/internal/skcipher.h>
+#include <crypto/internal/hash.h>
 #endif /* !defined(CAAM_COMPAT_H) */
diff --git a/drivers/crypto/caam/ctrl.c b/drivers/crypto/caam/ctrl.c
index 77557ebcd337..414ba20c05a1 100644
--- a/drivers/crypto/caam/ctrl.c
+++ b/drivers/crypto/caam/ctrl.c
@@ -2,13 +2,16 @@
 * CAAM control-plane driver backend
 * Controller-level driver, kernel property detection, initialization
 *
- * Copyright 2008-2011 Freescale Semiconductor, Inc.
+ * Copyright 2008-2012 Freescale Semiconductor, Inc.
 */
 #include "compat.h"
 #include "regs.h"
 #include "intern.h"
 #include "jr.h"
+#include "desc_constr.h"
+#include "error.h"
+#include "ctrl.h"
 static int caam_remove(struct platform_device *pdev)
 {
@@ -43,10 +46,154 @@ static int caam_remove(struct platform_device *pdev)
        return ret;
 }
+/*
+ * Descriptor to instantiate RNG State Handle 0 in normal mode and
+ * load the JDKEK, TDKEK and TDSK registers
+ */
+static void build_instantiation_desc(u32 *desc)
+{
+        u32 *jump_cmd;
+        init_job_desc(desc, 0);
+        /* INIT RNG in non-test mode */
+        append_operation(desc, OP_TYPE_CLASS1_ALG | OP_ALG_ALGSEL_RNG |
+                         OP_ALG_AS_INIT);
+        /* wait for done */
+        jump_cmd = append_jump(desc, JUMP_CLASS_CLASS1);
+        set_jump_tgt_here(desc, jump_cmd);
+        /*
+         * load 1 to clear written reg:
+         * resets the done interrrupt and returns the RNG to idle.
+         */
+        append_load_imm_u32(desc, 1, LDST_SRCDST_WORD_CLRW);
+        /* generate secure keys (non-test) */
+        append_operation(desc, OP_TYPE_CLASS1_ALG | OP_ALG_ALGSEL_RNG |
+                         OP_ALG_RNG4_SK);
+}
+struct instantiate_result {
+        struct completion completion;
+        int err;
+};
+static void rng4_init_done(struct device *dev, u32 *desc, u32 err,
+                           void *context)
+{
+        struct instantiate_result *instantiation = context;
+        if (err) {
+                char tmp[CAAM_ERROR_STR_MAX];
+                dev_err(dev, "%08x: %s\n", err, caam_jr_strstatus(tmp, err));
+        }
+        instantiation->err = err;
+        complete(&instantiation->completion);
+}
+static int instantiate_rng(struct device *jrdev)
+{
+        struct instantiate_result instantiation;
+        dma_addr_t desc_dma;
+        u32 *desc;
+        int ret;
+        desc = kmalloc(CAAM_CMD_SZ * 6, GFP_KERNEL | GFP_DMA);
+        if (!desc) {
+                dev_err(jrdev, "cannot allocate RNG init descriptor memory\n");
+                return -ENOMEM;
+        }
+        build_instantiation_desc(desc);
+        desc_dma = dma_map_single(jrdev, desc, desc_bytes(desc), DMA_TO_DEVICE);
+        init_completion(&instantiation.completion);
+        ret = caam_jr_enqueue(jrdev, desc, rng4_init_done, &instantiation);
+        if (!ret) {
+                wait_for_completion_interruptible(&instantiation.completion);
+                ret = instantiation.err;
+                if (ret)
+                        dev_err(jrdev, "unable to instantiate RNG\n");
+        }
+        dma_unmap_single(jrdev, desc_dma, desc_bytes(desc), DMA_TO_DEVICE);
+        kfree(desc);
+        return ret;
+}
+/*
+ * By default, the TRNG runs for 200 clocks per sample;
+ * 800 clocks per sample generates better entropy.
+ */
+static void kick_trng(struct platform_device *pdev)
+{
+        struct device *ctrldev = &pdev->dev;
+        struct caam_drv_private *ctrlpriv = dev_get_drvdata(ctrldev);
+        struct caam_full __iomem *topregs;
+        struct rng4tst __iomem *r4tst;
+        u32 val;
+        topregs = (struct caam_full __iomem *)ctrlpriv->ctrl;
+        r4tst = &topregs->ctrl.r4tst[0];
+        /* put RNG4 into program mode */
+        setbits32(&r4tst->rtmctl, RTMCTL_PRGM);
+        /* 800 clocks per sample */
+        val = rd_reg32(&r4tst->rtsdctl);
+        val = (val & ~RTSDCTL_ENT_DLY_MASK) | (800 << RTSDCTL_ENT_DLY_SHIFT);
+        wr_reg32(&r4tst->rtsdctl, val);
+        /* min. freq. count */
+        wr_reg32(&r4tst->rtfrqmin, 400);
+        /* max. freq. count */
+        wr_reg32(&r4tst->rtfrqmax, 6400);
+        /* put RNG4 into run mode */
+        clrbits32(&r4tst->rtmctl, RTMCTL_PRGM);
+}
+/**
+ * caam_get_era() - Return the ERA of the SEC on SoC, based
+ * on the SEC_VID register.
+ * Returns the ERA number (1..4) or -ENOTSUPP if the ERA is unknown.
+ * @caam_id - the value of the SEC_VID register
+ **/
+int caam_get_era(u64 caam_id)
+{
+        struct sec_vid *sec_vid = (struct sec_vid *)&caam_id;
+        static const struct {
+                u16 ip_id;
+                u8 maj_rev;
+                u8 era;
+        } caam_eras[] = {
+                {0x0A10, 1, 1},
+                {0x0A10, 2, 2},
+                {0x0A12, 1, 3},
+                {0x0A14, 1, 3},
+                {0x0A14, 2, 4},
+                {0x0A16, 1, 4},
+                {0x0A11, 1, 4}
+        };
+        int i;
+        for (i = 0; i < ARRAY_SIZE(caam_eras); i++)
+                if (caam_eras[i].ip_id == sec_vid->ip_id &&
+                        caam_eras[i].maj_rev == sec_vid->maj_rev)
+                                return caam_eras[i].era;
+        return -ENOTSUPP;
+}
+EXPORT_SYMBOL(caam_get_era);
 /* Probe routine for CAAM top (controller) level */
 static int caam_probe(struct platform_device *pdev)
 {
-        int ring, rspec;
+        int ret, ring, rspec;
+        u64 caam_id;
        struct device *dev;
        struct device_node *nprop, *np;
        struct caam_ctrl __iomem *ctrl;
@@ -82,13 +229,18 @@ static int caam_probe(struct platform_device *pdev)
        /*
         * Enable DECO watchdogs and, if this is a PHYS_ADDR_T_64BIT kernel,
-         * 36-bit pointers in master configuration register
+         * long pointers in master configuration register
         */
        setbits32(&topregs->ctrl.mcr, MCFGR_WDENABLE |
                  (sizeof(dma_addr_t) == sizeof(u64) ? MCFGR_LONG_PTR : 0));
        if (sizeof(dma_addr_t) == sizeof(u64))
-                dma_set_mask(dev, DMA_BIT_MASK(36));
+                if (of_device_is_compatible(nprop, "fsl,sec-v5.0"))
+                        dma_set_mask(dev, DMA_BIT_MASK(40));
+                else
+                        dma_set_mask(dev, DMA_BIT_MASK(36));
+        else
+                dma_set_mask(dev, DMA_BIT_MASK(32));
        /*
         * Detect and enable JobRs
@@ -141,14 +293,29 @@ static int caam_probe(struct platform_device *pdev)
                return -ENOMEM;
        }
+        /*
+         * RNG4 based SECs (v5+) need special initialization prior
+         * to executing any descriptors
+         */
+        if (of_device_is_compatible(nprop, "fsl,sec-v5.0")) {
+                kick_trng(pdev);
+                ret = instantiate_rng(ctrlpriv->jrdev[0]);
+                if (ret) {
+                        caam_remove(pdev);
+                        return ret;
+                }
+        }
        /* NOTE: RTIC detection ought to go here, around Si time */
        /* Initialize queue allocator lock */
        spin_lock_init(&ctrlpriv->jr_alloc_lock);
+        caam_id = rd_reg64(&topregs->ctrl.perfmon.caam_id);
        /* Report "alive" for developer to see */
-        dev_info(dev, "device ID = 0x%016llx\n",
+        dev_info(dev, "device ID = 0x%016llx (Era %d)\n", caam_id,
-                 rd_reg64(&topregs->ctrl.perfmon.caam_id));
+                 caam_get_era(caam_id));
        dev_info(dev, "job rings = %d, qi = %d\n",
                 ctrlpriv->total_jobrs, ctrlpriv->qi_present);
diff --git a/drivers/crypto/caam/ctrl.h b/drivers/crypto/caam/ctrl.h
new file mode 100644
index 000000000000..980d44eaaf40
--- /dev/null
+++ b/drivers/crypto/caam/ctrl.h
@@ -0,0 +1,13 @@
+/*
+ * CAAM control-plane driver backend public-level include definitions
+ *
+ * Copyright 2012 Freescale Semiconductor, Inc.
+ */
+#ifndef CTRL_H
+#define CTRL_H
+/* Prototypes for backend-level services exposed to APIs */
+int caam_get_era(u64 caam_id);
+#endif /* CTRL_H */
diff --git a/drivers/crypto/caam/desc.h b/drivers/crypto/caam/desc.h
index a17c2958dab1..f7f833be8c67 100644
--- a/drivers/crypto/caam/desc.h
+++ b/drivers/crypto/caam/desc.h
@@ -8,6 +8,16 @@
 #ifndef DESC_H
 #define DESC_H
+struct sec4_sg_entry {
+        u64 ptr;
+#define SEC4_SG_LEN_FIN 0x40000000
+#define SEC4_SG_LEN_EXT 0x80000000
+        u32 len;
+        u8 reserved;
+        u8 buf_pool_id;
+        u16 offset;
+};
 /* Max size of any CAAM descriptor in 32-bit words, inclusive of header */
 #define MAX_CAAM_DESCSIZE       64
@@ -1162,6 +1172,11 @@
 #define OP_ALG_AAI_GSM          (0x10 << OP_ALG_AAI_SHIFT)
 #define OP_ALG_AAI_EDGE         (0x20 << OP_ALG_AAI_SHIFT)
+/* RNG4 set */
+#define OP_ALG_RNG4_SHIFT       4
+#define OP_ALG_RNG4_MASK        (0x1f3 << OP_ALG_RNG4_SHIFT)
+#define OP_ALG_RNG4_SK          (0x100 << OP_ALG_RNG4_SHIFT)
 #define OP_ALG_AS_SHIFT         2
 #define OP_ALG_AS_MASK          (0x3 << OP_ALG_AS_SHIFT)
@@ -1585,20 +1600,4 @@
 #define NFIFOENTRY_PLEN_SHIFT   0
 #define NFIFOENTRY_PLEN_MASK    (0xFF << NFIFOENTRY_PLEN_SHIFT)
-/*
- * PDB internal definitions
- */
-/* IPSec ESP CBC Encap/Decap Options */
-#define PDBOPTS_ESPCBC_ARSNONE  0x00    /* no antireplay window */
-#define PDBOPTS_ESPCBC_ARS32    0x40    /* 32-entry antireplay window */
-#define PDBOPTS_ESPCBC_ARS64    0xc0    /* 64-entry antireplay window */
-#define PDBOPTS_ESPCBC_IVSRC    0x20    /* IV comes from internal random gen */
-#define PDBOPTS_ESPCBC_ESN      0x10    /* extended sequence included */
-#define PDBOPTS_ESPCBC_OUTFMT   0x08    /* output only decapsulation (decap) */
-#define PDBOPTS_ESPCBC_IPHDRSRC 0x08    /* IP header comes from PDB (encap) */
-#define PDBOPTS_ESPCBC_INCIPHDR 0x04    /* Prepend IP header to output frame */
-#define PDBOPTS_ESPCBC_IPVSN    0x02    /* process IPv6 header */
-#define PDBOPTS_ESPCBC_TUNNEL   0x01    /* tunnel mode next-header byte */
 #endif /* DESC_H */
diff --git a/drivers/crypto/caam/desc_constr.h b/drivers/crypto/caam/desc_constr.h
index 348b882275f0..c85c1f058401 100644
--- a/drivers/crypto/caam/desc_constr.h
+++ b/drivers/crypto/caam/desc_constr.h
@@ -1,7 +1,7 @@
 /*
 * caam descriptor construction helper functions
 *
- * Copyright 2008-2011 Freescale Semiconductor, Inc.
+ * Copyright 2008-2012 Freescale Semiconductor, Inc.
 */
 #include "desc.h"
@@ -51,7 +51,7 @@ static inline void *sh_desc_pdb(u32 *desc)
 static inline void init_desc(u32 *desc, u32 options)
 {
-        *desc = options | HDR_ONE | 1;
+        *desc = (options | HDR_ONE) + 1;
 }
 static inline void init_sh_desc(u32 *desc, u32 options)
@@ -62,9 +62,9 @@ static inline void init_sh_desc(u32 *desc, u32 options)
 static inline void init_sh_desc_pdb(u32 *desc, u32 options, size_t pdb_bytes)
 {
-        u32 pdb_len = pdb_bytes / CAAM_CMD_SZ + 1;
+        u32 pdb_len = (pdb_bytes + CAAM_CMD_SZ - 1) / CAAM_CMD_SZ;
-        init_sh_desc(desc, ((pdb_len << HDR_START_IDX_SHIFT) + pdb_len) |
+        init_sh_desc(desc, (((pdb_len + 1) << HDR_START_IDX_SHIFT) + pdb_len) |
                     options);
 }
@@ -117,6 +117,15 @@ static inline void append_cmd_ptr(u32 *desc, dma_addr_t ptr, int len,
        append_ptr(desc, ptr);
 }
+/* Write length after pointer, rather than inside command */
+static inline void append_cmd_ptr_extlen(u32 *desc, dma_addr_t ptr,
+                                         unsigned int len, u32 command)
+{
+        append_cmd(desc, command);
+        append_ptr(desc, ptr);
+        append_cmd(desc, len);
+}
 static inline void append_cmd_data(u32 *desc, void *data, int len,
                                   u32 command)
 {
@@ -166,13 +175,22 @@ static inline void append_##cmd(u32 *desc, dma_addr_t ptr, unsigned int len, \
        append_cmd_ptr(desc, ptr, len, CMD_##op | options); \
 }
 APPEND_CMD_PTR(key, KEY)
-APPEND_CMD_PTR(seq_in_ptr, SEQ_IN_PTR)
-APPEND_CMD_PTR(seq_out_ptr, SEQ_OUT_PTR)
 APPEND_CMD_PTR(load, LOAD)
 APPEND_CMD_PTR(store, STORE)
 APPEND_CMD_PTR(fifo_load, FIFO_LOAD)
 APPEND_CMD_PTR(fifo_store, FIFO_STORE)
+#define APPEND_SEQ_PTR_INTLEN(cmd, op) \
+static inline void append_seq_##cmd##_ptr_intlen(u32 *desc, dma_addr_t ptr, \
+                                                 unsigned int len, \
+                                                 u32 options) \
+{ \
+        PRINT_POS; \
+        append_cmd_ptr(desc, ptr, len, CMD_SEQ_##op##_PTR | options); \
+}
+APPEND_SEQ_PTR_INTLEN(in, IN)
+APPEND_SEQ_PTR_INTLEN(out, OUT)
 #define APPEND_CMD_PTR_TO_IMM(cmd, op) \
 static inline void append_##cmd##_as_imm(u32 *desc, void *data, \
                                         unsigned int len, u32 options) \
@@ -183,6 +201,33 @@ static inline void append_##cmd##_as_imm(u32 *desc, void *data, \
 APPEND_CMD_PTR_TO_IMM(load, LOAD);
 APPEND_CMD_PTR_TO_IMM(fifo_load, FIFO_LOAD);
+#define APPEND_CMD_PTR_EXTLEN(cmd, op) \
+static inline void append_##cmd##_extlen(u32 *desc, dma_addr_t ptr, \
+                                         unsigned int len, u32 options) \
+{ \
+        PRINT_POS; \
+        append_cmd_ptr_extlen(desc, ptr, len, CMD_##op | SQIN_EXT | options); \
+}
+APPEND_CMD_PTR_EXTLEN(seq_in_ptr, SEQ_IN_PTR)
+APPEND_CMD_PTR_EXTLEN(seq_out_ptr, SEQ_OUT_PTR)
+/*
+ * Determine whether to store length internally or externally depending on
+ * the size of its type
+ */
+#define APPEND_CMD_PTR_LEN(cmd, op, type) \
+static inline void append_##cmd(u32 *desc, dma_addr_t ptr, \
+                                type len, u32 options) \
+{ \
+        PRINT_POS; \
+        if (sizeof(type) > sizeof(u16)) \
+                append_##cmd##_extlen(desc, ptr, len, options); \
+        else \
+                append_##cmd##_intlen(desc, ptr, len, options); \
+}
+APPEND_CMD_PTR_LEN(seq_in_ptr, SEQ_IN_PTR, u32)
+APPEND_CMD_PTR_LEN(seq_out_ptr, SEQ_OUT_PTR, u32)
 /*
 * 2nd variant for commands whose specified immediate length differs
 * from length of immediate data provided, e.g., split keys
diff --git a/drivers/crypto/caam/error.c b/drivers/crypto/caam/error.c
index 7e2d54bffad6..9955ed9643e6 100644
--- a/drivers/crypto/caam/error.c
+++ b/drivers/crypto/caam/error.c
@@ -39,18 +39,20 @@ static void report_ccb_status(u32 status, char *outstr)
        char *cha_id_list[] = {
                "",
                "AES",
-                "DES, 3DES",
+                "DES",
                "ARC4",
-                "MD5, SHA-1, SH-224, SHA-256, SHA-384, SHA-512",
+                "MDHA",
                "RNG",
                "SNOW f8",
-                "Kasumi f8, f9",
+                "Kasumi f8/9",
-                "All Public Key Algorithms",
+                "PKHA",
-                "CRC",
+                "CRCA",
                "SNOW f9",
+                "ZUCE",
+                "ZUCA",
        };
        char *err_id_list[] = {
-                "None. No error.",
+                "No error.",
                "Mode error.",
                "Data size error.",
                "Key size error.",
@@ -67,6 +69,20 @@ static void report_ccb_status(u32 status, char *outstr)
                "Invalid CHA combination was selected",
                "Invalid CHA selected.",
        };
+        char *rng_err_id_list[] = {
+                "",
+                "",
+                "",
+                "Instantiate",
+                "Not instantiated",
+                "Test instantiate",
+                "Prediction resistance",
+                "",
+                "Prediction resistance and test request",
+                "Uninstantiate",
+                "",
+                "Secure key generation",
+        };
        u8 cha_id = (status & JRSTA_CCBERR_CHAID_MASK) >>
                    JRSTA_CCBERR_CHAID_SHIFT;
        u8 err_id = status & JRSTA_CCBERR_ERRID_MASK;
@@ -81,7 +97,13 @@ static void report_ccb_status(u32 status, char *outstr)
                           cha_id, sizeof("ff"));
        }
-        if (err_id < ARRAY_SIZE(err_id_list)) {
+        if ((cha_id << JRSTA_CCBERR_CHAID_SHIFT) == JRSTA_CCBERR_CHAID_RNG &&
+            err_id < ARRAY_SIZE(rng_err_id_list) &&
+            strlen(rng_err_id_list[err_id])) {
+                /* RNG-only error */
+                SPRINTFCAT(outstr, "%s", rng_err_id_list[err_id],
+                           strlen(rng_err_id_list[err_id]));
+        } else if (err_id < ARRAY_SIZE(err_id_list)) {
                SPRINTFCAT(outstr, "%s", err_id_list[err_id],
                           strlen(err_id_list[err_id]));
        } else {
@@ -101,10 +123,10 @@ static void report_deco_status(u32 status, char *outstr)
                u8 value;
                char *error_text;
        } desc_error_list[] = {
-                { 0x00, "None. No error." },
+                { 0x00, "No error." },
                { 0x01, "SGT Length Error. The descriptor is trying to read "
                        "more data than is contained in the SGT table." },
-                { 0x02, "Reserved." },
+                { 0x02, "SGT Null Entry Error." },
                { 0x03, "Job Ring Control Error. There is a bad value in the "
                        "Job Ring Control register." },
                { 0x04, "Invalid Descriptor Command. The Descriptor Command "
@@ -116,7 +138,7 @@ static void report_deco_status(u32 status, char *outstr)
                { 0x09, "Invalid OPERATION Command" },
                { 0x0A, "Invalid FIFO LOAD Command" },
                { 0x0B, "Invalid FIFO STORE Command" },
-                { 0x0C, "Invalid MOVE Command" },
+                { 0x0C, "Invalid MOVE/MOVE_LEN Command" },
                { 0x0D, "Invalid JUMP Command. A nonlocal JUMP Command is "
                        "invalid because the target is not a Job Header "
                        "Command, or the jump is from a Trusted Descriptor to "
@@ -166,6 +188,8 @@ static void report_deco_status(u32 status, char *outstr)
                        "(input frame; block ciphers) and IPsec decap (output "
                        "frame, when doing the next header byte update) and "
                        "DCRC (output frame)." },
+                { 0x23, "Read Input Frame error" },
+                { 0x24, "JDKEK, TDKEK or TDSK not loaded error" },
                { 0x80, "DNR (do not run) error" },
                { 0x81, "undefined protocol command" },
                { 0x82, "invalid setting in PDB" },
diff --git a/drivers/crypto/caam/intern.h b/drivers/crypto/caam/intern.h
index a34be01b0b29..5cd4c1b268a1 100644
--- a/drivers/crypto/caam/intern.h
+++ b/drivers/crypto/caam/intern.h
@@ -43,7 +43,7 @@ struct caam_drv_private_jr {
        struct device *parentdev;       /* points back to controller dev */
        int ridx;
        struct caam_job_ring __iomem *rregs;    /* JobR's register space */
-        struct tasklet_struct irqtask[NR_CPUS];
+        struct tasklet_struct irqtask;
        int irq;                        /* One per queue */
        int assign;                     /* busy/free */
@@ -86,10 +86,10 @@ struct caam_drv_private {
        /* which jr allocated to scatterlist crypto */
        atomic_t tfm_count ____cacheline_aligned;
-        int num_jrs_for_algapi;
-        struct device **algapi_jr;
        /* list of registered crypto algorithms (mk generic context handle?) */
        struct list_head alg_list;
+        /* list of registered hash algorithms (mk generic context handle?) */
+        struct list_head hash_list;
        /*
         * debugfs entries for developer view into driver/device
diff --git a/drivers/crypto/caam/jr.c b/drivers/crypto/caam/jr.c
index 340fa322c0f0..93d14070141a 100644
--- a/drivers/crypto/caam/jr.c
+++ b/drivers/crypto/caam/jr.c
@@ -2,7 +2,7 @@
 * CAAM/SEC 4.x transport/backend driver
 * JobR backend functionality
 *
- * Copyright 2008-2011 Freescale Semiconductor, Inc.
+ * Copyright 2008-2012 Freescale Semiconductor, Inc.
 */
 #include "compat.h"
@@ -43,7 +43,7 @@ static irqreturn_t caam_jr_interrupt(int irq, void *st_dev)
        wr_reg32(&jrp->rregs->jrintstatus, irqstate);
        preempt_disable();
-        tasklet_schedule(&jrp->irqtask[smp_processor_id()]);
+        tasklet_schedule(&jrp->irqtask);
        preempt_enable();
        return IRQ_HANDLED;
@@ -58,17 +58,16 @@ static void caam_jr_dequeue(unsigned long devarg)
        void (*usercall)(struct device *dev, u32 *desc, u32 status, void *arg);
        u32 *userdesc, userstatus;
        void *userarg;
-        unsigned long flags;
-        spin_lock_irqsave(&jrp->outlock, flags);
+        while (rd_reg32(&jrp->rregs->outring_used)) {
-        head = ACCESS_ONCE(jrp->head);
+                head = ACCESS_ONCE(jrp->head);
-        sw_idx = tail = jrp->tail;
-        while (CIRC_CNT(head, tail, JOBR_DEPTH) >= 1 &&
+                spin_lock(&jrp->outlock);
-               rd_reg32(&jrp->rregs->outring_used)) {
+                sw_idx = tail = jrp->tail;
                hw_idx = jrp->out_ring_read_index;
                for (i = 0; CIRC_CNT(head, tail + i, JOBR_DEPTH) >= 1; i++) {
                        sw_idx = (tail + i) & (JOBR_DEPTH - 1);
@@ -95,7 +94,8 @@ static void caam_jr_dequeue(unsigned long devarg)
                userdesc = jrp->entinfo[sw_idx].desc_addr_virt;
                userstatus = jrp->outring[hw_idx].jrstatus;
-                smp_mb();
+                /* set done */
+                wr_reg32(&jrp->rregs->outring_rmvd, 1);
                jrp->out_ring_read_index = (jrp->out_ring_read_index + 1) &
                                           (JOBR_DEPTH - 1);
@@ -115,22 +115,12 @@ static void caam_jr_dequeue(unsigned long devarg)
                        jrp->tail = tail;
                }
-                /* set done */
+                spin_unlock(&jrp->outlock);
-                wr_reg32(&jrp->rregs->outring_rmvd, 1);
-                spin_unlock_irqrestore(&jrp->outlock, flags);
                /* Finally, execute user's callback */
                usercall(dev, userdesc, userstatus, userarg);
-                spin_lock_irqsave(&jrp->outlock, flags);
-                head = ACCESS_ONCE(jrp->head);
-                sw_idx = tail = jrp->tail;
        }
-        spin_unlock_irqrestore(&jrp->outlock, flags);
        /* reenable / unmask IRQs */
        clrbits32(&jrp->rregs->rconfig_lo, JRCFG_IMSK);
 }
@@ -148,23 +138,22 @@ int caam_jr_register(struct device *ctrldev, struct device **rdev)
 {
        struct caam_drv_private *ctrlpriv = dev_get_drvdata(ctrldev);
        struct caam_drv_private_jr *jrpriv = NULL;
-        unsigned long flags;
        int ring;
        /* Lock, if free ring - assign, unlock */
-        spin_lock_irqsave(&ctrlpriv->jr_alloc_lock, flags);
+        spin_lock(&ctrlpriv->jr_alloc_lock);
        for (ring = 0; ring < ctrlpriv->total_jobrs; ring++) {
                jrpriv = dev_get_drvdata(ctrlpriv->jrdev[ring]);
                if (jrpriv->assign == JOBR_UNASSIGNED) {
                        jrpriv->assign = JOBR_ASSIGNED;
                        *rdev = ctrlpriv->jrdev[ring];
-                        spin_unlock_irqrestore(&ctrlpriv->jr_alloc_lock, flags);
+                        spin_unlock(&ctrlpriv->jr_alloc_lock);
                        return ring;
                }
        }
        /* If assigned, write dev where caller needs it */
-        spin_unlock_irqrestore(&ctrlpriv->jr_alloc_lock, flags);
+        spin_unlock(&ctrlpriv->jr_alloc_lock);
        *rdev = NULL;
        return -ENODEV;
@@ -182,7 +171,6 @@ int caam_jr_deregister(struct device *rdev)
 {
        struct caam_drv_private_jr *jrpriv = dev_get_drvdata(rdev);
        struct caam_drv_private *ctrlpriv;
-        unsigned long flags;
        /* Get the owning controller's private space */
        ctrlpriv = dev_get_drvdata(jrpriv->parentdev);
@@ -195,9 +183,9 @@ int caam_jr_deregister(struct device *rdev)
                return -EBUSY;
        /* Release ring */
-        spin_lock_irqsave(&ctrlpriv->jr_alloc_lock, flags);
+        spin_lock(&ctrlpriv->jr_alloc_lock);
        jrpriv->assign = JOBR_UNASSIGNED;
-        spin_unlock_irqrestore(&ctrlpriv->jr_alloc_lock, flags);
+        spin_unlock(&ctrlpriv->jr_alloc_lock);
        return 0;
 }
@@ -238,7 +226,6 @@ int caam_jr_enqueue(struct device *dev, u32 *desc,
 {
        struct caam_drv_private_jr *jrp = dev_get_drvdata(dev);
        struct caam_jrentry_info *head_entry;
-        unsigned long flags;
        int head, tail, desc_size;
        dma_addr_t desc_dma;
@@ -249,14 +236,14 @@ int caam_jr_enqueue(struct device *dev, u32 *desc,
                return -EIO;
        }
-        spin_lock_irqsave(&jrp->inplock, flags);
+        spin_lock_bh(&jrp->inplock);
        head = jrp->head;
        tail = ACCESS_ONCE(jrp->tail);
        if (!rd_reg32(&jrp->rregs->inpring_avail) ||
            CIRC_SPACE(head, tail, JOBR_DEPTH) <= 0) {
-                spin_unlock_irqrestore(&jrp->inplock, flags);
+                spin_unlock_bh(&jrp->inplock);
                dma_unmap_single(dev, desc_dma, desc_size, DMA_TO_DEVICE);
                return -EBUSY;
        }
@@ -276,11 +263,9 @@ int caam_jr_enqueue(struct device *dev, u32 *desc,
                                    (JOBR_DEPTH - 1);
        jrp->head = (head + 1) & (JOBR_DEPTH - 1);
-        wmb();
        wr_reg32(&jrp->rregs->inpring_jobadd, 1);
-        spin_unlock_irqrestore(&jrp->inplock, flags);
+        spin_unlock_bh(&jrp->inplock);
        return 0;
 }
@@ -337,11 +322,9 @@ static int caam_jr_init(struct device *dev)
        jrp = dev_get_drvdata(dev);
-        /* Connect job ring interrupt handler. */
+        tasklet_init(&jrp->irqtask, caam_jr_dequeue, (unsigned long)dev);
-        for_each_possible_cpu(i)
-                tasklet_init(&jrp->irqtask[i], caam_jr_dequeue,
-                             (unsigned long)dev);
+        /* Connect job ring interrupt handler. */
        error = request_irq(jrp->irq, caam_jr_interrupt, IRQF_SHARED,
                            "caam-jobr", dev);
        if (error) {
@@ -356,10 +339,11 @@ static int caam_jr_init(struct device *dev)
        if (error)
                return error;
-        jrp->inpring = kzalloc(sizeof(dma_addr_t) * JOBR_DEPTH,
+        jrp->inpring = dma_alloc_coherent(dev, sizeof(dma_addr_t) * JOBR_DEPTH,
-                               GFP_KERNEL | GFP_DMA);
+                                          &inpbusaddr, GFP_KERNEL);
-        jrp->outring = kzalloc(sizeof(struct jr_outentry) *
-                               JOBR_DEPTH, GFP_KERNEL | GFP_DMA);
+        jrp->outring = dma_alloc_coherent(dev, sizeof(struct jr_outentry) *
+                                          JOBR_DEPTH, &outbusaddr, GFP_KERNEL);
        jrp->entinfo = kzalloc(sizeof(struct caam_jrentry_info) * JOBR_DEPTH,
                               GFP_KERNEL);
@@ -375,31 +359,6 @@ static int caam_jr_init(struct device *dev)
                jrp->entinfo[i].desc_addr_dma = !0;
        /* Setup rings */
-        inpbusaddr = dma_map_single(dev, jrp->inpring,
-                                    sizeof(u32 *) * JOBR_DEPTH,
-                                    DMA_BIDIRECTIONAL);
-        if (dma_mapping_error(dev, inpbusaddr)) {
-                dev_err(dev, "caam_jr_init(): can't map input ring\n");
-                kfree(jrp->inpring);
-                kfree(jrp->outring);
-                kfree(jrp->entinfo);
-                return -EIO;
-        }
-        outbusaddr = dma_map_single(dev, jrp->outring,
-                                    sizeof(struct jr_outentry) * JOBR_DEPTH,
-                                    DMA_BIDIRECTIONAL);
-        if (dma_mapping_error(dev, outbusaddr)) {
-                dev_err(dev, "caam_jr_init(): can't map output ring\n");
-                        dma_unmap_single(dev, inpbusaddr,
-                                         sizeof(u32 *) * JOBR_DEPTH,
-                                         DMA_BIDIRECTIONAL);
-                kfree(jrp->inpring);
-                kfree(jrp->outring);
-                kfree(jrp->entinfo);
-                return -EIO;
-        }
        jrp->inp_ring_write_index = 0;
        jrp->out_ring_read_index = 0;
        jrp->head = 0;
@@ -431,12 +390,11 @@ int caam_jr_shutdown(struct device *dev)
 {
        struct caam_drv_private_jr *jrp = dev_get_drvdata(dev);
        dma_addr_t inpbusaddr, outbusaddr;
-        int ret, i;
+        int ret;
        ret = caam_reset_hw_jr(dev);
-        for_each_possible_cpu(i)
+        tasklet_kill(&jrp->irqtask);
-                tasklet_kill(&jrp->irqtask[i]);
        /* Release interrupt */
        free_irq(jrp->irq, dev);
@@ -444,13 +402,10 @@ int caam_jr_shutdown(struct device *dev)
        /* Free rings */
        inpbusaddr = rd_reg64(&jrp->rregs->inpring_base);
        outbusaddr = rd_reg64(&jrp->rregs->outring_base);
-        dma_unmap_single(dev, outbusaddr,
+        dma_free_coherent(dev, sizeof(dma_addr_t) * JOBR_DEPTH,
-                         sizeof(struct jr_outentry) * JOBR_DEPTH,
+                          jrp->inpring, inpbusaddr);
-                         DMA_BIDIRECTIONAL);
+        dma_free_coherent(dev, sizeof(struct jr_outentry) * JOBR_DEPTH,
-        dma_unmap_single(dev, inpbusaddr, sizeof(u32 *) * JOBR_DEPTH,
+                          jrp->outring, outbusaddr);
-                         DMA_BIDIRECTIONAL);
-        kfree(jrp->outring);
-        kfree(jrp->inpring);
        kfree(jrp->entinfo);
        return ret;
@@ -503,6 +458,14 @@ int caam_jr_probe(struct platform_device *pdev, struct device_node *np,
        dev_set_drvdata(jrdev, jrpriv);
        ctrlpriv->jrdev[ring] = jrdev;
+        if (sizeof(dma_addr_t) == sizeof(u64))
+                if (of_device_is_compatible(np, "fsl,sec-v5.0-job-ring"))
+                        dma_set_mask(jrdev, DMA_BIT_MASK(40));
+                else
+                        dma_set_mask(jrdev, DMA_BIT_MASK(36));
+        else
+                dma_set_mask(jrdev, DMA_BIT_MASK(32));
        /* Identify the interrupt */
        jrpriv->irq = of_irq_to_resource(np, 0, NULL);
diff --git a/drivers/crypto/caam/key_gen.c b/drivers/crypto/caam/key_gen.c
new file mode 100644
index 000000000000..002888185f17
--- /dev/null
+++ b/drivers/crypto/caam/key_gen.c
@@ -0,0 +1,122 @@
+/*
+ * CAAM/SEC 4.x functions for handling key-generation jobs
+ *
+ * Copyright 2008-2011 Freescale Semiconductor, Inc.
+ *
+ */
+#include "compat.h"
+#include "jr.h"
+#include "error.h"
+#include "desc_constr.h"
+#include "key_gen.h"
+void split_key_done(struct device *dev, u32 *desc, u32 err,
+                           void *context)
+{
+        struct split_key_result *res = context;
+#ifdef DEBUG
+        dev_err(dev, "%s %d: err 0x%x\n", __func__, __LINE__, err);
+#endif
+        if (err) {
+                char tmp[CAAM_ERROR_STR_MAX];
+                dev_err(dev, "%08x: %s\n", err, caam_jr_strstatus(tmp, err));
+        }
+        res->err = err;
+        complete(&res->completion);
+}
+EXPORT_SYMBOL(split_key_done);
+/*
+get a split ipad/opad key
+Split key generation-----------------------------------------------
+[00] 0xb0810008    jobdesc: stidx=1 share=never len=8
+[01] 0x04000014        key: class2->keyreg len=20
+                        @0xffe01000
+[03] 0x84410014  operation: cls2-op sha1 hmac init dec
+[04] 0x24940000     fifold: class2 msgdata-last2 len=0 imm
+[05] 0xa4000001       jump: class2 local all ->1 [06]
+[06] 0x64260028    fifostr: class2 mdsplit-jdk len=40
+                        @0xffe04000
+*/
+u32 gen_split_key(struct device *jrdev, u8 *key_out, int split_key_len,
+                  int split_key_pad_len, const u8 *key_in, u32 keylen,
+                  u32 alg_op)
+{
+        u32 *desc;
+        struct split_key_result result;
+        dma_addr_t dma_addr_in, dma_addr_out;
+        int ret = 0;
+        desc = kmalloc(CAAM_CMD_SZ * 6 + CAAM_PTR_SZ * 2, GFP_KERNEL | GFP_DMA);
+        init_job_desc(desc, 0);
+        dma_addr_in = dma_map_single(jrdev, (void *)key_in, keylen,
+                                     DMA_TO_DEVICE);
+        if (dma_mapping_error(jrdev, dma_addr_in)) {
+                dev_err(jrdev, "unable to map key input memory\n");
+                kfree(desc);
+                return -ENOMEM;
+        }
+        append_key(desc, dma_addr_in, keylen, CLASS_2 | KEY_DEST_CLASS_REG);
+        /* Sets MDHA up into an HMAC-INIT */
+        append_operation(desc, alg_op | OP_ALG_DECRYPT | OP_ALG_AS_INIT);
+        /*
+         * do a FIFO_LOAD of zero, this will trigger the internal key expansion
+         * into both pads inside MDHA
+         */
+        append_fifo_load_as_imm(desc, NULL, 0, LDST_CLASS_2_CCB |
+                                FIFOLD_TYPE_MSG | FIFOLD_TYPE_LAST2);
+        /*
+         * FIFO_STORE with the explicit split-key content store
+         * (0x26 output type)
+         */
+        dma_addr_out = dma_map_single(jrdev, key_out, split_key_pad_len,
+                                      DMA_FROM_DEVICE);
+        if (dma_mapping_error(jrdev, dma_addr_out)) {
+                dev_err(jrdev, "unable to map key output memory\n");
+                kfree(desc);
+                return -ENOMEM;
+        }
+        append_fifo_store(desc, dma_addr_out, split_key_len,
+                          LDST_CLASS_2_CCB | FIFOST_TYPE_SPLIT_KEK);
+#ifdef DEBUG
+        print_hex_dump(KERN_ERR, "ctx.key@"xstr(__LINE__)": ",
+                       DUMP_PREFIX_ADDRESS, 16, 4, key_in, keylen, 1);
+        print_hex_dump(KERN_ERR, "jobdesc@"xstr(__LINE__)": ",
+                       DUMP_PREFIX_ADDRESS, 16, 4, desc, desc_bytes(desc), 1);
+#endif
+        result.err = 0;
+        init_completion(&result.completion);
+        ret = caam_jr_enqueue(jrdev, desc, split_key_done, &result);
+        if (!ret) {
+                /* in progress */
+                wait_for_completion_interruptible(&result.completion);
+                ret = result.err;
+#ifdef DEBUG
+                print_hex_dump(KERN_ERR, "ctx.key@"xstr(__LINE__)": ",
+                               DUMP_PREFIX_ADDRESS, 16, 4, key_out,
+                               split_key_pad_len, 1);
+#endif
+        }
+        dma_unmap_single(jrdev, dma_addr_out, split_key_pad_len,
+                         DMA_FROM_DEVICE);
+        dma_unmap_single(jrdev, dma_addr_in, keylen, DMA_TO_DEVICE);
+        kfree(desc);
+        return ret;
+}
diff --git a/drivers/crypto/caam/key_gen.h b/drivers/crypto/caam/key_gen.h
new file mode 100644
index 000000000000..d95d290c6e8b
--- /dev/null
+++ b/drivers/crypto/caam/key_gen.h
@@ -0,0 +1,17 @@
+/*
+ * CAAM/SEC 4.x definitions for handling key-generation jobs
+ *
+ * Copyright 2008-2011 Freescale Semiconductor, Inc.
+ *
+ */
+struct split_key_result {
+        struct completion completion;
+        int err;
+};
+void split_key_done(struct device *dev, u32 *desc, u32 err, void *context);
+u32 gen_split_key(struct device *jrdev, u8 *key_out, int split_key_len,
+                    int split_key_pad_len, const u8 *key_in, u32 keylen,
+                    u32 alg_op);
diff --git a/drivers/crypto/caam/pdb.h b/drivers/crypto/caam/pdb.h
new file mode 100644
index 000000000000..62950d22ac13
--- /dev/null
+++ b/drivers/crypto/caam/pdb.h
@@ -0,0 +1,401 @@
+/*
+ * CAAM Protocol Data Block (PDB) definition header file
+ *
+ * Copyright 2008-2012 Freescale Semiconductor, Inc.
+ *
+ */
+#ifndef CAAM_PDB_H
+#define CAAM_PDB_H
+/*
+ * PDB- IPSec ESP Header Modification Options
+ */
+#define PDBHMO_ESP_DECAP_SHIFT  12
+#define PDBHMO_ESP_ENCAP_SHIFT  4
+/*
+ * Encap and Decap - Decrement TTL (Hop Limit) - Based on the value of the
+ * Options Byte IP version (IPvsn) field:
+ * if IPv4, decrement the inner IP header TTL field (byte 8);
+ * if IPv6 decrement the inner IP header Hop Limit field (byte 7).
+*/
+#define PDBHMO_ESP_DECAP_DEC_TTL        (0x02 << PDBHMO_ESP_DECAP_SHIFT)
+#define PDBHMO_ESP_ENCAP_DEC_TTL        (0x02 << PDBHMO_ESP_ENCAP_SHIFT)
+/*
+ * Decap - DiffServ Copy - Copy the IPv4 TOS or IPv6 Traffic Class byte
+ * from the outer IP header to the inner IP header.
+ */
+#define PDBHMO_ESP_DIFFSERV             (0x01 << PDBHMO_ESP_DECAP_SHIFT)
+/*
+ * Encap- Copy DF bit -if an IPv4 tunnel mode outer IP header is coming from
+ * the PDB, copy the DF bit from the inner IP header to the outer IP header.
+ */
+#define PDBHMO_ESP_DFBIT                (0x04 << PDBHMO_ESP_ENCAP_SHIFT)
+/*
+ * PDB - IPSec ESP Encap/Decap Options
+ */
+#define PDBOPTS_ESP_ARSNONE     0x00 /* no antireplay window */
+#define PDBOPTS_ESP_ARS32       0x40 /* 32-entry antireplay window */
+#define PDBOPTS_ESP_ARS64       0xc0 /* 64-entry antireplay window */
+#define PDBOPTS_ESP_IVSRC       0x20 /* IV comes from internal random gen */
+#define PDBOPTS_ESP_ESN         0x10 /* extended sequence included */
+#define PDBOPTS_ESP_OUTFMT      0x08 /* output only decapsulation (decap) */
+#define PDBOPTS_ESP_IPHDRSRC    0x08 /* IP header comes from PDB (encap) */
+#define PDBOPTS_ESP_INCIPHDR    0x04 /* Prepend IP header to output frame */
+#define PDBOPTS_ESP_IPVSN       0x02 /* process IPv6 header */
+#define PDBOPTS_ESP_TUNNEL      0x01 /* tunnel mode next-header byte */
+#define PDBOPTS_ESP_IPV6        0x02 /* ip header version is V6 */
+#define PDBOPTS_ESP_DIFFSERV    0x40 /* copy TOS/TC from inner iphdr */
+#define PDBOPTS_ESP_UPDATE_CSUM 0x80 /* encap-update ip header checksum */
+#define PDBOPTS_ESP_VERIFY_CSUM 0x20 /* decap-validate ip header checksum */
+/*
+ * General IPSec encap/decap PDB definitions
+ */
+struct ipsec_encap_cbc {
+        u32 iv[4];
+};
+struct ipsec_encap_ctr {
+        u32 ctr_nonce;
+        u32 ctr_initial;
+        u32 iv[2];
+};
+struct ipsec_encap_ccm {
+        u32 salt; /* lower 24 bits */
+        u8 b0_flags;
+        u8 ctr_flags;
+        u16 ctr_initial;
+        u32 iv[2];
+};
+struct ipsec_encap_gcm {
+        u32 salt; /* lower 24 bits */
+        u32 rsvd1;
+        u32 iv[2];
+};
+struct ipsec_encap_pdb {
+        u8 hmo_rsvd;
+        u8 ip_nh;
+        u8 ip_nh_offset;
+        u8 options;
+        u32 seq_num_ext_hi;
+        u32 seq_num;
+        union {
+                struct ipsec_encap_cbc cbc;
+                struct ipsec_encap_ctr ctr;
+                struct ipsec_encap_ccm ccm;
+                struct ipsec_encap_gcm gcm;
+        };
+        u32 spi;
+        u16 rsvd1;
+        u16 ip_hdr_len;
+        u32 ip_hdr[0]; /* optional IP Header content */
+};
+struct ipsec_decap_cbc {
+        u32 rsvd[2];
+};
+struct ipsec_decap_ctr {
+        u32 salt;
+        u32 ctr_initial;
+};
+struct ipsec_decap_ccm {
+        u32 salt;
+        u8 iv_flags;
+        u8 ctr_flags;
+        u16 ctr_initial;
+};
+struct ipsec_decap_gcm {
+        u32 salt;
+        u32 resvd;
+};
+struct ipsec_decap_pdb {
+        u16 hmo_ip_hdr_len;
+        u8 ip_nh_offset;
+        u8 options;
+        union {
+                struct ipsec_decap_cbc cbc;
+                struct ipsec_decap_ctr ctr;
+                struct ipsec_decap_ccm ccm;
+                struct ipsec_decap_gcm gcm;
+        };
+        u32 seq_num_ext_hi;
+        u32 seq_num;
+        u32 anti_replay[2];
+        u32 end_index[0];
+};
+/*
+ * IPSec ESP Datapath Protocol Override Register (DPOVRD)
+ */
+struct ipsec_deco_dpovrd {
+#define IPSEC_ENCAP_DECO_DPOVRD_USE 0x80
+        u8 ovrd_ecn;
+        u8 ip_hdr_len;
+        u8 nh_offset;
+        u8 next_header; /* reserved if decap */
+};
+/*
+ * IEEE 802.11i WiFi Protocol Data Block
+ */
+#define WIFI_PDBOPTS_FCS        0x01
+#define WIFI_PDBOPTS_AR         0x40
+struct wifi_encap_pdb {
+        u16 mac_hdr_len;
+        u8 rsvd;
+        u8 options;
+        u8 iv_flags;
+        u8 pri;
+        u16 pn1;
+        u32 pn2;
+        u16 frm_ctrl_mask;
+        u16 seq_ctrl_mask;
+        u8 rsvd1[2];
+        u8 cnst;
+        u8 key_id;
+        u8 ctr_flags;
+        u8 rsvd2;
+        u16 ctr_init;
+};
+struct wifi_decap_pdb {
+        u16 mac_hdr_len;
+        u8 rsvd;
+        u8 options;
+        u8 iv_flags;
+        u8 pri;
+        u16 pn1;
+        u32 pn2;
+        u16 frm_ctrl_mask;
+        u16 seq_ctrl_mask;
+        u8 rsvd1[4];
+        u8 ctr_flags;
+        u8 rsvd2;
+        u16 ctr_init;
+};
+/*
+ * IEEE 802.16 WiMAX Protocol Data Block
+ */
+#define WIMAX_PDBOPTS_FCS       0x01
+#define WIMAX_PDBOPTS_AR        0x40 /* decap only */
+struct wimax_encap_pdb {
+        u8 rsvd[3];
+        u8 options;
+        u32 nonce;
+        u8 b0_flags;
+        u8 ctr_flags;
+        u16 ctr_init;
+        /* begin DECO writeback region */
+        u32 pn;
+        /* end DECO writeback region */
+};
+struct wimax_decap_pdb {
+        u8 rsvd[3];
+        u8 options;
+        u32 nonce;
+        u8 iv_flags;
+        u8 ctr_flags;
+        u16 ctr_init;
+        /* begin DECO writeback region */
+        u32 pn;
+        u8 rsvd1[2];
+        u16 antireplay_len;
+        u64 antireplay_scorecard;
+        /* end DECO writeback region */
+};
+/*
+ * IEEE 801.AE MacSEC Protocol Data Block
+ */
+#define MACSEC_PDBOPTS_FCS      0x01
+#define MACSEC_PDBOPTS_AR       0x40 /* used in decap only */
+struct macsec_encap_pdb {
+        u16 aad_len;
+        u8 rsvd;
+        u8 options;
+        u64 sci;
+        u16 ethertype;
+        u8 tci_an;
+        u8 rsvd1;
+        /* begin DECO writeback region */
+        u32 pn;
+        /* end DECO writeback region */
+};
+struct macsec_decap_pdb {
+        u16 aad_len;
+        u8 rsvd;
+        u8 options;
+        u64 sci;
+        u8 rsvd1[3];
+        /* begin DECO writeback region */
+        u8 antireplay_len;
+        u32 pn;
+        u64 antireplay_scorecard;
+        /* end DECO writeback region */
+};
+/*
+ * SSL/TLS/DTLS Protocol Data Blocks
+ */
+#define TLS_PDBOPTS_ARS32       0x40
+#define TLS_PDBOPTS_ARS64       0xc0
+#define TLS_PDBOPTS_OUTFMT      0x08
+#define TLS_PDBOPTS_IV_WRTBK    0x02 /* 1.1/1.2/DTLS only */
+#define TLS_PDBOPTS_EXP_RND_IV  0x01 /* 1.1/1.2/DTLS only */
+struct tls_block_encap_pdb {
+        u8 type;
+        u8 version[2];
+        u8 options;
+        u64 seq_num;
+        u32 iv[4];
+};
+struct tls_stream_encap_pdb {
+        u8 type;
+        u8 version[2];
+        u8 options;
+        u64 seq_num;
+        u8 i;
+        u8 j;
+        u8 rsvd1[2];
+};
+struct dtls_block_encap_pdb {
+        u8 type;
+        u8 version[2];
+        u8 options;
+        u16 epoch;
+        u16 seq_num[3];
+        u32 iv[4];
+};
+struct tls_block_decap_pdb {
+        u8 rsvd[3];
+        u8 options;
+        u64 seq_num;
+        u32 iv[4];
+};
+struct tls_stream_decap_pdb {
+        u8 rsvd[3];
+        u8 options;
+        u64 seq_num;
+        u8 i;
+        u8 j;
+        u8 rsvd1[2];
+};
+struct dtls_block_decap_pdb {
+        u8 rsvd[3];
+        u8 options;
+        u16 epoch;
+        u16 seq_num[3];
+        u32 iv[4];
+        u64 antireplay_scorecard;
+};
+/*
+ * SRTP Protocol Data Blocks
+ */
+#define SRTP_PDBOPTS_MKI        0x08
+#define SRTP_PDBOPTS_AR         0x40
+struct srtp_encap_pdb {
+        u8 x_len;
+        u8 mki_len;
+        u8 n_tag;
+        u8 options;
+        u32 cnst0;
+        u8 rsvd[2];
+        u16 cnst1;
+        u16 salt[7];
+        u16 cnst2;
+        u32 rsvd1;
+        u32 roc;
+        u32 opt_mki;
+};
+struct srtp_decap_pdb {
+        u8 x_len;
+        u8 mki_len;
+        u8 n_tag;
+        u8 options;
+        u32 cnst0;
+        u8 rsvd[2];
+        u16 cnst1;
+        u16 salt[7];
+        u16 cnst2;
+        u16 rsvd1;
+        u16 seq_num;
+        u32 roc;
+        u64 antireplay_scorecard;
+};
+/*
+ * DSA/ECDSA Protocol Data Blocks
+ * Two of these exist: DSA-SIGN, and DSA-VERIFY. They are similar
+ * except for the treatment of "w" for verify, "s" for sign,
+ * and the placement of "a,b".
+ */
+#define DSA_PDB_SGF_SHIFT       24
+#define DSA_PDB_SGF_MASK        (0xff << DSA_PDB_SGF_SHIFT)
+#define DSA_PDB_SGF_Q           (0x80 << DSA_PDB_SGF_SHIFT)
+#define DSA_PDB_SGF_R           (0x40 << DSA_PDB_SGF_SHIFT)
+#define DSA_PDB_SGF_G           (0x20 << DSA_PDB_SGF_SHIFT)
+#define DSA_PDB_SGF_W           (0x10 << DSA_PDB_SGF_SHIFT)
+#define DSA_PDB_SGF_S           (0x10 << DSA_PDB_SGF_SHIFT)
+#define DSA_PDB_SGF_F           (0x08 << DSA_PDB_SGF_SHIFT)
+#define DSA_PDB_SGF_C           (0x04 << DSA_PDB_SGF_SHIFT)
+#define DSA_PDB_SGF_D           (0x02 << DSA_PDB_SGF_SHIFT)
+#define DSA_PDB_SGF_AB_SIGN     (0x02 << DSA_PDB_SGF_SHIFT)
+#define DSA_PDB_SGF_AB_VERIFY   (0x01 << DSA_PDB_SGF_SHIFT)
+#define DSA_PDB_L_SHIFT         7
+#define DSA_PDB_L_MASK          (0x3ff << DSA_PDB_L_SHIFT)
+#define DSA_PDB_N_MASK          0x7f
+struct dsa_sign_pdb {
+        u32 sgf_ln; /* Use DSA_PDB_ defintions per above */
+        u8 *q;
+        u8 *r;
+        u8 *g;  /* or Gx,y */
+        u8 *s;
+        u8 *f;
+        u8 *c;
+        u8 *d;
+        u8 *ab; /* ECC only */
+        u8 *u;
+};
+struct dsa_verify_pdb {
+        u32 sgf_ln;
+        u8 *q;
+        u8 *r;
+        u8 *g;  /* or Gx,y */
+        u8 *w; /* or Wx,y */
+        u8 *f;
+        u8 *c;
+        u8 *d;
+        u8 *tmp; /* temporary data block */
+        u8 *ab; /* only used if ECC processing */
+};
+#endif
diff --git a/drivers/crypto/caam/regs.h b/drivers/crypto/caam/regs.h
index e9f7a70cdd5e..3223fc6d647c 100644
--- a/drivers/crypto/caam/regs.h
+++ b/drivers/crypto/caam/regs.h
@@ -117,6 +117,12 @@ struct jr_outentry {
 #define CHA_NUM_DECONUM_SHIFT   56
 #define CHA_NUM_DECONUM_MASK    (0xfull << CHA_NUM_DECONUM_SHIFT)
+struct sec_vid {
+        u16 ip_id;
+        u8 maj_rev;
+        u8 min_rev;
+};
 struct caam_perfmon {
        /* Performance Monitor Registers                        f00-f9f */
        u64 req_dequeued;       /* PC_REQ_DEQ - Dequeued Requests            */
@@ -167,7 +173,7 @@ struct partid {
        u32 pidr;       /* partition ID, DECO */
 };
-/* RNG test mode (replicated twice in some configurations) */
+/* RNGB test mode (replicated twice in some configurations) */
 /* Padded out to 0x100 */
 struct rngtst {
        u32 mode;               /* RTSTMODEx - Test mode */
@@ -200,6 +206,31 @@ struct rngtst {
        u32 rsvd14[15];
 };
+/* RNG4 TRNG test registers */
+struct rng4tst {
+#define RTMCTL_PRGM 0x00010000  /* 1 -> program mode, 0 -> run mode */
+        u32 rtmctl;             /* misc. control register */
+        u32 rtscmisc;           /* statistical check misc. register */
+        u32 rtpkrrng;           /* poker range register */
+        union {
+                u32 rtpkrmax;   /* PRGM=1: poker max. limit register */
+                u32 rtpkrsq;    /* PRGM=0: poker square calc. result register */
+        };
+#define RTSDCTL_ENT_DLY_SHIFT 16
+#define RTSDCTL_ENT_DLY_MASK (0xffff << RTSDCTL_ENT_DLY_SHIFT)
+        u32 rtsdctl;            /* seed control register */
+        union {
+                u32 rtsblim;    /* PRGM=1: sparse bit limit register */
+                u32 rttotsam;   /* PRGM=0: total samples register */
+        };
+        u32 rtfrqmin;           /* frequency count min. limit register */
+        union {
+                u32 rtfrqmax;   /* PRGM=1: freq. count max. limit register */
+                u32 rtfrqcnt;   /* PRGM=0: freq. count register */
+        };
+        u32 rsvd1[56];
+};
 /*
 * caam_ctrl - basic core configuration
 * starts base + 0x0000 padded out to 0x1000
@@ -249,7 +280,10 @@ struct caam_ctrl {
        /* RNG Test/Verification/Debug Access                   600-7ff */
        /* (Useful in Test/Debug modes only...)                         */
-        struct rngtst rtst[2];
+        union {
+                struct rngtst rtst[2];
+                struct rng4tst r4tst[2];
+        };
        u32 rsvd9[448];
diff --git a/drivers/crypto/caam/sg_sw_sec4.h b/drivers/crypto/caam/sg_sw_sec4.h
new file mode 100644
index 000000000000..e0037c8ee243
--- /dev/null
+++ b/drivers/crypto/caam/sg_sw_sec4.h
@@ -0,0 +1,156 @@
+/*
+ * CAAM/SEC 4.x functions for using scatterlists in caam driver
+ *
+ * Copyright 2008-2011 Freescale Semiconductor, Inc.
+ *
+ */
+struct sec4_sg_entry;
+/*
+ * convert single dma address to h/w link table format
+ */
+static inline void dma_to_sec4_sg_one(struct sec4_sg_entry *sec4_sg_ptr,
+                                      dma_addr_t dma, u32 len, u32 offset)
+{
+        sec4_sg_ptr->ptr = dma;
+        sec4_sg_ptr->len = len;
+        sec4_sg_ptr->reserved = 0;
+        sec4_sg_ptr->buf_pool_id = 0;
+        sec4_sg_ptr->offset = offset;
+#ifdef DEBUG
+        print_hex_dump(KERN_ERR, "sec4_sg_ptr@: ",
+                       DUMP_PREFIX_ADDRESS, 16, 4, sec4_sg_ptr,
+                       sizeof(struct sec4_sg_entry), 1);
+#endif
+}
+/*
+ * convert scatterlist to h/w link table format
+ * but does not have final bit; instead, returns last entry
+ */
+static inline struct sec4_sg_entry *
+sg_to_sec4_sg(struct scatterlist *sg, int sg_count,
+              struct sec4_sg_entry *sec4_sg_ptr, u32 offset)
+{
+        while (sg_count) {
+                dma_to_sec4_sg_one(sec4_sg_ptr, sg_dma_address(sg),
+                                   sg_dma_len(sg), offset);
+                sec4_sg_ptr++;
+                sg = scatterwalk_sg_next(sg);
+                sg_count--;
+        }
+        return sec4_sg_ptr - 1;
+}
+/*
+ * convert scatterlist to h/w link table format
+ * scatterlist must have been previously dma mapped
+ */
+static inline void sg_to_sec4_sg_last(struct scatterlist *sg, int sg_count,
+                                      struct sec4_sg_entry *sec4_sg_ptr,
+                                      u32 offset)
+{
+        sec4_sg_ptr = sg_to_sec4_sg(sg, sg_count, sec4_sg_ptr, offset);
+        sec4_sg_ptr->len |= SEC4_SG_LEN_FIN;
+}
+/* count number of elements in scatterlist */
+static inline int __sg_count(struct scatterlist *sg_list, int nbytes,
+                             bool *chained)
+{
+        struct scatterlist *sg = sg_list;
+        int sg_nents = 0;
+        while (nbytes > 0) {
+                sg_nents++;
+                nbytes -= sg->length;
+                if (!sg_is_last(sg) && (sg + 1)->length == 0)
+                        *chained = true;
+                sg = scatterwalk_sg_next(sg);
+        }
+        return sg_nents;
+}
+/* derive number of elements in scatterlist, but return 0 for 1 */
+static inline int sg_count(struct scatterlist *sg_list, int nbytes,
+                             bool *chained)
+{
+        int sg_nents = __sg_count(sg_list, nbytes, chained);
+        if (likely(sg_nents == 1))
+                return 0;
+        return sg_nents;
+}
+static int dma_map_sg_chained(struct device *dev, struct scatterlist *sg,
+                              unsigned int nents, enum dma_data_direction dir,
+                              bool chained)
+{
+        if (unlikely(chained)) {
+                int i;
+                for (i = 0; i < nents; i++) {
+                        dma_map_sg(dev, sg, 1, dir);
+                        sg = scatterwalk_sg_next(sg);
+                }
+        } else {
+                dma_map_sg(dev, sg, nents, dir);
+        }
+        return nents;
+}
+static int dma_unmap_sg_chained(struct device *dev, struct scatterlist *sg,
+                                unsigned int nents, enum dma_data_direction dir,
+                                bool chained)
+{
+        if (unlikely(chained)) {
+                int i;
+                for (i = 0; i < nents; i++) {
+                        dma_unmap_sg(dev, sg, 1, dir);
+                        sg = scatterwalk_sg_next(sg);
+                }
+        } else {
+                dma_unmap_sg(dev, sg, nents, dir);
+        }
+        return nents;
+}
+/* Copy from len bytes of sg to dest, starting from beginning */
+static inline void sg_copy(u8 *dest, struct scatterlist *sg, unsigned int len)
+{
+        struct scatterlist *current_sg = sg;
+        int cpy_index = 0, next_cpy_index = current_sg->length;
+        while (next_cpy_index < len) {
+                memcpy(dest + cpy_index, (u8 *) sg_virt(current_sg),
+                       current_sg->length);
+                current_sg = scatterwalk_sg_next(current_sg);
+                cpy_index = next_cpy_index;
+                next_cpy_index += current_sg->length;
+        }
+        if (cpy_index < len)
+                memcpy(dest + cpy_index, (u8 *) sg_virt(current_sg),
+                       len - cpy_index);
+}
+/* Copy sg data, from to_skip to end, to dest */
+static inline void sg_copy_part(u8 *dest, struct scatterlist *sg,
+                                      int to_skip, unsigned int end)
+{
+        struct scatterlist *current_sg = sg;
+        int sg_index, cpy_index;
+        sg_index = current_sg->length;
+        while (sg_index <= to_skip) {
+                current_sg = scatterwalk_sg_next(current_sg);
+                sg_index += current_sg->length;
+        }
+        cpy_index = sg_index - to_skip;
+        memcpy(dest, (u8 *) sg_virt(current_sg) +
+               current_sg->length - cpy_index, cpy_index);
+        current_sg = scatterwalk_sg_next(current_sg);
+        if (end - sg_index)
+                sg_copy(dest + cpy_index, current_sg, end - sg_index);
+}
diff --git a/drivers/crypto/hifn_795x.c b/drivers/crypto/hifn_795x.c
index c9c4befb5a8d..df14358d7fa1 100644
--- a/drivers/crypto/hifn_795x.c
+++ b/drivers/crypto/hifn_795x.c
@@ -821,8 +821,8 @@ static int hifn_register_rng(struct hifn_device *dev)
        /*
         * We must wait at least 256 Pk_clk cycles between two reads of the rng.
         */
-        dev->rng_wait_time      = DIV_ROUND_UP(NSEC_PER_SEC, dev->pk_clk_freq) *
+        dev->rng_wait_time      = DIV_ROUND_UP_ULL(NSEC_PER_SEC,
-                                  256;
+                                                   dev->pk_clk_freq) * 256;
        dev->rng.name           = dev->name;
        dev->rng.data_present   = hifn_rng_data_present,
diff --git a/drivers/crypto/mv_cesa.c b/drivers/crypto/mv_cesa.c
index 1cc6b3f3e262..21c1a87032b7 100644
--- a/drivers/crypto/mv_cesa.c
+++ b/drivers/crypto/mv_cesa.c
@@ -24,6 +24,7 @@
 #define MV_CESA "MV-CESA:"
 #define MAX_HW_HASH_SIZE        0xFFFF
+#define MV_CESA_EXPIRE          500 /* msec */
 /*
 * STM:
@@ -87,6 +88,7 @@ struct crypto_priv {
        spinlock_t lock;
        struct crypto_queue queue;
        enum engine_status eng_st;
+        struct timer_list completion_timer;
        struct crypto_async_request *cur_req;
        struct req_progress p;
        int max_req_size;
@@ -138,6 +140,29 @@ struct mv_req_hash_ctx {
        int count_add;
 };
+static void mv_completion_timer_callback(unsigned long unused)
+{
+        int active = readl(cpg->reg + SEC_ACCEL_CMD) & SEC_CMD_EN_SEC_ACCL0;
+        printk(KERN_ERR MV_CESA
+               "completion timer expired (CESA %sactive), cleaning up.\n",
+               active ? "" : "in");
+        del_timer(&cpg->completion_timer);
+        writel(SEC_CMD_DISABLE_SEC, cpg->reg + SEC_ACCEL_CMD);
+        while(readl(cpg->reg + SEC_ACCEL_CMD) & SEC_CMD_DISABLE_SEC)
+                printk(KERN_INFO MV_CESA "%s: waiting for engine finishing\n", __func__);
+        cpg->eng_st = ENGINE_W_DEQUEUE;
+        wake_up_process(cpg->queue_th);
+}
+static void mv_setup_timer(void)
+{
+        setup_timer(&cpg->completion_timer, &mv_completion_timer_callback, 0);
+        mod_timer(&cpg->completion_timer,
+                        jiffies + msecs_to_jiffies(MV_CESA_EXPIRE));
+}
 static void compute_aes_dec_key(struct mv_ctx *ctx)
 {
        struct crypto_aes_ctx gen_aes_key;
@@ -273,12 +298,8 @@ static void mv_process_current_q(int first_block)
                        sizeof(struct sec_accel_config));
        /* GO */
+        mv_setup_timer();
        writel(SEC_CMD_EN_SEC_ACCL0, cpg->reg + SEC_ACCEL_CMD);
-        /*
-         * XXX: add timer if the interrupt does not occur for some mystery
-         * reason
-         */
 }
 static void mv_crypto_algo_completion(void)
@@ -357,12 +378,8 @@ static void mv_process_hash_current(int first_block)
        memcpy(cpg->sram + SRAM_CONFIG, &op, sizeof(struct sec_accel_config));
        /* GO */
+        mv_setup_timer();
        writel(SEC_CMD_EN_SEC_ACCL0, cpg->reg + SEC_ACCEL_CMD);
-        /*
-        * XXX: add timer if the interrupt does not occur for some mystery
-        * reason
-        */
 }
 static inline int mv_hash_import_sha1_ctx(const struct mv_req_hash_ctx *ctx,
@@ -406,6 +423,15 @@ out:
        return rc;
 }
+static void mv_save_digest_state(struct mv_req_hash_ctx *ctx)
+{
+        ctx->state[0] = readl(cpg->reg + DIGEST_INITIAL_VAL_A);
+        ctx->state[1] = readl(cpg->reg + DIGEST_INITIAL_VAL_B);
+        ctx->state[2] = readl(cpg->reg + DIGEST_INITIAL_VAL_C);
+        ctx->state[3] = readl(cpg->reg + DIGEST_INITIAL_VAL_D);
+        ctx->state[4] = readl(cpg->reg + DIGEST_INITIAL_VAL_E);
+}
 static void mv_hash_algo_completion(void)
 {
        struct ahash_request *req = ahash_request_cast(cpg->cur_req);
@@ -420,14 +446,12 @@ static void mv_hash_algo_completion(void)
                        memcpy(req->result, cpg->sram + SRAM_DIGEST_BUF,
                               crypto_ahash_digestsize(crypto_ahash_reqtfm
                                                       (req)));
-                } else
+                } else {
+                        mv_save_digest_state(ctx);
                        mv_hash_final_fallback(req);
+                }
        } else {
-                ctx->state[0] = readl(cpg->reg + DIGEST_INITIAL_VAL_A);
+                mv_save_digest_state(ctx);
-                ctx->state[1] = readl(cpg->reg + DIGEST_INITIAL_VAL_B);
-                ctx->state[2] = readl(cpg->reg + DIGEST_INITIAL_VAL_C);
-                ctx->state[3] = readl(cpg->reg + DIGEST_INITIAL_VAL_D);
-                ctx->state[4] = readl(cpg->reg + DIGEST_INITIAL_VAL_E);
        }
 }
@@ -888,6 +912,10 @@ irqreturn_t crypto_int(int irq, void *priv)
        if (!(val & SEC_INT_ACCEL0_DONE))
                return IRQ_NONE;
+        if (!del_timer(&cpg->completion_timer)) {
+                printk(KERN_WARNING MV_CESA
+                       "got an interrupt but no pending timer?\n");
+        }
        val &= ~SEC_INT_ACCEL0_DONE;
        writel(val, cpg->reg + FPGA_INT_STATUS);
        writel(val, cpg->reg + SEC_ACCEL_INT_STATUS);
@@ -1061,6 +1089,7 @@ static int mv_probe(struct platform_device *pdev)
        if (!IS_ERR(cp->clk))
                clk_prepare_enable(cp->clk);
+        writel(0, cpg->reg + SEC_ACCEL_INT_STATUS);
        writel(SEC_INT_ACCEL0_DONE, cpg->reg + SEC_ACCEL_INT_MASK);
        writel(SEC_CFG_STOP_DIG_ERR, cpg->reg + SEC_ACCEL_CFG);
        writel(SRAM_CONFIG, cpg->reg + SEC_ACCEL_DESC_P0);
@@ -1098,6 +1127,10 @@ err_unreg_ecb:
        crypto_unregister_alg(&mv_aes_alg_ecb);
 err_irq:
        free_irq(irq, cp);
+        if (!IS_ERR(cp->clk)) {
+                clk_disable_unprepare(cp->clk);
+                clk_put(cp->clk);
+        }
 err_thread:
        kthread_stop(cp->queue_th);
 err_unmap_sram:
diff --git a/drivers/crypto/n2_core.c b/drivers/crypto/n2_core.c
index 67b97c5fd859..a8bd0310f8fe 100644
--- a/drivers/crypto/n2_core.c
+++ b/drivers/crypto/n2_core.c
@@ -1610,8 +1610,7 @@ static int spu_map_ino(struct platform_device *dev, struct spu_mdesc_info *ip,
        sprintf(p->irq_name, "%s-%d", irq_name, index);
-        return request_irq(p->irq, handler, IRQF_SAMPLE_RANDOM,
+        return request_irq(p->irq, handler, 0, p->irq_name, p);
-                           p->irq_name, p);
 }
 static struct kmem_cache *queue_cache[2];
diff --git a/drivers/crypto/talitos.c b/drivers/crypto/talitos.c
index 921039e56f87..efff788d2f1d 100644
--- a/drivers/crypto/talitos.c
+++ b/drivers/crypto/talitos.c
@@ -53,117 +53,6 @@
 #include "talitos.h"
-#define TALITOS_TIMEOUT 100000
-#define TALITOS_MAX_DATA_LEN 65535
-#define DESC_TYPE(desc_hdr) ((be32_to_cpu(desc_hdr) >> 3) & 0x1f)
-#define PRIMARY_EU(desc_hdr) ((be32_to_cpu(desc_hdr) >> 28) & 0xf)
-#define SECONDARY_EU(desc_hdr) ((be32_to_cpu(desc_hdr) >> 16) & 0xf)
-/* descriptor pointer entry */
-struct talitos_ptr {
-        __be16 len;     /* length */
-        u8 j_extent;    /* jump to sg link table and/or extent */
-        u8 eptr;        /* extended address */
-        __be32 ptr;     /* address */
-};
-static const struct talitos_ptr zero_entry = {
-        .len = 0,
-        .j_extent = 0,
-        .eptr = 0,
-        .ptr = 0
-};
-/* descriptor */
-struct talitos_desc {
-        __be32 hdr;                     /* header high bits */
-        __be32 hdr_lo;                  /* header low bits */
-        struct talitos_ptr ptr[7];      /* ptr/len pair array */
-};
-/**
- * talitos_request - descriptor submission request
- * @desc: descriptor pointer (kernel virtual)
- * @dma_desc: descriptor's physical bus address
- * @callback: whom to call when descriptor processing is done
- * @context: caller context (optional)
- */
-struct talitos_request {
-        struct talitos_desc *desc;
-        dma_addr_t dma_desc;
-        void (*callback) (struct device *dev, struct talitos_desc *desc,
-                          void *context, int error);
-        void *context;
-};
-/* per-channel fifo management */
-struct talitos_channel {
-        void __iomem *reg;
-        /* request fifo */
-        struct talitos_request *fifo;
-        /* number of requests pending in channel h/w fifo */
-        atomic_t submit_count ____cacheline_aligned;
-        /* request submission (head) lock */
-        spinlock_t head_lock ____cacheline_aligned;
-        /* index to next free descriptor request */
-        int head;
-        /* request release (tail) lock */
-        spinlock_t tail_lock ____cacheline_aligned;
-        /* index to next in-progress/done descriptor request */
-        int tail;
-};
-struct talitos_private {
-        struct device *dev;
-        struct platform_device *ofdev;
-        void __iomem *reg;
-        int irq[2];
-        /* SEC global registers lock  */
-        spinlock_t reg_lock ____cacheline_aligned;
-        /* SEC version geometry (from device tree node) */
-        unsigned int num_channels;
-        unsigned int chfifo_len;
-        unsigned int exec_units;
-        unsigned int desc_types;
-        /* SEC Compatibility info */
-        unsigned long features;
-        /*
-         * length of the request fifo
-         * fifo_len is chfifo_len rounded up to next power of 2
-         * so we can use bitwise ops to wrap
-         */
-        unsigned int fifo_len;
-        struct talitos_channel *chan;
-        /* next channel to be assigned next incoming descriptor */
-        atomic_t last_chan ____cacheline_aligned;
-        /* request callback tasklet */
-        struct tasklet_struct done_task[2];
-        /* list of registered algorithms */
-        struct list_head alg_list;
-        /* hwrng device */
-        struct hwrng rng;
-};
-/* .features flag */
-#define TALITOS_FTR_SRC_LINK_TBL_LEN_INCLUDES_EXTENT 0x00000001
-#define TALITOS_FTR_HW_AUTH_CHECK 0x00000002
-#define TALITOS_FTR_SHA224_HWINIT 0x00000004
-#define TALITOS_FTR_HMAC_OK 0x00000008
 static void to_talitos_ptr(struct talitos_ptr *talitos_ptr, dma_addr_t dma_addr)
 {
        talitos_ptr->ptr = cpu_to_be32(lower_32_bits(dma_addr));
@@ -303,11 +192,11 @@ static int init_device(struct device *dev)
 * callback must check err and feedback in descriptor header
 * for device processing status.
 */
-static int talitos_submit(struct device *dev, int ch, struct talitos_desc *desc,
+int talitos_submit(struct device *dev, int ch, struct talitos_desc *desc,
-                          void (*callback)(struct device *dev,
+                   void (*callback)(struct device *dev,
-                                           struct talitos_desc *desc,
+                                    struct talitos_desc *desc,
-                                           void *context, int error),
+                                    void *context, int error),
-                          void *context)
+                   void *context)
 {
        struct talitos_private *priv = dev_get_drvdata(dev);
        struct talitos_request *request;
@@ -348,6 +237,7 @@ static int talitos_submit(struct device *dev, int ch, struct talitos_desc *desc,
        return -EINPROGRESS;
 }
+EXPORT_SYMBOL(talitos_submit);
 /*
 * process what was done, notify callback of error if not
@@ -733,7 +623,7 @@ static void talitos_unregister_rng(struct device *dev)
 * crypto alg
 */
 #define TALITOS_CRA_PRIORITY            3000
-#define TALITOS_MAX_KEY_SIZE            64
+#define TALITOS_MAX_KEY_SIZE            96
 #define TALITOS_MAX_IV_LENGTH           16 /* max of AES_BLOCK_SIZE, DES3_EDE_BLOCK_SIZE */
 #define MD5_BLOCK_SIZE    64
@@ -2066,6 +1956,59 @@ static struct talitos_alg_template driver_algs[] = {
                                     DESC_HDR_MODE1_MDEU_PAD |
                                     DESC_HDR_MODE1_MDEU_SHA1_HMAC,
        },
+        {       .type = CRYPTO_ALG_TYPE_AEAD,
+                .alg.crypto = {
+                        .cra_name = "authenc(hmac(sha224),cbc(aes))",
+                        .cra_driver_name = "authenc-hmac-sha224-cbc-aes-talitos",
+                        .cra_blocksize = AES_BLOCK_SIZE,
+                        .cra_flags = CRYPTO_ALG_TYPE_AEAD | CRYPTO_ALG_ASYNC,
+                        .cra_type = &crypto_aead_type,
+                        .cra_aead = {
+                                .setkey = aead_setkey,
+                                .setauthsize = aead_setauthsize,
+                                .encrypt = aead_encrypt,
+                                .decrypt = aead_decrypt,
+                                .givencrypt = aead_givencrypt,
+                                .geniv = "<built-in>",
+                                .ivsize = AES_BLOCK_SIZE,
+                                .maxauthsize = SHA224_DIGEST_SIZE,
+                        }
+                },
+                .desc_hdr_template = DESC_HDR_TYPE_IPSEC_ESP |
+                                     DESC_HDR_SEL0_AESU |
+                                     DESC_HDR_MODE0_AESU_CBC |
+                                     DESC_HDR_SEL1_MDEUA |
+                                     DESC_HDR_MODE1_MDEU_INIT |
+                                     DESC_HDR_MODE1_MDEU_PAD |
+                                     DESC_HDR_MODE1_MDEU_SHA224_HMAC,
+        },
+        {       .type = CRYPTO_ALG_TYPE_AEAD,
+                .alg.crypto = {
+                        .cra_name = "authenc(hmac(sha224),cbc(des3_ede))",
+                        .cra_driver_name = "authenc-hmac-sha224-cbc-3des-talitos",
+                        .cra_blocksize = DES3_EDE_BLOCK_SIZE,
+                        .cra_flags = CRYPTO_ALG_TYPE_AEAD | CRYPTO_ALG_ASYNC,
+                        .cra_type = &crypto_aead_type,
+                        .cra_aead = {
+                                .setkey = aead_setkey,
+                                .setauthsize = aead_setauthsize,
+                                .encrypt = aead_encrypt,
+                                .decrypt = aead_decrypt,
+                                .givencrypt = aead_givencrypt,
+                                .geniv = "<built-in>",
+                                .ivsize = DES3_EDE_BLOCK_SIZE,
+                                .maxauthsize = SHA224_DIGEST_SIZE,
+                        }
+                },
+                .desc_hdr_template = DESC_HDR_TYPE_IPSEC_ESP |
+                                     DESC_HDR_SEL0_DEU |
+                                     DESC_HDR_MODE0_DEU_CBC |
+                                     DESC_HDR_MODE0_DEU_3DES |
+                                     DESC_HDR_SEL1_MDEUA |
+                                     DESC_HDR_MODE1_MDEU_INIT |
+                                     DESC_HDR_MODE1_MDEU_PAD |
+                                     DESC_HDR_MODE1_MDEU_SHA224_HMAC,
+        },
        {       .type = CRYPTO_ALG_TYPE_AEAD,
                .alg.crypto = {
                        .cra_name = "authenc(hmac(sha256),cbc(aes))",
@@ -2121,6 +2064,112 @@ static struct talitos_alg_template driver_algs[] = {
        },
        {       .type = CRYPTO_ALG_TYPE_AEAD,
                .alg.crypto = {
+                        .cra_name = "authenc(hmac(sha384),cbc(aes))",
+                        .cra_driver_name = "authenc-hmac-sha384-cbc-aes-talitos",
+                        .cra_blocksize = AES_BLOCK_SIZE,
+                        .cra_flags = CRYPTO_ALG_TYPE_AEAD | CRYPTO_ALG_ASYNC,
+                        .cra_type = &crypto_aead_type,
+                        .cra_aead = {
+                                .setkey = aead_setkey,
+                                .setauthsize = aead_setauthsize,
+                                .encrypt = aead_encrypt,
+                                .decrypt = aead_decrypt,
+                                .givencrypt = aead_givencrypt,
+                                .geniv = "<built-in>",
+                                .ivsize = AES_BLOCK_SIZE,
+                                .maxauthsize = SHA384_DIGEST_SIZE,
+                        }
+                },
+                .desc_hdr_template = DESC_HDR_TYPE_IPSEC_ESP |
+                                     DESC_HDR_SEL0_AESU |
+                                     DESC_HDR_MODE0_AESU_CBC |
+                                     DESC_HDR_SEL1_MDEUB |
+                                     DESC_HDR_MODE1_MDEU_INIT |
+                                     DESC_HDR_MODE1_MDEU_PAD |
+                                     DESC_HDR_MODE1_MDEUB_SHA384_HMAC,
+        },
+        {       .type = CRYPTO_ALG_TYPE_AEAD,
+                .alg.crypto = {
+                        .cra_name = "authenc(hmac(sha384),cbc(des3_ede))",
+                        .cra_driver_name = "authenc-hmac-sha384-cbc-3des-talitos",
+                        .cra_blocksize = DES3_EDE_BLOCK_SIZE,
+                        .cra_flags = CRYPTO_ALG_TYPE_AEAD | CRYPTO_ALG_ASYNC,
+                        .cra_type = &crypto_aead_type,
+                        .cra_aead = {
+                                .setkey = aead_setkey,
+                                .setauthsize = aead_setauthsize,
+                                .encrypt = aead_encrypt,
+                                .decrypt = aead_decrypt,
+                                .givencrypt = aead_givencrypt,
+                                .geniv = "<built-in>",
+                                .ivsize = DES3_EDE_BLOCK_SIZE,
+                                .maxauthsize = SHA384_DIGEST_SIZE,
+                        }
+                },
+                .desc_hdr_template = DESC_HDR_TYPE_IPSEC_ESP |
+                                     DESC_HDR_SEL0_DEU |
+                                     DESC_HDR_MODE0_DEU_CBC |
+                                     DESC_HDR_MODE0_DEU_3DES |
+                                     DESC_HDR_SEL1_MDEUB |
+                                     DESC_HDR_MODE1_MDEU_INIT |
+                                     DESC_HDR_MODE1_MDEU_PAD |
+                                     DESC_HDR_MODE1_MDEUB_SHA384_HMAC,
+        },
+        {       .type = CRYPTO_ALG_TYPE_AEAD,
+                .alg.crypto = {
+                        .cra_name = "authenc(hmac(sha512),cbc(aes))",
+                        .cra_driver_name = "authenc-hmac-sha512-cbc-aes-talitos",
+                        .cra_blocksize = AES_BLOCK_SIZE,
+                        .cra_flags = CRYPTO_ALG_TYPE_AEAD | CRYPTO_ALG_ASYNC,
+                        .cra_type = &crypto_aead_type,
+                        .cra_aead = {
+                                .setkey = aead_setkey,
+                                .setauthsize = aead_setauthsize,
+                                .encrypt = aead_encrypt,
+                                .decrypt = aead_decrypt,
+                                .givencrypt = aead_givencrypt,
+                                .geniv = "<built-in>",
+                                .ivsize = AES_BLOCK_SIZE,
+                                .maxauthsize = SHA512_DIGEST_SIZE,
+                        }
+                },
+                .desc_hdr_template = DESC_HDR_TYPE_IPSEC_ESP |
+                                     DESC_HDR_SEL0_AESU |
+                                     DESC_HDR_MODE0_AESU_CBC |
+                                     DESC_HDR_SEL1_MDEUB |
+                                     DESC_HDR_MODE1_MDEU_INIT |
+                                     DESC_HDR_MODE1_MDEU_PAD |
+                                     DESC_HDR_MODE1_MDEUB_SHA512_HMAC,
+        },
+        {       .type = CRYPTO_ALG_TYPE_AEAD,
+                .alg.crypto = {
+                        .cra_name = "authenc(hmac(sha512),cbc(des3_ede))",
+                        .cra_driver_name = "authenc-hmac-sha512-cbc-3des-talitos",
+                        .cra_blocksize = DES3_EDE_BLOCK_SIZE,
+                        .cra_flags = CRYPTO_ALG_TYPE_AEAD | CRYPTO_ALG_ASYNC,
+                        .cra_type = &crypto_aead_type,
+                        .cra_aead = {
+                                .setkey = aead_setkey,
+                                .setauthsize = aead_setauthsize,
+                                .encrypt = aead_encrypt,
+                                .decrypt = aead_decrypt,
+                                .givencrypt = aead_givencrypt,
+                                .geniv = "<built-in>",
+                                .ivsize = DES3_EDE_BLOCK_SIZE,
+                                .maxauthsize = SHA512_DIGEST_SIZE,
+                        }
+                },
+                .desc_hdr_template = DESC_HDR_TYPE_IPSEC_ESP |
+                                     DESC_HDR_SEL0_DEU |
+                                     DESC_HDR_MODE0_DEU_CBC |
+                                     DESC_HDR_MODE0_DEU_3DES |
+                                     DESC_HDR_SEL1_MDEUB |
+                                     DESC_HDR_MODE1_MDEU_INIT |
+                                     DESC_HDR_MODE1_MDEU_PAD |
+                                     DESC_HDR_MODE1_MDEUB_SHA512_HMAC,
+        },
+        {       .type = CRYPTO_ALG_TYPE_AEAD,
+                .alg.crypto = {
                        .cra_name = "authenc(hmac(md5),cbc(aes))",
                        .cra_driver_name = "authenc-hmac-md5-cbc-aes-talitos",
                        .cra_blocksize = AES_BLOCK_SIZE,
diff --git a/drivers/crypto/talitos.h b/drivers/crypto/talitos.h
index 3c173954ef29..61a14054aa39 100644
--- a/drivers/crypto/talitos.h
+++ b/drivers/crypto/talitos.h
@@ -28,6 +28,123 @@
 *
 */
+#define TALITOS_TIMEOUT 100000
+#define TALITOS_MAX_DATA_LEN 65535
+#define DESC_TYPE(desc_hdr) ((be32_to_cpu(desc_hdr) >> 3) & 0x1f)
+#define PRIMARY_EU(desc_hdr) ((be32_to_cpu(desc_hdr) >> 28) & 0xf)
+#define SECONDARY_EU(desc_hdr) ((be32_to_cpu(desc_hdr) >> 16) & 0xf)
+/* descriptor pointer entry */
+struct talitos_ptr {
+        __be16 len;     /* length */
+        u8 j_extent;    /* jump to sg link table and/or extent */
+        u8 eptr;        /* extended address */
+        __be32 ptr;     /* address */
+};
+static const struct talitos_ptr zero_entry = {
+        .len = 0,
+        .j_extent = 0,
+        .eptr = 0,
+        .ptr = 0
+};
+/* descriptor */
+struct talitos_desc {
+        __be32 hdr;                     /* header high bits */
+        __be32 hdr_lo;                  /* header low bits */
+        struct talitos_ptr ptr[7];      /* ptr/len pair array */
+};
+/**
+ * talitos_request - descriptor submission request
+ * @desc: descriptor pointer (kernel virtual)
+ * @dma_desc: descriptor's physical bus address
+ * @callback: whom to call when descriptor processing is done
+ * @context: caller context (optional)
+ */
+struct talitos_request {
+        struct talitos_desc *desc;
+        dma_addr_t dma_desc;
+        void (*callback) (struct device *dev, struct talitos_desc *desc,
+                          void *context, int error);
+        void *context;
+};
+/* per-channel fifo management */
+struct talitos_channel {
+        void __iomem *reg;
+        /* request fifo */
+        struct talitos_request *fifo;
+        /* number of requests pending in channel h/w fifo */
+        atomic_t submit_count ____cacheline_aligned;
+        /* request submission (head) lock */
+        spinlock_t head_lock ____cacheline_aligned;
+        /* index to next free descriptor request */
+        int head;
+        /* request release (tail) lock */
+        spinlock_t tail_lock ____cacheline_aligned;
+        /* index to next in-progress/done descriptor request */
+        int tail;
+};
+struct talitos_private {
+        struct device *dev;
+        struct platform_device *ofdev;
+        void __iomem *reg;
+        int irq[2];
+        /* SEC global registers lock  */
+        spinlock_t reg_lock ____cacheline_aligned;
+        /* SEC version geometry (from device tree node) */
+        unsigned int num_channels;
+        unsigned int chfifo_len;
+        unsigned int exec_units;
+        unsigned int desc_types;
+        /* SEC Compatibility info */
+        unsigned long features;
+        /*
+         * length of the request fifo
+         * fifo_len is chfifo_len rounded up to next power of 2
+         * so we can use bitwise ops to wrap
+         */
+        unsigned int fifo_len;
+        struct talitos_channel *chan;
+        /* next channel to be assigned next incoming descriptor */
+        atomic_t last_chan ____cacheline_aligned;
+        /* request callback tasklet */
+        struct tasklet_struct done_task[2];
+        /* list of registered algorithms */
+        struct list_head alg_list;
+        /* hwrng device */
+        struct hwrng rng;
+};
+extern int talitos_submit(struct device *dev, int ch, struct talitos_desc *desc,
+                          void (*callback)(struct device *dev,
+                                           struct talitos_desc *desc,
+                                           void *context, int error),
+                          void *context);
+/* .features flag */
+#define TALITOS_FTR_SRC_LINK_TBL_LEN_INCLUDES_EXTENT 0x00000001
+#define TALITOS_FTR_HW_AUTH_CHECK 0x00000002
+#define TALITOS_FTR_SHA224_HWINIT 0x00000004
+#define TALITOS_FTR_HMAC_OK 0x00000008
 /*
 * TALITOS_xxx_LO addresses point to the low data bits (32-63) of the register
 */
@@ -209,6 +326,12 @@
                                         DESC_HDR_MODE1_MDEU_HMAC)
 #define DESC_HDR_MODE1_MDEU_SHA1_HMAC   (DESC_HDR_MODE1_MDEU_SHA1 | \
                                         DESC_HDR_MODE1_MDEU_HMAC)
+#define DESC_HDR_MODE1_MDEU_SHA224_HMAC (DESC_HDR_MODE1_MDEU_SHA224 | \
+                                         DESC_HDR_MODE1_MDEU_HMAC)
+#define DESC_HDR_MODE1_MDEUB_SHA384_HMAC        (DESC_HDR_MODE1_MDEUB_SHA384 | \
+                                                 DESC_HDR_MODE1_MDEU_HMAC)
+#define DESC_HDR_MODE1_MDEUB_SHA512_HMAC        (DESC_HDR_MODE1_MDEUB_SHA512 | \
+                                                 DESC_HDR_MODE1_MDEU_HMAC)
 /* direction of overall data flow (DIR) */
 #define DESC_HDR_DIR_INBOUND            cpu_to_be32(0x00000002)
diff --git a/drivers/crypto/tegra-aes.c b/drivers/crypto/tegra-aes.c
index 422a9766c7c9..ac236f6724f4 100644
--- a/drivers/crypto/tegra-aes.c
+++ b/drivers/crypto/tegra-aes.c
@@ -572,7 +572,7 @@ static void aes_workqueue_handler(struct work_struct *work)
        struct tegra_aes_dev *dd = aes_dev;
        int ret;
-        ret = clk_enable(dd->aes_clk);
+        ret = clk_prepare_enable(dd->aes_clk);
        if (ret)
                BUG_ON("clock enable failed");
@@ -581,7 +581,7 @@ static void aes_workqueue_handler(struct work_struct *work)
                ret = tegra_aes_handle_req(dd);
        } while (!ret);
-        clk_disable(dd->aes_clk);
+        clk_disable_unprepare(dd->aes_clk);
 }
 static irqreturn_t aes_irq(int irq, void *dev_id)
@@ -673,7 +673,7 @@ static int tegra_aes_get_random(struct crypto_rng *tfm, u8 *rdata,
        /* take mutex to access the aes hw */
        mutex_lock(&aes_lock);
-        ret = clk_enable(dd->aes_clk);
+        ret = clk_prepare_enable(dd->aes_clk);
        if (ret)
                return ret;
@@ -700,7 +700,7 @@ static int tegra_aes_get_random(struct crypto_rng *tfm, u8 *rdata,
        }
 out:
-        clk_disable(dd->aes_clk);
+        clk_disable_unprepare(dd->aes_clk);
        mutex_unlock(&aes_lock);
        dev_dbg(dd->dev, "%s: done\n", __func__);
@@ -758,7 +758,7 @@ static int tegra_aes_rng_reset(struct crypto_rng *tfm, u8 *seed,
        dd->flags = FLAGS_ENCRYPT | FLAGS_RNG;
-        ret = clk_enable(dd->aes_clk);
+        ret = clk_prepare_enable(dd->aes_clk);
        if (ret)
                return ret;
@@ -788,7 +788,7 @@ static int tegra_aes_rng_reset(struct crypto_rng *tfm, u8 *seed,
        memcpy(dd->dt, dt, DEFAULT_RNG_BLK_SZ);
 out:
-        clk_disable(dd->aes_clk);
+        clk_disable_unprepare(dd->aes_clk);
        mutex_unlock(&aes_lock);
        dev_dbg(dd->dev, "%s: done\n", __func__);
diff --git a/drivers/crypto/ux500/cryp/cryp_core.c b/drivers/crypto/ux500/cryp/cryp_core.c
index 7cac12793a4b..1c307e1b840c 100644
--- a/drivers/crypto/ux500/cryp/cryp_core.c
+++ b/drivers/crypto/ux500/cryp/cryp_core.c
@@ -1661,27 +1661,26 @@ static void ux500_cryp_shutdown(struct platform_device *pdev)
 }
-static int ux500_cryp_suspend(struct platform_device *pdev, pm_message_t state)
+static int ux500_cryp_suspend(struct device *dev)
 {
        int ret;
+        struct platform_device *pdev = to_platform_device(dev);
        struct cryp_device_data *device_data;
        struct resource *res_irq;
        struct cryp_ctx *temp_ctx = NULL;
-        dev_dbg(&pdev->dev, "[%s]", __func__);
+        dev_dbg(dev, "[%s]", __func__);
        /* Handle state? */
        device_data = platform_get_drvdata(pdev);
        if (!device_data) {
-                dev_err(&pdev->dev, "[%s]: platform_get_drvdata() failed!",
+                dev_err(dev, "[%s]: platform_get_drvdata() failed!", __func__);
-                        __func__);
                return -ENOMEM;
        }
        res_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
        if (!res_irq)
-                dev_err(&pdev->dev, "[%s]: IORESOURCE_IRQ, unavailable",
+                dev_err(dev, "[%s]: IORESOURCE_IRQ, unavailable", __func__);
-                        __func__);
        else
                disable_irq(res_irq->start);
@@ -1692,32 +1691,32 @@ static int ux500_cryp_suspend(struct platform_device *pdev, pm_message_t state)
        if (device_data->current_ctx == ++temp_ctx) {
                if (down_interruptible(&driver_data.device_allocation))
-                        dev_dbg(&pdev->dev, "[%s]: down_interruptible() "
+                        dev_dbg(dev, "[%s]: down_interruptible() failed",
-                                        "failed", __func__);
+                                __func__);
-                ret = cryp_disable_power(&pdev->dev, device_data, false);
+                ret = cryp_disable_power(dev, device_data, false);
        } else
-                ret = cryp_disable_power(&pdev->dev, device_data, true);
+                ret = cryp_disable_power(dev, device_data, true);
        if (ret)
-                dev_err(&pdev->dev, "[%s]: cryp_disable_power()", __func__);
+                dev_err(dev, "[%s]: cryp_disable_power()", __func__);
        return ret;
 }
-static int ux500_cryp_resume(struct platform_device *pdev)
+static int ux500_cryp_resume(struct device *dev)
 {
        int ret = 0;
+        struct platform_device *pdev = to_platform_device(dev);
        struct cryp_device_data *device_data;
        struct resource *res_irq;
        struct cryp_ctx *temp_ctx = NULL;
-        dev_dbg(&pdev->dev, "[%s]", __func__);
+        dev_dbg(dev, "[%s]", __func__);
        device_data = platform_get_drvdata(pdev);
        if (!device_data) {
-                dev_err(&pdev->dev, "[%s]: platform_get_drvdata() failed!",
+                dev_err(dev, "[%s]: platform_get_drvdata() failed!", __func__);
-                        __func__);
                return -ENOMEM;
        }
@@ -1730,11 +1729,10 @@ static int ux500_cryp_resume(struct platform_device *pdev)
        if (!device_data->current_ctx)
                up(&driver_data.device_allocation);
        else
-                ret = cryp_enable_power(&pdev->dev, device_data, true);
+                ret = cryp_enable_power(dev, device_data, true);
        if (ret)
-                dev_err(&pdev->dev, "[%s]: cryp_enable_power() failed!",
+                dev_err(dev, "[%s]: cryp_enable_power() failed!", __func__);
-                        __func__);
        else {
                res_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
                if (res_irq)
@@ -1744,15 +1742,16 @@ static int ux500_cryp_resume(struct platform_device *pdev)
        return ret;
 }
+static SIMPLE_DEV_PM_OPS(ux500_cryp_pm, ux500_cryp_suspend, ux500_cryp_resume);
 static struct platform_driver cryp_driver = {
        .probe  = ux500_cryp_probe,
        .remove = ux500_cryp_remove,
        .shutdown = ux500_cryp_shutdown,
-        .suspend  = ux500_cryp_suspend,
-        .resume   = ux500_cryp_resume,
        .driver = {
                .owner = THIS_MODULE,
                .name  = "cryp1"
+                .pm    = &ux500_cryp_pm,
        }
 };
diff --git a/drivers/crypto/ux500/hash/hash_core.c b/drivers/crypto/ux500/hash/hash_core.c
index 6dbb9ec709a3..08d5032cb564 100644
--- a/drivers/crypto/ux500/hash/hash_core.c
+++ b/drivers/crypto/ux500/hash/hash_core.c
@@ -1894,19 +1894,17 @@ static void ux500_hash_shutdown(struct platform_device *pdev)
 /**
 * ux500_hash_suspend - Function that suspends the hash device.
- * @pdev:       The platform device.
+ * @dev:        Device to suspend.
- * @state:      -
 */
-static int ux500_hash_suspend(struct platform_device *pdev, pm_message_t state)
+static int ux500_hash_suspend(struct device *dev)
 {
        int ret;
        struct hash_device_data *device_data;
        struct hash_ctx *temp_ctx = NULL;
-        device_data = platform_get_drvdata(pdev);
+        device_data = dev_get_drvdata(dev);
        if (!device_data) {
-                dev_err(&pdev->dev, "[%s] platform_get_drvdata() failed!",
+                dev_err(dev, "[%s] platform_get_drvdata() failed!", __func__);
-                                __func__);
                return -ENOMEM;
        }
@@ -1917,33 +1915,32 @@ static int ux500_hash_suspend(struct platform_device *pdev, pm_message_t state)
        if (device_data->current_ctx == ++temp_ctx) {
                if (down_interruptible(&driver_data.device_allocation))
-                        dev_dbg(&pdev->dev, "[%s]: down_interruptible() "
+                        dev_dbg(dev, "[%s]: down_interruptible() failed",
-                                        "failed", __func__);
+                                __func__);
                ret = hash_disable_power(device_data, false);
        } else
                ret = hash_disable_power(device_data, true);
        if (ret)
-                dev_err(&pdev->dev, "[%s]: hash_disable_power()", __func__);
+                dev_err(dev, "[%s]: hash_disable_power()", __func__);
        return ret;
 }
 /**
 * ux500_hash_resume - Function that resume the hash device.
- * @pdev:       The platform device.
+ * @dev:        Device to resume.
 */
-static int ux500_hash_resume(struct platform_device *pdev)
+static int ux500_hash_resume(struct device *dev)
 {
        int ret = 0;
        struct hash_device_data *device_data;
        struct hash_ctx *temp_ctx = NULL;
-        device_data = platform_get_drvdata(pdev);
+        device_data = dev_get_drvdata(dev);
        if (!device_data) {
-                dev_err(&pdev->dev, "[%s] platform_get_drvdata() failed!",
+                dev_err(dev, "[%s] platform_get_drvdata() failed!", __func__);
-                                __func__);
                return -ENOMEM;
        }
@@ -1958,21 +1955,21 @@ static int ux500_hash_resume(struct platform_device *pdev)
                ret = hash_enable_power(device_data, true);
        if (ret)
-                dev_err(&pdev->dev, "[%s]: hash_enable_power() failed!",
+                dev_err(dev, "[%s]: hash_enable_power() failed!", __func__);
-                        __func__);
        return ret;
 }
+static SIMPLE_DEV_PM_OPS(ux500_hash_pm, ux500_hash_suspend, ux500_hash_resume);
 static struct platform_driver hash_driver = {
        .probe  = ux500_hash_probe,
        .remove = ux500_hash_remove,
        .shutdown = ux500_hash_shutdown,
-        .suspend  = ux500_hash_suspend,
-        .resume   = ux500_hash_resume,
        .driver = {
                .owner = THIS_MODULE,
                .name  = "hash1",
+                .pm    = &ux500_hash_pm,
        }
 };
diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
index aadeb5be9dba..d06ea2950dd9 100644
--- a/drivers/dma/Kconfig
+++ b/drivers/dma/Kconfig
@@ -53,6 +53,7 @@ config AMBA_PL08X
        bool "ARM PrimeCell PL080 or PL081 support"
        depends on ARM_AMBA && EXPERIMENTAL
        select DMA_ENGINE
+        select DMA_VIRTUAL_CHANNELS
        help
          Platform has a PL08x DMAC device
          which can provide DMA engine support
@@ -148,6 +149,20 @@ config TXX9_DMAC
          Support the TXx9 SoC internal DMA controller.  This can be
          integrated in chips such as the Toshiba TX4927/38/39.
+config TEGRA20_APB_DMA
+        bool "NVIDIA Tegra20 APB DMA support"
+        depends on ARCH_TEGRA
+        select DMA_ENGINE
+        help
+          Support for the NVIDIA Tegra20 APB DMA controller driver. The
+          DMA controller is having multiple DMA channel which can be
+          configured for different peripherals like audio, UART, SPI,
+          I2C etc which is in APB bus.
+          This DMA controller transfers data from memory to peripheral fifo
+          or vice versa. It does not support memory to memory data transfer.
 config SH_DMAE
        tristate "Renesas SuperH DMAC support"
        depends on (SUPERH && SH_DMA) || (ARM && ARCH_SHMOBILE)
@@ -237,7 +252,7 @@ config IMX_DMA
 config MXS_DMA
        bool "MXS DMA support"
-        depends on SOC_IMX23 || SOC_IMX28
+        depends on SOC_IMX23 || SOC_IMX28 || SOC_IMX6Q
        select STMP_DEVICE
        select DMA_ENGINE
        help
@@ -255,14 +270,34 @@ config DMA_SA11X0
        tristate "SA-11x0 DMA support"
        depends on ARCH_SA1100
        select DMA_ENGINE
+        select DMA_VIRTUAL_CHANNELS
        help
          Support the DMA engine found on Intel StrongARM SA-1100 and
          SA-1110 SoCs.  This DMA engine can only be used with on-chip
          devices.
+config MMP_TDMA
+        bool "MMP Two-Channel DMA support"
+        depends on ARCH_MMP
+        select DMA_ENGINE
+        help
+          Support the MMP Two-Channel DMA engine.
+          This engine used for MMP Audio DMA and pxa910 SQU.
+          Say Y here if you enabled MMP ADMA, otherwise say N.
+config DMA_OMAP
+        tristate "OMAP DMA support"
+        depends on ARCH_OMAP
+        select DMA_ENGINE
+        select DMA_VIRTUAL_CHANNELS
 config DMA_ENGINE
        bool
+config DMA_VIRTUAL_CHANNELS
+        tristate
 comment "DMA Clients"
        depends on DMA_ENGINE
diff --git a/drivers/dma/Makefile b/drivers/dma/Makefile
index 86b795baba98..4cf6b128ab9a 100644
--- a/drivers/dma/Makefile
+++ b/drivers/dma/Makefile
@@ -2,6 +2,7 @@ ccflags-$(CONFIG_DMADEVICES_DEBUG)  := -DDEBUG
 ccflags-$(CONFIG_DMADEVICES_VDEBUG) += -DVERBOSE_DEBUG
 obj-$(CONFIG_DMA_ENGINE) += dmaengine.o
+obj-$(CONFIG_DMA_VIRTUAL_CHANNELS) += virt-dma.o
 obj-$(CONFIG_NET_DMA) += iovlock.o
 obj-$(CONFIG_INTEL_MID_DMAC) += intel_mid_dma.o
 obj-$(CONFIG_DMATEST) += dmatest.o
@@ -14,7 +15,7 @@ obj-$(CONFIG_DW_DMAC) += dw_dmac.o
 obj-$(CONFIG_AT_HDMAC) += at_hdmac.o
 obj-$(CONFIG_MX3_IPU) += ipu/
 obj-$(CONFIG_TXX9_DMAC) += txx9dmac.o
-obj-$(CONFIG_SH_DMAE) += shdma.o
+obj-$(CONFIG_SH_DMAE) += sh/
 obj-$(CONFIG_COH901318) += coh901318.o coh901318_lli.o
 obj-$(CONFIG_AMCC_PPC440SPE_ADMA) += ppc4xx/
 obj-$(CONFIG_IMX_SDMA) += imx-sdma.o
@@ -23,8 +24,11 @@ obj-$(CONFIG_MXS_DMA) += mxs-dma.o
 obj-$(CONFIG_TIMB_DMA) += timb_dma.o
 obj-$(CONFIG_SIRF_DMA) += sirf-dma.o
 obj-$(CONFIG_STE_DMA40) += ste_dma40.o ste_dma40_ll.o
+obj-$(CONFIG_TEGRA20_APB_DMA) += tegra20-apb-dma.o
 obj-$(CONFIG_PL330_DMA) += pl330.o
 obj-$(CONFIG_PCH_DMA) += pch_dma.o
 obj-$(CONFIG_AMBA_PL08X) += amba-pl08x.o
 obj-$(CONFIG_EP93XX_DMA) += ep93xx_dma.o
 obj-$(CONFIG_DMA_SA11X0) += sa11x0-dma.o
+obj-$(CONFIG_MMP_TDMA) += mmp_tdma.o
+obj-$(CONFIG_DMA_OMAP) += omap-dma.o
diff --git a/drivers/dma/amba-pl08x.c b/drivers/dma/amba-pl08x.c
index 49ecbbb8932d..6fbeebb9486f 100644
--- a/drivers/dma/amba-pl08x.c
+++ b/drivers/dma/amba-pl08x.c
@@ -86,10 +86,12 @@
 #include <asm/hardware/pl080.h>
 #include "dmaengine.h"
+#include "virt-dma.h"
 #define DRIVER_NAME     "pl08xdmac"
 static struct amba_driver pl08x_amba_driver;
+struct pl08x_driver_data;
 /**
 * struct vendor_data - vendor-specific config parameters for PL08x derivatives
@@ -119,6 +121,123 @@ struct pl08x_lli {
 };
 /**
+ * struct pl08x_bus_data - information of source or destination
+ * busses for a transfer
+ * @addr: current address
+ * @maxwidth: the maximum width of a transfer on this bus
+ * @buswidth: the width of this bus in bytes: 1, 2 or 4
+ */
+struct pl08x_bus_data {
+        dma_addr_t addr;
+        u8 maxwidth;
+        u8 buswidth;
+};
+/**
+ * struct pl08x_phy_chan - holder for the physical channels
+ * @id: physical index to this channel
+ * @lock: a lock to use when altering an instance of this struct
+ * @serving: the virtual channel currently being served by this physical
+ * channel
+ * @locked: channel unavailable for the system, e.g. dedicated to secure
+ * world
+ */
+struct pl08x_phy_chan {
+        unsigned int id;
+        void __iomem *base;
+        spinlock_t lock;
+        struct pl08x_dma_chan *serving;
+        bool locked;
+};
+/**
+ * struct pl08x_sg - structure containing data per sg
+ * @src_addr: src address of sg
+ * @dst_addr: dst address of sg
+ * @len: transfer len in bytes
+ * @node: node for txd's dsg_list
+ */
+struct pl08x_sg {
+        dma_addr_t src_addr;
+        dma_addr_t dst_addr;
+        size_t len;
+        struct list_head node;
+};
+/**
+ * struct pl08x_txd - wrapper for struct dma_async_tx_descriptor
+ * @vd: virtual DMA descriptor
+ * @dsg_list: list of children sg's
+ * @llis_bus: DMA memory address (physical) start for the LLIs
+ * @llis_va: virtual memory address start for the LLIs
+ * @cctl: control reg values for current txd
+ * @ccfg: config reg values for current txd
+ * @done: this marks completed descriptors, which should not have their
+ *   mux released.
+ */
+struct pl08x_txd {
+        struct virt_dma_desc vd;
+        struct list_head dsg_list;
+        dma_addr_t llis_bus;
+        struct pl08x_lli *llis_va;
+        /* Default cctl value for LLIs */
+        u32 cctl;
+        /*
+         * Settings to be put into the physical channel when we
+         * trigger this txd.  Other registers are in llis_va[0].
+         */
+        u32 ccfg;
+        bool done;
+};
+/**
+ * struct pl08x_dma_chan_state - holds the PL08x specific virtual channel
+ * states
+ * @PL08X_CHAN_IDLE: the channel is idle
+ * @PL08X_CHAN_RUNNING: the channel has allocated a physical transport
+ * channel and is running a transfer on it
+ * @PL08X_CHAN_PAUSED: the channel has allocated a physical transport
+ * channel, but the transfer is currently paused
+ * @PL08X_CHAN_WAITING: the channel is waiting for a physical transport
+ * channel to become available (only pertains to memcpy channels)
+ */
+enum pl08x_dma_chan_state {
+        PL08X_CHAN_IDLE,
+        PL08X_CHAN_RUNNING,
+        PL08X_CHAN_PAUSED,
+        PL08X_CHAN_WAITING,
+};
+/**
+ * struct pl08x_dma_chan - this structure wraps a DMA ENGINE channel
+ * @vc: wrappped virtual channel
+ * @phychan: the physical channel utilized by this channel, if there is one
+ * @name: name of channel
+ * @cd: channel platform data
+ * @runtime_addr: address for RX/TX according to the runtime config
+ * @at: active transaction on this channel
+ * @lock: a lock for this channel data
+ * @host: a pointer to the host (internal use)
+ * @state: whether the channel is idle, paused, running etc
+ * @slave: whether this channel is a device (slave) or for memcpy
+ * @signal: the physical DMA request signal which this channel is using
+ * @mux_use: count of descriptors using this DMA request signal setting
+ */
+struct pl08x_dma_chan {
+        struct virt_dma_chan vc;
+        struct pl08x_phy_chan *phychan;
+        const char *name;
+        const struct pl08x_channel_data *cd;
+        struct dma_slave_config cfg;
+        struct pl08x_txd *at;
+        struct pl08x_driver_data *host;
+        enum pl08x_dma_chan_state state;
+        bool slave;
+        int signal;
+        unsigned mux_use;
+};
+/**
 * struct pl08x_driver_data - the local state holder for the PL08x
 * @slave: slave engine for this instance
 * @memcpy: memcpy engine for this instance
@@ -128,7 +247,6 @@ struct pl08x_lli {
 * @pd: platform data passed in from the platform/machine
 * @phy_chans: array of data for the physical channels
 * @pool: a pool for the LLI descriptors
- * @pool_ctr: counter of LLIs in the pool
 * @lli_buses: bitmask to or in to LLI pointer selecting AHB port for LLI
 * fetches
 * @mem_buses: set to indicate memory transfers on AHB2.
@@ -143,10 +261,8 @@ struct pl08x_driver_data {
        struct pl08x_platform_data *pd;
        struct pl08x_phy_chan *phy_chans;
        struct dma_pool *pool;
-        int pool_ctr;
        u8 lli_buses;
        u8 mem_buses;
-        spinlock_t lock;
 };
 /*
@@ -162,12 +278,51 @@ struct pl08x_driver_data {
 static inline struct pl08x_dma_chan *to_pl08x_chan(struct dma_chan *chan)
 {
-        return container_of(chan, struct pl08x_dma_chan, chan);
+        return container_of(chan, struct pl08x_dma_chan, vc.chan);
 }
 static inline struct pl08x_txd *to_pl08x_txd(struct dma_async_tx_descriptor *tx)
 {
-        return container_of(tx, struct pl08x_txd, tx);
+        return container_of(tx, struct pl08x_txd, vd.tx);
+}
+/*
+ * Mux handling.
+ *
+ * This gives us the DMA request input to the PL08x primecell which the
+ * peripheral described by the channel data will be routed to, possibly
+ * via a board/SoC specific external MUX.  One important point to note
+ * here is that this does not depend on the physical channel.
+ */
+static int pl08x_request_mux(struct pl08x_dma_chan *plchan)
+{
+        const struct pl08x_platform_data *pd = plchan->host->pd;
+        int ret;
+        if (plchan->mux_use++ == 0 && pd->get_signal) {
+                ret = pd->get_signal(plchan->cd);
+                if (ret < 0) {
+                        plchan->mux_use = 0;
+                        return ret;
+                }
+                plchan->signal = ret;
+        }
+        return 0;
+}
+static void pl08x_release_mux(struct pl08x_dma_chan *plchan)
+{
+        const struct pl08x_platform_data *pd = plchan->host->pd;
+        if (plchan->signal >= 0) {
+                WARN_ON(plchan->mux_use == 0);
+                if (--plchan->mux_use == 0 && pd->put_signal) {
+                        pd->put_signal(plchan->cd, plchan->signal);
+                        plchan->signal = -1;
+                }
+        }
 }
 /*
@@ -189,20 +344,25 @@ static int pl08x_phy_channel_busy(struct pl08x_phy_chan *ch)
 * been set when the LLIs were constructed.  Poke them into the hardware
 * and start the transfer.
 */
-static void pl08x_start_txd(struct pl08x_dma_chan *plchan,
+static void pl08x_start_next_txd(struct pl08x_dma_chan *plchan)
-        struct pl08x_txd *txd)
 {
        struct pl08x_driver_data *pl08x = plchan->host;
        struct pl08x_phy_chan *phychan = plchan->phychan;
-        struct pl08x_lli *lli = &txd->llis_va[0];
+        struct virt_dma_desc *vd = vchan_next_desc(&plchan->vc);
+        struct pl08x_txd *txd = to_pl08x_txd(&vd->tx);
+        struct pl08x_lli *lli;
        u32 val;
+        list_del(&txd->vd.node);
        plchan->at = txd;
        /* Wait for channel inactive */
        while (pl08x_phy_channel_busy(phychan))
                cpu_relax();
+        lli = &txd->llis_va[0];
        dev_vdbg(&pl08x->adev->dev,
                "WRITE channel %d: csrc=0x%08x, cdst=0x%08x, "
                "clli=0x%08x, cctl=0x%08x, ccfg=0x%08x\n",
@@ -311,10 +471,8 @@ static u32 pl08x_getbytes_chan(struct pl08x_dma_chan *plchan)
 {
        struct pl08x_phy_chan *ch;
        struct pl08x_txd *txd;
-        unsigned long flags;
        size_t bytes = 0;
-        spin_lock_irqsave(&plchan->lock, flags);
        ch = plchan->phychan;
        txd = plchan->at;
@@ -354,18 +512,6 @@ static u32 pl08x_getbytes_chan(struct pl08x_dma_chan *plchan)
                }
        }
-        /* Sum up all queued transactions */
-        if (!list_empty(&plchan->pend_list)) {
-                struct pl08x_txd *txdi;
-                list_for_each_entry(txdi, &plchan->pend_list, node) {
-                        struct pl08x_sg *dsg;
-                        list_for_each_entry(dsg, &txd->dsg_list, node)
-                                bytes += dsg->len;
-                }
-        }
-        spin_unlock_irqrestore(&plchan->lock, flags);
        return bytes;
 }
@@ -391,7 +537,6 @@ pl08x_get_phy_channel(struct pl08x_driver_data *pl08x,
                if (!ch->locked && !ch->serving) {
                        ch->serving = virt_chan;
-                        ch->signal = -1;
                        spin_unlock_irqrestore(&ch->lock, flags);
                        break;
                }
@@ -404,25 +549,114 @@ pl08x_get_phy_channel(struct pl08x_driver_data *pl08x,
                return NULL;
        }
-        pm_runtime_get_sync(&pl08x->adev->dev);
        return ch;
 }
+/* Mark the physical channel as free.  Note, this write is atomic. */
 static inline void pl08x_put_phy_channel(struct pl08x_driver_data *pl08x,
                                         struct pl08x_phy_chan *ch)
 {
-        unsigned long flags;
+        ch->serving = NULL;
+}
+/*
+ * Try to allocate a physical channel.  When successful, assign it to
+ * this virtual channel, and initiate the next descriptor.  The
+ * virtual channel lock must be held at this point.
+ */
+static void pl08x_phy_alloc_and_start(struct pl08x_dma_chan *plchan)
+{
+        struct pl08x_driver_data *pl08x = plchan->host;
+        struct pl08x_phy_chan *ch;
-        spin_lock_irqsave(&ch->lock, flags);
+        ch = pl08x_get_phy_channel(pl08x, plchan);
+        if (!ch) {
+                dev_dbg(&pl08x->adev->dev, "no physical channel available for xfer on %s\n", plchan->name);
+                plchan->state = PL08X_CHAN_WAITING;
+                return;
+        }
-        /* Stop the channel and clear its interrupts */
+        dev_dbg(&pl08x->adev->dev, "allocated physical channel %d for xfer on %s\n",
-        pl08x_terminate_phy_chan(pl08x, ch);
+                ch->id, plchan->name);
-        pm_runtime_put(&pl08x->adev->dev);
+        plchan->phychan = ch;
+        plchan->state = PL08X_CHAN_RUNNING;
+        pl08x_start_next_txd(plchan);
+}
-        /* Mark it as free */
+static void pl08x_phy_reassign_start(struct pl08x_phy_chan *ch,
-        ch->serving = NULL;
+        struct pl08x_dma_chan *plchan)
-        spin_unlock_irqrestore(&ch->lock, flags);
+{
+        struct pl08x_driver_data *pl08x = plchan->host;
+        dev_dbg(&pl08x->adev->dev, "reassigned physical channel %d for xfer on %s\n",
+                ch->id, plchan->name);
+        /*
+         * We do this without taking the lock; we're really only concerned
+         * about whether this pointer is NULL or not, and we're guaranteed
+         * that this will only be called when it _already_ is non-NULL.
+         */
+        ch->serving = plchan;
+        plchan->phychan = ch;
+        plchan->state = PL08X_CHAN_RUNNING;
+        pl08x_start_next_txd(plchan);
+}
+/*
+ * Free a physical DMA channel, potentially reallocating it to another
+ * virtual channel if we have any pending.
+ */
+static void pl08x_phy_free(struct pl08x_dma_chan *plchan)
+{
+        struct pl08x_driver_data *pl08x = plchan->host;
+        struct pl08x_dma_chan *p, *next;
+ retry:
+        next = NULL;
+        /* Find a waiting virtual channel for the next transfer. */
+        list_for_each_entry(p, &pl08x->memcpy.channels, vc.chan.device_node)
+                if (p->state == PL08X_CHAN_WAITING) {
+                        next = p;
+                        break;
+                }
+        if (!next) {
+                list_for_each_entry(p, &pl08x->slave.channels, vc.chan.device_node)
+                        if (p->state == PL08X_CHAN_WAITING) {
+                                next = p;
+                                break;
+                        }
+        }
+        /* Ensure that the physical channel is stopped */
+        pl08x_terminate_phy_chan(pl08x, plchan->phychan);
+        if (next) {
+                bool success;
+                /*
+                 * Eww.  We know this isn't going to deadlock
+                 * but lockdep probably doesn't.
+                 */
+                spin_lock(&next->vc.lock);
+                /* Re-check the state now that we have the lock */
+                success = next->state == PL08X_CHAN_WAITING;
+                if (success)
+                        pl08x_phy_reassign_start(plchan->phychan, next);
+                spin_unlock(&next->vc.lock);
+                /* If the state changed, try to find another channel */
+                if (!success)
+                        goto retry;
+        } else {
+                /* No more jobs, so free up the physical channel */
+                pl08x_put_phy_channel(pl08x, plchan->phychan);
+        }
+        plchan->phychan = NULL;
+        plchan->state = PL08X_CHAN_IDLE;
 }
 /*
@@ -585,8 +819,6 @@ static int pl08x_fill_llis_for_desc(struct pl08x_driver_data *pl08x,
                return 0;
        }
-        pl08x->pool_ctr++;
        bd.txd = txd;
        bd.lli_bus = (pl08x->lli_buses & PL08X_AHB2) ? PL080_LLI_LM_AHB2 : 0;
        cctl = txd->cctl;
@@ -802,18 +1034,14 @@ static int pl08x_fill_llis_for_desc(struct pl08x_driver_data *pl08x,
        return num_llis;
 }
-/* You should call this with the struct pl08x lock held */
 static void pl08x_free_txd(struct pl08x_driver_data *pl08x,
                           struct pl08x_txd *txd)
 {
        struct pl08x_sg *dsg, *_dsg;
-        /* Free the LLI */
        if (txd->llis_va)
                dma_pool_free(pl08x->pool, txd->llis_va, txd->llis_bus);
-        pl08x->pool_ctr--;
        list_for_each_entry_safe(dsg, _dsg, &txd->dsg_list, node) {
                list_del(&dsg->node);
                kfree(dsg);
@@ -822,133 +1050,75 @@ static void pl08x_free_txd(struct pl08x_driver_data *pl08x,
        kfree(txd);
 }
-static void pl08x_free_txd_list(struct pl08x_driver_data *pl08x,
+static void pl08x_unmap_buffers(struct pl08x_txd *txd)
-                                struct pl08x_dma_chan *plchan)
 {
-        struct pl08x_txd *txdi = NULL;
+        struct device *dev = txd->vd.tx.chan->device->dev;
-        struct pl08x_txd *next;
+        struct pl08x_sg *dsg;
-        if (!list_empty(&plchan->pend_list)) {
+        if (!(txd->vd.tx.flags & DMA_COMPL_SKIP_SRC_UNMAP)) {
-                list_for_each_entry_safe(txdi,
+                if (txd->vd.tx.flags & DMA_COMPL_SRC_UNMAP_SINGLE)
-                                         next, &plchan->pend_list, node) {
+                        list_for_each_entry(dsg, &txd->dsg_list, node)
-                        list_del(&txdi->node);
+                                dma_unmap_single(dev, dsg->src_addr, dsg->len,
-                        pl08x_free_txd(pl08x, txdi);
+                                                DMA_TO_DEVICE);
+                else {
+                        list_for_each_entry(dsg, &txd->dsg_list, node)
+                                dma_unmap_page(dev, dsg->src_addr, dsg->len,
+                                                DMA_TO_DEVICE);
                }
        }
+        if (!(txd->vd.tx.flags & DMA_COMPL_SKIP_DEST_UNMAP)) {
+                if (txd->vd.tx.flags & DMA_COMPL_DEST_UNMAP_SINGLE)
+                        list_for_each_entry(dsg, &txd->dsg_list, node)
+                                dma_unmap_single(dev, dsg->dst_addr, dsg->len,
+                                                DMA_FROM_DEVICE);
+                else
+                        list_for_each_entry(dsg, &txd->dsg_list, node)
+                                dma_unmap_page(dev, dsg->dst_addr, dsg->len,
+                                                DMA_FROM_DEVICE);
+        }
 }
-/*
+static void pl08x_desc_free(struct virt_dma_desc *vd)
- * The DMA ENGINE API
- */
-static int pl08x_alloc_chan_resources(struct dma_chan *chan)
 {
-        return 0;
+        struct pl08x_txd *txd = to_pl08x_txd(&vd->tx);
-}
+        struct pl08x_dma_chan *plchan = to_pl08x_chan(vd->tx.chan);
-static void pl08x_free_chan_resources(struct dma_chan *chan)
+        if (!plchan->slave)
-{
+                pl08x_unmap_buffers(txd);
+        if (!txd->done)
+                pl08x_release_mux(plchan);
+        pl08x_free_txd(plchan->host, txd);
 }
-/*
+static void pl08x_free_txd_list(struct pl08x_driver_data *pl08x,
- * This should be called with the channel plchan->lock held
+                                struct pl08x_dma_chan *plchan)
- */
-static int prep_phy_channel(struct pl08x_dma_chan *plchan,
-                            struct pl08x_txd *txd)
 {
-        struct pl08x_driver_data *pl08x = plchan->host;
+        LIST_HEAD(head);
-        struct pl08x_phy_chan *ch;
+        struct pl08x_txd *txd;
-        int ret;
-        /* Check if we already have a channel */
-        if (plchan->phychan) {
-                ch = plchan->phychan;
-                goto got_channel;
-        }
-        ch = pl08x_get_phy_channel(pl08x, plchan);
+        vchan_get_all_descriptors(&plchan->vc, &head);
-        if (!ch) {
-                /* No physical channel available, cope with it */
-                dev_dbg(&pl08x->adev->dev, "no physical channel available for xfer on %s\n", plchan->name);
-                return -EBUSY;
-        }
-        /*
+        while (!list_empty(&head)) {
-         * OK we have a physical channel: for memcpy() this is all we
+                txd = list_first_entry(&head, struct pl08x_txd, vd.node);
-         * need, but for slaves the physical signals may be muxed!
+                list_del(&txd->vd.node);
-         * Can the platform allow us to use this channel?
+                pl08x_desc_free(&txd->vd);
-         */
-        if (plchan->slave && pl08x->pd->get_signal) {
-                ret = pl08x->pd->get_signal(plchan);
-                if (ret < 0) {
-                        dev_dbg(&pl08x->adev->dev,
-                                "unable to use physical channel %d for transfer on %s due to platform restrictions\n",
-                                ch->id, plchan->name);
-                        /* Release physical channel & return */
-                        pl08x_put_phy_channel(pl08x, ch);
-                        return -EBUSY;
-                }
-                ch->signal = ret;
        }
-        plchan->phychan = ch;
-        dev_dbg(&pl08x->adev->dev, "allocated physical channel %d and signal %d for xfer on %s\n",
-                 ch->id,
-                 ch->signal,
-                 plchan->name);
-got_channel:
-        /* Assign the flow control signal to this channel */
-        if (txd->direction == DMA_MEM_TO_DEV)
-                txd->ccfg |= ch->signal << PL080_CONFIG_DST_SEL_SHIFT;
-        else if (txd->direction == DMA_DEV_TO_MEM)
-                txd->ccfg |= ch->signal << PL080_CONFIG_SRC_SEL_SHIFT;
-        plchan->phychan_hold++;
-        return 0;
 }
-static void release_phy_channel(struct pl08x_dma_chan *plchan)
+/*
+ * The DMA ENGINE API
+ */
+static int pl08x_alloc_chan_resources(struct dma_chan *chan)
 {
-        struct pl08x_driver_data *pl08x = plchan->host;
+        return 0;
-        if ((plchan->phychan->signal >= 0) && pl08x->pd->put_signal) {
-                pl08x->pd->put_signal(plchan);
-                plchan->phychan->signal = -1;
-        }
-        pl08x_put_phy_channel(pl08x, plchan->phychan);
-        plchan->phychan = NULL;
 }
-static dma_cookie_t pl08x_tx_submit(struct dma_async_tx_descriptor *tx)
+static void pl08x_free_chan_resources(struct dma_chan *chan)
 {
-        struct pl08x_dma_chan *plchan = to_pl08x_chan(tx->chan);
+        /* Ensure all queued descriptors are freed */
-        struct pl08x_txd *txd = to_pl08x_txd(tx);
+        vchan_free_chan_resources(to_virt_chan(chan));
-        unsigned long flags;
-        dma_cookie_t cookie;
-        spin_lock_irqsave(&plchan->lock, flags);
-        cookie = dma_cookie_assign(tx);
-        /* Put this onto the pending list */
-        list_add_tail(&txd->node, &plchan->pend_list);
-        /*
-         * If there was no physical channel available for this memcpy,
-         * stack the request up and indicate that the channel is waiting
-         * for a free physical channel.
-         */
-        if (!plchan->slave && !plchan->phychan) {
-                /* Do this memcpy whenever there is a channel ready */
-                plchan->state = PL08X_CHAN_WAITING;
-                plchan->waiting = txd;
-        } else {
-                plchan->phychan_hold--;
-        }
-        spin_unlock_irqrestore(&plchan->lock, flags);
-        return cookie;
 }
 static struct dma_async_tx_descriptor *pl08x_prep_dma_interrupt(
@@ -968,23 +1138,53 @@ static enum dma_status pl08x_dma_tx_status(struct dma_chan *chan,
                dma_cookie_t cookie, struct dma_tx_state *txstate)
 {
        struct pl08x_dma_chan *plchan = to_pl08x_chan(chan);
+        struct virt_dma_desc *vd;
+        unsigned long flags;
        enum dma_status ret;
+        size_t bytes = 0;
        ret = dma_cookie_status(chan, cookie, txstate);
        if (ret == DMA_SUCCESS)
                return ret;
        /*
+         * There's no point calculating the residue if there's
+         * no txstate to store the value.
+         */
+        if (!txstate) {
+                if (plchan->state == PL08X_CHAN_PAUSED)
+                        ret = DMA_PAUSED;
+                return ret;
+        }
+        spin_lock_irqsave(&plchan->vc.lock, flags);
+        ret = dma_cookie_status(chan, cookie, txstate);
+        if (ret != DMA_SUCCESS) {
+                vd = vchan_find_desc(&plchan->vc, cookie);
+                if (vd) {
+                        /* On the issued list, so hasn't been processed yet */
+                        struct pl08x_txd *txd = to_pl08x_txd(&vd->tx);
+                        struct pl08x_sg *dsg;
+                        list_for_each_entry(dsg, &txd->dsg_list, node)
+                                bytes += dsg->len;
+                } else {
+                        bytes = pl08x_getbytes_chan(plchan);
+                }
+        }
+        spin_unlock_irqrestore(&plchan->vc.lock, flags);
+        /*
         * This cookie not complete yet
         * Get number of bytes left in the active transactions and queue
         */
-        dma_set_residue(txstate, pl08x_getbytes_chan(plchan));
+        dma_set_residue(txstate, bytes);
-        if (plchan->state == PL08X_CHAN_PAUSED)
+        if (plchan->state == PL08X_CHAN_PAUSED && ret == DMA_IN_PROGRESS)
-                return DMA_PAUSED;
+                ret = DMA_PAUSED;
        /* Whether waiting or running, we're in progress */
-        return DMA_IN_PROGRESS;
+        return ret;
 }
 /* PrimeCell DMA extension */
@@ -1080,38 +1280,14 @@ static u32 pl08x_burst(u32 maxburst)
        return burst_sizes[i].reg;
 }
-static int dma_set_runtime_config(struct dma_chan *chan,
+static u32 pl08x_get_cctl(struct pl08x_dma_chan *plchan,
-                                  struct dma_slave_config *config)
+        enum dma_slave_buswidth addr_width, u32 maxburst)
 {
-        struct pl08x_dma_chan *plchan = to_pl08x_chan(chan);
+        u32 width, burst, cctl = 0;
-        struct pl08x_driver_data *pl08x = plchan->host;
-        enum dma_slave_buswidth addr_width;
-        u32 width, burst, maxburst;
-        u32 cctl = 0;
-        if (!plchan->slave)
-                return -EINVAL;
-        /* Transfer direction */
-        plchan->runtime_direction = config->direction;
-        if (config->direction == DMA_MEM_TO_DEV) {
-                addr_width = config->dst_addr_width;
-                maxburst = config->dst_maxburst;
-        } else if (config->direction == DMA_DEV_TO_MEM) {
-                addr_width = config->src_addr_width;
-                maxburst = config->src_maxburst;
-        } else {
-                dev_err(&pl08x->adev->dev,
-                        "bad runtime_config: alien transfer direction\n");
-                return -EINVAL;
-        }
        width = pl08x_width(addr_width);
-        if (width == ~0) {
+        if (width == ~0)
-                dev_err(&pl08x->adev->dev,
+                return ~0;
-                        "bad runtime_config: alien address width\n");
-                return -EINVAL;
-        }
        cctl |= width << PL080_CONTROL_SWIDTH_SHIFT;
        cctl |= width << PL080_CONTROL_DWIDTH_SHIFT;
@@ -1128,28 +1304,23 @@ static int dma_set_runtime_config(struct dma_chan *chan,
        cctl |= burst << PL080_CONTROL_SB_SIZE_SHIFT;
        cctl |= burst << PL080_CONTROL_DB_SIZE_SHIFT;
-        plchan->device_fc = config->device_fc;
+        return pl08x_cctl(cctl);
+}
-        if (plchan->runtime_direction == DMA_DEV_TO_MEM) {
+static int dma_set_runtime_config(struct dma_chan *chan,
-                plchan->src_addr = config->src_addr;
+                                  struct dma_slave_config *config)
-                plchan->src_cctl = pl08x_cctl(cctl) | PL080_CONTROL_DST_INCR |
+{
-                        pl08x_select_bus(plchan->cd->periph_buses,
+        struct pl08x_dma_chan *plchan = to_pl08x_chan(chan);
-                                         pl08x->mem_buses);
-        } else {
-                plchan->dst_addr = config->dst_addr;
-                plchan->dst_cctl = pl08x_cctl(cctl) | PL080_CONTROL_SRC_INCR |
-                        pl08x_select_bus(pl08x->mem_buses,
-                                         plchan->cd->periph_buses);
-        }
-        dev_dbg(&pl08x->adev->dev,
+        if (!plchan->slave)
-                "configured channel %s (%s) for %s, data width %d, "
+                return -EINVAL;
-                "maxburst %d words, LE, CCTL=0x%08x\n",
-                dma_chan_name(chan), plchan->name,
+        /* Reject definitely invalid configurations */
-                (config->direction == DMA_DEV_TO_MEM) ? "RX" : "TX",
+        if (config->src_addr_width == DMA_SLAVE_BUSWIDTH_8_BYTES ||
-                addr_width,
+            config->dst_addr_width == DMA_SLAVE_BUSWIDTH_8_BYTES)
-                maxburst,
+                return -EINVAL;
-                cctl);
+        plchan->cfg = *config;
        return 0;
 }
@@ -1163,95 +1334,19 @@ static void pl08x_issue_pending(struct dma_chan *chan)
        struct pl08x_dma_chan *plchan = to_pl08x_chan(chan);
        unsigned long flags;
-        spin_lock_irqsave(&plchan->lock, flags);
+        spin_lock_irqsave(&plchan->vc.lock, flags);
-        /* Something is already active, or we're waiting for a channel... */
+        if (vchan_issue_pending(&plchan->vc)) {
-        if (plchan->at || plchan->state == PL08X_CHAN_WAITING) {
+                if (!plchan->phychan && plchan->state != PL08X_CHAN_WAITING)
-                spin_unlock_irqrestore(&plchan->lock, flags);
+                        pl08x_phy_alloc_and_start(plchan);
-                return;
-        }
-        /* Take the first element in the queue and execute it */
-        if (!list_empty(&plchan->pend_list)) {
-                struct pl08x_txd *next;
-                next = list_first_entry(&plchan->pend_list,
-                                        struct pl08x_txd,
-                                        node);
-                list_del(&next->node);
-                plchan->state = PL08X_CHAN_RUNNING;
-                pl08x_start_txd(plchan, next);
        }
+        spin_unlock_irqrestore(&plchan->vc.lock, flags);
-        spin_unlock_irqrestore(&plchan->lock, flags);
-}
-static int pl08x_prep_channel_resources(struct pl08x_dma_chan *plchan,
-                                        struct pl08x_txd *txd)
-{
-        struct pl08x_driver_data *pl08x = plchan->host;
-        unsigned long flags;
-        int num_llis, ret;
-        num_llis = pl08x_fill_llis_for_desc(pl08x, txd);
-        if (!num_llis) {
-                spin_lock_irqsave(&plchan->lock, flags);
-                pl08x_free_txd(pl08x, txd);
-                spin_unlock_irqrestore(&plchan->lock, flags);
-                return -EINVAL;
-        }
-        spin_lock_irqsave(&plchan->lock, flags);
-        /*
-         * See if we already have a physical channel allocated,
-         * else this is the time to try to get one.
-         */
-        ret = prep_phy_channel(plchan, txd);
-        if (ret) {
-                /*
-                 * No physical channel was available.
-                 *
-                 * memcpy transfers can be sorted out at submission time.
-                 *
-                 * Slave transfers may have been denied due to platform
-                 * channel muxing restrictions.  Since there is no guarantee
-                 * that this will ever be resolved, and the signal must be
-                 * acquired AFTER acquiring the physical channel, we will let
-                 * them be NACK:ed with -EBUSY here. The drivers can retry
-                 * the prep() call if they are eager on doing this using DMA.
-                 */
-                if (plchan->slave) {
-                        pl08x_free_txd_list(pl08x, plchan);
-                        pl08x_free_txd(pl08x, txd);
-                        spin_unlock_irqrestore(&plchan->lock, flags);
-                        return -EBUSY;
-                }
-        } else
-                /*
-                 * Else we're all set, paused and ready to roll, status
-                 * will switch to PL08X_CHAN_RUNNING when we call
-                 * issue_pending(). If there is something running on the
-                 * channel already we don't change its state.
-                 */
-                if (plchan->state == PL08X_CHAN_IDLE)
-                        plchan->state = PL08X_CHAN_PAUSED;
-        spin_unlock_irqrestore(&plchan->lock, flags);
-        return 0;
 }
-static struct pl08x_txd *pl08x_get_txd(struct pl08x_dma_chan *plchan,
+static struct pl08x_txd *pl08x_get_txd(struct pl08x_dma_chan *plchan)
-        unsigned long flags)
 {
        struct pl08x_txd *txd = kzalloc(sizeof(*txd), GFP_NOWAIT);
        if (txd) {
-                dma_async_tx_descriptor_init(&txd->tx, &plchan->chan);
-                txd->tx.flags = flags;
-                txd->tx.tx_submit = pl08x_tx_submit;
-                INIT_LIST_HEAD(&txd->node);
                INIT_LIST_HEAD(&txd->dsg_list);
                /* Always enable error and terminal interrupts */
@@ -1274,7 +1369,7 @@ static struct dma_async_tx_descriptor *pl08x_prep_dma_memcpy(
        struct pl08x_sg *dsg;
        int ret;
-        txd = pl08x_get_txd(plchan, flags);
+        txd = pl08x_get_txd(plchan);
        if (!txd) {
                dev_err(&pl08x->adev->dev,
                        "%s no memory for descriptor\n", __func__);
@@ -1290,14 +1385,13 @@ static struct dma_async_tx_descriptor *pl08x_prep_dma_memcpy(
        }
        list_add_tail(&dsg->node, &txd->dsg_list);
-        txd->direction = DMA_NONE;
        dsg->src_addr = src;
        dsg->dst_addr = dest;
        dsg->len = len;
        /* Set platform data for m2m */
        txd->ccfg |= PL080_FLOW_MEM2MEM << PL080_CONFIG_FLOW_CONTROL_SHIFT;
-        txd->cctl = pl08x->pd->memcpy_channel.cctl &
+        txd->cctl = pl08x->pd->memcpy_channel.cctl_memcpy &
                        ~(PL080_CONTROL_DST_AHB2 | PL080_CONTROL_SRC_AHB2);
        /* Both to be incremented or the code will break */
@@ -1307,11 +1401,13 @@ static struct dma_async_tx_descriptor *pl08x_prep_dma_memcpy(
                txd->cctl |= pl08x_select_bus(pl08x->mem_buses,
                                              pl08x->mem_buses);
-        ret = pl08x_prep_channel_resources(plchan, txd);
+        ret = pl08x_fill_llis_for_desc(plchan->host, txd);
-        if (ret)
+        if (!ret) {
+                pl08x_free_txd(pl08x, txd);
                return NULL;
+        }
-        return &txd->tx;
+        return vchan_tx_prep(&plchan->vc, &txd->vd, flags);
 }
 static struct dma_async_tx_descriptor *pl08x_prep_slave_sg(
@@ -1324,36 +1420,40 @@ static struct dma_async_tx_descriptor *pl08x_prep_slave_sg(
        struct pl08x_txd *txd;
        struct pl08x_sg *dsg;
        struct scatterlist *sg;
+        enum dma_slave_buswidth addr_width;
        dma_addr_t slave_addr;
        int ret, tmp;
+        u8 src_buses, dst_buses;
+        u32 maxburst, cctl;
        dev_dbg(&pl08x->adev->dev, "%s prepare transaction of %d bytes from %s\n",
                        __func__, sg_dma_len(sgl), plchan->name);
-        txd = pl08x_get_txd(plchan, flags);
+        txd = pl08x_get_txd(plchan);
        if (!txd) {
                dev_err(&pl08x->adev->dev, "%s no txd\n", __func__);
                return NULL;
        }
-        if (direction != plchan->runtime_direction)
-                dev_err(&pl08x->adev->dev, "%s DMA setup does not match "
-                        "the direction configured for the PrimeCell\n",
-                        __func__);
        /*
         * Set up addresses, the PrimeCell configured address
         * will take precedence since this may configure the
         * channel target address dynamically at runtime.
         */
-        txd->direction = direction;
        if (direction == DMA_MEM_TO_DEV) {
-                txd->cctl = plchan->dst_cctl;
+                cctl = PL080_CONTROL_SRC_INCR;
-                slave_addr = plchan->dst_addr;
+                slave_addr = plchan->cfg.dst_addr;
+                addr_width = plchan->cfg.dst_addr_width;
+                maxburst = plchan->cfg.dst_maxburst;
+                src_buses = pl08x->mem_buses;
+                dst_buses = plchan->cd->periph_buses;
        } else if (direction == DMA_DEV_TO_MEM) {
-                txd->cctl = plchan->src_cctl;
+                cctl = PL080_CONTROL_DST_INCR;
-                slave_addr = plchan->src_addr;
+                slave_addr = plchan->cfg.src_addr;
+                addr_width = plchan->cfg.src_addr_width;
+                maxburst = plchan->cfg.src_maxburst;
+                src_buses = plchan->cd->periph_buses;
+                dst_buses = pl08x->mem_buses;
        } else {
                pl08x_free_txd(pl08x, txd);
                dev_err(&pl08x->adev->dev,
@@ -1361,7 +1461,17 @@ static struct dma_async_tx_descriptor *pl08x_prep_slave_sg(
                return NULL;
        }
-        if (plchan->device_fc)
+        cctl |= pl08x_get_cctl(plchan, addr_width, maxburst);
+        if (cctl == ~0) {
+                pl08x_free_txd(pl08x, txd);
+                dev_err(&pl08x->adev->dev,
+                        "DMA slave configuration botched?\n");
+                return NULL;
+        }
+        txd->cctl = cctl | pl08x_select_bus(src_buses, dst_buses);
+        if (plchan->cfg.device_fc)
                tmp = (direction == DMA_MEM_TO_DEV) ? PL080_FLOW_MEM2PER_PER :
                        PL080_FLOW_PER2MEM_PER;
        else
@@ -1370,9 +1480,28 @@ static struct dma_async_tx_descriptor *pl08x_prep_slave_sg(
        txd->ccfg |= tmp << PL080_CONFIG_FLOW_CONTROL_SHIFT;
+        ret = pl08x_request_mux(plchan);
+        if (ret < 0) {
+                pl08x_free_txd(pl08x, txd);
+                dev_dbg(&pl08x->adev->dev,
+                        "unable to mux for transfer on %s due to platform restrictions\n",
+                        plchan->name);
+                return NULL;
+        }
+        dev_dbg(&pl08x->adev->dev, "allocated DMA request signal %d for xfer on %s\n",
+                 plchan->signal, plchan->name);
+        /* Assign the flow control signal to this channel */
+        if (direction == DMA_MEM_TO_DEV)
+                txd->ccfg |= plchan->signal << PL080_CONFIG_DST_SEL_SHIFT;
+        else
+                txd->ccfg |= plchan->signal << PL080_CONFIG_SRC_SEL_SHIFT;
        for_each_sg(sgl, sg, sg_len, tmp) {
                dsg = kzalloc(sizeof(struct pl08x_sg), GFP_NOWAIT);
                if (!dsg) {
+                        pl08x_release_mux(plchan);
                        pl08x_free_txd(pl08x, txd);
                        dev_err(&pl08x->adev->dev, "%s no mem for pl080 sg\n",
                                        __func__);
@@ -1390,11 +1519,14 @@ static struct dma_async_tx_descriptor *pl08x_prep_slave_sg(
                }
        }
-        ret = pl08x_prep_channel_resources(plchan, txd);
+        ret = pl08x_fill_llis_for_desc(plchan->host, txd);
-        if (ret)
+        if (!ret) {
+                pl08x_release_mux(plchan);
+                pl08x_free_txd(pl08x, txd);
                return NULL;
+        }
-        return &txd->tx;
+        return vchan_tx_prep(&plchan->vc, &txd->vd, flags);
 }
 static int pl08x_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
@@ -1415,9 +1547,9 @@ static int pl08x_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
         * Anything succeeds on channels with no physical allocation and
         * no queued transfers.
         */
-        spin_lock_irqsave(&plchan->lock, flags);
+        spin_lock_irqsave(&plchan->vc.lock, flags);
        if (!plchan->phychan && !plchan->at) {
-                spin_unlock_irqrestore(&plchan->lock, flags);
+                spin_unlock_irqrestore(&plchan->vc.lock, flags);
                return 0;
        }
@@ -1426,18 +1558,15 @@ static int pl08x_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
                plchan->state = PL08X_CHAN_IDLE;
                if (plchan->phychan) {
-                        pl08x_terminate_phy_chan(pl08x, plchan->phychan);
                        /*
                         * Mark physical channel as free and free any slave
                         * signal
                         */
-                        release_phy_channel(plchan);
+                        pl08x_phy_free(plchan);
-                        plchan->phychan_hold = 0;
                }
                /* Dequeue jobs and free LLIs */
                if (plchan->at) {
-                        pl08x_free_txd(pl08x, plchan->at);
+                        pl08x_desc_free(&plchan->at->vd);
                        plchan->at = NULL;
                }
                /* Dequeue jobs not yet fired as well */
@@ -1457,7 +1586,7 @@ static int pl08x_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
                break;
        }
-        spin_unlock_irqrestore(&plchan->lock, flags);
+        spin_unlock_irqrestore(&plchan->vc.lock, flags);
        return ret;
 }
@@ -1494,123 +1623,6 @@ static void pl08x_ensure_on(struct pl08x_driver_data *pl08x)
        writel(PL080_CONFIG_ENABLE, pl08x->base + PL080_CONFIG);
 }
-static void pl08x_unmap_buffers(struct pl08x_txd *txd)
-{
-        struct device *dev = txd->tx.chan->device->dev;
-        struct pl08x_sg *dsg;
-        if (!(txd->tx.flags & DMA_COMPL_SKIP_SRC_UNMAP)) {
-                if (txd->tx.flags & DMA_COMPL_SRC_UNMAP_SINGLE)
-                        list_for_each_entry(dsg, &txd->dsg_list, node)
-                                dma_unmap_single(dev, dsg->src_addr, dsg->len,
-                                                DMA_TO_DEVICE);
-                else {
-                        list_for_each_entry(dsg, &txd->dsg_list, node)
-                                dma_unmap_page(dev, dsg->src_addr, dsg->len,
-                                                DMA_TO_DEVICE);
-                }
-        }
-        if (!(txd->tx.flags & DMA_COMPL_SKIP_DEST_UNMAP)) {
-                if (txd->tx.flags & DMA_COMPL_DEST_UNMAP_SINGLE)
-                        list_for_each_entry(dsg, &txd->dsg_list, node)
-                                dma_unmap_single(dev, dsg->dst_addr, dsg->len,
-                                                DMA_FROM_DEVICE);
-                else
-                        list_for_each_entry(dsg, &txd->dsg_list, node)
-                                dma_unmap_page(dev, dsg->dst_addr, dsg->len,
-                                                DMA_FROM_DEVICE);
-        }
-}
-static void pl08x_tasklet(unsigned long data)
-{
-        struct pl08x_dma_chan *plchan = (struct pl08x_dma_chan *) data;
-        struct pl08x_driver_data *pl08x = plchan->host;
-        struct pl08x_txd *txd;
-        unsigned long flags;
-        spin_lock_irqsave(&plchan->lock, flags);
-        txd = plchan->at;
-        plchan->at = NULL;
-        if (txd) {
-                /* Update last completed */
-                dma_cookie_complete(&txd->tx);
-        }
-        /* If a new descriptor is queued, set it up plchan->at is NULL here */
-        if (!list_empty(&plchan->pend_list)) {
-                struct pl08x_txd *next;
-                next = list_first_entry(&plchan->pend_list,
-                                        struct pl08x_txd,
-                                        node);
-                list_del(&next->node);
-                pl08x_start_txd(plchan, next);
-        } else if (plchan->phychan_hold) {
-                /*
-                 * This channel is still in use - we have a new txd being
-                 * prepared and will soon be queued.  Don't give up the
-                 * physical channel.
-                 */
-        } else {
-                struct pl08x_dma_chan *waiting = NULL;
-                /*
-                 * No more jobs, so free up the physical channel
-                 * Free any allocated signal on slave transfers too
-                 */
-                release_phy_channel(plchan);
-                plchan->state = PL08X_CHAN_IDLE;
-                /*
-                 * And NOW before anyone else can grab that free:d up
-                 * physical channel, see if there is some memcpy pending
-                 * that seriously needs to start because of being stacked
-                 * up while we were choking the physical channels with data.
-                 */
-                list_for_each_entry(waiting, &pl08x->memcpy.channels,
-                                    chan.device_node) {
-                        if (waiting->state == PL08X_CHAN_WAITING &&
-                                waiting->waiting != NULL) {
-                                int ret;
-                                /* This should REALLY not fail now */
-                                ret = prep_phy_channel(waiting,
-                                                       waiting->waiting);
-                                BUG_ON(ret);
-                                waiting->phychan_hold--;
-                                waiting->state = PL08X_CHAN_RUNNING;
-                                waiting->waiting = NULL;
-                                pl08x_issue_pending(&waiting->chan);
-                                break;
-                        }
-                }
-        }
-        spin_unlock_irqrestore(&plchan->lock, flags);
-        if (txd) {
-                dma_async_tx_callback callback = txd->tx.callback;
-                void *callback_param = txd->tx.callback_param;
-                /* Don't try to unmap buffers on slave channels */
-                if (!plchan->slave)
-                        pl08x_unmap_buffers(txd);
-                /* Free the descriptor */
-                spin_lock_irqsave(&plchan->lock, flags);
-                pl08x_free_txd(pl08x, txd);
-                spin_unlock_irqrestore(&plchan->lock, flags);
-                /* Callback to signal completion */
-                if (callback)
-                        callback(callback_param);
-        }
-}
 static irqreturn_t pl08x_irq(int irq, void *dev)
 {
        struct pl08x_driver_data *pl08x = dev;
@@ -1635,6 +1647,7 @@ static irqreturn_t pl08x_irq(int irq, void *dev)
                        /* Locate physical channel */
                        struct pl08x_phy_chan *phychan = &pl08x->phy_chans[i];
                        struct pl08x_dma_chan *plchan = phychan->serving;
+                        struct pl08x_txd *tx;
                        if (!plchan) {
                                dev_err(&pl08x->adev->dev,
@@ -1643,8 +1656,29 @@ static irqreturn_t pl08x_irq(int irq, void *dev)
                                continue;
                        }
-                        /* Schedule tasklet on this channel */
+                        spin_lock(&plchan->vc.lock);
-                        tasklet_schedule(&plchan->tasklet);
+                        tx = plchan->at;
+                        if (tx) {
+                                plchan->at = NULL;
+                                /*
+                                 * This descriptor is done, release its mux
+                                 * reservation.
+                                 */
+                                pl08x_release_mux(plchan);
+                                tx->done = true;
+                                vchan_cookie_complete(&tx->vd);
+                                /*
+                                 * And start the next descriptor (if any),
+                                 * otherwise free this channel.
+                                 */
+                                if (vchan_next_desc(&plchan->vc))
+                                        pl08x_start_next_txd(plchan);
+                                else
+                                        pl08x_phy_free(plchan);
+                        }
+                        spin_unlock(&plchan->vc.lock);
                        mask |= (1 << i);
                }
        }
@@ -1654,16 +1688,10 @@ static irqreturn_t pl08x_irq(int irq, void *dev)
 static void pl08x_dma_slave_init(struct pl08x_dma_chan *chan)
 {
-        u32 cctl = pl08x_cctl(chan->cd->cctl);
        chan->slave = true;
        chan->name = chan->cd->bus_id;
-        chan->src_addr = chan->cd->addr;
+        chan->cfg.src_addr = chan->cd->addr;
-        chan->dst_addr = chan->cd->addr;
+        chan->cfg.dst_addr = chan->cd->addr;
-        chan->src_cctl = cctl | PL080_CONTROL_DST_INCR |
-                pl08x_select_bus(chan->cd->periph_buses, chan->host->mem_buses);
-        chan->dst_cctl = cctl | PL080_CONTROL_SRC_INCR |
-                pl08x_select_bus(chan->host->mem_buses, chan->cd->periph_buses);
 }
 /*
@@ -1693,6 +1721,7 @@ static int pl08x_dma_init_virtual_channels(struct pl08x_driver_data *pl08x,
                chan->host = pl08x;
                chan->state = PL08X_CHAN_IDLE;
+                chan->signal = -1;
                if (slave) {
                        chan->cd = &pl08x->pd->slave_channels[i];
@@ -1705,26 +1734,12 @@ static int pl08x_dma_init_virtual_channels(struct pl08x_driver_data *pl08x,
                                return -ENOMEM;
                        }
                }
-                if (chan->cd->circular_buffer) {
-                        dev_err(&pl08x->adev->dev,
-                                "channel %s: circular buffers not supported\n",
-                                chan->name);
-                        kfree(chan);
-                        continue;
-                }
                dev_dbg(&pl08x->adev->dev,
                         "initialize virtual channel \"%s\"\n",
                         chan->name);
-                chan->chan.device = dmadev;
+                chan->vc.desc_free = pl08x_desc_free;
-                dma_cookie_init(&chan->chan);
+                vchan_init(&chan->vc, dmadev);
-                spin_lock_init(&chan->lock);
-                INIT_LIST_HEAD(&chan->pend_list);
-                tasklet_init(&chan->tasklet, pl08x_tasklet,
-                             (unsigned long) chan);
-                list_add_tail(&chan->chan.device_node, &dmadev->channels);
        }
        dev_info(&pl08x->adev->dev, "initialized %d virtual %s channels\n",
                 i, slave ? "slave" : "memcpy");
@@ -1737,8 +1752,8 @@ static void pl08x_free_virtual_channels(struct dma_device *dmadev)
        struct pl08x_dma_chan *next;
        list_for_each_entry_safe(chan,
-                                 next, &dmadev->channels, chan.device_node) {
+                                 next, &dmadev->channels, vc.chan.device_node) {
-                list_del(&chan->chan.device_node);
+                list_del(&chan->vc.chan.device_node);
                kfree(chan);
        }
 }
@@ -1791,7 +1806,7 @@ static int pl08x_debugfs_show(struct seq_file *s, void *data)
        seq_printf(s, "\nPL08x virtual memcpy channels:\n");
        seq_printf(s, "CHANNEL:\tSTATE:\n");
        seq_printf(s, "--------\t------\n");
-        list_for_each_entry(chan, &pl08x->memcpy.channels, chan.device_node) {
+        list_for_each_entry(chan, &pl08x->memcpy.channels, vc.chan.device_node) {
                seq_printf(s, "%s\t\t%s\n", chan->name,
                           pl08x_state_str(chan->state));
        }
@@ -1799,7 +1814,7 @@ static int pl08x_debugfs_show(struct seq_file *s, void *data)
        seq_printf(s, "\nPL08x virtual slave channels:\n");
        seq_printf(s, "CHANNEL:\tSTATE:\n");
        seq_printf(s, "--------\t------\n");
-        list_for_each_entry(chan, &pl08x->slave.channels, chan.device_node) {
+        list_for_each_entry(chan, &pl08x->slave.channels, vc.chan.device_node) {
                seq_printf(s, "%s\t\t%s\n", chan->name,
                           pl08x_state_str(chan->state));
        }
@@ -1851,9 +1866,6 @@ static int pl08x_probe(struct amba_device *adev, const struct amba_id *id)
                goto out_no_pl08x;
        }
-        pm_runtime_set_active(&adev->dev);
-        pm_runtime_enable(&adev->dev);
        /* Initialize memcpy engine */
        dma_cap_set(DMA_MEMCPY, pl08x->memcpy.cap_mask);
        pl08x->memcpy.dev = &adev->dev;
@@ -1903,8 +1915,6 @@ static int pl08x_probe(struct amba_device *adev, const struct amba_id *id)
                goto out_no_lli_pool;
        }
-        spin_lock_init(&pl08x->lock);
        pl08x->base = ioremap(adev->res.start, resource_size(&adev->res));
        if (!pl08x->base) {
                ret = -ENOMEM;
@@ -1942,7 +1952,6 @@ static int pl08x_probe(struct amba_device *adev, const struct amba_id *id)
                ch->id = i;
                ch->base = pl08x->base + PL080_Cx_BASE(i);
                spin_lock_init(&ch->lock);
-                ch->signal = -1;
                /*
                 * Nomadik variants can have channels that are locked
@@ -2007,7 +2016,6 @@ static int pl08x_probe(struct amba_device *adev, const struct amba_id *id)
                 amba_part(adev), amba_rev(adev),
                 (unsigned long long)adev->res.start, adev->irq[0]);
-        pm_runtime_put(&adev->dev);
        return 0;
 out_no_slave_reg:
@@ -2026,9 +2034,6 @@ out_no_ioremap:
        dma_pool_destroy(pl08x->pool);
 out_no_lli_pool:
 out_no_platdata:
-        pm_runtime_put(&adev->dev);
-        pm_runtime_disable(&adev->dev);
        kfree(pl08x);
 out_no_pl08x:
        amba_release_regions(adev);
diff --git a/drivers/dma/at_hdmac.c b/drivers/dma/at_hdmac.c
index 7292aa87b2dd..3934fcc4e00b 100644
--- a/drivers/dma/at_hdmac.c
+++ b/drivers/dma/at_hdmac.c
@@ -9,10 +9,9 @@
 * (at your option) any later version.
 *
 *
- * This supports the Atmel AHB DMA Controller,
+ * This supports the Atmel AHB DMA Controller found in several Atmel SoCs.
- *
+ * The only Atmel DMA Controller that is not covered by this driver is the one
- * The driver has currently been tested with the Atmel AT91SAM9RL
+ * found on AT91SAM9263.
- * and AT91SAM9G45 series.
 */
 #include <linux/clk.h>
@@ -1217,7 +1216,7 @@ static const struct platform_device_id atdma_devtypes[] = {
        }
 };
-static inline struct at_dma_platform_data * __init at_dma_get_driver_data(
+static inline const struct at_dma_platform_data * __init at_dma_get_driver_data(
                                                struct platform_device *pdev)
 {
        if (pdev->dev.of_node) {
@@ -1255,7 +1254,7 @@ static int __init at_dma_probe(struct platform_device *pdev)
        int                     irq;
        int                     err;
        int                     i;
-        struct at_dma_platform_data *plat_dat;
+        const struct at_dma_platform_data *plat_dat;
        /* setup platform data for each SoC */
        dma_cap_set(DMA_MEMCPY, at91sam9rl_config.cap_mask);
diff --git a/drivers/dma/coh901318.c b/drivers/dma/coh901318.c
index e67b4e06a918..aa384e53b7ac 100644
--- a/drivers/dma/coh901318.c
+++ b/drivers/dma/coh901318.c
@@ -1438,34 +1438,32 @@ static int __init coh901318_probe(struct platform_device *pdev)
        io = platform_get_resource(pdev, IORESOURCE_MEM, 0);
        if (!io)
-                goto err_get_resource;
+                return -ENODEV;
        /* Map DMA controller registers to virtual memory */
-        if (request_mem_region(io->start,
+        if (devm_request_mem_region(&pdev->dev,
-                               resource_size(io),
+                                    io->start,
-                               pdev->dev.driver->name) == NULL) {
+                                    resource_size(io),
-                err = -EBUSY;
+                                    pdev->dev.driver->name) == NULL)
-                goto err_request_mem;
+                return -ENOMEM;
-        }
        pdata = pdev->dev.platform_data;
        if (!pdata)
-                goto err_no_platformdata;
+                return -ENODEV;
-        base = kmalloc(ALIGN(sizeof(struct coh901318_base), 4) +
+        base = devm_kzalloc(&pdev->dev,
-                       pdata->max_channels *
+                            ALIGN(sizeof(struct coh901318_base), 4) +
-                       sizeof(struct coh901318_chan),
+                            pdata->max_channels *
-                       GFP_KERNEL);
+                            sizeof(struct coh901318_chan),
+                            GFP_KERNEL);
        if (!base)
-                goto err_alloc_coh_dma_channels;
+                return -ENOMEM;
        base->chans = ((void *)base) + ALIGN(sizeof(struct coh901318_base), 4);
-        base->virtbase = ioremap(io->start, resource_size(io));
+        base->virtbase = devm_ioremap(&pdev->dev, io->start, resource_size(io));
-        if (!base->virtbase) {
+        if (!base->virtbase)
-                err = -ENOMEM;
+                return -ENOMEM;
-                goto err_no_ioremap;
-        }
        base->dev = &pdev->dev;
        base->platform = pdata;
@@ -1474,25 +1472,20 @@ static int __init coh901318_probe(struct platform_device *pdev)
        COH901318_DEBUGFS_ASSIGN(debugfs_dma_base, base);
-        platform_set_drvdata(pdev, base);
        irq = platform_get_irq(pdev, 0);
        if (irq < 0)
-                goto err_no_irq;
+                return irq;
-        err = request_irq(irq, dma_irq_handler, IRQF_DISABLED,
+        err = devm_request_irq(&pdev->dev, irq, dma_irq_handler, IRQF_DISABLED,
-                          "coh901318", base);
+                               "coh901318", base);
-        if (err) {
+        if (err)
-                dev_crit(&pdev->dev,
+                return err;
-                         "Cannot allocate IRQ for DMA controller!\n");
-                goto err_request_irq;
-        }
        err = coh901318_pool_create(&base->pool, &pdev->dev,
                                    sizeof(struct coh901318_lli),
                                    32);
        if (err)
-                goto err_pool_create;
+                return err;
        /* init channels for device transfers */
        coh901318_base_init(&base->dma_slave,  base->platform->chans_slave,
@@ -1538,6 +1531,7 @@ static int __init coh901318_probe(struct platform_device *pdev)
        if (err)
                goto err_register_memcpy;
+        platform_set_drvdata(pdev, base);
        dev_info(&pdev->dev, "Initialized COH901318 DMA on virtual base 0x%08x\n",
                (u32) base->virtbase);
@@ -1547,19 +1541,6 @@ static int __init coh901318_probe(struct platform_device *pdev)
        dma_async_device_unregister(&base->dma_slave);
 err_register_slave:
        coh901318_pool_destroy(&base->pool);
- err_pool_create:
-        free_irq(platform_get_irq(pdev, 0), base);
- err_request_irq:
- err_no_irq:
-        iounmap(base->virtbase);
- err_no_ioremap:
-        kfree(base);
- err_alloc_coh_dma_channels:
- err_no_platformdata:
-        release_mem_region(pdev->resource->start,
-                           resource_size(pdev->resource));
- err_request_mem:
- err_get_resource:
        return err;
 }
@@ -1570,11 +1551,6 @@ static int __exit coh901318_remove(struct platform_device *pdev)
        dma_async_device_unregister(&base->dma_memcpy);
        dma_async_device_unregister(&base->dma_slave);
        coh901318_pool_destroy(&base->pool);
-        free_irq(platform_get_irq(pdev, 0), base);
-        iounmap(base->virtbase);
-        kfree(base);
-        release_mem_region(pdev->resource->start,
-                           resource_size(pdev->resource));
        return 0;
 }
diff --git a/drivers/dma/dmaengine.c b/drivers/dma/dmaengine.c
index 2397f6f451b1..3491654cdf7b 100644
--- a/drivers/dma/dmaengine.c
+++ b/drivers/dma/dmaengine.c
@@ -45,6 +45,8 @@
 * See Documentation/dmaengine.txt for more details
 */
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
 #include <linux/dma-mapping.h>
 #include <linux/init.h>
 #include <linux/module.h>
@@ -261,7 +263,7 @@ enum dma_status dma_sync_wait(struct dma_chan *chan, dma_cookie_t cookie)
        do {
                status = dma_async_is_tx_complete(chan, cookie, NULL, NULL);
                if (time_after_eq(jiffies, dma_sync_wait_timeout)) {
-                        printk(KERN_ERR "dma_sync_wait_timeout!\n");
+                        pr_err("%s: timeout!\n", __func__);
                        return DMA_ERROR;
                }
        } while (status == DMA_IN_PROGRESS);
@@ -312,7 +314,7 @@ static int __init dma_channel_table_init(void)
        }
        if (err) {
-                pr_err("dmaengine: initialization failure\n");
+                pr_err("initialization failure\n");
                for_each_dma_cap_mask(cap, dma_cap_mask_all)
                        if (channel_table[cap])
                                free_percpu(channel_table[cap]);
@@ -520,12 +522,12 @@ struct dma_chan *__dma_request_channel(dma_cap_mask_t *mask, dma_filter_fn fn, v
                        err = dma_chan_get(chan);
                        if (err == -ENODEV) {
-                                pr_debug("%s: %s module removed\n", __func__,
+                                pr_debug("%s: %s module removed\n",
-                                         dma_chan_name(chan));
+                                         __func__, dma_chan_name(chan));
                                list_del_rcu(&device->global_node);
                        } else if (err)
                                pr_debug("%s: failed to get %s: (%d)\n",
-                                        __func__, dma_chan_name(chan), err);
+                                         __func__, dma_chan_name(chan), err);
                        else
                                break;
                        if (--device->privatecnt == 0)
@@ -535,7 +537,9 @@ struct dma_chan *__dma_request_channel(dma_cap_mask_t *mask, dma_filter_fn fn, v
        }
        mutex_unlock(&dma_list_mutex);
-        pr_debug("%s: %s (%s)\n", __func__, chan ? "success" : "fail",
+        pr_debug("%s: %s (%s)\n",
+                 __func__,
+                 chan ? "success" : "fail",
                 chan ? dma_chan_name(chan) : NULL);
        return chan;
@@ -579,7 +583,7 @@ void dmaengine_get(void)
                                break;
                        } else if (err)
                                pr_err("%s: failed to get %s: (%d)\n",
-                                        __func__, dma_chan_name(chan), err);
+                                       __func__, dma_chan_name(chan), err);
                }
        }
@@ -1015,7 +1019,7 @@ dma_wait_for_async_tx(struct dma_async_tx_descriptor *tx)
        while (tx->cookie == -EBUSY) {
                if (time_after_eq(jiffies, dma_sync_wait_timeout)) {
                        pr_err("%s timeout waiting for descriptor submission\n",
-                                __func__);
+                               __func__);
                        return DMA_ERROR;
                }
                cpu_relax();
diff --git a/drivers/dma/dw_dmac.c b/drivers/dma/dw_dmac.c
index e23dc82d43ac..d3c5a5a88f1e 100644
--- a/drivers/dma/dw_dmac.c
+++ b/drivers/dma/dw_dmac.c
@@ -105,13 +105,13 @@ static struct dw_desc *dwc_desc_get(struct dw_dma_chan *dwc)
        spin_lock_irqsave(&dwc->lock, flags);
        list_for_each_entry_safe(desc, _desc, &dwc->free_list, desc_node) {
+                i++;
                if (async_tx_test_ack(&desc->txd)) {
                        list_del(&desc->desc_node);
                        ret = desc;
                        break;
                }
                dev_dbg(chan2dev(&dwc->chan), "desc %p not ACKed\n", desc);
-                i++;
        }
        spin_unlock_irqrestore(&dwc->lock, flags);
@@ -191,6 +191,42 @@ static void dwc_initialize(struct dw_dma_chan *dwc)
 /*----------------------------------------------------------------------*/
+static inline unsigned int dwc_fast_fls(unsigned long long v)
+{
+        /*
+         * We can be a lot more clever here, but this should take care
+         * of the most common optimization.
+         */
+        if (!(v & 7))
+                return 3;
+        else if (!(v & 3))
+                return 2;
+        else if (!(v & 1))
+                return 1;
+        return 0;
+}
+static void dwc_dump_chan_regs(struct dw_dma_chan *dwc)
+{
+        dev_err(chan2dev(&dwc->chan),
+                "  SAR: 0x%x DAR: 0x%x LLP: 0x%x CTL: 0x%x:%08x\n",
+                channel_readl(dwc, SAR),
+                channel_readl(dwc, DAR),
+                channel_readl(dwc, LLP),
+                channel_readl(dwc, CTL_HI),
+                channel_readl(dwc, CTL_LO));
+}
+static inline void dwc_chan_disable(struct dw_dma *dw, struct dw_dma_chan *dwc)
+{
+        channel_clear_bit(dw, CH_EN, dwc->mask);
+        while (dma_readl(dw, CH_EN) & dwc->mask)
+                cpu_relax();
+}
+/*----------------------------------------------------------------------*/
 /* Called with dwc->lock held and bh disabled */
 static void dwc_dostart(struct dw_dma_chan *dwc, struct dw_desc *first)
 {
@@ -200,13 +236,7 @@ static void dwc_dostart(struct dw_dma_chan *dwc, struct dw_desc *first)
        if (dma_readl(dw, CH_EN) & dwc->mask) {
                dev_err(chan2dev(&dwc->chan),
                        "BUG: Attempted to start non-idle channel\n");
-                dev_err(chan2dev(&dwc->chan),
+                dwc_dump_chan_regs(dwc);
-                        "  SAR: 0x%x DAR: 0x%x LLP: 0x%x CTL: 0x%x:%08x\n",
-                        channel_readl(dwc, SAR),
-                        channel_readl(dwc, DAR),
-                        channel_readl(dwc, LLP),
-                        channel_readl(dwc, CTL_HI),
-                        channel_readl(dwc, CTL_LO));
                /* The tasklet will hopefully advance the queue... */
                return;
@@ -290,9 +320,7 @@ static void dwc_complete_all(struct dw_dma *dw, struct dw_dma_chan *dwc)
                        "BUG: XFER bit set, but channel not idle!\n");
                /* Try to continue after resetting the channel... */
-                channel_clear_bit(dw, CH_EN, dwc->mask);
+                dwc_chan_disable(dw, dwc);
-                while (dma_readl(dw, CH_EN) & dwc->mask)
-                        cpu_relax();
        }
        /*
@@ -337,7 +365,8 @@ static void dwc_scan_descriptors(struct dw_dma *dw, struct dw_dma_chan *dwc)
                return;
        }
-        dev_vdbg(chan2dev(&dwc->chan), "scan_descriptors: llp=0x%x\n", llp);
+        dev_vdbg(chan2dev(&dwc->chan), "%s: llp=0x%llx\n", __func__,
+                        (unsigned long long)llp);
        list_for_each_entry_safe(desc, _desc, &dwc->active_list, desc_node) {
                /* check first descriptors addr */
@@ -373,9 +402,7 @@ static void dwc_scan_descriptors(struct dw_dma *dw, struct dw_dma_chan *dwc)
                "BUG: All descriptors done, but channel not idle!\n");
        /* Try to continue after resetting the channel... */
-        channel_clear_bit(dw, CH_EN, dwc->mask);
+        dwc_chan_disable(dw, dwc);
-        while (dma_readl(dw, CH_EN) & dwc->mask)
-                cpu_relax();
        if (!list_empty(&dwc->queue)) {
                list_move(dwc->queue.next, &dwc->active_list);
@@ -384,12 +411,11 @@ static void dwc_scan_descriptors(struct dw_dma *dw, struct dw_dma_chan *dwc)
        spin_unlock_irqrestore(&dwc->lock, flags);
 }
-static void dwc_dump_lli(struct dw_dma_chan *dwc, struct dw_lli *lli)
+static inline void dwc_dump_lli(struct dw_dma_chan *dwc, struct dw_lli *lli)
 {
        dev_printk(KERN_CRIT, chan2dev(&dwc->chan),
                        "  desc: s0x%x d0x%x l0x%x c0x%x:%x\n",
-                        lli->sar, lli->dar, lli->llp,
+                        lli->sar, lli->dar, lli->llp, lli->ctlhi, lli->ctllo);
-                        lli->ctlhi, lli->ctllo);
 }
 static void dwc_handle_error(struct dw_dma *dw, struct dw_dma_chan *dwc)
@@ -487,17 +513,9 @@ static void dwc_handle_cyclic(struct dw_dma *dw, struct dw_dma_chan *dwc,
                spin_lock_irqsave(&dwc->lock, flags);
-                dev_err(chan2dev(&dwc->chan),
+                dwc_dump_chan_regs(dwc);
-                        "  SAR: 0x%x DAR: 0x%x LLP: 0x%x CTL: 0x%x:%08x\n",
-                        channel_readl(dwc, SAR),
-                        channel_readl(dwc, DAR),
-                        channel_readl(dwc, LLP),
-                        channel_readl(dwc, CTL_HI),
-                        channel_readl(dwc, CTL_LO));
-                channel_clear_bit(dw, CH_EN, dwc->mask);
+                dwc_chan_disable(dw, dwc);
-                while (dma_readl(dw, CH_EN) & dwc->mask)
-                        cpu_relax();
                /* make sure DMA does not restart by loading a new list */
                channel_writel(dwc, LLP, 0);
@@ -527,7 +545,7 @@ static void dw_dma_tasklet(unsigned long data)
        status_xfer = dma_readl(dw, RAW.XFER);
        status_err = dma_readl(dw, RAW.ERROR);
-        dev_vdbg(dw->dma.dev, "tasklet: status_err=%x\n", status_err);
+        dev_vdbg(dw->dma.dev, "%s: status_err=%x\n", __func__, status_err);
        for (i = 0; i < dw->dma.chancnt; i++) {
                dwc = &dw->chan[i];
@@ -551,7 +569,7 @@ static irqreturn_t dw_dma_interrupt(int irq, void *dev_id)
        struct dw_dma *dw = dev_id;
        u32 status;
-        dev_vdbg(dw->dma.dev, "interrupt: status=0x%x\n",
+        dev_vdbg(dw->dma.dev, "%s: status=0x%x\n", __func__,
                        dma_readl(dw, STATUS_INT));
        /*
@@ -597,12 +615,12 @@ static dma_cookie_t dwc_tx_submit(struct dma_async_tx_descriptor *tx)
         * for DMA. But this is hard to do in a race-free manner.
         */
        if (list_empty(&dwc->active_list)) {
-                dev_vdbg(chan2dev(tx->chan), "tx_submit: started %u\n",
+                dev_vdbg(chan2dev(tx->chan), "%s: started %u\n", __func__,
                                desc->txd.cookie);
                list_add_tail(&desc->desc_node, &dwc->active_list);
                dwc_dostart(dwc, dwc_first_active(dwc));
        } else {
-                dev_vdbg(chan2dev(tx->chan), "tx_submit: queued %u\n",
+                dev_vdbg(chan2dev(tx->chan), "%s: queued %u\n", __func__,
                                desc->txd.cookie);
                list_add_tail(&desc->desc_node, &dwc->queue);
@@ -627,26 +645,17 @@ dwc_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dest, dma_addr_t src,
        unsigned int            dst_width;
        u32                     ctllo;
-        dev_vdbg(chan2dev(chan), "prep_dma_memcpy d0x%x s0x%x l0x%zx f0x%lx\n",
+        dev_vdbg(chan2dev(chan),
-                        dest, src, len, flags);
+                        "%s: d0x%llx s0x%llx l0x%zx f0x%lx\n", __func__,
+                        (unsigned long long)dest, (unsigned long long)src,
+                        len, flags);
        if (unlikely(!len)) {
-                dev_dbg(chan2dev(chan), "prep_dma_memcpy: length is zero!\n");
+                dev_dbg(chan2dev(chan), "%s: length is zero!\n", __func__);
                return NULL;
        }
-        /*
+        src_width = dst_width = dwc_fast_fls(src | dest | len);
-         * We can be a lot more clever here, but this should take care
-         * of the most common optimization.
-         */
-        if (!((src | dest  | len) & 7))
-                src_width = dst_width = 3;
-        else if (!((src | dest  | len) & 3))
-                src_width = dst_width = 2;
-        else if (!((src | dest | len) & 1))
-                src_width = dst_width = 1;
-        else
-                src_width = dst_width = 0;
        ctllo = DWC_DEFAULT_CTLLO(chan)
                        | DWC_CTLL_DST_WIDTH(dst_width)
@@ -720,7 +729,7 @@ dwc_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
        struct scatterlist      *sg;
        size_t                  total_len = 0;
-        dev_vdbg(chan2dev(chan), "prep_dma_slave\n");
+        dev_vdbg(chan2dev(chan), "%s\n", __func__);
        if (unlikely(!dws || !sg_len))
                return NULL;
@@ -746,14 +755,7 @@ dwc_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
                        mem = sg_dma_address(sg);
                        len = sg_dma_len(sg);
-                        if (!((mem | len) & 7))
+                        mem_width = dwc_fast_fls(mem | len);
-                                mem_width = 3;
-                        else if (!((mem | len) & 3))
-                                mem_width = 2;
-                        else if (!((mem | len) & 1))
-                                mem_width = 1;
-                        else
-                                mem_width = 0;
 slave_sg_todev_fill_desc:
                        desc = dwc_desc_get(dwc);
@@ -813,14 +815,7 @@ slave_sg_todev_fill_desc:
                        mem = sg_dma_address(sg);
                        len = sg_dma_len(sg);
-                        if (!((mem | len) & 7))
+                        mem_width = dwc_fast_fls(mem | len);
-                                mem_width = 3;
-                        else if (!((mem | len) & 3))
-                                mem_width = 2;
-                        else if (!((mem | len) & 1))
-                                mem_width = 1;
-                        else
-                                mem_width = 0;
 slave_sg_fromdev_fill_desc:
                        desc = dwc_desc_get(dwc);
@@ -950,9 +945,7 @@ static int dwc_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
        } else if (cmd == DMA_TERMINATE_ALL) {
                spin_lock_irqsave(&dwc->lock, flags);
-                channel_clear_bit(dw, CH_EN, dwc->mask);
+                dwc_chan_disable(dw, dwc);
-                while (dma_readl(dw, CH_EN) & dwc->mask)
-                        cpu_relax();
                dwc->paused = false;
@@ -1014,7 +1007,7 @@ static int dwc_alloc_chan_resources(struct dma_chan *chan)
        int                     i;
        unsigned long           flags;
-        dev_vdbg(chan2dev(chan), "alloc_chan_resources\n");
+        dev_vdbg(chan2dev(chan), "%s\n", __func__);
        /* ASSERT:  channel is idle */
        if (dma_readl(dw, CH_EN) & dwc->mask) {
@@ -1057,8 +1050,7 @@ static int dwc_alloc_chan_resources(struct dma_chan *chan)
        spin_unlock_irqrestore(&dwc->lock, flags);
-        dev_dbg(chan2dev(chan),
+        dev_dbg(chan2dev(chan), "%s: allocated %d descriptors\n", __func__, i);
-                "alloc_chan_resources allocated %d descriptors\n", i);
        return i;
 }
@@ -1071,7 +1063,7 @@ static void dwc_free_chan_resources(struct dma_chan *chan)
        unsigned long           flags;
        LIST_HEAD(list);
-        dev_dbg(chan2dev(chan), "free_chan_resources (descs allocated=%u)\n",
+        dev_dbg(chan2dev(chan), "%s: descs allocated=%u\n", __func__,
                        dwc->descs_allocated);
        /* ASSERT:  channel is idle */
@@ -1097,7 +1089,7 @@ static void dwc_free_chan_resources(struct dma_chan *chan)
                kfree(desc);
        }
-        dev_vdbg(chan2dev(chan), "free_chan_resources done\n");
+        dev_vdbg(chan2dev(chan), "%s: done\n", __func__);
 }
 /* --------------------- Cyclic DMA API extensions -------------------- */
@@ -1126,13 +1118,7 @@ int dw_dma_cyclic_start(struct dma_chan *chan)
        if (dma_readl(dw, CH_EN) & dwc->mask) {
                dev_err(chan2dev(&dwc->chan),
                        "BUG: Attempted to start non-idle channel\n");
-                dev_err(chan2dev(&dwc->chan),
+                dwc_dump_chan_regs(dwc);
-                        "  SAR: 0x%x DAR: 0x%x LLP: 0x%x CTL: 0x%x:%08x\n",
-                        channel_readl(dwc, SAR),
-                        channel_readl(dwc, DAR),
-                        channel_readl(dwc, LLP),
-                        channel_readl(dwc, CTL_HI),
-                        channel_readl(dwc, CTL_LO));
                spin_unlock_irqrestore(&dwc->lock, flags);
                return -EBUSY;
        }
@@ -1167,9 +1153,7 @@ void dw_dma_cyclic_stop(struct dma_chan *chan)
        spin_lock_irqsave(&dwc->lock, flags);
-        channel_clear_bit(dw, CH_EN, dwc->mask);
+        dwc_chan_disable(dw, dwc);
-        while (dma_readl(dw, CH_EN) & dwc->mask)
-                cpu_relax();
        spin_unlock_irqrestore(&dwc->lock, flags);
 }
@@ -1308,9 +1292,9 @@ struct dw_cyclic_desc *dw_dma_cyclic_prep(struct dma_chan *chan,
        dma_sync_single_for_device(chan2parent(chan), last->txd.phys,
                        sizeof(last->lli), DMA_TO_DEVICE);
-        dev_dbg(chan2dev(&dwc->chan), "cyclic prepared buf 0x%08x len %zu "
+        dev_dbg(chan2dev(&dwc->chan), "cyclic prepared buf 0x%llx len %zu "
-                        "period %zu periods %d\n", buf_addr, buf_len,
+                        "period %zu periods %d\n", (unsigned long long)buf_addr,
-                        period_len, periods);
+                        buf_len, period_len, periods);
        cdesc->periods = periods;
        dwc->cdesc = cdesc;
@@ -1340,16 +1324,14 @@ void dw_dma_cyclic_free(struct dma_chan *chan)
        int                     i;
        unsigned long           flags;
-        dev_dbg(chan2dev(&dwc->chan), "cyclic free\n");
+        dev_dbg(chan2dev(&dwc->chan), "%s\n", __func__);
        if (!cdesc)
                return;
        spin_lock_irqsave(&dwc->lock, flags);
-        channel_clear_bit(dw, CH_EN, dwc->mask);
+        dwc_chan_disable(dw, dwc);
-        while (dma_readl(dw, CH_EN) & dwc->mask)
-                cpu_relax();
        dma_writel(dw, CLEAR.ERROR, dwc->mask);
        dma_writel(dw, CLEAR.XFER, dwc->mask);
@@ -1386,7 +1368,7 @@ static void dw_dma_off(struct dw_dma *dw)
                dw->chan[i].initialized = false;
 }
-static int __init dw_probe(struct platform_device *pdev)
+static int __devinit dw_probe(struct platform_device *pdev)
 {
        struct dw_dma_platform_data *pdata;
        struct resource         *io;
@@ -1432,9 +1414,15 @@ static int __init dw_probe(struct platform_device *pdev)
        }
        clk_prepare_enable(dw->clk);
+        /* Calculate all channel mask before DMA setup */
+        dw->all_chan_mask = (1 << pdata->nr_channels) - 1;
        /* force dma off, just in case */
        dw_dma_off(dw);
+        /* disable BLOCK interrupts as well */
+        channel_clear_bit(dw, MASK.BLOCK, dw->all_chan_mask);
        err = request_irq(irq, dw_dma_interrupt, 0, "dw_dmac", dw);
        if (err)
                goto err_irq;
@@ -1443,8 +1431,6 @@ static int __init dw_probe(struct platform_device *pdev)
        tasklet_init(&dw->tasklet, dw_dma_tasklet, (unsigned long)dw);
-        dw->all_chan_mask = (1 << pdata->nr_channels) - 1;
        INIT_LIST_HEAD(&dw->dma.channels);
        for (i = 0; i < pdata->nr_channels; i++) {
                struct dw_dma_chan      *dwc = &dw->chan[i];
@@ -1474,17 +1460,13 @@ static int __init dw_probe(struct platform_device *pdev)
                channel_clear_bit(dw, CH_EN, dwc->mask);
        }
-        /* Clear/disable all interrupts on all channels. */
+        /* Clear all interrupts on all channels. */
        dma_writel(dw, CLEAR.XFER, dw->all_chan_mask);
+        dma_writel(dw, CLEAR.BLOCK, dw->all_chan_mask);
        dma_writel(dw, CLEAR.SRC_TRAN, dw->all_chan_mask);
        dma_writel(dw, CLEAR.DST_TRAN, dw->all_chan_mask);
        dma_writel(dw, CLEAR.ERROR, dw->all_chan_mask);
-        channel_clear_bit(dw, MASK.XFER, dw->all_chan_mask);
-        channel_clear_bit(dw, MASK.SRC_TRAN, dw->all_chan_mask);
-        channel_clear_bit(dw, MASK.DST_TRAN, dw->all_chan_mask);
-        channel_clear_bit(dw, MASK.ERROR, dw->all_chan_mask);
        dma_cap_set(DMA_MEMCPY, dw->dma.cap_mask);
        dma_cap_set(DMA_SLAVE, dw->dma.cap_mask);
        if (pdata->is_private)
@@ -1523,7 +1505,7 @@ err_kfree:
        return err;
 }
-static int __exit dw_remove(struct platform_device *pdev)
+static int __devexit dw_remove(struct platform_device *pdev)
 {
        struct dw_dma           *dw = platform_get_drvdata(pdev);
        struct dw_dma_chan      *dwc, *_dwc;
@@ -1602,7 +1584,7 @@ MODULE_DEVICE_TABLE(of, dw_dma_id_table);
 #endif
 static struct platform_driver dw_driver = {
-        .remove         = __exit_p(dw_remove),
+        .remove         = __devexit_p(dw_remove),
        .shutdown       = dw_shutdown,
        .driver = {
                .name   = "dw_dmac",
@@ -1626,4 +1608,4 @@ module_exit(dw_exit);
 MODULE_LICENSE("GPL v2");
 MODULE_DESCRIPTION("Synopsys DesignWare DMA Controller driver");
 MODULE_AUTHOR("Haavard Skinnemoen (Atmel)");
-MODULE_AUTHOR("Viresh Kumar <viresh.kumar@st.com>");
+MODULE_AUTHOR("Viresh Kumar <viresh.linux@gmail.com>");
diff --git a/drivers/dma/dw_dmac_regs.h b/drivers/dma/dw_dmac_regs.h
index f298f69ecbf9..50830bee087a 100644
--- a/drivers/dma/dw_dmac_regs.h
+++ b/drivers/dma/dw_dmac_regs.h
@@ -82,7 +82,7 @@ struct dw_dma_regs {
        DW_REG(ID);
        DW_REG(TEST);
-        /* optional encoded params, 0x3c8..0x3 */
+        /* optional encoded params, 0x3c8..0x3f7 */
 };
 /* Bitfields in CTL_LO */
@@ -219,9 +219,9 @@ static inline struct dw_dma *to_dw_dma(struct dma_device *ddev)
 /* LLI == Linked List Item; a.k.a. DMA block descriptor */
 struct dw_lli {
        /* values that are not changed by hardware */
-        dma_addr_t      sar;
+        u32             sar;
-        dma_addr_t      dar;
+        u32             dar;
-        dma_addr_t      llp;            /* chain to next lli */
+        u32             llp;            /* chain to next lli */
        u32             ctllo;
        /* values that may get written back: */
        u32             ctlhi;
diff --git a/drivers/dma/imx-dma.c b/drivers/dma/imx-dma.c
index fcfeb3cd8d31..5084975d793c 100644
--- a/drivers/dma/imx-dma.c
+++ b/drivers/dma/imx-dma.c
@@ -172,7 +172,8 @@ struct imxdma_engine {
        struct device_dma_parameters    dma_parms;
        struct dma_device               dma_device;
        void __iomem                    *base;
-        struct clk                      *dma_clk;
+        struct clk                      *dma_ahb;
+        struct clk                      *dma_ipg;
        spinlock_t                      lock;
        struct imx_dma_2d_config        slots_2d[IMX_DMA_2D_SLOTS];
        struct imxdma_channel           channel[IMX_DMA_CHANNELS];
@@ -976,10 +977,20 @@ static int __init imxdma_probe(struct platform_device *pdev)
                return 0;
        }
-        imxdma->dma_clk = clk_get(NULL, "dma");
+        imxdma->dma_ipg = devm_clk_get(&pdev->dev, "ipg");
-        if (IS_ERR(imxdma->dma_clk))
+        if (IS_ERR(imxdma->dma_ipg)) {
-                return PTR_ERR(imxdma->dma_clk);
+                ret = PTR_ERR(imxdma->dma_ipg);
-        clk_enable(imxdma->dma_clk);
+                goto err_clk;
+        }
+        imxdma->dma_ahb = devm_clk_get(&pdev->dev, "ahb");
+        if (IS_ERR(imxdma->dma_ahb)) {
+                ret = PTR_ERR(imxdma->dma_ahb);
+                goto err_clk;
+        }
+        clk_prepare_enable(imxdma->dma_ipg);
+        clk_prepare_enable(imxdma->dma_ahb);
        /* reset DMA module */
        imx_dmav1_writel(imxdma, DCR_DRST, DMA_DCR);
@@ -988,16 +999,14 @@ static int __init imxdma_probe(struct platform_device *pdev)
                ret = request_irq(MX1_DMA_INT, dma_irq_handler, 0, "DMA", imxdma);
                if (ret) {
                        dev_warn(imxdma->dev, "Can't register IRQ for DMA\n");
-                        kfree(imxdma);
+                        goto err_enable;
-                        return ret;
                }
                ret = request_irq(MX1_DMA_ERR, imxdma_err_handler, 0, "DMA", imxdma);
                if (ret) {
                        dev_warn(imxdma->dev, "Can't register ERRIRQ for DMA\n");
                        free_irq(MX1_DMA_INT, NULL);
-                        kfree(imxdma);
+                        goto err_enable;
-                        return ret;
                }
        }
@@ -1094,7 +1103,10 @@ err_init:
                free_irq(MX1_DMA_INT, NULL);
                free_irq(MX1_DMA_ERR, NULL);
        }
+err_enable:
+        clk_disable_unprepare(imxdma->dma_ipg);
+        clk_disable_unprepare(imxdma->dma_ahb);
+err_clk:
        kfree(imxdma);
        return ret;
 }
@@ -1114,7 +1126,9 @@ static int __exit imxdma_remove(struct platform_device *pdev)
                free_irq(MX1_DMA_ERR, NULL);
        }
-        kfree(imxdma);
+        clk_disable_unprepare(imxdma->dma_ipg);
+        clk_disable_unprepare(imxdma->dma_ahb);
+        kfree(imxdma);
        return 0;
 }
diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c
index fb4f4990f5eb..1dc2a4ad0026 100644
--- a/drivers/dma/imx-sdma.c
+++ b/drivers/dma/imx-sdma.c
@@ -815,8 +815,6 @@ static int sdma_request_channel(struct sdma_channel *sdmac)
        init_completion(&sdmac->done);
-        sdmac->buf_tail = 0;
        return 0;
 out:
@@ -927,6 +925,8 @@ static struct dma_async_tx_descriptor *sdma_prep_slave_sg(
        sdmac->flags = 0;
+        sdmac->buf_tail = 0;
        dev_dbg(sdma->dev, "setting up %d entries for channel %d.\n",
                        sg_len, channel);
@@ -1027,6 +1027,8 @@ static struct dma_async_tx_descriptor *sdma_prep_dma_cyclic(
        sdmac->status = DMA_IN_PROGRESS;
+        sdmac->buf_tail = 0;
        sdmac->flags |= IMX_DMA_SG_LOOP;
        sdmac->direction = direction;
        ret = sdma_load_context(sdmac);
diff --git a/drivers/dma/ipu/ipu_idmac.c b/drivers/dma/ipu/ipu_idmac.c
index 5ec72044ea4c..c7573e50aa14 100644
--- a/drivers/dma/ipu/ipu_idmac.c
+++ b/drivers/dma/ipu/ipu_idmac.c
@@ -1663,7 +1663,6 @@ static void __exit ipu_idmac_exit(struct ipu *ipu)
 static int __init ipu_probe(struct platform_device *pdev)
 {
-        struct ipu_platform_data *pdata = pdev->dev.platform_data;
        struct resource *mem_ipu, *mem_ic;
        int ret;
@@ -1671,7 +1670,7 @@ static int __init ipu_probe(struct platform_device *pdev)
        mem_ipu = platform_get_resource(pdev, IORESOURCE_MEM, 0);
        mem_ic  = platform_get_resource(pdev, IORESOURCE_MEM, 1);
-        if (!pdata || !mem_ipu || !mem_ic)
+        if (!mem_ipu || !mem_ic)
                return -EINVAL;
        ipu_data.dev = &pdev->dev;
@@ -1688,10 +1687,9 @@ static int __init ipu_probe(struct platform_device *pdev)
                goto err_noirq;
        ipu_data.irq_err = ret;
-        ipu_data.irq_base = pdata->irq_base;
-        dev_dbg(&pdev->dev, "fn irq %u, err irq %u, irq-base %u\n",
+        dev_dbg(&pdev->dev, "fn irq %u, err irq %u\n",
-                ipu_data.irq_fn, ipu_data.irq_err, ipu_data.irq_base);
+                ipu_data.irq_fn, ipu_data.irq_err);
        /* Remap IPU common registers */
        ipu_data.reg_ipu = ioremap(mem_ipu->start, resource_size(mem_ipu));
diff --git a/drivers/dma/ipu/ipu_irq.c b/drivers/dma/ipu/ipu_irq.c
index a71f55e72be9..fa95bcc3de1f 100644
--- a/drivers/dma/ipu/ipu_irq.c
+++ b/drivers/dma/ipu/ipu_irq.c
@@ -14,6 +14,7 @@
 #include <linux/clk.h>
 #include <linux/irq.h>
 #include <linux/io.h>
+#include <linux/module.h>
 #include <mach/ipu.h>
@@ -354,10 +355,12 @@ static struct irq_chip ipu_irq_chip = {
 /* Install the IRQ handler */
 int __init ipu_irq_attach_irq(struct ipu *ipu, struct platform_device *dev)
 {
-        struct ipu_platform_data *pdata = dev->dev.platform_data;
+        unsigned int irq, i;
-        unsigned int irq, irq_base, i;
+        int irq_base = irq_alloc_descs(-1, 0, CONFIG_MX3_IPU_IRQS,
+                                       numa_node_id());
-        irq_base = pdata->irq_base;
+        if (irq_base < 0)
+                return irq_base;
        for (i = 0; i < IPU_IRQ_NR_BANKS; i++)
                irq_bank[i].ipu = ipu;
@@ -387,15 +390,16 @@ int __init ipu_irq_attach_irq(struct ipu *ipu, struct platform_device *dev)
        irq_set_handler_data(ipu->irq_err, ipu);
        irq_set_chained_handler(ipu->irq_err, ipu_irq_err);
+        ipu->irq_base = irq_base;
        return 0;
 }
 void ipu_irq_detach_irq(struct ipu *ipu, struct platform_device *dev)
 {
-        struct ipu_platform_data *pdata = dev->dev.platform_data;
        unsigned int irq, irq_base;
-        irq_base = pdata->irq_base;
+        irq_base = ipu->irq_base;
        irq_set_chained_handler(ipu->irq_fn, NULL);
        irq_set_handler_data(ipu->irq_fn, NULL);
diff --git a/drivers/dma/mmp_tdma.c b/drivers/dma/mmp_tdma.c
new file mode 100644
index 000000000000..8a15cf2163dc
--- /dev/null
+++ b/drivers/dma/mmp_tdma.c
@@ -0,0 +1,610 @@
+/*
+ * Driver For Marvell Two-channel DMA Engine
+ *
+ * Copyright: Marvell International Ltd.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ */
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/dma-mapping.h>
+#include <linux/slab.h>
+#include <linux/dmaengine.h>
+#include <linux/platform_device.h>
+#include <linux/device.h>
+#include <mach/regs-icu.h>
+#include <mach/sram.h>
+#include "dmaengine.h"
+/*
+ * Two-Channel DMA registers
+ */
+#define TDBCR           0x00    /* Byte Count */
+#define TDSAR           0x10    /* Src Addr */
+#define TDDAR           0x20    /* Dst Addr */
+#define TDNDPR          0x30    /* Next Desc */
+#define TDCR            0x40    /* Control */
+#define TDCP            0x60    /* Priority*/
+#define TDCDPR          0x70    /* Current Desc */
+#define TDIMR           0x80    /* Int Mask */
+#define TDISR           0xa0    /* Int Status */
+/* Two-Channel DMA Control Register */
+#define TDCR_SSZ_8_BITS         (0x0 << 22)     /* Sample Size */
+#define TDCR_SSZ_12_BITS        (0x1 << 22)
+#define TDCR_SSZ_16_BITS        (0x2 << 22)
+#define TDCR_SSZ_20_BITS        (0x3 << 22)
+#define TDCR_SSZ_24_BITS        (0x4 << 22)
+#define TDCR_SSZ_32_BITS        (0x5 << 22)
+#define TDCR_SSZ_SHIFT          (0x1 << 22)
+#define TDCR_SSZ_MASK           (0x7 << 22)
+#define TDCR_SSPMOD             (0x1 << 21)     /* SSP MOD */
+#define TDCR_ABR                (0x1 << 20)     /* Channel Abort */
+#define TDCR_CDE                (0x1 << 17)     /* Close Desc Enable */
+#define TDCR_PACKMOD            (0x1 << 16)     /* Pack Mode (ADMA Only) */
+#define TDCR_CHANACT            (0x1 << 14)     /* Channel Active */
+#define TDCR_FETCHND            (0x1 << 13)     /* Fetch Next Desc */
+#define TDCR_CHANEN             (0x1 << 12)     /* Channel Enable */
+#define TDCR_INTMODE            (0x1 << 10)     /* Interrupt Mode */
+#define TDCR_CHAINMOD           (0x1 << 9)      /* Chain Mode */
+#define TDCR_BURSTSZ_MSK        (0x7 << 6)      /* Burst Size */
+#define TDCR_BURSTSZ_4B         (0x0 << 6)
+#define TDCR_BURSTSZ_8B         (0x1 << 6)
+#define TDCR_BURSTSZ_16B        (0x3 << 6)
+#define TDCR_BURSTSZ_32B        (0x6 << 6)
+#define TDCR_BURSTSZ_64B        (0x7 << 6)
+#define TDCR_BURSTSZ_SQU_32B    (0x7 << 6)
+#define TDCR_BURSTSZ_128B       (0x5 << 6)
+#define TDCR_DSTDIR_MSK         (0x3 << 4)      /* Dst Direction */
+#define TDCR_DSTDIR_ADDR_HOLD   (0x2 << 4)      /* Dst Addr Hold */
+#define TDCR_DSTDIR_ADDR_INC    (0x0 << 4)      /* Dst Addr Increment */
+#define TDCR_SRCDIR_MSK         (0x3 << 2)      /* Src Direction */
+#define TDCR_SRCDIR_ADDR_HOLD   (0x2 << 2)      /* Src Addr Hold */
+#define TDCR_SRCDIR_ADDR_INC    (0x0 << 2)      /* Src Addr Increment */
+#define TDCR_DSTDESCCONT        (0x1 << 1)
+#define TDCR_SRCDESTCONT        (0x1 << 0)
+/* Two-Channel DMA Int Mask Register */
+#define TDIMR_COMP              (0x1 << 0)
+/* Two-Channel DMA Int Status Register */
+#define TDISR_COMP              (0x1 << 0)
+/*
+ * Two-Channel DMA Descriptor Struct
+ * NOTE: desc's buf must be aligned to 16 bytes.
+ */
+struct mmp_tdma_desc {
+        u32 byte_cnt;
+        u32 src_addr;
+        u32 dst_addr;
+        u32 nxt_desc;
+};
+enum mmp_tdma_type {
+        MMP_AUD_TDMA = 0,
+        PXA910_SQU,
+};
+#define TDMA_ALIGNMENT          3
+#define TDMA_MAX_XFER_BYTES    SZ_64K
+struct mmp_tdma_chan {
+        struct device                   *dev;
+        struct dma_chan                 chan;
+        struct dma_async_tx_descriptor  desc;
+        struct tasklet_struct           tasklet;
+        struct mmp_tdma_desc            *desc_arr;
+        phys_addr_t                     desc_arr_phys;
+        int                             desc_num;
+        enum dma_transfer_direction     dir;
+        dma_addr_t                      dev_addr;
+        u32                             burst_sz;
+        enum dma_slave_buswidth         buswidth;
+        enum dma_status                 status;
+        int                             idx;
+        enum mmp_tdma_type              type;
+        int                             irq;
+        unsigned long                   reg_base;
+        size_t                          buf_len;
+        size_t                          period_len;
+        size_t                          pos;
+};
+#define TDMA_CHANNEL_NUM 2
+struct mmp_tdma_device {
+        struct device                   *dev;
+        void __iomem                    *base;
+        struct dma_device               device;
+        struct mmp_tdma_chan            *tdmac[TDMA_CHANNEL_NUM];
+        int                             irq;
+};
+#define to_mmp_tdma_chan(dchan) container_of(dchan, struct mmp_tdma_chan, chan)
+static void mmp_tdma_chan_set_desc(struct mmp_tdma_chan *tdmac, dma_addr_t phys)
+{
+        writel(phys, tdmac->reg_base + TDNDPR);
+        writel(readl(tdmac->reg_base + TDCR) | TDCR_FETCHND,
+                                        tdmac->reg_base + TDCR);
+}
+static void mmp_tdma_enable_chan(struct mmp_tdma_chan *tdmac)
+{
+        /* enable irq */
+        writel(TDIMR_COMP, tdmac->reg_base + TDIMR);
+        /* enable dma chan */
+        writel(readl(tdmac->reg_base + TDCR) | TDCR_CHANEN,
+                                        tdmac->reg_base + TDCR);
+        tdmac->status = DMA_IN_PROGRESS;
+}
+static void mmp_tdma_disable_chan(struct mmp_tdma_chan *tdmac)
+{
+        writel(readl(tdmac->reg_base + TDCR) & ~TDCR_CHANEN,
+                                        tdmac->reg_base + TDCR);
+        tdmac->status = DMA_SUCCESS;
+}
+static void mmp_tdma_resume_chan(struct mmp_tdma_chan *tdmac)
+{
+        writel(readl(tdmac->reg_base + TDCR) | TDCR_CHANEN,
+                                        tdmac->reg_base + TDCR);
+        tdmac->status = DMA_IN_PROGRESS;
+}
+static void mmp_tdma_pause_chan(struct mmp_tdma_chan *tdmac)
+{
+        writel(readl(tdmac->reg_base + TDCR) & ~TDCR_CHANEN,
+                                        tdmac->reg_base + TDCR);
+        tdmac->status = DMA_PAUSED;
+}
+static int mmp_tdma_config_chan(struct mmp_tdma_chan *tdmac)
+{
+        unsigned int tdcr;
+        mmp_tdma_disable_chan(tdmac);
+        if (tdmac->dir == DMA_MEM_TO_DEV)
+                tdcr = TDCR_DSTDIR_ADDR_HOLD | TDCR_SRCDIR_ADDR_INC;
+        else if (tdmac->dir == DMA_DEV_TO_MEM)
+                tdcr = TDCR_SRCDIR_ADDR_HOLD | TDCR_DSTDIR_ADDR_INC;
+        if (tdmac->type == MMP_AUD_TDMA) {
+                tdcr |= TDCR_PACKMOD;
+                switch (tdmac->burst_sz) {
+                case 4:
+                        tdcr |= TDCR_BURSTSZ_4B;
+                        break;
+                case 8:
+                        tdcr |= TDCR_BURSTSZ_8B;
+                        break;
+                case 16:
+                        tdcr |= TDCR_BURSTSZ_16B;
+                        break;
+                case 32:
+                        tdcr |= TDCR_BURSTSZ_32B;
+                        break;
+                case 64:
+                        tdcr |= TDCR_BURSTSZ_64B;
+                        break;
+                case 128:
+                        tdcr |= TDCR_BURSTSZ_128B;
+                        break;
+                default:
+                        dev_err(tdmac->dev, "mmp_tdma: unknown burst size.\n");
+                        return -EINVAL;
+                }
+                switch (tdmac->buswidth) {
+                case DMA_SLAVE_BUSWIDTH_1_BYTE:
+                        tdcr |= TDCR_SSZ_8_BITS;
+                        break;
+                case DMA_SLAVE_BUSWIDTH_2_BYTES:
+                        tdcr |= TDCR_SSZ_16_BITS;
+                        break;
+                case DMA_SLAVE_BUSWIDTH_4_BYTES:
+                        tdcr |= TDCR_SSZ_32_BITS;
+                        break;
+                default:
+                        dev_err(tdmac->dev, "mmp_tdma: unknown bus size.\n");
+                        return -EINVAL;
+                }
+        } else if (tdmac->type == PXA910_SQU) {
+                tdcr |= TDCR_BURSTSZ_SQU_32B;
+                tdcr |= TDCR_SSPMOD;
+        }
+        writel(tdcr, tdmac->reg_base + TDCR);
+        return 0;
+}
+static int mmp_tdma_clear_chan_irq(struct mmp_tdma_chan *tdmac)
+{
+        u32 reg = readl(tdmac->reg_base + TDISR);
+        if (reg & TDISR_COMP) {
+                /* clear irq */
+                reg &= ~TDISR_COMP;
+                writel(reg, tdmac->reg_base + TDISR);
+                return 0;
+        }
+        return -EAGAIN;
+}
+static irqreturn_t mmp_tdma_chan_handler(int irq, void *dev_id)
+{
+        struct mmp_tdma_chan *tdmac = dev_id;
+        if (mmp_tdma_clear_chan_irq(tdmac) == 0) {
+                tdmac->pos = (tdmac->pos + tdmac->period_len) % tdmac->buf_len;
+                tasklet_schedule(&tdmac->tasklet);
+                return IRQ_HANDLED;
+        } else
+                return IRQ_NONE;
+}
+static irqreturn_t mmp_tdma_int_handler(int irq, void *dev_id)
+{
+        struct mmp_tdma_device *tdev = dev_id;
+        int i, ret;
+        int irq_num = 0;
+        for (i = 0; i < TDMA_CHANNEL_NUM; i++) {
+                struct mmp_tdma_chan *tdmac = tdev->tdmac[i];
+                ret = mmp_tdma_chan_handler(irq, tdmac);
+                if (ret == IRQ_HANDLED)
+                        irq_num++;
+        }
+        if (irq_num)
+                return IRQ_HANDLED;
+        else
+                return IRQ_NONE;
+}
+static void dma_do_tasklet(unsigned long data)
+{
+        struct mmp_tdma_chan *tdmac = (struct mmp_tdma_chan *)data;
+        if (tdmac->desc.callback)
+                tdmac->desc.callback(tdmac->desc.callback_param);
+}
+static void mmp_tdma_free_descriptor(struct mmp_tdma_chan *tdmac)
+{
+        struct gen_pool *gpool;
+        int size = tdmac->desc_num * sizeof(struct mmp_tdma_desc);
+        gpool = sram_get_gpool("asram");
+        if (tdmac->desc_arr)
+                gen_pool_free(gpool, (unsigned long)tdmac->desc_arr,
+                                size);
+        tdmac->desc_arr = NULL;
+        return;
+}
+static dma_cookie_t mmp_tdma_tx_submit(struct dma_async_tx_descriptor *tx)
+{
+        struct mmp_tdma_chan *tdmac = to_mmp_tdma_chan(tx->chan);
+        mmp_tdma_chan_set_desc(tdmac, tdmac->desc_arr_phys);
+        return 0;
+}
+static int mmp_tdma_alloc_chan_resources(struct dma_chan *chan)
+{
+        struct mmp_tdma_chan *tdmac = to_mmp_tdma_chan(chan);
+        int ret;
+        dma_async_tx_descriptor_init(&tdmac->desc, chan);
+        tdmac->desc.tx_submit = mmp_tdma_tx_submit;
+        if (tdmac->irq) {
+                ret = devm_request_irq(tdmac->dev, tdmac->irq,
+                        mmp_tdma_chan_handler, IRQF_DISABLED, "tdma", tdmac);
+                if (ret)
+                        return ret;
+        }
+        return 1;
+}
+static void mmp_tdma_free_chan_resources(struct dma_chan *chan)
+{
+        struct mmp_tdma_chan *tdmac = to_mmp_tdma_chan(chan);
+        if (tdmac->irq)
+                devm_free_irq(tdmac->dev, tdmac->irq, tdmac);
+        mmp_tdma_free_descriptor(tdmac);
+        return;
+}
+struct mmp_tdma_desc *mmp_tdma_alloc_descriptor(struct mmp_tdma_chan *tdmac)
+{
+        struct gen_pool *gpool;
+        int size = tdmac->desc_num * sizeof(struct mmp_tdma_desc);
+        gpool = sram_get_gpool("asram");
+        if (!gpool)
+                return NULL;
+        tdmac->desc_arr = (void *)gen_pool_alloc(gpool, size);
+        if (!tdmac->desc_arr)
+                return NULL;
+        tdmac->desc_arr_phys = gen_pool_virt_to_phys(gpool,
+                        (unsigned long)tdmac->desc_arr);
+        return tdmac->desc_arr;
+}
+static struct dma_async_tx_descriptor *mmp_tdma_prep_dma_cyclic(
+                struct dma_chan *chan, dma_addr_t dma_addr, size_t buf_len,
+                size_t period_len, enum dma_transfer_direction direction,
+                void *context)
+{
+        struct mmp_tdma_chan *tdmac = to_mmp_tdma_chan(chan);
+        struct mmp_tdma_desc *desc;
+        int num_periods = buf_len / period_len;
+        int i = 0, buf = 0;
+        if (tdmac->status != DMA_SUCCESS)
+                return NULL;
+        if (period_len > TDMA_MAX_XFER_BYTES) {
+                dev_err(tdmac->dev,
+                                "maximum period size exceeded: %d > %d\n",
+                                period_len, TDMA_MAX_XFER_BYTES);
+                goto err_out;
+        }
+        tdmac->status = DMA_IN_PROGRESS;
+        tdmac->desc_num = num_periods;
+        desc = mmp_tdma_alloc_descriptor(tdmac);
+        if (!desc)
+                goto err_out;
+        while (buf < buf_len) {
+                desc = &tdmac->desc_arr[i];
+                if (i + 1 == num_periods)
+                        desc->nxt_desc = tdmac->desc_arr_phys;
+                else
+                        desc->nxt_desc = tdmac->desc_arr_phys +
+                                sizeof(*desc) * (i + 1);
+                if (direction == DMA_MEM_TO_DEV) {
+                        desc->src_addr = dma_addr;
+                        desc->dst_addr = tdmac->dev_addr;
+                } else {
+                        desc->src_addr = tdmac->dev_addr;
+                        desc->dst_addr = dma_addr;
+                }
+                desc->byte_cnt = period_len;
+                dma_addr += period_len;
+                buf += period_len;
+                i++;
+        }
+        tdmac->buf_len = buf_len;
+        tdmac->period_len = period_len;
+        tdmac->pos = 0;
+        return &tdmac->desc;
+err_out:
+        tdmac->status = DMA_ERROR;
+        return NULL;
+}
+static int mmp_tdma_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
+                unsigned long arg)
+{
+        struct mmp_tdma_chan *tdmac = to_mmp_tdma_chan(chan);
+        struct dma_slave_config *dmaengine_cfg = (void *)arg;
+        int ret = 0;
+        switch (cmd) {
+        case DMA_TERMINATE_ALL:
+                mmp_tdma_disable_chan(tdmac);
+                break;
+        case DMA_PAUSE:
+                mmp_tdma_pause_chan(tdmac);
+                break;
+        case DMA_RESUME:
+                mmp_tdma_resume_chan(tdmac);
+                break;
+        case DMA_SLAVE_CONFIG:
+                if (dmaengine_cfg->direction == DMA_DEV_TO_MEM) {
+                        tdmac->dev_addr = dmaengine_cfg->src_addr;
+                        tdmac->burst_sz = dmaengine_cfg->src_maxburst;
+                        tdmac->buswidth = dmaengine_cfg->src_addr_width;
+                } else {
+                        tdmac->dev_addr = dmaengine_cfg->dst_addr;
+                        tdmac->burst_sz = dmaengine_cfg->dst_maxburst;
+                        tdmac->buswidth = dmaengine_cfg->dst_addr_width;
+                }
+                tdmac->dir = dmaengine_cfg->direction;
+                return mmp_tdma_config_chan(tdmac);
+        default:
+                ret = -ENOSYS;
+        }
+        return ret;
+}
+static enum dma_status mmp_tdma_tx_status(struct dma_chan *chan,
+                        dma_cookie_t cookie, struct dma_tx_state *txstate)
+{
+        struct mmp_tdma_chan *tdmac = to_mmp_tdma_chan(chan);
+        dma_set_residue(txstate, tdmac->buf_len - tdmac->pos);
+        return tdmac->status;
+}
+static void mmp_tdma_issue_pending(struct dma_chan *chan)
+{
+        struct mmp_tdma_chan *tdmac = to_mmp_tdma_chan(chan);
+        mmp_tdma_enable_chan(tdmac);
+}
+static int __devexit mmp_tdma_remove(struct platform_device *pdev)
+{
+        struct mmp_tdma_device *tdev = platform_get_drvdata(pdev);
+        dma_async_device_unregister(&tdev->device);
+        return 0;
+}
+static int __devinit mmp_tdma_chan_init(struct mmp_tdma_device *tdev,
+                                                int idx, int irq, int type)
+{
+        struct mmp_tdma_chan *tdmac;
+        if (idx >= TDMA_CHANNEL_NUM) {
+                dev_err(tdev->dev, "too many channels for device!\n");
+                return -EINVAL;
+        }
+        /* alloc channel */
+        tdmac = devm_kzalloc(tdev->dev, sizeof(*tdmac), GFP_KERNEL);
+        if (!tdmac) {
+                dev_err(tdev->dev, "no free memory for DMA channels!\n");
+                return -ENOMEM;
+        }
+        if (irq)
+                tdmac->irq = irq + idx;
+        tdmac->dev         = tdev->dev;
+        tdmac->chan.device = &tdev->device;
+        tdmac->idx         = idx;
+        tdmac->type        = type;
+        tdmac->reg_base    = (unsigned long)tdev->base + idx * 4;
+        tdmac->status = DMA_SUCCESS;
+        tdev->tdmac[tdmac->idx] = tdmac;
+        tasklet_init(&tdmac->tasklet, dma_do_tasklet, (unsigned long)tdmac);
+        /* add the channel to tdma_chan list */
+        list_add_tail(&tdmac->chan.device_node,
+                        &tdev->device.channels);
+        return 0;
+}
+static int __devinit mmp_tdma_probe(struct platform_device *pdev)
+{
+        const struct platform_device_id *id = platform_get_device_id(pdev);
+        enum mmp_tdma_type type = id->driver_data;
+        struct mmp_tdma_device *tdev;
+        struct resource *iores;
+        int i, ret;
+        int irq = 0;
+        int chan_num = TDMA_CHANNEL_NUM;
+        /* always have couple channels */
+        tdev = devm_kzalloc(&pdev->dev, sizeof(*tdev), GFP_KERNEL);
+        if (!tdev)
+                return -ENOMEM;
+        tdev->dev = &pdev->dev;
+        iores = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
+        if (!iores)
+                return -EINVAL;
+        if (resource_size(iores) != chan_num)
+                tdev->irq = iores->start;
+        else
+                irq = iores->start;
+        iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+        if (!iores)
+                return -EINVAL;
+        tdev->base = devm_request_and_ioremap(&pdev->dev, iores);
+        if (!tdev->base)
+                return -EADDRNOTAVAIL;
+        if (tdev->irq) {
+                ret = devm_request_irq(&pdev->dev, tdev->irq,
+                        mmp_tdma_int_handler, IRQF_DISABLED, "tdma", tdev);
+                if (ret)
+                        return ret;
+        }
+        dma_cap_set(DMA_SLAVE, tdev->device.cap_mask);
+        dma_cap_set(DMA_CYCLIC, tdev->device.cap_mask);
+        INIT_LIST_HEAD(&tdev->device.channels);
+        /* initialize channel parameters */
+        for (i = 0; i < chan_num; i++) {
+                ret = mmp_tdma_chan_init(tdev, i, irq, type);
+                if (ret)
+                        return ret;
+        }
+        tdev->device.dev = &pdev->dev;
+        tdev->device.device_alloc_chan_resources =
+                                        mmp_tdma_alloc_chan_resources;
+        tdev->device.device_free_chan_resources =
+                                        mmp_tdma_free_chan_resources;
+        tdev->device.device_prep_dma_cyclic = mmp_tdma_prep_dma_cyclic;
+        tdev->device.device_tx_status = mmp_tdma_tx_status;
+        tdev->device.device_issue_pending = mmp_tdma_issue_pending;
+        tdev->device.device_control = mmp_tdma_control;
+        tdev->device.copy_align = TDMA_ALIGNMENT;
+        dma_set_mask(&pdev->dev, DMA_BIT_MASK(64));
+        platform_set_drvdata(pdev, tdev);
+        ret = dma_async_device_register(&tdev->device);
+        if (ret) {
+                dev_err(tdev->device.dev, "unable to register\n");
+                return ret;
+        }
+        dev_info(tdev->device.dev, "initialized\n");
+        return 0;
+}
+static const struct platform_device_id mmp_tdma_id_table[] = {
+        { "mmp-adma",   MMP_AUD_TDMA },
+        { "pxa910-squ", PXA910_SQU },
+        { },
+};
+static struct platform_driver mmp_tdma_driver = {
+        .driver         = {
+                .name   = "mmp-tdma",
+                .owner  = THIS_MODULE,
+        },
+        .id_table       = mmp_tdma_id_table,
+        .probe          = mmp_tdma_probe,
+        .remove         = __devexit_p(mmp_tdma_remove),
+};
+module_platform_driver(mmp_tdma_driver);
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("MMP Two-Channel DMA Driver");
+MODULE_ALIAS("platform:mmp-tdma");
+MODULE_AUTHOR("Leo Yan <leoy@marvell.com>");
+MODULE_AUTHOR("Zhangfei Gao <zhangfei.gao@marvell.com>");
diff --git a/drivers/dma/mxs-dma.c b/drivers/dma/mxs-dma.c
index c96ab15319f2..7f41b25805fa 100644
--- a/drivers/dma/mxs-dma.c
+++ b/drivers/dma/mxs-dma.c
@@ -29,7 +29,6 @@
 #include <linux/of_device.h>
 #include <asm/irq.h>
-#include <mach/mxs.h>
 #include "dmaengine.h"
@@ -201,6 +200,7 @@ int mxs_dma_is_apbh(struct dma_chan *chan)
        return dma_is_apbh(mxs_dma);
 }
+EXPORT_SYMBOL_GPL(mxs_dma_is_apbh);
 int mxs_dma_is_apbx(struct dma_chan *chan)
 {
@@ -209,6 +209,7 @@ int mxs_dma_is_apbx(struct dma_chan *chan)
        return !dma_is_apbh(mxs_dma);
 }
+EXPORT_SYMBOL_GPL(mxs_dma_is_apbx);
 static void mxs_dma_reset_chan(struct mxs_dma_chan *mxs_chan)
 {
diff --git a/drivers/dma/omap-dma.c b/drivers/dma/omap-dma.c
new file mode 100644
index 000000000000..ae0561826137
--- /dev/null
+++ b/drivers/dma/omap-dma.c
@@ -0,0 +1,669 @@
+/*
+ * OMAP DMAengine support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/dmaengine.h>
+#include <linux/dma-mapping.h>
+#include <linux/err.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/list.h>
+#include <linux/module.h>
+#include <linux/omap-dma.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+#include <linux/spinlock.h>
+#include "virt-dma.h"
+#include <plat/dma.h>
+struct omap_dmadev {
+        struct dma_device ddev;
+        spinlock_t lock;
+        struct tasklet_struct task;
+        struct list_head pending;
+};
+struct omap_chan {
+        struct virt_dma_chan vc;
+        struct list_head node;
+        struct dma_slave_config cfg;
+        unsigned dma_sig;
+        bool cyclic;
+        int dma_ch;
+        struct omap_desc *desc;
+        unsigned sgidx;
+};
+struct omap_sg {
+        dma_addr_t addr;
+        uint32_t en;            /* number of elements (24-bit) */
+        uint32_t fn;            /* number of frames (16-bit) */
+};
+struct omap_desc {
+        struct virt_dma_desc vd;
+        enum dma_transfer_direction dir;
+        dma_addr_t dev_addr;
+        int16_t fi;             /* for OMAP_DMA_SYNC_PACKET */
+        uint8_t es;             /* OMAP_DMA_DATA_TYPE_xxx */
+        uint8_t sync_mode;      /* OMAP_DMA_SYNC_xxx */
+        uint8_t sync_type;      /* OMAP_DMA_xxx_SYNC* */
+        uint8_t periph_port;    /* Peripheral port */
+        unsigned sglen;
+        struct omap_sg sg[0];
+};
+static const unsigned es_bytes[] = {
+        [OMAP_DMA_DATA_TYPE_S8] = 1,
+        [OMAP_DMA_DATA_TYPE_S16] = 2,
+        [OMAP_DMA_DATA_TYPE_S32] = 4,
+};
+static inline struct omap_dmadev *to_omap_dma_dev(struct dma_device *d)
+{
+        return container_of(d, struct omap_dmadev, ddev);
+}
+static inline struct omap_chan *to_omap_dma_chan(struct dma_chan *c)
+{
+        return container_of(c, struct omap_chan, vc.chan);
+}
+static inline struct omap_desc *to_omap_dma_desc(struct dma_async_tx_descriptor *t)
+{
+        return container_of(t, struct omap_desc, vd.tx);
+}
+static void omap_dma_desc_free(struct virt_dma_desc *vd)
+{
+        kfree(container_of(vd, struct omap_desc, vd));
+}
+static void omap_dma_start_sg(struct omap_chan *c, struct omap_desc *d,
+        unsigned idx)
+{
+        struct omap_sg *sg = d->sg + idx;
+        if (d->dir == DMA_DEV_TO_MEM)
+                omap_set_dma_dest_params(c->dma_ch, OMAP_DMA_PORT_EMIFF,
+                        OMAP_DMA_AMODE_POST_INC, sg->addr, 0, 0);
+        else
+                omap_set_dma_src_params(c->dma_ch, OMAP_DMA_PORT_EMIFF,
+                        OMAP_DMA_AMODE_POST_INC, sg->addr, 0, 0);
+        omap_set_dma_transfer_params(c->dma_ch, d->es, sg->en, sg->fn,
+                d->sync_mode, c->dma_sig, d->sync_type);
+        omap_start_dma(c->dma_ch);
+}
+static void omap_dma_start_desc(struct omap_chan *c)
+{
+        struct virt_dma_desc *vd = vchan_next_desc(&c->vc);
+        struct omap_desc *d;
+        if (!vd) {
+                c->desc = NULL;
+                return;
+        }
+        list_del(&vd->node);
+        c->desc = d = to_omap_dma_desc(&vd->tx);
+        c->sgidx = 0;
+        if (d->dir == DMA_DEV_TO_MEM)
+                omap_set_dma_src_params(c->dma_ch, d->periph_port,
+                        OMAP_DMA_AMODE_CONSTANT, d->dev_addr, 0, d->fi);
+        else
+                omap_set_dma_dest_params(c->dma_ch, d->periph_port,
+                        OMAP_DMA_AMODE_CONSTANT, d->dev_addr, 0, d->fi);
+        omap_dma_start_sg(c, d, 0);
+}
+static void omap_dma_callback(int ch, u16 status, void *data)
+{
+        struct omap_chan *c = data;
+        struct omap_desc *d;
+        unsigned long flags;
+        spin_lock_irqsave(&c->vc.lock, flags);
+        d = c->desc;
+        if (d) {
+                if (!c->cyclic) {
+                        if (++c->sgidx < d->sglen) {
+                                omap_dma_start_sg(c, d, c->sgidx);
+                        } else {
+                                omap_dma_start_desc(c);
+                                vchan_cookie_complete(&d->vd);
+                        }
+                } else {
+                        vchan_cyclic_callback(&d->vd);
+                }
+        }
+        spin_unlock_irqrestore(&c->vc.lock, flags);
+}
+/*
+ * This callback schedules all pending channels.  We could be more
+ * clever here by postponing allocation of the real DMA channels to
+ * this point, and freeing them when our virtual channel becomes idle.
+ *
+ * We would then need to deal with 'all channels in-use'
+ */
+static void omap_dma_sched(unsigned long data)
+{
+        struct omap_dmadev *d = (struct omap_dmadev *)data;
+        LIST_HEAD(head);
+        spin_lock_irq(&d->lock);
+        list_splice_tail_init(&d->pending, &head);
+        spin_unlock_irq(&d->lock);
+        while (!list_empty(&head)) {
+                struct omap_chan *c = list_first_entry(&head,
+                        struct omap_chan, node);
+                spin_lock_irq(&c->vc.lock);
+                list_del_init(&c->node);
+                omap_dma_start_desc(c);
+                spin_unlock_irq(&c->vc.lock);
+        }
+}
+static int omap_dma_alloc_chan_resources(struct dma_chan *chan)
+{
+        struct omap_chan *c = to_omap_dma_chan(chan);
+        dev_info(c->vc.chan.device->dev, "allocating channel for %u\n", c->dma_sig);
+        return omap_request_dma(c->dma_sig, "DMA engine",
+                omap_dma_callback, c, &c->dma_ch);
+}
+static void omap_dma_free_chan_resources(struct dma_chan *chan)
+{
+        struct omap_chan *c = to_omap_dma_chan(chan);
+        vchan_free_chan_resources(&c->vc);
+        omap_free_dma(c->dma_ch);
+        dev_info(c->vc.chan.device->dev, "freeing channel for %u\n", c->dma_sig);
+}
+static size_t omap_dma_sg_size(struct omap_sg *sg)
+{
+        return sg->en * sg->fn;
+}
+static size_t omap_dma_desc_size(struct omap_desc *d)
+{
+        unsigned i;
+        size_t size;
+        for (size = i = 0; i < d->sglen; i++)
+                size += omap_dma_sg_size(&d->sg[i]);
+        return size * es_bytes[d->es];
+}
+static size_t omap_dma_desc_size_pos(struct omap_desc *d, dma_addr_t addr)
+{
+        unsigned i;
+        size_t size, es_size = es_bytes[d->es];
+        for (size = i = 0; i < d->sglen; i++) {
+                size_t this_size = omap_dma_sg_size(&d->sg[i]) * es_size;
+                if (size)
+                        size += this_size;
+                else if (addr >= d->sg[i].addr &&
+                         addr < d->sg[i].addr + this_size)
+                        size += d->sg[i].addr + this_size - addr;
+        }
+        return size;
+}
+static enum dma_status omap_dma_tx_status(struct dma_chan *chan,
+        dma_cookie_t cookie, struct dma_tx_state *txstate)
+{
+        struct omap_chan *c = to_omap_dma_chan(chan);
+        struct virt_dma_desc *vd;
+        enum dma_status ret;
+        unsigned long flags;
+        ret = dma_cookie_status(chan, cookie, txstate);
+        if (ret == DMA_SUCCESS || !txstate)
+                return ret;
+        spin_lock_irqsave(&c->vc.lock, flags);
+        vd = vchan_find_desc(&c->vc, cookie);
+        if (vd) {
+                txstate->residue = omap_dma_desc_size(to_omap_dma_desc(&vd->tx));
+        } else if (c->desc && c->desc->vd.tx.cookie == cookie) {
+                struct omap_desc *d = c->desc;
+                dma_addr_t pos;
+                if (d->dir == DMA_MEM_TO_DEV)
+                        pos = omap_get_dma_src_pos(c->dma_ch);
+                else if (d->dir == DMA_DEV_TO_MEM)
+                        pos = omap_get_dma_dst_pos(c->dma_ch);
+                else
+                        pos = 0;
+                txstate->residue = omap_dma_desc_size_pos(d, pos);
+        } else {
+                txstate->residue = 0;
+        }
+        spin_unlock_irqrestore(&c->vc.lock, flags);
+        return ret;
+}
+static void omap_dma_issue_pending(struct dma_chan *chan)
+{
+        struct omap_chan *c = to_omap_dma_chan(chan);
+        unsigned long flags;
+        spin_lock_irqsave(&c->vc.lock, flags);
+        if (vchan_issue_pending(&c->vc) && !c->desc) {
+                struct omap_dmadev *d = to_omap_dma_dev(chan->device);
+                spin_lock(&d->lock);
+                if (list_empty(&c->node))
+                        list_add_tail(&c->node, &d->pending);
+                spin_unlock(&d->lock);
+                tasklet_schedule(&d->task);
+        }
+        spin_unlock_irqrestore(&c->vc.lock, flags);
+}
+static struct dma_async_tx_descriptor *omap_dma_prep_slave_sg(
+        struct dma_chan *chan, struct scatterlist *sgl, unsigned sglen,
+        enum dma_transfer_direction dir, unsigned long tx_flags, void *context)
+{
+        struct omap_chan *c = to_omap_dma_chan(chan);
+        enum dma_slave_buswidth dev_width;
+        struct scatterlist *sgent;
+        struct omap_desc *d;
+        dma_addr_t dev_addr;
+        unsigned i, j = 0, es, en, frame_bytes, sync_type;
+        u32 burst;
+        if (dir == DMA_DEV_TO_MEM) {
+                dev_addr = c->cfg.src_addr;
+                dev_width = c->cfg.src_addr_width;
+                burst = c->cfg.src_maxburst;
+                sync_type = OMAP_DMA_SRC_SYNC;
+        } else if (dir == DMA_MEM_TO_DEV) {
+                dev_addr = c->cfg.dst_addr;
+                dev_width = c->cfg.dst_addr_width;
+                burst = c->cfg.dst_maxburst;
+                sync_type = OMAP_DMA_DST_SYNC;
+        } else {
+                dev_err(chan->device->dev, "%s: bad direction?\n", __func__);
+                return NULL;
+        }
+        /* Bus width translates to the element size (ES) */
+        switch (dev_width) {
+        case DMA_SLAVE_BUSWIDTH_1_BYTE:
+                es = OMAP_DMA_DATA_TYPE_S8;
+                break;
+        case DMA_SLAVE_BUSWIDTH_2_BYTES:
+                es = OMAP_DMA_DATA_TYPE_S16;
+                break;
+        case DMA_SLAVE_BUSWIDTH_4_BYTES:
+                es = OMAP_DMA_DATA_TYPE_S32;
+                break;
+        default: /* not reached */
+                return NULL;
+        }
+        /* Now allocate and setup the descriptor. */
+        d = kzalloc(sizeof(*d) + sglen * sizeof(d->sg[0]), GFP_ATOMIC);
+        if (!d)
+                return NULL;
+        d->dir = dir;
+        d->dev_addr = dev_addr;
+        d->es = es;
+        d->sync_mode = OMAP_DMA_SYNC_FRAME;
+        d->sync_type = sync_type;
+        d->periph_port = OMAP_DMA_PORT_TIPB;
+        /*
+         * Build our scatterlist entries: each contains the address,
+         * the number of elements (EN) in each frame, and the number of
+         * frames (FN).  Number of bytes for this entry = ES * EN * FN.
+         *
+         * Burst size translates to number of elements with frame sync.
+         * Note: DMA engine defines burst to be the number of dev-width
+         * transfers.
+         */
+        en = burst;
+        frame_bytes = es_bytes[es] * en;
+        for_each_sg(sgl, sgent, sglen, i) {
+                d->sg[j].addr = sg_dma_address(sgent);
+                d->sg[j].en = en;
+                d->sg[j].fn = sg_dma_len(sgent) / frame_bytes;
+                j++;
+        }
+        d->sglen = j;
+        return vchan_tx_prep(&c->vc, &d->vd, tx_flags);
+}
+static struct dma_async_tx_descriptor *omap_dma_prep_dma_cyclic(
+        struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len,
+        size_t period_len, enum dma_transfer_direction dir, void *context)
+{
+        struct omap_chan *c = to_omap_dma_chan(chan);
+        enum dma_slave_buswidth dev_width;
+        struct omap_desc *d;
+        dma_addr_t dev_addr;
+        unsigned es, sync_type;
+        u32 burst;
+        if (dir == DMA_DEV_TO_MEM) {
+                dev_addr = c->cfg.src_addr;
+                dev_width = c->cfg.src_addr_width;
+                burst = c->cfg.src_maxburst;
+                sync_type = OMAP_DMA_SRC_SYNC;
+        } else if (dir == DMA_MEM_TO_DEV) {
+                dev_addr = c->cfg.dst_addr;
+                dev_width = c->cfg.dst_addr_width;
+                burst = c->cfg.dst_maxburst;
+                sync_type = OMAP_DMA_DST_SYNC;
+        } else {
+                dev_err(chan->device->dev, "%s: bad direction?\n", __func__);
+                return NULL;
+        }
+        /* Bus width translates to the element size (ES) */
+        switch (dev_width) {
+        case DMA_SLAVE_BUSWIDTH_1_BYTE:
+                es = OMAP_DMA_DATA_TYPE_S8;
+                break;
+        case DMA_SLAVE_BUSWIDTH_2_BYTES:
+                es = OMAP_DMA_DATA_TYPE_S16;
+                break;
+        case DMA_SLAVE_BUSWIDTH_4_BYTES:
+                es = OMAP_DMA_DATA_TYPE_S32;
+                break;
+        default: /* not reached */
+                return NULL;
+        }
+        /* Now allocate and setup the descriptor. */
+        d = kzalloc(sizeof(*d) + sizeof(d->sg[0]), GFP_ATOMIC);
+        if (!d)
+                return NULL;
+        d->dir = dir;
+        d->dev_addr = dev_addr;
+        d->fi = burst;
+        d->es = es;
+        d->sync_mode = OMAP_DMA_SYNC_PACKET;
+        d->sync_type = sync_type;
+        d->periph_port = OMAP_DMA_PORT_MPUI;
+        d->sg[0].addr = buf_addr;
+        d->sg[0].en = period_len / es_bytes[es];
+        d->sg[0].fn = buf_len / period_len;
+        d->sglen = 1;
+        if (!c->cyclic) {
+                c->cyclic = true;
+                omap_dma_link_lch(c->dma_ch, c->dma_ch);
+                omap_enable_dma_irq(c->dma_ch, OMAP_DMA_FRAME_IRQ);
+                omap_disable_dma_irq(c->dma_ch, OMAP_DMA_BLOCK_IRQ);
+        }
+        if (!cpu_class_is_omap1()) {
+                omap_set_dma_src_burst_mode(c->dma_ch, OMAP_DMA_DATA_BURST_16);
+                omap_set_dma_dest_burst_mode(c->dma_ch, OMAP_DMA_DATA_BURST_16);
+        }
+        return vchan_tx_prep(&c->vc, &d->vd, DMA_CTRL_ACK | DMA_PREP_INTERRUPT);
+}
+static int omap_dma_slave_config(struct omap_chan *c, struct dma_slave_config *cfg)
+{
+        if (cfg->src_addr_width == DMA_SLAVE_BUSWIDTH_8_BYTES ||
+            cfg->dst_addr_width == DMA_SLAVE_BUSWIDTH_8_BYTES)
+                return -EINVAL;
+        memcpy(&c->cfg, cfg, sizeof(c->cfg));
+        return 0;
+}
+static int omap_dma_terminate_all(struct omap_chan *c)
+{
+        struct omap_dmadev *d = to_omap_dma_dev(c->vc.chan.device);
+        unsigned long flags;
+        LIST_HEAD(head);
+        spin_lock_irqsave(&c->vc.lock, flags);
+        /* Prevent this channel being scheduled */
+        spin_lock(&d->lock);
+        list_del_init(&c->node);
+        spin_unlock(&d->lock);
+        /*
+         * Stop DMA activity: we assume the callback will not be called
+         * after omap_stop_dma() returns (even if it does, it will see
+         * c->desc is NULL and exit.)
+         */
+        if (c->desc) {
+                c->desc = NULL;
+                omap_stop_dma(c->dma_ch);
+        }
+        if (c->cyclic) {
+                c->cyclic = false;
+                omap_dma_unlink_lch(c->dma_ch, c->dma_ch);
+        }
+        vchan_get_all_descriptors(&c->vc, &head);
+        spin_unlock_irqrestore(&c->vc.lock, flags);
+        vchan_dma_desc_free_list(&c->vc, &head);
+        return 0;
+}
+static int omap_dma_pause(struct omap_chan *c)
+{
+        /* FIXME: not supported by platform private API */
+        return -EINVAL;
+}
+static int omap_dma_resume(struct omap_chan *c)
+{
+        /* FIXME: not supported by platform private API */
+        return -EINVAL;
+}
+static int omap_dma_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
+        unsigned long arg)
+{
+        struct omap_chan *c = to_omap_dma_chan(chan);
+        int ret;
+        switch (cmd) {
+        case DMA_SLAVE_CONFIG:
+                ret = omap_dma_slave_config(c, (struct dma_slave_config *)arg);
+                break;
+        case DMA_TERMINATE_ALL:
+                ret = omap_dma_terminate_all(c);
+                break;
+        case DMA_PAUSE:
+                ret = omap_dma_pause(c);
+                break;
+        case DMA_RESUME:
+                ret = omap_dma_resume(c);
+                break;
+        default:
+                ret = -ENXIO;
+                break;
+        }
+        return ret;
+}
+static int omap_dma_chan_init(struct omap_dmadev *od, int dma_sig)
+{
+        struct omap_chan *c;
+        c = kzalloc(sizeof(*c), GFP_KERNEL);
+        if (!c)
+                return -ENOMEM;
+        c->dma_sig = dma_sig;
+        c->vc.desc_free = omap_dma_desc_free;
+        vchan_init(&c->vc, &od->ddev);
+        INIT_LIST_HEAD(&c->node);
+        od->ddev.chancnt++;
+        return 0;
+}
+static void omap_dma_free(struct omap_dmadev *od)
+{
+        tasklet_kill(&od->task);
+        while (!list_empty(&od->ddev.channels)) {
+                struct omap_chan *c = list_first_entry(&od->ddev.channels,
+                        struct omap_chan, vc.chan.device_node);
+                list_del(&c->vc.chan.device_node);
+                tasklet_kill(&c->vc.task);
+                kfree(c);
+        }
+        kfree(od);
+}
+static int omap_dma_probe(struct platform_device *pdev)
+{
+        struct omap_dmadev *od;
+        int rc, i;
+        od = kzalloc(sizeof(*od), GFP_KERNEL);
+        if (!od)
+                return -ENOMEM;
+        dma_cap_set(DMA_SLAVE, od->ddev.cap_mask);
+        dma_cap_set(DMA_CYCLIC, od->ddev.cap_mask);
+        od->ddev.device_alloc_chan_resources = omap_dma_alloc_chan_resources;
+        od->ddev.device_free_chan_resources = omap_dma_free_chan_resources;
+        od->ddev.device_tx_status = omap_dma_tx_status;
+        od->ddev.device_issue_pending = omap_dma_issue_pending;
+        od->ddev.device_prep_slave_sg = omap_dma_prep_slave_sg;
+        od->ddev.device_prep_dma_cyclic = omap_dma_prep_dma_cyclic;
+        od->ddev.device_control = omap_dma_control;
+        od->ddev.dev = &pdev->dev;
+        INIT_LIST_HEAD(&od->ddev.channels);
+        INIT_LIST_HEAD(&od->pending);
+        spin_lock_init(&od->lock);
+        tasklet_init(&od->task, omap_dma_sched, (unsigned long)od);
+        for (i = 0; i < 127; i++) {
+                rc = omap_dma_chan_init(od, i);
+                if (rc) {
+                        omap_dma_free(od);
+                        return rc;
+                }
+        }
+        rc = dma_async_device_register(&od->ddev);
+        if (rc) {
+                pr_warn("OMAP-DMA: failed to register slave DMA engine device: %d\n",
+                        rc);
+                omap_dma_free(od);
+        } else {
+                platform_set_drvdata(pdev, od);
+        }
+        dev_info(&pdev->dev, "OMAP DMA engine driver\n");
+        return rc;
+}
+static int omap_dma_remove(struct platform_device *pdev)
+{
+        struct omap_dmadev *od = platform_get_drvdata(pdev);
+        dma_async_device_unregister(&od->ddev);
+        omap_dma_free(od);
+        return 0;
+}
+static struct platform_driver omap_dma_driver = {
+        .probe  = omap_dma_probe,
+        .remove = omap_dma_remove,
+        .driver = {
+                .name = "omap-dma-engine",
+                .owner = THIS_MODULE,
+        },
+};
+bool omap_dma_filter_fn(struct dma_chan *chan, void *param)
+{
+        if (chan->device->dev->driver == &omap_dma_driver.driver) {
+                struct omap_chan *c = to_omap_dma_chan(chan);
+                unsigned req = *(unsigned *)param;
+                return req == c->dma_sig;
+        }
+        return false;
+}
+EXPORT_SYMBOL_GPL(omap_dma_filter_fn);
+static struct platform_device *pdev;
+static const struct platform_device_info omap_dma_dev_info = {
+        .name = "omap-dma-engine",
+        .id = -1,
+        .dma_mask = DMA_BIT_MASK(32),
+};
+static int omap_dma_init(void)
+{
+        int rc = platform_driver_register(&omap_dma_driver);
+        if (rc == 0) {
+                pdev = platform_device_register_full(&omap_dma_dev_info);
+                if (IS_ERR(pdev)) {
+                        platform_driver_unregister(&omap_dma_driver);
+                        rc = PTR_ERR(pdev);
+                }
+        }
+        return rc;
+}
+subsys_initcall(omap_dma_init);
+static void __exit omap_dma_exit(void)
+{
+        platform_device_unregister(pdev);
+        platform_driver_unregister(&omap_dma_driver);
+}
+module_exit(omap_dma_exit);
+MODULE_AUTHOR("Russell King");
+MODULE_LICENSE("GPL");
diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c
index cbcc28e79be6..e4feba6b03c0 100644
--- a/drivers/dma/pl330.c
+++ b/drivers/dma/pl330.c
@@ -392,6 +392,8 @@ struct pl330_req {
        struct pl330_reqcfg *cfg;
        /* Pointer to first xfer in the request. */
        struct pl330_xfer *x;
+        /* Hook to attach to DMAC's list of reqs with due callback */
+        struct list_head rqd;
 };
 /*
@@ -461,8 +463,6 @@ struct _pl330_req {
        /* Number of bytes taken to setup MC for the req */
        u32 mc_len;
        struct pl330_req *r;
-        /* Hook to attach to DMAC's list of reqs with due callback */
-        struct list_head rqd;
 };
 /* ToBeDone for tasklet */
@@ -1683,7 +1683,7 @@ static void pl330_dotask(unsigned long data)
 /* Returns 1 if state was updated, 0 otherwise */
 static int pl330_update(const struct pl330_info *pi)
 {
-        struct _pl330_req *rqdone;
+        struct pl330_req *rqdone, *tmp;
        struct pl330_dmac *pl330;
        unsigned long flags;
        void __iomem *regs;
@@ -1750,7 +1750,10 @@ static int pl330_update(const struct pl330_info *pi)
                        if (active == -1) /* Aborted */
                                continue;
-                        rqdone = &thrd->req[active];
+                        /* Detach the req */
+                        rqdone = thrd->req[active].r;
+                        thrd->req[active].r = NULL;
                        mark_free(thrd, active);
                        /* Get going again ASAP */
@@ -1762,20 +1765,11 @@ static int pl330_update(const struct pl330_info *pi)
        }
        /* Now that we are in no hurry, do the callbacks */
-        while (!list_empty(&pl330->req_done)) {
+        list_for_each_entry_safe(rqdone, tmp, &pl330->req_done, rqd) {
-                struct pl330_req *r;
+                list_del(&rqdone->rqd);
-                rqdone = container_of(pl330->req_done.next,
-                                        struct _pl330_req, rqd);
-                list_del_init(&rqdone->rqd);
-                /* Detach the req */
-                r = rqdone->r;
-                rqdone->r = NULL;
                spin_unlock_irqrestore(&pl330->lock, flags);
-                _callback(r, PL330_ERR_NONE);
+                _callback(rqdone, PL330_ERR_NONE);
                spin_lock_irqsave(&pl330->lock, flags);
        }
@@ -2321,7 +2315,7 @@ static void pl330_tasklet(unsigned long data)
        /* Pick up ripe tomatoes */
        list_for_each_entry_safe(desc, _dt, &pch->work_list, node)
                if (desc->status == DONE) {
-                        if (pch->cyclic)
+                        if (!pch->cyclic)
                                dma_cookie_complete(&desc->txd);
                        list_move_tail(&desc->node, &list);
                }
@@ -2539,7 +2533,7 @@ static inline void _init_desc(struct dma_pl330_desc *desc)
 }
 /* Returns the number of descriptors added to the DMAC pool */
-int add_desc(struct dma_pl330_dmac *pdmac, gfp_t flg, int count)
+static int add_desc(struct dma_pl330_dmac *pdmac, gfp_t flg, int count)
 {
        struct dma_pl330_desc *desc;
        unsigned long flags;
diff --git a/drivers/dma/sa11x0-dma.c b/drivers/dma/sa11x0-dma.c
index ec78ccef9132..f5a73606217e 100644
--- a/drivers/dma/sa11x0-dma.c
+++ b/drivers/dma/sa11x0-dma.c
@@ -21,6 +21,8 @@
 #include <linux/slab.h>
 #include <linux/spinlock.h>
+#include "virt-dma.h"
 #define NR_PHY_CHAN     6
 #define DMA_ALIGN       3
 #define DMA_MAX_SIZE    0x1fff
@@ -72,12 +74,13 @@ struct sa11x0_dma_sg {
 };
 struct sa11x0_dma_desc {
-        struct dma_async_tx_descriptor tx;
+        struct virt_dma_desc    vd;
        u32                     ddar;
        size_t                  size;
+        unsigned                period;
+        bool                    cyclic;
-        /* maybe protected by c->lock */
-        struct list_head        node;
        unsigned                sglen;
        struct sa11x0_dma_sg    sg[0];
 };
@@ -85,15 +88,11 @@ struct sa11x0_dma_desc {
 struct sa11x0_dma_phy;
 struct sa11x0_dma_chan {
-        struct dma_chan         chan;
+        struct virt_dma_chan    vc;
-        spinlock_t              lock;
-        dma_cookie_t            lc;
-        /* protected by c->lock */
+        /* protected by c->vc.lock */
        struct sa11x0_dma_phy   *phy;
        enum dma_status         status;
-        struct list_head        desc_submitted;
-        struct list_head        desc_issued;
        /* protected by d->lock */
        struct list_head        node;
@@ -109,7 +108,7 @@ struct sa11x0_dma_phy {
        struct sa11x0_dma_chan  *vchan;
-        /* Protected by c->lock */
+        /* Protected by c->vc.lock */
        unsigned                sg_load;
        struct sa11x0_dma_desc  *txd_load;
        unsigned                sg_done;
@@ -127,13 +126,12 @@ struct sa11x0_dma_dev {
        spinlock_t              lock;
        struct tasklet_struct   task;
        struct list_head        chan_pending;
-        struct list_head        desc_complete;
        struct sa11x0_dma_phy   phy[NR_PHY_CHAN];
 };
 static struct sa11x0_dma_chan *to_sa11x0_dma_chan(struct dma_chan *chan)
 {
-        return container_of(chan, struct sa11x0_dma_chan, chan);
+        return container_of(chan, struct sa11x0_dma_chan, vc.chan);
 }
 static struct sa11x0_dma_dev *to_sa11x0_dma(struct dma_device *dmadev)
@@ -141,27 +139,26 @@ static struct sa11x0_dma_dev *to_sa11x0_dma(struct dma_device *dmadev)
        return container_of(dmadev, struct sa11x0_dma_dev, slave);
 }
-static struct sa11x0_dma_desc *to_sa11x0_dma_tx(struct dma_async_tx_descriptor *tx)
+static struct sa11x0_dma_desc *sa11x0_dma_next_desc(struct sa11x0_dma_chan *c)
 {
-        return container_of(tx, struct sa11x0_dma_desc, tx);
+        struct virt_dma_desc *vd = vchan_next_desc(&c->vc);
+        return vd ? container_of(vd, struct sa11x0_dma_desc, vd) : NULL;
 }
-static struct sa11x0_dma_desc *sa11x0_dma_next_desc(struct sa11x0_dma_chan *c)
+static void sa11x0_dma_free_desc(struct virt_dma_desc *vd)
 {
-        if (list_empty(&c->desc_issued))
+        kfree(container_of(vd, struct sa11x0_dma_desc, vd));
-                return NULL;
-        return list_first_entry(&c->desc_issued, struct sa11x0_dma_desc, node);
 }
 static void sa11x0_dma_start_desc(struct sa11x0_dma_phy *p, struct sa11x0_dma_desc *txd)
 {
-        list_del(&txd->node);
+        list_del(&txd->vd.node);
        p->txd_load = txd;
        p->sg_load = 0;
        dev_vdbg(p->dev->slave.dev, "pchan %u: txd %p[%x]: starting: DDAR:%x\n",
-                p->num, txd, txd->tx.cookie, txd->ddar);
+                p->num, &txd->vd, txd->vd.tx.cookie, txd->ddar);
 }
 static void noinline sa11x0_dma_start_sg(struct sa11x0_dma_phy *p,
@@ -183,19 +180,24 @@ static void noinline sa11x0_dma_start_sg(struct sa11x0_dma_phy *p,
                return;
        if (p->sg_load == txd->sglen) {
-                struct sa11x0_dma_desc *txn = sa11x0_dma_next_desc(c);
+                if (!txd->cyclic) {
+                        struct sa11x0_dma_desc *txn = sa11x0_dma_next_desc(c);
-                /*
+                        /*
-                 * We have reached the end of the current descriptor.
+                         * We have reached the end of the current descriptor.
-                 * Peek at the next descriptor, and if compatible with
+                         * Peek at the next descriptor, and if compatible with
-                 * the current, start processing it.
+                         * the current, start processing it.
-                 */
+                         */
-                if (txn && txn->ddar == txd->ddar) {
+                        if (txn && txn->ddar == txd->ddar) {
-                        txd = txn;
+                                txd = txn;
-                        sa11x0_dma_start_desc(p, txn);
+                                sa11x0_dma_start_desc(p, txn);
+                        } else {
+                                p->txd_load = NULL;
+                                return;
+                        }
                } else {
-                        p->txd_load = NULL;
+                        /* Cyclic: reset back to beginning */
-                        return;
+                        p->sg_load = 0;
                }
        }
@@ -229,21 +231,21 @@ static void noinline sa11x0_dma_complete(struct sa11x0_dma_phy *p,
        struct sa11x0_dma_desc *txd = p->txd_done;
        if (++p->sg_done == txd->sglen) {
-                struct sa11x0_dma_dev *d = p->dev;
+                if (!txd->cyclic) {
+                        vchan_cookie_complete(&txd->vd);
-                dev_vdbg(d->slave.dev, "pchan %u: txd %p[%x]: completed\n",
-                        p->num, p->txd_done, p->txd_done->tx.cookie);
-                c->lc = txd->tx.cookie;
-                spin_lock(&d->lock);
+                        p->sg_done = 0;
-                list_add_tail(&txd->node, &d->desc_complete);
+                        p->txd_done = p->txd_load;
-                spin_unlock(&d->lock);
-                p->sg_done = 0;
+                        if (!p->txd_done)
-                p->txd_done = p->txd_load;
+                                tasklet_schedule(&p->dev->task);
+                } else {
+                        if ((p->sg_done % txd->period) == 0)
+                                vchan_cyclic_callback(&txd->vd);
-                tasklet_schedule(&d->task);
+                        /* Cyclic: reset back to beginning */
+                        p->sg_done = 0;
+                }
        }
        sa11x0_dma_start_sg(p, c);
@@ -280,7 +282,7 @@ static irqreturn_t sa11x0_dma_irq(int irq, void *dev_id)
        if (c) {
                unsigned long flags;
-                spin_lock_irqsave(&c->lock, flags);
+                spin_lock_irqsave(&c->vc.lock, flags);
                /*
                 * Now that we're holding the lock, check that the vchan
                 * really is associated with this pchan before touching the
@@ -294,7 +296,7 @@ static irqreturn_t sa11x0_dma_irq(int irq, void *dev_id)
                        if (dcsr & DCSR_DONEB)
                                sa11x0_dma_complete(p, c);
                }
-                spin_unlock_irqrestore(&c->lock, flags);
+                spin_unlock_irqrestore(&c->vc.lock, flags);
        }
        return IRQ_HANDLED;
@@ -332,28 +334,15 @@ static void sa11x0_dma_tasklet(unsigned long arg)
        struct sa11x0_dma_dev *d = (struct sa11x0_dma_dev *)arg;
        struct sa11x0_dma_phy *p;
        struct sa11x0_dma_chan *c;
-        struct sa11x0_dma_desc *txd, *txn;
-        LIST_HEAD(head);
        unsigned pch, pch_alloc = 0;
        dev_dbg(d->slave.dev, "tasklet enter\n");
-        /* Get the completed tx descriptors */
+        list_for_each_entry(c, &d->slave.channels, vc.chan.device_node) {
-        spin_lock_irq(&d->lock);
+                spin_lock_irq(&c->vc.lock);
-        list_splice_init(&d->desc_complete, &head);
-        spin_unlock_irq(&d->lock);
-        list_for_each_entry(txd, &head, node) {
-                c = to_sa11x0_dma_chan(txd->tx.chan);
-                dev_dbg(d->slave.dev, "vchan %p: txd %p[%x] completed\n",
-                        c, txd, txd->tx.cookie);
-                spin_lock_irq(&c->lock);
                p = c->phy;
-                if (p) {
+                if (p && !p->txd_done) {
-                        if (!p->txd_done)
+                        sa11x0_dma_start_txd(c);
-                                sa11x0_dma_start_txd(c);
                        if (!p->txd_done) {
                                /* No current txd associated with this channel */
                                dev_dbg(d->slave.dev, "pchan %u: free\n", p->num);
@@ -363,7 +352,7 @@ static void sa11x0_dma_tasklet(unsigned long arg)
                                p->vchan = NULL;
                        }
                }
-                spin_unlock_irq(&c->lock);
+                spin_unlock_irq(&c->vc.lock);
        }
        spin_lock_irq(&d->lock);
@@ -380,7 +369,7 @@ static void sa11x0_dma_tasklet(unsigned long arg)
                        /* Mark this channel allocated */
                        p->vchan = c;
-                        dev_dbg(d->slave.dev, "pchan %u: alloc vchan %p\n", pch, c);
+                        dev_dbg(d->slave.dev, "pchan %u: alloc vchan %p\n", pch, &c->vc);
                }
        }
        spin_unlock_irq(&d->lock);
@@ -390,42 +379,18 @@ static void sa11x0_dma_tasklet(unsigned long arg)
                        p = &d->phy[pch];
                        c = p->vchan;
-                        spin_lock_irq(&c->lock);
+                        spin_lock_irq(&c->vc.lock);
                        c->phy = p;
                        sa11x0_dma_start_txd(c);
-                        spin_unlock_irq(&c->lock);
+                        spin_unlock_irq(&c->vc.lock);
                }
        }
-        /* Now free the completed tx descriptor, and call their callbacks */
-        list_for_each_entry_safe(txd, txn, &head, node) {
-                dma_async_tx_callback callback = txd->tx.callback;
-                void *callback_param = txd->tx.callback_param;
-                dev_dbg(d->slave.dev, "txd %p[%x]: callback and free\n",
-                        txd, txd->tx.cookie);
-                kfree(txd);
-                if (callback)
-                        callback(callback_param);
-        }
        dev_dbg(d->slave.dev, "tasklet exit\n");
 }
-static void sa11x0_dma_desc_free(struct sa11x0_dma_dev *d, struct list_head *head)
-{
-        struct sa11x0_dma_desc *txd, *txn;
-        list_for_each_entry_safe(txd, txn, head, node) {
-                dev_dbg(d->slave.dev, "txd %p: freeing\n", txd);
-                kfree(txd);
-        }
-}
 static int sa11x0_dma_alloc_chan_resources(struct dma_chan *chan)
 {
        return 0;
@@ -436,18 +401,12 @@ static void sa11x0_dma_free_chan_resources(struct dma_chan *chan)
        struct sa11x0_dma_chan *c = to_sa11x0_dma_chan(chan);
        struct sa11x0_dma_dev *d = to_sa11x0_dma(chan->device);
        unsigned long flags;
-        LIST_HEAD(head);
-        spin_lock_irqsave(&c->lock, flags);
+        spin_lock_irqsave(&d->lock, flags);
-        spin_lock(&d->lock);
        list_del_init(&c->node);
-        spin_unlock(&d->lock);
+        spin_unlock_irqrestore(&d->lock, flags);
-        list_splice_tail_init(&c->desc_submitted, &head);
-        list_splice_tail_init(&c->desc_issued, &head);
-        spin_unlock_irqrestore(&c->lock, flags);
-        sa11x0_dma_desc_free(d, &head);
+        vchan_free_chan_resources(&c->vc);
 }
 static dma_addr_t sa11x0_dma_pos(struct sa11x0_dma_phy *p)
@@ -472,33 +431,47 @@ static enum dma_status sa11x0_dma_tx_status(struct dma_chan *chan,
        struct sa11x0_dma_chan *c = to_sa11x0_dma_chan(chan);
        struct sa11x0_dma_dev *d = to_sa11x0_dma(chan->device);
        struct sa11x0_dma_phy *p;
-        struct sa11x0_dma_desc *txd;
+        struct virt_dma_desc *vd;
-        dma_cookie_t last_used, last_complete;
        unsigned long flags;
        enum dma_status ret;
-        size_t bytes = 0;
-        last_used = c->chan.cookie;
-        last_complete = c->lc;
-        ret = dma_async_is_complete(cookie, last_complete, last_used);
+        ret = dma_cookie_status(&c->vc.chan, cookie, state);
-        if (ret == DMA_SUCCESS) {
+        if (ret == DMA_SUCCESS)
-                dma_set_tx_state(state, last_complete, last_used, 0);
                return ret;
-        }
-        spin_lock_irqsave(&c->lock, flags);
+        if (!state)
+                return c->status;
+        spin_lock_irqsave(&c->vc.lock, flags);
        p = c->phy;
-        ret = c->status;
-        if (p) {
-                dma_addr_t addr = sa11x0_dma_pos(p);
-                dev_vdbg(d->slave.dev, "tx_status: addr:%x\n", addr);
+        /*
+         * If the cookie is on our issue queue, then the residue is
+         * its total size.
+         */
+        vd = vchan_find_desc(&c->vc, cookie);
+        if (vd) {
+                state->residue = container_of(vd, struct sa11x0_dma_desc, vd)->size;
+        } else if (!p) {
+                state->residue = 0;
+        } else {
+                struct sa11x0_dma_desc *txd;
+                size_t bytes = 0;
-                txd = p->txd_done;
+                if (p->txd_done && p->txd_done->vd.tx.cookie == cookie)
+                        txd = p->txd_done;
+                else if (p->txd_load && p->txd_load->vd.tx.cookie == cookie)
+                        txd = p->txd_load;
+                else
+                        txd = NULL;
+                ret = c->status;
                if (txd) {
+                        dma_addr_t addr = sa11x0_dma_pos(p);
                        unsigned i;
+                        dev_vdbg(d->slave.dev, "tx_status: addr:%x\n", addr);
                        for (i = 0; i < txd->sglen; i++) {
                                dev_vdbg(d->slave.dev, "tx_status: [%u] %x+%x\n",
                                        i, txd->sg[i].addr, txd->sg[i].len);
@@ -521,17 +494,11 @@ static enum dma_status sa11x0_dma_tx_status(struct dma_chan *chan,
                                bytes += txd->sg[i].len;
                        }
                }
-                if (txd != p->txd_load && p->txd_load)
+                state->residue = bytes;
-                        bytes += p->txd_load->size;
-        }
-        list_for_each_entry(txd, &c->desc_issued, node) {
-                bytes += txd->size;
        }
-        spin_unlock_irqrestore(&c->lock, flags);
+        spin_unlock_irqrestore(&c->vc.lock, flags);
-        dma_set_tx_state(state, last_complete, last_used, bytes);
-        dev_vdbg(d->slave.dev, "tx_status: bytes 0x%zx\n", bytes);
+        dev_vdbg(d->slave.dev, "tx_status: bytes 0x%zx\n", state->residue);
        return ret;
 }
@@ -547,40 +514,20 @@ static void sa11x0_dma_issue_pending(struct dma_chan *chan)
        struct sa11x0_dma_dev *d = to_sa11x0_dma(chan->device);
        unsigned long flags;
-        spin_lock_irqsave(&c->lock, flags);
+        spin_lock_irqsave(&c->vc.lock, flags);
-        list_splice_tail_init(&c->desc_submitted, &c->desc_issued);
+        if (vchan_issue_pending(&c->vc)) {
-        if (!list_empty(&c->desc_issued)) {
+                if (!c->phy) {
-                spin_lock(&d->lock);
+                        spin_lock(&d->lock);
-                if (!c->phy && list_empty(&c->node)) {
+                        if (list_empty(&c->node)) {
-                        list_add_tail(&c->node, &d->chan_pending);
+                                list_add_tail(&c->node, &d->chan_pending);
-                        tasklet_schedule(&d->task);
+                                tasklet_schedule(&d->task);
-                        dev_dbg(d->slave.dev, "vchan %p: issued\n", c);
+                                dev_dbg(d->slave.dev, "vchan %p: issued\n", &c->vc);
+                        }
+                        spin_unlock(&d->lock);
                }
-                spin_unlock(&d->lock);
        } else
-                dev_dbg(d->slave.dev, "vchan %p: nothing to issue\n", c);
+                dev_dbg(d->slave.dev, "vchan %p: nothing to issue\n", &c->vc);
-        spin_unlock_irqrestore(&c->lock, flags);
+        spin_unlock_irqrestore(&c->vc.lock, flags);
-}
-static dma_cookie_t sa11x0_dma_tx_submit(struct dma_async_tx_descriptor *tx)
-{
-        struct sa11x0_dma_chan *c = to_sa11x0_dma_chan(tx->chan);
-        struct sa11x0_dma_desc *txd = to_sa11x0_dma_tx(tx);
-        unsigned long flags;
-        spin_lock_irqsave(&c->lock, flags);
-        c->chan.cookie += 1;
-        if (c->chan.cookie < 0)
-                c->chan.cookie = 1;
-        txd->tx.cookie = c->chan.cookie;
-        list_add_tail(&txd->node, &c->desc_submitted);
-        spin_unlock_irqrestore(&c->lock, flags);
-        dev_dbg(tx->chan->device->dev, "vchan %p: txd %p[%x]: submitted\n",
-                c, txd, txd->tx.cookie);
-        return txd->tx.cookie;
 }
 static struct dma_async_tx_descriptor *sa11x0_dma_prep_slave_sg(
@@ -596,7 +543,7 @@ static struct dma_async_tx_descriptor *sa11x0_dma_prep_slave_sg(
        /* SA11x0 channels can only operate in their native direction */
        if (dir != (c->ddar & DDAR_RW ? DMA_DEV_TO_MEM : DMA_MEM_TO_DEV)) {
                dev_err(chan->device->dev, "vchan %p: bad DMA direction: DDAR:%08x dir:%u\n",
-                        c, c->ddar, dir);
+                        &c->vc, c->ddar, dir);
                return NULL;
        }
@@ -612,14 +559,14 @@ static struct dma_async_tx_descriptor *sa11x0_dma_prep_slave_sg(
                        j += DIV_ROUND_UP(len, DMA_MAX_SIZE & ~DMA_ALIGN) - 1;
                if (addr & DMA_ALIGN) {
                        dev_dbg(chan->device->dev, "vchan %p: bad buffer alignment: %08x\n",
-                                c, addr);
+                                &c->vc, addr);
                        return NULL;
                }
        }
        txd = kzalloc(sizeof(*txd) + j * sizeof(txd->sg[0]), GFP_ATOMIC);
        if (!txd) {
-                dev_dbg(chan->device->dev, "vchan %p: kzalloc failed\n", c);
+                dev_dbg(chan->device->dev, "vchan %p: kzalloc failed\n", &c->vc);
                return NULL;
        }
@@ -655,17 +602,73 @@ static struct dma_async_tx_descriptor *sa11x0_dma_prep_slave_sg(
                } while (len);
        }
-        dma_async_tx_descriptor_init(&txd->tx, &c->chan);
-        txd->tx.flags = flags;
-        txd->tx.tx_submit = sa11x0_dma_tx_submit;
        txd->ddar = c->ddar;
        txd->size = size;
        txd->sglen = j;
        dev_dbg(chan->device->dev, "vchan %p: txd %p: size %u nr %u\n",
-                c, txd, txd->size, txd->sglen);
+                &c->vc, &txd->vd, txd->size, txd->sglen);
-        return &txd->tx;
+        return vchan_tx_prep(&c->vc, &txd->vd, flags);
+}
+static struct dma_async_tx_descriptor *sa11x0_dma_prep_dma_cyclic(
+        struct dma_chan *chan, dma_addr_t addr, size_t size, size_t period,
+        enum dma_transfer_direction dir, void *context)
+{
+        struct sa11x0_dma_chan *c = to_sa11x0_dma_chan(chan);
+        struct sa11x0_dma_desc *txd;
+        unsigned i, j, k, sglen, sgperiod;
+        /* SA11x0 channels can only operate in their native direction */
+        if (dir != (c->ddar & DDAR_RW ? DMA_DEV_TO_MEM : DMA_MEM_TO_DEV)) {
+                dev_err(chan->device->dev, "vchan %p: bad DMA direction: DDAR:%08x dir:%u\n",
+                        &c->vc, c->ddar, dir);
+                return NULL;
+        }
+        sgperiod = DIV_ROUND_UP(period, DMA_MAX_SIZE & ~DMA_ALIGN);
+        sglen = size * sgperiod / period;
+        /* Do not allow zero-sized txds */
+        if (sglen == 0)
+                return NULL;
+        txd = kzalloc(sizeof(*txd) + sglen * sizeof(txd->sg[0]), GFP_ATOMIC);
+        if (!txd) {
+                dev_dbg(chan->device->dev, "vchan %p: kzalloc failed\n", &c->vc);
+                return NULL;
+        }
+        for (i = k = 0; i < size / period; i++) {
+                size_t tlen, len = period;
+                for (j = 0; j < sgperiod; j++, k++) {
+                        tlen = len;
+                        if (tlen > DMA_MAX_SIZE) {
+                                unsigned mult = DIV_ROUND_UP(tlen, DMA_MAX_SIZE & ~DMA_ALIGN);
+                                tlen = (tlen / mult) & ~DMA_ALIGN;
+                        }
+                        txd->sg[k].addr = addr;
+                        txd->sg[k].len = tlen;
+                        addr += tlen;
+                        len -= tlen;
+                }
+                WARN_ON(len != 0);
+        }
+        WARN_ON(k != sglen);
+        txd->ddar = c->ddar;
+        txd->size = size;
+        txd->sglen = sglen;
+        txd->cyclic = 1;
+        txd->period = sgperiod;
+        return vchan_tx_prep(&c->vc, &txd->vd, DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
 }
 static int sa11x0_dma_slave_config(struct sa11x0_dma_chan *c, struct dma_slave_config *cfg)
@@ -695,8 +698,8 @@ static int sa11x0_dma_slave_config(struct sa11x0_dma_chan *c, struct dma_slave_c
        if (maxburst == 8)
                ddar |= DDAR_BS;
-        dev_dbg(c->chan.device->dev, "vchan %p: dma_slave_config addr %x width %u burst %u\n",
+        dev_dbg(c->vc.chan.device->dev, "vchan %p: dma_slave_config addr %x width %u burst %u\n",
-                c, addr, width, maxburst);
+                &c->vc, addr, width, maxburst);
        c->ddar = ddar | (addr & 0xf0000000) | (addr & 0x003ffffc) << 6;
@@ -718,16 +721,13 @@ static int sa11x0_dma_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
                return sa11x0_dma_slave_config(c, (struct dma_slave_config *)arg);
        case DMA_TERMINATE_ALL:
-                dev_dbg(d->slave.dev, "vchan %p: terminate all\n", c);
+                dev_dbg(d->slave.dev, "vchan %p: terminate all\n", &c->vc);
                /* Clear the tx descriptor lists */
-                spin_lock_irqsave(&c->lock, flags);
+                spin_lock_irqsave(&c->vc.lock, flags);
-                list_splice_tail_init(&c->desc_submitted, &head);
+                vchan_get_all_descriptors(&c->vc, &head);
-                list_splice_tail_init(&c->desc_issued, &head);
                p = c->phy;
                if (p) {
-                        struct sa11x0_dma_desc *txd, *txn;
                        dev_dbg(d->slave.dev, "pchan %u: terminating\n", p->num);
                        /* vchan is assigned to a pchan - stop the channel */
                        writel(DCSR_RUN | DCSR_IE |
@@ -735,17 +735,13 @@ static int sa11x0_dma_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
                                DCSR_STRTB | DCSR_DONEB,
                                p->base + DMA_DCSR_C);
-                        list_for_each_entry_safe(txd, txn, &d->desc_complete, node)
-                                if (txd->tx.chan == &c->chan)
-                                        list_move(&txd->node, &head);
                        if (p->txd_load) {
                                if (p->txd_load != p->txd_done)
-                                        list_add_tail(&p->txd_load->node, &head);
+                                        list_add_tail(&p->txd_load->vd.node, &head);
                                p->txd_load = NULL;
                        }
                        if (p->txd_done) {
-                                list_add_tail(&p->txd_done->node, &head);
+                                list_add_tail(&p->txd_done->vd.node, &head);
                                p->txd_done = NULL;
                        }
                        c->phy = NULL;
@@ -754,14 +750,14 @@ static int sa11x0_dma_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
                        spin_unlock(&d->lock);
                        tasklet_schedule(&d->task);
                }
-                spin_unlock_irqrestore(&c->lock, flags);
+                spin_unlock_irqrestore(&c->vc.lock, flags);
-                sa11x0_dma_desc_free(d, &head);
+                vchan_dma_desc_free_list(&c->vc, &head);
                ret = 0;
                break;
        case DMA_PAUSE:
-                dev_dbg(d->slave.dev, "vchan %p: pause\n", c);
+                dev_dbg(d->slave.dev, "vchan %p: pause\n", &c->vc);
-                spin_lock_irqsave(&c->lock, flags);
+                spin_lock_irqsave(&c->vc.lock, flags);
                if (c->status == DMA_IN_PROGRESS) {
                        c->status = DMA_PAUSED;
@@ -774,26 +770,26 @@ static int sa11x0_dma_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
                                spin_unlock(&d->lock);
                        }
                }
-                spin_unlock_irqrestore(&c->lock, flags);
+                spin_unlock_irqrestore(&c->vc.lock, flags);
                ret = 0;
                break;
        case DMA_RESUME:
-                dev_dbg(d->slave.dev, "vchan %p: resume\n", c);
+                dev_dbg(d->slave.dev, "vchan %p: resume\n", &c->vc);
-                spin_lock_irqsave(&c->lock, flags);
+                spin_lock_irqsave(&c->vc.lock, flags);
                if (c->status == DMA_PAUSED) {
                        c->status = DMA_IN_PROGRESS;
                        p = c->phy;
                        if (p) {
                                writel(DCSR_RUN | DCSR_IE, p->base + DMA_DCSR_S);
-                        } else if (!list_empty(&c->desc_issued)) {
+                        } else if (!list_empty(&c->vc.desc_issued)) {
                                spin_lock(&d->lock);
                                list_add_tail(&c->node, &d->chan_pending);
                                spin_unlock(&d->lock);
                        }
                }
-                spin_unlock_irqrestore(&c->lock, flags);
+                spin_unlock_irqrestore(&c->vc.lock, flags);
                ret = 0;
                break;
@@ -853,15 +849,13 @@ static int __devinit sa11x0_dma_init_dmadev(struct dma_device *dmadev,
                        return -ENOMEM;
                }
-                c->chan.device = dmadev;
                c->status = DMA_IN_PROGRESS;
                c->ddar = chan_desc[i].ddar;
                c->name = chan_desc[i].name;
-                spin_lock_init(&c->lock);
-                INIT_LIST_HEAD(&c->desc_submitted);
-                INIT_LIST_HEAD(&c->desc_issued);
                INIT_LIST_HEAD(&c->node);
-                list_add_tail(&c->chan.device_node, &dmadev->channels);
+                c->vc.desc_free = sa11x0_dma_free_desc;
+                vchan_init(&c->vc, dmadev);
        }
        return dma_async_device_register(dmadev);
@@ -890,8 +884,9 @@ static void sa11x0_dma_free_channels(struct dma_device *dmadev)
 {
        struct sa11x0_dma_chan *c, *cn;
-        list_for_each_entry_safe(c, cn, &dmadev->channels, chan.device_node) {
+        list_for_each_entry_safe(c, cn, &dmadev->channels, vc.chan.device_node) {
-                list_del(&c->chan.device_node);
+                list_del(&c->vc.chan.device_node);
+                tasklet_kill(&c->vc.task);
                kfree(c);
        }
 }
@@ -915,7 +910,6 @@ static int __devinit sa11x0_dma_probe(struct platform_device *pdev)
        spin_lock_init(&d->lock);
        INIT_LIST_HEAD(&d->chan_pending);
-        INIT_LIST_HEAD(&d->desc_complete);
        d->base = ioremap(res->start, resource_size(res));
        if (!d->base) {
@@ -947,7 +941,9 @@ static int __devinit sa11x0_dma_probe(struct platform_device *pdev)
        }
        dma_cap_set(DMA_SLAVE, d->slave.cap_mask);
+        dma_cap_set(DMA_CYCLIC, d->slave.cap_mask);
        d->slave.device_prep_slave_sg = sa11x0_dma_prep_slave_sg;
+        d->slave.device_prep_dma_cyclic = sa11x0_dma_prep_dma_cyclic;
        ret = sa11x0_dma_init_dmadev(&d->slave, &pdev->dev);
        if (ret) {
                dev_warn(d->slave.dev, "failed to register slave async device: %d\n",
diff --git a/drivers/dma/sh/Makefile b/drivers/dma/sh/Makefile
new file mode 100644
index 000000000000..54ae9572b0ac
--- /dev/null
+++ b/drivers/dma/sh/Makefile
@@ -0,0 +1,2 @@
+obj-$(CONFIG_SH_DMAE) += shdma-base.o
+obj-$(CONFIG_SH_DMAE) += shdma.o
diff --git a/drivers/dma/sh/shdma-base.c b/drivers/dma/sh/shdma-base.c
new file mode 100644
index 000000000000..f4cd946d259d
--- /dev/null
+++ b/drivers/dma/sh/shdma-base.c
@@ -0,0 +1,943 @@
+/*
+ * Dmaengine driver base library for DMA controllers, found on SH-based SoCs
+ *
+ * extracted from shdma.c
+ *
+ * Copyright (C) 2011-2012 Guennadi Liakhovetski <g.liakhovetski@gmx.de>
+ * Copyright (C) 2009 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
+ * Copyright (C) 2009 Renesas Solutions, Inc. All rights reserved.
+ * Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved.
+ *
+ * This is free software; you can redistribute it and/or modify
+ * it under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ */
+#include <linux/delay.h>
+#include <linux/shdma-base.h>
+#include <linux/dmaengine.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/module.h>
+#include <linux/pm_runtime.h>
+#include <linux/slab.h>
+#include <linux/spinlock.h>
+#include "../dmaengine.h"
+/* DMA descriptor control */
+enum shdma_desc_status {
+        DESC_IDLE,
+        DESC_PREPARED,
+        DESC_SUBMITTED,
+        DESC_COMPLETED, /* completed, have to call callback */
+        DESC_WAITING,   /* callback called, waiting for ack / re-submit */
+};
+#define NR_DESCS_PER_CHANNEL 32
+#define to_shdma_chan(c) container_of(c, struct shdma_chan, dma_chan)
+#define to_shdma_dev(d) container_of(d, struct shdma_dev, dma_dev)
+/*
+ * For slave DMA we assume, that there is a finite number of DMA slaves in the
+ * system, and that each such slave can only use a finite number of channels.
+ * We use slave channel IDs to make sure, that no such slave channel ID is
+ * allocated more than once.
+ */
+static unsigned int slave_num = 256;
+module_param(slave_num, uint, 0444);
+/* A bitmask with slave_num bits */
+static unsigned long *shdma_slave_used;
+/* Called under spin_lock_irq(&schan->chan_lock") */
+static void shdma_chan_xfer_ld_queue(struct shdma_chan *schan)
+{
+        struct shdma_dev *sdev = to_shdma_dev(schan->dma_chan.device);
+        const struct shdma_ops *ops = sdev->ops;
+        struct shdma_desc *sdesc;
+        /* DMA work check */
+        if (ops->channel_busy(schan))
+                return;
+        /* Find the first not transferred descriptor */
+        list_for_each_entry(sdesc, &schan->ld_queue, node)
+                if (sdesc->mark == DESC_SUBMITTED) {
+                        ops->start_xfer(schan, sdesc);
+                        break;
+                }
+}
+static dma_cookie_t shdma_tx_submit(struct dma_async_tx_descriptor *tx)
+{
+        struct shdma_desc *chunk, *c, *desc =
+                container_of(tx, struct shdma_desc, async_tx),
+                *last = desc;
+        struct shdma_chan *schan = to_shdma_chan(tx->chan);
+        dma_async_tx_callback callback = tx->callback;
+        dma_cookie_t cookie;
+        bool power_up;
+        spin_lock_irq(&schan->chan_lock);
+        power_up = list_empty(&schan->ld_queue);
+        cookie = dma_cookie_assign(tx);
+        /* Mark all chunks of this descriptor as submitted, move to the queue */
+        list_for_each_entry_safe(chunk, c, desc->node.prev, node) {
+                /*
+                 * All chunks are on the global ld_free, so, we have to find
+                 * the end of the chain ourselves
+                 */
+                if (chunk != desc && (chunk->mark == DESC_IDLE ||
+                                      chunk->async_tx.cookie > 0 ||
+                                      chunk->async_tx.cookie == -EBUSY ||
+                                      &chunk->node == &schan->ld_free))
+                        break;
+                chunk->mark = DESC_SUBMITTED;
+                /* Callback goes to the last chunk */
+                chunk->async_tx.callback = NULL;
+                chunk->cookie = cookie;
+                list_move_tail(&chunk->node, &schan->ld_queue);
+                last = chunk;
+                dev_dbg(schan->dev, "submit #%d@%p on %d\n",
+                        tx->cookie, &last->async_tx, schan->id);
+        }
+        last->async_tx.callback = callback;
+        last->async_tx.callback_param = tx->callback_param;
+        if (power_up) {
+                int ret;
+                schan->pm_state = SHDMA_PM_BUSY;
+                ret = pm_runtime_get(schan->dev);
+                spin_unlock_irq(&schan->chan_lock);
+                if (ret < 0)
+                        dev_err(schan->dev, "%s(): GET = %d\n", __func__, ret);
+                pm_runtime_barrier(schan->dev);
+                spin_lock_irq(&schan->chan_lock);
+                /* Have we been reset, while waiting? */
+                if (schan->pm_state != SHDMA_PM_ESTABLISHED) {
+                        struct shdma_dev *sdev =
+                                to_shdma_dev(schan->dma_chan.device);
+                        const struct shdma_ops *ops = sdev->ops;
+                        dev_dbg(schan->dev, "Bring up channel %d\n",
+                                schan->id);
+                        /*
+                         * TODO: .xfer_setup() might fail on some platforms.
+                         * Make it int then, on error remove chunks from the
+                         * queue again
+                         */
+                        ops->setup_xfer(schan, schan->slave_id);
+                        if (schan->pm_state == SHDMA_PM_PENDING)
+                                shdma_chan_xfer_ld_queue(schan);
+                        schan->pm_state = SHDMA_PM_ESTABLISHED;
+                }
+        } else {
+                /*
+                 * Tell .device_issue_pending() not to run the queue, interrupts
+                 * will do it anyway
+                 */
+                schan->pm_state = SHDMA_PM_PENDING;
+        }
+        spin_unlock_irq(&schan->chan_lock);
+        return cookie;
+}
+/* Called with desc_lock held */
+static struct shdma_desc *shdma_get_desc(struct shdma_chan *schan)
+{
+        struct shdma_desc *sdesc;
+        list_for_each_entry(sdesc, &schan->ld_free, node)
+                if (sdesc->mark != DESC_PREPARED) {
+                        BUG_ON(sdesc->mark != DESC_IDLE);
+                        list_del(&sdesc->node);
+                        return sdesc;
+                }
+        return NULL;
+}
+static int shdma_setup_slave(struct shdma_chan *schan, int slave_id)
+{
+        struct shdma_dev *sdev = to_shdma_dev(schan->dma_chan.device);
+        const struct shdma_ops *ops = sdev->ops;
+        int ret;
+        if (slave_id < 0 || slave_id >= slave_num)
+                return -EINVAL;
+        if (test_and_set_bit(slave_id, shdma_slave_used))
+                return -EBUSY;
+        ret = ops->set_slave(schan, slave_id, false);
+        if (ret < 0) {
+                clear_bit(slave_id, shdma_slave_used);
+                return ret;
+        }
+        schan->slave_id = slave_id;
+        return 0;
+}
+/*
+ * This is the standard shdma filter function to be used as a replacement to the
+ * "old" method, using the .private pointer. If for some reason you allocate a
+ * channel without slave data, use something like ERR_PTR(-EINVAL) as a filter
+ * parameter. If this filter is used, the slave driver, after calling
+ * dma_request_channel(), will also have to call dmaengine_slave_config() with
+ * .slave_id, .direction, and either .src_addr or .dst_addr set.
+ * NOTE: this filter doesn't support multiple DMAC drivers with the DMA_SLAVE
+ * capability! If this becomes a requirement, hardware glue drivers, using this
+ * services would have to provide their own filters, which first would check
+ * the device driver, similar to how other DMAC drivers, e.g., sa11x0-dma.c, do
+ * this, and only then, in case of a match, call this common filter.
+ */
+bool shdma_chan_filter(struct dma_chan *chan, void *arg)
+{
+        struct shdma_chan *schan = to_shdma_chan(chan);
+        struct shdma_dev *sdev = to_shdma_dev(schan->dma_chan.device);
+        const struct shdma_ops *ops = sdev->ops;
+        int slave_id = (int)arg;
+        int ret;
+        if (slave_id < 0)
+                /* No slave requested - arbitrary channel */
+                return true;
+        if (slave_id >= slave_num)
+                return false;
+        ret = ops->set_slave(schan, slave_id, true);
+        if (ret < 0)
+                return false;
+        return true;
+}
+EXPORT_SYMBOL(shdma_chan_filter);
+static int shdma_alloc_chan_resources(struct dma_chan *chan)
+{
+        struct shdma_chan *schan = to_shdma_chan(chan);
+        struct shdma_dev *sdev = to_shdma_dev(schan->dma_chan.device);
+        const struct shdma_ops *ops = sdev->ops;
+        struct shdma_desc *desc;
+        struct shdma_slave *slave = chan->private;
+        int ret, i;
+        /*
+         * This relies on the guarantee from dmaengine that alloc_chan_resources
+         * never runs concurrently with itself or free_chan_resources.
+         */
+        if (slave) {
+                /* Legacy mode: .private is set in filter */
+                ret = shdma_setup_slave(schan, slave->slave_id);
+                if (ret < 0)
+                        goto esetslave;
+        } else {
+                schan->slave_id = -EINVAL;
+        }
+        schan->desc = kcalloc(NR_DESCS_PER_CHANNEL,
+                              sdev->desc_size, GFP_KERNEL);
+        if (!schan->desc) {
+                ret = -ENOMEM;
+                goto edescalloc;
+        }
+        schan->desc_num = NR_DESCS_PER_CHANNEL;
+        for (i = 0; i < NR_DESCS_PER_CHANNEL; i++) {
+                desc = ops->embedded_desc(schan->desc, i);
+                dma_async_tx_descriptor_init(&desc->async_tx,
+                                             &schan->dma_chan);
+                desc->async_tx.tx_submit = shdma_tx_submit;
+                desc->mark = DESC_IDLE;
+                list_add(&desc->node, &schan->ld_free);
+        }
+        return NR_DESCS_PER_CHANNEL;
+edescalloc:
+        if (slave)
+esetslave:
+                clear_bit(slave->slave_id, shdma_slave_used);
+        chan->private = NULL;
+        return ret;
+}
+static dma_async_tx_callback __ld_cleanup(struct shdma_chan *schan, bool all)
+{
+        struct shdma_desc *desc, *_desc;
+        /* Is the "exposed" head of a chain acked? */
+        bool head_acked = false;
+        dma_cookie_t cookie = 0;
+        dma_async_tx_callback callback = NULL;
+        void *param = NULL;
+        unsigned long flags;
+        spin_lock_irqsave(&schan->chan_lock, flags);
+        list_for_each_entry_safe(desc, _desc, &schan->ld_queue, node) {
+                struct dma_async_tx_descriptor *tx = &desc->async_tx;
+                BUG_ON(tx->cookie > 0 && tx->cookie != desc->cookie);
+                BUG_ON(desc->mark != DESC_SUBMITTED &&
+                       desc->mark != DESC_COMPLETED &&
+                       desc->mark != DESC_WAITING);
+                /*
+                 * queue is ordered, and we use this loop to (1) clean up all
+                 * completed descriptors, and to (2) update descriptor flags of
+                 * any chunks in a (partially) completed chain
+                 */
+                if (!all && desc->mark == DESC_SUBMITTED &&
+                    desc->cookie != cookie)
+                        break;
+                if (tx->cookie > 0)
+                        cookie = tx->cookie;
+                if (desc->mark == DESC_COMPLETED && desc->chunks == 1) {
+                        if (schan->dma_chan.completed_cookie != desc->cookie - 1)
+                                dev_dbg(schan->dev,
+                                        "Completing cookie %d, expected %d\n",
+                                        desc->cookie,
+                                        schan->dma_chan.completed_cookie + 1);
+                        schan->dma_chan.completed_cookie = desc->cookie;
+                }
+                /* Call callback on the last chunk */
+                if (desc->mark == DESC_COMPLETED && tx->callback) {
+                        desc->mark = DESC_WAITING;
+                        callback = tx->callback;
+                        param = tx->callback_param;
+                        dev_dbg(schan->dev, "descriptor #%d@%p on %d callback\n",
+                                tx->cookie, tx, schan->id);
+                        BUG_ON(desc->chunks != 1);
+                        break;
+                }
+                if (tx->cookie > 0 || tx->cookie == -EBUSY) {
+                        if (desc->mark == DESC_COMPLETED) {
+                                BUG_ON(tx->cookie < 0);
+                                desc->mark = DESC_WAITING;
+                        }
+                        head_acked = async_tx_test_ack(tx);
+                } else {
+                        switch (desc->mark) {
+                        case DESC_COMPLETED:
+                                desc->mark = DESC_WAITING;
+                                /* Fall through */
+                        case DESC_WAITING:
+                                if (head_acked)
+                                        async_tx_ack(&desc->async_tx);
+                        }
+                }
+                dev_dbg(schan->dev, "descriptor %p #%d completed.\n",
+                        tx, tx->cookie);
+                if (((desc->mark == DESC_COMPLETED ||
+                      desc->mark == DESC_WAITING) &&
+                     async_tx_test_ack(&desc->async_tx)) || all) {
+                        /* Remove from ld_queue list */
+                        desc->mark = DESC_IDLE;
+                        list_move(&desc->node, &schan->ld_free);
+                        if (list_empty(&schan->ld_queue)) {
+                                dev_dbg(schan->dev, "Bring down channel %d\n", schan->id);
+                                pm_runtime_put(schan->dev);
+                                schan->pm_state = SHDMA_PM_ESTABLISHED;
+                        }
+                }
+        }
+        if (all && !callback)
+                /*
+                 * Terminating and the loop completed normally: forgive
+                 * uncompleted cookies
+                 */
+                schan->dma_chan.completed_cookie = schan->dma_chan.cookie;
+        spin_unlock_irqrestore(&schan->chan_lock, flags);
+        if (callback)
+                callback(param);
+        return callback;
+}
+/*
+ * shdma_chan_ld_cleanup - Clean up link descriptors
+ *
+ * Clean up the ld_queue of DMA channel.
+ */
+static void shdma_chan_ld_cleanup(struct shdma_chan *schan, bool all)
+{
+        while (__ld_cleanup(schan, all))
+                ;
+}
+/*
+ * shdma_free_chan_resources - Free all resources of the channel.
+ */
+static void shdma_free_chan_resources(struct dma_chan *chan)
+{
+        struct shdma_chan *schan = to_shdma_chan(chan);
+        struct shdma_dev *sdev = to_shdma_dev(chan->device);
+        const struct shdma_ops *ops = sdev->ops;
+        LIST_HEAD(list);
+        /* Protect against ISR */
+        spin_lock_irq(&schan->chan_lock);
+        ops->halt_channel(schan);
+        spin_unlock_irq(&schan->chan_lock);
+        /* Now no new interrupts will occur */
+        /* Prepared and not submitted descriptors can still be on the queue */
+        if (!list_empty(&schan->ld_queue))
+                shdma_chan_ld_cleanup(schan, true);
+        if (schan->slave_id >= 0) {
+                /* The caller is holding dma_list_mutex */
+                clear_bit(schan->slave_id, shdma_slave_used);
+                chan->private = NULL;
+        }
+        spin_lock_irq(&schan->chan_lock);
+        list_splice_init(&schan->ld_free, &list);
+        schan->desc_num = 0;
+        spin_unlock_irq(&schan->chan_lock);
+        kfree(schan->desc);
+}
+/**
+ * shdma_add_desc - get, set up and return one transfer descriptor
+ * @schan:      DMA channel
+ * @flags:      DMA transfer flags
+ * @dst:        destination DMA address, incremented when direction equals
+ *              DMA_DEV_TO_MEM or DMA_MEM_TO_MEM
+ * @src:        source DMA address, incremented when direction equals
+ *              DMA_MEM_TO_DEV or DMA_MEM_TO_MEM
+ * @len:        DMA transfer length
+ * @first:      if NULL, set to the current descriptor and cookie set to -EBUSY
+ * @direction:  needed for slave DMA to decide which address to keep constant,
+ *              equals DMA_MEM_TO_MEM for MEMCPY
+ * Returns 0 or an error
+ * Locks: called with desc_lock held
+ */
+static struct shdma_desc *shdma_add_desc(struct shdma_chan *schan,
+        unsigned long flags, dma_addr_t *dst, dma_addr_t *src, size_t *len,
+        struct shdma_desc **first, enum dma_transfer_direction direction)
+{
+        struct shdma_dev *sdev = to_shdma_dev(schan->dma_chan.device);
+        const struct shdma_ops *ops = sdev->ops;
+        struct shdma_desc *new;
+        size_t copy_size = *len;
+        if (!copy_size)
+                return NULL;
+        /* Allocate the link descriptor from the free list */
+        new = shdma_get_desc(schan);
+        if (!new) {
+                dev_err(schan->dev, "No free link descriptor available\n");
+                return NULL;
+        }
+        ops->desc_setup(schan, new, *src, *dst, &copy_size);
+        if (!*first) {
+                /* First desc */
+                new->async_tx.cookie = -EBUSY;
+                *first = new;
+        } else {
+                /* Other desc - invisible to the user */
+                new->async_tx.cookie = -EINVAL;
+        }
+        dev_dbg(schan->dev,
+                "chaining (%u/%u)@%x -> %x with %p, cookie %d\n",
+                copy_size, *len, *src, *dst, &new->async_tx,
+                new->async_tx.cookie);
+        new->mark = DESC_PREPARED;
+        new->async_tx.flags = flags;
+        new->direction = direction;
+        new->partial = 0;
+        *len -= copy_size;
+        if (direction == DMA_MEM_TO_MEM || direction == DMA_MEM_TO_DEV)
+                *src += copy_size;
+        if (direction == DMA_MEM_TO_MEM || direction == DMA_DEV_TO_MEM)
+                *dst += copy_size;
+        return new;
+}
+/*
+ * shdma_prep_sg - prepare transfer descriptors from an SG list
+ *
+ * Common routine for public (MEMCPY) and slave DMA. The MEMCPY case is also
+ * converted to scatter-gather to guarantee consistent locking and a correct
+ * list manipulation. For slave DMA direction carries the usual meaning, and,
+ * logically, the SG list is RAM and the addr variable contains slave address,
+ * e.g., the FIFO I/O register. For MEMCPY direction equals DMA_MEM_TO_MEM
+ * and the SG list contains only one element and points at the source buffer.
+ */
+static struct dma_async_tx_descriptor *shdma_prep_sg(struct shdma_chan *schan,
+        struct scatterlist *sgl, unsigned int sg_len, dma_addr_t *addr,
+        enum dma_transfer_direction direction, unsigned long flags)
+{
+        struct scatterlist *sg;
+        struct shdma_desc *first = NULL, *new = NULL /* compiler... */;
+        LIST_HEAD(tx_list);
+        int chunks = 0;
+        unsigned long irq_flags;
+        int i;
+        for_each_sg(sgl, sg, sg_len, i)
+                chunks += DIV_ROUND_UP(sg_dma_len(sg), schan->max_xfer_len);
+        /* Have to lock the whole loop to protect against concurrent release */
+        spin_lock_irqsave(&schan->chan_lock, irq_flags);
+        /*
+         * Chaining:
+         * first descriptor is what user is dealing with in all API calls, its
+         *      cookie is at first set to -EBUSY, at tx-submit to a positive
+         *      number
+         * if more than one chunk is needed further chunks have cookie = -EINVAL
+         * the last chunk, if not equal to the first, has cookie = -ENOSPC
+         * all chunks are linked onto the tx_list head with their .node heads
+         *      only during this function, then they are immediately spliced
+         *      back onto the free list in form of a chain
+         */
+        for_each_sg(sgl, sg, sg_len, i) {
+                dma_addr_t sg_addr = sg_dma_address(sg);
+                size_t len = sg_dma_len(sg);
+                if (!len)
+                        goto err_get_desc;
+                do {
+                        dev_dbg(schan->dev, "Add SG #%d@%p[%d], dma %llx\n",
+                                i, sg, len, (unsigned long long)sg_addr);
+                        if (direction == DMA_DEV_TO_MEM)
+                                new = shdma_add_desc(schan, flags,
+                                                &sg_addr, addr, &len, &first,
+                                                direction);
+                        else
+                                new = shdma_add_desc(schan, flags,
+                                                addr, &sg_addr, &len, &first,
+                                                direction);
+                        if (!new)
+                                goto err_get_desc;
+                        new->chunks = chunks--;
+                        list_add_tail(&new->node, &tx_list);
+                } while (len);
+        }
+        if (new != first)
+                new->async_tx.cookie = -ENOSPC;
+        /* Put them back on the free list, so, they don't get lost */
+        list_splice_tail(&tx_list, &schan->ld_free);
+        spin_unlock_irqrestore(&schan->chan_lock, irq_flags);
+        return &first->async_tx;
+err_get_desc:
+        list_for_each_entry(new, &tx_list, node)
+                new->mark = DESC_IDLE;
+        list_splice(&tx_list, &schan->ld_free);
+        spin_unlock_irqrestore(&schan->chan_lock, irq_flags);
+        return NULL;
+}
+static struct dma_async_tx_descriptor *shdma_prep_memcpy(
+        struct dma_chan *chan, dma_addr_t dma_dest, dma_addr_t dma_src,
+        size_t len, unsigned long flags)
+{
+        struct shdma_chan *schan = to_shdma_chan(chan);
+        struct scatterlist sg;
+        if (!chan || !len)
+                return NULL;
+        BUG_ON(!schan->desc_num);
+        sg_init_table(&sg, 1);
+        sg_set_page(&sg, pfn_to_page(PFN_DOWN(dma_src)), len,
+                    offset_in_page(dma_src));
+        sg_dma_address(&sg) = dma_src;
+        sg_dma_len(&sg) = len;
+        return shdma_prep_sg(schan, &sg, 1, &dma_dest, DMA_MEM_TO_MEM, flags);
+}
+static struct dma_async_tx_descriptor *shdma_prep_slave_sg(
+        struct dma_chan *chan, struct scatterlist *sgl, unsigned int sg_len,
+        enum dma_transfer_direction direction, unsigned long flags, void *context)
+{
+        struct shdma_chan *schan = to_shdma_chan(chan);
+        struct shdma_dev *sdev = to_shdma_dev(schan->dma_chan.device);
+        const struct shdma_ops *ops = sdev->ops;
+        int slave_id = schan->slave_id;
+        dma_addr_t slave_addr;
+        if (!chan)
+                return NULL;
+        BUG_ON(!schan->desc_num);
+        /* Someone calling slave DMA on a generic channel? */
+        if (slave_id < 0 || !sg_len) {
+                dev_warn(schan->dev, "%s: bad parameter: len=%d, id=%d\n",
+                         __func__, sg_len, slave_id);
+                return NULL;
+        }
+        slave_addr = ops->slave_addr(schan);
+        return shdma_prep_sg(schan, sgl, sg_len, &slave_addr,
+                              direction, flags);
+}
+static int shdma_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
+                          unsigned long arg)
+{
+        struct shdma_chan *schan = to_shdma_chan(chan);
+        struct shdma_dev *sdev = to_shdma_dev(chan->device);
+        const struct shdma_ops *ops = sdev->ops;
+        struct dma_slave_config *config;
+        unsigned long flags;
+        int ret;
+        if (!chan)
+                return -EINVAL;
+        switch (cmd) {
+        case DMA_TERMINATE_ALL:
+                spin_lock_irqsave(&schan->chan_lock, flags);
+                ops->halt_channel(schan);
+                if (ops->get_partial && !list_empty(&schan->ld_queue)) {
+                        /* Record partial transfer */
+                        struct shdma_desc *desc = list_first_entry(&schan->ld_queue,
+                                                struct shdma_desc, node);
+                        desc->partial = ops->get_partial(schan, desc);
+                }
+                spin_unlock_irqrestore(&schan->chan_lock, flags);
+                shdma_chan_ld_cleanup(schan, true);
+                break;
+        case DMA_SLAVE_CONFIG:
+                /*
+                 * So far only .slave_id is used, but the slave drivers are
+                 * encouraged to also set a transfer direction and an address.
+                 */
+                if (!arg)
+                        return -EINVAL;
+                /*
+                 * We could lock this, but you shouldn't be configuring the
+                 * channel, while using it...
+                 */
+                config = (struct dma_slave_config *)arg;
+                ret = shdma_setup_slave(schan, config->slave_id);
+                if (ret < 0)
+                        return ret;
+                break;
+        default:
+                return -ENXIO;
+        }
+        return 0;
+}
+static void shdma_issue_pending(struct dma_chan *chan)
+{
+        struct shdma_chan *schan = to_shdma_chan(chan);
+        spin_lock_irq(&schan->chan_lock);
+        if (schan->pm_state == SHDMA_PM_ESTABLISHED)
+                shdma_chan_xfer_ld_queue(schan);
+        else
+                schan->pm_state = SHDMA_PM_PENDING;
+        spin_unlock_irq(&schan->chan_lock);
+}
+static enum dma_status shdma_tx_status(struct dma_chan *chan,
+                                        dma_cookie_t cookie,
+                                        struct dma_tx_state *txstate)
+{
+        struct shdma_chan *schan = to_shdma_chan(chan);
+        enum dma_status status;
+        unsigned long flags;
+        shdma_chan_ld_cleanup(schan, false);
+        spin_lock_irqsave(&schan->chan_lock, flags);
+        status = dma_cookie_status(chan, cookie, txstate);
+        /*
+         * If we don't find cookie on the queue, it has been aborted and we have
+         * to report error
+         */
+        if (status != DMA_SUCCESS) {
+                struct shdma_desc *sdesc;
+                status = DMA_ERROR;
+                list_for_each_entry(sdesc, &schan->ld_queue, node)
+                        if (sdesc->cookie == cookie) {
+                                status = DMA_IN_PROGRESS;
+                                break;
+                        }
+        }
+        spin_unlock_irqrestore(&schan->chan_lock, flags);
+        return status;
+}
+/* Called from error IRQ or NMI */
+bool shdma_reset(struct shdma_dev *sdev)
+{
+        const struct shdma_ops *ops = sdev->ops;
+        struct shdma_chan *schan;
+        unsigned int handled = 0;
+        int i;
+        /* Reset all channels */
+        shdma_for_each_chan(schan, sdev, i) {
+                struct shdma_desc *sdesc;
+                LIST_HEAD(dl);
+                if (!schan)
+                        continue;
+                spin_lock(&schan->chan_lock);
+                /* Stop the channel */
+                ops->halt_channel(schan);
+                list_splice_init(&schan->ld_queue, &dl);
+                if (!list_empty(&dl)) {
+                        dev_dbg(schan->dev, "Bring down channel %d\n", schan->id);
+                        pm_runtime_put(schan->dev);
+                }
+                schan->pm_state = SHDMA_PM_ESTABLISHED;
+                spin_unlock(&schan->chan_lock);
+                /* Complete all  */
+                list_for_each_entry(sdesc, &dl, node) {
+                        struct dma_async_tx_descriptor *tx = &sdesc->async_tx;
+                        sdesc->mark = DESC_IDLE;
+                        if (tx->callback)
+                                tx->callback(tx->callback_param);
+                }
+                spin_lock(&schan->chan_lock);
+                list_splice(&dl, &schan->ld_free);
+                spin_unlock(&schan->chan_lock);
+                handled++;
+        }
+        return !!handled;
+}
+EXPORT_SYMBOL(shdma_reset);
+static irqreturn_t chan_irq(int irq, void *dev)
+{
+        struct shdma_chan *schan = dev;
+        const struct shdma_ops *ops =
+                to_shdma_dev(schan->dma_chan.device)->ops;
+        irqreturn_t ret;
+        spin_lock(&schan->chan_lock);
+        ret = ops->chan_irq(schan, irq) ? IRQ_WAKE_THREAD : IRQ_NONE;
+        spin_unlock(&schan->chan_lock);
+        return ret;
+}
+static irqreturn_t chan_irqt(int irq, void *dev)
+{
+        struct shdma_chan *schan = dev;
+        const struct shdma_ops *ops =
+                to_shdma_dev(schan->dma_chan.device)->ops;
+        struct shdma_desc *sdesc;
+        spin_lock_irq(&schan->chan_lock);
+        list_for_each_entry(sdesc, &schan->ld_queue, node) {
+                if (sdesc->mark == DESC_SUBMITTED &&
+                    ops->desc_completed(schan, sdesc)) {
+                        dev_dbg(schan->dev, "done #%d@%p\n",
+                                sdesc->async_tx.cookie, &sdesc->async_tx);
+                        sdesc->mark = DESC_COMPLETED;
+                        break;
+                }
+        }
+        /* Next desc */
+        shdma_chan_xfer_ld_queue(schan);
+        spin_unlock_irq(&schan->chan_lock);
+        shdma_chan_ld_cleanup(schan, false);
+        return IRQ_HANDLED;
+}
+int shdma_request_irq(struct shdma_chan *schan, int irq,
+                           unsigned long flags, const char *name)
+{
+        int ret = request_threaded_irq(irq, chan_irq, chan_irqt,
+                                       flags, name, schan);
+        schan->irq = ret < 0 ? ret : irq;
+        return ret;
+}
+EXPORT_SYMBOL(shdma_request_irq);
+void shdma_free_irq(struct shdma_chan *schan)
+{
+        if (schan->irq >= 0)
+                free_irq(schan->irq, schan);
+}
+EXPORT_SYMBOL(shdma_free_irq);
+void shdma_chan_probe(struct shdma_dev *sdev,
+                           struct shdma_chan *schan, int id)
+{
+        schan->pm_state = SHDMA_PM_ESTABLISHED;
+        /* reference struct dma_device */
+        schan->dma_chan.device = &sdev->dma_dev;
+        dma_cookie_init(&schan->dma_chan);
+        schan->dev = sdev->dma_dev.dev;
+        schan->id = id;
+        if (!schan->max_xfer_len)
+                schan->max_xfer_len = PAGE_SIZE;
+        spin_lock_init(&schan->chan_lock);
+        /* Init descripter manage list */
+        INIT_LIST_HEAD(&schan->ld_queue);
+        INIT_LIST_HEAD(&schan->ld_free);
+        /* Add the channel to DMA device channel list */
+        list_add_tail(&schan->dma_chan.device_node,
+                        &sdev->dma_dev.channels);
+        sdev->schan[sdev->dma_dev.chancnt++] = schan;
+}
+EXPORT_SYMBOL(shdma_chan_probe);
+void shdma_chan_remove(struct shdma_chan *schan)
+{
+        list_del(&schan->dma_chan.device_node);
+}
+EXPORT_SYMBOL(shdma_chan_remove);
+int shdma_init(struct device *dev, struct shdma_dev *sdev,
+                    int chan_num)
+{
+        struct dma_device *dma_dev = &sdev->dma_dev;
+        /*
+         * Require all call-backs for now, they can trivially be made optional
+         * later as required
+         */
+        if (!sdev->ops ||
+            !sdev->desc_size ||
+            !sdev->ops->embedded_desc ||
+            !sdev->ops->start_xfer ||
+            !sdev->ops->setup_xfer ||
+            !sdev->ops->set_slave ||
+            !sdev->ops->desc_setup ||
+            !sdev->ops->slave_addr ||
+            !sdev->ops->channel_busy ||
+            !sdev->ops->halt_channel ||
+            !sdev->ops->desc_completed)
+                return -EINVAL;
+        sdev->schan = kcalloc(chan_num, sizeof(*sdev->schan), GFP_KERNEL);
+        if (!sdev->schan)
+                return -ENOMEM;
+        INIT_LIST_HEAD(&dma_dev->channels);
+        /* Common and MEMCPY operations */
+        dma_dev->device_alloc_chan_resources
+                = shdma_alloc_chan_resources;
+        dma_dev->device_free_chan_resources = shdma_free_chan_resources;
+        dma_dev->device_prep_dma_memcpy = shdma_prep_memcpy;
+        dma_dev->device_tx_status = shdma_tx_status;
+        dma_dev->device_issue_pending = shdma_issue_pending;
+        /* Compulsory for DMA_SLAVE fields */
+        dma_dev->device_prep_slave_sg = shdma_prep_slave_sg;
+        dma_dev->device_control = shdma_control;
+        dma_dev->dev = dev;
+        return 0;
+}
+EXPORT_SYMBOL(shdma_init);
+void shdma_cleanup(struct shdma_dev *sdev)
+{
+        kfree(sdev->schan);
+}
+EXPORT_SYMBOL(shdma_cleanup);
+static int __init shdma_enter(void)
+{
+        shdma_slave_used = kzalloc(DIV_ROUND_UP(slave_num, BITS_PER_LONG) *
+                                    sizeof(long), GFP_KERNEL);
+        if (!shdma_slave_used)
+                return -ENOMEM;
+        return 0;
+}
+module_init(shdma_enter);
+static void __exit shdma_exit(void)
+{
+        kfree(shdma_slave_used);
+}
+module_exit(shdma_exit);
+MODULE_LICENSE("GPL v2");
+MODULE_DESCRIPTION("SH-DMA driver base library");
+MODULE_AUTHOR("Guennadi Liakhovetski <g.liakhovetski@gmx.de>");
diff --git a/drivers/dma/sh/shdma.c b/drivers/dma/sh/shdma.c
new file mode 100644
index 000000000000..f41bcc5267fd
--- /dev/null
+++ b/drivers/dma/sh/shdma.c
@@ -0,0 +1,955 @@
+/*
+ * Renesas SuperH DMA Engine support
+ *
+ * base is drivers/dma/flsdma.c
+ *
+ * Copyright (C) 2011-2012 Guennadi Liakhovetski <g.liakhovetski@gmx.de>
+ * Copyright (C) 2009 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
+ * Copyright (C) 2009 Renesas Solutions, Inc. All rights reserved.
+ * Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved.
+ *
+ * This is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * - DMA of SuperH does not have Hardware DMA chain mode.
+ * - MAX DMA size is 16MB.
+ *
+ */
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/slab.h>
+#include <linux/interrupt.h>
+#include <linux/dmaengine.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+#include <linux/pm_runtime.h>
+#include <linux/sh_dma.h>
+#include <linux/notifier.h>
+#include <linux/kdebug.h>
+#include <linux/spinlock.h>
+#include <linux/rculist.h>
+#include "../dmaengine.h"
+#include "shdma.h"
+#define SH_DMAE_DRV_NAME "sh-dma-engine"
+/* Default MEMCPY transfer size = 2^2 = 4 bytes */
+#define LOG2_DEFAULT_XFER_SIZE  2
+#define SH_DMA_SLAVE_NUMBER 256
+#define SH_DMA_TCR_MAX (16 * 1024 * 1024 - 1)
+/*
+ * Used for write-side mutual exclusion for the global device list,
+ * read-side synchronization by way of RCU, and per-controller data.
+ */
+static DEFINE_SPINLOCK(sh_dmae_lock);
+static LIST_HEAD(sh_dmae_devices);
+static void chclr_write(struct sh_dmae_chan *sh_dc, u32 data)
+{
+        struct sh_dmae_device *shdev = to_sh_dev(sh_dc);
+        __raw_writel(data, shdev->chan_reg +
+                     shdev->pdata->channel[sh_dc->shdma_chan.id].chclr_offset);
+}
+static void sh_dmae_writel(struct sh_dmae_chan *sh_dc, u32 data, u32 reg)
+{
+        __raw_writel(data, sh_dc->base + reg / sizeof(u32));
+}
+static u32 sh_dmae_readl(struct sh_dmae_chan *sh_dc, u32 reg)
+{
+        return __raw_readl(sh_dc->base + reg / sizeof(u32));
+}
+static u16 dmaor_read(struct sh_dmae_device *shdev)
+{
+        u32 __iomem *addr = shdev->chan_reg + DMAOR / sizeof(u32);
+        if (shdev->pdata->dmaor_is_32bit)
+                return __raw_readl(addr);
+        else
+                return __raw_readw(addr);
+}
+static void dmaor_write(struct sh_dmae_device *shdev, u16 data)
+{
+        u32 __iomem *addr = shdev->chan_reg + DMAOR / sizeof(u32);
+        if (shdev->pdata->dmaor_is_32bit)
+                __raw_writel(data, addr);
+        else
+                __raw_writew(data, addr);
+}
+static void chcr_write(struct sh_dmae_chan *sh_dc, u32 data)
+{
+        struct sh_dmae_device *shdev = to_sh_dev(sh_dc);
+        __raw_writel(data, sh_dc->base + shdev->chcr_offset / sizeof(u32));
+}
+static u32 chcr_read(struct sh_dmae_chan *sh_dc)
+{
+        struct sh_dmae_device *shdev = to_sh_dev(sh_dc);
+        return __raw_readl(sh_dc->base + shdev->chcr_offset / sizeof(u32));
+}
+/*
+ * Reset DMA controller
+ *
+ * SH7780 has two DMAOR register
+ */
+static void sh_dmae_ctl_stop(struct sh_dmae_device *shdev)
+{
+        unsigned short dmaor;
+        unsigned long flags;
+        spin_lock_irqsave(&sh_dmae_lock, flags);
+        dmaor = dmaor_read(shdev);
+        dmaor_write(shdev, dmaor & ~(DMAOR_NMIF | DMAOR_AE | DMAOR_DME));
+        spin_unlock_irqrestore(&sh_dmae_lock, flags);
+}
+static int sh_dmae_rst(struct sh_dmae_device *shdev)
+{
+        unsigned short dmaor;
+        unsigned long flags;
+        spin_lock_irqsave(&sh_dmae_lock, flags);
+        dmaor = dmaor_read(shdev) & ~(DMAOR_NMIF | DMAOR_AE | DMAOR_DME);
+        if (shdev->pdata->chclr_present) {
+                int i;
+                for (i = 0; i < shdev->pdata->channel_num; i++) {
+                        struct sh_dmae_chan *sh_chan = shdev->chan[i];
+                        if (sh_chan)
+                                chclr_write(sh_chan, 0);
+                }
+        }
+        dmaor_write(shdev, dmaor | shdev->pdata->dmaor_init);
+        dmaor = dmaor_read(shdev);
+        spin_unlock_irqrestore(&sh_dmae_lock, flags);
+        if (dmaor & (DMAOR_AE | DMAOR_NMIF)) {
+                dev_warn(shdev->shdma_dev.dma_dev.dev, "Can't initialize DMAOR.\n");
+                return -EIO;
+        }
+        if (shdev->pdata->dmaor_init & ~dmaor)
+                dev_warn(shdev->shdma_dev.dma_dev.dev,
+                         "DMAOR=0x%x hasn't latched the initial value 0x%x.\n",
+                         dmaor, shdev->pdata->dmaor_init);
+        return 0;
+}
+static bool dmae_is_busy(struct sh_dmae_chan *sh_chan)
+{
+        u32 chcr = chcr_read(sh_chan);
+        if ((chcr & (CHCR_DE | CHCR_TE)) == CHCR_DE)
+                return true; /* working */
+        return false; /* waiting */
+}
+static unsigned int calc_xmit_shift(struct sh_dmae_chan *sh_chan, u32 chcr)
+{
+        struct sh_dmae_device *shdev = to_sh_dev(sh_chan);
+        struct sh_dmae_pdata *pdata = shdev->pdata;
+        int cnt = ((chcr & pdata->ts_low_mask) >> pdata->ts_low_shift) |
+                ((chcr & pdata->ts_high_mask) >> pdata->ts_high_shift);
+        if (cnt >= pdata->ts_shift_num)
+                cnt = 0;
+        return pdata->ts_shift[cnt];
+}
+static u32 log2size_to_chcr(struct sh_dmae_chan *sh_chan, int l2size)
+{
+        struct sh_dmae_device *shdev = to_sh_dev(sh_chan);
+        struct sh_dmae_pdata *pdata = shdev->pdata;
+        int i;
+        for (i = 0; i < pdata->ts_shift_num; i++)
+                if (pdata->ts_shift[i] == l2size)
+                        break;
+        if (i == pdata->ts_shift_num)
+                i = 0;
+        return ((i << pdata->ts_low_shift) & pdata->ts_low_mask) |
+                ((i << pdata->ts_high_shift) & pdata->ts_high_mask);
+}
+static void dmae_set_reg(struct sh_dmae_chan *sh_chan, struct sh_dmae_regs *hw)
+{
+        sh_dmae_writel(sh_chan, hw->sar, SAR);
+        sh_dmae_writel(sh_chan, hw->dar, DAR);
+        sh_dmae_writel(sh_chan, hw->tcr >> sh_chan->xmit_shift, TCR);
+}
+static void dmae_start(struct sh_dmae_chan *sh_chan)
+{
+        struct sh_dmae_device *shdev = to_sh_dev(sh_chan);
+        u32 chcr = chcr_read(sh_chan);
+        if (shdev->pdata->needs_tend_set)
+                sh_dmae_writel(sh_chan, 0xFFFFFFFF, TEND);
+        chcr |= CHCR_DE | shdev->chcr_ie_bit;
+        chcr_write(sh_chan, chcr & ~CHCR_TE);
+}
+static void dmae_init(struct sh_dmae_chan *sh_chan)
+{
+        /*
+         * Default configuration for dual address memory-memory transfer.
+         * 0x400 represents auto-request.
+         */
+        u32 chcr = DM_INC | SM_INC | 0x400 | log2size_to_chcr(sh_chan,
+                                                   LOG2_DEFAULT_XFER_SIZE);
+        sh_chan->xmit_shift = calc_xmit_shift(sh_chan, chcr);
+        chcr_write(sh_chan, chcr);
+}
+static int dmae_set_chcr(struct sh_dmae_chan *sh_chan, u32 val)
+{
+        /* If DMA is active, cannot set CHCR. TODO: remove this superfluous check */
+        if (dmae_is_busy(sh_chan))
+                return -EBUSY;
+        sh_chan->xmit_shift = calc_xmit_shift(sh_chan, val);
+        chcr_write(sh_chan, val);
+        return 0;
+}
+static int dmae_set_dmars(struct sh_dmae_chan *sh_chan, u16 val)
+{
+        struct sh_dmae_device *shdev = to_sh_dev(sh_chan);
+        struct sh_dmae_pdata *pdata = shdev->pdata;
+        const struct sh_dmae_channel *chan_pdata = &pdata->channel[sh_chan->shdma_chan.id];
+        u16 __iomem *addr = shdev->dmars;
+        unsigned int shift = chan_pdata->dmars_bit;
+        if (dmae_is_busy(sh_chan))
+                return -EBUSY;
+        if (pdata->no_dmars)
+                return 0;
+        /* in the case of a missing DMARS resource use first memory window */
+        if (!addr)
+                addr = (u16 __iomem *)shdev->chan_reg;
+        addr += chan_pdata->dmars / sizeof(u16);
+        __raw_writew((__raw_readw(addr) & (0xff00 >> shift)) | (val << shift),
+                     addr);
+        return 0;
+}
+static void sh_dmae_start_xfer(struct shdma_chan *schan,
+                               struct shdma_desc *sdesc)
+{
+        struct sh_dmae_chan *sh_chan = container_of(schan, struct sh_dmae_chan,
+                                                    shdma_chan);
+        struct sh_dmae_desc *sh_desc = container_of(sdesc,
+                                        struct sh_dmae_desc, shdma_desc);
+        dev_dbg(sh_chan->shdma_chan.dev, "Queue #%d to %d: %u@%x -> %x\n",
+                sdesc->async_tx.cookie, sh_chan->shdma_chan.id,
+                sh_desc->hw.tcr, sh_desc->hw.sar, sh_desc->hw.dar);
+        /* Get the ld start address from ld_queue */
+        dmae_set_reg(sh_chan, &sh_desc->hw);
+        dmae_start(sh_chan);
+}
+static bool sh_dmae_channel_busy(struct shdma_chan *schan)
+{
+        struct sh_dmae_chan *sh_chan = container_of(schan, struct sh_dmae_chan,
+                                                    shdma_chan);
+        return dmae_is_busy(sh_chan);
+}
+static void sh_dmae_setup_xfer(struct shdma_chan *schan,
+                               int slave_id)
+{
+        struct sh_dmae_chan *sh_chan = container_of(schan, struct sh_dmae_chan,
+                                                    shdma_chan);
+        if (slave_id >= 0) {
+                const struct sh_dmae_slave_config *cfg =
+                        sh_chan->config;
+                dmae_set_dmars(sh_chan, cfg->mid_rid);
+                dmae_set_chcr(sh_chan, cfg->chcr);
+        } else {
+                dmae_init(sh_chan);
+        }
+}
+static const struct sh_dmae_slave_config *dmae_find_slave(
+        struct sh_dmae_chan *sh_chan, int slave_id)
+{
+        struct sh_dmae_device *shdev = to_sh_dev(sh_chan);
+        struct sh_dmae_pdata *pdata = shdev->pdata;
+        const struct sh_dmae_slave_config *cfg;
+        int i;
+        if (slave_id >= SH_DMA_SLAVE_NUMBER)
+                return NULL;
+        for (i = 0, cfg = pdata->slave; i < pdata->slave_num; i++, cfg++)
+                if (cfg->slave_id == slave_id)
+                        return cfg;
+        return NULL;
+}
+static int sh_dmae_set_slave(struct shdma_chan *schan,
+                             int slave_id, bool try)
+{
+        struct sh_dmae_chan *sh_chan = container_of(schan, struct sh_dmae_chan,
+                                                    shdma_chan);
+        const struct sh_dmae_slave_config *cfg = dmae_find_slave(sh_chan, slave_id);
+        if (!cfg)
+                return -ENODEV;
+        if (!try)
+                sh_chan->config = cfg;
+        return 0;
+}
+static void dmae_halt(struct sh_dmae_chan *sh_chan)
+{
+        struct sh_dmae_device *shdev = to_sh_dev(sh_chan);
+        u32 chcr = chcr_read(sh_chan);
+        chcr &= ~(CHCR_DE | CHCR_TE | shdev->chcr_ie_bit);
+        chcr_write(sh_chan, chcr);
+}
+static int sh_dmae_desc_setup(struct shdma_chan *schan,
+                              struct shdma_desc *sdesc,
+                              dma_addr_t src, dma_addr_t dst, size_t *len)
+{
+        struct sh_dmae_desc *sh_desc = container_of(sdesc,
+                                        struct sh_dmae_desc, shdma_desc);
+        if (*len > schan->max_xfer_len)
+                *len = schan->max_xfer_len;
+        sh_desc->hw.sar = src;
+        sh_desc->hw.dar = dst;
+        sh_desc->hw.tcr = *len;
+        return 0;
+}
+static void sh_dmae_halt(struct shdma_chan *schan)
+{
+        struct sh_dmae_chan *sh_chan = container_of(schan, struct sh_dmae_chan,
+                                                    shdma_chan);
+        dmae_halt(sh_chan);
+}
+static bool sh_dmae_chan_irq(struct shdma_chan *schan, int irq)
+{
+        struct sh_dmae_chan *sh_chan = container_of(schan, struct sh_dmae_chan,
+                                                    shdma_chan);
+        if (!(chcr_read(sh_chan) & CHCR_TE))
+                return false;
+        /* DMA stop */
+        dmae_halt(sh_chan);
+        return true;
+}
+static size_t sh_dmae_get_partial(struct shdma_chan *schan,
+                                  struct shdma_desc *sdesc)
+{
+        struct sh_dmae_chan *sh_chan = container_of(schan, struct sh_dmae_chan,
+                                                    shdma_chan);
+        struct sh_dmae_desc *sh_desc = container_of(sdesc,
+                                        struct sh_dmae_desc, shdma_desc);
+        return (sh_desc->hw.tcr - sh_dmae_readl(sh_chan, TCR)) <<
+                sh_chan->xmit_shift;
+}
+/* Called from error IRQ or NMI */
+static bool sh_dmae_reset(struct sh_dmae_device *shdev)
+{
+        bool ret;
+        /* halt the dma controller */
+        sh_dmae_ctl_stop(shdev);
+        /* We cannot detect, which channel caused the error, have to reset all */
+        ret = shdma_reset(&shdev->shdma_dev);
+        sh_dmae_rst(shdev);
+        return ret;
+}
+static irqreturn_t sh_dmae_err(int irq, void *data)
+{
+        struct sh_dmae_device *shdev = data;
+        if (!(dmaor_read(shdev) & DMAOR_AE))
+                return IRQ_NONE;
+        sh_dmae_reset(shdev);
+        return IRQ_HANDLED;
+}
+static bool sh_dmae_desc_completed(struct shdma_chan *schan,
+                                   struct shdma_desc *sdesc)
+{
+        struct sh_dmae_chan *sh_chan = container_of(schan,
+                                        struct sh_dmae_chan, shdma_chan);
+        struct sh_dmae_desc *sh_desc = container_of(sdesc,
+                                        struct sh_dmae_desc, shdma_desc);
+        u32 sar_buf = sh_dmae_readl(sh_chan, SAR);
+        u32 dar_buf = sh_dmae_readl(sh_chan, DAR);
+        return  (sdesc->direction == DMA_DEV_TO_MEM &&
+                 (sh_desc->hw.dar + sh_desc->hw.tcr) == dar_buf) ||
+                (sdesc->direction != DMA_DEV_TO_MEM &&
+                 (sh_desc->hw.sar + sh_desc->hw.tcr) == sar_buf);
+}
+static bool sh_dmae_nmi_notify(struct sh_dmae_device *shdev)
+{
+        /* Fast path out if NMIF is not asserted for this controller */
+        if ((dmaor_read(shdev) & DMAOR_NMIF) == 0)
+                return false;
+        return sh_dmae_reset(shdev);
+}
+static int sh_dmae_nmi_handler(struct notifier_block *self,
+                               unsigned long cmd, void *data)
+{
+        struct sh_dmae_device *shdev;
+        int ret = NOTIFY_DONE;
+        bool triggered;
+        /*
+         * Only concern ourselves with NMI events.
+         *
+         * Normally we would check the die chain value, but as this needs
+         * to be architecture independent, check for NMI context instead.
+         */
+        if (!in_nmi())
+                return NOTIFY_DONE;
+        rcu_read_lock();
+        list_for_each_entry_rcu(shdev, &sh_dmae_devices, node) {
+                /*
+                 * Only stop if one of the controllers has NMIF asserted,
+                 * we do not want to interfere with regular address error
+                 * handling or NMI events that don't concern the DMACs.
+                 */
+                triggered = sh_dmae_nmi_notify(shdev);
+                if (triggered == true)
+                        ret = NOTIFY_OK;
+        }
+        rcu_read_unlock();
+        return ret;
+}
+static struct notifier_block sh_dmae_nmi_notifier __read_mostly = {
+        .notifier_call  = sh_dmae_nmi_handler,
+        /* Run before NMI debug handler and KGDB */
+        .priority       = 1,
+};
+static int __devinit sh_dmae_chan_probe(struct sh_dmae_device *shdev, int id,
+                                        int irq, unsigned long flags)
+{
+        const struct sh_dmae_channel *chan_pdata = &shdev->pdata->channel[id];
+        struct shdma_dev *sdev = &shdev->shdma_dev;
+        struct platform_device *pdev = to_platform_device(sdev->dma_dev.dev);
+        struct sh_dmae_chan *sh_chan;
+        struct shdma_chan *schan;
+        int err;
+        sh_chan = kzalloc(sizeof(struct sh_dmae_chan), GFP_KERNEL);
+        if (!sh_chan) {
+                dev_err(sdev->dma_dev.dev,
+                        "No free memory for allocating dma channels!\n");
+                return -ENOMEM;
+        }
+        schan = &sh_chan->shdma_chan;
+        schan->max_xfer_len = SH_DMA_TCR_MAX + 1;
+        shdma_chan_probe(sdev, schan, id);
+        sh_chan->base = shdev->chan_reg + chan_pdata->offset / sizeof(u32);
+        /* set up channel irq */
+        if (pdev->id >= 0)
+                snprintf(sh_chan->dev_id, sizeof(sh_chan->dev_id),
+                         "sh-dmae%d.%d", pdev->id, id);
+        else
+                snprintf(sh_chan->dev_id, sizeof(sh_chan->dev_id),
+                         "sh-dma%d", id);
+        err = shdma_request_irq(schan, irq, flags, sh_chan->dev_id);
+        if (err) {
+                dev_err(sdev->dma_dev.dev,
+                        "DMA channel %d request_irq error %d\n",
+                        id, err);
+                goto err_no_irq;
+        }
+        shdev->chan[id] = sh_chan;
+        return 0;
+err_no_irq:
+        /* remove from dmaengine device node */
+        shdma_chan_remove(schan);
+        kfree(sh_chan);
+        return err;
+}
+static void sh_dmae_chan_remove(struct sh_dmae_device *shdev)
+{
+        struct dma_device *dma_dev = &shdev->shdma_dev.dma_dev;
+        struct shdma_chan *schan;
+        int i;
+        shdma_for_each_chan(schan, &shdev->shdma_dev, i) {
+                struct sh_dmae_chan *sh_chan = container_of(schan,
+                                        struct sh_dmae_chan, shdma_chan);
+                BUG_ON(!schan);
+                shdma_free_irq(&sh_chan->shdma_chan);
+                shdma_chan_remove(schan);
+                kfree(sh_chan);
+        }
+        dma_dev->chancnt = 0;
+}
+static void sh_dmae_shutdown(struct platform_device *pdev)
+{
+        struct sh_dmae_device *shdev = platform_get_drvdata(pdev);
+        sh_dmae_ctl_stop(shdev);
+}
+static int sh_dmae_runtime_suspend(struct device *dev)
+{
+        return 0;
+}
+static int sh_dmae_runtime_resume(struct device *dev)
+{
+        struct sh_dmae_device *shdev = dev_get_drvdata(dev);
+        return sh_dmae_rst(shdev);
+}
+#ifdef CONFIG_PM
+static int sh_dmae_suspend(struct device *dev)
+{
+        return 0;
+}
+static int sh_dmae_resume(struct device *dev)
+{
+        struct sh_dmae_device *shdev = dev_get_drvdata(dev);
+        int i, ret;
+        ret = sh_dmae_rst(shdev);
+        if (ret < 0)
+                dev_err(dev, "Failed to reset!\n");
+        for (i = 0; i < shdev->pdata->channel_num; i++) {
+                struct sh_dmae_chan *sh_chan = shdev->chan[i];
+                if (!sh_chan->shdma_chan.desc_num)
+                        continue;
+                if (sh_chan->shdma_chan.slave_id >= 0) {
+                        const struct sh_dmae_slave_config *cfg = sh_chan->config;
+                        dmae_set_dmars(sh_chan, cfg->mid_rid);
+                        dmae_set_chcr(sh_chan, cfg->chcr);
+                } else {
+                        dmae_init(sh_chan);
+                }
+        }
+        return 0;
+}
+#else
+#define sh_dmae_suspend NULL
+#define sh_dmae_resume NULL
+#endif
+const struct dev_pm_ops sh_dmae_pm = {
+        .suspend                = sh_dmae_suspend,
+        .resume                 = sh_dmae_resume,
+        .runtime_suspend        = sh_dmae_runtime_suspend,
+        .runtime_resume         = sh_dmae_runtime_resume,
+};
+static dma_addr_t sh_dmae_slave_addr(struct shdma_chan *schan)
+{
+        struct sh_dmae_chan *sh_chan = container_of(schan,
+                                        struct sh_dmae_chan, shdma_chan);
+        /*
+         * Implicit BUG_ON(!sh_chan->config)
+         * This is an exclusive slave DMA operation, may only be called after a
+         * successful slave configuration.
+         */
+        return sh_chan->config->addr;
+}
+static struct shdma_desc *sh_dmae_embedded_desc(void *buf, int i)
+{
+        return &((struct sh_dmae_desc *)buf)[i].shdma_desc;
+}
+static const struct shdma_ops sh_dmae_shdma_ops = {
+        .desc_completed = sh_dmae_desc_completed,
+        .halt_channel = sh_dmae_halt,
+        .channel_busy = sh_dmae_channel_busy,
+        .slave_addr = sh_dmae_slave_addr,
+        .desc_setup = sh_dmae_desc_setup,
+        .set_slave = sh_dmae_set_slave,
+        .setup_xfer = sh_dmae_setup_xfer,
+        .start_xfer = sh_dmae_start_xfer,
+        .embedded_desc = sh_dmae_embedded_desc,
+        .chan_irq = sh_dmae_chan_irq,
+        .get_partial = sh_dmae_get_partial,
+};
+static int __devinit sh_dmae_probe(struct platform_device *pdev)
+{
+        struct sh_dmae_pdata *pdata = pdev->dev.platform_data;
+        unsigned long irqflags = IRQF_DISABLED,
+                chan_flag[SH_DMAE_MAX_CHANNELS] = {};
+        int errirq, chan_irq[SH_DMAE_MAX_CHANNELS];
+        int err, i, irq_cnt = 0, irqres = 0, irq_cap = 0;
+        struct sh_dmae_device *shdev;
+        struct dma_device *dma_dev;
+        struct resource *chan, *dmars, *errirq_res, *chanirq_res;
+        /* get platform data */
+        if (!pdata || !pdata->channel_num)
+                return -ENODEV;
+        chan = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+        /* DMARS area is optional */
+        dmars = platform_get_resource(pdev, IORESOURCE_MEM, 1);
+        /*
+         * IRQ resources:
+         * 1. there always must be at least one IRQ IO-resource. On SH4 it is
+         *    the error IRQ, in which case it is the only IRQ in this resource:
+         *    start == end. If it is the only IRQ resource, all channels also
+         *    use the same IRQ.
+         * 2. DMA channel IRQ resources can be specified one per resource or in
+         *    ranges (start != end)
+         * 3. iff all events (channels and, optionally, error) on this
+         *    controller use the same IRQ, only one IRQ resource can be
+         *    specified, otherwise there must be one IRQ per channel, even if
+         *    some of them are equal
+         * 4. if all IRQs on this controller are equal or if some specific IRQs
+         *    specify IORESOURCE_IRQ_SHAREABLE in their resources, they will be
+         *    requested with the IRQF_SHARED flag
+         */
+        errirq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
+        if (!chan || !errirq_res)
+                return -ENODEV;
+        if (!request_mem_region(chan->start, resource_size(chan), pdev->name)) {
+                dev_err(&pdev->dev, "DMAC register region already claimed\n");
+                return -EBUSY;
+        }
+        if (dmars && !request_mem_region(dmars->start, resource_size(dmars), pdev->name)) {
+                dev_err(&pdev->dev, "DMAC DMARS region already claimed\n");
+                err = -EBUSY;
+                goto ermrdmars;
+        }
+        err = -ENOMEM;
+        shdev = kzalloc(sizeof(struct sh_dmae_device), GFP_KERNEL);
+        if (!shdev) {
+                dev_err(&pdev->dev, "Not enough memory\n");
+                goto ealloc;
+        }
+        dma_dev = &shdev->shdma_dev.dma_dev;
+        shdev->chan_reg = ioremap(chan->start, resource_size(chan));
+        if (!shdev->chan_reg)
+                goto emapchan;
+        if (dmars) {
+                shdev->dmars = ioremap(dmars->start, resource_size(dmars));
+                if (!shdev->dmars)
+                        goto emapdmars;
+        }
+        if (!pdata->slave_only)
+                dma_cap_set(DMA_MEMCPY, dma_dev->cap_mask);
+        if (pdata->slave && pdata->slave_num)
+                dma_cap_set(DMA_SLAVE, dma_dev->cap_mask);
+        /* Default transfer size of 32 bytes requires 32-byte alignment */
+        dma_dev->copy_align = LOG2_DEFAULT_XFER_SIZE;
+        shdev->shdma_dev.ops = &sh_dmae_shdma_ops;
+        shdev->shdma_dev.desc_size = sizeof(struct sh_dmae_desc);
+        err = shdma_init(&pdev->dev, &shdev->shdma_dev,
+                              pdata->channel_num);
+        if (err < 0)
+                goto eshdma;
+        /* platform data */
+        shdev->pdata = pdev->dev.platform_data;
+        if (pdata->chcr_offset)
+                shdev->chcr_offset = pdata->chcr_offset;
+        else
+                shdev->chcr_offset = CHCR;
+        if (pdata->chcr_ie_bit)
+                shdev->chcr_ie_bit = pdata->chcr_ie_bit;
+        else
+                shdev->chcr_ie_bit = CHCR_IE;
+        platform_set_drvdata(pdev, shdev);
+        pm_runtime_enable(&pdev->dev);
+        err = pm_runtime_get_sync(&pdev->dev);
+        if (err < 0)
+                dev_err(&pdev->dev, "%s(): GET = %d\n", __func__, err);
+        spin_lock_irq(&sh_dmae_lock);
+        list_add_tail_rcu(&shdev->node, &sh_dmae_devices);
+        spin_unlock_irq(&sh_dmae_lock);
+        /* reset dma controller - only needed as a test */
+        err = sh_dmae_rst(shdev);
+        if (err)
+                goto rst_err;
+#if defined(CONFIG_CPU_SH4) || defined(CONFIG_ARCH_SHMOBILE)
+        chanirq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 1);
+        if (!chanirq_res)
+                chanirq_res = errirq_res;
+        else
+                irqres++;
+        if (chanirq_res == errirq_res ||
+            (errirq_res->flags & IORESOURCE_BITS) == IORESOURCE_IRQ_SHAREABLE)
+                irqflags = IRQF_SHARED;
+        errirq = errirq_res->start;
+        err = request_irq(errirq, sh_dmae_err, irqflags,
+                          "DMAC Address Error", shdev);
+        if (err) {
+                dev_err(&pdev->dev,
+                        "DMA failed requesting irq #%d, error %d\n",
+                        errirq, err);
+                goto eirq_err;
+        }
+#else
+        chanirq_res = errirq_res;
+#endif /* CONFIG_CPU_SH4 || CONFIG_ARCH_SHMOBILE */
+        if (chanirq_res->start == chanirq_res->end &&
+            !platform_get_resource(pdev, IORESOURCE_IRQ, 1)) {
+                /* Special case - all multiplexed */
+                for (; irq_cnt < pdata->channel_num; irq_cnt++) {
+                        if (irq_cnt < SH_DMAE_MAX_CHANNELS) {
+                                chan_irq[irq_cnt] = chanirq_res->start;
+                                chan_flag[irq_cnt] = IRQF_SHARED;
+                        } else {
+                                irq_cap = 1;
+                                break;
+                        }
+                }
+        } else {
+                do {
+                        for (i = chanirq_res->start; i <= chanirq_res->end; i++) {
+                                if (irq_cnt >= SH_DMAE_MAX_CHANNELS) {
+                                        irq_cap = 1;
+                                        break;
+                                }
+                                if ((errirq_res->flags & IORESOURCE_BITS) ==
+                                    IORESOURCE_IRQ_SHAREABLE)
+                                        chan_flag[irq_cnt] = IRQF_SHARED;
+                                else
+                                        chan_flag[irq_cnt] = IRQF_DISABLED;
+                                dev_dbg(&pdev->dev,
+                                        "Found IRQ %d for channel %d\n",
+                                        i, irq_cnt);
+                                chan_irq[irq_cnt++] = i;
+                        }
+                        if (irq_cnt >= SH_DMAE_MAX_CHANNELS)
+                                break;
+                        chanirq_res = platform_get_resource(pdev,
+                                                IORESOURCE_IRQ, ++irqres);
+                } while (irq_cnt < pdata->channel_num && chanirq_res);
+        }
+        /* Create DMA Channel */
+        for (i = 0; i < irq_cnt; i++) {
+                err = sh_dmae_chan_probe(shdev, i, chan_irq[i], chan_flag[i]);
+                if (err)
+                        goto chan_probe_err;
+        }
+        if (irq_cap)
+                dev_notice(&pdev->dev, "Attempting to register %d DMA "
+                           "channels when a maximum of %d are supported.\n",
+                           pdata->channel_num, SH_DMAE_MAX_CHANNELS);
+        pm_runtime_put(&pdev->dev);
+        err = dma_async_device_register(&shdev->shdma_dev.dma_dev);
+        if (err < 0)
+                goto edmadevreg;
+        return err;
+edmadevreg:
+        pm_runtime_get(&pdev->dev);
+chan_probe_err:
+        sh_dmae_chan_remove(shdev);
+#if defined(CONFIG_CPU_SH4) || defined(CONFIG_ARCH_SHMOBILE)
+        free_irq(errirq, shdev);
+eirq_err:
+#endif
+rst_err:
+        spin_lock_irq(&sh_dmae_lock);
+        list_del_rcu(&shdev->node);
+        spin_unlock_irq(&sh_dmae_lock);
+        pm_runtime_put(&pdev->dev);
+        pm_runtime_disable(&pdev->dev);
+        platform_set_drvdata(pdev, NULL);
+        shdma_cleanup(&shdev->shdma_dev);
+eshdma:
+        if (dmars)
+                iounmap(shdev->dmars);
+emapdmars:
+        iounmap(shdev->chan_reg);
+        synchronize_rcu();
+emapchan:
+        kfree(shdev);
+ealloc:
+        if (dmars)
+                release_mem_region(dmars->start, resource_size(dmars));
+ermrdmars:
+        release_mem_region(chan->start, resource_size(chan));
+        return err;
+}
+static int __devexit sh_dmae_remove(struct platform_device *pdev)
+{
+        struct sh_dmae_device *shdev = platform_get_drvdata(pdev);
+        struct dma_device *dma_dev = &shdev->shdma_dev.dma_dev;
+        struct resource *res;
+        int errirq = platform_get_irq(pdev, 0);
+        dma_async_device_unregister(dma_dev);
+        if (errirq > 0)
+                free_irq(errirq, shdev);
+        spin_lock_irq(&sh_dmae_lock);
+        list_del_rcu(&shdev->node);
+        spin_unlock_irq(&sh_dmae_lock);
+        pm_runtime_disable(&pdev->dev);
+        sh_dmae_chan_remove(shdev);
+        shdma_cleanup(&shdev->shdma_dev);
+        if (shdev->dmars)
+                iounmap(shdev->dmars);
+        iounmap(shdev->chan_reg);
+        platform_set_drvdata(pdev, NULL);
+        synchronize_rcu();
+        kfree(shdev);
+        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+        if (res)
+                release_mem_region(res->start, resource_size(res));
+        res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
+        if (res)
+                release_mem_region(res->start, resource_size(res));
+        return 0;
+}
+static struct platform_driver sh_dmae_driver = {
+        .driver         = {
+                .owner  = THIS_MODULE,
+                .pm     = &sh_dmae_pm,
+                .name   = SH_DMAE_DRV_NAME,
+        },
+        .remove         = __devexit_p(sh_dmae_remove),
+        .shutdown       = sh_dmae_shutdown,
+};
+static int __init sh_dmae_init(void)
+{
+        /* Wire up NMI handling */
+        int err = register_die_notifier(&sh_dmae_nmi_notifier);
+        if (err)
+                return err;
+        return platform_driver_probe(&sh_dmae_driver, sh_dmae_probe);
+}
+module_init(sh_dmae_init);
+static void __exit sh_dmae_exit(void)
+{
+        platform_driver_unregister(&sh_dmae_driver);
+        unregister_die_notifier(&sh_dmae_nmi_notifier);
+}
+module_exit(sh_dmae_exit);
+MODULE_AUTHOR("Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>");
+MODULE_DESCRIPTION("Renesas SH DMA Engine driver");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:" SH_DMAE_DRV_NAME);
diff --git a/drivers/dma/shdma.h b/drivers/dma/sh/shdma.h
index 0b1d2c105f02..9314e93225db 100644
--- a/drivers/dma/shdma.h
+++ b/drivers/dma/sh/shdma.h
@@ -13,42 +13,29 @@
 #ifndef __DMA_SHDMA_H
 #define __DMA_SHDMA_H
+#include <linux/sh_dma.h>
+#include <linux/shdma-base.h>
 #include <linux/dmaengine.h>
 #include <linux/interrupt.h>
 #include <linux/list.h>
-#define SH_DMAC_MAX_CHANNELS 20
+#define SH_DMAE_MAX_CHANNELS 20
-#define SH_DMA_SLAVE_NUMBER 256
+#define SH_DMAE_TCR_MAX 0x00FFFFFF      /* 16MB */
-#define SH_DMA_TCR_MAX 0x00FFFFFF       /* 16MB */
 struct device;
-enum dmae_pm_state {
-        DMAE_PM_ESTABLISHED,
-        DMAE_PM_BUSY,
-        DMAE_PM_PENDING,
-};
 struct sh_dmae_chan {
-        spinlock_t desc_lock;           /* Descriptor operation lock */
+        struct shdma_chan shdma_chan;
-        struct list_head ld_queue;      /* Link descriptors queue */
+        const struct sh_dmae_slave_config *config; /* Slave DMA configuration */
-        struct list_head ld_free;       /* Link descriptors free */
-        struct dma_chan common;         /* DMA common channel */
-        struct device *dev;             /* Channel device */
-        struct tasklet_struct tasklet;  /* Tasklet */
-        int descs_allocated;            /* desc count */
        int xmit_shift;                 /* log_2(bytes_per_xfer) */
-        int irq;
-        int id;                         /* Raw id of this channel */
        u32 __iomem *base;
        char dev_id[16];                /* unique name per DMAC of channel */
        int pm_error;
-        enum dmae_pm_state pm_state;
 };
 struct sh_dmae_device {
-        struct dma_device common;
+        struct shdma_dev shdma_dev;
-        struct sh_dmae_chan *chan[SH_DMAC_MAX_CHANNELS];
+        struct sh_dmae_chan *chan[SH_DMAE_MAX_CHANNELS];
        struct sh_dmae_pdata *pdata;
        struct list_head node;
        u32 __iomem *chan_reg;
@@ -57,10 +44,21 @@ struct sh_dmae_device {
        u32 chcr_ie_bit;
 };
-#define to_sh_chan(chan) container_of(chan, struct sh_dmae_chan, common)
+struct sh_dmae_regs {
+        u32 sar; /* SAR / source address */
+        u32 dar; /* DAR / destination address */
+        u32 tcr; /* TCR / transfer count */
+};
+struct sh_dmae_desc {
+        struct sh_dmae_regs hw;
+        struct shdma_desc shdma_desc;
+};
+#define to_sh_chan(chan) container_of(chan, struct sh_dmae_chan, shdma_chan)
 #define to_sh_desc(lh) container_of(lh, struct sh_desc, node)
 #define tx_to_sh_desc(tx) container_of(tx, struct sh_desc, async_tx)
-#define to_sh_dev(chan) container_of(chan->common.device,\
+#define to_sh_dev(chan) container_of(chan->shdma_chan.dma_chan.device,\
-                                     struct sh_dmae_device, common)
+                                     struct sh_dmae_device, shdma_dev.dma_dev)
 #endif  /* __DMA_SHDMA_H */
diff --git a/drivers/dma/shdma.c b/drivers/dma/shdma.c
deleted file mode 100644
index 19d7a8d3975d..000000000000
--- a/drivers/dma/shdma.c
+++ /dev/null
@@ -1,1524 +0,0 @@
-/*
- * Renesas SuperH DMA Engine support
- *
- * base is drivers/dma/flsdma.c
- *
- * Copyright (C) 2009 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
- * Copyright (C) 2009 Renesas Solutions, Inc. All rights reserved.
- * Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved.
- *
- * This is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * - DMA of SuperH does not have Hardware DMA chain mode.
- * - MAX DMA size is 16MB.
- *
- */
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/slab.h>
-#include <linux/interrupt.h>
-#include <linux/dmaengine.h>
-#include <linux/delay.h>
-#include <linux/platform_device.h>
-#include <linux/pm_runtime.h>
-#include <linux/sh_dma.h>
-#include <linux/notifier.h>
-#include <linux/kdebug.h>
-#include <linux/spinlock.h>
-#include <linux/rculist.h>
-#include "dmaengine.h"
-#include "shdma.h"
-/* DMA descriptor control */
-enum sh_dmae_desc_status {
-        DESC_IDLE,
-        DESC_PREPARED,
-        DESC_SUBMITTED,
-        DESC_COMPLETED, /* completed, have to call callback */
-        DESC_WAITING,   /* callback called, waiting for ack / re-submit */
-};
-#define NR_DESCS_PER_CHANNEL 32
-/* Default MEMCPY transfer size = 2^2 = 4 bytes */
-#define LOG2_DEFAULT_XFER_SIZE  2
-/*
- * Used for write-side mutual exclusion for the global device list,
- * read-side synchronization by way of RCU, and per-controller data.
- */
-static DEFINE_SPINLOCK(sh_dmae_lock);
-static LIST_HEAD(sh_dmae_devices);
-/* A bitmask with bits enough for enum sh_dmae_slave_chan_id */
-static unsigned long sh_dmae_slave_used[BITS_TO_LONGS(SH_DMA_SLAVE_NUMBER)];
-static void sh_dmae_chan_ld_cleanup(struct sh_dmae_chan *sh_chan, bool all);
-static void sh_chan_xfer_ld_queue(struct sh_dmae_chan *sh_chan);
-static void chclr_write(struct sh_dmae_chan *sh_dc, u32 data)
-{
-        struct sh_dmae_device *shdev = to_sh_dev(sh_dc);
-        __raw_writel(data, shdev->chan_reg +
-                     shdev->pdata->channel[sh_dc->id].chclr_offset);
-}
-static void sh_dmae_writel(struct sh_dmae_chan *sh_dc, u32 data, u32 reg)
-{
-        __raw_writel(data, sh_dc->base + reg / sizeof(u32));
-}
-static u32 sh_dmae_readl(struct sh_dmae_chan *sh_dc, u32 reg)
-{
-        return __raw_readl(sh_dc->base + reg / sizeof(u32));
-}
-static u16 dmaor_read(struct sh_dmae_device *shdev)
-{
-        u32 __iomem *addr = shdev->chan_reg + DMAOR / sizeof(u32);
-        if (shdev->pdata->dmaor_is_32bit)
-                return __raw_readl(addr);
-        else
-                return __raw_readw(addr);
-}
-static void dmaor_write(struct sh_dmae_device *shdev, u16 data)
-{
-        u32 __iomem *addr = shdev->chan_reg + DMAOR / sizeof(u32);
-        if (shdev->pdata->dmaor_is_32bit)
-                __raw_writel(data, addr);
-        else
-                __raw_writew(data, addr);
-}
-static void chcr_write(struct sh_dmae_chan *sh_dc, u32 data)
-{
-        struct sh_dmae_device *shdev = to_sh_dev(sh_dc);
-        __raw_writel(data, sh_dc->base + shdev->chcr_offset / sizeof(u32));
-}
-static u32 chcr_read(struct sh_dmae_chan *sh_dc)
-{
-        struct sh_dmae_device *shdev = to_sh_dev(sh_dc);
-        return __raw_readl(sh_dc->base + shdev->chcr_offset / sizeof(u32));
-}
-/*
- * Reset DMA controller
- *
- * SH7780 has two DMAOR register
- */
-static void sh_dmae_ctl_stop(struct sh_dmae_device *shdev)
-{
-        unsigned short dmaor;
-        unsigned long flags;
-        spin_lock_irqsave(&sh_dmae_lock, flags);
-        dmaor = dmaor_read(shdev);
-        dmaor_write(shdev, dmaor & ~(DMAOR_NMIF | DMAOR_AE | DMAOR_DME));
-        spin_unlock_irqrestore(&sh_dmae_lock, flags);
-}
-static int sh_dmae_rst(struct sh_dmae_device *shdev)
-{
-        unsigned short dmaor;
-        unsigned long flags;
-        spin_lock_irqsave(&sh_dmae_lock, flags);
-        dmaor = dmaor_read(shdev) & ~(DMAOR_NMIF | DMAOR_AE | DMAOR_DME);
-        if (shdev->pdata->chclr_present) {
-                int i;
-                for (i = 0; i < shdev->pdata->channel_num; i++) {
-                        struct sh_dmae_chan *sh_chan = shdev->chan[i];
-                        if (sh_chan)
-                                chclr_write(sh_chan, 0);
-                }
-        }
-        dmaor_write(shdev, dmaor | shdev->pdata->dmaor_init);
-        dmaor = dmaor_read(shdev);
-        spin_unlock_irqrestore(&sh_dmae_lock, flags);
-        if (dmaor & (DMAOR_AE | DMAOR_NMIF)) {
-                dev_warn(shdev->common.dev, "Can't initialize DMAOR.\n");
-                return -EIO;
-        }
-        if (shdev->pdata->dmaor_init & ~dmaor)
-                dev_warn(shdev->common.dev,
-                         "DMAOR=0x%x hasn't latched the initial value 0x%x.\n",
-                         dmaor, shdev->pdata->dmaor_init);
-        return 0;
-}
-static bool dmae_is_busy(struct sh_dmae_chan *sh_chan)
-{
-        u32 chcr = chcr_read(sh_chan);
-        if ((chcr & (CHCR_DE | CHCR_TE)) == CHCR_DE)
-                return true; /* working */
-        return false; /* waiting */
-}
-static unsigned int calc_xmit_shift(struct sh_dmae_chan *sh_chan, u32 chcr)
-{
-        struct sh_dmae_device *shdev = to_sh_dev(sh_chan);
-        struct sh_dmae_pdata *pdata = shdev->pdata;
-        int cnt = ((chcr & pdata->ts_low_mask) >> pdata->ts_low_shift) |
-                ((chcr & pdata->ts_high_mask) >> pdata->ts_high_shift);
-        if (cnt >= pdata->ts_shift_num)
-                cnt = 0;
-        return pdata->ts_shift[cnt];
-}
-static u32 log2size_to_chcr(struct sh_dmae_chan *sh_chan, int l2size)
-{
-        struct sh_dmae_device *shdev = to_sh_dev(sh_chan);
-        struct sh_dmae_pdata *pdata = shdev->pdata;
-        int i;
-        for (i = 0; i < pdata->ts_shift_num; i++)
-                if (pdata->ts_shift[i] == l2size)
-                        break;
-        if (i == pdata->ts_shift_num)
-                i = 0;
-        return ((i << pdata->ts_low_shift) & pdata->ts_low_mask) |
-                ((i << pdata->ts_high_shift) & pdata->ts_high_mask);
-}
-static void dmae_set_reg(struct sh_dmae_chan *sh_chan, struct sh_dmae_regs *hw)
-{
-        sh_dmae_writel(sh_chan, hw->sar, SAR);
-        sh_dmae_writel(sh_chan, hw->dar, DAR);
-        sh_dmae_writel(sh_chan, hw->tcr >> sh_chan->xmit_shift, TCR);
-}
-static void dmae_start(struct sh_dmae_chan *sh_chan)
-{
-        struct sh_dmae_device *shdev = to_sh_dev(sh_chan);
-        u32 chcr = chcr_read(sh_chan);
-        if (shdev->pdata->needs_tend_set)
-                sh_dmae_writel(sh_chan, 0xFFFFFFFF, TEND);
-        chcr |= CHCR_DE | shdev->chcr_ie_bit;
-        chcr_write(sh_chan, chcr & ~CHCR_TE);
-}
-static void dmae_halt(struct sh_dmae_chan *sh_chan)
-{
-        struct sh_dmae_device *shdev = to_sh_dev(sh_chan);
-        u32 chcr = chcr_read(sh_chan);
-        chcr &= ~(CHCR_DE | CHCR_TE | shdev->chcr_ie_bit);
-        chcr_write(sh_chan, chcr);
-}
-static void dmae_init(struct sh_dmae_chan *sh_chan)
-{
-        /*
-         * Default configuration for dual address memory-memory transfer.
-         * 0x400 represents auto-request.
-         */
-        u32 chcr = DM_INC | SM_INC | 0x400 | log2size_to_chcr(sh_chan,
-                                                   LOG2_DEFAULT_XFER_SIZE);
-        sh_chan->xmit_shift = calc_xmit_shift(sh_chan, chcr);
-        chcr_write(sh_chan, chcr);
-}
-static int dmae_set_chcr(struct sh_dmae_chan *sh_chan, u32 val)
-{
-        /* If DMA is active, cannot set CHCR. TODO: remove this superfluous check */
-        if (dmae_is_busy(sh_chan))
-                return -EBUSY;
-        sh_chan->xmit_shift = calc_xmit_shift(sh_chan, val);
-        chcr_write(sh_chan, val);
-        return 0;
-}
-static int dmae_set_dmars(struct sh_dmae_chan *sh_chan, u16 val)
-{
-        struct sh_dmae_device *shdev = to_sh_dev(sh_chan);
-        struct sh_dmae_pdata *pdata = shdev->pdata;
-        const struct sh_dmae_channel *chan_pdata = &pdata->channel[sh_chan->id];
-        u16 __iomem *addr = shdev->dmars;
-        unsigned int shift = chan_pdata->dmars_bit;
-        if (dmae_is_busy(sh_chan))
-                return -EBUSY;
-        if (pdata->no_dmars)
-                return 0;
-        /* in the case of a missing DMARS resource use first memory window */
-        if (!addr)
-                addr = (u16 __iomem *)shdev->chan_reg;
-        addr += chan_pdata->dmars / sizeof(u16);
-        __raw_writew((__raw_readw(addr) & (0xff00 >> shift)) | (val << shift),
-                     addr);
-        return 0;
-}
-static dma_cookie_t sh_dmae_tx_submit(struct dma_async_tx_descriptor *tx)
-{
-        struct sh_desc *desc = tx_to_sh_desc(tx), *chunk, *last = desc, *c;
-        struct sh_dmae_chan *sh_chan = to_sh_chan(tx->chan);
-        struct sh_dmae_slave *param = tx->chan->private;
-        dma_async_tx_callback callback = tx->callback;
-        dma_cookie_t cookie;
-        bool power_up;
-        spin_lock_irq(&sh_chan->desc_lock);
-        if (list_empty(&sh_chan->ld_queue))
-                power_up = true;
-        else
-                power_up = false;
-        cookie = dma_cookie_assign(tx);
-        /* Mark all chunks of this descriptor as submitted, move to the queue */
-        list_for_each_entry_safe(chunk, c, desc->node.prev, node) {
-                /*
-                 * All chunks are on the global ld_free, so, we have to find
-                 * the end of the chain ourselves
-                 */
-                if (chunk != desc && (chunk->mark == DESC_IDLE ||
-                                      chunk->async_tx.cookie > 0 ||
-                                      chunk->async_tx.cookie == -EBUSY ||
-                                      &chunk->node == &sh_chan->ld_free))
-                        break;
-                chunk->mark = DESC_SUBMITTED;
-                /* Callback goes to the last chunk */
-                chunk->async_tx.callback = NULL;
-                chunk->cookie = cookie;
-                list_move_tail(&chunk->node, &sh_chan->ld_queue);
-                last = chunk;
-        }
-        last->async_tx.callback = callback;
-        last->async_tx.callback_param = tx->callback_param;
-        dev_dbg(sh_chan->dev, "submit #%d@%p on %d: %x[%d] -> %x\n",
-                tx->cookie, &last->async_tx, sh_chan->id,
-                desc->hw.sar, desc->hw.tcr, desc->hw.dar);
-        if (power_up) {
-                sh_chan->pm_state = DMAE_PM_BUSY;
-                pm_runtime_get(sh_chan->dev);
-                spin_unlock_irq(&sh_chan->desc_lock);
-                pm_runtime_barrier(sh_chan->dev);
-                spin_lock_irq(&sh_chan->desc_lock);
-                /* Have we been reset, while waiting? */
-                if (sh_chan->pm_state != DMAE_PM_ESTABLISHED) {
-                        dev_dbg(sh_chan->dev, "Bring up channel %d\n",
-                                sh_chan->id);
-                        if (param) {
-                                const struct sh_dmae_slave_config *cfg =
-                                        param->config;
-                                dmae_set_dmars(sh_chan, cfg->mid_rid);
-                                dmae_set_chcr(sh_chan, cfg->chcr);
-                        } else {
-                                dmae_init(sh_chan);
-                        }
-                        if (sh_chan->pm_state == DMAE_PM_PENDING)
-                                sh_chan_xfer_ld_queue(sh_chan);
-                        sh_chan->pm_state = DMAE_PM_ESTABLISHED;
-                }
-        } else {
-                sh_chan->pm_state = DMAE_PM_PENDING;
-        }
-        spin_unlock_irq(&sh_chan->desc_lock);
-        return cookie;
-}
-/* Called with desc_lock held */
-static struct sh_desc *sh_dmae_get_desc(struct sh_dmae_chan *sh_chan)
-{
-        struct sh_desc *desc;
-        list_for_each_entry(desc, &sh_chan->ld_free, node)
-                if (desc->mark != DESC_PREPARED) {
-                        BUG_ON(desc->mark != DESC_IDLE);
-                        list_del(&desc->node);
-                        return desc;
-                }
-        return NULL;
-}
-static const struct sh_dmae_slave_config *sh_dmae_find_slave(
-        struct sh_dmae_chan *sh_chan, struct sh_dmae_slave *param)
-{
-        struct sh_dmae_device *shdev = to_sh_dev(sh_chan);
-        struct sh_dmae_pdata *pdata = shdev->pdata;
-        int i;
-        if (param->slave_id >= SH_DMA_SLAVE_NUMBER)
-                return NULL;
-        for (i = 0; i < pdata->slave_num; i++)
-                if (pdata->slave[i].slave_id == param->slave_id)
-                        return pdata->slave + i;
-        return NULL;
-}
-static int sh_dmae_alloc_chan_resources(struct dma_chan *chan)
-{
-        struct sh_dmae_chan *sh_chan = to_sh_chan(chan);
-        struct sh_desc *desc;
-        struct sh_dmae_slave *param = chan->private;
-        int ret;
-        /*
-         * This relies on the guarantee from dmaengine that alloc_chan_resources
-         * never runs concurrently with itself or free_chan_resources.
-         */
-        if (param) {
-                const struct sh_dmae_slave_config *cfg;
-                cfg = sh_dmae_find_slave(sh_chan, param);
-                if (!cfg) {
-                        ret = -EINVAL;
-                        goto efindslave;
-                }
-                if (test_and_set_bit(param->slave_id, sh_dmae_slave_used)) {
-                        ret = -EBUSY;
-                        goto etestused;
-                }
-                param->config = cfg;
-        }
-        while (sh_chan->descs_allocated < NR_DESCS_PER_CHANNEL) {
-                desc = kzalloc(sizeof(struct sh_desc), GFP_KERNEL);
-                if (!desc)
-                        break;
-                dma_async_tx_descriptor_init(&desc->async_tx,
-                                        &sh_chan->common);
-                desc->async_tx.tx_submit = sh_dmae_tx_submit;
-                desc->mark = DESC_IDLE;
-                list_add(&desc->node, &sh_chan->ld_free);
-                sh_chan->descs_allocated++;
-        }
-        if (!sh_chan->descs_allocated) {
-                ret = -ENOMEM;
-                goto edescalloc;
-        }
-        return sh_chan->descs_allocated;
-edescalloc:
-        if (param)
-                clear_bit(param->slave_id, sh_dmae_slave_used);
-etestused:
-efindslave:
-        chan->private = NULL;
-        return ret;
-}
-/*
- * sh_dma_free_chan_resources - Free all resources of the channel.
- */
-static void sh_dmae_free_chan_resources(struct dma_chan *chan)
-{
-        struct sh_dmae_chan *sh_chan = to_sh_chan(chan);
-        struct sh_desc *desc, *_desc;
-        LIST_HEAD(list);
-        /* Protect against ISR */
-        spin_lock_irq(&sh_chan->desc_lock);
-        dmae_halt(sh_chan);
-        spin_unlock_irq(&sh_chan->desc_lock);
-        /* Now no new interrupts will occur */
-        /* Prepared and not submitted descriptors can still be on the queue */
-        if (!list_empty(&sh_chan->ld_queue))
-                sh_dmae_chan_ld_cleanup(sh_chan, true);
-        if (chan->private) {
-                /* The caller is holding dma_list_mutex */
-                struct sh_dmae_slave *param = chan->private;
-                clear_bit(param->slave_id, sh_dmae_slave_used);
-                chan->private = NULL;
-        }
-        spin_lock_irq(&sh_chan->desc_lock);
-        list_splice_init(&sh_chan->ld_free, &list);
-        sh_chan->descs_allocated = 0;
-        spin_unlock_irq(&sh_chan->desc_lock);
-        list_for_each_entry_safe(desc, _desc, &list, node)
-                kfree(desc);
-}
-/**
- * sh_dmae_add_desc - get, set up and return one transfer descriptor
- * @sh_chan:    DMA channel
- * @flags:      DMA transfer flags
- * @dest:       destination DMA address, incremented when direction equals
- *              DMA_DEV_TO_MEM
- * @src:        source DMA address, incremented when direction equals
- *              DMA_MEM_TO_DEV
- * @len:        DMA transfer length
- * @first:      if NULL, set to the current descriptor and cookie set to -EBUSY
- * @direction:  needed for slave DMA to decide which address to keep constant,
- *              equals DMA_MEM_TO_MEM for MEMCPY
- * Returns 0 or an error
- * Locks: called with desc_lock held
- */
-static struct sh_desc *sh_dmae_add_desc(struct sh_dmae_chan *sh_chan,
-        unsigned long flags, dma_addr_t *dest, dma_addr_t *src, size_t *len,
-        struct sh_desc **first, enum dma_transfer_direction direction)
-{
-        struct sh_desc *new;
-        size_t copy_size;
-        if (!*len)
-                return NULL;
-        /* Allocate the link descriptor from the free list */
-        new = sh_dmae_get_desc(sh_chan);
-        if (!new) {
-                dev_err(sh_chan->dev, "No free link descriptor available\n");
-                return NULL;
-        }
-        copy_size = min(*len, (size_t)SH_DMA_TCR_MAX + 1);
-        new->hw.sar = *src;
-        new->hw.dar = *dest;
-        new->hw.tcr = copy_size;
-        if (!*first) {
-                /* First desc */
-                new->async_tx.cookie = -EBUSY;
-                *first = new;
-        } else {
-                /* Other desc - invisible to the user */
-                new->async_tx.cookie = -EINVAL;
-        }
-        dev_dbg(sh_chan->dev,
-                "chaining (%u/%u)@%x -> %x with %p, cookie %d, shift %d\n",
-                copy_size, *len, *src, *dest, &new->async_tx,
-                new->async_tx.cookie, sh_chan->xmit_shift);
-        new->mark = DESC_PREPARED;
-        new->async_tx.flags = flags;
-        new->direction = direction;
-        *len -= copy_size;
-        if (direction == DMA_MEM_TO_MEM || direction == DMA_MEM_TO_DEV)
-                *src += copy_size;
-        if (direction == DMA_MEM_TO_MEM || direction == DMA_DEV_TO_MEM)
-                *dest += copy_size;
-        return new;
-}
-/*
- * sh_dmae_prep_sg - prepare transfer descriptors from an SG list
- *
- * Common routine for public (MEMCPY) and slave DMA. The MEMCPY case is also
- * converted to scatter-gather to guarantee consistent locking and a correct
- * list manipulation. For slave DMA direction carries the usual meaning, and,
- * logically, the SG list is RAM and the addr variable contains slave address,
- * e.g., the FIFO I/O register. For MEMCPY direction equals DMA_MEM_TO_MEM
- * and the SG list contains only one element and points at the source buffer.
- */
-static struct dma_async_tx_descriptor *sh_dmae_prep_sg(struct sh_dmae_chan *sh_chan,
-        struct scatterlist *sgl, unsigned int sg_len, dma_addr_t *addr,
-        enum dma_transfer_direction direction, unsigned long flags)
-{
-        struct scatterlist *sg;
-        struct sh_desc *first = NULL, *new = NULL /* compiler... */;
-        LIST_HEAD(tx_list);
-        int chunks = 0;
-        unsigned long irq_flags;
-        int i;
-        if (!sg_len)
-                return NULL;
-        for_each_sg(sgl, sg, sg_len, i)
-                chunks += (sg_dma_len(sg) + SH_DMA_TCR_MAX) /
-                        (SH_DMA_TCR_MAX + 1);
-        /* Have to lock the whole loop to protect against concurrent release */
-        spin_lock_irqsave(&sh_chan->desc_lock, irq_flags);
-        /*
-         * Chaining:
-         * first descriptor is what user is dealing with in all API calls, its
-         *      cookie is at first set to -EBUSY, at tx-submit to a positive
-         *      number
-         * if more than one chunk is needed further chunks have cookie = -EINVAL
-         * the last chunk, if not equal to the first, has cookie = -ENOSPC
-         * all chunks are linked onto the tx_list head with their .node heads
-         *      only during this function, then they are immediately spliced
-         *      back onto the free list in form of a chain
-         */
-        for_each_sg(sgl, sg, sg_len, i) {
-                dma_addr_t sg_addr = sg_dma_address(sg);
-                size_t len = sg_dma_len(sg);
-                if (!len)
-                        goto err_get_desc;
-                do {
-                        dev_dbg(sh_chan->dev, "Add SG #%d@%p[%d], dma %llx\n",
-                                i, sg, len, (unsigned long long)sg_addr);
-                        if (direction == DMA_DEV_TO_MEM)
-                                new = sh_dmae_add_desc(sh_chan, flags,
-                                                &sg_addr, addr, &len, &first,
-                                                direction);
-                        else
-                                new = sh_dmae_add_desc(sh_chan, flags,
-                                                addr, &sg_addr, &len, &first,
-                                                direction);
-                        if (!new)
-                                goto err_get_desc;
-                        new->chunks = chunks--;
-                        list_add_tail(&new->node, &tx_list);
-                } while (len);
-        }
-        if (new != first)
-                new->async_tx.cookie = -ENOSPC;
-        /* Put them back on the free list, so, they don't get lost */
-        list_splice_tail(&tx_list, &sh_chan->ld_free);
-        spin_unlock_irqrestore(&sh_chan->desc_lock, irq_flags);
-        return &first->async_tx;
-err_get_desc:
-        list_for_each_entry(new, &tx_list, node)
-                new->mark = DESC_IDLE;
-        list_splice(&tx_list, &sh_chan->ld_free);
-        spin_unlock_irqrestore(&sh_chan->desc_lock, irq_flags);
-        return NULL;
-}
-static struct dma_async_tx_descriptor *sh_dmae_prep_memcpy(
-        struct dma_chan *chan, dma_addr_t dma_dest, dma_addr_t dma_src,
-        size_t len, unsigned long flags)
-{
-        struct sh_dmae_chan *sh_chan;
-        struct scatterlist sg;
-        if (!chan || !len)
-                return NULL;
-        sh_chan = to_sh_chan(chan);
-        sg_init_table(&sg, 1);
-        sg_set_page(&sg, pfn_to_page(PFN_DOWN(dma_src)), len,
-                    offset_in_page(dma_src));
-        sg_dma_address(&sg) = dma_src;
-        sg_dma_len(&sg) = len;
-        return sh_dmae_prep_sg(sh_chan, &sg, 1, &dma_dest, DMA_MEM_TO_MEM,
-                               flags);
-}
-static struct dma_async_tx_descriptor *sh_dmae_prep_slave_sg(
-        struct dma_chan *chan, struct scatterlist *sgl, unsigned int sg_len,
-        enum dma_transfer_direction direction, unsigned long flags,
-        void *context)
-{
-        struct sh_dmae_slave *param;
-        struct sh_dmae_chan *sh_chan;
-        dma_addr_t slave_addr;
-        if (!chan)
-                return NULL;
-        sh_chan = to_sh_chan(chan);
-        param = chan->private;
-        /* Someone calling slave DMA on a public channel? */
-        if (!param || !sg_len) {
-                dev_warn(sh_chan->dev, "%s: bad parameter: %p, %d, %d\n",
-                         __func__, param, sg_len, param ? param->slave_id : -1);
-                return NULL;
-        }
-        slave_addr = param->config->addr;
-        /*
-         * if (param != NULL), this is a successfully requested slave channel,
-         * therefore param->config != NULL too.
-         */
-        return sh_dmae_prep_sg(sh_chan, sgl, sg_len, &slave_addr,
-                               direction, flags);
-}
-static int sh_dmae_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
-                           unsigned long arg)
-{
-        struct sh_dmae_chan *sh_chan = to_sh_chan(chan);
-        unsigned long flags;
-        /* Only supports DMA_TERMINATE_ALL */
-        if (cmd != DMA_TERMINATE_ALL)
-                return -ENXIO;
-        if (!chan)
-                return -EINVAL;
-        spin_lock_irqsave(&sh_chan->desc_lock, flags);
-        dmae_halt(sh_chan);
-        if (!list_empty(&sh_chan->ld_queue)) {
-                /* Record partial transfer */
-                struct sh_desc *desc = list_entry(sh_chan->ld_queue.next,
-                                                  struct sh_desc, node);
-                desc->partial = (desc->hw.tcr - sh_dmae_readl(sh_chan, TCR)) <<
-                        sh_chan->xmit_shift;
-        }
-        spin_unlock_irqrestore(&sh_chan->desc_lock, flags);
-        sh_dmae_chan_ld_cleanup(sh_chan, true);
-        return 0;
-}
-static dma_async_tx_callback __ld_cleanup(struct sh_dmae_chan *sh_chan, bool all)
-{
-        struct sh_desc *desc, *_desc;
-        /* Is the "exposed" head of a chain acked? */
-        bool head_acked = false;
-        dma_cookie_t cookie = 0;
-        dma_async_tx_callback callback = NULL;
-        void *param = NULL;
-        unsigned long flags;
-        spin_lock_irqsave(&sh_chan->desc_lock, flags);
-        list_for_each_entry_safe(desc, _desc, &sh_chan->ld_queue, node) {
-                struct dma_async_tx_descriptor *tx = &desc->async_tx;
-                BUG_ON(tx->cookie > 0 && tx->cookie != desc->cookie);
-                BUG_ON(desc->mark != DESC_SUBMITTED &&
-                       desc->mark != DESC_COMPLETED &&
-                       desc->mark != DESC_WAITING);
-                /*
-                 * queue is ordered, and we use this loop to (1) clean up all
-                 * completed descriptors, and to (2) update descriptor flags of
-                 * any chunks in a (partially) completed chain
-                 */
-                if (!all && desc->mark == DESC_SUBMITTED &&
-                    desc->cookie != cookie)
-                        break;
-                if (tx->cookie > 0)
-                        cookie = tx->cookie;
-                if (desc->mark == DESC_COMPLETED && desc->chunks == 1) {
-                        if (sh_chan->common.completed_cookie != desc->cookie - 1)
-                                dev_dbg(sh_chan->dev,
-                                        "Completing cookie %d, expected %d\n",
-                                        desc->cookie,
-                                        sh_chan->common.completed_cookie + 1);
-                        sh_chan->common.completed_cookie = desc->cookie;
-                }
-                /* Call callback on the last chunk */
-                if (desc->mark == DESC_COMPLETED && tx->callback) {
-                        desc->mark = DESC_WAITING;
-                        callback = tx->callback;
-                        param = tx->callback_param;
-                        dev_dbg(sh_chan->dev, "descriptor #%d@%p on %d callback\n",
-                                tx->cookie, tx, sh_chan->id);
-                        BUG_ON(desc->chunks != 1);
-                        break;
-                }
-                if (tx->cookie > 0 || tx->cookie == -EBUSY) {
-                        if (desc->mark == DESC_COMPLETED) {
-                                BUG_ON(tx->cookie < 0);
-                                desc->mark = DESC_WAITING;
-                        }
-                        head_acked = async_tx_test_ack(tx);
-                } else {
-                        switch (desc->mark) {
-                        case DESC_COMPLETED:
-                                desc->mark = DESC_WAITING;
-                                /* Fall through */
-                        case DESC_WAITING:
-                                if (head_acked)
-                                        async_tx_ack(&desc->async_tx);
-                        }
-                }
-                dev_dbg(sh_chan->dev, "descriptor %p #%d completed.\n",
-                        tx, tx->cookie);
-                if (((desc->mark == DESC_COMPLETED ||
-                      desc->mark == DESC_WAITING) &&
-                     async_tx_test_ack(&desc->async_tx)) || all) {
-                        /* Remove from ld_queue list */
-                        desc->mark = DESC_IDLE;
-                        list_move(&desc->node, &sh_chan->ld_free);
-                        if (list_empty(&sh_chan->ld_queue)) {
-                                dev_dbg(sh_chan->dev, "Bring down channel %d\n", sh_chan->id);
-                                pm_runtime_put(sh_chan->dev);
-                        }
-                }
-        }
-        if (all && !callback)
-                /*
-                 * Terminating and the loop completed normally: forgive
-                 * uncompleted cookies
-                 */
-                sh_chan->common.completed_cookie = sh_chan->common.cookie;
-        spin_unlock_irqrestore(&sh_chan->desc_lock, flags);
-        if (callback)
-                callback(param);
-        return callback;
-}
-/*
- * sh_chan_ld_cleanup - Clean up link descriptors
- *
- * This function cleans up the ld_queue of DMA channel.
- */
-static void sh_dmae_chan_ld_cleanup(struct sh_dmae_chan *sh_chan, bool all)
-{
-        while (__ld_cleanup(sh_chan, all))
-                ;
-}
-/* Called under spin_lock_irq(&sh_chan->desc_lock) */
-static void sh_chan_xfer_ld_queue(struct sh_dmae_chan *sh_chan)
-{
-        struct sh_desc *desc;
-        /* DMA work check */
-        if (dmae_is_busy(sh_chan))
-                return;
-        /* Find the first not transferred descriptor */
-        list_for_each_entry(desc, &sh_chan->ld_queue, node)
-                if (desc->mark == DESC_SUBMITTED) {
-                        dev_dbg(sh_chan->dev, "Queue #%d to %d: %u@%x -> %x\n",
-                                desc->async_tx.cookie, sh_chan->id,
-                                desc->hw.tcr, desc->hw.sar, desc->hw.dar);
-                        /* Get the ld start address from ld_queue */
-                        dmae_set_reg(sh_chan, &desc->hw);
-                        dmae_start(sh_chan);
-                        break;
-                }
-}
-static void sh_dmae_memcpy_issue_pending(struct dma_chan *chan)
-{
-        struct sh_dmae_chan *sh_chan = to_sh_chan(chan);
-        spin_lock_irq(&sh_chan->desc_lock);
-        if (sh_chan->pm_state == DMAE_PM_ESTABLISHED)
-                sh_chan_xfer_ld_queue(sh_chan);
-        else
-                sh_chan->pm_state = DMAE_PM_PENDING;
-        spin_unlock_irq(&sh_chan->desc_lock);
-}
-static enum dma_status sh_dmae_tx_status(struct dma_chan *chan,
-                                        dma_cookie_t cookie,
-                                        struct dma_tx_state *txstate)
-{
-        struct sh_dmae_chan *sh_chan = to_sh_chan(chan);
-        enum dma_status status;
-        unsigned long flags;
-        sh_dmae_chan_ld_cleanup(sh_chan, false);
-        spin_lock_irqsave(&sh_chan->desc_lock, flags);
-        status = dma_cookie_status(chan, cookie, txstate);
-        /*
-         * If we don't find cookie on the queue, it has been aborted and we have
-         * to report error
-         */
-        if (status != DMA_SUCCESS) {
-                struct sh_desc *desc;
-                status = DMA_ERROR;
-                list_for_each_entry(desc, &sh_chan->ld_queue, node)
-                        if (desc->cookie == cookie) {
-                                status = DMA_IN_PROGRESS;
-                                break;
-                        }
-        }
-        spin_unlock_irqrestore(&sh_chan->desc_lock, flags);
-        return status;
-}
-static irqreturn_t sh_dmae_interrupt(int irq, void *data)
-{
-        irqreturn_t ret = IRQ_NONE;
-        struct sh_dmae_chan *sh_chan = data;
-        u32 chcr;
-        spin_lock(&sh_chan->desc_lock);
-        chcr = chcr_read(sh_chan);
-        if (chcr & CHCR_TE) {
-                /* DMA stop */
-                dmae_halt(sh_chan);
-                ret = IRQ_HANDLED;
-                tasklet_schedule(&sh_chan->tasklet);
-        }
-        spin_unlock(&sh_chan->desc_lock);
-        return ret;
-}
-/* Called from error IRQ or NMI */
-static bool sh_dmae_reset(struct sh_dmae_device *shdev)
-{
-        unsigned int handled = 0;
-        int i;
-        /* halt the dma controller */
-        sh_dmae_ctl_stop(shdev);
-        /* We cannot detect, which channel caused the error, have to reset all */
-        for (i = 0; i < SH_DMAC_MAX_CHANNELS; i++) {
-                struct sh_dmae_chan *sh_chan = shdev->chan[i];
-                struct sh_desc *desc;
-                LIST_HEAD(dl);
-                if (!sh_chan)
-                        continue;
-                spin_lock(&sh_chan->desc_lock);
-                /* Stop the channel */
-                dmae_halt(sh_chan);
-                list_splice_init(&sh_chan->ld_queue, &dl);
-                if (!list_empty(&dl)) {
-                        dev_dbg(sh_chan->dev, "Bring down channel %d\n", sh_chan->id);
-                        pm_runtime_put(sh_chan->dev);
-                }
-                sh_chan->pm_state = DMAE_PM_ESTABLISHED;
-                spin_unlock(&sh_chan->desc_lock);
-                /* Complete all  */
-                list_for_each_entry(desc, &dl, node) {
-                        struct dma_async_tx_descriptor *tx = &desc->async_tx;
-                        desc->mark = DESC_IDLE;
-                        if (tx->callback)
-                                tx->callback(tx->callback_param);
-                }
-                spin_lock(&sh_chan->desc_lock);
-                list_splice(&dl, &sh_chan->ld_free);
-                spin_unlock(&sh_chan->desc_lock);
-                handled++;
-        }
-        sh_dmae_rst(shdev);
-        return !!handled;
-}
-static irqreturn_t sh_dmae_err(int irq, void *data)
-{
-        struct sh_dmae_device *shdev = data;
-        if (!(dmaor_read(shdev) & DMAOR_AE))
-                return IRQ_NONE;
-        sh_dmae_reset(data);
-        return IRQ_HANDLED;
-}
-static void dmae_do_tasklet(unsigned long data)
-{
-        struct sh_dmae_chan *sh_chan = (struct sh_dmae_chan *)data;
-        struct sh_desc *desc;
-        u32 sar_buf = sh_dmae_readl(sh_chan, SAR);
-        u32 dar_buf = sh_dmae_readl(sh_chan, DAR);
-        spin_lock_irq(&sh_chan->desc_lock);
-        list_for_each_entry(desc, &sh_chan->ld_queue, node) {
-                if (desc->mark == DESC_SUBMITTED &&
-                    ((desc->direction == DMA_DEV_TO_MEM &&
-                      (desc->hw.dar + desc->hw.tcr) == dar_buf) ||
-                     (desc->hw.sar + desc->hw.tcr) == sar_buf)) {
-                        dev_dbg(sh_chan->dev, "done #%d@%p dst %u\n",
-                                desc->async_tx.cookie, &desc->async_tx,
-                                desc->hw.dar);
-                        desc->mark = DESC_COMPLETED;
-                        break;
-                }
-        }
-        /* Next desc */
-        sh_chan_xfer_ld_queue(sh_chan);
-        spin_unlock_irq(&sh_chan->desc_lock);
-        sh_dmae_chan_ld_cleanup(sh_chan, false);
-}
-static bool sh_dmae_nmi_notify(struct sh_dmae_device *shdev)
-{
-        /* Fast path out if NMIF is not asserted for this controller */
-        if ((dmaor_read(shdev) & DMAOR_NMIF) == 0)
-                return false;
-        return sh_dmae_reset(shdev);
-}
-static int sh_dmae_nmi_handler(struct notifier_block *self,
-                               unsigned long cmd, void *data)
-{
-        struct sh_dmae_device *shdev;
-        int ret = NOTIFY_DONE;
-        bool triggered;
-        /*
-         * Only concern ourselves with NMI events.
-         *
-         * Normally we would check the die chain value, but as this needs
-         * to be architecture independent, check for NMI context instead.
-         */
-        if (!in_nmi())
-                return NOTIFY_DONE;
-        rcu_read_lock();
-        list_for_each_entry_rcu(shdev, &sh_dmae_devices, node) {
-                /*
-                 * Only stop if one of the controllers has NMIF asserted,
-                 * we do not want to interfere with regular address error
-                 * handling or NMI events that don't concern the DMACs.
-                 */
-                triggered = sh_dmae_nmi_notify(shdev);
-                if (triggered == true)
-                        ret = NOTIFY_OK;
-        }
-        rcu_read_unlock();
-        return ret;
-}
-static struct notifier_block sh_dmae_nmi_notifier __read_mostly = {
-        .notifier_call  = sh_dmae_nmi_handler,
-        /* Run before NMI debug handler and KGDB */
-        .priority       = 1,
-};
-static int __devinit sh_dmae_chan_probe(struct sh_dmae_device *shdev, int id,
-                                        int irq, unsigned long flags)
-{
-        int err;
-        const struct sh_dmae_channel *chan_pdata = &shdev->pdata->channel[id];
-        struct platform_device *pdev = to_platform_device(shdev->common.dev);
-        struct sh_dmae_chan *new_sh_chan;
-        /* alloc channel */
-        new_sh_chan = kzalloc(sizeof(struct sh_dmae_chan), GFP_KERNEL);
-        if (!new_sh_chan) {
-                dev_err(shdev->common.dev,
-                        "No free memory for allocating dma channels!\n");
-                return -ENOMEM;
-        }
-        new_sh_chan->pm_state = DMAE_PM_ESTABLISHED;
-        /* reference struct dma_device */
-        new_sh_chan->common.device = &shdev->common;
-        dma_cookie_init(&new_sh_chan->common);
-        new_sh_chan->dev = shdev->common.dev;
-        new_sh_chan->id = id;
-        new_sh_chan->irq = irq;
-        new_sh_chan->base = shdev->chan_reg + chan_pdata->offset / sizeof(u32);
-        /* Init DMA tasklet */
-        tasklet_init(&new_sh_chan->tasklet, dmae_do_tasklet,
-                        (unsigned long)new_sh_chan);
-        spin_lock_init(&new_sh_chan->desc_lock);
-        /* Init descripter manage list */
-        INIT_LIST_HEAD(&new_sh_chan->ld_queue);
-        INIT_LIST_HEAD(&new_sh_chan->ld_free);
-        /* Add the channel to DMA device channel list */
-        list_add_tail(&new_sh_chan->common.device_node,
-                        &shdev->common.channels);
-        shdev->common.chancnt++;
-        if (pdev->id >= 0)
-                snprintf(new_sh_chan->dev_id, sizeof(new_sh_chan->dev_id),
-                         "sh-dmae%d.%d", pdev->id, new_sh_chan->id);
-        else
-                snprintf(new_sh_chan->dev_id, sizeof(new_sh_chan->dev_id),
-                         "sh-dma%d", new_sh_chan->id);
-        /* set up channel irq */
-        err = request_irq(irq, &sh_dmae_interrupt, flags,
-                          new_sh_chan->dev_id, new_sh_chan);
-        if (err) {
-                dev_err(shdev->common.dev, "DMA channel %d request_irq error "
-                        "with return %d\n", id, err);
-                goto err_no_irq;
-        }
-        shdev->chan[id] = new_sh_chan;
-        return 0;
-err_no_irq:
-        /* remove from dmaengine device node */
-        list_del(&new_sh_chan->common.device_node);
-        kfree(new_sh_chan);
-        return err;
-}
-static void sh_dmae_chan_remove(struct sh_dmae_device *shdev)
-{
-        int i;
-        for (i = shdev->common.chancnt - 1 ; i >= 0 ; i--) {
-                if (shdev->chan[i]) {
-                        struct sh_dmae_chan *sh_chan = shdev->chan[i];
-                        free_irq(sh_chan->irq, sh_chan);
-                        list_del(&sh_chan->common.device_node);
-                        kfree(sh_chan);
-                        shdev->chan[i] = NULL;
-                }
-        }
-        shdev->common.chancnt = 0;
-}
-static int __init sh_dmae_probe(struct platform_device *pdev)
-{
-        struct sh_dmae_pdata *pdata = pdev->dev.platform_data;
-        unsigned long irqflags = IRQF_DISABLED,
-                chan_flag[SH_DMAC_MAX_CHANNELS] = {};
-        int errirq, chan_irq[SH_DMAC_MAX_CHANNELS];
-        int err, i, irq_cnt = 0, irqres = 0, irq_cap = 0;
-        struct sh_dmae_device *shdev;
-        struct resource *chan, *dmars, *errirq_res, *chanirq_res;
-        /* get platform data */
-        if (!pdata || !pdata->channel_num)
-                return -ENODEV;
-        chan = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-        /* DMARS area is optional */
-        dmars = platform_get_resource(pdev, IORESOURCE_MEM, 1);
-        /*
-         * IRQ resources:
-         * 1. there always must be at least one IRQ IO-resource. On SH4 it is
-         *    the error IRQ, in which case it is the only IRQ in this resource:
-         *    start == end. If it is the only IRQ resource, all channels also
-         *    use the same IRQ.
-         * 2. DMA channel IRQ resources can be specified one per resource or in
-         *    ranges (start != end)
-         * 3. iff all events (channels and, optionally, error) on this
-         *    controller use the same IRQ, only one IRQ resource can be
-         *    specified, otherwise there must be one IRQ per channel, even if
-         *    some of them are equal
-         * 4. if all IRQs on this controller are equal or if some specific IRQs
-         *    specify IORESOURCE_IRQ_SHAREABLE in their resources, they will be
-         *    requested with the IRQF_SHARED flag
-         */
-        errirq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
-        if (!chan || !errirq_res)
-                return -ENODEV;
-        if (!request_mem_region(chan->start, resource_size(chan), pdev->name)) {
-                dev_err(&pdev->dev, "DMAC register region already claimed\n");
-                return -EBUSY;
-        }
-        if (dmars && !request_mem_region(dmars->start, resource_size(dmars), pdev->name)) {
-                dev_err(&pdev->dev, "DMAC DMARS region already claimed\n");
-                err = -EBUSY;
-                goto ermrdmars;
-        }
-        err = -ENOMEM;
-        shdev = kzalloc(sizeof(struct sh_dmae_device), GFP_KERNEL);
-        if (!shdev) {
-                dev_err(&pdev->dev, "Not enough memory\n");
-                goto ealloc;
-        }
-        shdev->chan_reg = ioremap(chan->start, resource_size(chan));
-        if (!shdev->chan_reg)
-                goto emapchan;
-        if (dmars) {
-                shdev->dmars = ioremap(dmars->start, resource_size(dmars));
-                if (!shdev->dmars)
-                        goto emapdmars;
-        }
-        /* platform data */
-        shdev->pdata = pdata;
-        if (pdata->chcr_offset)
-                shdev->chcr_offset = pdata->chcr_offset;
-        else
-                shdev->chcr_offset = CHCR;
-        if (pdata->chcr_ie_bit)
-                shdev->chcr_ie_bit = pdata->chcr_ie_bit;
-        else
-                shdev->chcr_ie_bit = CHCR_IE;
-        platform_set_drvdata(pdev, shdev);
-        shdev->common.dev = &pdev->dev;
-        pm_runtime_enable(&pdev->dev);
-        pm_runtime_get_sync(&pdev->dev);
-        spin_lock_irq(&sh_dmae_lock);
-        list_add_tail_rcu(&shdev->node, &sh_dmae_devices);
-        spin_unlock_irq(&sh_dmae_lock);
-        /* reset dma controller - only needed as a test */
-        err = sh_dmae_rst(shdev);
-        if (err)
-                goto rst_err;
-        INIT_LIST_HEAD(&shdev->common.channels);
-        if (!pdata->slave_only)
-                dma_cap_set(DMA_MEMCPY, shdev->common.cap_mask);
-        if (pdata->slave && pdata->slave_num)
-                dma_cap_set(DMA_SLAVE, shdev->common.cap_mask);
-        shdev->common.device_alloc_chan_resources
-                = sh_dmae_alloc_chan_resources;
-        shdev->common.device_free_chan_resources = sh_dmae_free_chan_resources;
-        shdev->common.device_prep_dma_memcpy = sh_dmae_prep_memcpy;
-        shdev->common.device_tx_status = sh_dmae_tx_status;
-        shdev->common.device_issue_pending = sh_dmae_memcpy_issue_pending;
-        /* Compulsory for DMA_SLAVE fields */
-        shdev->common.device_prep_slave_sg = sh_dmae_prep_slave_sg;
-        shdev->common.device_control = sh_dmae_control;
-        /* Default transfer size of 32 bytes requires 32-byte alignment */
-        shdev->common.copy_align = LOG2_DEFAULT_XFER_SIZE;
-#if defined(CONFIG_CPU_SH4) || defined(CONFIG_ARCH_SHMOBILE)
-        chanirq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 1);
-        if (!chanirq_res)
-                chanirq_res = errirq_res;
-        else
-                irqres++;
-        if (chanirq_res == errirq_res ||
-            (errirq_res->flags & IORESOURCE_BITS) == IORESOURCE_IRQ_SHAREABLE)
-                irqflags = IRQF_SHARED;
-        errirq = errirq_res->start;
-        err = request_irq(errirq, sh_dmae_err, irqflags,
-                          "DMAC Address Error", shdev);
-        if (err) {
-                dev_err(&pdev->dev,
-                        "DMA failed requesting irq #%d, error %d\n",
-                        errirq, err);
-                goto eirq_err;
-        }
-#else
-        chanirq_res = errirq_res;
-#endif /* CONFIG_CPU_SH4 || CONFIG_ARCH_SHMOBILE */
-        if (chanirq_res->start == chanirq_res->end &&
-            !platform_get_resource(pdev, IORESOURCE_IRQ, 1)) {
-                /* Special case - all multiplexed */
-                for (; irq_cnt < pdata->channel_num; irq_cnt++) {
-                        if (irq_cnt < SH_DMAC_MAX_CHANNELS) {
-                                chan_irq[irq_cnt] = chanirq_res->start;
-                                chan_flag[irq_cnt] = IRQF_SHARED;
-                        } else {
-                                irq_cap = 1;
-                                break;
-                        }
-                }
-        } else {
-                do {
-                        for (i = chanirq_res->start; i <= chanirq_res->end; i++) {
-                                if (irq_cnt >= SH_DMAC_MAX_CHANNELS) {
-                                        irq_cap = 1;
-                                        break;
-                                }
-                                if ((errirq_res->flags & IORESOURCE_BITS) ==
-                                    IORESOURCE_IRQ_SHAREABLE)
-                                        chan_flag[irq_cnt] = IRQF_SHARED;
-                                else
-                                        chan_flag[irq_cnt] = IRQF_DISABLED;
-                                dev_dbg(&pdev->dev,
-                                        "Found IRQ %d for channel %d\n",
-                                        i, irq_cnt);
-                                chan_irq[irq_cnt++] = i;
-                        }
-                        if (irq_cnt >= SH_DMAC_MAX_CHANNELS)
-                                break;
-                        chanirq_res = platform_get_resource(pdev,
-                                                IORESOURCE_IRQ, ++irqres);
-                } while (irq_cnt < pdata->channel_num && chanirq_res);
-        }
-        /* Create DMA Channel */
-        for (i = 0; i < irq_cnt; i++) {
-                err = sh_dmae_chan_probe(shdev, i, chan_irq[i], chan_flag[i]);
-                if (err)
-                        goto chan_probe_err;
-        }
-        if (irq_cap)
-                dev_notice(&pdev->dev, "Attempting to register %d DMA "
-                           "channels when a maximum of %d are supported.\n",
-                           pdata->channel_num, SH_DMAC_MAX_CHANNELS);
-        pm_runtime_put(&pdev->dev);
-        dma_async_device_register(&shdev->common);
-        return err;
-chan_probe_err:
-        sh_dmae_chan_remove(shdev);
-#if defined(CONFIG_CPU_SH4) || defined(CONFIG_ARCH_SHMOBILE)
-        free_irq(errirq, shdev);
-eirq_err:
-#endif
-rst_err:
-        spin_lock_irq(&sh_dmae_lock);
-        list_del_rcu(&shdev->node);
-        spin_unlock_irq(&sh_dmae_lock);
-        pm_runtime_put(&pdev->dev);
-        pm_runtime_disable(&pdev->dev);
-        if (dmars)
-                iounmap(shdev->dmars);
-        platform_set_drvdata(pdev, NULL);
-emapdmars:
-        iounmap(shdev->chan_reg);
-        synchronize_rcu();
-emapchan:
-        kfree(shdev);
-ealloc:
-        if (dmars)
-                release_mem_region(dmars->start, resource_size(dmars));
-ermrdmars:
-        release_mem_region(chan->start, resource_size(chan));
-        return err;
-}
-static int __exit sh_dmae_remove(struct platform_device *pdev)
-{
-        struct sh_dmae_device *shdev = platform_get_drvdata(pdev);
-        struct resource *res;
-        int errirq = platform_get_irq(pdev, 0);
-        dma_async_device_unregister(&shdev->common);
-        if (errirq > 0)
-                free_irq(errirq, shdev);
-        spin_lock_irq(&sh_dmae_lock);
-        list_del_rcu(&shdev->node);
-        spin_unlock_irq(&sh_dmae_lock);
-        /* channel data remove */
-        sh_dmae_chan_remove(shdev);
-        pm_runtime_disable(&pdev->dev);
-        if (shdev->dmars)
-                iounmap(shdev->dmars);
-        iounmap(shdev->chan_reg);
-        platform_set_drvdata(pdev, NULL);
-        synchronize_rcu();
-        kfree(shdev);
-        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-        if (res)
-                release_mem_region(res->start, resource_size(res));
-        res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
-        if (res)
-                release_mem_region(res->start, resource_size(res));
-        return 0;
-}
-static void sh_dmae_shutdown(struct platform_device *pdev)
-{
-        struct sh_dmae_device *shdev = platform_get_drvdata(pdev);
-        sh_dmae_ctl_stop(shdev);
-}
-static int sh_dmae_runtime_suspend(struct device *dev)
-{
-        return 0;
-}
-static int sh_dmae_runtime_resume(struct device *dev)
-{
-        struct sh_dmae_device *shdev = dev_get_drvdata(dev);
-        return sh_dmae_rst(shdev);
-}
-#ifdef CONFIG_PM
-static int sh_dmae_suspend(struct device *dev)
-{
-        return 0;
-}
-static int sh_dmae_resume(struct device *dev)
-{
-        struct sh_dmae_device *shdev = dev_get_drvdata(dev);
-        int i, ret;
-        ret = sh_dmae_rst(shdev);
-        if (ret < 0)
-                dev_err(dev, "Failed to reset!\n");
-        for (i = 0; i < shdev->pdata->channel_num; i++) {
-                struct sh_dmae_chan *sh_chan = shdev->chan[i];
-                struct sh_dmae_slave *param = sh_chan->common.private;
-                if (!sh_chan->descs_allocated)
-                        continue;
-                if (param) {
-                        const struct sh_dmae_slave_config *cfg = param->config;
-                        dmae_set_dmars(sh_chan, cfg->mid_rid);
-                        dmae_set_chcr(sh_chan, cfg->chcr);
-                } else {
-                        dmae_init(sh_chan);
-                }
-        }
-        return 0;
-}
-#else
-#define sh_dmae_suspend NULL
-#define sh_dmae_resume NULL
-#endif
-const struct dev_pm_ops sh_dmae_pm = {
-        .suspend                = sh_dmae_suspend,
-        .resume                 = sh_dmae_resume,
-        .runtime_suspend        = sh_dmae_runtime_suspend,
-        .runtime_resume         = sh_dmae_runtime_resume,
-};
-static struct platform_driver sh_dmae_driver = {
-        .remove         = __exit_p(sh_dmae_remove),
-        .shutdown       = sh_dmae_shutdown,
-        .driver = {
-                .owner  = THIS_MODULE,
-                .name   = "sh-dma-engine",
-                .pm     = &sh_dmae_pm,
-        },
-};
-static int __init sh_dmae_init(void)
-{
-        /* Wire up NMI handling */
-        int err = register_die_notifier(&sh_dmae_nmi_notifier);
-        if (err)
-                return err;
-        return platform_driver_probe(&sh_dmae_driver, sh_dmae_probe);
-}
-module_init(sh_dmae_init);
-static void __exit sh_dmae_exit(void)
-{
-        platform_driver_unregister(&sh_dmae_driver);
-        unregister_die_notifier(&sh_dmae_nmi_notifier);
-}
-module_exit(sh_dmae_exit);
-MODULE_AUTHOR("Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>");
-MODULE_DESCRIPTION("Renesas SH DMA Engine driver");
-MODULE_LICENSE("GPL");
-MODULE_ALIAS("platform:sh-dma-engine");
diff --git a/drivers/dma/tegra20-apb-dma.c b/drivers/dma/tegra20-apb-dma.c
new file mode 100644
index 000000000000..24acd711e032
--- /dev/null
+++ b/drivers/dma/tegra20-apb-dma.c
@@ -0,0 +1,1431 @@
+/*
+ * DMA driver for Nvidia's Tegra20 APB DMA controller.
+ *
+ * Copyright (c) 2012, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+#include <linux/bitops.h>
+#include <linux/clk.h>
+#include <linux/delay.h>
+#include <linux/dmaengine.h>
+#include <linux/dma-mapping.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/io.h>
+#include <linux/mm.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/platform_device.h>
+#include <linux/pm_runtime.h>
+#include <linux/slab.h>
+#include <mach/clk.h>
+#include "dmaengine.h"
+#define TEGRA_APBDMA_GENERAL                    0x0
+#define TEGRA_APBDMA_GENERAL_ENABLE             BIT(31)
+#define TEGRA_APBDMA_CONTROL                    0x010
+#define TEGRA_APBDMA_IRQ_MASK                   0x01c
+#define TEGRA_APBDMA_IRQ_MASK_SET               0x020
+/* CSR register */
+#define TEGRA_APBDMA_CHAN_CSR                   0x00
+#define TEGRA_APBDMA_CSR_ENB                    BIT(31)
+#define TEGRA_APBDMA_CSR_IE_EOC                 BIT(30)
+#define TEGRA_APBDMA_CSR_HOLD                   BIT(29)
+#define TEGRA_APBDMA_CSR_DIR                    BIT(28)
+#define TEGRA_APBDMA_CSR_ONCE                   BIT(27)
+#define TEGRA_APBDMA_CSR_FLOW                   BIT(21)
+#define TEGRA_APBDMA_CSR_REQ_SEL_SHIFT          16
+#define TEGRA_APBDMA_CSR_WCOUNT_MASK            0xFFFC
+/* STATUS register */
+#define TEGRA_APBDMA_CHAN_STATUS                0x004
+#define TEGRA_APBDMA_STATUS_BUSY                BIT(31)
+#define TEGRA_APBDMA_STATUS_ISE_EOC             BIT(30)
+#define TEGRA_APBDMA_STATUS_HALT                BIT(29)
+#define TEGRA_APBDMA_STATUS_PING_PONG           BIT(28)
+#define TEGRA_APBDMA_STATUS_COUNT_SHIFT         2
+#define TEGRA_APBDMA_STATUS_COUNT_MASK          0xFFFC
+/* AHB memory address */
+#define TEGRA_APBDMA_CHAN_AHBPTR                0x010
+/* AHB sequence register */
+#define TEGRA_APBDMA_CHAN_AHBSEQ                0x14
+#define TEGRA_APBDMA_AHBSEQ_INTR_ENB            BIT(31)
+#define TEGRA_APBDMA_AHBSEQ_BUS_WIDTH_8         (0 << 28)
+#define TEGRA_APBDMA_AHBSEQ_BUS_WIDTH_16        (1 << 28)
+#define TEGRA_APBDMA_AHBSEQ_BUS_WIDTH_32        (2 << 28)
+#define TEGRA_APBDMA_AHBSEQ_BUS_WIDTH_64        (3 << 28)
+#define TEGRA_APBDMA_AHBSEQ_BUS_WIDTH_128       (4 << 28)
+#define TEGRA_APBDMA_AHBSEQ_DATA_SWAP           BIT(27)
+#define TEGRA_APBDMA_AHBSEQ_BURST_1             (4 << 24)
+#define TEGRA_APBDMA_AHBSEQ_BURST_4             (5 << 24)
+#define TEGRA_APBDMA_AHBSEQ_BURST_8             (6 << 24)
+#define TEGRA_APBDMA_AHBSEQ_DBL_BUF             BIT(19)
+#define TEGRA_APBDMA_AHBSEQ_WRAP_SHIFT          16
+#define TEGRA_APBDMA_AHBSEQ_WRAP_NONE           0
+/* APB address */
+#define TEGRA_APBDMA_CHAN_APBPTR                0x018
+/* APB sequence register */
+#define TEGRA_APBDMA_CHAN_APBSEQ                0x01c
+#define TEGRA_APBDMA_APBSEQ_BUS_WIDTH_8         (0 << 28)
+#define TEGRA_APBDMA_APBSEQ_BUS_WIDTH_16        (1 << 28)
+#define TEGRA_APBDMA_APBSEQ_BUS_WIDTH_32        (2 << 28)
+#define TEGRA_APBDMA_APBSEQ_BUS_WIDTH_64        (3 << 28)
+#define TEGRA_APBDMA_APBSEQ_BUS_WIDTH_128       (4 << 28)
+#define TEGRA_APBDMA_APBSEQ_DATA_SWAP           BIT(27)
+#define TEGRA_APBDMA_APBSEQ_WRAP_WORD_1         (1 << 16)
+/*
+ * If any burst is in flight and DMA paused then this is the time to complete
+ * on-flight burst and update DMA status register.
+ */
+#define TEGRA_APBDMA_BURST_COMPLETE_TIME        20
+/* Channel base address offset from APBDMA base address */
+#define TEGRA_APBDMA_CHANNEL_BASE_ADD_OFFSET    0x1000
+/* DMA channel register space size */
+#define TEGRA_APBDMA_CHANNEL_REGISTER_SIZE      0x20
+struct tegra_dma;
+/*
+ * tegra_dma_chip_data Tegra chip specific DMA data
+ * @nr_channels: Number of channels available in the controller.
+ * @max_dma_count: Maximum DMA transfer count supported by DMA controller.
+ */
+struct tegra_dma_chip_data {
+        int nr_channels;
+        int max_dma_count;
+};
+/* DMA channel registers */
+struct tegra_dma_channel_regs {
+        unsigned long   csr;
+        unsigned long   ahb_ptr;
+        unsigned long   apb_ptr;
+        unsigned long   ahb_seq;
+        unsigned long   apb_seq;
+};
+/*
+ * tegra_dma_sg_req: Dma request details to configure hardware. This
+ * contains the details for one transfer to configure DMA hw.
+ * The client's request for data transfer can be broken into multiple
+ * sub-transfer as per requester details and hw support.
+ * This sub transfer get added in the list of transfer and point to Tegra
+ * DMA descriptor which manages the transfer details.
+ */
+struct tegra_dma_sg_req {
+        struct tegra_dma_channel_regs   ch_regs;
+        int                             req_len;
+        bool                            configured;
+        bool                            last_sg;
+        bool                            half_done;
+        struct list_head                node;
+        struct tegra_dma_desc           *dma_desc;
+};
+/*
+ * tegra_dma_desc: Tegra DMA descriptors which manages the client requests.
+ * This descriptor keep track of transfer status, callbacks and request
+ * counts etc.
+ */
+struct tegra_dma_desc {
+        struct dma_async_tx_descriptor  txd;
+        int                             bytes_requested;
+        int                             bytes_transferred;
+        enum dma_status                 dma_status;
+        struct list_head                node;
+        struct list_head                tx_list;
+        struct list_head                cb_node;
+        int                             cb_count;
+};
+struct tegra_dma_channel;
+typedef void (*dma_isr_handler)(struct tegra_dma_channel *tdc,
+                                bool to_terminate);
+/* tegra_dma_channel: Channel specific information */
+struct tegra_dma_channel {
+        struct dma_chan         dma_chan;
+        bool                    config_init;
+        int                     id;
+        int                     irq;
+        unsigned long           chan_base_offset;
+        spinlock_t              lock;
+        bool                    busy;
+        struct tegra_dma        *tdma;
+        bool                    cyclic;
+        /* Different lists for managing the requests */
+        struct list_head        free_sg_req;
+        struct list_head        pending_sg_req;
+        struct list_head        free_dma_desc;
+        struct list_head        cb_desc;
+        /* ISR handler and tasklet for bottom half of isr handling */
+        dma_isr_handler         isr_handler;
+        struct tasklet_struct   tasklet;
+        dma_async_tx_callback   callback;
+        void                    *callback_param;
+        /* Channel-slave specific configuration */
+        struct dma_slave_config dma_sconfig;
+};
+/* tegra_dma: Tegra DMA specific information */
+struct tegra_dma {
+        struct dma_device               dma_dev;
+        struct device                   *dev;
+        struct clk                      *dma_clk;
+        spinlock_t                      global_lock;
+        void __iomem                    *base_addr;
+        struct tegra_dma_chip_data      *chip_data;
+        /* Some register need to be cache before suspend */
+        u32                             reg_gen;
+        /* Last member of the structure */
+        struct tegra_dma_channel channels[0];
+};
+static inline void tdma_write(struct tegra_dma *tdma, u32 reg, u32 val)
+{
+        writel(val, tdma->base_addr + reg);
+}
+static inline u32 tdma_read(struct tegra_dma *tdma, u32 reg)
+{
+        return readl(tdma->base_addr + reg);
+}
+static inline void tdc_write(struct tegra_dma_channel *tdc,
+                u32 reg, u32 val)
+{
+        writel(val, tdc->tdma->base_addr + tdc->chan_base_offset + reg);
+}
+static inline u32 tdc_read(struct tegra_dma_channel *tdc, u32 reg)
+{
+        return readl(tdc->tdma->base_addr + tdc->chan_base_offset + reg);
+}
+static inline struct tegra_dma_channel *to_tegra_dma_chan(struct dma_chan *dc)
+{
+        return container_of(dc, struct tegra_dma_channel, dma_chan);
+}
+static inline struct tegra_dma_desc *txd_to_tegra_dma_desc(
+                struct dma_async_tx_descriptor *td)
+{
+        return container_of(td, struct tegra_dma_desc, txd);
+}
+static inline struct device *tdc2dev(struct tegra_dma_channel *tdc)
+{
+        return &tdc->dma_chan.dev->device;
+}
+static dma_cookie_t tegra_dma_tx_submit(struct dma_async_tx_descriptor *tx);
+static int tegra_dma_runtime_suspend(struct device *dev);
+static int tegra_dma_runtime_resume(struct device *dev);
+/* Get DMA desc from free list, if not there then allocate it.  */
+static struct tegra_dma_desc *tegra_dma_desc_get(
+                struct tegra_dma_channel *tdc)
+{
+        struct tegra_dma_desc *dma_desc;
+        unsigned long flags;
+        spin_lock_irqsave(&tdc->lock, flags);
+        /* Do not allocate if desc are waiting for ack */
+        list_for_each_entry(dma_desc, &tdc->free_dma_desc, node) {
+                if (async_tx_test_ack(&dma_desc->txd)) {
+                        list_del(&dma_desc->node);
+                        spin_unlock_irqrestore(&tdc->lock, flags);
+                        return dma_desc;
+                }
+        }
+        spin_unlock_irqrestore(&tdc->lock, flags);
+        /* Allocate DMA desc */
+        dma_desc = kzalloc(sizeof(*dma_desc), GFP_ATOMIC);
+        if (!dma_desc) {
+                dev_err(tdc2dev(tdc), "dma_desc alloc failed\n");
+                return NULL;
+        }
+        dma_async_tx_descriptor_init(&dma_desc->txd, &tdc->dma_chan);
+        dma_desc->txd.tx_submit = tegra_dma_tx_submit;
+        dma_desc->txd.flags = 0;
+        return dma_desc;
+}
+static void tegra_dma_desc_put(struct tegra_dma_channel *tdc,
+                struct tegra_dma_desc *dma_desc)
+{
+        unsigned long flags;
+        spin_lock_irqsave(&tdc->lock, flags);
+        if (!list_empty(&dma_desc->tx_list))
+                list_splice_init(&dma_desc->tx_list, &tdc->free_sg_req);
+        list_add_tail(&dma_desc->node, &tdc->free_dma_desc);
+        spin_unlock_irqrestore(&tdc->lock, flags);
+}
+static struct tegra_dma_sg_req *tegra_dma_sg_req_get(
+                struct tegra_dma_channel *tdc)
+{
+        struct tegra_dma_sg_req *sg_req = NULL;
+        unsigned long flags;
+        spin_lock_irqsave(&tdc->lock, flags);
+        if (!list_empty(&tdc->free_sg_req)) {
+                sg_req = list_first_entry(&tdc->free_sg_req,
+                                        typeof(*sg_req), node);
+                list_del(&sg_req->node);
+                spin_unlock_irqrestore(&tdc->lock, flags);
+                return sg_req;
+        }
+        spin_unlock_irqrestore(&tdc->lock, flags);
+        sg_req = kzalloc(sizeof(struct tegra_dma_sg_req), GFP_ATOMIC);
+        if (!sg_req)
+                dev_err(tdc2dev(tdc), "sg_req alloc failed\n");
+        return sg_req;
+}
+static int tegra_dma_slave_config(struct dma_chan *dc,
+                struct dma_slave_config *sconfig)
+{
+        struct tegra_dma_channel *tdc = to_tegra_dma_chan(dc);
+        if (!list_empty(&tdc->pending_sg_req)) {
+                dev_err(tdc2dev(tdc), "Configuration not allowed\n");
+                return -EBUSY;
+        }
+        memcpy(&tdc->dma_sconfig, sconfig, sizeof(*sconfig));
+        tdc->config_init = true;
+        return 0;
+}
+static void tegra_dma_global_pause(struct tegra_dma_channel *tdc,
+        bool wait_for_burst_complete)
+{
+        struct tegra_dma *tdma = tdc->tdma;
+        spin_lock(&tdma->global_lock);
+        tdma_write(tdma, TEGRA_APBDMA_GENERAL, 0);
+        if (wait_for_burst_complete)
+                udelay(TEGRA_APBDMA_BURST_COMPLETE_TIME);
+}
+static void tegra_dma_global_resume(struct tegra_dma_channel *tdc)
+{
+        struct tegra_dma *tdma = tdc->tdma;
+        tdma_write(tdma, TEGRA_APBDMA_GENERAL, TEGRA_APBDMA_GENERAL_ENABLE);
+        spin_unlock(&tdma->global_lock);
+}
+static void tegra_dma_stop(struct tegra_dma_channel *tdc)
+{
+        u32 csr;
+        u32 status;
+        /* Disable interrupts */
+        csr = tdc_read(tdc, TEGRA_APBDMA_CHAN_CSR);
+        csr &= ~TEGRA_APBDMA_CSR_IE_EOC;
+        tdc_write(tdc, TEGRA_APBDMA_CHAN_CSR, csr);
+        /* Disable DMA */
+        csr &= ~TEGRA_APBDMA_CSR_ENB;
+        tdc_write(tdc, TEGRA_APBDMA_CHAN_CSR, csr);
+        /* Clear interrupt status if it is there */
+        status = tdc_read(tdc, TEGRA_APBDMA_CHAN_STATUS);
+        if (status & TEGRA_APBDMA_STATUS_ISE_EOC) {
+                dev_dbg(tdc2dev(tdc), "%s():clearing interrupt\n", __func__);
+                tdc_write(tdc, TEGRA_APBDMA_CHAN_STATUS, status);
+        }
+        tdc->busy = false;
+}
+static void tegra_dma_start(struct tegra_dma_channel *tdc,
+                struct tegra_dma_sg_req *sg_req)
+{
+        struct tegra_dma_channel_regs *ch_regs = &sg_req->ch_regs;
+        tdc_write(tdc, TEGRA_APBDMA_CHAN_CSR, ch_regs->csr);
+        tdc_write(tdc, TEGRA_APBDMA_CHAN_APBSEQ, ch_regs->apb_seq);
+        tdc_write(tdc, TEGRA_APBDMA_CHAN_APBPTR, ch_regs->apb_ptr);
+        tdc_write(tdc, TEGRA_APBDMA_CHAN_AHBSEQ, ch_regs->ahb_seq);
+        tdc_write(tdc, TEGRA_APBDMA_CHAN_AHBPTR, ch_regs->ahb_ptr);
+        /* Start DMA */
+        tdc_write(tdc, TEGRA_APBDMA_CHAN_CSR,
+                                ch_regs->csr | TEGRA_APBDMA_CSR_ENB);
+}
+static void tegra_dma_configure_for_next(struct tegra_dma_channel *tdc,
+                struct tegra_dma_sg_req *nsg_req)
+{
+        unsigned long status;
+        /*
+         * The DMA controller reloads the new configuration for next transfer
+         * after last burst of current transfer completes.
+         * If there is no IEC status then this makes sure that last burst
+         * has not be completed. There may be case that last burst is on
+         * flight and so it can complete but because DMA is paused, it
+         * will not generates interrupt as well as not reload the new
+         * configuration.
+         * If there is already IEC status then interrupt handler need to
+         * load new configuration.
+         */
+        tegra_dma_global_pause(tdc, false);
+        status  = tdc_read(tdc, TEGRA_APBDMA_CHAN_STATUS);
+        /*
+         * If interrupt is pending then do nothing as the ISR will handle
+         * the programing for new request.
+         */
+        if (status & TEGRA_APBDMA_STATUS_ISE_EOC) {
+                dev_err(tdc2dev(tdc),
+                        "Skipping new configuration as interrupt is pending\n");
+                tegra_dma_global_resume(tdc);
+                return;
+        }
+        /* Safe to program new configuration */
+        tdc_write(tdc, TEGRA_APBDMA_CHAN_APBPTR, nsg_req->ch_regs.apb_ptr);
+        tdc_write(tdc, TEGRA_APBDMA_CHAN_AHBPTR, nsg_req->ch_regs.ahb_ptr);
+        tdc_write(tdc, TEGRA_APBDMA_CHAN_CSR,
+                                nsg_req->ch_regs.csr | TEGRA_APBDMA_CSR_ENB);
+        nsg_req->configured = true;
+        tegra_dma_global_resume(tdc);
+}
+static void tdc_start_head_req(struct tegra_dma_channel *tdc)
+{
+        struct tegra_dma_sg_req *sg_req;
+        if (list_empty(&tdc->pending_sg_req))
+                return;
+        sg_req = list_first_entry(&tdc->pending_sg_req,
+                                        typeof(*sg_req), node);
+        tegra_dma_start(tdc, sg_req);
+        sg_req->configured = true;
+        tdc->busy = true;
+}
+static void tdc_configure_next_head_desc(struct tegra_dma_channel *tdc)
+{
+        struct tegra_dma_sg_req *hsgreq;
+        struct tegra_dma_sg_req *hnsgreq;
+        if (list_empty(&tdc->pending_sg_req))
+                return;
+        hsgreq = list_first_entry(&tdc->pending_sg_req, typeof(*hsgreq), node);
+        if (!list_is_last(&hsgreq->node, &tdc->pending_sg_req)) {
+                hnsgreq = list_first_entry(&hsgreq->node,
+                                        typeof(*hnsgreq), node);
+                tegra_dma_configure_for_next(tdc, hnsgreq);
+        }
+}
+static inline int get_current_xferred_count(struct tegra_dma_channel *tdc,
+        struct tegra_dma_sg_req *sg_req, unsigned long status)
+{
+        return sg_req->req_len - (status & TEGRA_APBDMA_STATUS_COUNT_MASK) - 4;
+}
+static void tegra_dma_abort_all(struct tegra_dma_channel *tdc)
+{
+        struct tegra_dma_sg_req *sgreq;
+        struct tegra_dma_desc *dma_desc;
+        while (!list_empty(&tdc->pending_sg_req)) {
+                sgreq = list_first_entry(&tdc->pending_sg_req,
+                                                typeof(*sgreq), node);
+                list_del(&sgreq->node);
+                list_add_tail(&sgreq->node, &tdc->free_sg_req);
+                if (sgreq->last_sg) {
+                        dma_desc = sgreq->dma_desc;
+                        dma_desc->dma_status = DMA_ERROR;
+                        list_add_tail(&dma_desc->node, &tdc->free_dma_desc);
+                        /* Add in cb list if it is not there. */
+                        if (!dma_desc->cb_count)
+                                list_add_tail(&dma_desc->cb_node,
+                                                        &tdc->cb_desc);
+                        dma_desc->cb_count++;
+                }
+        }
+        tdc->isr_handler = NULL;
+}
+static bool handle_continuous_head_request(struct tegra_dma_channel *tdc,
+                struct tegra_dma_sg_req *last_sg_req, bool to_terminate)
+{
+        struct tegra_dma_sg_req *hsgreq = NULL;
+        if (list_empty(&tdc->pending_sg_req)) {
+                dev_err(tdc2dev(tdc), "Dma is running without req\n");
+                tegra_dma_stop(tdc);
+                return false;
+        }
+        /*
+         * Check that head req on list should be in flight.
+         * If it is not in flight then abort transfer as
+         * looping of transfer can not continue.
+         */
+        hsgreq = list_first_entry(&tdc->pending_sg_req, typeof(*hsgreq), node);
+        if (!hsgreq->configured) {
+                tegra_dma_stop(tdc);
+                dev_err(tdc2dev(tdc), "Error in dma transfer, aborting dma\n");
+                tegra_dma_abort_all(tdc);
+                return false;
+        }
+        /* Configure next request */
+        if (!to_terminate)
+                tdc_configure_next_head_desc(tdc);
+        return true;
+}
+static void handle_once_dma_done(struct tegra_dma_channel *tdc,
+        bool to_terminate)
+{
+        struct tegra_dma_sg_req *sgreq;
+        struct tegra_dma_desc *dma_desc;
+        tdc->busy = false;
+        sgreq = list_first_entry(&tdc->pending_sg_req, typeof(*sgreq), node);
+        dma_desc = sgreq->dma_desc;
+        dma_desc->bytes_transferred += sgreq->req_len;
+        list_del(&sgreq->node);
+        if (sgreq->last_sg) {
+                dma_desc->dma_status = DMA_SUCCESS;
+                dma_cookie_complete(&dma_desc->txd);
+                if (!dma_desc->cb_count)
+                        list_add_tail(&dma_desc->cb_node, &tdc->cb_desc);
+                dma_desc->cb_count++;
+                list_add_tail(&dma_desc->node, &tdc->free_dma_desc);
+        }
+        list_add_tail(&sgreq->node, &tdc->free_sg_req);
+        /* Do not start DMA if it is going to be terminate */
+        if (to_terminate || list_empty(&tdc->pending_sg_req))
+                return;
+        tdc_start_head_req(tdc);
+        return;
+}
+static void handle_cont_sngl_cycle_dma_done(struct tegra_dma_channel *tdc,
+                bool to_terminate)
+{
+        struct tegra_dma_sg_req *sgreq;
+        struct tegra_dma_desc *dma_desc;
+        bool st;
+        sgreq = list_first_entry(&tdc->pending_sg_req, typeof(*sgreq), node);
+        dma_desc = sgreq->dma_desc;
+        dma_desc->bytes_transferred += sgreq->req_len;
+        /* Callback need to be call */
+        if (!dma_desc->cb_count)
+                list_add_tail(&dma_desc->cb_node, &tdc->cb_desc);
+        dma_desc->cb_count++;
+        /* If not last req then put at end of pending list */
+        if (!list_is_last(&sgreq->node, &tdc->pending_sg_req)) {
+                list_del(&sgreq->node);
+                list_add_tail(&sgreq->node, &tdc->pending_sg_req);
+                sgreq->configured = false;
+                st = handle_continuous_head_request(tdc, sgreq, to_terminate);
+                if (!st)
+                        dma_desc->dma_status = DMA_ERROR;
+        }
+        return;
+}
+static void tegra_dma_tasklet(unsigned long data)
+{
+        struct tegra_dma_channel *tdc = (struct tegra_dma_channel *)data;
+        dma_async_tx_callback callback = NULL;
+        void *callback_param = NULL;
+        struct tegra_dma_desc *dma_desc;
+        unsigned long flags;
+        int cb_count;
+        spin_lock_irqsave(&tdc->lock, flags);
+        while (!list_empty(&tdc->cb_desc)) {
+                dma_desc  = list_first_entry(&tdc->cb_desc,
+                                        typeof(*dma_desc), cb_node);
+                list_del(&dma_desc->cb_node);
+                callback = dma_desc->txd.callback;
+                callback_param = dma_desc->txd.callback_param;
+                cb_count = dma_desc->cb_count;
+                dma_desc->cb_count = 0;
+                spin_unlock_irqrestore(&tdc->lock, flags);
+                while (cb_count-- && callback)
+                        callback(callback_param);
+                spin_lock_irqsave(&tdc->lock, flags);
+        }
+        spin_unlock_irqrestore(&tdc->lock, flags);
+}
+static irqreturn_t tegra_dma_isr(int irq, void *dev_id)
+{
+        struct tegra_dma_channel *tdc = dev_id;
+        unsigned long status;
+        unsigned long flags;
+        spin_lock_irqsave(&tdc->lock, flags);
+        status = tdc_read(tdc, TEGRA_APBDMA_CHAN_STATUS);
+        if (status & TEGRA_APBDMA_STATUS_ISE_EOC) {
+                tdc_write(tdc, TEGRA_APBDMA_CHAN_STATUS, status);
+                tdc->isr_handler(tdc, false);
+                tasklet_schedule(&tdc->tasklet);
+                spin_unlock_irqrestore(&tdc->lock, flags);
+                return IRQ_HANDLED;
+        }
+        spin_unlock_irqrestore(&tdc->lock, flags);
+        dev_info(tdc2dev(tdc),
+                "Interrupt already served status 0x%08lx\n", status);
+        return IRQ_NONE;
+}
+static dma_cookie_t tegra_dma_tx_submit(struct dma_async_tx_descriptor *txd)
+{
+        struct tegra_dma_desc *dma_desc = txd_to_tegra_dma_desc(txd);
+        struct tegra_dma_channel *tdc = to_tegra_dma_chan(txd->chan);
+        unsigned long flags;
+        dma_cookie_t cookie;
+        spin_lock_irqsave(&tdc->lock, flags);
+        dma_desc->dma_status = DMA_IN_PROGRESS;
+        cookie = dma_cookie_assign(&dma_desc->txd);
+        list_splice_tail_init(&dma_desc->tx_list, &tdc->pending_sg_req);
+        spin_unlock_irqrestore(&tdc->lock, flags);
+        return cookie;
+}
+static void tegra_dma_issue_pending(struct dma_chan *dc)
+{
+        struct tegra_dma_channel *tdc = to_tegra_dma_chan(dc);
+        unsigned long flags;
+        spin_lock_irqsave(&tdc->lock, flags);
+        if (list_empty(&tdc->pending_sg_req)) {
+                dev_err(tdc2dev(tdc), "No DMA request\n");
+                goto end;
+        }
+        if (!tdc->busy) {
+                tdc_start_head_req(tdc);
+                /* Continuous single mode: Configure next req */
+                if (tdc->cyclic) {
+                        /*
+                         * Wait for 1 burst time for configure DMA for
+                         * next transfer.
+                         */
+                        udelay(TEGRA_APBDMA_BURST_COMPLETE_TIME);
+                        tdc_configure_next_head_desc(tdc);
+                }
+        }
+end:
+        spin_unlock_irqrestore(&tdc->lock, flags);
+        return;
+}
+static void tegra_dma_terminate_all(struct dma_chan *dc)
+{
+        struct tegra_dma_channel *tdc = to_tegra_dma_chan(dc);
+        struct tegra_dma_sg_req *sgreq;
+        struct tegra_dma_desc *dma_desc;
+        unsigned long flags;
+        unsigned long status;
+        bool was_busy;
+        spin_lock_irqsave(&tdc->lock, flags);
+        if (list_empty(&tdc->pending_sg_req)) {
+                spin_unlock_irqrestore(&tdc->lock, flags);
+                return;
+        }
+        if (!tdc->busy)
+                goto skip_dma_stop;
+        /* Pause DMA before checking the queue status */
+        tegra_dma_global_pause(tdc, true);
+        status = tdc_read(tdc, TEGRA_APBDMA_CHAN_STATUS);
+        if (status & TEGRA_APBDMA_STATUS_ISE_EOC) {
+                dev_dbg(tdc2dev(tdc), "%s():handling isr\n", __func__);
+                tdc->isr_handler(tdc, true);
+                status = tdc_read(tdc, TEGRA_APBDMA_CHAN_STATUS);
+        }
+        was_busy = tdc->busy;
+        tegra_dma_stop(tdc);
+        if (!list_empty(&tdc->pending_sg_req) && was_busy) {
+                sgreq = list_first_entry(&tdc->pending_sg_req,
+                                        typeof(*sgreq), node);
+                sgreq->dma_desc->bytes_transferred +=
+                                get_current_xferred_count(tdc, sgreq, status);
+        }
+        tegra_dma_global_resume(tdc);
+skip_dma_stop:
+        tegra_dma_abort_all(tdc);
+        while (!list_empty(&tdc->cb_desc)) {
+                dma_desc  = list_first_entry(&tdc->cb_desc,
+                                        typeof(*dma_desc), cb_node);
+                list_del(&dma_desc->cb_node);
+                dma_desc->cb_count = 0;
+        }
+        spin_unlock_irqrestore(&tdc->lock, flags);
+}
+static enum dma_status tegra_dma_tx_status(struct dma_chan *dc,
+        dma_cookie_t cookie, struct dma_tx_state *txstate)
+{
+        struct tegra_dma_channel *tdc = to_tegra_dma_chan(dc);
+        struct tegra_dma_desc *dma_desc;
+        struct tegra_dma_sg_req *sg_req;
+        enum dma_status ret;
+        unsigned long flags;
+        unsigned int residual;
+        spin_lock_irqsave(&tdc->lock, flags);
+        ret = dma_cookie_status(dc, cookie, txstate);
+        if (ret == DMA_SUCCESS) {
+                dma_set_residue(txstate, 0);
+                spin_unlock_irqrestore(&tdc->lock, flags);
+                return ret;
+        }
+        /* Check on wait_ack desc status */
+        list_for_each_entry(dma_desc, &tdc->free_dma_desc, node) {
+                if (dma_desc->txd.cookie == cookie) {
+                        residual =  dma_desc->bytes_requested -
+                                        (dma_desc->bytes_transferred %
+                                                dma_desc->bytes_requested);
+                        dma_set_residue(txstate, residual);
+                        ret = dma_desc->dma_status;
+                        spin_unlock_irqrestore(&tdc->lock, flags);
+                        return ret;
+                }
+        }
+        /* Check in pending list */
+        list_for_each_entry(sg_req, &tdc->pending_sg_req, node) {
+                dma_desc = sg_req->dma_desc;
+                if (dma_desc->txd.cookie == cookie) {
+                        residual =  dma_desc->bytes_requested -
+                                        (dma_desc->bytes_transferred %
+                                                dma_desc->bytes_requested);
+                        dma_set_residue(txstate, residual);
+                        ret = dma_desc->dma_status;
+                        spin_unlock_irqrestore(&tdc->lock, flags);
+                        return ret;
+                }
+        }
+        dev_dbg(tdc2dev(tdc), "cookie %d does not found\n", cookie);
+        spin_unlock_irqrestore(&tdc->lock, flags);
+        return ret;
+}
+static int tegra_dma_device_control(struct dma_chan *dc, enum dma_ctrl_cmd cmd,
+                        unsigned long arg)
+{
+        switch (cmd) {
+        case DMA_SLAVE_CONFIG:
+                return tegra_dma_slave_config(dc,
+                                (struct dma_slave_config *)arg);
+        case DMA_TERMINATE_ALL:
+                tegra_dma_terminate_all(dc);
+                return 0;
+        default:
+                break;
+        }
+        return -ENXIO;
+}
+static inline int get_bus_width(struct tegra_dma_channel *tdc,
+                enum dma_slave_buswidth slave_bw)
+{
+        switch (slave_bw) {
+        case DMA_SLAVE_BUSWIDTH_1_BYTE:
+                return TEGRA_APBDMA_APBSEQ_BUS_WIDTH_8;
+        case DMA_SLAVE_BUSWIDTH_2_BYTES:
+                return TEGRA_APBDMA_APBSEQ_BUS_WIDTH_16;
+        case DMA_SLAVE_BUSWIDTH_4_BYTES:
+                return TEGRA_APBDMA_APBSEQ_BUS_WIDTH_32;
+        case DMA_SLAVE_BUSWIDTH_8_BYTES:
+                return TEGRA_APBDMA_APBSEQ_BUS_WIDTH_64;
+        default:
+                dev_warn(tdc2dev(tdc),
+                        "slave bw is not supported, using 32bits\n");
+                return TEGRA_APBDMA_APBSEQ_BUS_WIDTH_32;
+        }
+}
+static inline int get_burst_size(struct tegra_dma_channel *tdc,
+        u32 burst_size, enum dma_slave_buswidth slave_bw, int len)
+{
+        int burst_byte;
+        int burst_ahb_width;
+        /*
+         * burst_size from client is in terms of the bus_width.
+         * convert them into AHB memory width which is 4 byte.
+         */
+        burst_byte = burst_size * slave_bw;
+        burst_ahb_width = burst_byte / 4;
+        /* If burst size is 0 then calculate the burst size based on length */
+        if (!burst_ahb_width) {
+                if (len & 0xF)
+                        return TEGRA_APBDMA_AHBSEQ_BURST_1;
+                else if ((len >> 4) & 0x1)
+                        return TEGRA_APBDMA_AHBSEQ_BURST_4;
+                else
+                        return TEGRA_APBDMA_AHBSEQ_BURST_8;
+        }
+        if (burst_ahb_width < 4)
+                return TEGRA_APBDMA_AHBSEQ_BURST_1;
+        else if (burst_ahb_width < 8)
+                return TEGRA_APBDMA_AHBSEQ_BURST_4;
+        else
+                return TEGRA_APBDMA_AHBSEQ_BURST_8;
+}
+static int get_transfer_param(struct tegra_dma_channel *tdc,
+        enum dma_transfer_direction direction, unsigned long *apb_addr,
+        unsigned long *apb_seq, unsigned long *csr, unsigned int *burst_size,
+        enum dma_slave_buswidth *slave_bw)
+{
+        switch (direction) {
+        case DMA_MEM_TO_DEV:
+                *apb_addr = tdc->dma_sconfig.dst_addr;
+                *apb_seq = get_bus_width(tdc, tdc->dma_sconfig.dst_addr_width);
+                *burst_size = tdc->dma_sconfig.dst_maxburst;
+                *slave_bw = tdc->dma_sconfig.dst_addr_width;
+                *csr = TEGRA_APBDMA_CSR_DIR;
+                return 0;
+        case DMA_DEV_TO_MEM:
+                *apb_addr = tdc->dma_sconfig.src_addr;
+                *apb_seq = get_bus_width(tdc, tdc->dma_sconfig.src_addr_width);
+                *burst_size = tdc->dma_sconfig.src_maxburst;
+                *slave_bw = tdc->dma_sconfig.src_addr_width;
+                *csr = 0;
+                return 0;
+        default:
+                dev_err(tdc2dev(tdc), "Dma direction is not supported\n");
+                return -EINVAL;
+        }
+        return -EINVAL;
+}
+static struct dma_async_tx_descriptor *tegra_dma_prep_slave_sg(
+        struct dma_chan *dc, struct scatterlist *sgl, unsigned int sg_len,
+        enum dma_transfer_direction direction, unsigned long flags,
+        void *context)
+{
+        struct tegra_dma_channel *tdc = to_tegra_dma_chan(dc);
+        struct tegra_dma_desc *dma_desc;
+        unsigned int        i;
+        struct scatterlist      *sg;
+        unsigned long csr, ahb_seq, apb_ptr, apb_seq;
+        struct list_head req_list;
+        struct tegra_dma_sg_req  *sg_req = NULL;
+        u32 burst_size;
+        enum dma_slave_buswidth slave_bw;
+        int ret;
+        if (!tdc->config_init) {
+                dev_err(tdc2dev(tdc), "dma channel is not configured\n");
+                return NULL;
+        }
+        if (sg_len < 1) {
+                dev_err(tdc2dev(tdc), "Invalid segment length %d\n", sg_len);
+                return NULL;
+        }
+        ret = get_transfer_param(tdc, direction, &apb_ptr, &apb_seq, &csr,
+                                &burst_size, &slave_bw);
+        if (ret < 0)
+                return NULL;
+        INIT_LIST_HEAD(&req_list);
+        ahb_seq = TEGRA_APBDMA_AHBSEQ_INTR_ENB;
+        ahb_seq |= TEGRA_APBDMA_AHBSEQ_WRAP_NONE <<
+                                        TEGRA_APBDMA_AHBSEQ_WRAP_SHIFT;
+        ahb_seq |= TEGRA_APBDMA_AHBSEQ_BUS_WIDTH_32;
+        csr |= TEGRA_APBDMA_CSR_ONCE | TEGRA_APBDMA_CSR_FLOW;
+        csr |= tdc->dma_sconfig.slave_id << TEGRA_APBDMA_CSR_REQ_SEL_SHIFT;
+        if (flags & DMA_PREP_INTERRUPT)
+                csr |= TEGRA_APBDMA_CSR_IE_EOC;
+        apb_seq |= TEGRA_APBDMA_APBSEQ_WRAP_WORD_1;
+        dma_desc = tegra_dma_desc_get(tdc);
+        if (!dma_desc) {
+                dev_err(tdc2dev(tdc), "Dma descriptors not available\n");
+                return NULL;
+        }
+        INIT_LIST_HEAD(&dma_desc->tx_list);
+        INIT_LIST_HEAD(&dma_desc->cb_node);
+        dma_desc->cb_count = 0;
+        dma_desc->bytes_requested = 0;
+        dma_desc->bytes_transferred = 0;
+        dma_desc->dma_status = DMA_IN_PROGRESS;
+        /* Make transfer requests */
+        for_each_sg(sgl, sg, sg_len, i) {
+                u32 len, mem;
+                mem = sg_dma_address(sg);
+                len = sg_dma_len(sg);
+                if ((len & 3) || (mem & 3) ||
+                                (len > tdc->tdma->chip_data->max_dma_count)) {
+                        dev_err(tdc2dev(tdc),
+                                "Dma length/memory address is not supported\n");
+                        tegra_dma_desc_put(tdc, dma_desc);
+                        return NULL;
+                }
+                sg_req = tegra_dma_sg_req_get(tdc);
+                if (!sg_req) {
+                        dev_err(tdc2dev(tdc), "Dma sg-req not available\n");
+                        tegra_dma_desc_put(tdc, dma_desc);
+                        return NULL;
+                }
+                ahb_seq |= get_burst_size(tdc, burst_size, slave_bw, len);
+                dma_desc->bytes_requested += len;
+                sg_req->ch_regs.apb_ptr = apb_ptr;
+                sg_req->ch_regs.ahb_ptr = mem;
+                sg_req->ch_regs.csr = csr | ((len - 4) & 0xFFFC);
+                sg_req->ch_regs.apb_seq = apb_seq;
+                sg_req->ch_regs.ahb_seq = ahb_seq;
+                sg_req->configured = false;
+                sg_req->last_sg = false;
+                sg_req->dma_desc = dma_desc;
+                sg_req->req_len = len;
+                list_add_tail(&sg_req->node, &dma_desc->tx_list);
+        }
+        sg_req->last_sg = true;
+        if (flags & DMA_CTRL_ACK)
+                dma_desc->txd.flags = DMA_CTRL_ACK;
+        /*
+         * Make sure that mode should not be conflicting with currently
+         * configured mode.
+         */
+        if (!tdc->isr_handler) {
+                tdc->isr_handler = handle_once_dma_done;
+                tdc->cyclic = false;
+        } else {
+                if (tdc->cyclic) {
+                        dev_err(tdc2dev(tdc), "DMA configured in cyclic mode\n");
+                        tegra_dma_desc_put(tdc, dma_desc);
+                        return NULL;
+                }
+        }
+        return &dma_desc->txd;
+}
+struct dma_async_tx_descriptor *tegra_dma_prep_dma_cyclic(
+        struct dma_chan *dc, dma_addr_t buf_addr, size_t buf_len,
+        size_t period_len, enum dma_transfer_direction direction,
+        void *context)
+{
+        struct tegra_dma_channel *tdc = to_tegra_dma_chan(dc);
+        struct tegra_dma_desc *dma_desc = NULL;
+        struct tegra_dma_sg_req  *sg_req = NULL;
+        unsigned long csr, ahb_seq, apb_ptr, apb_seq;
+        int len;
+        size_t remain_len;
+        dma_addr_t mem = buf_addr;
+        u32 burst_size;
+        enum dma_slave_buswidth slave_bw;
+        int ret;
+        if (!buf_len || !period_len) {
+                dev_err(tdc2dev(tdc), "Invalid buffer/period len\n");
+                return NULL;
+        }
+        if (!tdc->config_init) {
+                dev_err(tdc2dev(tdc), "DMA slave is not configured\n");
+                return NULL;
+        }
+        /*
+         * We allow to take more number of requests till DMA is
+         * not started. The driver will loop over all requests.
+         * Once DMA is started then new requests can be queued only after
+         * terminating the DMA.
+         */
+        if (tdc->busy) {
+                dev_err(tdc2dev(tdc), "Request not allowed when dma running\n");
+                return NULL;
+        }
+        /*
+         * We only support cycle transfer when buf_len is multiple of
+         * period_len.
+         */
+        if (buf_len % period_len) {
+                dev_err(tdc2dev(tdc), "buf_len is not multiple of period_len\n");
+                return NULL;
+        }
+        len = period_len;
+        if ((len & 3) || (buf_addr & 3) ||
+                        (len > tdc->tdma->chip_data->max_dma_count)) {
+                dev_err(tdc2dev(tdc), "Req len/mem address is not correct\n");
+                return NULL;
+        }
+        ret = get_transfer_param(tdc, direction, &apb_ptr, &apb_seq, &csr,
+                                &burst_size, &slave_bw);
+        if (ret < 0)
+                return NULL;
+        ahb_seq = TEGRA_APBDMA_AHBSEQ_INTR_ENB;
+        ahb_seq |= TEGRA_APBDMA_AHBSEQ_WRAP_NONE <<
+                                        TEGRA_APBDMA_AHBSEQ_WRAP_SHIFT;
+        ahb_seq |= TEGRA_APBDMA_AHBSEQ_BUS_WIDTH_32;
+        csr |= TEGRA_APBDMA_CSR_FLOW | TEGRA_APBDMA_CSR_IE_EOC;
+        csr |= tdc->dma_sconfig.slave_id << TEGRA_APBDMA_CSR_REQ_SEL_SHIFT;
+        apb_seq |= TEGRA_APBDMA_APBSEQ_WRAP_WORD_1;
+        dma_desc = tegra_dma_desc_get(tdc);
+        if (!dma_desc) {
+                dev_err(tdc2dev(tdc), "not enough descriptors available\n");
+                return NULL;
+        }
+        INIT_LIST_HEAD(&dma_desc->tx_list);
+        INIT_LIST_HEAD(&dma_desc->cb_node);
+        dma_desc->cb_count = 0;
+        dma_desc->bytes_transferred = 0;
+        dma_desc->bytes_requested = buf_len;
+        remain_len = buf_len;
+        /* Split transfer equal to period size */
+        while (remain_len) {
+                sg_req = tegra_dma_sg_req_get(tdc);
+                if (!sg_req) {
+                        dev_err(tdc2dev(tdc), "Dma sg-req not available\n");
+                        tegra_dma_desc_put(tdc, dma_desc);
+                        return NULL;
+                }
+                ahb_seq |= get_burst_size(tdc, burst_size, slave_bw, len);
+                sg_req->ch_regs.apb_ptr = apb_ptr;
+                sg_req->ch_regs.ahb_ptr = mem;
+                sg_req->ch_regs.csr = csr | ((len - 4) & 0xFFFC);
+                sg_req->ch_regs.apb_seq = apb_seq;
+                sg_req->ch_regs.ahb_seq = ahb_seq;
+                sg_req->configured = false;
+                sg_req->half_done = false;
+                sg_req->last_sg = false;
+                sg_req->dma_desc = dma_desc;
+                sg_req->req_len = len;
+                list_add_tail(&sg_req->node, &dma_desc->tx_list);
+                remain_len -= len;
+                mem += len;
+        }
+        sg_req->last_sg = true;
+        dma_desc->txd.flags = 0;
+        /*
+         * Make sure that mode should not be conflicting with currently
+         * configured mode.
+         */
+        if (!tdc->isr_handler) {
+                tdc->isr_handler = handle_cont_sngl_cycle_dma_done;
+                tdc->cyclic = true;
+        } else {
+                if (!tdc->cyclic) {
+                        dev_err(tdc2dev(tdc), "DMA configuration conflict\n");
+                        tegra_dma_desc_put(tdc, dma_desc);
+                        return NULL;
+                }
+        }
+        return &dma_desc->txd;
+}
+static int tegra_dma_alloc_chan_resources(struct dma_chan *dc)
+{
+        struct tegra_dma_channel *tdc = to_tegra_dma_chan(dc);
+        struct tegra_dma *tdma = tdc->tdma;
+        int ret;
+        dma_cookie_init(&tdc->dma_chan);
+        tdc->config_init = false;
+        ret = clk_prepare_enable(tdma->dma_clk);
+        if (ret < 0)
+                dev_err(tdc2dev(tdc), "clk_prepare_enable failed: %d\n", ret);
+        return ret;
+}
+static void tegra_dma_free_chan_resources(struct dma_chan *dc)
+{
+        struct tegra_dma_channel *tdc = to_tegra_dma_chan(dc);
+        struct tegra_dma *tdma = tdc->tdma;
+        struct tegra_dma_desc *dma_desc;
+        struct tegra_dma_sg_req *sg_req;
+        struct list_head dma_desc_list;
+        struct list_head sg_req_list;
+        unsigned long flags;
+        INIT_LIST_HEAD(&dma_desc_list);
+        INIT_LIST_HEAD(&sg_req_list);
+        dev_dbg(tdc2dev(tdc), "Freeing channel %d\n", tdc->id);
+        if (tdc->busy)
+                tegra_dma_terminate_all(dc);
+        spin_lock_irqsave(&tdc->lock, flags);
+        list_splice_init(&tdc->pending_sg_req, &sg_req_list);
+        list_splice_init(&tdc->free_sg_req, &sg_req_list);
+        list_splice_init(&tdc->free_dma_desc, &dma_desc_list);
+        INIT_LIST_HEAD(&tdc->cb_desc);
+        tdc->config_init = false;
+        spin_unlock_irqrestore(&tdc->lock, flags);
+        while (!list_empty(&dma_desc_list)) {
+                dma_desc = list_first_entry(&dma_desc_list,
+                                        typeof(*dma_desc), node);
+                list_del(&dma_desc->node);
+                kfree(dma_desc);
+        }
+        while (!list_empty(&sg_req_list)) {
+                sg_req = list_first_entry(&sg_req_list, typeof(*sg_req), node);
+                list_del(&sg_req->node);
+                kfree(sg_req);
+        }
+        clk_disable_unprepare(tdma->dma_clk);
+}
+/* Tegra20 specific DMA controller information */
+static struct tegra_dma_chip_data tegra20_dma_chip_data = {
+        .nr_channels            = 16,
+        .max_dma_count          = 1024UL * 64,
+};
+#if defined(CONFIG_OF)
+/* Tegra30 specific DMA controller information */
+static struct tegra_dma_chip_data tegra30_dma_chip_data = {
+        .nr_channels            = 32,
+        .max_dma_count          = 1024UL * 64,
+};
+static const struct of_device_id tegra_dma_of_match[] __devinitconst = {
+        {
+                .compatible = "nvidia,tegra30-apbdma",
+                .data = &tegra30_dma_chip_data,
+        }, {
+                .compatible = "nvidia,tegra20-apbdma",
+                .data = &tegra20_dma_chip_data,
+        }, {
+        },
+};
+MODULE_DEVICE_TABLE(of, tegra_dma_of_match);
+#endif
+static int __devinit tegra_dma_probe(struct platform_device *pdev)
+{
+        struct resource *res;
+        struct tegra_dma *tdma;
+        int ret;
+        int i;
+        struct tegra_dma_chip_data *cdata = NULL;
+        if (pdev->dev.of_node) {
+                const struct of_device_id *match;
+                match = of_match_device(of_match_ptr(tegra_dma_of_match),
+                                        &pdev->dev);
+                if (!match) {
+                        dev_err(&pdev->dev, "Error: No device match found\n");
+                        return -ENODEV;
+                }
+                cdata = match->data;
+        } else {
+                /* If no device tree then fallback to tegra20 */
+                cdata = &tegra20_dma_chip_data;
+        }
+        tdma = devm_kzalloc(&pdev->dev, sizeof(*tdma) + cdata->nr_channels *
+                        sizeof(struct tegra_dma_channel), GFP_KERNEL);
+        if (!tdma) {
+                dev_err(&pdev->dev, "Error: memory allocation failed\n");
+                return -ENOMEM;
+        }
+        tdma->dev = &pdev->dev;
+        tdma->chip_data = cdata;
+        platform_set_drvdata(pdev, tdma);
+        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+        if (!res) {
+                dev_err(&pdev->dev, "No mem resource for DMA\n");
+                return -EINVAL;
+        }
+        tdma->base_addr = devm_request_and_ioremap(&pdev->dev, res);
+        if (!tdma->base_addr) {
+                dev_err(&pdev->dev,
+                        "Cannot request memregion/iomap dma address\n");
+                return -EADDRNOTAVAIL;
+        }
+        tdma->dma_clk = devm_clk_get(&pdev->dev, NULL);
+        if (IS_ERR(tdma->dma_clk)) {
+                dev_err(&pdev->dev, "Error: Missing controller clock\n");
+                return PTR_ERR(tdma->dma_clk);
+        }
+        spin_lock_init(&tdma->global_lock);
+        pm_runtime_enable(&pdev->dev);
+        if (!pm_runtime_enabled(&pdev->dev)) {
+                ret = tegra_dma_runtime_resume(&pdev->dev);
+                if (ret) {
+                        dev_err(&pdev->dev, "dma_runtime_resume failed %d\n",
+                                ret);
+                        goto err_pm_disable;
+                }
+        }
+        /* Enable clock before accessing registers */
+        ret = clk_prepare_enable(tdma->dma_clk);
+        if (ret < 0) {
+                dev_err(&pdev->dev, "clk_prepare_enable failed: %d\n", ret);
+                goto err_pm_disable;
+        }
+        /* Reset DMA controller */
+        tegra_periph_reset_assert(tdma->dma_clk);
+        udelay(2);
+        tegra_periph_reset_deassert(tdma->dma_clk);
+        /* Enable global DMA registers */
+        tdma_write(tdma, TEGRA_APBDMA_GENERAL, TEGRA_APBDMA_GENERAL_ENABLE);
+        tdma_write(tdma, TEGRA_APBDMA_CONTROL, 0);
+        tdma_write(tdma, TEGRA_APBDMA_IRQ_MASK_SET, 0xFFFFFFFFul);
+        clk_disable_unprepare(tdma->dma_clk);
+        INIT_LIST_HEAD(&tdma->dma_dev.channels);
+        for (i = 0; i < cdata->nr_channels; i++) {
+                struct tegra_dma_channel *tdc = &tdma->channels[i];
+                char irq_name[30];
+                tdc->chan_base_offset = TEGRA_APBDMA_CHANNEL_BASE_ADD_OFFSET +
+                                        i * TEGRA_APBDMA_CHANNEL_REGISTER_SIZE;
+                res = platform_get_resource(pdev, IORESOURCE_IRQ, i);
+                if (!res) {
+                        ret = -EINVAL;
+                        dev_err(&pdev->dev, "No irq resource for chan %d\n", i);
+                        goto err_irq;
+                }
+                tdc->irq = res->start;
+                snprintf(irq_name, sizeof(irq_name), "apbdma.%d", i);
+                ret = devm_request_irq(&pdev->dev, tdc->irq,
+                                tegra_dma_isr, 0, irq_name, tdc);
+                if (ret) {
+                        dev_err(&pdev->dev,
+                                "request_irq failed with err %d channel %d\n",
+                                i, ret);
+                        goto err_irq;
+                }
+                tdc->dma_chan.device = &tdma->dma_dev;
+                dma_cookie_init(&tdc->dma_chan);
+                list_add_tail(&tdc->dma_chan.device_node,
+                                &tdma->dma_dev.channels);
+                tdc->tdma = tdma;
+                tdc->id = i;
+                tasklet_init(&tdc->tasklet, tegra_dma_tasklet,
+                                (unsigned long)tdc);
+                spin_lock_init(&tdc->lock);
+                INIT_LIST_HEAD(&tdc->pending_sg_req);
+                INIT_LIST_HEAD(&tdc->free_sg_req);
+                INIT_LIST_HEAD(&tdc->free_dma_desc);
+                INIT_LIST_HEAD(&tdc->cb_desc);
+        }
+        dma_cap_set(DMA_SLAVE, tdma->dma_dev.cap_mask);
+        dma_cap_set(DMA_PRIVATE, tdma->dma_dev.cap_mask);
+        dma_cap_set(DMA_CYCLIC, tdma->dma_dev.cap_mask);
+        tdma->dma_dev.dev = &pdev->dev;
+        tdma->dma_dev.device_alloc_chan_resources =
+                                        tegra_dma_alloc_chan_resources;
+        tdma->dma_dev.device_free_chan_resources =
+                                        tegra_dma_free_chan_resources;
+        tdma->dma_dev.device_prep_slave_sg = tegra_dma_prep_slave_sg;
+        tdma->dma_dev.device_prep_dma_cyclic = tegra_dma_prep_dma_cyclic;
+        tdma->dma_dev.device_control = tegra_dma_device_control;
+        tdma->dma_dev.device_tx_status = tegra_dma_tx_status;
+        tdma->dma_dev.device_issue_pending = tegra_dma_issue_pending;
+        ret = dma_async_device_register(&tdma->dma_dev);
+        if (ret < 0) {
+                dev_err(&pdev->dev,
+                        "Tegra20 APB DMA driver registration failed %d\n", ret);
+                goto err_irq;
+        }
+        dev_info(&pdev->dev, "Tegra20 APB DMA driver register %d channels\n",
+                        cdata->nr_channels);
+        return 0;
+err_irq:
+        while (--i >= 0) {
+                struct tegra_dma_channel *tdc = &tdma->channels[i];
+                tasklet_kill(&tdc->tasklet);
+        }
+err_pm_disable:
+        pm_runtime_disable(&pdev->dev);
+        if (!pm_runtime_status_suspended(&pdev->dev))
+                tegra_dma_runtime_suspend(&pdev->dev);
+        return ret;
+}
+static int __devexit tegra_dma_remove(struct platform_device *pdev)
+{
+        struct tegra_dma *tdma = platform_get_drvdata(pdev);
+        int i;
+        struct tegra_dma_channel *tdc;
+        dma_async_device_unregister(&tdma->dma_dev);
+        for (i = 0; i < tdma->chip_data->nr_channels; ++i) {
+                tdc = &tdma->channels[i];
+                tasklet_kill(&tdc->tasklet);
+        }
+        pm_runtime_disable(&pdev->dev);
+        if (!pm_runtime_status_suspended(&pdev->dev))
+                tegra_dma_runtime_suspend(&pdev->dev);
+        return 0;
+}
+static int tegra_dma_runtime_suspend(struct device *dev)
+{
+        struct platform_device *pdev = to_platform_device(dev);
+        struct tegra_dma *tdma = platform_get_drvdata(pdev);
+        clk_disable_unprepare(tdma->dma_clk);
+        return 0;
+}
+static int tegra_dma_runtime_resume(struct device *dev)
+{
+        struct platform_device *pdev = to_platform_device(dev);
+        struct tegra_dma *tdma = platform_get_drvdata(pdev);
+        int ret;
+        ret = clk_prepare_enable(tdma->dma_clk);
+        if (ret < 0) {
+                dev_err(dev, "clk_enable failed: %d\n", ret);
+                return ret;
+        }
+        return 0;
+}
+static const struct dev_pm_ops tegra_dma_dev_pm_ops __devinitconst = {
+#ifdef CONFIG_PM_RUNTIME
+        .runtime_suspend = tegra_dma_runtime_suspend,
+        .runtime_resume = tegra_dma_runtime_resume,
+#endif
+};
+static struct platform_driver tegra_dmac_driver = {
+        .driver = {
+                .name   = "tegra-apbdma",
+                .owner = THIS_MODULE,
+                .pm     = &tegra_dma_dev_pm_ops,
+                .of_match_table = of_match_ptr(tegra_dma_of_match),
+        },
+        .probe          = tegra_dma_probe,
+        .remove         = __devexit_p(tegra_dma_remove),
+};
+module_platform_driver(tegra_dmac_driver);
+MODULE_ALIAS("platform:tegra20-apbdma");
+MODULE_DESCRIPTION("NVIDIA Tegra APB DMA Controller driver");
+MODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/dma/virt-dma.c b/drivers/dma/virt-dma.c
new file mode 100644
index 000000000000..6f80432a3f0a
--- /dev/null
+++ b/drivers/dma/virt-dma.c
@@ -0,0 +1,123 @@
+/*
+ * Virtual DMA channel support for DMAengine
+ *
+ * Copyright (C) 2012 Russell King
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/device.h>
+#include <linux/dmaengine.h>
+#include <linux/module.h>
+#include <linux/spinlock.h>
+#include "virt-dma.h"
+static struct virt_dma_desc *to_virt_desc(struct dma_async_tx_descriptor *tx)
+{
+        return container_of(tx, struct virt_dma_desc, tx);
+}
+dma_cookie_t vchan_tx_submit(struct dma_async_tx_descriptor *tx)
+{
+        struct virt_dma_chan *vc = to_virt_chan(tx->chan);
+        struct virt_dma_desc *vd = to_virt_desc(tx);
+        unsigned long flags;
+        dma_cookie_t cookie;
+        spin_lock_irqsave(&vc->lock, flags);
+        cookie = dma_cookie_assign(tx);
+        list_add_tail(&vd->node, &vc->desc_submitted);
+        spin_unlock_irqrestore(&vc->lock, flags);
+        dev_dbg(vc->chan.device->dev, "vchan %p: txd %p[%x]: submitted\n",
+                vc, vd, cookie);
+        return cookie;
+}
+EXPORT_SYMBOL_GPL(vchan_tx_submit);
+struct virt_dma_desc *vchan_find_desc(struct virt_dma_chan *vc,
+        dma_cookie_t cookie)
+{
+        struct virt_dma_desc *vd;
+        list_for_each_entry(vd, &vc->desc_issued, node)
+                if (vd->tx.cookie == cookie)
+                        return vd;
+        return NULL;
+}
+EXPORT_SYMBOL_GPL(vchan_find_desc);
+/*
+ * This tasklet handles the completion of a DMA descriptor by
+ * calling its callback and freeing it.
+ */
+static void vchan_complete(unsigned long arg)
+{
+        struct virt_dma_chan *vc = (struct virt_dma_chan *)arg;
+        struct virt_dma_desc *vd;
+        dma_async_tx_callback cb = NULL;
+        void *cb_data = NULL;
+        LIST_HEAD(head);
+        spin_lock_irq(&vc->lock);
+        list_splice_tail_init(&vc->desc_completed, &head);
+        vd = vc->cyclic;
+        if (vd) {
+                vc->cyclic = NULL;
+                cb = vd->tx.callback;
+                cb_data = vd->tx.callback_param;
+        }
+        spin_unlock_irq(&vc->lock);
+        if (cb)
+                cb(cb_data);
+        while (!list_empty(&head)) {
+                vd = list_first_entry(&head, struct virt_dma_desc, node);
+                cb = vd->tx.callback;
+                cb_data = vd->tx.callback_param;
+                list_del(&vd->node);
+                vc->desc_free(vd);
+                if (cb)
+                        cb(cb_data);
+        }
+}
+void vchan_dma_desc_free_list(struct virt_dma_chan *vc, struct list_head *head)
+{
+        while (!list_empty(head)) {
+                struct virt_dma_desc *vd = list_first_entry(head,
+                        struct virt_dma_desc, node);
+                list_del(&vd->node);
+                dev_dbg(vc->chan.device->dev, "txd %p: freeing\n", vd);
+                vc->desc_free(vd);
+        }
+}
+EXPORT_SYMBOL_GPL(vchan_dma_desc_free_list);
+void vchan_init(struct virt_dma_chan *vc, struct dma_device *dmadev)
+{
+        dma_cookie_init(&vc->chan);
+        spin_lock_init(&vc->lock);
+        INIT_LIST_HEAD(&vc->desc_submitted);
+        INIT_LIST_HEAD(&vc->desc_issued);
+        INIT_LIST_HEAD(&vc->desc_completed);
+        tasklet_init(&vc->task, vchan_complete, (unsigned long)vc);
+        vc->chan.device = dmadev;
+        list_add_tail(&vc->chan.device_node, &dmadev->channels);
+}
+EXPORT_SYMBOL_GPL(vchan_init);
+MODULE_AUTHOR("Russell King");
+MODULE_LICENSE("GPL");
diff --git a/drivers/dma/virt-dma.h b/drivers/dma/virt-dma.h
new file mode 100644
index 000000000000..85c19d63f9fb
--- /dev/null
+++ b/drivers/dma/virt-dma.h
@@ -0,0 +1,152 @@
+/*
+ * Virtual DMA channel support for DMAengine
+ *
+ * Copyright (C) 2012 Russell King
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef VIRT_DMA_H
+#define VIRT_DMA_H
+#include <linux/dmaengine.h>
+#include <linux/interrupt.h>
+#include "dmaengine.h"
+struct virt_dma_desc {
+        struct dma_async_tx_descriptor tx;
+        /* protected by vc.lock */
+        struct list_head node;
+};
+struct virt_dma_chan {
+        struct dma_chan chan;
+        struct tasklet_struct task;
+        void (*desc_free)(struct virt_dma_desc *);
+        spinlock_t lock;
+        /* protected by vc.lock */
+        struct list_head desc_submitted;
+        struct list_head desc_issued;
+        struct list_head desc_completed;
+        struct virt_dma_desc *cyclic;
+};
+static inline struct virt_dma_chan *to_virt_chan(struct dma_chan *chan)
+{
+        return container_of(chan, struct virt_dma_chan, chan);
+}
+void vchan_dma_desc_free_list(struct virt_dma_chan *vc, struct list_head *head);
+void vchan_init(struct virt_dma_chan *vc, struct dma_device *dmadev);
+struct virt_dma_desc *vchan_find_desc(struct virt_dma_chan *, dma_cookie_t);
+/**
+ * vchan_tx_prep - prepare a descriptor
+ * vc: virtual channel allocating this descriptor
+ * vd: virtual descriptor to prepare
+ * tx_flags: flags argument passed in to prepare function
+ */
+static inline struct dma_async_tx_descriptor *vchan_tx_prep(struct virt_dma_chan *vc,
+        struct virt_dma_desc *vd, unsigned long tx_flags)
+{
+        extern dma_cookie_t vchan_tx_submit(struct dma_async_tx_descriptor *);
+        dma_async_tx_descriptor_init(&vd->tx, &vc->chan);
+        vd->tx.flags = tx_flags;
+        vd->tx.tx_submit = vchan_tx_submit;
+        return &vd->tx;
+}
+/**
+ * vchan_issue_pending - move submitted descriptors to issued list
+ * vc: virtual channel to update
+ *
+ * vc.lock must be held by caller
+ */
+static inline bool vchan_issue_pending(struct virt_dma_chan *vc)
+{
+        list_splice_tail_init(&vc->desc_submitted, &vc->desc_issued);
+        return !list_empty(&vc->desc_issued);
+}
+/**
+ * vchan_cookie_complete - report completion of a descriptor
+ * vd: virtual descriptor to update
+ *
+ * vc.lock must be held by caller
+ */
+static inline void vchan_cookie_complete(struct virt_dma_desc *vd)
+{
+        struct virt_dma_chan *vc = to_virt_chan(vd->tx.chan);
+        dma_cookie_complete(&vd->tx);
+        dev_vdbg(vc->chan.device->dev, "txd %p[%x]: marked complete\n",
+                vd, vd->tx.cookie);
+        list_add_tail(&vd->node, &vc->desc_completed);
+        tasklet_schedule(&vc->task);
+}
+/**
+ * vchan_cyclic_callback - report the completion of a period
+ * vd: virtual descriptor
+ */
+static inline void vchan_cyclic_callback(struct virt_dma_desc *vd)
+{
+        struct virt_dma_chan *vc = to_virt_chan(vd->tx.chan);
+        vc->cyclic = vd;
+        tasklet_schedule(&vc->task);
+}
+/**
+ * vchan_next_desc - peek at the next descriptor to be processed
+ * vc: virtual channel to obtain descriptor from
+ *
+ * vc.lock must be held by caller
+ */
+static inline struct virt_dma_desc *vchan_next_desc(struct virt_dma_chan *vc)
+{
+        if (list_empty(&vc->desc_issued))
+                return NULL;
+        return list_first_entry(&vc->desc_issued, struct virt_dma_desc, node);
+}
+/**
+ * vchan_get_all_descriptors - obtain all submitted and issued descriptors
+ * vc: virtual channel to get descriptors from
+ * head: list of descriptors found
+ *
+ * vc.lock must be held by caller
+ *
+ * Removes all submitted and issued descriptors from internal lists, and
+ * provides a list of all descriptors found
+ */
+static inline void vchan_get_all_descriptors(struct virt_dma_chan *vc,
+        struct list_head *head)
+{
+        list_splice_tail_init(&vc->desc_submitted, head);
+        list_splice_tail_init(&vc->desc_issued, head);
+        list_splice_tail_init(&vc->desc_completed, head);
+}
+static inline void vchan_free_chan_resources(struct virt_dma_chan *vc)
+{
+        unsigned long flags;
+        LIST_HEAD(head);
+        spin_lock_irqsave(&vc->lock, flags);
+        vchan_get_all_descriptors(vc, &head);
+        spin_unlock_irqrestore(&vc->lock, flags);
+        vchan_dma_desc_free_list(vc, &head);
+}
+#endif
diff --git a/drivers/edac/Kconfig b/drivers/edac/Kconfig
index fdffa1beca17..409b92b8d346 100644
--- a/drivers/edac/Kconfig
+++ b/drivers/edac/Kconfig
@@ -7,7 +7,7 @@
 menuconfig EDAC
        bool "EDAC (Error Detection And Correction) reporting"
        depends on HAS_IOMEM
-        depends on X86 || PPC || TILE
+        depends on X86 || PPC || TILE || ARM
        help
          EDAC is designed to report errors in the core system.
          These are low-level errors that are reported in the CPU or
@@ -31,6 +31,14 @@ if EDAC
 comment "Reporting subsystems"
+config EDAC_LEGACY_SYSFS
+        bool "EDAC legacy sysfs"
+        default y
+        help
+          Enable the compatibility sysfs nodes.
+          Use 'Y' if your edac utilities aren't ported to work with the newer
+          structures.
 config EDAC_DEBUG
        bool "Debugging"
        help
@@ -294,4 +302,18 @@ config EDAC_TILE
          Support for error detection and correction on the
          Tilera memory controller.
+config EDAC_HIGHBANK_MC
+        tristate "Highbank Memory Controller"
+        depends on EDAC_MM_EDAC && ARCH_HIGHBANK
+        help
+          Support for error detection and correction on the
+          Calxeda Highbank memory controller.
+config EDAC_HIGHBANK_L2
+        tristate "Highbank L2 Cache"
+        depends on EDAC_MM_EDAC && ARCH_HIGHBANK
+        help
+          Support for error detection and correction on the
+          Calxeda Highbank memory controller.
 endif # EDAC
diff --git a/drivers/edac/Makefile b/drivers/edac/Makefile
index 196a63dd37c5..7e5129a733f8 100644
--- a/drivers/edac/Makefile
+++ b/drivers/edac/Makefile
@@ -55,3 +55,6 @@ obj-$(CONFIG_EDAC_AMD8111)		+= amd8111_edac.o
 obj-$(CONFIG_EDAC_AMD8131)              += amd8131_edac.o
 obj-$(CONFIG_EDAC_TILE)                 += tile_edac.o
+obj-$(CONFIG_EDAC_HIGHBANK_MC)  += highbank_mc_edac.o
+obj-$(CONFIG_EDAC_HIGHBANK_L2)  += highbank_l2_edac.o
diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
index 7be9b7288e90..5a297a26211d 100644
--- a/drivers/edac/amd64_edac.c
+++ b/drivers/edac/amd64_edac.c
@@ -321,8 +321,8 @@ found:
        return edac_mc_find((int)node_id);
 err_no_match:
-        debugf2("sys_addr 0x%lx doesn't match any node\n",
+        edac_dbg(2, "sys_addr 0x%lx doesn't match any node\n",
-                (unsigned long)sys_addr);
+                 (unsigned long)sys_addr);
        return NULL;
 }
@@ -393,15 +393,15 @@ static int input_addr_to_csrow(struct mem_ctl_info *mci, u64 input_addr)
                mask = ~mask;
                if ((input_addr & mask) == (base & mask)) {
-                        debugf2("InputAddr 0x%lx matches csrow %d (node %d)\n",
+                        edac_dbg(2, "InputAddr 0x%lx matches csrow %d (node %d)\n",
-                                (unsigned long)input_addr, csrow,
+                                 (unsigned long)input_addr, csrow,
-                                pvt->mc_node_id);
+                                 pvt->mc_node_id);
                        return csrow;
                }
        }
-        debugf2("no matching csrow for InputAddr 0x%lx (MC node %d)\n",
+        edac_dbg(2, "no matching csrow for InputAddr 0x%lx (MC node %d)\n",
-                (unsigned long)input_addr, pvt->mc_node_id);
+                 (unsigned long)input_addr, pvt->mc_node_id);
        return -1;
 }
@@ -430,20 +430,20 @@ int amd64_get_dram_hole_info(struct mem_ctl_info *mci, u64 *hole_base,
        /* only revE and later have the DRAM Hole Address Register */
        if (boot_cpu_data.x86 == 0xf && pvt->ext_model < K8_REV_E) {
-                debugf1("  revision %d for node %d does not support DHAR\n",
+                edac_dbg(1, "  revision %d for node %d does not support DHAR\n",
-                        pvt->ext_model, pvt->mc_node_id);
+                         pvt->ext_model, pvt->mc_node_id);
                return 1;
        }
        /* valid for Fam10h and above */
        if (boot_cpu_data.x86 >= 0x10 && !dhar_mem_hoist_valid(pvt)) {
-                debugf1("  Dram Memory Hoisting is DISABLED on this system\n");
+                edac_dbg(1, "  Dram Memory Hoisting is DISABLED on this system\n");
                return 1;
        }
        if (!dhar_valid(pvt)) {
-                debugf1("  Dram Memory Hoisting is DISABLED on this node %d\n",
+                edac_dbg(1, "  Dram Memory Hoisting is DISABLED on this node %d\n",
-                        pvt->mc_node_id);
+                         pvt->mc_node_id);
                return 1;
        }
@@ -475,9 +475,9 @@ int amd64_get_dram_hole_info(struct mem_ctl_info *mci, u64 *hole_base,
        else
                *hole_offset = k8_dhar_offset(pvt);
-        debugf1("  DHAR info for node %d base 0x%lx offset 0x%lx size 0x%lx\n",
+        edac_dbg(1, "  DHAR info for node %d base 0x%lx offset 0x%lx size 0x%lx\n",
-                pvt->mc_node_id, (unsigned long)*hole_base,
+                 pvt->mc_node_id, (unsigned long)*hole_base,
-                (unsigned long)*hole_offset, (unsigned long)*hole_size);
+                 (unsigned long)*hole_offset, (unsigned long)*hole_size);
        return 0;
 }
@@ -528,10 +528,9 @@ static u64 sys_addr_to_dram_addr(struct mem_ctl_info *mci, u64 sys_addr)
                        /* use DHAR to translate SysAddr to DramAddr */
                        dram_addr = sys_addr - hole_offset;
-                        debugf2("using DHAR to translate SysAddr 0x%lx to "
+                        edac_dbg(2, "using DHAR to translate SysAddr 0x%lx to DramAddr 0x%lx\n",
-                                "DramAddr 0x%lx\n",
+                                 (unsigned long)sys_addr,
-                                (unsigned long)sys_addr,
+                                 (unsigned long)dram_addr);
-                                (unsigned long)dram_addr);
                        return dram_addr;
                }
@@ -548,9 +547,8 @@ static u64 sys_addr_to_dram_addr(struct mem_ctl_info *mci, u64 sys_addr)
         */
        dram_addr = (sys_addr & GENMASK(0, 39)) - dram_base;
-        debugf2("using DRAM Base register to translate SysAddr 0x%lx to "
+        edac_dbg(2, "using DRAM Base register to translate SysAddr 0x%lx to DramAddr 0x%lx\n",
-                "DramAddr 0x%lx\n", (unsigned long)sys_addr,
+                 (unsigned long)sys_addr, (unsigned long)dram_addr);
-                (unsigned long)dram_addr);
        return dram_addr;
 }
@@ -586,9 +584,9 @@ static u64 dram_addr_to_input_addr(struct mem_ctl_info *mci, u64 dram_addr)
        input_addr = ((dram_addr >> intlv_shift) & GENMASK(12, 35)) +
                      (dram_addr & 0xfff);
-        debugf2("  Intlv Shift=%d DramAddr=0x%lx maps to InputAddr=0x%lx\n",
+        edac_dbg(2, "  Intlv Shift=%d DramAddr=0x%lx maps to InputAddr=0x%lx\n",
-                intlv_shift, (unsigned long)dram_addr,
+                 intlv_shift, (unsigned long)dram_addr,
-                (unsigned long)input_addr);
+                 (unsigned long)input_addr);
        return input_addr;
 }
@@ -604,8 +602,8 @@ static u64 sys_addr_to_input_addr(struct mem_ctl_info *mci, u64 sys_addr)
        input_addr =
            dram_addr_to_input_addr(mci, sys_addr_to_dram_addr(mci, sys_addr));
-        debugf2("SysAdddr 0x%lx translates to InputAddr 0x%lx\n",
+        edac_dbg(2, "SysAdddr 0x%lx translates to InputAddr 0x%lx\n",
-                (unsigned long)sys_addr, (unsigned long)input_addr);
+                 (unsigned long)sys_addr, (unsigned long)input_addr);
        return input_addr;
 }
@@ -637,8 +635,8 @@ static u64 input_addr_to_dram_addr(struct mem_ctl_info *mci, u64 input_addr)
        intlv_shift = num_node_interleave_bits(dram_intlv_en(pvt, 0));
        if (intlv_shift == 0) {
-                debugf1("    InputAddr 0x%lx translates to DramAddr of "
+                edac_dbg(1, "    InputAddr 0x%lx translates to DramAddr of same value\n",
-                        "same value\n", (unsigned long)input_addr);
+                         (unsigned long)input_addr);
                return input_addr;
        }
@@ -649,9 +647,9 @@ static u64 input_addr_to_dram_addr(struct mem_ctl_info *mci, u64 input_addr)
        intlv_sel = dram_intlv_sel(pvt, node_id) & ((1 << intlv_shift) - 1);
        dram_addr = bits + (intlv_sel << 12);
-        debugf1("InputAddr 0x%lx translates to DramAddr 0x%lx "
+        edac_dbg(1, "InputAddr 0x%lx translates to DramAddr 0x%lx (%d node interleave bits)\n",
-                "(%d node interleave bits)\n", (unsigned long)input_addr,
+                 (unsigned long)input_addr,
-                (unsigned long)dram_addr, intlv_shift);
+                 (unsigned long)dram_addr, intlv_shift);
        return dram_addr;
 }
@@ -673,9 +671,9 @@ static u64 dram_addr_to_sys_addr(struct mem_ctl_info *mci, u64 dram_addr)
                    (dram_addr < (hole_base + hole_size))) {
                        sys_addr = dram_addr + hole_offset;
-                        debugf1("using DHAR to translate DramAddr 0x%lx to "
+                        edac_dbg(1, "using DHAR to translate DramAddr 0x%lx to SysAddr 0x%lx\n",
-                                "SysAddr 0x%lx\n", (unsigned long)dram_addr,
+                                 (unsigned long)dram_addr,
-                                (unsigned long)sys_addr);
+                                 (unsigned long)sys_addr);
                        return sys_addr;
                }
@@ -697,9 +695,9 @@ static u64 dram_addr_to_sys_addr(struct mem_ctl_info *mci, u64 dram_addr)
         */
        sys_addr |= ~((sys_addr & (1ull << 39)) - 1);
-        debugf1("    Node %d, DramAddr 0x%lx to SysAddr 0x%lx\n",
+        edac_dbg(1, "    Node %d, DramAddr 0x%lx to SysAddr 0x%lx\n",
-                pvt->mc_node_id, (unsigned long)dram_addr,
+                 pvt->mc_node_id, (unsigned long)dram_addr,
-                (unsigned long)sys_addr);
+                 (unsigned long)sys_addr);
        return sys_addr;
 }
@@ -768,49 +766,48 @@ static void amd64_debug_display_dimm_sizes(struct amd64_pvt *, u8);
 static void amd64_dump_dramcfg_low(u32 dclr, int chan)
 {
-        debugf1("F2x%d90 (DRAM Cfg Low): 0x%08x\n", chan, dclr);
+        edac_dbg(1, "F2x%d90 (DRAM Cfg Low): 0x%08x\n", chan, dclr);
-        debugf1("  DIMM type: %sbuffered; all DIMMs support ECC: %s\n",
+        edac_dbg(1, "  DIMM type: %sbuffered; all DIMMs support ECC: %s\n",
-                (dclr & BIT(16)) ?  "un" : "",
+                 (dclr & BIT(16)) ?  "un" : "",
-                (dclr & BIT(19)) ? "yes" : "no");
+                 (dclr & BIT(19)) ? "yes" : "no");
-        debugf1("  PAR/ERR parity: %s\n",
+        edac_dbg(1, "  PAR/ERR parity: %s\n",
-                (dclr & BIT(8)) ?  "enabled" : "disabled");
+                 (dclr & BIT(8)) ?  "enabled" : "disabled");
        if (boot_cpu_data.x86 == 0x10)
-                debugf1("  DCT 128bit mode width: %s\n",
+                edac_dbg(1, "  DCT 128bit mode width: %s\n",
-                        (dclr & BIT(11)) ?  "128b" : "64b");
+                         (dclr & BIT(11)) ?  "128b" : "64b");
-        debugf1("  x4 logical DIMMs present: L0: %s L1: %s L2: %s L3: %s\n",
+        edac_dbg(1, "  x4 logical DIMMs present: L0: %s L1: %s L2: %s L3: %s\n",
-                (dclr & BIT(12)) ?  "yes" : "no",
+                 (dclr & BIT(12)) ?  "yes" : "no",
-                (dclr & BIT(13)) ?  "yes" : "no",
+                 (dclr & BIT(13)) ?  "yes" : "no",
-                (dclr & BIT(14)) ?  "yes" : "no",
+                 (dclr & BIT(14)) ?  "yes" : "no",
-                (dclr & BIT(15)) ?  "yes" : "no");
+                 (dclr & BIT(15)) ?  "yes" : "no");
 }
 /* Display and decode various NB registers for debug purposes. */
 static void dump_misc_regs(struct amd64_pvt *pvt)
 {
-        debugf1("F3xE8 (NB Cap): 0x%08x\n", pvt->nbcap);
+        edac_dbg(1, "F3xE8 (NB Cap): 0x%08x\n", pvt->nbcap);
-        debugf1("  NB two channel DRAM capable: %s\n",
+        edac_dbg(1, "  NB two channel DRAM capable: %s\n",
-                (pvt->nbcap & NBCAP_DCT_DUAL) ? "yes" : "no");
+                 (pvt->nbcap & NBCAP_DCT_DUAL) ? "yes" : "no");
-        debugf1("  ECC capable: %s, ChipKill ECC capable: %s\n",
+        edac_dbg(1, "  ECC capable: %s, ChipKill ECC capable: %s\n",
-                (pvt->nbcap & NBCAP_SECDED) ? "yes" : "no",
+                 (pvt->nbcap & NBCAP_SECDED) ? "yes" : "no",
-                (pvt->nbcap & NBCAP_CHIPKILL) ? "yes" : "no");
+                 (pvt->nbcap & NBCAP_CHIPKILL) ? "yes" : "no");
        amd64_dump_dramcfg_low(pvt->dclr0, 0);
-        debugf1("F3xB0 (Online Spare): 0x%08x\n", pvt->online_spare);
+        edac_dbg(1, "F3xB0 (Online Spare): 0x%08x\n", pvt->online_spare);
-        debugf1("F1xF0 (DRAM Hole Address): 0x%08x, base: 0x%08x, "
+        edac_dbg(1, "F1xF0 (DRAM Hole Address): 0x%08x, base: 0x%08x, offset: 0x%08x\n",
-                        "offset: 0x%08x\n",
+                 pvt->dhar, dhar_base(pvt),
-                        pvt->dhar, dhar_base(pvt),
+                 (boot_cpu_data.x86 == 0xf) ? k8_dhar_offset(pvt)
-                        (boot_cpu_data.x86 == 0xf) ? k8_dhar_offset(pvt)
+                 : f10_dhar_offset(pvt));
-                                                   : f10_dhar_offset(pvt));
-        debugf1("  DramHoleValid: %s\n", dhar_valid(pvt) ? "yes" : "no");
+        edac_dbg(1, "  DramHoleValid: %s\n", dhar_valid(pvt) ? "yes" : "no");
        amd64_debug_display_dimm_sizes(pvt, 0);
@@ -857,15 +854,15 @@ static void read_dct_base_mask(struct amd64_pvt *pvt)
                u32 *base1 = &pvt->csels[1].csbases[cs];
                if (!amd64_read_dct_pci_cfg(pvt, reg0, base0))
-                        debugf0("  DCSB0[%d]=0x%08x reg: F2x%x\n",
+                        edac_dbg(0, "  DCSB0[%d]=0x%08x reg: F2x%x\n",
-                                cs, *base0, reg0);
+                                 cs, *base0, reg0);
                if (boot_cpu_data.x86 == 0xf || dct_ganging_enabled(pvt))
                        continue;
                if (!amd64_read_dct_pci_cfg(pvt, reg1, base1))
-                        debugf0("  DCSB1[%d]=0x%08x reg: F2x%x\n",
+                        edac_dbg(0, "  DCSB1[%d]=0x%08x reg: F2x%x\n",
-                                cs, *base1, reg1);
+                                 cs, *base1, reg1);
        }
        for_each_chip_select_mask(cs, 0, pvt) {
@@ -875,15 +872,15 @@ static void read_dct_base_mask(struct amd64_pvt *pvt)
                u32 *mask1 = &pvt->csels[1].csmasks[cs];
                if (!amd64_read_dct_pci_cfg(pvt, reg0, mask0))
-                        debugf0("    DCSM0[%d]=0x%08x reg: F2x%x\n",
+                        edac_dbg(0, "    DCSM0[%d]=0x%08x reg: F2x%x\n",
-                                cs, *mask0, reg0);
+                                 cs, *mask0, reg0);
                if (boot_cpu_data.x86 == 0xf || dct_ganging_enabled(pvt))
                        continue;
                if (!amd64_read_dct_pci_cfg(pvt, reg1, mask1))
-                        debugf0("    DCSM1[%d]=0x%08x reg: F2x%x\n",
+                        edac_dbg(0, "    DCSM1[%d]=0x%08x reg: F2x%x\n",
-                                cs, *mask1, reg1);
+                                 cs, *mask1, reg1);
        }
 }
@@ -1049,24 +1046,22 @@ static void k8_map_sysaddr_to_csrow(struct mem_ctl_info *mci, u64 sys_addr,
        if (!src_mci) {
                amd64_mc_err(mci, "failed to map error addr 0x%lx to a node\n",
                             (unsigned long)sys_addr);
-                edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci,
+                edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, 1,
                                     page, offset, syndrome,
                                     -1, -1, -1,
-                                     EDAC_MOD_STR,
                                     "failed to map error addr to a node",
-                                     NULL);
+                                     "");
                return;
        }
        /* Now map the sys_addr to a CSROW */
        csrow = sys_addr_to_csrow(src_mci, sys_addr);
        if (csrow < 0) {
-                edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci,
+                edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, 1,
                                     page, offset, syndrome,
                                     -1, -1, -1,
-                                     EDAC_MOD_STR,
                                     "failed to map error addr to a csrow",
-                                     NULL);
+                                     "");
                return;
        }
@@ -1082,12 +1077,11 @@ static void k8_map_sysaddr_to_csrow(struct mem_ctl_info *mci, u64 sys_addr,
                        amd64_mc_warn(src_mci, "unknown syndrome 0x%04x - "
                                      "possible error reporting race\n",
                                      syndrome);
-                        edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci,
+                        edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, 1,
                                             page, offset, syndrome,
                                             csrow, -1, -1,
-                                             EDAC_MOD_STR,
                                             "unknown syndrome - possible error reporting race",
-                                             NULL);
+                                             "");
                        return;
                }
        } else {
@@ -1102,10 +1096,10 @@ static void k8_map_sysaddr_to_csrow(struct mem_ctl_info *mci, u64 sys_addr,
                channel = ((sys_addr & BIT(3)) != 0);
        }
-        edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, src_mci,
+        edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, src_mci, 1,
                             page, offset, syndrome,
                             csrow, channel, -1,
-                             EDAC_MOD_STR, "", NULL);
+                             "", "");
 }
 static int ddr2_cs_size(unsigned i, bool dct_width)
@@ -1193,7 +1187,7 @@ static int f1x_early_channel_count(struct amd64_pvt *pvt)
         * Need to check DCT0[0] and DCT1[0] to see if only one of them has
         * their CSEnable bit on. If so, then SINGLE DIMM case.
         */
-        debugf0("Data width is not 128 bits - need more decoding\n");
+        edac_dbg(0, "Data width is not 128 bits - need more decoding\n");
        /*
         * Check DRAM Bank Address Mapping values for each DIMM to see if there
@@ -1272,25 +1266,24 @@ static void read_dram_ctl_register(struct amd64_pvt *pvt)
                return;
        if (!amd64_read_dct_pci_cfg(pvt, DCT_SEL_LO, &pvt->dct_sel_lo)) {
-                debugf0("F2x110 (DCTSelLow): 0x%08x, High range addrs at: 0x%x\n",
+                edac_dbg(0, "F2x110 (DCTSelLow): 0x%08x, High range addrs at: 0x%x\n",
-                        pvt->dct_sel_lo, dct_sel_baseaddr(pvt));
+                         pvt->dct_sel_lo, dct_sel_baseaddr(pvt));
-                debugf0("  DCTs operate in %s mode.\n",
+                edac_dbg(0, "  DCTs operate in %s mode\n",
-                        (dct_ganging_enabled(pvt) ? "ganged" : "unganged"));
+                         (dct_ganging_enabled(pvt) ? "ganged" : "unganged"));
                if (!dct_ganging_enabled(pvt))
-                        debugf0("  Address range split per DCT: %s\n",
+                        edac_dbg(0, "  Address range split per DCT: %s\n",
-                                (dct_high_range_enabled(pvt) ? "yes" : "no"));
+                                 (dct_high_range_enabled(pvt) ? "yes" : "no"));
-                debugf0("  data interleave for ECC: %s, "
+                edac_dbg(0, "  data interleave for ECC: %s, DRAM cleared since last warm reset: %s\n",
-                        "DRAM cleared since last warm reset: %s\n",
+                         (dct_data_intlv_enabled(pvt) ? "enabled" : "disabled"),
-                        (dct_data_intlv_enabled(pvt) ? "enabled" : "disabled"),
+                         (dct_memory_cleared(pvt) ? "yes" : "no"));
-                        (dct_memory_cleared(pvt) ? "yes" : "no"));
-                debugf0("  channel interleave: %s, "
+                edac_dbg(0, "  channel interleave: %s, "
-                        "interleave bits selector: 0x%x\n",
+                         "interleave bits selector: 0x%x\n",
-                        (dct_interleave_enabled(pvt) ? "enabled" : "disabled"),
+                         (dct_interleave_enabled(pvt) ? "enabled" : "disabled"),
-                        dct_sel_interleave_addr(pvt));
+                         dct_sel_interleave_addr(pvt));
        }
        amd64_read_dct_pci_cfg(pvt, DCT_SEL_HI, &pvt->dct_sel_hi);
@@ -1428,7 +1421,7 @@ static int f1x_lookup_addr_in_dct(u64 in_addr, u32 nid, u8 dct)
        pvt = mci->pvt_info;
-        debugf1("input addr: 0x%llx, DCT: %d\n", in_addr, dct);
+        edac_dbg(1, "input addr: 0x%llx, DCT: %d\n", in_addr, dct);
        for_each_chip_select(csrow, dct, pvt) {
                if (!csrow_enabled(csrow, dct, pvt))
@@ -1436,19 +1429,18 @@ static int f1x_lookup_addr_in_dct(u64 in_addr, u32 nid, u8 dct)
                get_cs_base_and_mask(pvt, csrow, dct, &cs_base, &cs_mask);
-                debugf1("    CSROW=%d CSBase=0x%llx CSMask=0x%llx\n",
+                edac_dbg(1, "    CSROW=%d CSBase=0x%llx CSMask=0x%llx\n",
-                        csrow, cs_base, cs_mask);
+                         csrow, cs_base, cs_mask);
                cs_mask = ~cs_mask;
-                debugf1("    (InputAddr & ~CSMask)=0x%llx "
+                edac_dbg(1, "    (InputAddr & ~CSMask)=0x%llx (CSBase & ~CSMask)=0x%llx\n",
-                        "(CSBase & ~CSMask)=0x%llx\n",
+                         (in_addr & cs_mask), (cs_base & cs_mask));
-                        (in_addr & cs_mask), (cs_base & cs_mask));
                if ((in_addr & cs_mask) == (cs_base & cs_mask)) {
                        cs_found = f10_process_possible_spare(pvt, dct, csrow);
-                        debugf1(" MATCH csrow=%d\n", cs_found);
+                        edac_dbg(1, " MATCH csrow=%d\n", cs_found);
                        break;
                }
        }
@@ -1505,8 +1497,8 @@ static int f1x_match_to_this_node(struct amd64_pvt *pvt, unsigned range,
        u8 intlv_en   = dram_intlv_en(pvt, range);
        u32 intlv_sel = dram_intlv_sel(pvt, range);
-        debugf1("(range %d) SystemAddr= 0x%llx Limit=0x%llx\n",
+        edac_dbg(1, "(range %d) SystemAddr= 0x%llx Limit=0x%llx\n",
-                range, sys_addr, get_dram_limit(pvt, range));
+                 range, sys_addr, get_dram_limit(pvt, range));
        if (dhar_valid(pvt) &&
            dhar_base(pvt) <= sys_addr &&
@@ -1562,7 +1554,7 @@ static int f1x_match_to_this_node(struct amd64_pvt *pvt, unsigned range,
                                     (chan_addr & 0xfff);
        }
-        debugf1("   Normalized DCT addr: 0x%llx\n", chan_addr);
+        edac_dbg(1, "   Normalized DCT addr: 0x%llx\n", chan_addr);
        cs_found = f1x_lookup_addr_in_dct(chan_addr, node_id, channel);
@@ -1616,12 +1608,11 @@ static void f1x_map_sysaddr_to_csrow(struct mem_ctl_info *mci, u64 sys_addr,
        csrow = f1x_translate_sysaddr_to_cs(pvt, sys_addr, &nid, &chan);
        if (csrow < 0) {
-                edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci,
+                edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, 1,
                                     page, offset, syndrome,
                                     -1, -1, -1,
-                                     EDAC_MOD_STR,
                                     "failed to map error addr to a csrow",
-                                     NULL);
+                                     "");
                return;
        }
@@ -1633,10 +1624,10 @@ static void f1x_map_sysaddr_to_csrow(struct mem_ctl_info *mci, u64 sys_addr,
        if (dct_ganging_enabled(pvt))
                chan = get_channel_from_ecc_syndrome(mci, syndrome);
-        edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci,
+        edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, 1,
                             page, offset, syndrome,
                             csrow, chan, -1,
-                             EDAC_MOD_STR, "", NULL);
+                             "", "");
 }
 /*
@@ -1664,7 +1655,8 @@ static void amd64_debug_display_dimm_sizes(struct amd64_pvt *pvt, u8 ctrl)
        dcsb = (ctrl && !dct_ganging_enabled(pvt)) ? pvt->csels[1].csbases
                                                   : pvt->csels[0].csbases;
-        debugf1("F2x%d80 (DRAM Bank Address Mapping): 0x%08x\n", ctrl, dbam);
+        edac_dbg(1, "F2x%d80 (DRAM Bank Address Mapping): 0x%08x\n",
+                 ctrl, dbam);
        edac_printk(KERN_DEBUG, EDAC_MC, "DCT%d chip selects:\n", ctrl);
@@ -1840,7 +1832,7 @@ static int decode_syndrome(u16 syndrome, u16 *vectors, unsigned num_vecs,
                }
        }
-        debugf0("syndrome(%x) not found\n", syndrome);
+        edac_dbg(0, "syndrome(%x) not found\n", syndrome);
        return -1;
 }
@@ -1917,12 +1909,11 @@ static void amd64_handle_ce(struct mem_ctl_info *mci, struct mce *m)
        /* Ensure that the Error Address is VALID */
        if (!(m->status & MCI_STATUS_ADDRV)) {
                amd64_mc_err(mci, "HW has no ERROR_ADDRESS available\n");
-                edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci,
+                edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, 1,
                                     0, 0, 0,
                                     -1, -1, -1,
-                                     EDAC_MOD_STR,
                                     "HW has no ERROR_ADDRESS available",
-                                     NULL);
+                                     "");
                return;
        }
@@ -1946,12 +1937,11 @@ static void amd64_handle_ue(struct mem_ctl_info *mci, struct mce *m)
        if (!(m->status & MCI_STATUS_ADDRV)) {
                amd64_mc_err(mci, "HW has no ERROR_ADDRESS available\n");
-                edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci,
+                edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 1,
                                     0, 0, 0,
                                     -1, -1, -1,
-                                     EDAC_MOD_STR,
                                     "HW has no ERROR_ADDRESS available",
-                                     NULL);
+                                     "");
                return;
        }
@@ -1966,11 +1956,11 @@ static void amd64_handle_ue(struct mem_ctl_info *mci, struct mce *m)
        if (!src_mci) {
                amd64_mc_err(mci, "ERROR ADDRESS (0x%lx) NOT mapped to a MC\n",
                                  (unsigned long)sys_addr);
-                edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci,
+                edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 1,
                                     page, offset, 0,
                                     -1, -1, -1,
-                                     EDAC_MOD_STR,
+                                     "ERROR ADDRESS NOT mapped to a MC",
-                                     "ERROR ADDRESS NOT mapped to a MC", NULL);
+                                     "");
                return;
        }
@@ -1980,17 +1970,16 @@ static void amd64_handle_ue(struct mem_ctl_info *mci, struct mce *m)
        if (csrow < 0) {
                amd64_mc_err(mci, "ERROR_ADDRESS (0x%lx) NOT mapped to CS\n",
                                  (unsigned long)sys_addr);
-                edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci,
+                edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 1,
                                     page, offset, 0,
                                     -1, -1, -1,
-                                     EDAC_MOD_STR,
                                     "ERROR ADDRESS NOT mapped to CS",
-                                     NULL);
+                                     "");
        } else {
-                edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci,
+                edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 1,
                                     page, offset, 0,
                                     csrow, -1, -1,
-                                     EDAC_MOD_STR, "", NULL);
+                                     "", "");
        }
 }
@@ -2047,9 +2036,9 @@ static int reserve_mc_sibling_devs(struct amd64_pvt *pvt, u16 f1_id, u16 f3_id)
                return -ENODEV;
        }
-        debugf1("F1: %s\n", pci_name(pvt->F1));
+        edac_dbg(1, "F1: %s\n", pci_name(pvt->F1));
-        debugf1("F2: %s\n", pci_name(pvt->F2));
+        edac_dbg(1, "F2: %s\n", pci_name(pvt->F2));
-        debugf1("F3: %s\n", pci_name(pvt->F3));
+        edac_dbg(1, "F3: %s\n", pci_name(pvt->F3));
        return 0;
 }
@@ -2076,15 +2065,15 @@ static void read_mc_regs(struct amd64_pvt *pvt)
         * those are Read-As-Zero
         */
        rdmsrl(MSR_K8_TOP_MEM1, pvt->top_mem);
-        debugf0("  TOP_MEM:  0x%016llx\n", pvt->top_mem);
+        edac_dbg(0, "  TOP_MEM:  0x%016llx\n", pvt->top_mem);
        /* check first whether TOP_MEM2 is enabled */
        rdmsrl(MSR_K8_SYSCFG, msr_val);
        if (msr_val & (1U << 21)) {
                rdmsrl(MSR_K8_TOP_MEM2, pvt->top_mem2);
-                debugf0("  TOP_MEM2: 0x%016llx\n", pvt->top_mem2);
+                edac_dbg(0, "  TOP_MEM2: 0x%016llx\n", pvt->top_mem2);
        } else
-                debugf0("  TOP_MEM2 disabled.\n");
+                edac_dbg(0, "  TOP_MEM2 disabled\n");
        amd64_read_pci_cfg(pvt->F3, NBCAP, &pvt->nbcap);
@@ -2100,17 +2089,17 @@ static void read_mc_regs(struct amd64_pvt *pvt)
                if (!rw)
                        continue;
-                debugf1("  DRAM range[%d], base: 0x%016llx; limit: 0x%016llx\n",
+                edac_dbg(1, "  DRAM range[%d], base: 0x%016llx; limit: 0x%016llx\n",
-                        range,
+                         range,
-                        get_dram_base(pvt, range),
+                         get_dram_base(pvt, range),
-                        get_dram_limit(pvt, range));
+                         get_dram_limit(pvt, range));
-                debugf1("   IntlvEn=%s; Range access: %s%s IntlvSel=%d DstNode=%d\n",
+                edac_dbg(1, "   IntlvEn=%s; Range access: %s%s IntlvSel=%d DstNode=%d\n",
-                        dram_intlv_en(pvt, range) ? "Enabled" : "Disabled",
+                         dram_intlv_en(pvt, range) ? "Enabled" : "Disabled",
-                        (rw & 0x1) ? "R" : "-",
+                         (rw & 0x1) ? "R" : "-",
-                        (rw & 0x2) ? "W" : "-",
+                         (rw & 0x2) ? "W" : "-",
-                        dram_intlv_sel(pvt, range),
+                         dram_intlv_sel(pvt, range),
-                        dram_dst_node(pvt, range));
+                         dram_dst_node(pvt, range));
        }
        read_dct_base_mask(pvt);
@@ -2191,9 +2180,9 @@ static u32 amd64_csrow_nr_pages(struct amd64_pvt *pvt, u8 dct, int csrow_nr)
        nr_pages = pvt->ops->dbam_to_cs(pvt, dct, cs_mode) << (20 - PAGE_SHIFT);
-        debugf0("  (csrow=%d) DBAM map index= %d\n", csrow_nr, cs_mode);
+        edac_dbg(0, "  (csrow=%d) DBAM map index= %d\n", csrow_nr, cs_mode);
-        debugf0("    nr_pages/channel= %u  channel-count = %d\n",
+        edac_dbg(0, "    nr_pages/channel= %u  channel-count = %d\n",
-                nr_pages, pvt->channel_count);
+                 nr_pages, pvt->channel_count);
        return nr_pages;
 }
@@ -2205,6 +2194,7 @@ static u32 amd64_csrow_nr_pages(struct amd64_pvt *pvt, u8 dct, int csrow_nr)
 static int init_csrows(struct mem_ctl_info *mci)
 {
        struct csrow_info *csrow;
+        struct dimm_info *dimm;
        struct amd64_pvt *pvt = mci->pvt_info;
        u64 base, mask;
        u32 val;
@@ -2217,22 +2207,19 @@ static int init_csrows(struct mem_ctl_info *mci)
        pvt->nbcfg = val;
-        debugf0("node %d, NBCFG=0x%08x[ChipKillEccCap: %d|DramEccEn: %d]\n",
+        edac_dbg(0, "node %d, NBCFG=0x%08x[ChipKillEccCap: %d|DramEccEn: %d]\n",
-                pvt->mc_node_id, val,
+                 pvt->mc_node_id, val,
-                !!(val & NBCFG_CHIPKILL), !!(val & NBCFG_ECC_ENABLE));
+                 !!(val & NBCFG_CHIPKILL), !!(val & NBCFG_ECC_ENABLE));
        for_each_chip_select(i, 0, pvt) {
-                csrow = &mci->csrows[i];
+                csrow = mci->csrows[i];
                if (!csrow_enabled(i, 0, pvt) && !csrow_enabled(i, 1, pvt)) {
-                        debugf1("----CSROW %d EMPTY for node %d\n", i,
+                        edac_dbg(1, "----CSROW %d VALID for MC node %d\n",
-                                pvt->mc_node_id);
+                                 i, pvt->mc_node_id);
                        continue;
                }
-                debugf1("----CSROW %d VALID for MC node %d\n",
-                        i, pvt->mc_node_id);
                empty = 0;
                if (csrow_enabled(i, 0, pvt))
                        nr_pages = amd64_csrow_nr_pages(pvt, 0, i);
@@ -2244,8 +2231,9 @@ static int init_csrows(struct mem_ctl_info *mci)
                mtype = amd64_determine_memory_type(pvt, i);
-                debugf1("  for MC node %d csrow %d:\n", pvt->mc_node_id, i);
+                edac_dbg(1, "  for MC node %d csrow %d:\n", pvt->mc_node_id, i);
-                debugf1("    nr_pages: %u\n", nr_pages * pvt->channel_count);
+                edac_dbg(1, "    nr_pages: %u\n",
+                         nr_pages * pvt->channel_count);
                /*
                 * determine whether CHIPKILL or JUST ECC or NO ECC is operating
@@ -2257,9 +2245,10 @@ static int init_csrows(struct mem_ctl_info *mci)
                        edac_mode = EDAC_NONE;
                for (j = 0; j < pvt->channel_count; j++) {
-                        csrow->channels[j].dimm->mtype = mtype;
+                        dimm = csrow->channels[j]->dimm;
-                        csrow->channels[j].dimm->edac_mode = edac_mode;
+                        dimm->mtype = mtype;
-                        csrow->channels[j].dimm->nr_pages = nr_pages;
+                        dimm->edac_mode = edac_mode;
+                        dimm->nr_pages = nr_pages;
                }
        }
@@ -2296,9 +2285,9 @@ static bool amd64_nb_mce_bank_enabled_on_node(unsigned nid)
                struct msr *reg = per_cpu_ptr(msrs, cpu);
                nbe = reg->l & MSR_MCGCTL_NBE;
-                debugf0("core: %u, MCG_CTL: 0x%llx, NB MSR is %s\n",
+                edac_dbg(0, "core: %u, MCG_CTL: 0x%llx, NB MSR is %s\n",
-                        cpu, reg->q,
+                         cpu, reg->q,
-                        (nbe ? "enabled" : "disabled"));
+                         (nbe ? "enabled" : "disabled"));
                if (!nbe)
                        goto out;
@@ -2369,8 +2358,8 @@ static bool enable_ecc_error_reporting(struct ecc_settings *s, u8 nid,
        amd64_read_pci_cfg(F3, NBCFG, &value);
-        debugf0("1: node %d, NBCFG=0x%08x[DramEccEn: %d]\n",
+        edac_dbg(0, "1: node %d, NBCFG=0x%08x[DramEccEn: %d]\n",
-                nid, value, !!(value & NBCFG_ECC_ENABLE));
+                 nid, value, !!(value & NBCFG_ECC_ENABLE));
        if (!(value & NBCFG_ECC_ENABLE)) {
                amd64_warn("DRAM ECC disabled on this node, enabling...\n");
@@ -2394,8 +2383,8 @@ static bool enable_ecc_error_reporting(struct ecc_settings *s, u8 nid,
                s->flags.nb_ecc_prev = 1;
        }
-        debugf0("2: node %d, NBCFG=0x%08x[DramEccEn: %d]\n",
+        edac_dbg(0, "2: node %d, NBCFG=0x%08x[DramEccEn: %d]\n",
-                nid, value, !!(value & NBCFG_ECC_ENABLE));
+                 nid, value, !!(value & NBCFG_ECC_ENABLE));
        return ret;
 }
@@ -2463,26 +2452,29 @@ static bool ecc_enabled(struct pci_dev *F3, u8 nid)
        return true;
 }
-struct mcidev_sysfs_attribute sysfs_attrs[ARRAY_SIZE(amd64_dbg_attrs) +
+static int set_mc_sysfs_attrs(struct mem_ctl_info *mci)
-                                          ARRAY_SIZE(amd64_inj_attrs) +
-                                          1];
-struct mcidev_sysfs_attribute terminator = { .attr = { .name = NULL } };
-static void set_mc_sysfs_attrs(struct mem_ctl_info *mci)
 {
-        unsigned int i = 0, j = 0;
+        int rc;
-        for (; i < ARRAY_SIZE(amd64_dbg_attrs); i++)
+        rc = amd64_create_sysfs_dbg_files(mci);
-                sysfs_attrs[i] = amd64_dbg_attrs[i];
+        if (rc < 0)
+                return rc;
-        if (boot_cpu_data.x86 >= 0x10)
+        if (boot_cpu_data.x86 >= 0x10) {
-                for (j = 0; j < ARRAY_SIZE(amd64_inj_attrs); j++, i++)
+                rc = amd64_create_sysfs_inject_files(mci);
-                        sysfs_attrs[i] = amd64_inj_attrs[j];
+                if (rc < 0)
+                        return rc;
+        }
+        return 0;
+}
-        sysfs_attrs[i] = terminator;
+static void del_mc_sysfs_attrs(struct mem_ctl_info *mci)
+{
+        amd64_remove_sysfs_dbg_files(mci);
-        mci->mc_driver_sysfs_attributes = sysfs_attrs;
+        if (boot_cpu_data.x86 >= 0x10)
+                amd64_remove_sysfs_inject_files(mci);
 }
 static void setup_mci_misc_attrs(struct mem_ctl_info *mci,
@@ -2601,20 +2593,22 @@ static int amd64_init_one_instance(struct pci_dev *F2)
                goto err_siblings;
        mci->pvt_info = pvt;
-        mci->dev = &pvt->F2->dev;
+        mci->pdev = &pvt->F2->dev;
        setup_mci_misc_attrs(mci, fam_type);
        if (init_csrows(mci))
                mci->edac_cap = EDAC_FLAG_NONE;
-        set_mc_sysfs_attrs(mci);
        ret = -ENODEV;
        if (edac_mc_add_mc(mci)) {
-                debugf1("failed edac_mc_add_mc()\n");
+                edac_dbg(1, "failed edac_mc_add_mc()\n");
                goto err_add_mc;
        }
+        if (set_mc_sysfs_attrs(mci)) {
+                edac_dbg(1, "failed edac_mc_add_mc()\n");
+                goto err_add_sysfs;
+        }
        /* register stuff with EDAC MCE */
        if (report_gart_errors)
@@ -2628,6 +2622,8 @@ static int amd64_init_one_instance(struct pci_dev *F2)
        return 0;
+err_add_sysfs:
+        edac_mc_del_mc(mci->pdev);
 err_add_mc:
        edac_mc_free(mci);
@@ -2651,7 +2647,7 @@ static int __devinit amd64_probe_one_instance(struct pci_dev *pdev,
        ret = pci_enable_device(pdev);
        if (ret < 0) {
-                debugf0("ret=%d\n", ret);
+                edac_dbg(0, "ret=%d\n", ret);
                return -EIO;
        }
@@ -2698,6 +2694,8 @@ static void __devexit amd64_remove_one_instance(struct pci_dev *pdev)
        struct pci_dev *F3 = node_to_amd_nb(nid)->misc;
        struct ecc_settings *s = ecc_stngs[nid];
+        mci = find_mci_by_dev(&pdev->dev);
+        del_mc_sysfs_attrs(mci);
        /* Remove from EDAC CORE tracking list */
        mci = edac_mc_del_mc(&pdev->dev);
        if (!mci)
diff --git a/drivers/edac/amd64_edac.h b/drivers/edac/amd64_edac.h
index 9a666cb985b2..8d4804732bac 100644
--- a/drivers/edac/amd64_edac.h
+++ b/drivers/edac/amd64_edac.h
@@ -413,20 +413,33 @@ struct ecc_settings {
 };
 #ifdef CONFIG_EDAC_DEBUG
-#define NUM_DBG_ATTRS 5
+int amd64_create_sysfs_dbg_files(struct mem_ctl_info *mci);
+void amd64_remove_sysfs_dbg_files(struct mem_ctl_info *mci);
 #else
-#define NUM_DBG_ATTRS 0
+static inline int amd64_create_sysfs_dbg_files(struct mem_ctl_info *mci)
+{
+        return 0;
+}
+static void inline amd64_remove_sysfs_dbg_files(struct mem_ctl_info *mci)
+{
+}
 #endif
 #ifdef CONFIG_EDAC_AMD64_ERROR_INJECTION
-#define NUM_INJ_ATTRS 5
+int amd64_create_sysfs_inject_files(struct mem_ctl_info *mci);
+void amd64_remove_sysfs_inject_files(struct mem_ctl_info *mci);
 #else
-#define NUM_INJ_ATTRS 0
+static inline int amd64_create_sysfs_inject_files(struct mem_ctl_info *mci)
+{
+        return 0;
+}
+static inline void amd64_remove_sysfs_inject_files(struct mem_ctl_info *mci)
+{
+}
 #endif
-extern struct mcidev_sysfs_attribute amd64_dbg_attrs[NUM_DBG_ATTRS],
-                                     amd64_inj_attrs[NUM_INJ_ATTRS];
 /*
 * Each of the PCI Device IDs types have their own set of hardware accessor
 * functions and per device encoding/decoding logic.
@@ -460,3 +473,5 @@ int __amd64_write_pci_cfg_dword(struct pci_dev *pdev, int offset,
 int amd64_get_dram_hole_info(struct mem_ctl_info *mci, u64 *hole_base,
                             u64 *hole_offset, u64 *hole_size);
+#define to_mci(k) container_of(k, struct mem_ctl_info, dev)
diff --git a/drivers/edac/amd64_edac_dbg.c b/drivers/edac/amd64_edac_dbg.c
index e3562288f4ce..2c1bbf740605 100644
--- a/drivers/edac/amd64_edac_dbg.c
+++ b/drivers/edac/amd64_edac_dbg.c
@@ -1,8 +1,11 @@
 #include "amd64_edac.h"
 #define EDAC_DCT_ATTR_SHOW(reg)                                         \
-static ssize_t amd64_##reg##_show(struct mem_ctl_info *mci, char *data) \
+static ssize_t amd64_##reg##_show(struct device *dev,                   \
+                               struct device_attribute *mattr,          \
+                               char *data)                              \
 {                                                                       \
+        struct mem_ctl_info *mci = to_mci(dev);                         \
        struct amd64_pvt *pvt = mci->pvt_info;                          \
                return sprintf(data, "0x%016llx\n", (u64)pvt->reg);     \
 }
@@ -12,8 +15,12 @@ EDAC_DCT_ATTR_SHOW(dbam0);
 EDAC_DCT_ATTR_SHOW(top_mem);
 EDAC_DCT_ATTR_SHOW(top_mem2);
-static ssize_t amd64_hole_show(struct mem_ctl_info *mci, char *data)
+static ssize_t amd64_hole_show(struct device *dev,
+                               struct device_attribute *mattr,
+                               char *data)
 {
+        struct mem_ctl_info *mci = to_mci(dev);
        u64 hole_base = 0;
        u64 hole_offset = 0;
        u64 hole_size = 0;
@@ -27,46 +34,40 @@ static ssize_t amd64_hole_show(struct mem_ctl_info *mci, char *data)
 /*
 * update NUM_DBG_ATTRS in case you add new members
 */
-struct mcidev_sysfs_attribute amd64_dbg_attrs[] = {
+static DEVICE_ATTR(dhar, S_IRUGO, amd64_dhar_show, NULL);
+static DEVICE_ATTR(dbam, S_IRUGO, amd64_dbam0_show, NULL);
+static DEVICE_ATTR(topmem, S_IRUGO, amd64_top_mem_show, NULL);
+static DEVICE_ATTR(topmem2, S_IRUGO, amd64_top_mem2_show, NULL);
+static DEVICE_ATTR(dram_hole, S_IRUGO, amd64_hole_show, NULL);
+int amd64_create_sysfs_dbg_files(struct mem_ctl_info *mci)
+{
+        int rc;
+        rc = device_create_file(&mci->dev, &dev_attr_dhar);
+        if (rc < 0)
+                return rc;
+        rc = device_create_file(&mci->dev, &dev_attr_dbam);
+        if (rc < 0)
+                return rc;
+        rc = device_create_file(&mci->dev, &dev_attr_topmem);
+        if (rc < 0)
+                return rc;
+        rc = device_create_file(&mci->dev, &dev_attr_topmem2);
+        if (rc < 0)
+                return rc;
+        rc = device_create_file(&mci->dev, &dev_attr_dram_hole);
+        if (rc < 0)
+                return rc;
-        {
+        return 0;
-                .attr = {
+}
-                        .name = "dhar",
-                        .mode = (S_IRUGO)
+void amd64_remove_sysfs_dbg_files(struct mem_ctl_info *mci)
-                },
+{
-                .show = amd64_dhar_show,
+        device_remove_file(&mci->dev, &dev_attr_dhar);
-                .store = NULL,
+        device_remove_file(&mci->dev, &dev_attr_dbam);
-        },
+        device_remove_file(&mci->dev, &dev_attr_topmem);
-        {
+        device_remove_file(&mci->dev, &dev_attr_topmem2);
-                .attr = {
+        device_remove_file(&mci->dev, &dev_attr_dram_hole);
-                        .name = "dbam",
+}
-                        .mode = (S_IRUGO)
-                },
-                .show = amd64_dbam0_show,
-                .store = NULL,
-        },
-        {
-                .attr = {
-                        .name = "topmem",
-                        .mode = (S_IRUGO)
-                },
-                .show = amd64_top_mem_show,
-                .store = NULL,
-        },
-        {
-                .attr = {
-                        .name = "topmem2",
-                        .mode = (S_IRUGO)
-                },
-                .show = amd64_top_mem2_show,
-                .store = NULL,
-        },
-        {
-                .attr = {
-                        .name = "dram_hole",
-                        .mode = (S_IRUGO)
-                },
-                .show = amd64_hole_show,
-                .store = NULL,
-        },
-};
diff --git a/drivers/edac/amd64_edac_inj.c b/drivers/edac/amd64_edac_inj.c
index 303f10e03dda..53d972e00dfb 100644
--- a/drivers/edac/amd64_edac_inj.c
+++ b/drivers/edac/amd64_edac_inj.c
@@ -1,7 +1,10 @@
 #include "amd64_edac.h"
-static ssize_t amd64_inject_section_show(struct mem_ctl_info *mci, char *buf)
+static ssize_t amd64_inject_section_show(struct device *dev,
+                                         struct device_attribute *mattr,
+                                         char *buf)
 {
+        struct mem_ctl_info *mci = to_mci(dev);
        struct amd64_pvt *pvt = mci->pvt_info;
        return sprintf(buf, "0x%x\n", pvt->injection.section);
 }
@@ -12,9 +15,11 @@ static ssize_t amd64_inject_section_show(struct mem_ctl_info *mci, char *buf)
 *
 * range: 0..3
 */
-static ssize_t amd64_inject_section_store(struct mem_ctl_info *mci,
+static ssize_t amd64_inject_section_store(struct device *dev,
+                                          struct device_attribute *mattr,
                                          const char *data, size_t count)
 {
+        struct mem_ctl_info *mci = to_mci(dev);
        struct amd64_pvt *pvt = mci->pvt_info;
        unsigned long value;
        int ret = 0;
@@ -33,8 +38,11 @@ static ssize_t amd64_inject_section_store(struct mem_ctl_info *mci,
        return ret;
 }
-static ssize_t amd64_inject_word_show(struct mem_ctl_info *mci, char *buf)
+static ssize_t amd64_inject_word_show(struct device *dev,
+                                        struct device_attribute *mattr,
+                                        char *buf)
 {
+        struct mem_ctl_info *mci = to_mci(dev);
        struct amd64_pvt *pvt = mci->pvt_info;
        return sprintf(buf, "0x%x\n", pvt->injection.word);
 }
@@ -45,9 +53,11 @@ static ssize_t amd64_inject_word_show(struct mem_ctl_info *mci, char *buf)
 *
 * range: 0..8
 */
-static ssize_t amd64_inject_word_store(struct mem_ctl_info *mci,
+static ssize_t amd64_inject_word_store(struct device *dev,
-                                        const char *data, size_t count)
+                                       struct device_attribute *mattr,
+                                       const char *data, size_t count)
 {
+        struct mem_ctl_info *mci = to_mci(dev);
        struct amd64_pvt *pvt = mci->pvt_info;
        unsigned long value;
        int ret = 0;
@@ -66,8 +76,11 @@ static ssize_t amd64_inject_word_store(struct mem_ctl_info *mci,
        return ret;
 }
-static ssize_t amd64_inject_ecc_vector_show(struct mem_ctl_info *mci, char *buf)
+static ssize_t amd64_inject_ecc_vector_show(struct device *dev,
+                                            struct device_attribute *mattr,
+                                            char *buf)
 {
+        struct mem_ctl_info *mci = to_mci(dev);
        struct amd64_pvt *pvt = mci->pvt_info;
        return sprintf(buf, "0x%x\n", pvt->injection.bit_map);
 }
@@ -77,9 +90,11 @@ static ssize_t amd64_inject_ecc_vector_show(struct mem_ctl_info *mci, char *buf)
 * corresponding bit within the error injection word above. When used during a
 * DRAM ECC read, it holds the contents of the of the DRAM ECC bits.
 */
-static ssize_t amd64_inject_ecc_vector_store(struct mem_ctl_info *mci,
+static ssize_t amd64_inject_ecc_vector_store(struct device *dev,
-                                             const char *data, size_t count)
+                                       struct device_attribute *mattr,
+                                       const char *data, size_t count)
 {
+        struct mem_ctl_info *mci = to_mci(dev);
        struct amd64_pvt *pvt = mci->pvt_info;
        unsigned long value;
        int ret = 0;
@@ -103,9 +118,11 @@ static ssize_t amd64_inject_ecc_vector_store(struct mem_ctl_info *mci,
 * Do a DRAM ECC read. Assemble staged values in the pvt area, format into
 * fields needed by the injection registers and read the NB Array Data Port.
 */
-static ssize_t amd64_inject_read_store(struct mem_ctl_info *mci,
+static ssize_t amd64_inject_read_store(struct device *dev,
-                                        const char *data, size_t count)
+                                       struct device_attribute *mattr,
+                                       const char *data, size_t count)
 {
+        struct mem_ctl_info *mci = to_mci(dev);
        struct amd64_pvt *pvt = mci->pvt_info;
        unsigned long value;
        u32 section, word_bits;
@@ -125,7 +142,8 @@ static ssize_t amd64_inject_read_store(struct mem_ctl_info *mci,
                /* Issue 'word' and 'bit' along with the READ request */
                amd64_write_pci_cfg(pvt->F3, F10_NB_ARRAY_DATA, word_bits);
-                debugf0("section=0x%x word_bits=0x%x\n", section, word_bits);
+                edac_dbg(0, "section=0x%x word_bits=0x%x\n",
+                         section, word_bits);
                return count;
        }
@@ -136,9 +154,11 @@ static ssize_t amd64_inject_read_store(struct mem_ctl_info *mci,
 * Do a DRAM ECC write. Assemble staged values in the pvt area and format into
 * fields needed by the injection registers.
 */
-static ssize_t amd64_inject_write_store(struct mem_ctl_info *mci,
+static ssize_t amd64_inject_write_store(struct device *dev,
+                                        struct device_attribute *mattr,
                                        const char *data, size_t count)
 {
+        struct mem_ctl_info *mci = to_mci(dev);
        struct amd64_pvt *pvt = mci->pvt_info;
        unsigned long value;
        u32 section, word_bits;
@@ -158,7 +178,8 @@ static ssize_t amd64_inject_write_store(struct mem_ctl_info *mci,
                /* Issue 'word' and 'bit' along with the READ request */
                amd64_write_pci_cfg(pvt->F3, F10_NB_ARRAY_DATA, word_bits);
-                debugf0("section=0x%x word_bits=0x%x\n", section, word_bits);
+                edac_dbg(0, "section=0x%x word_bits=0x%x\n",
+                         section, word_bits);
                return count;
        }
@@ -168,46 +189,47 @@ static ssize_t amd64_inject_write_store(struct mem_ctl_info *mci,
 /*
 * update NUM_INJ_ATTRS in case you add new members
 */
-struct mcidev_sysfs_attribute amd64_inj_attrs[] = {
+static DEVICE_ATTR(inject_section, S_IRUGO | S_IWUSR,
-        {
+                   amd64_inject_section_show, amd64_inject_section_store);
-                .attr = {
+static DEVICE_ATTR(inject_word, S_IRUGO | S_IWUSR,
-                        .name = "inject_section",
+                   amd64_inject_word_show, amd64_inject_word_store);
-                        .mode = (S_IRUGO | S_IWUSR)
+static DEVICE_ATTR(inject_ecc_vector, S_IRUGO | S_IWUSR,
-                },
+                   amd64_inject_ecc_vector_show, amd64_inject_ecc_vector_store);
-                .show = amd64_inject_section_show,
+static DEVICE_ATTR(inject_write, S_IRUGO | S_IWUSR,
-                .store = amd64_inject_section_store,
+                   NULL, amd64_inject_write_store);
-        },
+static DEVICE_ATTR(inject_read, S_IRUGO | S_IWUSR,
-        {
+                   NULL, amd64_inject_read_store);
-                .attr = {
-                        .name = "inject_word",
-                        .mode = (S_IRUGO | S_IWUSR)
+int amd64_create_sysfs_inject_files(struct mem_ctl_info *mci)
-                },
+{
-                .show = amd64_inject_word_show,
+        int rc;
-                .store = amd64_inject_word_store,
-        },
+        rc = device_create_file(&mci->dev, &dev_attr_inject_section);
-        {
+        if (rc < 0)
-                .attr = {
+                return rc;
-                        .name = "inject_ecc_vector",
+        rc = device_create_file(&mci->dev, &dev_attr_inject_word);
-                        .mode = (S_IRUGO | S_IWUSR)
+        if (rc < 0)
-                },
+                return rc;
-                .show = amd64_inject_ecc_vector_show,
+        rc = device_create_file(&mci->dev, &dev_attr_inject_ecc_vector);
-                .store = amd64_inject_ecc_vector_store,
+        if (rc < 0)
-        },
+                return rc;
-        {
+        rc = device_create_file(&mci->dev, &dev_attr_inject_write);
-                .attr = {
+        if (rc < 0)
-                        .name = "inject_write",
+                return rc;
-                        .mode = (S_IRUGO | S_IWUSR)
+        rc = device_create_file(&mci->dev, &dev_attr_inject_read);
-                },
+        if (rc < 0)
-                .show = NULL,
+                return rc;
-                .store = amd64_inject_write_store,
-        },
+        return 0;
-        {
+}
-                .attr = {
-                        .name = "inject_read",
+void amd64_remove_sysfs_inject_files(struct mem_ctl_info *mci)
-                        .mode = (S_IRUGO | S_IWUSR)
+{
-                },
+        device_remove_file(&mci->dev, &dev_attr_inject_section);
-                .show = NULL,
+        device_remove_file(&mci->dev, &dev_attr_inject_word);
-                .store = amd64_inject_read_store,
+        device_remove_file(&mci->dev, &dev_attr_inject_ecc_vector);
-        },
+        device_remove_file(&mci->dev, &dev_attr_inject_write);
-};
+        device_remove_file(&mci->dev, &dev_attr_inject_read);
+}
diff --git a/drivers/edac/amd76x_edac.c b/drivers/edac/amd76x_edac.c
index 9774d443fa57..29eeb68a200c 100644
--- a/drivers/edac/amd76x_edac.c
+++ b/drivers/edac/amd76x_edac.c
@@ -105,7 +105,7 @@ static void amd76x_get_error_info(struct mem_ctl_info *mci,
 {
        struct pci_dev *pdev;
-        pdev = to_pci_dev(mci->dev);
+        pdev = to_pci_dev(mci->pdev);
        pci_read_config_dword(pdev, AMD76X_ECC_MODE_STATUS,
                        &info->ecc_mode_status);
@@ -145,10 +145,10 @@ static int amd76x_process_error_info(struct mem_ctl_info *mci,
                if (handle_errors) {
                        row = (info->ecc_mode_status >> 4) & 0xf;
-                        edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci,
+                        edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 1,
-                                             mci->csrows[row].first_page, 0, 0,
+                                             mci->csrows[row]->first_page, 0, 0,
                                             row, 0, -1,
-                                             mci->ctl_name, "", NULL);
+                                             mci->ctl_name, "");
                }
        }
@@ -160,10 +160,10 @@ static int amd76x_process_error_info(struct mem_ctl_info *mci,
                if (handle_errors) {
                        row = info->ecc_mode_status & 0xf;
-                        edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci,
+                        edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, 1,
-                                             mci->csrows[row].first_page, 0, 0,
+                                             mci->csrows[row]->first_page, 0, 0,
                                             row, 0, -1,
-                                             mci->ctl_name, "", NULL);
+                                             mci->ctl_name, "");
                }
        }
@@ -180,7 +180,7 @@ static int amd76x_process_error_info(struct mem_ctl_info *mci,
 static void amd76x_check(struct mem_ctl_info *mci)
 {
        struct amd76x_error_info info;
-        debugf3("%s()\n", __func__);
+        edac_dbg(3, "\n");
        amd76x_get_error_info(mci, &info);
        amd76x_process_error_info(mci, &info, 1);
 }
@@ -194,8 +194,8 @@ static void amd76x_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev,
        int index;
        for (index = 0; index < mci->nr_csrows; index++) {
-                csrow = &mci->csrows[index];
+                csrow = mci->csrows[index];
-                dimm = csrow->channels[0].dimm;
+                dimm = csrow->channels[0]->dimm;
                /* find the DRAM Chip Select Base address and mask */
                pci_read_config_dword(pdev,
@@ -241,7 +241,7 @@ static int amd76x_probe1(struct pci_dev *pdev, int dev_idx)
        u32 ems_mode;
        struct amd76x_error_info discard;
-        debugf0("%s()\n", __func__);
+        edac_dbg(0, "\n");
        pci_read_config_dword(pdev, AMD76X_ECC_MODE_STATUS, &ems);
        ems_mode = (ems >> 10) & 0x3;
@@ -256,8 +256,8 @@ static int amd76x_probe1(struct pci_dev *pdev, int dev_idx)
        if (mci == NULL)
                return -ENOMEM;
-        debugf0("%s(): mci = %p\n", __func__, mci);
+        edac_dbg(0, "mci = %p\n", mci);
-        mci->dev = &pdev->dev;
+        mci->pdev = &pdev->dev;
        mci->mtype_cap = MEM_FLAG_RDDR;
        mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_EC | EDAC_FLAG_SECDED;
        mci->edac_cap = ems_mode ?
@@ -276,7 +276,7 @@ static int amd76x_probe1(struct pci_dev *pdev, int dev_idx)
         * type of memory controller.  The ID is therefore hardcoded to 0.
         */
        if (edac_mc_add_mc(mci)) {
-                debugf3("%s(): failed edac_mc_add_mc()\n", __func__);
+                edac_dbg(3, "failed edac_mc_add_mc()\n");
                goto fail;
        }
@@ -292,7 +292,7 @@ static int amd76x_probe1(struct pci_dev *pdev, int dev_idx)
        }
        /* get this far and it's successful */
-        debugf3("%s(): success\n", __func__);
+        edac_dbg(3, "success\n");
        return 0;
 fail:
@@ -304,7 +304,7 @@ fail:
 static int __devinit amd76x_init_one(struct pci_dev *pdev,
                                const struct pci_device_id *ent)
 {
-        debugf0("%s()\n", __func__);
+        edac_dbg(0, "\n");
        /* don't need to call pci_enable_device() */
        return amd76x_probe1(pdev, ent->driver_data);
@@ -322,7 +322,7 @@ static void __devexit amd76x_remove_one(struct pci_dev *pdev)
 {
        struct mem_ctl_info *mci;
-        debugf0("%s()\n", __func__);
+        edac_dbg(0, "\n");
        if (amd76x_pci)
                edac_pci_release_generic_ctl(amd76x_pci);
diff --git a/drivers/edac/cell_edac.c b/drivers/edac/cell_edac.c
index 69ee6aab5c71..a1bbd8edd257 100644
--- a/drivers/edac/cell_edac.c
+++ b/drivers/edac/cell_edac.c
@@ -33,10 +33,10 @@ struct cell_edac_priv
 static void cell_edac_count_ce(struct mem_ctl_info *mci, int chan, u64 ar)
 {
        struct cell_edac_priv           *priv = mci->pvt_info;
-        struct csrow_info               *csrow = &mci->csrows[0];
+        struct csrow_info               *csrow = mci->csrows[0];
        unsigned long                   address, pfn, offset, syndrome;
-        dev_dbg(mci->dev, "ECC CE err on node %d, channel %d, ar = 0x%016llx\n",
+        dev_dbg(mci->pdev, "ECC CE err on node %d, channel %d, ar = 0x%016llx\n",
                priv->node, chan, ar);
        /* Address decoding is likely a bit bogus, to dbl check */
@@ -48,18 +48,18 @@ static void cell_edac_count_ce(struct mem_ctl_info *mci, int chan, u64 ar)
        syndrome = (ar & 0x000000001fe00000ul) >> 21;
        /* TODO: Decoding of the error address */
-        edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci,
+        edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, 1,
                             csrow->first_page + pfn, offset, syndrome,
-                             0, chan, -1, "", "", NULL);
+                             0, chan, -1, "", "");
 }
 static void cell_edac_count_ue(struct mem_ctl_info *mci, int chan, u64 ar)
 {
        struct cell_edac_priv           *priv = mci->pvt_info;
-        struct csrow_info               *csrow = &mci->csrows[0];
+        struct csrow_info               *csrow = mci->csrows[0];
        unsigned long                   address, pfn, offset;
-        dev_dbg(mci->dev, "ECC UE err on node %d, channel %d, ar = 0x%016llx\n",
+        dev_dbg(mci->pdev, "ECC UE err on node %d, channel %d, ar = 0x%016llx\n",
                priv->node, chan, ar);
        /* Address decoding is likely a bit bogus, to dbl check */
@@ -70,9 +70,9 @@ static void cell_edac_count_ue(struct mem_ctl_info *mci, int chan, u64 ar)
        offset = address & ~PAGE_MASK;
        /* TODO: Decoding of the error address */
-        edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci,
+        edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 1,
                             csrow->first_page + pfn, offset, 0,
-                             0, chan, -1, "", "", NULL);
+                             0, chan, -1, "", "");
 }
 static void cell_edac_check(struct mem_ctl_info *mci)
@@ -83,7 +83,7 @@ static void cell_edac_check(struct mem_ctl_info *mci)
        fir = in_be64(&priv->regs->mic_fir);
 #ifdef DEBUG
        if (fir != priv->prev_fir) {
-                dev_dbg(mci->dev, "fir change : 0x%016lx\n", fir);
+                dev_dbg(mci->pdev, "fir change : 0x%016lx\n", fir);
                priv->prev_fir = fir;
        }
 #endif
@@ -119,14 +119,14 @@ static void cell_edac_check(struct mem_ctl_info *mci)
                mb();   /* sync up */
 #ifdef DEBUG
                fir = in_be64(&priv->regs->mic_fir);
-                dev_dbg(mci->dev, "fir clear  : 0x%016lx\n", fir);
+                dev_dbg(mci->pdev, "fir clear  : 0x%016lx\n", fir);
 #endif
        }
 }
 static void __devinit cell_edac_init_csrows(struct mem_ctl_info *mci)
 {
-        struct csrow_info               *csrow = &mci->csrows[0];
+        struct csrow_info               *csrow = mci->csrows[0];
        struct dimm_info                *dimm;
        struct cell_edac_priv           *priv = mci->pvt_info;
        struct device_node              *np;
@@ -150,12 +150,12 @@ static void __devinit cell_edac_init_csrows(struct mem_ctl_info *mci)
                csrow->last_page = csrow->first_page + nr_pages - 1;
                for (j = 0; j < csrow->nr_channels; j++) {
-                        dimm = csrow->channels[j].dimm;
+                        dimm = csrow->channels[j]->dimm;
                        dimm->mtype = MEM_XDR;
                        dimm->edac_mode = EDAC_SECDED;
                        dimm->nr_pages = nr_pages / csrow->nr_channels;
                }
-                dev_dbg(mci->dev,
+                dev_dbg(mci->pdev,
                        "Initialized on node %d, chanmask=0x%x,"
                        " first_page=0x%lx, nr_pages=0x%x\n",
                        priv->node, priv->chanmask,
@@ -212,7 +212,7 @@ static int __devinit cell_edac_probe(struct platform_device *pdev)
        priv->regs = regs;
        priv->node = pdev->id;
        priv->chanmask = chanmask;
-        mci->dev = &pdev->dev;
+        mci->pdev = &pdev->dev;
        mci->mtype_cap = MEM_FLAG_XDR;
        mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_EC | EDAC_FLAG_SECDED;
        mci->edac_cap = EDAC_FLAG_EC | EDAC_FLAG_SECDED;
diff --git a/drivers/edac/cpc925_edac.c b/drivers/edac/cpc925_edac.c
index e22030a9de66..c2ef13495873 100644
--- a/drivers/edac/cpc925_edac.c
+++ b/drivers/edac/cpc925_edac.c
@@ -316,13 +316,12 @@ static void get_total_mem(struct cpc925_mc_pdata *pdata)
                reg += aw;
                size = of_read_number(reg, sw);
                reg += sw;
-                debugf1("%s: start 0x%lx, size 0x%lx\n", __func__,
+                edac_dbg(1, "start 0x%lx, size 0x%lx\n", start, size);
-                        start, size);
                pdata->total_mem += size;
        } while (reg < reg_end);
        of_node_put(np);
-        debugf0("%s: total_mem 0x%lx\n", __func__, pdata->total_mem);
+        edac_dbg(0, "total_mem 0x%lx\n", pdata->total_mem);
 }
 static void cpc925_init_csrows(struct mem_ctl_info *mci)
@@ -330,8 +329,9 @@ static void cpc925_init_csrows(struct mem_ctl_info *mci)
        struct cpc925_mc_pdata *pdata = mci->pvt_info;
        struct csrow_info *csrow;
        struct dimm_info *dimm;
+        enum dev_type dtype;
        int index, j;
-        u32 mbmr, mbbar, bba;
+        u32 mbmr, mbbar, bba, grain;
        unsigned long row_size, nr_pages, last_nr_pages = 0;
        get_total_mem(pdata);
@@ -347,7 +347,7 @@ static void cpc925_init_csrows(struct mem_ctl_info *mci)
                if (bba == 0)
                        continue; /* not populated */
-                csrow = &mci->csrows[index];
+                csrow = mci->csrows[index];
                row_size = bba * (1UL << 28);   /* 256M */
                csrow->first_page = last_nr_pages;
@@ -355,37 +355,36 @@ static void cpc925_init_csrows(struct mem_ctl_info *mci)
                csrow->last_page = csrow->first_page + nr_pages - 1;
                last_nr_pages = csrow->last_page + 1;
+                switch (csrow->nr_channels) {
+                case 1: /* Single channel */
+                        grain = 32; /* four-beat burst of 32 bytes */
+                        break;
+                case 2: /* Dual channel */
+                default:
+                        grain = 64; /* four-beat burst of 64 bytes */
+                        break;
+                }
+                switch ((mbmr & MBMR_MODE_MASK) >> MBMR_MODE_SHIFT) {
+                case 6: /* 0110, no way to differentiate X8 VS X16 */
+                case 5: /* 0101 */
+                case 8: /* 1000 */
+                        dtype = DEV_X16;
+                        break;
+                case 7: /* 0111 */
+                case 9: /* 1001 */
+                        dtype = DEV_X8;
+                        break;
+                default:
+                        dtype = DEV_UNKNOWN;
+                break;
+                }
                for (j = 0; j < csrow->nr_channels; j++) {
-                        dimm = csrow->channels[j].dimm;
+                        dimm = csrow->channels[j]->dimm;
                        dimm->nr_pages = nr_pages / csrow->nr_channels;
                        dimm->mtype = MEM_RDDR;
                        dimm->edac_mode = EDAC_SECDED;
+                        dimm->grain = grain;
-                        switch (csrow->nr_channels) {
+                        dimm->dtype = dtype;
-                        case 1: /* Single channel */
-                                dimm->grain = 32; /* four-beat burst of 32 bytes */
-                                break;
-                        case 2: /* Dual channel */
-                        default:
-                                dimm->grain = 64; /* four-beat burst of 64 bytes */
-                                break;
-                        }
-                        switch ((mbmr & MBMR_MODE_MASK) >> MBMR_MODE_SHIFT) {
-                        case 6: /* 0110, no way to differentiate X8 VS X16 */
-                        case 5: /* 0101 */
-                        case 8: /* 1000 */
-                                dimm->dtype = DEV_X16;
-                                break;
-                        case 7: /* 0111 */
-                        case 9: /* 1001 */
-                                dimm->dtype = DEV_X8;
-                                break;
-                        default:
-                                dimm->dtype = DEV_UNKNOWN;
-                                break;
-                        }
                }
        }
 }
@@ -463,7 +462,7 @@ static void cpc925_mc_get_pfn(struct mem_ctl_info *mci, u32 mear,
        *csrow = rank;
 #ifdef CONFIG_EDAC_DEBUG
-        if (mci->csrows[rank].first_page == 0) {
+        if (mci->csrows[rank]->first_page == 0) {
                cpc925_mc_printk(mci, KERN_ERR, "ECC occurs in a "
                        "non-populated csrow, broken hardware?\n");
                return;
@@ -471,7 +470,7 @@ static void cpc925_mc_get_pfn(struct mem_ctl_info *mci, u32 mear,
 #endif
        /* Revert csrow number */
-        pa = mci->csrows[rank].first_page << PAGE_SHIFT;
+        pa = mci->csrows[rank]->first_page << PAGE_SHIFT;
        /* Revert column address */
        col += bcnt;
@@ -512,7 +511,7 @@ static void cpc925_mc_get_pfn(struct mem_ctl_info *mci, u32 mear,
        *offset = pa & (PAGE_SIZE - 1);
        *pfn = pa >> PAGE_SHIFT;
-        debugf0("%s: ECC physical address 0x%lx\n", __func__, pa);
+        edac_dbg(0, "ECC physical address 0x%lx\n", pa);
 }
 static int cpc925_mc_find_channel(struct mem_ctl_info *mci, u16 syndrome)
@@ -555,18 +554,18 @@ static void cpc925_mc_check(struct mem_ctl_info *mci)
        if (apiexcp & CECC_EXCP_DETECTED) {
                cpc925_mc_printk(mci, KERN_INFO, "DRAM CECC Fault\n");
                channel = cpc925_mc_find_channel(mci, syndrome);
-                edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci,
+                edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, 1,
                                     pfn, offset, syndrome,
                                     csrow, channel, -1,
-                                     mci->ctl_name, "", NULL);
+                                     mci->ctl_name, "");
        }
        if (apiexcp & UECC_EXCP_DETECTED) {
                cpc925_mc_printk(mci, KERN_INFO, "DRAM UECC Fault\n");
-                edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci,
+                edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, 1,
                                     pfn, offset, 0,
                                     csrow, -1, -1,
-                                     mci->ctl_name, "", NULL);
+                                     mci->ctl_name, "");
        }
        cpc925_mc_printk(mci, KERN_INFO, "Dump registers:\n");
@@ -852,8 +851,8 @@ static void cpc925_add_edac_devices(void __iomem *vbase)
                        goto err2;
                }
-                debugf0("%s: Successfully added edac device for %s\n",
+                edac_dbg(0, "Successfully added edac device for %s\n",
-                        __func__, dev_info->ctl_name);
+                         dev_info->ctl_name);
                continue;
@@ -884,8 +883,8 @@ static void cpc925_del_edac_devices(void)
                if (dev_info->exit)
                        dev_info->exit(dev_info);
-                debugf0("%s: Successfully deleted edac device for %s\n",
+                edac_dbg(0, "Successfully deleted edac device for %s\n",
-                        __func__, dev_info->ctl_name);
+                         dev_info->ctl_name);
        }
 }
@@ -900,7 +899,7 @@ static int cpc925_get_sdram_scrub_rate(struct mem_ctl_info *mci)
        mscr = __raw_readl(pdata->vbase + REG_MSCR_OFFSET);
        si = (mscr & MSCR_SI_MASK) >> MSCR_SI_SHIFT;
-        debugf0("%s, Mem Scrub Ctrl Register 0x%x\n", __func__, mscr);
+        edac_dbg(0, "Mem Scrub Ctrl Register 0x%x\n", mscr);
        if (((mscr & MSCR_SCRUB_MOD_MASK) != MSCR_BACKGR_SCRUB) ||
            (si == 0)) {
@@ -928,8 +927,7 @@ static int cpc925_mc_get_channels(void __iomem *vbase)
            ((mbcr & MBCR_64BITBUS_MASK) == 0))
                dual = 1;
-        debugf0("%s: %s channel\n", __func__,
+        edac_dbg(0, "%s channel\n", (dual > 0) ? "Dual" : "Single");
-                (dual > 0) ? "Dual" : "Single");
        return dual;
 }
@@ -944,7 +942,7 @@ static int __devinit cpc925_probe(struct platform_device *pdev)
        struct resource *r;
        int res = 0, nr_channels;
-        debugf0("%s: %s platform device found!\n", __func__, pdev->name);
+        edac_dbg(0, "%s platform device found!\n", pdev->name);
        if (!devres_open_group(&pdev->dev, cpc925_probe, GFP_KERNEL)) {
                res = -ENOMEM;
@@ -995,7 +993,7 @@ static int __devinit cpc925_probe(struct platform_device *pdev)
        pdata->edac_idx = edac_mc_idx++;
        pdata->name = pdev->name;
-        mci->dev = &pdev->dev;
+        mci->pdev = &pdev->dev;
        platform_set_drvdata(pdev, mci);
        mci->dev_name = dev_name(&pdev->dev);
        mci->mtype_cap = MEM_FLAG_RDDR | MEM_FLAG_DDR;
@@ -1026,7 +1024,7 @@ static int __devinit cpc925_probe(struct platform_device *pdev)
        cpc925_add_edac_devices(vbase);
        /* get this far and it's successful */
-        debugf0("%s: success\n", __func__);
+        edac_dbg(0, "success\n");
        res = 0;
        goto out;
diff --git a/drivers/edac/e752x_edac.c b/drivers/edac/e752x_edac.c
index 3186512c9739..a5ed6b795fd4 100644
--- a/drivers/edac/e752x_edac.c
+++ b/drivers/edac/e752x_edac.c
@@ -309,7 +309,7 @@ static unsigned long ctl_page_to_phys(struct mem_ctl_info *mci,
        u32 remap;
        struct e752x_pvt *pvt = (struct e752x_pvt *)mci->pvt_info;
-        debugf3("%s()\n", __func__);
+        edac_dbg(3, "\n");
        if (page < pvt->tolm)
                return page;
@@ -335,7 +335,7 @@ static void do_process_ce(struct mem_ctl_info *mci, u16 error_one,
        int i;
        struct e752x_pvt *pvt = (struct e752x_pvt *)mci->pvt_info;
-        debugf3("%s()\n", __func__);
+        edac_dbg(3, "\n");
        /* convert the addr to 4k page */
        page = sec1_add >> (PAGE_SHIFT - 4);
@@ -371,10 +371,10 @@ static void do_process_ce(struct mem_ctl_info *mci, u16 error_one,
        channel = !(error_one & 1);
        /* e752x mc reads 34:6 of the DRAM linear address */
-        edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci,
+        edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, 1,
                             page, offset_in_page(sec1_add << 4), sec1_syndrome,
                             row, channel, -1,
-                             "e752x CE", "", NULL);
+                             "e752x CE", "");
 }
 static inline void process_ce(struct mem_ctl_info *mci, u16 error_one,
@@ -394,7 +394,7 @@ static void do_process_ue(struct mem_ctl_info *mci, u16 error_one,
        int row;
        struct e752x_pvt *pvt = (struct e752x_pvt *)mci->pvt_info;
-        debugf3("%s()\n", __func__);
+        edac_dbg(3, "\n");
        if (error_one & 0x0202) {
                error_2b = ded_add;
@@ -408,11 +408,11 @@ static void do_process_ue(struct mem_ctl_info *mci, u16 error_one,
                        edac_mc_find_csrow_by_page(mci, block_page);
                /* e752x mc reads 34:6 of the DRAM linear address */
-                edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci,
+                edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 1,
                                        block_page,
                                        offset_in_page(error_2b << 4), 0,
                                         row, -1, -1,
-                                        "e752x UE from Read", "", NULL);
+                                        "e752x UE from Read", "");
        }
        if (error_one & 0x0404) {
@@ -427,11 +427,11 @@ static void do_process_ue(struct mem_ctl_info *mci, u16 error_one,
                        edac_mc_find_csrow_by_page(mci, block_page);
                /* e752x mc reads 34:6 of the DRAM linear address */
-                edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci,
+                edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 1,
                                        block_page,
                                        offset_in_page(error_2b << 4), 0,
                                        row, -1, -1,
-                                        "e752x UE from Scruber", "", NULL);
+                                        "e752x UE from Scruber", "");
        }
 }
@@ -453,10 +453,10 @@ static inline void process_ue_no_info_wr(struct mem_ctl_info *mci,
        if (!handle_error)
                return;
-        debugf3("%s()\n", __func__);
+        edac_dbg(3, "\n");
-        edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 0, 0, 0,
+        edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 1, 0, 0, 0,
                             -1, -1, -1,
-                             "e752x UE log memory write", "", NULL);
+                             "e752x UE log memory write", "");
 }
 static void do_process_ded_retry(struct mem_ctl_info *mci, u16 error,
@@ -982,7 +982,7 @@ static void e752x_check(struct mem_ctl_info *mci)
 {
        struct e752x_error_info info;
-        debugf3("%s()\n", __func__);
+        edac_dbg(3, "\n");
        e752x_get_error_info(mci, &info);
        e752x_process_error_info(mci, &info, 1);
 }
@@ -1069,6 +1069,7 @@ static void e752x_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev,
                        u16 ddrcsr)
 {
        struct csrow_info *csrow;
+        enum edac_type edac_mode;
        unsigned long last_cumul_size;
        int index, mem_dev, drc_chan;
        int drc_drbg;           /* DRB granularity 0=64mb, 1=128mb */
@@ -1095,14 +1096,13 @@ static void e752x_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev,
        for (last_cumul_size = index = 0; index < mci->nr_csrows; index++) {
                /* mem_dev 0=x8, 1=x4 */
                mem_dev = (dra >> (index * 4 + 2)) & 0x3;
-                csrow = &mci->csrows[remap_csrow_index(mci, index)];
+                csrow = mci->csrows[remap_csrow_index(mci, index)];
                mem_dev = (mem_dev == 2);
                pci_read_config_byte(pdev, E752X_DRB + index, &value);
                /* convert a 128 or 64 MiB DRB to a page size. */
                cumul_size = value << (25 + drc_drbg - PAGE_SHIFT);
-                debugf3("%s(): (%d) cumul_size 0x%x\n", __func__, index,
+                edac_dbg(3, "(%d) cumul_size 0x%x\n", index, cumul_size);
-                        cumul_size);
                if (cumul_size == last_cumul_size)
                        continue;       /* not populated */
@@ -1111,29 +1111,29 @@ static void e752x_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev,
                nr_pages = cumul_size - last_cumul_size;
                last_cumul_size = cumul_size;
+                /*
+                * if single channel or x8 devices then SECDED
+                * if dual channel and x4 then S4ECD4ED
+                */
+                if (drc_ddim) {
+                        if (drc_chan && mem_dev) {
+                                edac_mode = EDAC_S4ECD4ED;
+                                mci->edac_cap |= EDAC_FLAG_S4ECD4ED;
+                        } else {
+                                edac_mode = EDAC_SECDED;
+                                mci->edac_cap |= EDAC_FLAG_SECDED;
+                        }
+                } else
+                        edac_mode = EDAC_NONE;
                for (i = 0; i < csrow->nr_channels; i++) {
-                        struct dimm_info *dimm = csrow->channels[i].dimm;
+                        struct dimm_info *dimm = csrow->channels[i]->dimm;
-                        debugf3("Initializing rank at (%i,%i)\n", index, i);
+                        edac_dbg(3, "Initializing rank at (%i,%i)\n", index, i);
                        dimm->nr_pages = nr_pages / csrow->nr_channels;
                        dimm->grain = 1 << 12;  /* 4KiB - resolution of CELOG */
                        dimm->mtype = MEM_RDDR; /* only one type supported */
                        dimm->dtype = mem_dev ? DEV_X4 : DEV_X8;
+                        dimm->edac_mode = edac_mode;
-                        /*
-                        * if single channel or x8 devices then SECDED
-                        * if dual channel and x4 then S4ECD4ED
-                        */
-                        if (drc_ddim) {
-                                if (drc_chan && mem_dev) {
-                                        dimm->edac_mode = EDAC_S4ECD4ED;
-                                        mci->edac_cap |= EDAC_FLAG_S4ECD4ED;
-                                } else {
-                                        dimm->edac_mode = EDAC_SECDED;
-                                        mci->edac_cap |= EDAC_FLAG_SECDED;
-                                }
-                        } else
-                                dimm->edac_mode = EDAC_NONE;
                }
        }
 }
@@ -1269,8 +1269,8 @@ static int e752x_probe1(struct pci_dev *pdev, int dev_idx)
        int drc_chan;           /* Number of channels 0=1chan,1=2chan */
        struct e752x_error_info discard;
-        debugf0("%s(): mci\n", __func__);
+        edac_dbg(0, "mci\n");
-        debugf0("Starting Probe1\n");
+        edac_dbg(0, "Starting Probe1\n");
        /* check to see if device 0 function 1 is enabled; if it isn't, we
         * assume the BIOS has reserved it for a reason and is expecting
@@ -1300,7 +1300,7 @@ static int e752x_probe1(struct pci_dev *pdev, int dev_idx)
        if (mci == NULL)
                return -ENOMEM;
-        debugf3("%s(): init mci\n", __func__);
+        edac_dbg(3, "init mci\n");
        mci->mtype_cap = MEM_FLAG_RDDR;
        /* 3100 IMCH supports SECDEC only */
        mci->edac_ctl_cap = (dev_idx == I3100) ? EDAC_FLAG_SECDED :
@@ -1308,9 +1308,9 @@ static int e752x_probe1(struct pci_dev *pdev, int dev_idx)
        /* FIXME - what if different memory types are in different csrows? */
        mci->mod_name = EDAC_MOD_STR;
        mci->mod_ver = E752X_REVISION;
-        mci->dev = &pdev->dev;
+        mci->pdev = &pdev->dev;
-        debugf3("%s(): init pvt\n", __func__);
+        edac_dbg(3, "init pvt\n");
        pvt = (struct e752x_pvt *)mci->pvt_info;
        pvt->dev_info = &e752x_devs[dev_idx];
        pvt->mc_symmetric = ((ddrcsr & 0x10) != 0);
@@ -1320,7 +1320,7 @@ static int e752x_probe1(struct pci_dev *pdev, int dev_idx)
                return -ENODEV;
        }
-        debugf3("%s(): more mci init\n", __func__);
+        edac_dbg(3, "more mci init\n");
        mci->ctl_name = pvt->dev_info->ctl_name;
        mci->dev_name = pci_name(pdev);
        mci->edac_check = e752x_check;
@@ -1342,7 +1342,7 @@ static int e752x_probe1(struct pci_dev *pdev, int dev_idx)
                mci->edac_cap = EDAC_FLAG_SECDED; /* the only mode supported */
        else
                mci->edac_cap |= EDAC_FLAG_NONE;
-        debugf3("%s(): tolm, remapbase, remaplimit\n", __func__);
+        edac_dbg(3, "tolm, remapbase, remaplimit\n");
        /* load the top of low memory, remap base, and remap limit vars */
        pci_read_config_word(pdev, E752X_TOLM, &pci_data);
@@ -1359,7 +1359,7 @@ static int e752x_probe1(struct pci_dev *pdev, int dev_idx)
         * type of memory controller.  The ID is therefore hardcoded to 0.
         */
        if (edac_mc_add_mc(mci)) {
-                debugf3("%s(): failed edac_mc_add_mc()\n", __func__);
+                edac_dbg(3, "failed edac_mc_add_mc()\n");
                goto fail;
        }
@@ -1377,7 +1377,7 @@ static int e752x_probe1(struct pci_dev *pdev, int dev_idx)
        }
        /* get this far and it's successful */
-        debugf3("%s(): success\n", __func__);
+        edac_dbg(3, "success\n");
        return 0;
 fail:
@@ -1393,7 +1393,7 @@ fail:
 static int __devinit e752x_init_one(struct pci_dev *pdev,
                                const struct pci_device_id *ent)
 {
-        debugf0("%s()\n", __func__);
+        edac_dbg(0, "\n");
        /* wake up and enable device */
        if (pci_enable_device(pdev) < 0)
@@ -1407,7 +1407,7 @@ static void __devexit e752x_remove_one(struct pci_dev *pdev)
        struct mem_ctl_info *mci;
        struct e752x_pvt *pvt;
-        debugf0("%s()\n", __func__);
+        edac_dbg(0, "\n");
        if (e752x_pci)
                edac_pci_release_generic_ctl(e752x_pci);
@@ -1453,7 +1453,7 @@ static int __init e752x_init(void)
 {
        int pci_rc;
-        debugf3("%s()\n", __func__);
+        edac_dbg(3, "\n");
       /* Ensure that the OPSTATE is set correctly for POLL or NMI */
       opstate_init();
@@ -1464,7 +1464,7 @@ static int __init e752x_init(void)
 static void __exit e752x_exit(void)
 {
-        debugf3("%s()\n", __func__);
+        edac_dbg(3, "\n");
        pci_unregister_driver(&e752x_driver);
 }
diff --git a/drivers/edac/e7xxx_edac.c b/drivers/edac/e7xxx_edac.c
index 9a9c1a546797..9ff57f361a43 100644
--- a/drivers/edac/e7xxx_edac.c
+++ b/drivers/edac/e7xxx_edac.c
@@ -166,7 +166,7 @@ static const struct e7xxx_dev_info e7xxx_devs[] = {
 /* FIXME - is this valid for both SECDED and S4ECD4ED? */
 static inline int e7xxx_find_channel(u16 syndrome)
 {
-        debugf3("%s()\n", __func__);
+        edac_dbg(3, "\n");
        if ((syndrome & 0xff00) == 0)
                return 0;
@@ -186,7 +186,7 @@ static unsigned long ctl_page_to_phys(struct mem_ctl_info *mci,
        u32 remap;
        struct e7xxx_pvt *pvt = (struct e7xxx_pvt *)mci->pvt_info;
-        debugf3("%s()\n", __func__);
+        edac_dbg(3, "\n");
        if ((page < pvt->tolm) ||
                ((page >= 0x100000) && (page < pvt->remapbase)))
@@ -208,7 +208,7 @@ static void process_ce(struct mem_ctl_info *mci, struct e7xxx_error_info *info)
        int row;
        int channel;
-        debugf3("%s()\n", __func__);
+        edac_dbg(3, "\n");
        /* read the error address */
        error_1b = info->dram_celog_add;
        /* FIXME - should use PAGE_SHIFT */
@@ -219,15 +219,15 @@ static void process_ce(struct mem_ctl_info *mci, struct e7xxx_error_info *info)
        row = edac_mc_find_csrow_by_page(mci, page);
        /* convert syndrome to channel */
        channel = e7xxx_find_channel(syndrome);
-        edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, page, 0, syndrome,
+        edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, 1, page, 0, syndrome,
-                             row, channel, -1, "e7xxx CE", "", NULL);
+                             row, channel, -1, "e7xxx CE", "");
 }
 static void process_ce_no_info(struct mem_ctl_info *mci)
 {
-        debugf3("%s()\n", __func__);
+        edac_dbg(3, "\n");
-        edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 0, 0, 0, -1, -1, -1,
+        edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 1, 0, 0, 0, -1, -1, -1,
-                             "e7xxx CE log register overflow", "", NULL);
+                             "e7xxx CE log register overflow", "");
 }
 static void process_ue(struct mem_ctl_info *mci, struct e7xxx_error_info *info)
@@ -235,23 +235,23 @@ static void process_ue(struct mem_ctl_info *mci, struct e7xxx_error_info *info)
        u32 error_2b, block_page;
        int row;
-        debugf3("%s()\n", __func__);
+        edac_dbg(3, "\n");
        /* read the error address */
        error_2b = info->dram_uelog_add;
        /* FIXME - should use PAGE_SHIFT */
        block_page = error_2b >> 6;     /* convert to 4k address */
        row = edac_mc_find_csrow_by_page(mci, block_page);
-        edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, block_page, 0, 0,
+        edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 1, block_page, 0, 0,
-                             row, -1, -1, "e7xxx UE", "", NULL);
+                             row, -1, -1, "e7xxx UE", "");
 }
 static void process_ue_no_info(struct mem_ctl_info *mci)
 {
-        debugf3("%s()\n", __func__);
+        edac_dbg(3, "\n");
-        edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 0, 0, 0, -1, -1, -1,
+        edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 1, 0, 0, 0, -1, -1, -1,
-                             "e7xxx UE log register overflow", "", NULL);
+                             "e7xxx UE log register overflow", "");
 }
 static void e7xxx_get_error_info(struct mem_ctl_info *mci,
@@ -334,7 +334,7 @@ static void e7xxx_check(struct mem_ctl_info *mci)
 {
        struct e7xxx_error_info info;
-        debugf3("%s()\n", __func__);
+        edac_dbg(3, "\n");
        e7xxx_get_error_info(mci, &info);
        e7xxx_process_error_info(mci, &info, 1);
 }
@@ -362,6 +362,7 @@ static void e7xxx_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev,
        int drc_chan, drc_drbg, drc_ddim, mem_dev;
        struct csrow_info *csrow;
        struct dimm_info *dimm;
+        enum edac_type edac_mode;
        pci_read_config_dword(pdev, E7XXX_DRA, &dra);
        drc_chan = dual_channel_active(drc, dev_idx);
@@ -377,13 +378,12 @@ static void e7xxx_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev,
        for (index = 0; index < mci->nr_csrows; index++) {
                /* mem_dev 0=x8, 1=x4 */
                mem_dev = (dra >> (index * 4 + 3)) & 0x1;
-                csrow = &mci->csrows[index];
+                csrow = mci->csrows[index];
                pci_read_config_byte(pdev, E7XXX_DRB + index, &value);
                /* convert a 64 or 32 MiB DRB to a page size. */
                cumul_size = value << (25 + drc_drbg - PAGE_SHIFT);
-                debugf3("%s(): (%d) cumul_size 0x%x\n", __func__, index,
+                edac_dbg(3, "(%d) cumul_size 0x%x\n", index, cumul_size);
-                        cumul_size);
                if (cumul_size == last_cumul_size)
                        continue;       /* not populated */
@@ -392,28 +392,29 @@ static void e7xxx_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev,
                nr_pages = cumul_size - last_cumul_size;
                last_cumul_size = cumul_size;
+                /*
+                * if single channel or x8 devices then SECDED
+                * if dual channel and x4 then S4ECD4ED
+                */
+                if (drc_ddim) {
+                        if (drc_chan && mem_dev) {
+                                edac_mode = EDAC_S4ECD4ED;
+                                mci->edac_cap |= EDAC_FLAG_S4ECD4ED;
+                        } else {
+                                edac_mode = EDAC_SECDED;
+                                mci->edac_cap |= EDAC_FLAG_SECDED;
+                        }
+                } else
+                        edac_mode = EDAC_NONE;
                for (j = 0; j < drc_chan + 1; j++) {
-                        dimm = csrow->channels[j].dimm;
+                        dimm = csrow->channels[j]->dimm;
                        dimm->nr_pages = nr_pages / (drc_chan + 1);
                        dimm->grain = 1 << 12;  /* 4KiB - resolution of CELOG */
                        dimm->mtype = MEM_RDDR; /* only one type supported */
                        dimm->dtype = mem_dev ? DEV_X4 : DEV_X8;
+                        dimm->edac_mode = edac_mode;
-                        /*
-                        * if single channel or x8 devices then SECDED
-                        * if dual channel and x4 then S4ECD4ED
-                        */
-                        if (drc_ddim) {
-                                if (drc_chan && mem_dev) {
-                                        dimm->edac_mode = EDAC_S4ECD4ED;
-                                        mci->edac_cap |= EDAC_FLAG_S4ECD4ED;
-                                } else {
-                                        dimm->edac_mode = EDAC_SECDED;
-                                        mci->edac_cap |= EDAC_FLAG_SECDED;
-                                }
-                        } else
-                                dimm->edac_mode = EDAC_NONE;
                }
        }
 }
@@ -428,7 +429,7 @@ static int e7xxx_probe1(struct pci_dev *pdev, int dev_idx)
        int drc_chan;
        struct e7xxx_error_info discard;
-        debugf0("%s(): mci\n", __func__);
+        edac_dbg(0, "mci\n");
        pci_read_config_dword(pdev, E7XXX_DRC, &drc);
@@ -451,15 +452,15 @@ static int e7xxx_probe1(struct pci_dev *pdev, int dev_idx)
        if (mci == NULL)
                return -ENOMEM;
-        debugf3("%s(): init mci\n", __func__);
+        edac_dbg(3, "init mci\n");
        mci->mtype_cap = MEM_FLAG_RDDR;
        mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_SECDED |
                EDAC_FLAG_S4ECD4ED;
        /* FIXME - what if different memory types are in different csrows? */
        mci->mod_name = EDAC_MOD_STR;
        mci->mod_ver = E7XXX_REVISION;
-        mci->dev = &pdev->dev;
+        mci->pdev = &pdev->dev;
-        debugf3("%s(): init pvt\n", __func__);
+        edac_dbg(3, "init pvt\n");
        pvt = (struct e7xxx_pvt *)mci->pvt_info;
        pvt->dev_info = &e7xxx_devs[dev_idx];
        pvt->bridge_ck = pci_get_device(PCI_VENDOR_ID_INTEL,
@@ -472,14 +473,14 @@ static int e7xxx_probe1(struct pci_dev *pdev, int dev_idx)
                goto fail0;
        }
-        debugf3("%s(): more mci init\n", __func__);
+        edac_dbg(3, "more mci init\n");
        mci->ctl_name = pvt->dev_info->ctl_name;
        mci->dev_name = pci_name(pdev);
        mci->edac_check = e7xxx_check;
        mci->ctl_page_to_phys = ctl_page_to_phys;
        e7xxx_init_csrows(mci, pdev, dev_idx, drc);
        mci->edac_cap |= EDAC_FLAG_NONE;
-        debugf3("%s(): tolm, remapbase, remaplimit\n", __func__);
+        edac_dbg(3, "tolm, remapbase, remaplimit\n");
        /* load the top of low memory, remap base, and remap limit vars */
        pci_read_config_word(pdev, E7XXX_TOLM, &pci_data);
        pvt->tolm = ((u32) pci_data) << 4;
@@ -498,7 +499,7 @@ static int e7xxx_probe1(struct pci_dev *pdev, int dev_idx)
         * type of memory controller.  The ID is therefore hardcoded to 0.
         */
        if (edac_mc_add_mc(mci)) {
-                debugf3("%s(): failed edac_mc_add_mc()\n", __func__);
+                edac_dbg(3, "failed edac_mc_add_mc()\n");
                goto fail1;
        }
@@ -514,7 +515,7 @@ static int e7xxx_probe1(struct pci_dev *pdev, int dev_idx)
        }
        /* get this far and it's successful */
-        debugf3("%s(): success\n", __func__);
+        edac_dbg(3, "success\n");
        return 0;
 fail1:
@@ -530,7 +531,7 @@ fail0:
 static int __devinit e7xxx_init_one(struct pci_dev *pdev,
                                const struct pci_device_id *ent)
 {
-        debugf0("%s()\n", __func__);
+        edac_dbg(0, "\n");
        /* wake up and enable device */
        return pci_enable_device(pdev) ?
@@ -542,7 +543,7 @@ static void __devexit e7xxx_remove_one(struct pci_dev *pdev)
        struct mem_ctl_info *mci;
        struct e7xxx_pvt *pvt;
-        debugf0("%s()\n", __func__);
+        edac_dbg(0, "\n");
        if (e7xxx_pci)
                edac_pci_release_generic_ctl(e7xxx_pci);
diff --git a/drivers/edac/edac_core.h b/drivers/edac/edac_core.h
index 117490d4f835..23bb99fa44f1 100644
--- a/drivers/edac/edac_core.h
+++ b/drivers/edac/edac_core.h
@@ -71,26 +71,21 @@ extern const char *edac_mem_types[];
 #ifdef CONFIG_EDAC_DEBUG
 extern int edac_debug_level;
-#define edac_debug_printk(level, fmt, arg...)                           \
+#define edac_dbg(level, fmt, ...)                                       \
-        do {                                                            \
+do {                                                                    \
-                if (level <= edac_debug_level)                          \
+        if (level <= edac_debug_level)                                  \
-                        edac_printk(KERN_DEBUG, EDAC_DEBUG,             \
+                edac_printk(KERN_DEBUG, EDAC_DEBUG,                     \
-                                    "%s: " fmt, __func__, ##arg);       \
+                            "%s: " fmt, __func__, ##__VA_ARGS__);       \
-        } while (0)
+} while (0)
-#define debugf0( ... ) edac_debug_printk(0, __VA_ARGS__ )
-#define debugf1( ... ) edac_debug_printk(1, __VA_ARGS__ )
-#define debugf2( ... ) edac_debug_printk(2, __VA_ARGS__ )
-#define debugf3( ... ) edac_debug_printk(3, __VA_ARGS__ )
-#define debugf4( ... ) edac_debug_printk(4, __VA_ARGS__ )
 #else                           /* !CONFIG_EDAC_DEBUG */
-#define debugf0( ... )
+#define edac_dbg(level, fmt, ...)                                       \
-#define debugf1( ... )
+do {                                                                    \
-#define debugf2( ... )
+        if (0)                                                          \
-#define debugf3( ... )
+                edac_printk(KERN_DEBUG, EDAC_DEBUG,                     \
-#define debugf4( ... )
+                            "%s: " fmt, __func__, ##__VA_ARGS__);       \
+} while (0)
 #endif                          /* !CONFIG_EDAC_DEBUG */
@@ -460,15 +455,15 @@ extern int edac_mc_find_csrow_by_page(struct mem_ctl_info *mci,
                                      unsigned long page);
 void edac_mc_handle_error(const enum hw_event_mc_err_type type,
                          struct mem_ctl_info *mci,
+                          const u16 error_count,
                          const unsigned long page_frame_number,
                          const unsigned long offset_in_page,
                          const unsigned long syndrome,
-                          const int layer0,
+                          const int top_layer,
-                          const int layer1,
+                          const int mid_layer,
-                          const int layer2,
+                          const int low_layer,
                          const char *msg,
-                          const char *other_detail,
+                          const char *other_detail);
-                          const void *mcelog);
 /*
 * edac_device APIs
diff --git a/drivers/edac/edac_device.c b/drivers/edac/edac_device.c
index ee3f1f810c1e..211021dfec73 100644
--- a/drivers/edac/edac_device.c
+++ b/drivers/edac/edac_device.c
@@ -40,12 +40,13 @@ static LIST_HEAD(edac_device_list);
 #ifdef CONFIG_EDAC_DEBUG
 static void edac_device_dump_device(struct edac_device_ctl_info *edac_dev)
 {
-        debugf3("\tedac_dev = %p dev_idx=%d \n", edac_dev, edac_dev->dev_idx);
+        edac_dbg(3, "\tedac_dev = %p dev_idx=%d\n",
-        debugf4("\tedac_dev->edac_check = %p\n", edac_dev->edac_check);
+                 edac_dev, edac_dev->dev_idx);
-        debugf3("\tdev = %p\n", edac_dev->dev);
+        edac_dbg(4, "\tedac_dev->edac_check = %p\n", edac_dev->edac_check);
-        debugf3("\tmod_name:ctl_name = %s:%s\n",
+        edac_dbg(3, "\tdev = %p\n", edac_dev->dev);
-                edac_dev->mod_name, edac_dev->ctl_name);
+        edac_dbg(3, "\tmod_name:ctl_name = %s:%s\n",
-        debugf3("\tpvt_info = %p\n\n", edac_dev->pvt_info);
+                 edac_dev->mod_name, edac_dev->ctl_name);
+        edac_dbg(3, "\tpvt_info = %p\n\n", edac_dev->pvt_info);
 }
 #endif                          /* CONFIG_EDAC_DEBUG */
@@ -82,8 +83,7 @@ struct edac_device_ctl_info *edac_device_alloc_ctl_info(
        void *pvt, *p;
        int err;
-        debugf4("%s() instances=%d blocks=%d\n",
+        edac_dbg(4, "instances=%d blocks=%d\n", nr_instances, nr_blocks);
-                __func__, nr_instances, nr_blocks);
        /* Calculate the size of memory we need to allocate AND
         * determine the offsets of the various item arrays
@@ -156,8 +156,8 @@ struct edac_device_ctl_info *edac_device_alloc_ctl_info(
        /* Name of this edac device */
        snprintf(dev_ctl->name,sizeof(dev_ctl->name),"%s",edac_device_name);
-        debugf4("%s() edac_dev=%p next after end=%p\n",
+        edac_dbg(4, "edac_dev=%p next after end=%p\n",
-                __func__, dev_ctl, pvt + sz_private );
+                 dev_ctl, pvt + sz_private);
        /* Initialize every Instance */
        for (instance = 0; instance < nr_instances; instance++) {
@@ -178,10 +178,8 @@ struct edac_device_ctl_info *edac_device_alloc_ctl_info(
                        snprintf(blk->name, sizeof(blk->name),
                                 "%s%d", edac_block_name, block+offset_value);
-                        debugf4("%s() instance=%d inst_p=%p block=#%d "
+                        edac_dbg(4, "instance=%d inst_p=%p block=#%d block_p=%p name='%s'\n",
-                                "block_p=%p name='%s'\n",
+                                 instance, inst, block, blk, blk->name);
-                                __func__, instance, inst, block,
-                                blk, blk->name);
                        /* if there are NO attributes OR no attribute pointer
                         * then continue on to next block iteration
@@ -194,8 +192,8 @@ struct edac_device_ctl_info *edac_device_alloc_ctl_info(
                        attrib_p = &dev_attrib[block*nr_instances*nr_attrib];
                        blk->block_attributes = attrib_p;
-                        debugf4("%s() THIS BLOCK_ATTRIB=%p\n",
+                        edac_dbg(4, "THIS BLOCK_ATTRIB=%p\n",
-                                __func__, blk->block_attributes);
+                                 blk->block_attributes);
                        /* Initialize every user specified attribute in this
                         * block with the data the caller passed in
@@ -214,11 +212,10 @@ struct edac_device_ctl_info *edac_device_alloc_ctl_info(
                                attrib->block = blk;    /* up link */
-                                debugf4("%s() alloc-attrib=%p attrib_name='%s' "
+                                edac_dbg(4, "alloc-attrib=%p attrib_name='%s' attrib-spec=%p spec-name=%s\n",
-                                        "attrib-spec=%p spec-name=%s\n",
+                                         attrib, attrib->attr.name,
-                                        __func__, attrib, attrib->attr.name,
+                                         &attrib_spec[attr],
-                                        &attrib_spec[attr],
+                                         attrib_spec[attr].attr.name
-                                        attrib_spec[attr].attr.name
                                        );
                        }
                }
@@ -273,7 +270,7 @@ static struct edac_device_ctl_info *find_edac_device_by_dev(struct device *dev)
        struct edac_device_ctl_info *edac_dev;
        struct list_head *item;
-        debugf0("%s()\n", __func__);
+        edac_dbg(0, "\n");
        list_for_each(item, &edac_device_list) {
                edac_dev = list_entry(item, struct edac_device_ctl_info, link);
@@ -408,7 +405,7 @@ static void edac_device_workq_function(struct work_struct *work_req)
 void edac_device_workq_setup(struct edac_device_ctl_info *edac_dev,
                                unsigned msec)
 {
-        debugf0("%s()\n", __func__);
+        edac_dbg(0, "\n");
        /* take the arg 'msec' and set it into the control structure
         * to used in the time period calculation
@@ -496,7 +493,7 @@ EXPORT_SYMBOL_GPL(edac_device_alloc_index);
 */
 int edac_device_add_device(struct edac_device_ctl_info *edac_dev)
 {
-        debugf0("%s()\n", __func__);
+        edac_dbg(0, "\n");
 #ifdef CONFIG_EDAC_DEBUG
        if (edac_debug_level >= 3)
@@ -570,7 +567,7 @@ struct edac_device_ctl_info *edac_device_del_device(struct device *dev)
 {
        struct edac_device_ctl_info *edac_dev;
-        debugf0("%s()\n", __func__);
+        edac_dbg(0, "\n");
        mutex_lock(&device_ctls_mutex);
diff --git a/drivers/edac/edac_device_sysfs.c b/drivers/edac/edac_device_sysfs.c
index b4ea185ccebf..fb68a06ad683 100644
--- a/drivers/edac/edac_device_sysfs.c
+++ b/drivers/edac/edac_device_sysfs.c
@@ -202,7 +202,7 @@ static void edac_device_ctrl_master_release(struct kobject *kobj)
 {
        struct edac_device_ctl_info *edac_dev = to_edacdev(kobj);
-        debugf4("%s() control index=%d\n", __func__, edac_dev->dev_idx);
+        edac_dbg(4, "control index=%d\n", edac_dev->dev_idx);
        /* decrement the EDAC CORE module ref count */
        module_put(edac_dev->owner);
@@ -233,12 +233,12 @@ int edac_device_register_sysfs_main_kobj(struct edac_device_ctl_info *edac_dev)
        struct bus_type *edac_subsys;
        int err;
-        debugf1("%s()\n", __func__);
+        edac_dbg(1, "\n");
        /* get the /sys/devices/system/edac reference */
        edac_subsys = edac_get_sysfs_subsys();
        if (edac_subsys == NULL) {
-                debugf1("%s() no edac_subsys error\n", __func__);
+                edac_dbg(1, "no edac_subsys error\n");
                err = -ENODEV;
                goto err_out;
        }
@@ -264,8 +264,8 @@ int edac_device_register_sysfs_main_kobj(struct edac_device_ctl_info *edac_dev)
                                   &edac_subsys->dev_root->kobj,
                                   "%s", edac_dev->name);
        if (err) {
-                debugf1("%s()Failed to register '.../edac/%s'\n",
+                edac_dbg(1, "Failed to register '.../edac/%s'\n",
-                        __func__, edac_dev->name);
+                         edac_dev->name);
                goto err_kobj_reg;
        }
        kobject_uevent(&edac_dev->kobj, KOBJ_ADD);
@@ -274,8 +274,7 @@ int edac_device_register_sysfs_main_kobj(struct edac_device_ctl_info *edac_dev)
         * edac_device_unregister_sysfs_main_kobj() must be used
         */
-        debugf4("%s() Registered '.../edac/%s' kobject\n",
+        edac_dbg(4, "Registered '.../edac/%s' kobject\n", edac_dev->name);
-                __func__, edac_dev->name);
        return 0;
@@ -296,9 +295,8 @@ err_out:
 */
 void edac_device_unregister_sysfs_main_kobj(struct edac_device_ctl_info *dev)
 {
-        debugf0("%s()\n", __func__);
+        edac_dbg(0, "\n");
-        debugf4("%s() name of kobject is: %s\n",
+        edac_dbg(4, "name of kobject is: %s\n", kobject_name(&dev->kobj));
-                __func__, kobject_name(&dev->kobj));
        /*
         * Unregister the edac device's kobject and
@@ -336,7 +334,7 @@ static void edac_device_ctrl_instance_release(struct kobject *kobj)
 {
        struct edac_device_instance *instance;
-        debugf1("%s()\n", __func__);
+        edac_dbg(1, "\n");
        /* map from this kobj to the main control struct
         * and then dec the main kobj count
@@ -442,7 +440,7 @@ static void edac_device_ctrl_block_release(struct kobject *kobj)
 {
        struct edac_device_block *block;
-        debugf1("%s()\n", __func__);
+        edac_dbg(1, "\n");
        /* get the container of the kobj */
        block = to_block(kobj);
@@ -524,10 +522,10 @@ static int edac_device_create_block(struct edac_device_ctl_info *edac_dev,
        struct edac_dev_sysfs_block_attribute *sysfs_attrib;
        struct kobject *main_kobj;
-        debugf4("%s() Instance '%s' inst_p=%p  block '%s'  block_p=%p\n",
+        edac_dbg(4, "Instance '%s' inst_p=%p  block '%s'  block_p=%p\n",
-                __func__, instance->name, instance, block->name, block);
+                 instance->name, instance, block->name, block);
-        debugf4("%s() block kobj=%p  block kobj->parent=%p\n",
+        edac_dbg(4, "block kobj=%p  block kobj->parent=%p\n",
-                __func__, &block->kobj, &block->kobj.parent);
+                 &block->kobj, &block->kobj.parent);
        /* init this block's kobject */
        memset(&block->kobj, 0, sizeof(struct kobject));
@@ -546,8 +544,7 @@ static int edac_device_create_block(struct edac_device_ctl_info *edac_dev,
                                   &instance->kobj,
                                   "%s", block->name);
        if (err) {
-                debugf1("%s() Failed to register instance '%s'\n",
+                edac_dbg(1, "Failed to register instance '%s'\n", block->name);
-                        __func__, block->name);
                kobject_put(main_kobj);
                err = -ENODEV;
                goto err_out;
@@ -560,11 +557,9 @@ static int edac_device_create_block(struct edac_device_ctl_info *edac_dev,
        if (sysfs_attrib && block->nr_attribs) {
                for (i = 0; i < block->nr_attribs; i++, sysfs_attrib++) {
-                        debugf4("%s() creating block attrib='%s' "
+                        edac_dbg(4, "creating block attrib='%s' attrib->%p to kobj=%p\n",
-                                "attrib->%p to kobj=%p\n",
+                                 sysfs_attrib->attr.name,
-                                __func__,
+                                 sysfs_attrib, &block->kobj);
-                                sysfs_attrib->attr.name,
-                                sysfs_attrib, &block->kobj);
                        /* Create each block_attribute file */
                        err = sysfs_create_file(&block->kobj,
@@ -647,14 +642,14 @@ static int edac_device_create_instance(struct edac_device_ctl_info *edac_dev,
        err = kobject_init_and_add(&instance->kobj, &ktype_instance_ctrl,
                                   &edac_dev->kobj, "%s", instance->name);
        if (err != 0) {
-                debugf2("%s() Failed to register instance '%s'\n",
+                edac_dbg(2, "Failed to register instance '%s'\n",
-                        __func__, instance->name);
+                         instance->name);
                kobject_put(main_kobj);
                goto err_out;
        }
-        debugf4("%s() now register '%d' blocks for instance %d\n",
+        edac_dbg(4, "now register '%d' blocks for instance %d\n",
-                __func__, instance->nr_blocks, idx);
+                 instance->nr_blocks, idx);
        /* register all blocks of this instance */
        for (i = 0; i < instance->nr_blocks; i++) {
@@ -670,8 +665,8 @@ static int edac_device_create_instance(struct edac_device_ctl_info *edac_dev,
        }
        kobject_uevent(&instance->kobj, KOBJ_ADD);
-        debugf4("%s() Registered instance %d '%s' kobject\n",
+        edac_dbg(4, "Registered instance %d '%s' kobject\n",
-                __func__, idx, instance->name);
+                 idx, instance->name);
        return 0;
@@ -715,7 +710,7 @@ static int edac_device_create_instances(struct edac_device_ctl_info *edac_dev)
        int i, j;
        int err;
-        debugf0("%s()\n", __func__);
+        edac_dbg(0, "\n");
        /* iterate over creation of the instances */
        for (i = 0; i < edac_dev->nr_instances; i++) {
@@ -817,12 +812,12 @@ int edac_device_create_sysfs(struct edac_device_ctl_info *edac_dev)
        int err;
        struct kobject *edac_kobj = &edac_dev->kobj;
-        debugf0("%s() idx=%d\n", __func__, edac_dev->dev_idx);
+        edac_dbg(0, "idx=%d\n", edac_dev->dev_idx);
        /*  go create any main attributes callers wants */
        err = edac_device_add_main_sysfs_attributes(edac_dev);
        if (err) {
-                debugf0("%s() failed to add sysfs attribs\n", __func__);
+                edac_dbg(0, "failed to add sysfs attribs\n");
                goto err_out;
        }
@@ -832,8 +827,7 @@ int edac_device_create_sysfs(struct edac_device_ctl_info *edac_dev)
        err = sysfs_create_link(edac_kobj,
                                &edac_dev->dev->kobj, EDAC_DEVICE_SYMLINK);
        if (err) {
-                debugf0("%s() sysfs_create_link() returned err= %d\n",
+                edac_dbg(0, "sysfs_create_link() returned err= %d\n", err);
-                        __func__, err);
                goto err_remove_main_attribs;
        }
@@ -843,14 +837,13 @@ int edac_device_create_sysfs(struct edac_device_ctl_info *edac_dev)
         */
        err = edac_device_create_instances(edac_dev);
        if (err) {
-                debugf0("%s() edac_device_create_instances() "
+                edac_dbg(0, "edac_device_create_instances() returned err= %d\n",
-                        "returned err= %d\n", __func__, err);
+                         err);
                goto err_remove_link;
        }
-        debugf4("%s() create-instances done, idx=%d\n",
+        edac_dbg(4, "create-instances done, idx=%d\n", edac_dev->dev_idx);
-                __func__, edac_dev->dev_idx);
        return 0;
@@ -873,7 +866,7 @@ err_out:
 */
 void edac_device_remove_sysfs(struct edac_device_ctl_info *edac_dev)
 {
-        debugf0("%s()\n", __func__);
+        edac_dbg(0, "\n");
        /* remove any main attributes for this device */
        edac_device_remove_main_sysfs_attributes(edac_dev);
diff --git a/drivers/edac/edac_mc.c b/drivers/edac/edac_mc.c
index 10f375032e96..616d90bcb3a4 100644
--- a/drivers/edac/edac_mc.c
+++ b/drivers/edac/edac_mc.c
@@ -27,70 +27,95 @@
 #include <linux/list.h>
 #include <linux/ctype.h>
 #include <linux/edac.h>
+#include <linux/bitops.h>
 #include <asm/uaccess.h>
 #include <asm/page.h>
 #include <asm/edac.h>
 #include "edac_core.h"
 #include "edac_module.h"
+#define CREATE_TRACE_POINTS
+#define TRACE_INCLUDE_PATH ../../include/ras
+#include <ras/ras_event.h>
 /* lock to memory controller's control array */
 static DEFINE_MUTEX(mem_ctls_mutex);
 static LIST_HEAD(mc_devices);
+unsigned edac_dimm_info_location(struct dimm_info *dimm, char *buf,
+                                 unsigned len)
+{
+        struct mem_ctl_info *mci = dimm->mci;
+        int i, n, count = 0;
+        char *p = buf;
+        for (i = 0; i < mci->n_layers; i++) {
+                n = snprintf(p, len, "%s %d ",
+                              edac_layer_name[mci->layers[i].type],
+                              dimm->location[i]);
+                p += n;
+                len -= n;
+                count += n;
+                if (!len)
+                        break;
+        }
+        return count;
+}
 #ifdef CONFIG_EDAC_DEBUG
 static void edac_mc_dump_channel(struct rank_info *chan)
 {
-        debugf4("\tchannel = %p\n", chan);
+        edac_dbg(4, "  channel->chan_idx = %d\n", chan->chan_idx);
-        debugf4("\tchannel->chan_idx = %d\n", chan->chan_idx);
+        edac_dbg(4, "    channel = %p\n", chan);
-        debugf4("\tchannel->csrow = %p\n\n", chan->csrow);
+        edac_dbg(4, "    channel->csrow = %p\n", chan->csrow);
-        debugf4("\tchannel->dimm = %p\n", chan->dimm);
+        edac_dbg(4, "    channel->dimm = %p\n", chan->dimm);
 }
-static void edac_mc_dump_dimm(struct dimm_info *dimm)
+static void edac_mc_dump_dimm(struct dimm_info *dimm, int number)
 {
-        int i;
+        char location[80];
-        debugf4("\tdimm = %p\n", dimm);
+        edac_dimm_info_location(dimm, location, sizeof(location));
-        debugf4("\tdimm->label = '%s'\n", dimm->label);
-        debugf4("\tdimm->nr_pages = 0x%x\n", dimm->nr_pages);
+        edac_dbg(4, "%s%i: %smapped as virtual row %d, chan %d\n",
-        debugf4("\tdimm location ");
+                 dimm->mci->mem_is_per_rank ? "rank" : "dimm",
-        for (i = 0; i < dimm->mci->n_layers; i++) {
+                 number, location, dimm->csrow, dimm->cschannel);
-                printk(KERN_CONT "%d", dimm->location[i]);
+        edac_dbg(4, "  dimm = %p\n", dimm);
-                if (i < dimm->mci->n_layers - 1)
+        edac_dbg(4, "  dimm->label = '%s'\n", dimm->label);
-                        printk(KERN_CONT ".");
+        edac_dbg(4, "  dimm->nr_pages = 0x%x\n", dimm->nr_pages);
-        }
+        edac_dbg(4, "  dimm->grain = %d\n", dimm->grain);
-        printk(KERN_CONT "\n");
+        edac_dbg(4, "  dimm->nr_pages = 0x%x\n", dimm->nr_pages);
-        debugf4("\tdimm->grain = %d\n", dimm->grain);
-        debugf4("\tdimm->nr_pages = 0x%x\n", dimm->nr_pages);
 }
 static void edac_mc_dump_csrow(struct csrow_info *csrow)
 {
-        debugf4("\tcsrow = %p\n", csrow);
+        edac_dbg(4, "csrow->csrow_idx = %d\n", csrow->csrow_idx);
-        debugf4("\tcsrow->csrow_idx = %d\n", csrow->csrow_idx);
+        edac_dbg(4, "  csrow = %p\n", csrow);
-        debugf4("\tcsrow->first_page = 0x%lx\n", csrow->first_page);
+        edac_dbg(4, "  csrow->first_page = 0x%lx\n", csrow->first_page);
-        debugf4("\tcsrow->last_page = 0x%lx\n", csrow->last_page);
+        edac_dbg(4, "  csrow->last_page = 0x%lx\n", csrow->last_page);
-        debugf4("\tcsrow->page_mask = 0x%lx\n", csrow->page_mask);
+        edac_dbg(4, "  csrow->page_mask = 0x%lx\n", csrow->page_mask);
-        debugf4("\tcsrow->nr_channels = %d\n", csrow->nr_channels);
+        edac_dbg(4, "  csrow->nr_channels = %d\n", csrow->nr_channels);
-        debugf4("\tcsrow->channels = %p\n", csrow->channels);
+        edac_dbg(4, "  csrow->channels = %p\n", csrow->channels);
-        debugf4("\tcsrow->mci = %p\n\n", csrow->mci);
+        edac_dbg(4, "  csrow->mci = %p\n", csrow->mci);
 }
 static void edac_mc_dump_mci(struct mem_ctl_info *mci)
 {
-        debugf3("\tmci = %p\n", mci);
+        edac_dbg(3, "\tmci = %p\n", mci);
-        debugf3("\tmci->mtype_cap = %lx\n", mci->mtype_cap);
+        edac_dbg(3, "\tmci->mtype_cap = %lx\n", mci->mtype_cap);
-        debugf3("\tmci->edac_ctl_cap = %lx\n", mci->edac_ctl_cap);
+        edac_dbg(3, "\tmci->edac_ctl_cap = %lx\n", mci->edac_ctl_cap);
-        debugf3("\tmci->edac_cap = %lx\n", mci->edac_cap);
+        edac_dbg(3, "\tmci->edac_cap = %lx\n", mci->edac_cap);
-        debugf4("\tmci->edac_check = %p\n", mci->edac_check);
+        edac_dbg(4, "\tmci->edac_check = %p\n", mci->edac_check);
-        debugf3("\tmci->nr_csrows = %d, csrows = %p\n",
+        edac_dbg(3, "\tmci->nr_csrows = %d, csrows = %p\n",
-                mci->nr_csrows, mci->csrows);
+                 mci->nr_csrows, mci->csrows);
-        debugf3("\tmci->nr_dimms = %d, dimms = %p\n",
+        edac_dbg(3, "\tmci->nr_dimms = %d, dimms = %p\n",
-                mci->tot_dimms, mci->dimms);
+                 mci->tot_dimms, mci->dimms);
-        debugf3("\tdev = %p\n", mci->dev);
+        edac_dbg(3, "\tdev = %p\n", mci->pdev);
-        debugf3("\tmod_name:ctl_name = %s:%s\n", mci->mod_name, mci->ctl_name);
+        edac_dbg(3, "\tmod_name:ctl_name = %s:%s\n",
-        debugf3("\tpvt_info = %p\n\n", mci->pvt_info);
+                 mci->mod_name, mci->ctl_name);
+        edac_dbg(3, "\tpvt_info = %p\n\n", mci->pvt_info);
 }
 #endif                          /* CONFIG_EDAC_DEBUG */
@@ -164,7 +189,7 @@ void *edac_align_ptr(void **p, unsigned size, int n_elems)
        else
                return (char *)ptr;
-        r = size % align;
+        r = (unsigned long)p % align;
        if (r == 0)
                return (char *)ptr;
@@ -205,15 +230,15 @@ struct mem_ctl_info *edac_mc_alloc(unsigned mc_num,
 {
        struct mem_ctl_info *mci;
        struct edac_mc_layer *layer;
-        struct csrow_info *csi, *csr;
+        struct csrow_info *csr;
-        struct rank_info *chi, *chp, *chan;
+        struct rank_info *chan;
        struct dimm_info *dimm;
        u32 *ce_per_layer[EDAC_MAX_LAYERS], *ue_per_layer[EDAC_MAX_LAYERS];
        unsigned pos[EDAC_MAX_LAYERS];
        unsigned size, tot_dimms = 1, count = 1;
        unsigned tot_csrows = 1, tot_channels = 1, tot_errcount = 0;
        void *pvt, *p, *ptr = NULL;
-        int i, j, err, row, chn, n, len;
+        int i, j, row, chn, n, len, off;
        bool per_rank = false;
        BUG_ON(n_layers > EDAC_MAX_LAYERS || n_layers == 0);
@@ -239,26 +264,24 @@ struct mem_ctl_info *edac_mc_alloc(unsigned mc_num,
         */
        mci = edac_align_ptr(&ptr, sizeof(*mci), 1);
        layer = edac_align_ptr(&ptr, sizeof(*layer), n_layers);
-        csi = edac_align_ptr(&ptr, sizeof(*csi), tot_csrows);
-        chi = edac_align_ptr(&ptr, sizeof(*chi), tot_csrows * tot_channels);
-        dimm = edac_align_ptr(&ptr, sizeof(*dimm), tot_dimms);
        for (i = 0; i < n_layers; i++) {
                count *= layers[i].size;
-                debugf4("%s: errcount layer %d size %d\n", __func__, i, count);
+                edac_dbg(4, "errcount layer %d size %d\n", i, count);
                ce_per_layer[i] = edac_align_ptr(&ptr, sizeof(u32), count);
                ue_per_layer[i] = edac_align_ptr(&ptr, sizeof(u32), count);
                tot_errcount += 2 * count;
        }
-        debugf4("%s: allocating %d error counters\n", __func__, tot_errcount);
+        edac_dbg(4, "allocating %d error counters\n", tot_errcount);
        pvt = edac_align_ptr(&ptr, sz_pvt, 1);
        size = ((unsigned long)pvt) + sz_pvt;
-        debugf1("%s(): allocating %u bytes for mci data (%d %s, %d csrows/channels)\n",
+        edac_dbg(1, "allocating %u bytes for mci data (%d %s, %d csrows/channels)\n",
-                __func__, size,
+                 size,
-                tot_dimms,
+                 tot_dimms,
-                per_rank ? "ranks" : "dimms",
+                 per_rank ? "ranks" : "dimms",
-                tot_csrows * tot_channels);
+                 tot_csrows * tot_channels);
        mci = kzalloc(size, GFP_KERNEL);
        if (mci == NULL)
                return NULL;
@@ -267,9 +290,6 @@ struct mem_ctl_info *edac_mc_alloc(unsigned mc_num,
         * rather than an imaginary chunk of memory located at address 0.
         */
        layer = (struct edac_mc_layer *)(((char *)mci) + ((unsigned long)layer));
-        csi = (struct csrow_info *)(((char *)mci) + ((unsigned long)csi));
-        chi = (struct rank_info *)(((char *)mci) + ((unsigned long)chi));
-        dimm = (struct dimm_info *)(((char *)mci) + ((unsigned long)dimm));
        for (i = 0; i < n_layers; i++) {
                mci->ce_per_layer[i] = (u32 *)((char *)mci + ((unsigned long)ce_per_layer[i]));
                mci->ue_per_layer[i] = (u32 *)((char *)mci + ((unsigned long)ue_per_layer[i]));
@@ -278,8 +298,6 @@ struct mem_ctl_info *edac_mc_alloc(unsigned mc_num,
        /* setup index and various internal pointers */
        mci->mc_idx = mc_num;
-        mci->csrows = csi;
-        mci->dimms  = dimm;
        mci->tot_dimms = tot_dimms;
        mci->pvt_info = pvt;
        mci->n_layers = n_layers;
@@ -290,40 +308,57 @@ struct mem_ctl_info *edac_mc_alloc(unsigned mc_num,
        mci->mem_is_per_rank = per_rank;
        /*
-         * Fill the csrow struct
+         * Alocate and fill the csrow/channels structs
         */
+        mci->csrows = kcalloc(sizeof(*mci->csrows), tot_csrows, GFP_KERNEL);
+        if (!mci->csrows)
+                goto error;
        for (row = 0; row < tot_csrows; row++) {
-                csr = &csi[row];
+                csr = kzalloc(sizeof(**mci->csrows), GFP_KERNEL);
+                if (!csr)
+                        goto error;
+                mci->csrows[row] = csr;
                csr->csrow_idx = row;
                csr->mci = mci;
                csr->nr_channels = tot_channels;
-                chp = &chi[row * tot_channels];
+                csr->channels = kcalloc(sizeof(*csr->channels), tot_channels,
-                csr->channels = chp;
+                                        GFP_KERNEL);
+                if (!csr->channels)
+                        goto error;
                for (chn = 0; chn < tot_channels; chn++) {
-                        chan = &chp[chn];
+                        chan = kzalloc(sizeof(**csr->channels), GFP_KERNEL);
+                        if (!chan)
+                                goto error;
+                        csr->channels[chn] = chan;
                        chan->chan_idx = chn;
                        chan->csrow = csr;
                }
        }
        /*
-         * Fill the dimm struct
+         * Allocate and fill the dimm structs
         */
+        mci->dimms  = kcalloc(sizeof(*mci->dimms), tot_dimms, GFP_KERNEL);
+        if (!mci->dimms)
+                goto error;
        memset(&pos, 0, sizeof(pos));
        row = 0;
        chn = 0;
-        debugf4("%s: initializing %d %s\n", __func__, tot_dimms,
-                per_rank ? "ranks" : "dimms");
        for (i = 0; i < tot_dimms; i++) {
-                chan = &csi[row].channels[chn];
+                chan = mci->csrows[row]->channels[chn];
-                dimm = EDAC_DIMM_PTR(layer, mci->dimms, n_layers,
+                off = EDAC_DIMM_OFF(layer, n_layers, pos[0], pos[1], pos[2]);
-                               pos[0], pos[1], pos[2]);
+                if (off < 0 || off >= tot_dimms) {
-                dimm->mci = mci;
+                        edac_mc_printk(mci, KERN_ERR, "EDAC core bug: EDAC_DIMM_OFF is trying to do an illegal data access\n");
+                        goto error;
+                }
-                debugf2("%s: %d: %s%zd (%d:%d:%d): row %d, chan %d\n", __func__,
+                dimm = kzalloc(sizeof(**mci->dimms), GFP_KERNEL);
-                        i, per_rank ? "rank" : "dimm", (dimm - mci->dimms),
+                if (!dimm)
-                        pos[0], pos[1], pos[2], row, chn);
+                        goto error;
+                mci->dimms[off] = dimm;
+                dimm->mci = mci;
                /*
                 * Copy DIMM location and initialize it.
@@ -367,16 +402,6 @@ struct mem_ctl_info *edac_mc_alloc(unsigned mc_num,
        }
        mci->op_state = OP_ALLOC;
-        INIT_LIST_HEAD(&mci->grp_kobj_list);
-        /*
-         * Initialize the 'root' kobj for the edac_mc controller
-         */
-        err = edac_mc_register_sysfs_main_kobj(mci);
-        if (err) {
-                kfree(mci);
-                return NULL;
-        }
        /* at this point, the root kobj is valid, and in order to
         * 'free' the object, then the function:
@@ -384,7 +409,30 @@ struct mem_ctl_info *edac_mc_alloc(unsigned mc_num,
         * which will perform kobj unregistration and the actual free
         * will occur during the kobject callback operation
         */
        return mci;
+error:
+        if (mci->dimms) {
+                for (i = 0; i < tot_dimms; i++)
+                        kfree(mci->dimms[i]);
+                kfree(mci->dimms);
+        }
+        if (mci->csrows) {
+                for (chn = 0; chn < tot_channels; chn++) {
+                        csr = mci->csrows[chn];
+                        if (csr) {
+                                for (chn = 0; chn < tot_channels; chn++)
+                                        kfree(csr->channels[chn]);
+                                kfree(csr);
+                        }
+                        kfree(mci->csrows[i]);
+                }
+                kfree(mci->csrows);
+        }
+        kfree(mci);
+        return NULL;
 }
 EXPORT_SYMBOL_GPL(edac_mc_alloc);
@@ -395,12 +443,10 @@ EXPORT_SYMBOL_GPL(edac_mc_alloc);
 */
 void edac_mc_free(struct mem_ctl_info *mci)
 {
-        debugf1("%s()\n", __func__);
+        edac_dbg(1, "\n");
-        edac_mc_unregister_sysfs_main_kobj(mci);
+        /* the mci instance is freed here, when the sysfs object is dropped */
+        edac_unregister_sysfs(mci);
-        /* free the mci instance memory here */
-        kfree(mci);
 }
 EXPORT_SYMBOL_GPL(edac_mc_free);
@@ -417,12 +463,12 @@ struct mem_ctl_info *find_mci_by_dev(struct device *dev)
        struct mem_ctl_info *mci;
        struct list_head *item;
-        debugf3("%s()\n", __func__);
+        edac_dbg(3, "\n");
        list_for_each(item, &mc_devices) {
                mci = list_entry(item, struct mem_ctl_info, link);
-                if (mci->dev == dev)
+                if (mci->pdev == dev)
                        return mci;
        }
@@ -485,7 +531,7 @@ static void edac_mc_workq_function(struct work_struct *work_req)
 */
 static void edac_mc_workq_setup(struct mem_ctl_info *mci, unsigned msec)
 {
-        debugf0("%s()\n", __func__);
+        edac_dbg(0, "\n");
        /* if this instance is not in the POLL state, then simply return */
        if (mci->op_state != OP_RUNNING_POLL)
@@ -512,8 +558,7 @@ static void edac_mc_workq_teardown(struct mem_ctl_info *mci)
        status = cancel_delayed_work(&mci->work);
        if (status == 0) {
-                debugf0("%s() not canceled, flush the queue\n",
+                edac_dbg(0, "not canceled, flush the queue\n");
-                        __func__);
                /* workq instance might be running, wait for it */
                flush_workqueue(edac_workqueue);
@@ -574,7 +619,7 @@ static int add_mc_to_global_list(struct mem_ctl_info *mci)
        insert_before = &mc_devices;
-        p = find_mci_by_dev(mci->dev);
+        p = find_mci_by_dev(mci->pdev);
        if (unlikely(p != NULL))
                goto fail0;
@@ -596,7 +641,7 @@ static int add_mc_to_global_list(struct mem_ctl_info *mci)
 fail0:
        edac_printk(KERN_WARNING, EDAC_MC,
-                "%s (%s) %s %s already assigned %d\n", dev_name(p->dev),
+                "%s (%s) %s %s already assigned %d\n", dev_name(p->pdev),
                edac_dev_name(mci), p->mod_name, p->ctl_name, p->mc_idx);
        return 1;
@@ -660,7 +705,7 @@ EXPORT_SYMBOL(edac_mc_find);
 /* FIXME - should a warning be printed if no error detection? correction? */
 int edac_mc_add_mc(struct mem_ctl_info *mci)
 {
-        debugf0("%s()\n", __func__);
+        edac_dbg(0, "\n");
 #ifdef CONFIG_EDAC_DEBUG
        if (edac_debug_level >= 3)
@@ -670,15 +715,22 @@ int edac_mc_add_mc(struct mem_ctl_info *mci)
                int i;
                for (i = 0; i < mci->nr_csrows; i++) {
+                        struct csrow_info *csrow = mci->csrows[i];
+                        u32 nr_pages = 0;
                        int j;
-                        edac_mc_dump_csrow(&mci->csrows[i]);
+                        for (j = 0; j < csrow->nr_channels; j++)
-                        for (j = 0; j < mci->csrows[i].nr_channels; j++)
+                                nr_pages += csrow->channels[j]->dimm->nr_pages;
-                                edac_mc_dump_channel(&mci->csrows[i].
+                        if (!nr_pages)
-                                                channels[j]);
+                                continue;
+                        edac_mc_dump_csrow(csrow);
+                        for (j = 0; j < csrow->nr_channels; j++)
+                                if (csrow->channels[j]->dimm->nr_pages)
+                                        edac_mc_dump_channel(csrow->channels[j]);
                }
                for (i = 0; i < mci->tot_dimms; i++)
-                        edac_mc_dump_dimm(&mci->dimms[i]);
+                        if (mci->dimms[i]->nr_pages)
+                                edac_mc_dump_dimm(mci->dimms[i], i);
        }
 #endif
        mutex_lock(&mem_ctls_mutex);
@@ -732,7 +784,7 @@ struct mem_ctl_info *edac_mc_del_mc(struct device *dev)
 {
        struct mem_ctl_info *mci;
-        debugf0("%s()\n", __func__);
+        edac_dbg(0, "\n");
        mutex_lock(&mem_ctls_mutex);
@@ -770,7 +822,7 @@ static void edac_mc_scrub_block(unsigned long page, unsigned long offset,
        void *virt_addr;
        unsigned long flags = 0;
-        debugf3("%s()\n", __func__);
+        edac_dbg(3, "\n");
        /* ECC error page was not in our memory. Ignore it. */
        if (!pfn_valid(page))
@@ -797,26 +849,26 @@ static void edac_mc_scrub_block(unsigned long page, unsigned long offset,
 /* FIXME - should return -1 */
 int edac_mc_find_csrow_by_page(struct mem_ctl_info *mci, unsigned long page)
 {
-        struct csrow_info *csrows = mci->csrows;
+        struct csrow_info **csrows = mci->csrows;
        int row, i, j, n;
-        debugf1("MC%d: %s(): 0x%lx\n", mci->mc_idx, __func__, page);
+        edac_dbg(1, "MC%d: 0x%lx\n", mci->mc_idx, page);
        row = -1;
        for (i = 0; i < mci->nr_csrows; i++) {
-                struct csrow_info *csrow = &csrows[i];
+                struct csrow_info *csrow = csrows[i];
                n = 0;
                for (j = 0; j < csrow->nr_channels; j++) {
-                        struct dimm_info *dimm = csrow->channels[j].dimm;
+                        struct dimm_info *dimm = csrow->channels[j]->dimm;
                        n += dimm->nr_pages;
                }
                if (n == 0)
                        continue;
-                debugf3("MC%d: %s(): first(0x%lx) page(0x%lx) last(0x%lx) "
+                edac_dbg(3, "MC%d: first(0x%lx) page(0x%lx) last(0x%lx) mask(0x%lx)\n",
-                        "mask(0x%lx)\n", mci->mc_idx, __func__,
+                         mci->mc_idx,
-                        csrow->first_page, page, csrow->last_page,
+                         csrow->first_page, page, csrow->last_page,
-                        csrow->page_mask);
+                         csrow->page_mask);
                if ((page >= csrow->first_page) &&
                    (page <= csrow->last_page) &&
@@ -845,15 +897,16 @@ const char *edac_layer_name[] = {
 EXPORT_SYMBOL_GPL(edac_layer_name);
 static void edac_inc_ce_error(struct mem_ctl_info *mci,
-                                    bool enable_per_layer_report,
+                              bool enable_per_layer_report,
-                                    const int pos[EDAC_MAX_LAYERS])
+                              const int pos[EDAC_MAX_LAYERS],
+                              const u16 count)
 {
        int i, index = 0;
-        mci->ce_mc++;
+        mci->ce_mc += count;
        if (!enable_per_layer_report) {
-                mci->ce_noinfo_count++;
+                mci->ce_noinfo_count += count;
                return;
        }
@@ -861,7 +914,7 @@ static void edac_inc_ce_error(struct mem_ctl_info *mci,
                if (pos[i] < 0)
                        break;
                index += pos[i];
-                mci->ce_per_layer[i][index]++;
+                mci->ce_per_layer[i][index] += count;
                if (i < mci->n_layers - 1)
                        index *= mci->layers[i + 1].size;
@@ -870,14 +923,15 @@ static void edac_inc_ce_error(struct mem_ctl_info *mci,
 static void edac_inc_ue_error(struct mem_ctl_info *mci,
                                    bool enable_per_layer_report,
-                                    const int pos[EDAC_MAX_LAYERS])
+                                    const int pos[EDAC_MAX_LAYERS],
+                                    const u16 count)
 {
        int i, index = 0;
-        mci->ue_mc++;
+        mci->ue_mc += count;
        if (!enable_per_layer_report) {
-                mci->ce_noinfo_count++;
+                mci->ce_noinfo_count += count;
                return;
        }
@@ -885,7 +939,7 @@ static void edac_inc_ue_error(struct mem_ctl_info *mci,
                if (pos[i] < 0)
                        break;
                index += pos[i];
-                mci->ue_per_layer[i][index]++;
+                mci->ue_per_layer[i][index] += count;
                if (i < mci->n_layers - 1)
                        index *= mci->layers[i + 1].size;
@@ -893,6 +947,7 @@ static void edac_inc_ue_error(struct mem_ctl_info *mci,
 }
 static void edac_ce_error(struct mem_ctl_info *mci,
+                          const u16 error_count,
                          const int pos[EDAC_MAX_LAYERS],
                          const char *msg,
                          const char *location,
@@ -902,23 +957,25 @@ static void edac_ce_error(struct mem_ctl_info *mci,
                          const bool enable_per_layer_report,
                          const unsigned long page_frame_number,
                          const unsigned long offset_in_page,
-                          u32 grain)
+                          long grain)
 {
        unsigned long remapped_page;
        if (edac_mc_get_log_ce()) {
                if (other_detail && *other_detail)
                        edac_mc_printk(mci, KERN_WARNING,
-                                       "CE %s on %s (%s%s - %s)\n",
+                                       "%d CE %s on %s (%s %s - %s)\n",
+                                       error_count,
                                       msg, label, location,
                                       detail, other_detail);
                else
                        edac_mc_printk(mci, KERN_WARNING,
-                                       "CE %s on %s (%s%s)\n",
+                                       "%d CE %s on %s (%s %s)\n",
+                                       error_count,
                                       msg, label, location,
                                       detail);
        }
-        edac_inc_ce_error(mci, enable_per_layer_report, pos);
+        edac_inc_ce_error(mci, enable_per_layer_report, pos, error_count);
        if (mci->scrub_mode & SCRUB_SW_SRC) {
                /*
@@ -942,6 +999,7 @@ static void edac_ce_error(struct mem_ctl_info *mci,
 }
 static void edac_ue_error(struct mem_ctl_info *mci,
+                          const u16 error_count,
                          const int pos[EDAC_MAX_LAYERS],
                          const char *msg,
                          const char *location,
@@ -953,12 +1011,14 @@ static void edac_ue_error(struct mem_ctl_info *mci,
        if (edac_mc_get_log_ue()) {
                if (other_detail && *other_detail)
                        edac_mc_printk(mci, KERN_WARNING,
-                                       "UE %s on %s (%s%s - %s)\n",
+                                       "%d UE %s on %s (%s %s - %s)\n",
+                                       error_count,
                                       msg, label, location, detail,
                                       other_detail);
                else
                        edac_mc_printk(mci, KERN_WARNING,
-                                       "UE %s on %s (%s%s)\n",
+                                       "%d UE %s on %s (%s %s)\n",
+                                       error_count,
                                       msg, label, location, detail);
        }
@@ -971,33 +1031,53 @@ static void edac_ue_error(struct mem_ctl_info *mci,
                              msg, label, location, detail);
        }
-        edac_inc_ue_error(mci, enable_per_layer_report, pos);
+        edac_inc_ue_error(mci, enable_per_layer_report, pos, error_count);
 }
 #define OTHER_LABEL " or "
+/**
+ * edac_mc_handle_error - reports a memory event to userspace
+ *
+ * @type:               severity of the error (CE/UE/Fatal)
+ * @mci:                a struct mem_ctl_info pointer
+ * @error_count:        Number of errors of the same type
+ * @page_frame_number:  mem page where the error occurred
+ * @offset_in_page:     offset of the error inside the page
+ * @syndrome:           ECC syndrome
+ * @top_layer:          Memory layer[0] position
+ * @mid_layer:          Memory layer[1] position
+ * @low_layer:          Memory layer[2] position
+ * @msg:                Message meaningful to the end users that
+ *                      explains the event
+ * @other_detail:       Technical details about the event that
+ *                      may help hardware manufacturers and
+ *                      EDAC developers to analyse the event
+ */
 void edac_mc_handle_error(const enum hw_event_mc_err_type type,
                          struct mem_ctl_info *mci,
+                          const u16 error_count,
                          const unsigned long page_frame_number,
                          const unsigned long offset_in_page,
                          const unsigned long syndrome,
-                          const int layer0,
+                          const int top_layer,
-                          const int layer1,
+                          const int mid_layer,
-                          const int layer2,
+                          const int low_layer,
                          const char *msg,
-                          const char *other_detail,
+                          const char *other_detail)
-                          const void *mcelog)
 {
        /* FIXME: too much for stack: move it to some pre-alocated area */
        char detail[80], location[80];
        char label[(EDAC_MC_LABEL_LEN + 1 + sizeof(OTHER_LABEL)) * mci->tot_dimms];
        char *p;
        int row = -1, chan = -1;
-        int pos[EDAC_MAX_LAYERS] = { layer0, layer1, layer2 };
+        int pos[EDAC_MAX_LAYERS] = { top_layer, mid_layer, low_layer };
        int i;
-        u32 grain;
+        long grain;
        bool enable_per_layer_report = false;
+        u8 grain_bits;
-        debugf3("MC%d: %s()\n", mci->mc_idx, __func__);
+        edac_dbg(3, "MC%d\n", mci->mc_idx);
        /*
         * Check if the event report is consistent and if the memory
@@ -1043,13 +1123,13 @@ void edac_mc_handle_error(const enum hw_event_mc_err_type type,
        p = label;
        *p = '\0';
        for (i = 0; i < mci->tot_dimms; i++) {
-                struct dimm_info *dimm = &mci->dimms[i];
+                struct dimm_info *dimm = mci->dimms[i];
-                if (layer0 >= 0 && layer0 != dimm->location[0])
+                if (top_layer >= 0 && top_layer != dimm->location[0])
                        continue;
-                if (layer1 >= 0 && layer1 != dimm->location[1])
+                if (mid_layer >= 0 && mid_layer != dimm->location[1])
                        continue;
-                if (layer2 >= 0 && layer2 != dimm->location[2])
+                if (low_layer >= 0 && low_layer != dimm->location[2])
                        continue;
                /* get the max grain, over the error match range */
@@ -1075,11 +1155,9 @@ void edac_mc_handle_error(const enum hw_event_mc_err_type type,
                         * get csrow/channel of the DIMM, in order to allow
                         * incrementing the compat API counters
                         */
-                        debugf4("%s: %s csrows map: (%d,%d)\n",
+                        edac_dbg(4, "%s csrows map: (%d,%d)\n",
-                                __func__,
+                                 mci->mem_is_per_rank ? "rank" : "dimm",
-                                mci->mem_is_per_rank ? "rank" : "dimm",
+                                 dimm->csrow, dimm->cschannel);
-                                dimm->csrow, dimm->cschannel);
                        if (row == -1)
                                row = dimm->csrow;
                        else if (row >= 0 && row != dimm->csrow)
@@ -1095,19 +1173,18 @@ void edac_mc_handle_error(const enum hw_event_mc_err_type type,
        if (!enable_per_layer_report) {
                strcpy(label, "any memory");
        } else {
-                debugf4("%s: csrow/channel to increment: (%d,%d)\n",
+                edac_dbg(4, "csrow/channel to increment: (%d,%d)\n", row, chan);
-                        __func__, row, chan);
                if (p == label)
                        strcpy(label, "unknown memory");
                if (type == HW_EVENT_ERR_CORRECTED) {
                        if (row >= 0) {
-                                mci->csrows[row].ce_count++;
+                                mci->csrows[row]->ce_count += error_count;
                                if (chan >= 0)
-                                        mci->csrows[row].channels[chan].ce_count++;
+                                        mci->csrows[row]->channels[chan]->ce_count += error_count;
                        }
                } else
                        if (row >= 0)
-                                mci->csrows[row].ue_count++;
+                                mci->csrows[row]->ue_count += error_count;
        }
        /* Fill the RAM location data */
@@ -1120,23 +1197,33 @@ void edac_mc_handle_error(const enum hw_event_mc_err_type type,
                             edac_layer_name[mci->layers[i].type],
                             pos[i]);
        }
+        if (p > location)
+                *(p - 1) = '\0';
+        /* Report the error via the trace interface */
+        grain_bits = fls_long(grain) + 1;
+        trace_mc_event(type, msg, label, error_count,
+                       mci->mc_idx, top_layer, mid_layer, low_layer,
+                       PAGES_TO_MiB(page_frame_number) | offset_in_page,
+                       grain_bits, syndrome, other_detail);
        /* Memory type dependent details about the error */
        if (type == HW_EVENT_ERR_CORRECTED) {
                snprintf(detail, sizeof(detail),
-                        "page:0x%lx offset:0x%lx grain:%d syndrome:0x%lx",
+                        "page:0x%lx offset:0x%lx grain:%ld syndrome:0x%lx",
                        page_frame_number, offset_in_page,
                        grain, syndrome);
-                edac_ce_error(mci, pos, msg, location, label, detail,
+                edac_ce_error(mci, error_count, pos, msg, location, label,
-                              other_detail, enable_per_layer_report,
+                              detail, other_detail, enable_per_layer_report,
                              page_frame_number, offset_in_page, grain);
        } else {
                snprintf(detail, sizeof(detail),
-                        "page:0x%lx offset:0x%lx grain:%d",
+                        "page:0x%lx offset:0x%lx grain:%ld",
                        page_frame_number, offset_in_page, grain);
-                edac_ue_error(mci, pos, msg, location, label, detail,
+                edac_ue_error(mci, error_count, pos, msg, location, label,
-                              other_detail, enable_per_layer_report);
+                              detail, other_detail, enable_per_layer_report);
        }
 }
 EXPORT_SYMBOL_GPL(edac_mc_handle_error);
diff --git a/drivers/edac/edac_mc_sysfs.c b/drivers/edac/edac_mc_sysfs.c
index f6a29b0eedc8..ed0bc07b8503 100644
--- a/drivers/edac/edac_mc_sysfs.c
+++ b/drivers/edac/edac_mc_sysfs.c
@@ -7,17 +7,21 @@
 *
 * Written Doug Thompson <norsk5@xmission.com> www.softwarebitmaker.com
 *
+ * (c) 2012 - Mauro Carvalho Chehab <mchehab@redhat.com>
+ *      The entire API were re-written, and ported to use struct device
+ *
 */
 #include <linux/ctype.h>
 #include <linux/slab.h>
 #include <linux/edac.h>
 #include <linux/bug.h>
+#include <linux/pm_runtime.h>
+#include <linux/uaccess.h>
 #include "edac_core.h"
 #include "edac_module.h"
 /* MC EDAC Controls, setable by module parameter, and sysfs */
 static int edac_mc_log_ue = 1;
 static int edac_mc_log_ce = 1;
@@ -78,6 +82,8 @@ module_param_call(edac_mc_poll_msec, edac_set_poll_msec, param_get_int,
                  &edac_mc_poll_msec, 0644);
 MODULE_PARM_DESC(edac_mc_poll_msec, "Polling period in milliseconds");
+static struct device *mci_pdev;
 /*
 * various constants for Memory Controllers
 */
@@ -125,317 +131,526 @@ static const char *edac_caps[] = {
        [EDAC_S16ECD16ED] = "S16ECD16ED"
 };
-/* EDAC sysfs CSROW data structures and methods
+#ifdef CONFIG_EDAC_LEGACY_SYSFS
+/*
+ * EDAC sysfs CSROW data structures and methods
+ */
+#define to_csrow(k) container_of(k, struct csrow_info, dev)
+/*
+ * We need it to avoid namespace conflicts between the legacy API
+ * and the per-dimm/per-rank one
 */
+#define DEVICE_ATTR_LEGACY(_name, _mode, _show, _store) \
+        struct device_attribute dev_attr_legacy_##_name = __ATTR(_name, _mode, _show, _store)
+struct dev_ch_attribute {
+        struct device_attribute attr;
+        int channel;
+};
+#define DEVICE_CHANNEL(_name, _mode, _show, _store, _var) \
+        struct dev_ch_attribute dev_attr_legacy_##_name = \
+                { __ATTR(_name, _mode, _show, _store), (_var) }
+#define to_channel(k) (container_of(k, struct dev_ch_attribute, attr)->channel)
 /* Set of more default csrow<id> attribute show/store functions */
-static ssize_t csrow_ue_count_show(struct csrow_info *csrow, char *data,
+static ssize_t csrow_ue_count_show(struct device *dev,
-                                int private)
+                                   struct device_attribute *mattr, char *data)
 {
+        struct csrow_info *csrow = to_csrow(dev);
        return sprintf(data, "%u\n", csrow->ue_count);
 }
-static ssize_t csrow_ce_count_show(struct csrow_info *csrow, char *data,
+static ssize_t csrow_ce_count_show(struct device *dev,
-                                int private)
+                                   struct device_attribute *mattr, char *data)
 {
+        struct csrow_info *csrow = to_csrow(dev);
        return sprintf(data, "%u\n", csrow->ce_count);
 }
-static ssize_t csrow_size_show(struct csrow_info *csrow, char *data,
+static ssize_t csrow_size_show(struct device *dev,
-                                int private)
+                               struct device_attribute *mattr, char *data)
 {
+        struct csrow_info *csrow = to_csrow(dev);
        int i;
        u32 nr_pages = 0;
        for (i = 0; i < csrow->nr_channels; i++)
-                nr_pages += csrow->channels[i].dimm->nr_pages;
+                nr_pages += csrow->channels[i]->dimm->nr_pages;
        return sprintf(data, "%u\n", PAGES_TO_MiB(nr_pages));
 }
-static ssize_t csrow_mem_type_show(struct csrow_info *csrow, char *data,
+static ssize_t csrow_mem_type_show(struct device *dev,
-                                int private)
+                                   struct device_attribute *mattr, char *data)
 {
-        return sprintf(data, "%s\n", mem_types[csrow->channels[0].dimm->mtype]);
+        struct csrow_info *csrow = to_csrow(dev);
+        return sprintf(data, "%s\n", mem_types[csrow->channels[0]->dimm->mtype]);
 }
-static ssize_t csrow_dev_type_show(struct csrow_info *csrow, char *data,
+static ssize_t csrow_dev_type_show(struct device *dev,
-                                int private)
+                                   struct device_attribute *mattr, char *data)
 {
-        return sprintf(data, "%s\n", dev_types[csrow->channels[0].dimm->dtype]);
+        struct csrow_info *csrow = to_csrow(dev);
+        return sprintf(data, "%s\n", dev_types[csrow->channels[0]->dimm->dtype]);
 }
-static ssize_t csrow_edac_mode_show(struct csrow_info *csrow, char *data,
+static ssize_t csrow_edac_mode_show(struct device *dev,
-                                int private)
+                                    struct device_attribute *mattr,
+                                    char *data)
 {
-        return sprintf(data, "%s\n", edac_caps[csrow->channels[0].dimm->edac_mode]);
+        struct csrow_info *csrow = to_csrow(dev);
+        return sprintf(data, "%s\n", edac_caps[csrow->channels[0]->dimm->edac_mode]);
 }
 /* show/store functions for DIMM Label attributes */
-static ssize_t channel_dimm_label_show(struct csrow_info *csrow,
+static ssize_t channel_dimm_label_show(struct device *dev,
-                                char *data, int channel)
+                                       struct device_attribute *mattr,
+                                       char *data)
 {
+        struct csrow_info *csrow = to_csrow(dev);
+        unsigned chan = to_channel(mattr);
+        struct rank_info *rank = csrow->channels[chan];
        /* if field has not been initialized, there is nothing to send */
-        if (!csrow->channels[channel].dimm->label[0])
+        if (!rank->dimm->label[0])
                return 0;
        return snprintf(data, EDAC_MC_LABEL_LEN, "%s\n",
-                        csrow->channels[channel].dimm->label);
+                        rank->dimm->label);
 }
-static ssize_t channel_dimm_label_store(struct csrow_info *csrow,
+static ssize_t channel_dimm_label_store(struct device *dev,
-                                        const char *data,
+                                        struct device_attribute *mattr,
-                                        size_t count, int channel)
+                                        const char *data, size_t count)
 {
+        struct csrow_info *csrow = to_csrow(dev);
+        unsigned chan = to_channel(mattr);
+        struct rank_info *rank = csrow->channels[chan];
        ssize_t max_size = 0;
        max_size = min((ssize_t) count, (ssize_t) EDAC_MC_LABEL_LEN - 1);
-        strncpy(csrow->channels[channel].dimm->label, data, max_size);
+        strncpy(rank->dimm->label, data, max_size);
-        csrow->channels[channel].dimm->label[max_size] = '\0';
+        rank->dimm->label[max_size] = '\0';
        return max_size;
 }
 /* show function for dynamic chX_ce_count attribute */
-static ssize_t channel_ce_count_show(struct csrow_info *csrow,
+static ssize_t channel_ce_count_show(struct device *dev,
-                                char *data, int channel)
+                                     struct device_attribute *mattr, char *data)
 {
-        return sprintf(data, "%u\n", csrow->channels[channel].ce_count);
+        struct csrow_info *csrow = to_csrow(dev);
+        unsigned chan = to_channel(mattr);
+        struct rank_info *rank = csrow->channels[chan];
+        return sprintf(data, "%u\n", rank->ce_count);
 }
-/* csrow specific attribute structure */
+/* cwrow<id>/attribute files */
-struct csrowdev_attribute {
+DEVICE_ATTR_LEGACY(size_mb, S_IRUGO, csrow_size_show, NULL);
-        struct attribute attr;
+DEVICE_ATTR_LEGACY(dev_type, S_IRUGO, csrow_dev_type_show, NULL);
-         ssize_t(*show) (struct csrow_info *, char *, int);
+DEVICE_ATTR_LEGACY(mem_type, S_IRUGO, csrow_mem_type_show, NULL);
-         ssize_t(*store) (struct csrow_info *, const char *, size_t, int);
+DEVICE_ATTR_LEGACY(edac_mode, S_IRUGO, csrow_edac_mode_show, NULL);
-        int private;
+DEVICE_ATTR_LEGACY(ue_count, S_IRUGO, csrow_ue_count_show, NULL);
-};
+DEVICE_ATTR_LEGACY(ce_count, S_IRUGO, csrow_ce_count_show, NULL);
-#define to_csrow(k) container_of(k, struct csrow_info, kobj)
+/* default attributes of the CSROW<id> object */
-#define to_csrowdev_attr(a) container_of(a, struct csrowdev_attribute, attr)
+static struct attribute *csrow_attrs[] = {
+        &dev_attr_legacy_dev_type.attr,
+        &dev_attr_legacy_mem_type.attr,
+        &dev_attr_legacy_edac_mode.attr,
+        &dev_attr_legacy_size_mb.attr,
+        &dev_attr_legacy_ue_count.attr,
+        &dev_attr_legacy_ce_count.attr,
+        NULL,
+};
-/* Set of show/store higher level functions for default csrow attributes */
+static struct attribute_group csrow_attr_grp = {
-static ssize_t csrowdev_show(struct kobject *kobj,
+        .attrs  = csrow_attrs,
-                        struct attribute *attr, char *buffer)
+};
-{
-        struct csrow_info *csrow = to_csrow(kobj);
-        struct csrowdev_attribute *csrowdev_attr = to_csrowdev_attr(attr);
-        if (csrowdev_attr->show)
+static const struct attribute_group *csrow_attr_groups[] = {
-                return csrowdev_attr->show(csrow,
+        &csrow_attr_grp,
-                                        buffer, csrowdev_attr->private);
+        NULL
-        return -EIO;
+};
-}
-static ssize_t csrowdev_store(struct kobject *kobj, struct attribute *attr,
+static void csrow_attr_release(struct device *dev)
-                        const char *buffer, size_t count)
 {
-        struct csrow_info *csrow = to_csrow(kobj);
+        struct csrow_info *csrow = container_of(dev, struct csrow_info, dev);
-        struct csrowdev_attribute *csrowdev_attr = to_csrowdev_attr(attr);
-        if (csrowdev_attr->store)
-                return csrowdev_attr->store(csrow,
-                                        buffer,
-                                        count, csrowdev_attr->private);
-        return -EIO;
-}
-static const struct sysfs_ops csrowfs_ops = {
+        edac_dbg(1, "Releasing csrow device %s\n", dev_name(dev));
-        .show = csrowdev_show,
+        kfree(csrow);
-        .store = csrowdev_store
+}
-};
-#define CSROWDEV_ATTR(_name,_mode,_show,_store,_private)        \
+static struct device_type csrow_attr_type = {
-static struct csrowdev_attribute attr_##_name = {                       \
+        .groups         = csrow_attr_groups,
-        .attr = {.name = __stringify(_name), .mode = _mode },   \
+        .release        = csrow_attr_release,
-        .show   = _show,                                        \
-        .store  = _store,                                       \
-        .private = _private,                                    \
 };
-/* default cwrow<id>/attribute files */
+/*
-CSROWDEV_ATTR(size_mb, S_IRUGO, csrow_size_show, NULL, 0);
+ * possible dynamic channel DIMM Label attribute files
-CSROWDEV_ATTR(dev_type, S_IRUGO, csrow_dev_type_show, NULL, 0);
+ *
-CSROWDEV_ATTR(mem_type, S_IRUGO, csrow_mem_type_show, NULL, 0);
+ */
-CSROWDEV_ATTR(edac_mode, S_IRUGO, csrow_edac_mode_show, NULL, 0);
-CSROWDEV_ATTR(ue_count, S_IRUGO, csrow_ue_count_show, NULL, 0);
-CSROWDEV_ATTR(ce_count, S_IRUGO, csrow_ce_count_show, NULL, 0);
-/* default attributes of the CSROW<id> object */
+#define EDAC_NR_CHANNELS        6
-static struct csrowdev_attribute *default_csrow_attr[] = {
-        &attr_dev_type,
-        &attr_mem_type,
-        &attr_edac_mode,
-        &attr_size_mb,
-        &attr_ue_count,
-        &attr_ce_count,
-        NULL,
-};
-/* possible dynamic channel DIMM Label attribute files */
+DEVICE_CHANNEL(ch0_dimm_label, S_IRUGO | S_IWUSR,
-CSROWDEV_ATTR(ch0_dimm_label, S_IRUGO | S_IWUSR,
        channel_dimm_label_show, channel_dimm_label_store, 0);
-CSROWDEV_ATTR(ch1_dimm_label, S_IRUGO | S_IWUSR,
+DEVICE_CHANNEL(ch1_dimm_label, S_IRUGO | S_IWUSR,
        channel_dimm_label_show, channel_dimm_label_store, 1);
-CSROWDEV_ATTR(ch2_dimm_label, S_IRUGO | S_IWUSR,
+DEVICE_CHANNEL(ch2_dimm_label, S_IRUGO | S_IWUSR,
        channel_dimm_label_show, channel_dimm_label_store, 2);
-CSROWDEV_ATTR(ch3_dimm_label, S_IRUGO | S_IWUSR,
+DEVICE_CHANNEL(ch3_dimm_label, S_IRUGO | S_IWUSR,
        channel_dimm_label_show, channel_dimm_label_store, 3);
-CSROWDEV_ATTR(ch4_dimm_label, S_IRUGO | S_IWUSR,
+DEVICE_CHANNEL(ch4_dimm_label, S_IRUGO | S_IWUSR,
        channel_dimm_label_show, channel_dimm_label_store, 4);
-CSROWDEV_ATTR(ch5_dimm_label, S_IRUGO | S_IWUSR,
+DEVICE_CHANNEL(ch5_dimm_label, S_IRUGO | S_IWUSR,
        channel_dimm_label_show, channel_dimm_label_store, 5);
 /* Total possible dynamic DIMM Label attribute file table */
-static struct csrowdev_attribute *dynamic_csrow_dimm_attr[] = {
+static struct device_attribute *dynamic_csrow_dimm_attr[] = {
-        &attr_ch0_dimm_label,
+        &dev_attr_legacy_ch0_dimm_label.attr,
-        &attr_ch1_dimm_label,
+        &dev_attr_legacy_ch1_dimm_label.attr,
-        &attr_ch2_dimm_label,
+        &dev_attr_legacy_ch2_dimm_label.attr,
-        &attr_ch3_dimm_label,
+        &dev_attr_legacy_ch3_dimm_label.attr,
-        &attr_ch4_dimm_label,
+        &dev_attr_legacy_ch4_dimm_label.attr,
-        &attr_ch5_dimm_label
+        &dev_attr_legacy_ch5_dimm_label.attr
 };
 /* possible dynamic channel ce_count attribute files */
-CSROWDEV_ATTR(ch0_ce_count, S_IRUGO | S_IWUSR, channel_ce_count_show, NULL, 0);
+DEVICE_CHANNEL(ch0_ce_count, S_IRUGO | S_IWUSR,
-CSROWDEV_ATTR(ch1_ce_count, S_IRUGO | S_IWUSR, channel_ce_count_show, NULL, 1);
+                   channel_ce_count_show, NULL, 0);
-CSROWDEV_ATTR(ch2_ce_count, S_IRUGO | S_IWUSR, channel_ce_count_show, NULL, 2);
+DEVICE_CHANNEL(ch1_ce_count, S_IRUGO | S_IWUSR,
-CSROWDEV_ATTR(ch3_ce_count, S_IRUGO | S_IWUSR, channel_ce_count_show, NULL, 3);
+                   channel_ce_count_show, NULL, 1);
-CSROWDEV_ATTR(ch4_ce_count, S_IRUGO | S_IWUSR, channel_ce_count_show, NULL, 4);
+DEVICE_CHANNEL(ch2_ce_count, S_IRUGO | S_IWUSR,
-CSROWDEV_ATTR(ch5_ce_count, S_IRUGO | S_IWUSR, channel_ce_count_show, NULL, 5);
+                   channel_ce_count_show, NULL, 2);
+DEVICE_CHANNEL(ch3_ce_count, S_IRUGO | S_IWUSR,
+                   channel_ce_count_show, NULL, 3);
+DEVICE_CHANNEL(ch4_ce_count, S_IRUGO | S_IWUSR,
+                   channel_ce_count_show, NULL, 4);
+DEVICE_CHANNEL(ch5_ce_count, S_IRUGO | S_IWUSR,
+                   channel_ce_count_show, NULL, 5);
 /* Total possible dynamic ce_count attribute file table */
-static struct csrowdev_attribute *dynamic_csrow_ce_count_attr[] = {
+static struct device_attribute *dynamic_csrow_ce_count_attr[] = {
-        &attr_ch0_ce_count,
+        &dev_attr_legacy_ch0_ce_count.attr,
-        &attr_ch1_ce_count,
+        &dev_attr_legacy_ch1_ce_count.attr,
-        &attr_ch2_ce_count,
+        &dev_attr_legacy_ch2_ce_count.attr,
-        &attr_ch3_ce_count,
+        &dev_attr_legacy_ch3_ce_count.attr,
-        &attr_ch4_ce_count,
+        &dev_attr_legacy_ch4_ce_count.attr,
-        &attr_ch5_ce_count
+        &dev_attr_legacy_ch5_ce_count.attr
 };
-#define EDAC_NR_CHANNELS        6
+static inline int nr_pages_per_csrow(struct csrow_info *csrow)
+{
+        int chan, nr_pages = 0;
+        for (chan = 0; chan < csrow->nr_channels; chan++)
+                nr_pages += csrow->channels[chan]->dimm->nr_pages;
+        return nr_pages;
+}
-/* Create dynamic CHANNEL files, indexed by 'chan',  under specifed CSROW */
+/* Create a CSROW object under specifed edac_mc_device */
-static int edac_create_channel_files(struct kobject *kobj, int chan)
+static int edac_create_csrow_object(struct mem_ctl_info *mci,
+                                    struct csrow_info *csrow, int index)
 {
-        int err = -ENODEV;
+        int err, chan;
+        if (csrow->nr_channels >= EDAC_NR_CHANNELS)
+                return -ENODEV;
+        csrow->dev.type = &csrow_attr_type;
+        csrow->dev.bus = &mci->bus;
+        device_initialize(&csrow->dev);
+        csrow->dev.parent = &mci->dev;
+        dev_set_name(&csrow->dev, "csrow%d", index);
+        dev_set_drvdata(&csrow->dev, csrow);
-        if (chan >= EDAC_NR_CHANNELS)
+        edac_dbg(0, "creating (virtual) csrow node %s\n",
+                 dev_name(&csrow->dev));
+        err = device_add(&csrow->dev);
+        if (err < 0)
                return err;
-        /* create the DIMM label attribute file */
+        for (chan = 0; chan < csrow->nr_channels; chan++) {
-        err = sysfs_create_file(kobj,
+                /* Only expose populated DIMMs */
-                                (struct attribute *)
+                if (!csrow->channels[chan]->dimm->nr_pages)
-                                dynamic_csrow_dimm_attr[chan]);
+                        continue;
+                err = device_create_file(&csrow->dev,
-        if (!err) {
+                                         dynamic_csrow_dimm_attr[chan]);
-                /* create the CE Count attribute file */
+                if (err < 0)
-                err = sysfs_create_file(kobj,
+                        goto error;
-                                        (struct attribute *)
+                err = device_create_file(&csrow->dev,
-                                        dynamic_csrow_ce_count_attr[chan]);
+                                         dynamic_csrow_ce_count_attr[chan]);
-        } else {
+                if (err < 0) {
-                debugf1("%s()  dimm labels and ce_count files created",
+                        device_remove_file(&csrow->dev,
-                        __func__);
+                                           dynamic_csrow_dimm_attr[chan]);
+                        goto error;
+                }
+        }
+        return 0;
+error:
+        for (--chan; chan >= 0; chan--) {
+                device_remove_file(&csrow->dev,
+                                        dynamic_csrow_dimm_attr[chan]);
+                device_remove_file(&csrow->dev,
+                                           dynamic_csrow_ce_count_attr[chan]);
        }
+        put_device(&csrow->dev);
        return err;
 }
-/* No memory to release for this kobj */
+/* Create a CSROW object under specifed edac_mc_device */
-static void edac_csrow_instance_release(struct kobject *kobj)
+static int edac_create_csrow_objects(struct mem_ctl_info *mci)
 {
-        struct mem_ctl_info *mci;
+        int err, i, chan;
-        struct csrow_info *cs;
+        struct csrow_info *csrow;
+        for (i = 0; i < mci->nr_csrows; i++) {
+                csrow = mci->csrows[i];
+                if (!nr_pages_per_csrow(csrow))
+                        continue;
+                err = edac_create_csrow_object(mci, mci->csrows[i], i);
+                if (err < 0)
+                        goto error;
+        }
+        return 0;
-        debugf1("%s()\n", __func__);
+error:
+        for (--i; i >= 0; i--) {
+                csrow = mci->csrows[i];
+                if (!nr_pages_per_csrow(csrow))
+                        continue;
+                for (chan = csrow->nr_channels - 1; chan >= 0; chan--) {
+                        if (!csrow->channels[chan]->dimm->nr_pages)
+                                continue;
+                        device_remove_file(&csrow->dev,
+                                                dynamic_csrow_dimm_attr[chan]);
+                        device_remove_file(&csrow->dev,
+                                                dynamic_csrow_ce_count_attr[chan]);
+                }
+                put_device(&mci->csrows[i]->dev);
+        }
-        cs = container_of(kobj, struct csrow_info, kobj);
+        return err;
-        mci = cs->mci;
+}
-        kobject_put(&mci->edac_mci_kobj);
+static void edac_delete_csrow_objects(struct mem_ctl_info *mci)
+{
+        int i, chan;
+        struct csrow_info *csrow;
+        for (i = mci->nr_csrows - 1; i >= 0; i--) {
+                csrow = mci->csrows[i];
+                if (!nr_pages_per_csrow(csrow))
+                        continue;
+                for (chan = csrow->nr_channels - 1; chan >= 0; chan--) {
+                        if (!csrow->channels[chan]->dimm->nr_pages)
+                                continue;
+                        edac_dbg(1, "Removing csrow %d channel %d sysfs nodes\n",
+                                 i, chan);
+                        device_remove_file(&csrow->dev,
+                                                dynamic_csrow_dimm_attr[chan]);
+                        device_remove_file(&csrow->dev,
+                                                dynamic_csrow_ce_count_attr[chan]);
+                }
+                put_device(&mci->csrows[i]->dev);
+                device_del(&mci->csrows[i]->dev);
+        }
 }
+#endif
-/* the kobj_type instance for a CSROW */
+/*
-static struct kobj_type ktype_csrow = {
+ * Per-dimm (or per-rank) devices
-        .release = edac_csrow_instance_release,
+ */
-        .sysfs_ops = &csrowfs_ops,
-        .default_attrs = (struct attribute **)default_csrow_attr,
+#define to_dimm(k) container_of(k, struct dimm_info, dev)
+/* show/store functions for DIMM Label attributes */
+static ssize_t dimmdev_location_show(struct device *dev,
+                                     struct device_attribute *mattr, char *data)
+{
+        struct dimm_info *dimm = to_dimm(dev);
+        return edac_dimm_info_location(dimm, data, PAGE_SIZE);
+}
+static ssize_t dimmdev_label_show(struct device *dev,
+                                  struct device_attribute *mattr, char *data)
+{
+        struct dimm_info *dimm = to_dimm(dev);
+        /* if field has not been initialized, there is nothing to send */
+        if (!dimm->label[0])
+                return 0;
+        return snprintf(data, EDAC_MC_LABEL_LEN, "%s\n", dimm->label);
+}
+static ssize_t dimmdev_label_store(struct device *dev,
+                                   struct device_attribute *mattr,
+                                   const char *data,
+                                   size_t count)
+{
+        struct dimm_info *dimm = to_dimm(dev);
+        ssize_t max_size = 0;
+        max_size = min((ssize_t) count, (ssize_t) EDAC_MC_LABEL_LEN - 1);
+        strncpy(dimm->label, data, max_size);
+        dimm->label[max_size] = '\0';
+        return max_size;
+}
+static ssize_t dimmdev_size_show(struct device *dev,
+                                 struct device_attribute *mattr, char *data)
+{
+        struct dimm_info *dimm = to_dimm(dev);
+        return sprintf(data, "%u\n", PAGES_TO_MiB(dimm->nr_pages));
+}
+static ssize_t dimmdev_mem_type_show(struct device *dev,
+                                     struct device_attribute *mattr, char *data)
+{
+        struct dimm_info *dimm = to_dimm(dev);
+        return sprintf(data, "%s\n", mem_types[dimm->mtype]);
+}
+static ssize_t dimmdev_dev_type_show(struct device *dev,
+                                     struct device_attribute *mattr, char *data)
+{
+        struct dimm_info *dimm = to_dimm(dev);
+        return sprintf(data, "%s\n", dev_types[dimm->dtype]);
+}
+static ssize_t dimmdev_edac_mode_show(struct device *dev,
+                                      struct device_attribute *mattr,
+                                      char *data)
+{
+        struct dimm_info *dimm = to_dimm(dev);
+        return sprintf(data, "%s\n", edac_caps[dimm->edac_mode]);
+}
+/* dimm/rank attribute files */
+static DEVICE_ATTR(dimm_label, S_IRUGO | S_IWUSR,
+                   dimmdev_label_show, dimmdev_label_store);
+static DEVICE_ATTR(dimm_location, S_IRUGO, dimmdev_location_show, NULL);
+static DEVICE_ATTR(size, S_IRUGO, dimmdev_size_show, NULL);
+static DEVICE_ATTR(dimm_mem_type, S_IRUGO, dimmdev_mem_type_show, NULL);
+static DEVICE_ATTR(dimm_dev_type, S_IRUGO, dimmdev_dev_type_show, NULL);
+static DEVICE_ATTR(dimm_edac_mode, S_IRUGO, dimmdev_edac_mode_show, NULL);
+/* attributes of the dimm<id>/rank<id> object */
+static struct attribute *dimm_attrs[] = {
+        &dev_attr_dimm_label.attr,
+        &dev_attr_dimm_location.attr,
+        &dev_attr_size.attr,
+        &dev_attr_dimm_mem_type.attr,
+        &dev_attr_dimm_dev_type.attr,
+        &dev_attr_dimm_edac_mode.attr,
+        NULL,
 };
-/* Create a CSROW object under specifed edac_mc_device */
+static struct attribute_group dimm_attr_grp = {
-static int edac_create_csrow_object(struct mem_ctl_info *mci,
+        .attrs  = dimm_attrs,
-                                        struct csrow_info *csrow, int index)
+};
+static const struct attribute_group *dimm_attr_groups[] = {
+        &dimm_attr_grp,
+        NULL
+};
+static void dimm_attr_release(struct device *dev)
 {
-        struct kobject *kobj_mci = &mci->edac_mci_kobj;
+        struct dimm_info *dimm = container_of(dev, struct dimm_info, dev);
-        struct kobject *kobj;
-        int chan;
-        int err;
-        /* generate ..../edac/mc/mc<id>/csrow<index>   */
+        edac_dbg(1, "Releasing dimm device %s\n", dev_name(dev));
-        memset(&csrow->kobj, 0, sizeof(csrow->kobj));
+        kfree(dimm);
-        csrow->mci = mci;       /* include container up link */
+}
-        /* bump the mci instance's kobject's ref count */
+static struct device_type dimm_attr_type = {
-        kobj = kobject_get(&mci->edac_mci_kobj);
+        .groups         = dimm_attr_groups,
-        if (!kobj) {
+        .release        = dimm_attr_release,
-                err = -ENODEV;
+};
-                goto err_out;
-        }
+/* Create a DIMM object under specifed memory controller device */
+static int edac_create_dimm_object(struct mem_ctl_info *mci,
+                                   struct dimm_info *dimm,
+                                   int index)
+{
+        int err;
+        dimm->mci = mci;
-        /* Instanstiate the csrow object */
+        dimm->dev.type = &dimm_attr_type;
-        err = kobject_init_and_add(&csrow->kobj, &ktype_csrow, kobj_mci,
+        dimm->dev.bus = &mci->bus;
-                                   "csrow%d", index);
+        device_initialize(&dimm->dev);
-        if (err)
-                goto err_release_top_kobj;
-        /* At this point, to release a csrow kobj, one must
+        dimm->dev.parent = &mci->dev;
-         * call the kobject_put and allow that tear down
+        if (mci->mem_is_per_rank)
-         * to work the releasing
+                dev_set_name(&dimm->dev, "rank%d", index);
-         */
+        else
+                dev_set_name(&dimm->dev, "dimm%d", index);
+        dev_set_drvdata(&dimm->dev, dimm);
+        pm_runtime_forbid(&mci->dev);
-        /* Create the dyanmic attribute files on this csrow,
+        err =  device_add(&dimm->dev);
-         * namely, the DIMM labels and the channel ce_count
-         */
-        for (chan = 0; chan < csrow->nr_channels; chan++) {
-                err = edac_create_channel_files(&csrow->kobj, chan);
-                if (err) {
-                        /* special case the unregister here */
-                        kobject_put(&csrow->kobj);
-                        goto err_out;
-                }
-        }
-        kobject_uevent(&csrow->kobj, KOBJ_ADD);
-        return 0;
-        /* error unwind stack */
+        edac_dbg(0, "creating rank/dimm device %s\n", dev_name(&dimm->dev));
-err_release_top_kobj:
-        kobject_put(&mci->edac_mci_kobj);
-err_out:
        return err;
 }
-/* default sysfs methods and data structures for the main MCI kobject */
+/*
+ * Memory controller device
+ */
+#define to_mci(k) container_of(k, struct mem_ctl_info, dev)
-static ssize_t mci_reset_counters_store(struct mem_ctl_info *mci,
+static ssize_t mci_reset_counters_store(struct device *dev,
+                                        struct device_attribute *mattr,
                                        const char *data, size_t count)
 {
-        int row, chan;
+        struct mem_ctl_info *mci = to_mci(dev);
+        int cnt, row, chan, i;
-        mci->ue_noinfo_count = 0;
-        mci->ce_noinfo_count = 0;
        mci->ue_mc = 0;
        mci->ce_mc = 0;
+        mci->ue_noinfo_count = 0;
+        mci->ce_noinfo_count = 0;
        for (row = 0; row < mci->nr_csrows; row++) {
-                struct csrow_info *ri = &mci->csrows[row];
+                struct csrow_info *ri = mci->csrows[row];
                ri->ue_count = 0;
                ri->ce_count = 0;
                for (chan = 0; chan < ri->nr_channels; chan++)
-                        ri->channels[chan].ce_count = 0;
+                        ri->channels[chan]->ce_count = 0;
+        }
+        cnt = 1;
+        for (i = 0; i < mci->n_layers; i++) {
+                cnt *= mci->layers[i].size;
+                memset(mci->ce_per_layer[i], 0, cnt * sizeof(u32));
+                memset(mci->ue_per_layer[i], 0, cnt * sizeof(u32));
        }
        mci->start_time = jiffies;
@@ -451,9 +666,11 @@ static ssize_t mci_reset_counters_store(struct mem_ctl_info *mci,
 * Negative value still means that an error has occurred while setting
 * the scrub rate.
 */
-static ssize_t mci_sdram_scrub_rate_store(struct mem_ctl_info *mci,
+static ssize_t mci_sdram_scrub_rate_store(struct device *dev,
+                                          struct device_attribute *mattr,
                                          const char *data, size_t count)
 {
+        struct mem_ctl_info *mci = to_mci(dev);
        unsigned long bandwidth = 0;
        int new_bw = 0;
@@ -476,8 +693,11 @@ static ssize_t mci_sdram_scrub_rate_store(struct mem_ctl_info *mci,
 /*
 * ->get_sdram_scrub_rate() return value semantics same as above.
 */
-static ssize_t mci_sdram_scrub_rate_show(struct mem_ctl_info *mci, char *data)
+static ssize_t mci_sdram_scrub_rate_show(struct device *dev,
+                                         struct device_attribute *mattr,
+                                         char *data)
 {
+        struct mem_ctl_info *mci = to_mci(dev);
        int bandwidth = 0;
        if (!mci->get_sdram_scrub_rate)
@@ -493,45 +713,72 @@ static ssize_t mci_sdram_scrub_rate_show(struct mem_ctl_info *mci, char *data)
 }
 /* default attribute files for the MCI object */
-static ssize_t mci_ue_count_show(struct mem_ctl_info *mci, char *data)
+static ssize_t mci_ue_count_show(struct device *dev,
+                                 struct device_attribute *mattr,
+                                 char *data)
 {
+        struct mem_ctl_info *mci = to_mci(dev);
        return sprintf(data, "%d\n", mci->ue_mc);
 }
-static ssize_t mci_ce_count_show(struct mem_ctl_info *mci, char *data)
+static ssize_t mci_ce_count_show(struct device *dev,
+                                 struct device_attribute *mattr,
+                                 char *data)
 {
+        struct mem_ctl_info *mci = to_mci(dev);
        return sprintf(data, "%d\n", mci->ce_mc);
 }
-static ssize_t mci_ce_noinfo_show(struct mem_ctl_info *mci, char *data)
+static ssize_t mci_ce_noinfo_show(struct device *dev,
+                                  struct device_attribute *mattr,
+                                  char *data)
 {
+        struct mem_ctl_info *mci = to_mci(dev);
        return sprintf(data, "%d\n", mci->ce_noinfo_count);
 }
-static ssize_t mci_ue_noinfo_show(struct mem_ctl_info *mci, char *data)
+static ssize_t mci_ue_noinfo_show(struct device *dev,
+                                  struct device_attribute *mattr,
+                                  char *data)
 {
+        struct mem_ctl_info *mci = to_mci(dev);
        return sprintf(data, "%d\n", mci->ue_noinfo_count);
 }
-static ssize_t mci_seconds_show(struct mem_ctl_info *mci, char *data)
+static ssize_t mci_seconds_show(struct device *dev,
+                                struct device_attribute *mattr,
+                                char *data)
 {
+        struct mem_ctl_info *mci = to_mci(dev);
        return sprintf(data, "%ld\n", (jiffies - mci->start_time) / HZ);
 }
-static ssize_t mci_ctl_name_show(struct mem_ctl_info *mci, char *data)
+static ssize_t mci_ctl_name_show(struct device *dev,
+                                 struct device_attribute *mattr,
+                                 char *data)
 {
+        struct mem_ctl_info *mci = to_mci(dev);
        return sprintf(data, "%s\n", mci->ctl_name);
 }
-static ssize_t mci_size_mb_show(struct mem_ctl_info *mci, char *data)
+static ssize_t mci_size_mb_show(struct device *dev,
+                                struct device_attribute *mattr,
+                                char *data)
 {
+        struct mem_ctl_info *mci = to_mci(dev);
        int total_pages = 0, csrow_idx, j;
        for (csrow_idx = 0; csrow_idx < mci->nr_csrows; csrow_idx++) {
-                struct csrow_info *csrow = &mci->csrows[csrow_idx];
+                struct csrow_info *csrow = mci->csrows[csrow_idx];
                for (j = 0; j < csrow->nr_channels; j++) {
-                        struct dimm_info *dimm = csrow->channels[j].dimm;
+                        struct dimm_info *dimm = csrow->channels[j]->dimm;
                        total_pages += dimm->nr_pages;
                }
@@ -540,361 +787,187 @@ static ssize_t mci_size_mb_show(struct mem_ctl_info *mci, char *data)
        return sprintf(data, "%u\n", PAGES_TO_MiB(total_pages));
 }
-#define to_mci(k) container_of(k, struct mem_ctl_info, edac_mci_kobj)
+static ssize_t mci_max_location_show(struct device *dev,
-#define to_mcidev_attr(a) container_of(a,struct mcidev_sysfs_attribute,attr)
+                                     struct device_attribute *mattr,
+                                     char *data)
-/* MCI show/store functions for top most object */
-static ssize_t mcidev_show(struct kobject *kobj, struct attribute *attr,
-                        char *buffer)
 {
-        struct mem_ctl_info *mem_ctl_info = to_mci(kobj);
+        struct mem_ctl_info *mci = to_mci(dev);
-        struct mcidev_sysfs_attribute *mcidev_attr = to_mcidev_attr(attr);
+        int i;
+        char *p = data;
-        debugf1("%s() mem_ctl_info %p\n", __func__, mem_ctl_info);
-        if (mcidev_attr->show)
+        for (i = 0; i < mci->n_layers; i++) {
-                return mcidev_attr->show(mem_ctl_info, buffer);
+                p += sprintf(p, "%s %d ",
+                             edac_layer_name[mci->layers[i].type],
+                             mci->layers[i].size - 1);
+        }
-        return -EIO;
+        return p - data;
 }
-static ssize_t mcidev_store(struct kobject *kobj, struct attribute *attr,
+#ifdef CONFIG_EDAC_DEBUG
-                        const char *buffer, size_t count)
+static ssize_t edac_fake_inject_write(struct file *file,
+                                      const char __user *data,
+                                      size_t count, loff_t *ppos)
 {
-        struct mem_ctl_info *mem_ctl_info = to_mci(kobj);
+        struct device *dev = file->private_data;
-        struct mcidev_sysfs_attribute *mcidev_attr = to_mcidev_attr(attr);
+        struct mem_ctl_info *mci = to_mci(dev);
+        static enum hw_event_mc_err_type type;
-        debugf1("%s() mem_ctl_info %p\n", __func__, mem_ctl_info);
+        u16 errcount = mci->fake_inject_count;
-        if (mcidev_attr->store)
+        if (!errcount)
-                return mcidev_attr->store(mem_ctl_info, buffer, count);
+                errcount = 1;
+        type = mci->fake_inject_ue ? HW_EVENT_ERR_UNCORRECTED
+                                   : HW_EVENT_ERR_CORRECTED;
+        printk(KERN_DEBUG
+               "Generating %d %s fake error%s to %d.%d.%d to test core handling. NOTE: this won't test the driver-specific decoding logic.\n",
+                errcount,
+                (type == HW_EVENT_ERR_UNCORRECTED) ? "UE" : "CE",
+                errcount > 1 ? "s" : "",
+                mci->fake_inject_layer[0],
+                mci->fake_inject_layer[1],
+                mci->fake_inject_layer[2]
+               );
+        edac_mc_handle_error(type, mci, errcount, 0, 0, 0,
+                             mci->fake_inject_layer[0],
+                             mci->fake_inject_layer[1],
+                             mci->fake_inject_layer[2],
+                             "FAKE ERROR", "for EDAC testing only");
-        return -EIO;
+        return count;
 }
-/* Intermediate show/store table */
+static int debugfs_open(struct inode *inode, struct file *file)
-static const struct sysfs_ops mci_ops = {
+{
-        .show = mcidev_show,
+        file->private_data = inode->i_private;
-        .store = mcidev_store
+        return 0;
-};
+}
-#define MCIDEV_ATTR(_name,_mode,_show,_store)                   \
+static const struct file_operations debug_fake_inject_fops = {
-static struct mcidev_sysfs_attribute mci_attr_##_name = {                       \
+        .open = debugfs_open,
-        .attr = {.name = __stringify(_name), .mode = _mode },   \
+        .write = edac_fake_inject_write,
-        .show   = _show,                                        \
+        .llseek = generic_file_llseek,
-        .store  = _store,                                       \
 };
+#endif
 /* default Control file */
-MCIDEV_ATTR(reset_counters, S_IWUSR, NULL, mci_reset_counters_store);
+DEVICE_ATTR(reset_counters, S_IWUSR, NULL, mci_reset_counters_store);
 /* default Attribute files */
-MCIDEV_ATTR(mc_name, S_IRUGO, mci_ctl_name_show, NULL);
+DEVICE_ATTR(mc_name, S_IRUGO, mci_ctl_name_show, NULL);
-MCIDEV_ATTR(size_mb, S_IRUGO, mci_size_mb_show, NULL);
+DEVICE_ATTR(size_mb, S_IRUGO, mci_size_mb_show, NULL);
-MCIDEV_ATTR(seconds_since_reset, S_IRUGO, mci_seconds_show, NULL);
+DEVICE_ATTR(seconds_since_reset, S_IRUGO, mci_seconds_show, NULL);
-MCIDEV_ATTR(ue_noinfo_count, S_IRUGO, mci_ue_noinfo_show, NULL);
+DEVICE_ATTR(ue_noinfo_count, S_IRUGO, mci_ue_noinfo_show, NULL);
-MCIDEV_ATTR(ce_noinfo_count, S_IRUGO, mci_ce_noinfo_show, NULL);
+DEVICE_ATTR(ce_noinfo_count, S_IRUGO, mci_ce_noinfo_show, NULL);
-MCIDEV_ATTR(ue_count, S_IRUGO, mci_ue_count_show, NULL);
+DEVICE_ATTR(ue_count, S_IRUGO, mci_ue_count_show, NULL);
-MCIDEV_ATTR(ce_count, S_IRUGO, mci_ce_count_show, NULL);
+DEVICE_ATTR(ce_count, S_IRUGO, mci_ce_count_show, NULL);
+DEVICE_ATTR(max_location, S_IRUGO, mci_max_location_show, NULL);
 /* memory scrubber attribute file */
-MCIDEV_ATTR(sdram_scrub_rate, S_IRUGO | S_IWUSR, mci_sdram_scrub_rate_show,
+DEVICE_ATTR(sdram_scrub_rate, S_IRUGO | S_IWUSR, mci_sdram_scrub_rate_show,
        mci_sdram_scrub_rate_store);
-static struct mcidev_sysfs_attribute *mci_attr[] = {
+static struct attribute *mci_attrs[] = {
-        &mci_attr_reset_counters,
+        &dev_attr_reset_counters.attr,
-        &mci_attr_mc_name,
+        &dev_attr_mc_name.attr,
-        &mci_attr_size_mb,
+        &dev_attr_size_mb.attr,
-        &mci_attr_seconds_since_reset,
+        &dev_attr_seconds_since_reset.attr,
-        &mci_attr_ue_noinfo_count,
+        &dev_attr_ue_noinfo_count.attr,
-        &mci_attr_ce_noinfo_count,
+        &dev_attr_ce_noinfo_count.attr,
-        &mci_attr_ue_count,
+        &dev_attr_ue_count.attr,
-        &mci_attr_ce_count,
+        &dev_attr_ce_count.attr,
-        &mci_attr_sdram_scrub_rate,
+        &dev_attr_sdram_scrub_rate.attr,
+        &dev_attr_max_location.attr,
        NULL
 };
+static struct attribute_group mci_attr_grp = {
+        .attrs  = mci_attrs,
+};
-/*
+static const struct attribute_group *mci_attr_groups[] = {
- * Release of a MC controlling instance
+        &mci_attr_grp,
- *
+        NULL
- *      each MC control instance has the following resources upon entry:
+};
- *              a) a ref count on the top memctl kobj
- *              b) a ref count on this module
- *
- *      this function must decrement those ref counts and then
- *      issue a free on the instance's memory
- */
-static void edac_mci_control_release(struct kobject *kobj)
-{
-        struct mem_ctl_info *mci;
-        mci = to_mci(kobj);
-        debugf0("%s() mci instance idx=%d releasing\n", __func__, mci->mc_idx);
+static void mci_attr_release(struct device *dev)
+{
+        struct mem_ctl_info *mci = container_of(dev, struct mem_ctl_info, dev);
-        /* decrement the module ref count */
+        edac_dbg(1, "Releasing csrow device %s\n", dev_name(dev));
-        module_put(mci->owner);
+        kfree(mci);
 }
-static struct kobj_type ktype_mci = {
+static struct device_type mci_attr_type = {
-        .release = edac_mci_control_release,
+        .groups         = mci_attr_groups,
-        .sysfs_ops = &mci_ops,
+        .release        = mci_attr_release,
-        .default_attrs = (struct attribute **)mci_attr,
 };
-/* EDAC memory controller sysfs kset:
+#ifdef CONFIG_EDAC_DEBUG
- *      /sys/devices/system/edac/mc
+static struct dentry *edac_debugfs;
- */
-static struct kset *mc_kset;
-/*
+int __init edac_debugfs_init(void)
- * edac_mc_register_sysfs_main_kobj
- *
- *      setups and registers the main kobject for each mci
- */
-int edac_mc_register_sysfs_main_kobj(struct mem_ctl_info *mci)
 {
-        struct kobject *kobj_mci;
+        edac_debugfs = debugfs_create_dir("edac", NULL);
-        int err;
+        if (IS_ERR(edac_debugfs)) {
+                edac_debugfs = NULL;
-        debugf1("%s()\n", __func__);
+                return -ENOMEM;
-        kobj_mci = &mci->edac_mci_kobj;
-        /* Init the mci's kobject */
-        memset(kobj_mci, 0, sizeof(*kobj_mci));
-        /* Record which module 'owns' this control structure
-         * and bump the ref count of the module
-         */
-        mci->owner = THIS_MODULE;
-        /* bump ref count on this module */
-        if (!try_module_get(mci->owner)) {
-                err = -ENODEV;
-                goto fail_out;
-        }
-        /* this instance become part of the mc_kset */
-        kobj_mci->kset = mc_kset;
-        /* register the mc<id> kobject to the mc_kset */
-        err = kobject_init_and_add(kobj_mci, &ktype_mci, NULL,
-                                   "mc%d", mci->mc_idx);
-        if (err) {
-                debugf1("%s()Failed to register '.../edac/mc%d'\n",
-                        __func__, mci->mc_idx);
-                goto kobj_reg_fail;
        }
-        kobject_uevent(kobj_mci, KOBJ_ADD);
-        /* At this point, to 'free' the control struct,
-         * edac_mc_unregister_sysfs_main_kobj() must be used
-         */
-        debugf1("%s() Registered '.../edac/mc%d' kobject\n",
-                __func__, mci->mc_idx);
        return 0;
-        /* Error exit stack */
-kobj_reg_fail:
-        module_put(mci->owner);
-fail_out:
-        return err;
-}
-/*
- * edac_mc_register_sysfs_main_kobj
- *
- *      tears down and the main mci kobject from the mc_kset
- */
-void edac_mc_unregister_sysfs_main_kobj(struct mem_ctl_info *mci)
-{
-        debugf1("%s()\n", __func__);
-        /* delete the kobj from the mc_kset */
-        kobject_put(&mci->edac_mci_kobj);
-}
-#define EDAC_DEVICE_SYMLINK     "device"
-#define grp_to_mci(k) (container_of(k, struct mcidev_sysfs_group_kobj, kobj)->mci)
-/* MCI show/store functions for top most object */
-static ssize_t inst_grp_show(struct kobject *kobj, struct attribute *attr,
-                        char *buffer)
-{
-        struct mem_ctl_info *mem_ctl_info = grp_to_mci(kobj);
-        struct mcidev_sysfs_attribute *mcidev_attr = to_mcidev_attr(attr);
-        debugf1("%s() mem_ctl_info %p\n", __func__, mem_ctl_info);
-        if (mcidev_attr->show)
-                return mcidev_attr->show(mem_ctl_info, buffer);
-        return -EIO;
 }
-static ssize_t inst_grp_store(struct kobject *kobj, struct attribute *attr,
+void __exit edac_debugfs_exit(void)
-                        const char *buffer, size_t count)
 {
-        struct mem_ctl_info *mem_ctl_info = grp_to_mci(kobj);
+        debugfs_remove(edac_debugfs);
-        struct mcidev_sysfs_attribute *mcidev_attr = to_mcidev_attr(attr);
-        debugf1("%s() mem_ctl_info %p\n", __func__, mem_ctl_info);
-        if (mcidev_attr->store)
-                return mcidev_attr->store(mem_ctl_info, buffer, count);
-        return -EIO;
 }
-/* No memory to release for this kobj */
+int edac_create_debug_nodes(struct mem_ctl_info *mci)
-static void edac_inst_grp_release(struct kobject *kobj)
 {
-        struct mcidev_sysfs_group_kobj *grp;
+        struct dentry *d, *parent;
-        struct mem_ctl_info *mci;
+        char name[80];
+        int i;
-        debugf1("%s()\n", __func__);
-        grp = container_of(kobj, struct mcidev_sysfs_group_kobj, kobj);
-        mci = grp->mci;
-}
-/* Intermediate show/store table */
-static struct sysfs_ops inst_grp_ops = {
-        .show = inst_grp_show,
-        .store = inst_grp_store
-};
-/* the kobj_type instance for a instance group */
-static struct kobj_type ktype_inst_grp = {
-        .release = edac_inst_grp_release,
-        .sysfs_ops = &inst_grp_ops,
-};
-/*
+        if (!edac_debugfs)
- * edac_create_mci_instance_attributes
+                return -ENODEV;
- *      create MC driver specific attributes bellow an specified kobj
- * This routine calls itself recursively, in order to create an entire
- * object tree.
- */
-static int edac_create_mci_instance_attributes(struct mem_ctl_info *mci,
-                                const struct mcidev_sysfs_attribute *sysfs_attrib,
-                                struct kobject *kobj)
-{
-        int err;
-        debugf4("%s()\n", __func__);
+        d = debugfs_create_dir(mci->dev.kobj.name, edac_debugfs);
+        if (!d)
-        while (sysfs_attrib) {
+                return -ENOMEM;
-                debugf4("%s() sysfs_attrib = %p\n",__func__, sysfs_attrib);
+        parent = d;
-                if (sysfs_attrib->grp) {
-                        struct mcidev_sysfs_group_kobj *grp_kobj;
+        for (i = 0; i < mci->n_layers; i++) {
+                sprintf(name, "fake_inject_%s",
-                        grp_kobj = kzalloc(sizeof(*grp_kobj), GFP_KERNEL);
+                             edac_layer_name[mci->layers[i].type]);
-                        if (!grp_kobj)
+                d = debugfs_create_u8(name, S_IRUGO | S_IWUSR, parent,
-                                return -ENOMEM;
+                                      &mci->fake_inject_layer[i]);
+                if (!d)
-                        grp_kobj->grp = sysfs_attrib->grp;
+                        goto nomem;
-                        grp_kobj->mci = mci;
-                        list_add_tail(&grp_kobj->list, &mci->grp_kobj_list);
-                        debugf0("%s() grp %s, mci %p\n", __func__,
-                                sysfs_attrib->grp->name, mci);
-                        err = kobject_init_and_add(&grp_kobj->kobj,
-                                                &ktype_inst_grp,
-                                                &mci->edac_mci_kobj,
-                                                sysfs_attrib->grp->name);
-                        if (err < 0) {
-                                printk(KERN_ERR "kobject_init_and_add failed: %d\n", err);
-                                return err;
-                        }
-                        err = edac_create_mci_instance_attributes(mci,
-                                        grp_kobj->grp->mcidev_attr,
-                                        &grp_kobj->kobj);
-                        if (err < 0)
-                                return err;
-                } else if (sysfs_attrib->attr.name) {
-                        debugf4("%s() file %s\n", __func__,
-                                sysfs_attrib->attr.name);
-                        err = sysfs_create_file(kobj, &sysfs_attrib->attr);
-                        if (err < 0) {
-                                printk(KERN_ERR "sysfs_create_file failed: %d\n", err);
-                                return err;
-                        }
-                } else
-                        break;
-                sysfs_attrib++;
        }
-        return 0;
+        d = debugfs_create_bool("fake_inject_ue", S_IRUGO | S_IWUSR, parent,
-}
+                                &mci->fake_inject_ue);
+        if (!d)
+                goto nomem;
-/*
+        d = debugfs_create_u16("fake_inject_count", S_IRUGO | S_IWUSR, parent,
- * edac_remove_mci_instance_attributes
+                                &mci->fake_inject_count);
- *      remove MC driver specific attributes at the topmost level
+        if (!d)
- *      directory of this mci instance.
+                goto nomem;
- */
-static void edac_remove_mci_instance_attributes(struct mem_ctl_info *mci,
-                                const struct mcidev_sysfs_attribute *sysfs_attrib,
-                                struct kobject *kobj, int count)
-{
-        struct mcidev_sysfs_group_kobj *grp_kobj, *tmp;
-        debugf1("%s()\n", __func__);
+        d = debugfs_create_file("fake_inject", S_IWUSR, parent,
+                                &mci->dev,
-        /*
+                                &debug_fake_inject_fops);
-         * loop if there are attributes and until we hit a NULL entry
+        if (!d)
-         * Remove first all the attributes
+                goto nomem;
-         */
-        while (sysfs_attrib) {
-                debugf4("%s() sysfs_attrib = %p\n",__func__, sysfs_attrib);
-                if (sysfs_attrib->grp) {
-                        debugf4("%s() seeking for group %s\n",
-                                __func__, sysfs_attrib->grp->name);
-                        list_for_each_entry(grp_kobj,
-                                            &mci->grp_kobj_list, list) {
-                                debugf4("%s() grp_kobj->grp = %p\n",__func__, grp_kobj->grp);
-                                if (grp_kobj->grp == sysfs_attrib->grp) {
-                                        edac_remove_mci_instance_attributes(mci,
-                                                    grp_kobj->grp->mcidev_attr,
-                                                    &grp_kobj->kobj, count + 1);
-                                        debugf4("%s() group %s\n", __func__,
-                                                sysfs_attrib->grp->name);
-                                        kobject_put(&grp_kobj->kobj);
-                                }
-                        }
-                        debugf4("%s() end of seeking for group %s\n",
-                                __func__, sysfs_attrib->grp->name);
-                } else if (sysfs_attrib->attr.name) {
-                        debugf4("%s() file %s\n", __func__,
-                                sysfs_attrib->attr.name);
-                        sysfs_remove_file(kobj, &sysfs_attrib->attr);
-                } else
-                        break;
-                sysfs_attrib++;
-        }
-        /* Remove the group objects */
+        mci->debugfs = parent;
-        if (count)
+        return 0;
-                return;
+nomem:
-        list_for_each_entry_safe(grp_kobj, tmp,
+        debugfs_remove(mci->debugfs);
-                                 &mci->grp_kobj_list, list) {
+        return -ENOMEM;
-                list_del(&grp_kobj->list);
-                kfree(grp_kobj);
-        }
 }
+#endif
 /*
 * Create a new Memory Controller kobject instance,
@@ -906,77 +979,87 @@ static void edac_remove_mci_instance_attributes(struct mem_ctl_info *mci,
 */
 int edac_create_sysfs_mci_device(struct mem_ctl_info *mci)
 {
-        int i, j;
+        int i, err;
-        int err;
-        struct csrow_info *csrow;
-        struct kobject *kobj_mci = &mci->edac_mci_kobj;
-        debugf0("%s() idx=%d\n", __func__, mci->mc_idx);
+        /*
+         * The memory controller needs its own bus, in order to avoid
-        INIT_LIST_HEAD(&mci->grp_kobj_list);
+         * namespace conflicts at /sys/bus/edac.
+         */
+        mci->bus.name = kasprintf(GFP_KERNEL, "mc%d", mci->mc_idx);
+        if (!mci->bus.name)
+                return -ENOMEM;
+        edac_dbg(0, "creating bus %s\n", mci->bus.name);
+        err = bus_register(&mci->bus);
+        if (err < 0)
+                return err;
-        /* create a symlink for the device */
+        /* get the /sys/devices/system/edac subsys reference */
-        err = sysfs_create_link(kobj_mci, &mci->dev->kobj,
+        mci->dev.type = &mci_attr_type;
-                                EDAC_DEVICE_SYMLINK);
+        device_initialize(&mci->dev);
-        if (err) {
-                debugf1("%s() failure to create symlink\n", __func__);
+        mci->dev.parent = mci_pdev;
-                goto fail0;
+        mci->dev.bus = &mci->bus;
+        dev_set_name(&mci->dev, "mc%d", mci->mc_idx);
+        dev_set_drvdata(&mci->dev, mci);
+        pm_runtime_forbid(&mci->dev);
+        edac_dbg(0, "creating device %s\n", dev_name(&mci->dev));
+        err = device_add(&mci->dev);
+        if (err < 0) {
+                bus_unregister(&mci->bus);
+                kfree(mci->bus.name);
+                return err;
        }
-        /* If the low level driver desires some attributes,
+        /*
-         * then create them now for the driver.
+         * Create the dimm/rank devices
         */
-        if (mci->mc_driver_sysfs_attributes) {
+        for (i = 0; i < mci->tot_dimms; i++) {
-                err = edac_create_mci_instance_attributes(mci,
+                struct dimm_info *dimm = mci->dimms[i];
-                                        mci->mc_driver_sysfs_attributes,
+                /* Only expose populated DIMMs */
-                                        &mci->edac_mci_kobj);
+                if (dimm->nr_pages == 0)
+                        continue;
+#ifdef CONFIG_EDAC_DEBUG
+                edac_dbg(1, "creating dimm%d, located at ", i);
+                if (edac_debug_level >= 1) {
+                        int lay;
+                        for (lay = 0; lay < mci->n_layers; lay++)
+                                printk(KERN_CONT "%s %d ",
+                                        edac_layer_name[mci->layers[lay].type],
+                                        dimm->location[lay]);
+                        printk(KERN_CONT "\n");
+                }
+#endif
+                err = edac_create_dimm_object(mci, dimm, i);
                if (err) {
-                        debugf1("%s() failure to create mci attributes\n",
+                        edac_dbg(1, "failure: create dimm %d obj\n", i);
-                                __func__);
+                        goto fail;
-                        goto fail0;
                }
        }
-        /* Make directories for each CSROW object under the mc<id> kobject
+#ifdef CONFIG_EDAC_LEGACY_SYSFS
-         */
+        err = edac_create_csrow_objects(mci);
-        for (i = 0; i < mci->nr_csrows; i++) {
+        if (err < 0)
-                int nr_pages = 0;
+                goto fail;
+#endif
-                csrow = &mci->csrows[i];
-                for (j = 0; j < csrow->nr_channels; j++)
-                        nr_pages += csrow->channels[j].dimm->nr_pages;
-                if (nr_pages > 0) {
-                        err = edac_create_csrow_object(mci, csrow, i);
-                        if (err) {
-                                debugf1("%s() failure: create csrow %d obj\n",
-                                        __func__, i);
-                                goto fail1;
-                        }
-                }
-        }
+#ifdef CONFIG_EDAC_DEBUG
+        edac_create_debug_nodes(mci);
+#endif
        return 0;
-fail1:
+fail:
        for (i--; i >= 0; i--) {
-                int nr_pages = 0;
+                struct dimm_info *dimm = mci->dimms[i];
+                if (dimm->nr_pages == 0)
-                csrow = &mci->csrows[i];
+                        continue;
-                for (j = 0; j < csrow->nr_channels; j++)
+                put_device(&dimm->dev);
-                        nr_pages += csrow->channels[j].dimm->nr_pages;
+                device_del(&dimm->dev);
-                if (nr_pages > 0)
-                        kobject_put(&mci->csrows[i].kobj);
        }
+        put_device(&mci->dev);
-        /* remove the mci instance's attributes, if any */
+        device_del(&mci->dev);
-        edac_remove_mci_instance_attributes(mci,
+        bus_unregister(&mci->bus);
-                mci->mc_driver_sysfs_attributes, &mci->edac_mci_kobj, 0);
+        kfree(mci->bus.name);
-        /* remove the symlink */
-        sysfs_remove_link(kobj_mci, EDAC_DEVICE_SYMLINK);
-fail0:
        return err;
 }
@@ -985,98 +1068,84 @@ fail0:
 */
 void edac_remove_sysfs_mci_device(struct mem_ctl_info *mci)
 {
-        struct csrow_info *csrow;
+        int i;
-        int i, j;
-        debugf0("%s()\n", __func__);
-        /* remove all csrow kobjects */
-        debugf4("%s()  unregister this mci kobj\n", __func__);
-        for (i = 0; i < mci->nr_csrows; i++) {
-                int nr_pages = 0;
-                csrow = &mci->csrows[i];
-                for (j = 0; j < csrow->nr_channels; j++)
-                        nr_pages += csrow->channels[j].dimm->nr_pages;
-                if (nr_pages > 0) {
-                        debugf0("%s()  unreg csrow-%d\n", __func__, i);
-                        kobject_put(&mci->csrows[i].kobj);
-                }
-        }
-        /* remove this mci instance's attribtes */
+        edac_dbg(0, "\n");
-        if (mci->mc_driver_sysfs_attributes) {
-                debugf4("%s()  unregister mci private attributes\n", __func__);
+#ifdef CONFIG_EDAC_DEBUG
-                edac_remove_mci_instance_attributes(mci,
+        debugfs_remove(mci->debugfs);
-                                                mci->mc_driver_sysfs_attributes,
+#endif
-                                                &mci->edac_mci_kobj, 0);
+#ifdef CONFIG_EDAC_LEGACY_SYSFS
+        edac_delete_csrow_objects(mci);
+#endif
+        for (i = 0; i < mci->tot_dimms; i++) {
+                struct dimm_info *dimm = mci->dimms[i];
+                if (dimm->nr_pages == 0)
+                        continue;
+                edac_dbg(0, "removing device %s\n", dev_name(&dimm->dev));
+                put_device(&dimm->dev);
+                device_del(&dimm->dev);
        }
-        /* remove the symlink */
-        debugf4("%s()  remove_link\n", __func__);
-        sysfs_remove_link(&mci->edac_mci_kobj, EDAC_DEVICE_SYMLINK);
-        /* unregister this instance's kobject */
-        debugf4("%s()  remove_mci_instance\n", __func__);
-        kobject_put(&mci->edac_mci_kobj);
 }
+void edac_unregister_sysfs(struct mem_ctl_info *mci)
+{
+        edac_dbg(1, "Unregistering device %s\n", dev_name(&mci->dev));
+        put_device(&mci->dev);
+        device_del(&mci->dev);
+        bus_unregister(&mci->bus);
+        kfree(mci->bus.name);
+}
+static void mc_attr_release(struct device *dev)
+{
+        /*
+         * There's no container structure here, as this is just the mci
+         * parent device, used to create the /sys/devices/mc sysfs node.
+         * So, there are no attributes on it.
+         */
+        edac_dbg(1, "Releasing device %s\n", dev_name(dev));
+        kfree(dev);
+}
+static struct device_type mc_attr_type = {
+        .release        = mc_attr_release,
+};
 /*
- * edac_setup_sysfs_mc_kset(void)
+ * Init/exit code for the module. Basically, creates/removes /sys/class/rc
- *
- * Initialize the mc_kset for the 'mc' entry
- *      This requires creating the top 'mc' directory with a kset
- *      and its controls/attributes.
- *
- *      To this 'mc' kset, instance 'mci' will be grouped as children.
- *
- * Return:  0 SUCCESS
- *         !0 FAILURE error code
 */
-int edac_sysfs_setup_mc_kset(void)
+int __init edac_mc_sysfs_init(void)
 {
-        int err = -EINVAL;
        struct bus_type *edac_subsys;
+        int err;
-        debugf1("%s()\n", __func__);
        /* get the /sys/devices/system/edac subsys reference */
        edac_subsys = edac_get_sysfs_subsys();
        if (edac_subsys == NULL) {
-                debugf1("%s() no edac_subsys error=%d\n", __func__, err);
+                edac_dbg(1, "no edac_subsys\n");
-                goto fail_out;
+                return -EINVAL;
        }
-        /* Init the MC's kobject */
+        mci_pdev = kzalloc(sizeof(*mci_pdev), GFP_KERNEL);
-        mc_kset = kset_create_and_add("mc", NULL, &edac_subsys->dev_root->kobj);
-        if (!mc_kset) {
-                err = -ENOMEM;
-                debugf1("%s() Failed to register '.../edac/mc'\n", __func__);
-                goto fail_kset;
-        }
-        debugf1("%s() Registered '.../edac/mc' kobject\n", __func__);
+        mci_pdev->bus = edac_subsys;
+        mci_pdev->type = &mc_attr_type;
+        device_initialize(mci_pdev);
+        dev_set_name(mci_pdev, "mc");
-        return 0;
+        err = device_add(mci_pdev);
+        if (err < 0)
+                return err;
-fail_kset:
+        edac_dbg(0, "device %s created\n", dev_name(mci_pdev));
-        edac_put_sysfs_subsys();
-fail_out:
+        return 0;
-        return err;
 }
-/*
+void __exit edac_mc_sysfs_exit(void)
- * edac_sysfs_teardown_mc_kset
- *
- *      deconstruct the mc_ket for memory controllers
- */
-void edac_sysfs_teardown_mc_kset(void)
 {
-        kset_unregister(mc_kset);
+        put_device(mci_pdev);
+        device_del(mci_pdev);
        edac_put_sysfs_subsys();
 }
diff --git a/drivers/edac/edac_module.c b/drivers/edac/edac_module.c
index 5ddaa86d6a6e..58a28d838f37 100644
--- a/drivers/edac/edac_module.c
+++ b/drivers/edac/edac_module.c
@@ -15,7 +15,7 @@
 #include "edac_core.h"
 #include "edac_module.h"
-#define EDAC_VERSION "Ver: 2.1.0"
+#define EDAC_VERSION "Ver: 3.0.0"
 #ifdef CONFIG_EDAC_DEBUG
 /* Values of 0 to 4 will generate output */
@@ -90,26 +90,21 @@ static int __init edac_init(void)
         */
        edac_pci_clear_parity_errors();
-        /*
+        err = edac_mc_sysfs_init();
-         * now set up the mc_kset under the edac class object
-         */
-        err = edac_sysfs_setup_mc_kset();
        if (err)
                goto error;
+        edac_debugfs_init();
        /* Setup/Initialize the workq for this core */
        err = edac_workqueue_setup();
        if (err) {
                edac_printk(KERN_ERR, EDAC_MC, "init WorkQueue failure\n");
-                goto workq_fail;
+                goto error;
        }
        return 0;
-        /* Error teardown stack */
-workq_fail:
-        edac_sysfs_teardown_mc_kset();
 error:
        return err;
 }
@@ -120,11 +115,12 @@ error:
 */
 static void __exit edac_exit(void)
 {
-        debugf0("%s()\n", __func__);
+        edac_dbg(0, "\n");
        /* tear down the various subsystems */
        edac_workqueue_teardown();
-        edac_sysfs_teardown_mc_kset();
+        edac_mc_sysfs_exit();
+        edac_debugfs_exit();
 }
 /*
diff --git a/drivers/edac/edac_module.h b/drivers/edac/edac_module.h
index 0ea7d14cb930..3d139c6e7fe3 100644
--- a/drivers/edac/edac_module.h
+++ b/drivers/edac/edac_module.h
@@ -19,12 +19,12 @@
 *
 * edac_mc objects
 */
-extern int edac_sysfs_setup_mc_kset(void);
+        /* on edac_mc_sysfs.c */
-extern void edac_sysfs_teardown_mc_kset(void);
+int edac_mc_sysfs_init(void);
-extern int edac_mc_register_sysfs_main_kobj(struct mem_ctl_info *mci);
+void edac_mc_sysfs_exit(void);
-extern void edac_mc_unregister_sysfs_main_kobj(struct mem_ctl_info *mci);
 extern int edac_create_sysfs_mci_device(struct mem_ctl_info *mci);
 extern void edac_remove_sysfs_mci_device(struct mem_ctl_info *mci);
+void edac_unregister_sysfs(struct mem_ctl_info *mci);
 extern int edac_get_log_ue(void);
 extern int edac_get_log_ce(void);
 extern int edac_get_panic_on_ue(void);
@@ -34,6 +34,10 @@ extern int edac_mc_get_panic_on_ue(void);
 extern int edac_get_poll_msec(void);
 extern int edac_mc_get_poll_msec(void);
+unsigned edac_dimm_info_location(struct dimm_info *dimm, char *buf,
+                                 unsigned len);
+        /* on edac_device.c */
 extern int edac_device_register_sysfs_main_kobj(
                                struct edac_device_ctl_info *edac_dev);
 extern void edac_device_unregister_sysfs_main_kobj(
@@ -53,6 +57,20 @@ extern void edac_mc_reset_delay_period(int value);
 extern void *edac_align_ptr(void **p, unsigned size, int n_elems);
 /*
+ * EDAC debugfs functions
+ */
+#ifdef CONFIG_EDAC_DEBUG
+int edac_debugfs_init(void);
+void edac_debugfs_exit(void);
+#else
+static inline int edac_debugfs_init(void)
+{
+        return -ENODEV;
+}
+static inline void edac_debugfs_exit(void) {}
+#endif
+/*
 * EDAC PCI functions
 */
 #ifdef  CONFIG_PCI
diff --git a/drivers/edac/edac_pci.c b/drivers/edac/edac_pci.c
index f1ac86649886..ee87ef972ead 100644
--- a/drivers/edac/edac_pci.c
+++ b/drivers/edac/edac_pci.c
@@ -45,7 +45,7 @@ struct edac_pci_ctl_info *edac_pci_alloc_ctl_info(unsigned int sz_pvt,
        void *p = NULL, *pvt;
        unsigned int size;
-        debugf1("%s()\n", __func__);
+        edac_dbg(1, "\n");
        pci = edac_align_ptr(&p, sizeof(*pci), 1);
        pvt = edac_align_ptr(&p, 1, sz_pvt);
@@ -80,7 +80,7 @@ EXPORT_SYMBOL_GPL(edac_pci_alloc_ctl_info);
 */
 void edac_pci_free_ctl_info(struct edac_pci_ctl_info *pci)
 {
-        debugf1("%s()\n", __func__);
+        edac_dbg(1, "\n");
        edac_pci_remove_sysfs(pci);
 }
@@ -97,7 +97,7 @@ static struct edac_pci_ctl_info *find_edac_pci_by_dev(struct device *dev)
        struct edac_pci_ctl_info *pci;
        struct list_head *item;
-        debugf1("%s()\n", __func__);
+        edac_dbg(1, "\n");
        list_for_each(item, &edac_pci_list) {
                pci = list_entry(item, struct edac_pci_ctl_info, link);
@@ -122,7 +122,7 @@ static int add_edac_pci_to_global_list(struct edac_pci_ctl_info *pci)
        struct list_head *item, *insert_before;
        struct edac_pci_ctl_info *rover;
-        debugf1("%s()\n", __func__);
+        edac_dbg(1, "\n");
        insert_before = &edac_pci_list;
@@ -226,7 +226,7 @@ static void edac_pci_workq_function(struct work_struct *work_req)
        int msec;
        unsigned long delay;
-        debugf3("%s() checking\n", __func__);
+        edac_dbg(3, "checking\n");
        mutex_lock(&edac_pci_ctls_mutex);
@@ -261,7 +261,7 @@ static void edac_pci_workq_function(struct work_struct *work_req)
 static void edac_pci_workq_setup(struct edac_pci_ctl_info *pci,
                                 unsigned int msec)
 {
-        debugf0("%s()\n", __func__);
+        edac_dbg(0, "\n");
        INIT_DELAYED_WORK(&pci->work, edac_pci_workq_function);
        queue_delayed_work(edac_workqueue, &pci->work,
@@ -276,7 +276,7 @@ static void edac_pci_workq_teardown(struct edac_pci_ctl_info *pci)
 {
        int status;
-        debugf0("%s()\n", __func__);
+        edac_dbg(0, "\n");
        status = cancel_delayed_work(&pci->work);
        if (status == 0)
@@ -293,7 +293,7 @@ static void edac_pci_workq_teardown(struct edac_pci_ctl_info *pci)
 void edac_pci_reset_delay_period(struct edac_pci_ctl_info *pci,
                                 unsigned long value)
 {
-        debugf0("%s()\n", __func__);
+        edac_dbg(0, "\n");
        edac_pci_workq_teardown(pci);
@@ -333,7 +333,7 @@ EXPORT_SYMBOL_GPL(edac_pci_alloc_index);
 */
 int edac_pci_add_device(struct edac_pci_ctl_info *pci, int edac_idx)
 {
-        debugf0("%s()\n", __func__);
+        edac_dbg(0, "\n");
        pci->pci_idx = edac_idx;
        pci->start_time = jiffies;
@@ -393,7 +393,7 @@ struct edac_pci_ctl_info *edac_pci_del_device(struct device *dev)
 {
        struct edac_pci_ctl_info *pci;
-        debugf0("%s()\n", __func__);
+        edac_dbg(0, "\n");
        mutex_lock(&edac_pci_ctls_mutex);
@@ -430,7 +430,7 @@ EXPORT_SYMBOL_GPL(edac_pci_del_device);
 */
 static void edac_pci_generic_check(struct edac_pci_ctl_info *pci)
 {
-        debugf4("%s()\n", __func__);
+        edac_dbg(4, "\n");
        edac_pci_do_parity_check();
 }
@@ -475,7 +475,7 @@ struct edac_pci_ctl_info *edac_pci_create_generic_ctl(struct device *dev,
        pdata->edac_idx = edac_pci_idx++;
        if (edac_pci_add_device(pci, pdata->edac_idx) > 0) {
-                debugf3("%s(): failed edac_pci_add_device()\n", __func__);
+                edac_dbg(3, "failed edac_pci_add_device()\n");
                edac_pci_free_ctl_info(pci);
                return NULL;
        }
@@ -491,7 +491,7 @@ EXPORT_SYMBOL_GPL(edac_pci_create_generic_ctl);
 */
 void edac_pci_release_generic_ctl(struct edac_pci_ctl_info *pci)
 {
-        debugf0("%s() pci mod=%s\n", __func__, pci->mod_name);
+        edac_dbg(0, "pci mod=%s\n", pci->mod_name);
        edac_pci_del_device(pci->dev);
        edac_pci_free_ctl_info(pci);
diff --git a/drivers/edac/edac_pci_sysfs.c b/drivers/edac/edac_pci_sysfs.c
index 97f5064e3992..e164c555a337 100644
--- a/drivers/edac/edac_pci_sysfs.c
+++ b/drivers/edac/edac_pci_sysfs.c
@@ -78,7 +78,7 @@ static void edac_pci_instance_release(struct kobject *kobj)
 {
        struct edac_pci_ctl_info *pci;
-        debugf0("%s()\n", __func__);
+        edac_dbg(0, "\n");
        /* Form pointer to containing struct, the pci control struct */
        pci = to_instance(kobj);
@@ -161,7 +161,7 @@ static int edac_pci_create_instance_kobj(struct edac_pci_ctl_info *pci, int idx)
        struct kobject *main_kobj;
        int err;
-        debugf0("%s()\n", __func__);
+        edac_dbg(0, "\n");
        /* First bump the ref count on the top main kobj, which will
         * track the number of PCI instances we have, and thus nest
@@ -177,14 +177,13 @@ static int edac_pci_create_instance_kobj(struct edac_pci_ctl_info *pci, int idx)
        err = kobject_init_and_add(&pci->kobj, &ktype_pci_instance,
                                   edac_pci_top_main_kobj, "pci%d", idx);
        if (err != 0) {
-                debugf2("%s() failed to register instance pci%d\n",
+                edac_dbg(2, "failed to register instance pci%d\n", idx);
-                        __func__, idx);
                kobject_put(edac_pci_top_main_kobj);
                goto error_out;
        }
        kobject_uevent(&pci->kobj, KOBJ_ADD);
-        debugf1("%s() Register instance 'pci%d' kobject\n", __func__, idx);
+        edac_dbg(1, "Register instance 'pci%d' kobject\n", idx);
        return 0;
@@ -201,7 +200,7 @@ error_out:
 static void edac_pci_unregister_sysfs_instance_kobj(
                        struct edac_pci_ctl_info *pci)
 {
-        debugf0("%s()\n", __func__);
+        edac_dbg(0, "\n");
        /* Unregister the instance kobject and allow its release
         * function release the main reference count and then
@@ -317,7 +316,7 @@ static struct edac_pci_dev_attribute *edac_pci_attr[] = {
 */
 static void edac_pci_release_main_kobj(struct kobject *kobj)
 {
-        debugf0("%s() here to module_put(THIS_MODULE)\n", __func__);
+        edac_dbg(0, "here to module_put(THIS_MODULE)\n");
        kfree(kobj);
@@ -345,7 +344,7 @@ static int edac_pci_main_kobj_setup(void)
        int err;
        struct bus_type *edac_subsys;
-        debugf0("%s()\n", __func__);
+        edac_dbg(0, "\n");
        /* check and count if we have already created the main kobject */
        if (atomic_inc_return(&edac_pci_sysfs_refcount) != 1)
@@ -356,7 +355,7 @@ static int edac_pci_main_kobj_setup(void)
         */
        edac_subsys = edac_get_sysfs_subsys();
        if (edac_subsys == NULL) {
-                debugf1("%s() no edac_subsys\n", __func__);
+                edac_dbg(1, "no edac_subsys\n");
                err = -ENODEV;
                goto decrement_count_fail;
        }
@@ -366,14 +365,14 @@ static int edac_pci_main_kobj_setup(void)
         * level main kobj for EDAC PCI
         */
        if (!try_module_get(THIS_MODULE)) {
-                debugf1("%s() try_module_get() failed\n", __func__);
+                edac_dbg(1, "try_module_get() failed\n");
                err = -ENODEV;
                goto mod_get_fail;
        }
        edac_pci_top_main_kobj = kzalloc(sizeof(struct kobject), GFP_KERNEL);
        if (!edac_pci_top_main_kobj) {
-                debugf1("Failed to allocate\n");
+                edac_dbg(1, "Failed to allocate\n");
                err = -ENOMEM;
                goto kzalloc_fail;
        }
@@ -383,7 +382,7 @@ static int edac_pci_main_kobj_setup(void)
                                   &ktype_edac_pci_main_kobj,
                                   &edac_subsys->dev_root->kobj, "pci");
        if (err) {
-                debugf1("Failed to register '.../edac/pci'\n");
+                edac_dbg(1, "Failed to register '.../edac/pci'\n");
                goto kobject_init_and_add_fail;
        }
@@ -392,7 +391,7 @@ static int edac_pci_main_kobj_setup(void)
         * must be used, for resources to be cleaned up properly
         */
        kobject_uevent(edac_pci_top_main_kobj, KOBJ_ADD);
-        debugf1("Registered '.../edac/pci' kobject\n");
+        edac_dbg(1, "Registered '.../edac/pci' kobject\n");
        return 0;
@@ -421,15 +420,14 @@ decrement_count_fail:
 */
 static void edac_pci_main_kobj_teardown(void)
 {
-        debugf0("%s()\n", __func__);
+        edac_dbg(0, "\n");
        /* Decrement the count and only if no more controller instances
         * are connected perform the unregisteration of the top level
         * main kobj
         */
        if (atomic_dec_return(&edac_pci_sysfs_refcount) == 0) {
-                debugf0("%s() called kobject_put on main kobj\n",
+                edac_dbg(0, "called kobject_put on main kobj\n");
-                        __func__);
                kobject_put(edac_pci_top_main_kobj);
        }
        edac_put_sysfs_subsys();
@@ -446,7 +444,7 @@ int edac_pci_create_sysfs(struct edac_pci_ctl_info *pci)
        int err;
        struct kobject *edac_kobj = &pci->kobj;
-        debugf0("%s() idx=%d\n", __func__, pci->pci_idx);
+        edac_dbg(0, "idx=%d\n", pci->pci_idx);
        /* create the top main EDAC PCI kobject, IF needed */
        err = edac_pci_main_kobj_setup();
@@ -460,8 +458,7 @@ int edac_pci_create_sysfs(struct edac_pci_ctl_info *pci)
        err = sysfs_create_link(edac_kobj, &pci->dev->kobj, EDAC_PCI_SYMLINK);
        if (err) {
-                debugf0("%s() sysfs_create_link() returned err= %d\n",
+                edac_dbg(0, "sysfs_create_link() returned err= %d\n", err);
-                        __func__, err);
                goto symlink_fail;
        }
@@ -484,7 +481,7 @@ unregister_cleanup:
 */
 void edac_pci_remove_sysfs(struct edac_pci_ctl_info *pci)
 {
-        debugf0("%s() index=%d\n", __func__, pci->pci_idx);
+        edac_dbg(0, "index=%d\n", pci->pci_idx);
        /* Remove the symlink */
        sysfs_remove_link(&pci->kobj, EDAC_PCI_SYMLINK);
@@ -496,7 +493,7 @@ void edac_pci_remove_sysfs(struct edac_pci_ctl_info *pci)
         * if this 'pci' is the last instance.
         * If it is, the main kobject will be unregistered as a result
         */
-        debugf0("%s() calling edac_pci_main_kobj_teardown()\n", __func__);
+        edac_dbg(0, "calling edac_pci_main_kobj_teardown()\n");
        edac_pci_main_kobj_teardown();
 }
@@ -572,7 +569,7 @@ static void edac_pci_dev_parity_test(struct pci_dev *dev)
        local_irq_restore(flags);
-        debugf4("PCI STATUS= 0x%04x %s\n", status, dev_name(&dev->dev));
+        edac_dbg(4, "PCI STATUS= 0x%04x %s\n", status, dev_name(&dev->dev));
        /* check the status reg for errors on boards NOT marked as broken
         * if broken, we cannot trust any of the status bits
@@ -603,13 +600,15 @@ static void edac_pci_dev_parity_test(struct pci_dev *dev)
        }
-        debugf4("PCI HEADER TYPE= 0x%02x %s\n", header_type, dev_name(&dev->dev));
+        edac_dbg(4, "PCI HEADER TYPE= 0x%02x %s\n",
+                 header_type, dev_name(&dev->dev));
        if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
                /* On bridges, need to examine secondary status register  */
                status = get_pci_parity_status(dev, 1);
-                debugf4("PCI SEC_STATUS= 0x%04x %s\n", status, dev_name(&dev->dev));
+                edac_dbg(4, "PCI SEC_STATUS= 0x%04x %s\n",
+                         status, dev_name(&dev->dev));
                /* check the secondary status reg for errors,
                 * on NOT broken boards
@@ -671,7 +670,7 @@ void edac_pci_do_parity_check(void)
 {
        int before_count;
-        debugf3("%s()\n", __func__);
+        edac_dbg(3, "\n");
        /* if policy has PCI check off, leave now */
        if (!check_pci_errors)
diff --git a/drivers/edac/highbank_l2_edac.c b/drivers/edac/highbank_l2_edac.c
new file mode 100644
index 000000000000..e599b00c05a8
--- /dev/null
+++ b/drivers/edac/highbank_l2_edac.c
@@ -0,0 +1,149 @@
+/*
+ * Copyright 2011-2012 Calxeda, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+#include <linux/types.h>
+#include <linux/kernel.h>
+#include <linux/ctype.h>
+#include <linux/edac.h>
+#include <linux/interrupt.h>
+#include <linux/platform_device.h>
+#include <linux/of_platform.h>
+#include "edac_core.h"
+#include "edac_module.h"
+#define SR_CLR_SB_ECC_INTR      0x0
+#define SR_CLR_DB_ECC_INTR      0x4
+struct hb_l2_drvdata {
+        void __iomem *base;
+        int sb_irq;
+        int db_irq;
+};
+static irqreturn_t highbank_l2_err_handler(int irq, void *dev_id)
+{
+        struct edac_device_ctl_info *dci = dev_id;
+        struct hb_l2_drvdata *drvdata = dci->pvt_info;
+        if (irq == drvdata->sb_irq) {
+                writel(1, drvdata->base + SR_CLR_SB_ECC_INTR);
+                edac_device_handle_ce(dci, 0, 0, dci->ctl_name);
+        }
+        if (irq == drvdata->db_irq) {
+                writel(1, drvdata->base + SR_CLR_DB_ECC_INTR);
+                edac_device_handle_ue(dci, 0, 0, dci->ctl_name);
+        }
+        return IRQ_HANDLED;
+}
+static int __devinit highbank_l2_err_probe(struct platform_device *pdev)
+{
+        struct edac_device_ctl_info *dci;
+        struct hb_l2_drvdata *drvdata;
+        struct resource *r;
+        int res = 0;
+        dci = edac_device_alloc_ctl_info(sizeof(*drvdata), "cpu",
+                1, "L", 1, 2, NULL, 0, 0);
+        if (!dci)
+                return -ENOMEM;
+        drvdata = dci->pvt_info;
+        dci->dev = &pdev->dev;
+        platform_set_drvdata(pdev, dci);
+        if (!devres_open_group(&pdev->dev, NULL, GFP_KERNEL))
+                return -ENOMEM;
+        r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+        if (!r) {
+                dev_err(&pdev->dev, "Unable to get mem resource\n");
+                res = -ENODEV;
+                goto err;
+        }
+        if (!devm_request_mem_region(&pdev->dev, r->start,
+                                     resource_size(r), dev_name(&pdev->dev))) {
+                dev_err(&pdev->dev, "Error while requesting mem region\n");
+                res = -EBUSY;
+                goto err;
+        }
+        drvdata->base = devm_ioremap(&pdev->dev, r->start, resource_size(r));
+        if (!drvdata->base) {
+                dev_err(&pdev->dev, "Unable to map regs\n");
+                res = -ENOMEM;
+                goto err;
+        }
+        drvdata->db_irq = platform_get_irq(pdev, 0);
+        res = devm_request_irq(&pdev->dev, drvdata->db_irq,
+                               highbank_l2_err_handler,
+                               0, dev_name(&pdev->dev), dci);
+        if (res < 0)
+                goto err;
+        drvdata->sb_irq = platform_get_irq(pdev, 1);
+        res = devm_request_irq(&pdev->dev, drvdata->sb_irq,
+                               highbank_l2_err_handler,
+                               0, dev_name(&pdev->dev), dci);
+        if (res < 0)
+                goto err;
+        dci->mod_name = dev_name(&pdev->dev);
+        dci->dev_name = dev_name(&pdev->dev);
+        if (edac_device_add_device(dci))
+                goto err;
+        devres_close_group(&pdev->dev, NULL);
+        return 0;
+err:
+        devres_release_group(&pdev->dev, NULL);
+        edac_device_free_ctl_info(dci);
+        return res;
+}
+static int highbank_l2_err_remove(struct platform_device *pdev)
+{
+        struct edac_device_ctl_info *dci = platform_get_drvdata(pdev);
+        edac_device_del_device(&pdev->dev);
+        edac_device_free_ctl_info(dci);
+        return 0;
+}
+static const struct of_device_id hb_l2_err_of_match[] = {
+        { .compatible = "calxeda,hb-sregs-l2-ecc", },
+        {},
+};
+MODULE_DEVICE_TABLE(of, hb_l2_err_of_match);
+static struct platform_driver highbank_l2_edac_driver = {
+        .probe = highbank_l2_err_probe,
+        .remove = highbank_l2_err_remove,
+        .driver = {
+                .name = "hb_l2_edac",
+                .of_match_table = hb_l2_err_of_match,
+        },
+};
+module_platform_driver(highbank_l2_edac_driver);
+MODULE_LICENSE("GPL v2");
+MODULE_AUTHOR("Calxeda, Inc.");
+MODULE_DESCRIPTION("EDAC Driver for Calxeda Highbank L2 Cache");
diff --git a/drivers/edac/highbank_mc_edac.c b/drivers/edac/highbank_mc_edac.c
new file mode 100644
index 000000000000..c769f477fd22
--- /dev/null
+++ b/drivers/edac/highbank_mc_edac.c
@@ -0,0 +1,264 @@
+/*
+ * Copyright 2011-2012 Calxeda, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+#include <linux/types.h>
+#include <linux/kernel.h>
+#include <linux/ctype.h>
+#include <linux/edac.h>
+#include <linux/interrupt.h>
+#include <linux/platform_device.h>
+#include <linux/of_platform.h>
+#include <linux/uaccess.h>
+#include "edac_core.h"
+#include "edac_module.h"
+/* DDR Ctrlr Error Registers */
+#define HB_DDR_ECC_OPT                  0x128
+#define HB_DDR_ECC_U_ERR_ADDR           0x130
+#define HB_DDR_ECC_U_ERR_STAT           0x134
+#define HB_DDR_ECC_U_ERR_DATAL          0x138
+#define HB_DDR_ECC_U_ERR_DATAH          0x13c
+#define HB_DDR_ECC_C_ERR_ADDR           0x140
+#define HB_DDR_ECC_C_ERR_STAT           0x144
+#define HB_DDR_ECC_C_ERR_DATAL          0x148
+#define HB_DDR_ECC_C_ERR_DATAH          0x14c
+#define HB_DDR_ECC_INT_STATUS           0x180
+#define HB_DDR_ECC_INT_ACK              0x184
+#define HB_DDR_ECC_U_ERR_ID             0x424
+#define HB_DDR_ECC_C_ERR_ID             0x428
+#define HB_DDR_ECC_INT_STAT_CE          0x8
+#define HB_DDR_ECC_INT_STAT_DOUBLE_CE   0x10
+#define HB_DDR_ECC_INT_STAT_UE          0x20
+#define HB_DDR_ECC_INT_STAT_DOUBLE_UE   0x40
+#define HB_DDR_ECC_OPT_MODE_MASK        0x3
+#define HB_DDR_ECC_OPT_FWC              0x100
+#define HB_DDR_ECC_OPT_XOR_SHIFT        16
+struct hb_mc_drvdata {
+        void __iomem *mc_vbase;
+};
+static irqreturn_t highbank_mc_err_handler(int irq, void *dev_id)
+{
+        struct mem_ctl_info *mci = dev_id;
+        struct hb_mc_drvdata *drvdata = mci->pvt_info;
+        u32 status, err_addr;
+        /* Read the interrupt status register */
+        status = readl(drvdata->mc_vbase + HB_DDR_ECC_INT_STATUS);
+        if (status & HB_DDR_ECC_INT_STAT_UE) {
+                err_addr = readl(drvdata->mc_vbase + HB_DDR_ECC_U_ERR_ADDR);
+                edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 1,
+                                     err_addr >> PAGE_SHIFT,
+                                     err_addr & ~PAGE_MASK, 0,
+                                     0, 0, -1,
+                                     mci->ctl_name, "");
+        }
+        if (status & HB_DDR_ECC_INT_STAT_CE) {
+                u32 syndrome = readl(drvdata->mc_vbase + HB_DDR_ECC_C_ERR_STAT);
+                syndrome = (syndrome >> 8) & 0xff;
+                err_addr = readl(drvdata->mc_vbase + HB_DDR_ECC_C_ERR_ADDR);
+                edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, 1,
+                                     err_addr >> PAGE_SHIFT,
+                                     err_addr & ~PAGE_MASK, syndrome,
+                                     0, 0, -1,
+                                     mci->ctl_name, "");
+        }
+        /* clear the error, clears the interrupt */
+        writel(status, drvdata->mc_vbase + HB_DDR_ECC_INT_ACK);
+        return IRQ_HANDLED;
+}
+#ifdef CONFIG_EDAC_DEBUG
+static ssize_t highbank_mc_err_inject_write(struct file *file,
+                                      const char __user *data,
+                                      size_t count, loff_t *ppos)
+{
+        struct mem_ctl_info *mci = file->private_data;
+        struct hb_mc_drvdata *pdata = mci->pvt_info;
+        char buf[32];
+        size_t buf_size;
+        u32 reg;
+        u8 synd;
+        buf_size = min(count, (sizeof(buf)-1));
+        if (copy_from_user(buf, data, buf_size))
+                return -EFAULT;
+        buf[buf_size] = 0;
+        if (!kstrtou8(buf, 16, &synd)) {
+                reg = readl(pdata->mc_vbase + HB_DDR_ECC_OPT);
+                reg &= HB_DDR_ECC_OPT_MODE_MASK;
+                reg |= (synd << HB_DDR_ECC_OPT_XOR_SHIFT) | HB_DDR_ECC_OPT_FWC;
+                writel(reg, pdata->mc_vbase + HB_DDR_ECC_OPT);
+        }
+        return count;
+}
+static int debugfs_open(struct inode *inode, struct file *file)
+{
+        file->private_data = inode->i_private;
+        return 0;
+}
+static const struct file_operations highbank_mc_debug_inject_fops = {
+        .open = debugfs_open,
+        .write = highbank_mc_err_inject_write,
+        .llseek = generic_file_llseek,
+};
+static void __devinit highbank_mc_create_debugfs_nodes(struct mem_ctl_info *mci)
+{
+        if (mci->debugfs)
+                debugfs_create_file("inject_ctrl", S_IWUSR, mci->debugfs, mci,
+                                    &highbank_mc_debug_inject_fops);
+;
+}
+#else
+static void __devinit highbank_mc_create_debugfs_nodes(struct mem_ctl_info *mci)
+{}
+#endif
+static int __devinit highbank_mc_probe(struct platform_device *pdev)
+{
+        struct edac_mc_layer layers[2];
+        struct mem_ctl_info *mci;
+        struct hb_mc_drvdata *drvdata;
+        struct dimm_info *dimm;
+        struct resource *r;
+        u32 control;
+        int irq;
+        int res = 0;
+        layers[0].type = EDAC_MC_LAYER_CHIP_SELECT;
+        layers[0].size = 1;
+        layers[0].is_virt_csrow = true;
+        layers[1].type = EDAC_MC_LAYER_CHANNEL;
+        layers[1].size = 1;
+        layers[1].is_virt_csrow = false;
+        mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers,
+                            sizeof(struct hb_mc_drvdata));
+        if (!mci)
+                return -ENOMEM;
+        mci->pdev = &pdev->dev;
+        drvdata = mci->pvt_info;
+        platform_set_drvdata(pdev, mci);
+        if (!devres_open_group(&pdev->dev, NULL, GFP_KERNEL))
+                return -ENOMEM;
+        r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+        if (!r) {
+                dev_err(&pdev->dev, "Unable to get mem resource\n");
+                res = -ENODEV;
+                goto err;
+        }
+        if (!devm_request_mem_region(&pdev->dev, r->start,
+                                     resource_size(r), dev_name(&pdev->dev))) {
+                dev_err(&pdev->dev, "Error while requesting mem region\n");
+                res = -EBUSY;
+                goto err;
+        }
+        drvdata->mc_vbase = devm_ioremap(&pdev->dev,
+                                          r->start, resource_size(r));
+        if (!drvdata->mc_vbase) {
+                dev_err(&pdev->dev, "Unable to map regs\n");
+                res = -ENOMEM;
+                goto err;
+        }
+        control = readl(drvdata->mc_vbase + HB_DDR_ECC_OPT) & 0x3;
+        if (!control || (control == 0x2)) {
+                dev_err(&pdev->dev, "No ECC present, or ECC disabled\n");
+                res = -ENODEV;
+                goto err;
+        }
+        irq = platform_get_irq(pdev, 0);
+        res = devm_request_irq(&pdev->dev, irq, highbank_mc_err_handler,
+                               0, dev_name(&pdev->dev), mci);
+        if (res < 0) {
+                dev_err(&pdev->dev, "Unable to request irq %d\n", irq);
+                goto err;
+        }
+        mci->mtype_cap = MEM_FLAG_DDR3;
+        mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_SECDED;
+        mci->edac_cap = EDAC_FLAG_SECDED;
+        mci->mod_name = dev_name(&pdev->dev);
+        mci->mod_ver = "1";
+        mci->ctl_name = dev_name(&pdev->dev);
+        mci->scrub_mode = SCRUB_SW_SRC;
+        /* Only a single 4GB DIMM is supported */
+        dimm = *mci->dimms;
+        dimm->nr_pages = (~0UL >> PAGE_SHIFT) + 1;
+        dimm->grain = 8;
+        dimm->dtype = DEV_X8;
+        dimm->mtype = MEM_DDR3;
+        dimm->edac_mode = EDAC_SECDED;
+        res = edac_mc_add_mc(mci);
+        if (res < 0)
+                goto err;
+        highbank_mc_create_debugfs_nodes(mci);
+        devres_close_group(&pdev->dev, NULL);
+        return 0;
+err:
+        devres_release_group(&pdev->dev, NULL);
+        edac_mc_free(mci);
+        return res;
+}
+static int highbank_mc_remove(struct platform_device *pdev)
+{
+        struct mem_ctl_info *mci = platform_get_drvdata(pdev);
+        edac_mc_del_mc(&pdev->dev);
+        edac_mc_free(mci);
+        return 0;
+}
+static const struct of_device_id hb_ddr_ctrl_of_match[] = {
+        { .compatible = "calxeda,hb-ddr-ctrl", },
+        {},
+};
+MODULE_DEVICE_TABLE(of, hb_ddr_ctrl_of_match);
+static struct platform_driver highbank_mc_edac_driver = {
+        .probe = highbank_mc_probe,
+        .remove = highbank_mc_remove,
+        .driver = {
+                .name = "hb_mc_edac",
+                .of_match_table = hb_ddr_ctrl_of_match,
+        },
+};
+module_platform_driver(highbank_mc_edac_driver);
+MODULE_LICENSE("GPL v2");
+MODULE_AUTHOR("Calxeda, Inc.");
+MODULE_DESCRIPTION("EDAC Driver for Calxeda Highbank");
diff --git a/drivers/edac/i3000_edac.c b/drivers/edac/i3000_edac.c
index 8ad1744faacd..d3d19cc4e9a1 100644
--- a/drivers/edac/i3000_edac.c
+++ b/drivers/edac/i3000_edac.c
@@ -194,7 +194,7 @@ static void i3000_get_error_info(struct mem_ctl_info *mci,
 {
        struct pci_dev *pdev;
-        pdev = to_pci_dev(mci->dev);
+        pdev = to_pci_dev(mci->pdev);
        /*
         * This is a mess because there is no atomic way to read all the
@@ -236,7 +236,7 @@ static int i3000_process_error_info(struct mem_ctl_info *mci,
        int row, multi_chan, channel;
        unsigned long pfn, offset;
-        multi_chan = mci->csrows[0].nr_channels - 1;
+        multi_chan = mci->csrows[0]->nr_channels - 1;
        if (!(info->errsts & I3000_ERRSTS_BITS))
                return 0;
@@ -245,9 +245,9 @@ static int i3000_process_error_info(struct mem_ctl_info *mci,
                return 1;
        if ((info->errsts ^ info->errsts2) & I3000_ERRSTS_BITS) {
-                edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 0, 0, 0,
+                edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 1, 0, 0, 0,
                                     -1, -1, -1,
-                                     "UE overwrote CE", "", NULL);
+                                     "UE overwrote CE", "");
                info->errsts = info->errsts2;
        }
@@ -258,15 +258,15 @@ static int i3000_process_error_info(struct mem_ctl_info *mci,
        row = edac_mc_find_csrow_by_page(mci, pfn);
        if (info->errsts & I3000_ERRSTS_UE)
-                edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci,
+                edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 1,
                                     pfn, offset, 0,
                                     row, -1, -1,
-                                     "i3000 UE", "", NULL);
+                                     "i3000 UE", "");
        else
-                edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci,
+                edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, 1,
                                     pfn, offset, info->derrsyn,
                                     row, multi_chan ? channel : 0, -1,
-                                     "i3000 CE", "", NULL);
+                                     "i3000 CE", "");
        return 1;
 }
@@ -275,7 +275,7 @@ static void i3000_check(struct mem_ctl_info *mci)
 {
        struct i3000_error_info info;
-        debugf1("MC%d: %s()\n", mci->mc_idx, __func__);
+        edac_dbg(1, "MC%d\n", mci->mc_idx);
        i3000_get_error_info(mci, &info);
        i3000_process_error_info(mci, &info, 1);
 }
@@ -322,7 +322,7 @@ static int i3000_probe1(struct pci_dev *pdev, int dev_idx)
        unsigned long mchbar;
        void __iomem *window;
-        debugf0("MC: %s()\n", __func__);
+        edac_dbg(0, "MC:\n");
        pci_read_config_dword(pdev, I3000_MCHBAR, (u32 *) & mchbar);
        mchbar &= I3000_MCHBAR_MASK;
@@ -366,9 +366,9 @@ static int i3000_probe1(struct pci_dev *pdev, int dev_idx)
        if (!mci)
                return -ENOMEM;
-        debugf3("MC: %s(): init mci\n", __func__);
+        edac_dbg(3, "MC: init mci\n");
-        mci->dev = &pdev->dev;
+        mci->pdev = &pdev->dev;
        mci->mtype_cap = MEM_FLAG_DDR2;
        mci->edac_ctl_cap = EDAC_FLAG_SECDED;
@@ -393,14 +393,13 @@ static int i3000_probe1(struct pci_dev *pdev, int dev_idx)
        for (last_cumul_size = i = 0; i < mci->nr_csrows; i++) {
                u8 value;
                u32 cumul_size;
-                struct csrow_info *csrow = &mci->csrows[i];
+                struct csrow_info *csrow = mci->csrows[i];
                value = drb[i];
                cumul_size = value << (I3000_DRB_SHIFT - PAGE_SHIFT);
                if (interleaved)
                        cumul_size <<= 1;
-                debugf3("MC: %s(): (%d) cumul_size 0x%x\n",
+                edac_dbg(3, "MC: (%d) cumul_size 0x%x\n", i, cumul_size);
-                        __func__, i, cumul_size);
                if (cumul_size == last_cumul_size)
                        continue;
@@ -410,7 +409,7 @@ static int i3000_probe1(struct pci_dev *pdev, int dev_idx)
                last_cumul_size = cumul_size;
                for (j = 0; j < nr_channels; j++) {
-                        struct dimm_info *dimm = csrow->channels[j].dimm;
+                        struct dimm_info *dimm = csrow->channels[j]->dimm;
                        dimm->nr_pages = nr_pages / nr_channels;
                        dimm->grain = I3000_DEAP_GRAIN;
@@ -429,7 +428,7 @@ static int i3000_probe1(struct pci_dev *pdev, int dev_idx)
        rc = -ENODEV;
        if (edac_mc_add_mc(mci)) {
-                debugf3("MC: %s(): failed edac_mc_add_mc()\n", __func__);
+                edac_dbg(3, "MC: failed edac_mc_add_mc()\n");
                goto fail;
        }
@@ -445,7 +444,7 @@ static int i3000_probe1(struct pci_dev *pdev, int dev_idx)
        }
        /* get this far and it's successful */
-        debugf3("MC: %s(): success\n", __func__);
+        edac_dbg(3, "MC: success\n");
        return 0;
 fail:
@@ -461,7 +460,7 @@ static int __devinit i3000_init_one(struct pci_dev *pdev,
 {
        int rc;
-        debugf0("MC: %s()\n", __func__);
+        edac_dbg(0, "MC:\n");
        if (pci_enable_device(pdev) < 0)
                return -EIO;
@@ -477,7 +476,7 @@ static void __devexit i3000_remove_one(struct pci_dev *pdev)
 {
        struct mem_ctl_info *mci;
-        debugf0("%s()\n", __func__);
+        edac_dbg(0, "\n");
        if (i3000_pci)
                edac_pci_release_generic_ctl(i3000_pci);
@@ -511,7 +510,7 @@ static int __init i3000_init(void)
 {
        int pci_rc;
-        debugf3("MC: %s()\n", __func__);
+        edac_dbg(3, "MC:\n");
       /* Ensure that the OPSTATE is set correctly for POLL or NMI */
       opstate_init();
@@ -525,14 +524,14 @@ static int __init i3000_init(void)
                mci_pdev = pci_get_device(PCI_VENDOR_ID_INTEL,
                                        PCI_DEVICE_ID_INTEL_3000_HB, NULL);
                if (!mci_pdev) {
-                        debugf0("i3000 pci_get_device fail\n");
+                        edac_dbg(0, "i3000 pci_get_device fail\n");
                        pci_rc = -ENODEV;
                        goto fail1;
                }
                pci_rc = i3000_init_one(mci_pdev, i3000_pci_tbl);
                if (pci_rc < 0) {
-                        debugf0("i3000 init fail\n");
+                        edac_dbg(0, "i3000 init fail\n");
                        pci_rc = -ENODEV;
                        goto fail1;
                }
@@ -552,7 +551,7 @@ fail0:
 static void __exit i3000_exit(void)
 {
-        debugf3("MC: %s()\n", __func__);
+        edac_dbg(3, "MC:\n");
        pci_unregister_driver(&i3000_driver);
        if (!i3000_registered) {
diff --git a/drivers/edac/i3200_edac.c b/drivers/edac/i3200_edac.c
index bbe43ef71823..47180a08edad 100644
--- a/drivers/edac/i3200_edac.c
+++ b/drivers/edac/i3200_edac.c
@@ -110,10 +110,10 @@ static int how_many_channels(struct pci_dev *pdev)
        pci_read_config_byte(pdev, I3200_CAPID0 + 8, &capid0_8b);
        if (capid0_8b & 0x20) { /* check DCD: Dual Channel Disable */
-                debugf0("In single channel mode.\n");
+                edac_dbg(0, "In single channel mode\n");
                return 1;
        } else {
-                debugf0("In dual channel mode.\n");
+                edac_dbg(0, "In dual channel mode\n");
                return 2;
        }
 }
@@ -159,7 +159,7 @@ static void i3200_clear_error_info(struct mem_ctl_info *mci)
 {
        struct pci_dev *pdev;
-        pdev = to_pci_dev(mci->dev);
+        pdev = to_pci_dev(mci->pdev);
        /*
         * Clear any error bits.
@@ -176,7 +176,7 @@ static void i3200_get_and_clear_error_info(struct mem_ctl_info *mci,
        struct i3200_priv *priv = mci->pvt_info;
        void __iomem *window = priv->window;
-        pdev = to_pci_dev(mci->dev);
+        pdev = to_pci_dev(mci->pdev);
        /*
         * This is a mess because there is no atomic way to read all the
@@ -218,25 +218,25 @@ static void i3200_process_error_info(struct mem_ctl_info *mci,
                return;
        if ((info->errsts ^ info->errsts2) & I3200_ERRSTS_BITS) {
-                edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 0, 0, 0,
+                edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 1, 0, 0, 0,
-                                     -1, -1, -1, "UE overwrote CE", "", NULL);
+                                     -1, -1, -1, "UE overwrote CE", "");
                info->errsts = info->errsts2;
        }
        for (channel = 0; channel < nr_channels; channel++) {
                log = info->eccerrlog[channel];
                if (log & I3200_ECCERRLOG_UE) {
-                        edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci,
+                        edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 1,
                                             0, 0, 0,
                                             eccerrlog_row(channel, log),
                                             -1, -1,
-                                             "i3000 UE", "", NULL);
+                                             "i3000 UE", "");
                } else if (log & I3200_ECCERRLOG_CE) {
-                        edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci,
+                        edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 1,
                                             0, 0, eccerrlog_syndrome(log),
                                             eccerrlog_row(channel, log),
                                             -1, -1,
-                                             "i3000 UE", "", NULL);
+                                             "i3000 UE", "");
                }
        }
 }
@@ -245,7 +245,7 @@ static void i3200_check(struct mem_ctl_info *mci)
 {
        struct i3200_error_info info;
-        debugf1("MC%d: %s()\n", mci->mc_idx, __func__);
+        edac_dbg(1, "MC%d\n", mci->mc_idx);
        i3200_get_and_clear_error_info(mci, &info);
        i3200_process_error_info(mci, &info);
 }
@@ -332,7 +332,7 @@ static int i3200_probe1(struct pci_dev *pdev, int dev_idx)
        void __iomem *window;
        struct i3200_priv *priv;
-        debugf0("MC: %s()\n", __func__);
+        edac_dbg(0, "MC:\n");
        window = i3200_map_mchbar(pdev);
        if (!window)
@@ -352,9 +352,9 @@ static int i3200_probe1(struct pci_dev *pdev, int dev_idx)
        if (!mci)
                return -ENOMEM;
-        debugf3("MC: %s(): init mci\n", __func__);
+        edac_dbg(3, "MC: init mci\n");
-        mci->dev = &pdev->dev;
+        mci->pdev = &pdev->dev;
        mci->mtype_cap = MEM_FLAG_DDR2;
        mci->edac_ctl_cap = EDAC_FLAG_SECDED;
@@ -379,7 +379,7 @@ static int i3200_probe1(struct pci_dev *pdev, int dev_idx)
         */
        for (i = 0; i < mci->nr_csrows; i++) {
                unsigned long nr_pages;
-                struct csrow_info *csrow = &mci->csrows[i];
+                struct csrow_info *csrow = mci->csrows[i];
                nr_pages = drb_to_nr_pages(drbs, stacked,
                        i / I3200_RANKS_PER_CHANNEL,
@@ -389,7 +389,7 @@ static int i3200_probe1(struct pci_dev *pdev, int dev_idx)
                        continue;
                for (j = 0; j < nr_channels; j++) {
-                        struct dimm_info *dimm = csrow->channels[j].dimm;
+                        struct dimm_info *dimm = csrow->channels[j]->dimm;
                        dimm->nr_pages = nr_pages / nr_channels;
                        dimm->grain = nr_pages << PAGE_SHIFT;
@@ -403,12 +403,12 @@ static int i3200_probe1(struct pci_dev *pdev, int dev_idx)
        rc = -ENODEV;
        if (edac_mc_add_mc(mci)) {
-                debugf3("MC: %s(): failed edac_mc_add_mc()\n", __func__);
+                edac_dbg(3, "MC: failed edac_mc_add_mc()\n");
                goto fail;
        }
        /* get this far and it's successful */
-        debugf3("MC: %s(): success\n", __func__);
+        edac_dbg(3, "MC: success\n");
        return 0;
 fail:
@@ -424,7 +424,7 @@ static int __devinit i3200_init_one(struct pci_dev *pdev,
 {
        int rc;
-        debugf0("MC: %s()\n", __func__);
+        edac_dbg(0, "MC:\n");
        if (pci_enable_device(pdev) < 0)
                return -EIO;
@@ -441,7 +441,7 @@ static void __devexit i3200_remove_one(struct pci_dev *pdev)
        struct mem_ctl_info *mci;
        struct i3200_priv *priv;
-        debugf0("%s()\n", __func__);
+        edac_dbg(0, "\n");
        mci = edac_mc_del_mc(&pdev->dev);
        if (!mci)
@@ -475,7 +475,7 @@ static int __init i3200_init(void)
 {
        int pci_rc;
-        debugf3("MC: %s()\n", __func__);
+        edac_dbg(3, "MC:\n");
        /* Ensure that the OPSTATE is set correctly for POLL or NMI */
        opstate_init();
@@ -489,14 +489,14 @@ static int __init i3200_init(void)
                mci_pdev = pci_get_device(PCI_VENDOR_ID_INTEL,
                                PCI_DEVICE_ID_INTEL_3200_HB, NULL);
                if (!mci_pdev) {
-                        debugf0("i3200 pci_get_device fail\n");
+                        edac_dbg(0, "i3200 pci_get_device fail\n");
                        pci_rc = -ENODEV;
                        goto fail1;
                }
                pci_rc = i3200_init_one(mci_pdev, i3200_pci_tbl);
                if (pci_rc < 0) {
-                        debugf0("i3200 init fail\n");
+                        edac_dbg(0, "i3200 init fail\n");
                        pci_rc = -ENODEV;
                        goto fail1;
                }
@@ -516,7 +516,7 @@ fail0:
 static void __exit i3200_exit(void)
 {
-        debugf3("MC: %s()\n", __func__);
+        edac_dbg(3, "MC:\n");
        pci_unregister_driver(&i3200_driver);
        if (!i3200_registered) {
diff --git a/drivers/edac/i5000_edac.c b/drivers/edac/i5000_edac.c
index 11ea835f155a..39c63757c2a1 100644
--- a/drivers/edac/i5000_edac.c
+++ b/drivers/edac/i5000_edac.c
@@ -273,7 +273,7 @@
 #define CHANNELS_PER_BRANCH     2
 #define MAX_BRANCHES            2
-/* Defines to extract the vaious fields from the
+/* Defines to extract the various fields from the
 *      MTRx - Memory Technology Registers
 */
 #define MTR_DIMMS_PRESENT(mtr)          ((mtr) & (0x1 << 8))
@@ -287,22 +287,6 @@
 #define MTR_DIMM_COLS(mtr)              ((mtr) & 0x3)
 #define MTR_DIMM_COLS_ADDR_BITS(mtr)    (MTR_DIMM_COLS(mtr) + 10)
-#ifdef CONFIG_EDAC_DEBUG
-static char *numrow_toString[] = {
-        "8,192 - 13 rows",
-        "16,384 - 14 rows",
-        "32,768 - 15 rows",
-        "reserved"
-};
-static char *numcol_toString[] = {
-        "1,024 - 10 columns",
-        "2,048 - 11 columns",
-        "4,096 - 12 columns",
-        "reserved"
-};
-#endif
 /* enables the report of miscellaneous messages as CE errors - default off */
 static int misc_messages;
@@ -344,7 +328,13 @@ struct i5000_pvt {
        struct pci_dev *branch_1;       /* 22.0 */
        u16 tolm;               /* top of low memory */
-        u64 ambase;             /* AMB BAR */
+        union {
+                u64 ambase;             /* AMB BAR */
+                struct {
+                        u32 ambase_bottom;
+                        u32 ambase_top;
+                } u __packed;
+        };
        u16 mir0, mir1, mir2;
@@ -494,10 +484,9 @@ static void i5000_process_fatal_error_info(struct mem_ctl_info *mci,
        ras = NREC_RAS(info->nrecmemb);
        cas = NREC_CAS(info->nrecmemb);
-        debugf0("\t\tCSROW= %d  Channel= %d "
+        edac_dbg(0, "\t\tCSROW= %d  Channel= %d (DRAM Bank= %d rdwr= %s ras= %d cas= %d)\n",
-                "(DRAM Bank= %d rdwr= %s ras= %d cas= %d)\n",
+                 rank, channel, bank,
-                rank, channel, bank,
+                 rdwr ? "Write" : "Read", ras, cas);
-                rdwr ? "Write" : "Read", ras, cas);
        /* Only 1 bit will be on */
        switch (allErrors) {
@@ -536,10 +525,10 @@ static void i5000_process_fatal_error_info(struct mem_ctl_info *mci,
                 bank, ras, cas, allErrors, specific);
        /* Call the helper to output message */
-        edac_mc_handle_error(HW_EVENT_ERR_FATAL, mci, 0, 0, 0,
+        edac_mc_handle_error(HW_EVENT_ERR_FATAL, mci, 1, 0, 0, 0,
                             channel >> 1, channel & 1, rank,
                             rdwr ? "Write error" : "Read error",
-                             msg, NULL);
+                             msg);
 }
 /*
@@ -574,7 +563,7 @@ static void i5000_process_nonfatal_error_info(struct mem_ctl_info *mci,
        /* ONLY ONE of the possible error bits will be set, as per the docs */
        ue_errors = allErrors & FERR_NF_UNCORRECTABLE;
        if (ue_errors) {
-                debugf0("\tUncorrected bits= 0x%x\n", ue_errors);
+                edac_dbg(0, "\tUncorrected bits= 0x%x\n", ue_errors);
                branch = EXTRACT_FBDCHAN_INDX(info->ferr_nf_fbd);
@@ -590,11 +579,9 @@ static void i5000_process_nonfatal_error_info(struct mem_ctl_info *mci,
                ras = NREC_RAS(info->nrecmemb);
                cas = NREC_CAS(info->nrecmemb);
-                debugf0
+                edac_dbg(0, "\t\tCSROW= %d  Channels= %d,%d  (Branch= %d DRAM Bank= %d rdwr= %s ras= %d cas= %d)\n",
-                        ("\t\tCSROW= %d  Channels= %d,%d  (Branch= %d "
+                         rank, channel, channel + 1, branch >> 1, bank,
-                        "DRAM Bank= %d rdwr= %s ras= %d cas= %d)\n",
+                         rdwr ? "Write" : "Read", ras, cas);
-                        rank, channel, channel + 1, branch >> 1, bank,
-                        rdwr ? "Write" : "Read", ras, cas);
                switch (ue_errors) {
                case FERR_NF_M12ERR:
@@ -637,16 +624,16 @@ static void i5000_process_nonfatal_error_info(struct mem_ctl_info *mci,
                         rank, bank, ras, cas, ue_errors, specific);
                /* Call the helper to output message */
-                edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 0, 0, 0,
+                edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 1, 0, 0, 0,
                                channel >> 1, -1, rank,
                                rdwr ? "Write error" : "Read error",
-                                msg, NULL);
+                                msg);
        }
        /* Check correctable errors */
        ce_errors = allErrors & FERR_NF_CORRECTABLE;
        if (ce_errors) {
-                debugf0("\tCorrected bits= 0x%x\n", ce_errors);
+                edac_dbg(0, "\tCorrected bits= 0x%x\n", ce_errors);
                branch = EXTRACT_FBDCHAN_INDX(info->ferr_nf_fbd);
@@ -664,10 +651,9 @@ static void i5000_process_nonfatal_error_info(struct mem_ctl_info *mci,
                ras = REC_RAS(info->recmemb);
                cas = REC_CAS(info->recmemb);
-                debugf0("\t\tCSROW= %d Channel= %d  (Branch %d "
+                edac_dbg(0, "\t\tCSROW= %d Channel= %d  (Branch %d DRAM Bank= %d rdwr= %s ras= %d cas= %d)\n",
-                        "DRAM Bank= %d rdwr= %s ras= %d cas= %d)\n",
+                         rank, channel, branch >> 1, bank,
-                        rank, channel, branch >> 1, bank,
+                         rdwr ? "Write" : "Read", ras, cas);
-                        rdwr ? "Write" : "Read", ras, cas);
                switch (ce_errors) {
                case FERR_NF_M17ERR:
@@ -692,10 +678,10 @@ static void i5000_process_nonfatal_error_info(struct mem_ctl_info *mci,
                         specific);
                /* Call the helper to output message */
-                edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, 0, 0, 0,
+                edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, 1, 0, 0, 0,
                                channel >> 1, channel % 2, rank,
                                rdwr ? "Write error" : "Read error",
-                                msg, NULL);
+                                msg);
        }
        if (!misc_messages)
@@ -738,9 +724,9 @@ static void i5000_process_nonfatal_error_info(struct mem_ctl_info *mci,
                         "Err=%#x (%s)", misc_errors, specific);
                /* Call the helper to output message */
-                edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, 0, 0, 0,
+                edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, 1, 0, 0, 0,
                                branch >> 1, -1, -1,
-                                "Misc error", msg, NULL);
+                                "Misc error", msg);
        }
 }
@@ -779,7 +765,7 @@ static void i5000_clear_error(struct mem_ctl_info *mci)
 static void i5000_check_error(struct mem_ctl_info *mci)
 {
        struct i5000_error_info info;
-        debugf4("MC%d: %s: %s()\n", mci->mc_idx, __FILE__, __func__);
+        edac_dbg(4, "MC%d\n", mci->mc_idx);
        i5000_get_error_info(mci, &info);
        i5000_process_error_info(mci, &info, 1);
 }
@@ -850,15 +836,16 @@ static int i5000_get_devices(struct mem_ctl_info *mci, int dev_idx)
        pvt->fsb_error_regs = pdev;
-        debugf1("System Address, processor bus- PCI Bus ID: %s  %x:%x\n",
+        edac_dbg(1, "System Address, processor bus- PCI Bus ID: %s  %x:%x\n",
-                pci_name(pvt->system_address),
+                 pci_name(pvt->system_address),
-                pvt->system_address->vendor, pvt->system_address->device);
+                 pvt->system_address->vendor, pvt->system_address->device);
-        debugf1("Branchmap, control and errors - PCI Bus ID: %s  %x:%x\n",
+        edac_dbg(1, "Branchmap, control and errors - PCI Bus ID: %s  %x:%x\n",
-                pci_name(pvt->branchmap_werrors),
+                 pci_name(pvt->branchmap_werrors),
-                pvt->branchmap_werrors->vendor, pvt->branchmap_werrors->device);
+                 pvt->branchmap_werrors->vendor,
-        debugf1("FSB Error Regs - PCI Bus ID: %s  %x:%x\n",
+                 pvt->branchmap_werrors->device);
-                pci_name(pvt->fsb_error_regs),
+        edac_dbg(1, "FSB Error Regs - PCI Bus ID: %s  %x:%x\n",
-                pvt->fsb_error_regs->vendor, pvt->fsb_error_regs->device);
+                 pci_name(pvt->fsb_error_regs),
+                 pvt->fsb_error_regs->vendor, pvt->fsb_error_regs->device);
        pdev = NULL;
        pdev = pci_get_device(PCI_VENDOR_ID_INTEL,
@@ -981,16 +968,25 @@ static void decode_mtr(int slot_row, u16 mtr)
        ans = MTR_DIMMS_PRESENT(mtr);
-        debugf2("\tMTR%d=0x%x:  DIMMs are %s\n", slot_row, mtr,
+        edac_dbg(2, "\tMTR%d=0x%x:  DIMMs are %sPresent\n",
-                ans ? "Present" : "NOT Present");
+                 slot_row, mtr, ans ? "" : "NOT ");
        if (!ans)
                return;
-        debugf2("\t\tWIDTH: x%d\n", MTR_DRAM_WIDTH(mtr));
+        edac_dbg(2, "\t\tWIDTH: x%d\n", MTR_DRAM_WIDTH(mtr));
-        debugf2("\t\tNUMBANK: %d bank(s)\n", MTR_DRAM_BANKS(mtr));
+        edac_dbg(2, "\t\tNUMBANK: %d bank(s)\n", MTR_DRAM_BANKS(mtr));
-        debugf2("\t\tNUMRANK: %s\n", MTR_DIMM_RANK(mtr) ? "double" : "single");
+        edac_dbg(2, "\t\tNUMRANK: %s\n",
-        debugf2("\t\tNUMROW: %s\n", numrow_toString[MTR_DIMM_ROWS(mtr)]);
+                 MTR_DIMM_RANK(mtr) ? "double" : "single");
-        debugf2("\t\tNUMCOL: %s\n", numcol_toString[MTR_DIMM_COLS(mtr)]);
+        edac_dbg(2, "\t\tNUMROW: %s\n",
+                 MTR_DIMM_ROWS(mtr) == 0 ? "8,192 - 13 rows" :
+                 MTR_DIMM_ROWS(mtr) == 1 ? "16,384 - 14 rows" :
+                 MTR_DIMM_ROWS(mtr) == 2 ? "32,768 - 15 rows" :
+                 "reserved");
+        edac_dbg(2, "\t\tNUMCOL: %s\n",
+                 MTR_DIMM_COLS(mtr) == 0 ? "1,024 - 10 columns" :
+                 MTR_DIMM_COLS(mtr) == 1 ? "2,048 - 11 columns" :
+                 MTR_DIMM_COLS(mtr) == 2 ? "4,096 - 12 columns" :
+                 "reserved");
 }
 static void handle_channel(struct i5000_pvt *pvt, int slot, int channel,
@@ -1061,7 +1057,7 @@ static void calculate_dimm_size(struct i5000_pvt *pvt)
                                "--------------------------------");
                        p += n;
                        space -= n;
-                        debugf2("%s\n", mem_buffer);
+                        edac_dbg(2, "%s\n", mem_buffer);
                        p = mem_buffer;
                        space = PAGE_SIZE;
                }
@@ -1082,7 +1078,7 @@ static void calculate_dimm_size(struct i5000_pvt *pvt)
                }
                p += n;
                space -= n;
-                debugf2("%s\n", mem_buffer);
+                edac_dbg(2, "%s\n", mem_buffer);
                p = mem_buffer;
                space = PAGE_SIZE;
        }
@@ -1092,7 +1088,7 @@ static void calculate_dimm_size(struct i5000_pvt *pvt)
                "--------------------------------");
        p += n;
        space -= n;
-        debugf2("%s\n", mem_buffer);
+        edac_dbg(2, "%s\n", mem_buffer);
        p = mem_buffer;
        space = PAGE_SIZE;
@@ -1105,7 +1101,7 @@ static void calculate_dimm_size(struct i5000_pvt *pvt)
                p += n;
                space -= n;
        }
-        debugf2("%s\n", mem_buffer);
+        edac_dbg(2, "%s\n", mem_buffer);
        p = mem_buffer;
        space = PAGE_SIZE;
@@ -1118,7 +1114,7 @@ static void calculate_dimm_size(struct i5000_pvt *pvt)
        }
        /* output the last message and free buffer */
-        debugf2("%s\n", mem_buffer);
+        edac_dbg(2, "%s\n", mem_buffer);
        kfree(mem_buffer);
 }
@@ -1141,24 +1137,25 @@ static void i5000_get_mc_regs(struct mem_ctl_info *mci)
        pvt = mci->pvt_info;
        pci_read_config_dword(pvt->system_address, AMBASE,
-                        (u32 *) & pvt->ambase);
+                        &pvt->u.ambase_bottom);
        pci_read_config_dword(pvt->system_address, AMBASE + sizeof(u32),
-                        ((u32 *) & pvt->ambase) + sizeof(u32));
+                        &pvt->u.ambase_top);
        maxdimmperch = pvt->maxdimmperch;
        maxch = pvt->maxch;
-        debugf2("AMBASE= 0x%lx  MAXCH= %d  MAX-DIMM-Per-CH= %d\n",
+        edac_dbg(2, "AMBASE= 0x%lx  MAXCH= %d  MAX-DIMM-Per-CH= %d\n",
-                (long unsigned int)pvt->ambase, pvt->maxch, pvt->maxdimmperch);
+                 (long unsigned int)pvt->ambase, pvt->maxch, pvt->maxdimmperch);
        /* Get the Branch Map regs */
        pci_read_config_word(pvt->branchmap_werrors, TOLM, &pvt->tolm);
        pvt->tolm >>= 12;
-        debugf2("\nTOLM (number of 256M regions) =%u (0x%x)\n", pvt->tolm,
+        edac_dbg(2, "TOLM (number of 256M regions) =%u (0x%x)\n",
-                pvt->tolm);
+                 pvt->tolm, pvt->tolm);
        actual_tolm = pvt->tolm << 28;
-        debugf2("Actual TOLM byte addr=%u (0x%x)\n", actual_tolm, actual_tolm);
+        edac_dbg(2, "Actual TOLM byte addr=%u (0x%x)\n",
+                 actual_tolm, actual_tolm);
        pci_read_config_word(pvt->branchmap_werrors, MIR0, &pvt->mir0);
        pci_read_config_word(pvt->branchmap_werrors, MIR1, &pvt->mir1);
@@ -1168,15 +1165,18 @@ static void i5000_get_mc_regs(struct mem_ctl_info *mci)
        limit = (pvt->mir0 >> 4) & 0x0FFF;
        way0 = pvt->mir0 & 0x1;
        way1 = pvt->mir0 & 0x2;
-        debugf2("MIR0: limit= 0x%x  WAY1= %u  WAY0= %x\n", limit, way1, way0);
+        edac_dbg(2, "MIR0: limit= 0x%x  WAY1= %u  WAY0= %x\n",
+                 limit, way1, way0);
        limit = (pvt->mir1 >> 4) & 0x0FFF;
        way0 = pvt->mir1 & 0x1;
        way1 = pvt->mir1 & 0x2;
-        debugf2("MIR1: limit= 0x%x  WAY1= %u  WAY0= %x\n", limit, way1, way0);
+        edac_dbg(2, "MIR1: limit= 0x%x  WAY1= %u  WAY0= %x\n",
+                 limit, way1, way0);
        limit = (pvt->mir2 >> 4) & 0x0FFF;
        way0 = pvt->mir2 & 0x1;
        way1 = pvt->mir2 & 0x2;
-        debugf2("MIR2: limit= 0x%x  WAY1= %u  WAY0= %x\n", limit, way1, way0);
+        edac_dbg(2, "MIR2: limit= 0x%x  WAY1= %u  WAY0= %x\n",
+                 limit, way1, way0);
        /* Get the MTR[0-3] regs */
        for (slot_row = 0; slot_row < NUM_MTRS; slot_row++) {
@@ -1185,31 +1185,31 @@ static void i5000_get_mc_regs(struct mem_ctl_info *mci)
                pci_read_config_word(pvt->branch_0, where,
                                &pvt->b0_mtr[slot_row]);
-                debugf2("MTR%d where=0x%x B0 value=0x%x\n", slot_row, where,
+                edac_dbg(2, "MTR%d where=0x%x B0 value=0x%x\n",
-                        pvt->b0_mtr[slot_row]);
+                         slot_row, where, pvt->b0_mtr[slot_row]);
                if (pvt->maxch >= CHANNELS_PER_BRANCH) {
                        pci_read_config_word(pvt->branch_1, where,
                                        &pvt->b1_mtr[slot_row]);
-                        debugf2("MTR%d where=0x%x B1 value=0x%x\n", slot_row,
+                        edac_dbg(2, "MTR%d where=0x%x B1 value=0x%x\n",
-                                where, pvt->b1_mtr[slot_row]);
+                                 slot_row, where, pvt->b1_mtr[slot_row]);
                } else {
                        pvt->b1_mtr[slot_row] = 0;
                }
        }
        /* Read and dump branch 0's MTRs */
-        debugf2("\nMemory Technology Registers:\n");
+        edac_dbg(2, "Memory Technology Registers:\n");
-        debugf2("   Branch 0:\n");
+        edac_dbg(2, "   Branch 0:\n");
        for (slot_row = 0; slot_row < NUM_MTRS; slot_row++) {
                decode_mtr(slot_row, pvt->b0_mtr[slot_row]);
        }
        pci_read_config_word(pvt->branch_0, AMB_PRESENT_0,
                        &pvt->b0_ambpresent0);
-        debugf2("\t\tAMB-Branch 0-present0 0x%x:\n", pvt->b0_ambpresent0);
+        edac_dbg(2, "\t\tAMB-Branch 0-present0 0x%x:\n", pvt->b0_ambpresent0);
        pci_read_config_word(pvt->branch_0, AMB_PRESENT_1,
                        &pvt->b0_ambpresent1);
-        debugf2("\t\tAMB-Branch 0-present1 0x%x:\n", pvt->b0_ambpresent1);
+        edac_dbg(2, "\t\tAMB-Branch 0-present1 0x%x:\n", pvt->b0_ambpresent1);
        /* Only if we have 2 branchs (4 channels) */
        if (pvt->maxch < CHANNELS_PER_BRANCH) {
@@ -1217,18 +1217,18 @@ static void i5000_get_mc_regs(struct mem_ctl_info *mci)
                pvt->b1_ambpresent1 = 0;
        } else {
                /* Read and dump  branch 1's MTRs */
-                debugf2("   Branch 1:\n");
+                edac_dbg(2, "   Branch 1:\n");
                for (slot_row = 0; slot_row < NUM_MTRS; slot_row++) {
                        decode_mtr(slot_row, pvt->b1_mtr[slot_row]);
                }
                pci_read_config_word(pvt->branch_1, AMB_PRESENT_0,
                                &pvt->b1_ambpresent0);
-                debugf2("\t\tAMB-Branch 1-present0 0x%x:\n",
+                edac_dbg(2, "\t\tAMB-Branch 1-present0 0x%x:\n",
-                        pvt->b1_ambpresent0);
+                         pvt->b1_ambpresent0);
                pci_read_config_word(pvt->branch_1, AMB_PRESENT_1,
                                &pvt->b1_ambpresent1);
-                debugf2("\t\tAMB-Branch 1-present1 0x%x:\n",
+                edac_dbg(2, "\t\tAMB-Branch 1-present1 0x%x:\n",
-                        pvt->b1_ambpresent1);
+                         pvt->b1_ambpresent1);
        }
        /* Go and determine the size of each DIMM and place in an
@@ -1363,10 +1363,9 @@ static int i5000_probe1(struct pci_dev *pdev, int dev_idx)
        int num_channels;
        int num_dimms_per_channel;
-        debugf0("MC: %s: %s(), pdev bus %u dev=0x%x fn=0x%x\n",
+        edac_dbg(0, "MC: pdev bus %u dev=0x%x fn=0x%x\n",
-                __FILE__, __func__,
+                 pdev->bus->number,
-                pdev->bus->number,
+                 PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn));
-                PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn));
        /* We only are looking for func 0 of the set */
        if (PCI_FUNC(pdev->devfn) != 0)
@@ -1388,8 +1387,8 @@ static int i5000_probe1(struct pci_dev *pdev, int dev_idx)
        i5000_get_dimm_and_channel_counts(pdev, &num_dimms_per_channel,
                                        &num_channels);
-        debugf0("MC: %s(): Number of Branches=2 Channels= %d  DIMMS= %d\n",
+        edac_dbg(0, "MC: Number of Branches=2 Channels= %d  DIMMS= %d\n",
-                __func__, num_channels, num_dimms_per_channel);
+                 num_channels, num_dimms_per_channel);
        /* allocate a new MC control structure */
@@ -1406,10 +1405,9 @@ static int i5000_probe1(struct pci_dev *pdev, int dev_idx)
        if (mci == NULL)
                return -ENOMEM;
-        kobject_get(&mci->edac_mci_kobj);
+        edac_dbg(0, "MC: mci = %p\n", mci);
-        debugf0("MC: %s: %s(): mci = %p\n", __FILE__, __func__, mci);
-        mci->dev = &pdev->dev;  /* record ptr  to the generic device */
+        mci->pdev = &pdev->dev; /* record ptr  to the generic device */
        pvt = mci->pvt_info;
        pvt->system_address = pdev;     /* Record this device in our private */
@@ -1439,19 +1437,16 @@ static int i5000_probe1(struct pci_dev *pdev, int dev_idx)
        /* initialize the MC control structure 'csrows' table
         * with the mapping and control information */
        if (i5000_init_csrows(mci)) {
-                debugf0("MC: Setting mci->edac_cap to EDAC_FLAG_NONE\n"
+                edac_dbg(0, "MC: Setting mci->edac_cap to EDAC_FLAG_NONE because i5000_init_csrows() returned nonzero value\n");
-                        "    because i5000_init_csrows() returned nonzero "
-                        "value\n");
                mci->edac_cap = EDAC_FLAG_NONE; /* no csrows found */
        } else {
-                debugf1("MC: Enable error reporting now\n");
+                edac_dbg(1, "MC: Enable error reporting now\n");
                i5000_enable_error_reporting(mci);
        }
        /* add this new MC control structure to EDAC's list of MCs */
        if (edac_mc_add_mc(mci)) {
-                debugf0("MC: %s: %s(): failed edac_mc_add_mc()\n",
+                edac_dbg(0, "MC: failed edac_mc_add_mc()\n");
-                        __FILE__, __func__);
                /* FIXME: perhaps some code should go here that disables error
                 * reporting if we just enabled it
                 */
@@ -1479,7 +1474,6 @@ fail1:
        i5000_put_devices(mci);
 fail0:
-        kobject_put(&mci->edac_mci_kobj);
        edac_mc_free(mci);
        return -ENODEV;
 }
@@ -1496,7 +1490,7 @@ static int __devinit i5000_init_one(struct pci_dev *pdev,
 {
        int rc;
-        debugf0("MC: %s: %s()\n", __FILE__, __func__);
+        edac_dbg(0, "MC:\n");
        /* wake up device */
        rc = pci_enable_device(pdev);
@@ -1515,7 +1509,7 @@ static void __devexit i5000_remove_one(struct pci_dev *pdev)
 {
        struct mem_ctl_info *mci;
-        debugf0("%s: %s()\n", __FILE__, __func__);
+        edac_dbg(0, "\n");
        if (i5000_pci)
                edac_pci_release_generic_ctl(i5000_pci);
@@ -1525,7 +1519,6 @@ static void __devexit i5000_remove_one(struct pci_dev *pdev)
        /* retrieve references to resources, and free those resources */
        i5000_put_devices(mci);
-        kobject_put(&mci->edac_mci_kobj);
        edac_mc_free(mci);
 }
@@ -1562,7 +1555,7 @@ static int __init i5000_init(void)
 {
        int pci_rc;
-        debugf2("MC: %s: %s()\n", __FILE__, __func__);
+        edac_dbg(2, "MC:\n");
       /* Ensure that the OPSTATE is set correctly for POLL or NMI */
       opstate_init();
@@ -1578,7 +1571,7 @@ static int __init i5000_init(void)
 */
 static void __exit i5000_exit(void)
 {
-        debugf2("MC: %s: %s()\n", __FILE__, __func__);
+        edac_dbg(2, "MC:\n");
        pci_unregister_driver(&i5000_driver);
 }
diff --git a/drivers/edac/i5100_edac.c b/drivers/edac/i5100_edac.c
index e9e7c2a29dc3..c4b5e5f868e8 100644
--- a/drivers/edac/i5100_edac.c
+++ b/drivers/edac/i5100_edac.c
@@ -431,10 +431,10 @@ static void i5100_handle_ce(struct mem_ctl_info *mci,
                 "bank %u, cas %u, ras %u\n",
                 bank, cas, ras);
-        edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci,
+        edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, 1,
                             0, 0, syndrome,
                             chan, rank, -1,
-                             msg, detail, NULL);
+                             msg, detail);
 }
 static void i5100_handle_ue(struct mem_ctl_info *mci,
@@ -453,10 +453,10 @@ static void i5100_handle_ue(struct mem_ctl_info *mci,
                 "bank %u, cas %u, ras %u\n",
                 bank, cas, ras);
-        edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci,
+        edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 1,
                             0, 0, syndrome,
                             chan, rank, -1,
-                             msg, detail, NULL);
+                             msg, detail);
 }
 static void i5100_read_log(struct mem_ctl_info *mci, int chan,
@@ -859,8 +859,8 @@ static void __devinit i5100_init_csrows(struct mem_ctl_info *mci)
                                i5100_rank_to_slot(mci, chan, rank));
                }
-                debugf2("dimm channel %d, rank %d, size %ld\n",
+                edac_dbg(2, "dimm channel %d, rank %d, size %ld\n",
-                        chan, rank, (long)PAGES_TO_MiB(npages));
+                         chan, rank, (long)PAGES_TO_MiB(npages));
        }
 }
@@ -943,7 +943,7 @@ static int __devinit i5100_init_one(struct pci_dev *pdev,
                goto bail_disable_ch1;
        }
-        mci->dev = &pdev->dev;
+        mci->pdev = &pdev->dev;
        priv = mci->pvt_info;
        priv->ranksperchan = ranksperch;
diff --git a/drivers/edac/i5400_edac.c b/drivers/edac/i5400_edac.c
index 6640c29e1885..277246998b80 100644
--- a/drivers/edac/i5400_edac.c
+++ b/drivers/edac/i5400_edac.c
@@ -300,24 +300,6 @@ static inline int extract_fbdchan_indx(u32 x)
        return (x>>28) & 0x3;
 }
-#ifdef CONFIG_EDAC_DEBUG
-/* MTR NUMROW */
-static const char *numrow_toString[] = {
-        "8,192 - 13 rows",
-        "16,384 - 14 rows",
-        "32,768 - 15 rows",
-        "65,536 - 16 rows"
-};
-/* MTR NUMCOL */
-static const char *numcol_toString[] = {
-        "1,024 - 10 columns",
-        "2,048 - 11 columns",
-        "4,096 - 12 columns",
-        "reserved"
-};
-#endif
 /* Device name and register DID (Device ID) */
 struct i5400_dev_info {
        const char *ctl_name;   /* name for this device */
@@ -345,7 +327,13 @@ struct i5400_pvt {
        struct pci_dev *branch_1;               /* 22.0 */
        u16 tolm;                               /* top of low memory */
-        u64 ambase;                             /* AMB BAR */
+        union {
+                u64 ambase;                             /* AMB BAR */
+                struct {
+                        u32 ambase_bottom;
+                        u32 ambase_top;
+                } u __packed;
+        };
        u16 mir0, mir1;
@@ -560,10 +548,9 @@ static void i5400_proccess_non_recoverable_info(struct mem_ctl_info *mci,
        ras = nrec_ras(info);
        cas = nrec_cas(info);
-        debugf0("\t\tDIMM= %d  Channels= %d,%d  (Branch= %d "
+        edac_dbg(0, "\t\tDIMM= %d  Channels= %d,%d  (Branch= %d DRAM Bank= %d Buffer ID = %d rdwr= %s ras= %d cas= %d)\n",
-                "DRAM Bank= %d Buffer ID = %d rdwr= %s ras= %d cas= %d)\n",
+                 rank, channel, channel + 1, branch >> 1, bank,
-                rank, channel, channel + 1, branch >> 1, bank,
+                 buf_id, rdwr_str(rdwr), ras, cas);
-                buf_id, rdwr_str(rdwr), ras, cas);
        /* Only 1 bit will be on */
        errnum = find_first_bit(&allErrors, ARRAY_SIZE(error_name));
@@ -573,10 +560,10 @@ static void i5400_proccess_non_recoverable_info(struct mem_ctl_info *mci,
                 "Bank=%d Buffer ID = %d RAS=%d CAS=%d Err=0x%lx (%s)",
                 bank, buf_id, ras, cas, allErrors, error_name[errnum]);
-        edac_mc_handle_error(tp_event, mci, 0, 0, 0,
+        edac_mc_handle_error(tp_event, mci, 1, 0, 0, 0,
                             branch >> 1, -1, rank,
                             rdwr ? "Write error" : "Read error",
-                             msg, NULL);
+                             msg);
 }
 /*
@@ -613,7 +600,7 @@ static void i5400_process_nonfatal_error_info(struct mem_ctl_info *mci,
        /* Correctable errors */
        if (allErrors & ERROR_NF_CORRECTABLE) {
-                debugf0("\tCorrected bits= 0x%lx\n", allErrors);
+                edac_dbg(0, "\tCorrected bits= 0x%lx\n", allErrors);
                branch = extract_fbdchan_indx(info->ferr_nf_fbd);
@@ -634,10 +621,9 @@ static void i5400_process_nonfatal_error_info(struct mem_ctl_info *mci,
                /* Only 1 bit will be on */
                errnum = find_first_bit(&allErrors, ARRAY_SIZE(error_name));
-                debugf0("\t\tDIMM= %d Channel= %d  (Branch %d "
+                edac_dbg(0, "\t\tDIMM= %d Channel= %d  (Branch %d DRAM Bank= %d rdwr= %s ras= %d cas= %d)\n",
-                        "DRAM Bank= %d rdwr= %s ras= %d cas= %d)\n",
+                         rank, channel, branch >> 1, bank,
-                        rank, channel, branch >> 1, bank,
+                         rdwr_str(rdwr), ras, cas);
-                        rdwr_str(rdwr), ras, cas);
                /* Form out message */
                snprintf(msg, sizeof(msg),
@@ -646,10 +632,10 @@ static void i5400_process_nonfatal_error_info(struct mem_ctl_info *mci,
                         branch >> 1, bank, rdwr_str(rdwr), ras, cas,
                         allErrors, error_name[errnum]);
-                edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, 0, 0, 0,
+                edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, 1, 0, 0, 0,
                                     branch >> 1, channel % 2, rank,
                                     rdwr ? "Write error" : "Read error",
-                                     msg, NULL);
+                                     msg);
                return;
        }
@@ -700,7 +686,7 @@ static void i5400_clear_error(struct mem_ctl_info *mci)
 static void i5400_check_error(struct mem_ctl_info *mci)
 {
        struct i5400_error_info info;
-        debugf4("MC%d: %s: %s()\n", mci->mc_idx, __FILE__, __func__);
+        edac_dbg(4, "MC%d\n", mci->mc_idx);
        i5400_get_error_info(mci, &info);
        i5400_process_error_info(mci, &info);
 }
@@ -786,15 +772,16 @@ static int i5400_get_devices(struct mem_ctl_info *mci, int dev_idx)
        }
        pvt->fsb_error_regs = pdev;
-        debugf1("System Address, processor bus- PCI Bus ID: %s  %x:%x\n",
+        edac_dbg(1, "System Address, processor bus- PCI Bus ID: %s  %x:%x\n",
-                pci_name(pvt->system_address),
+                 pci_name(pvt->system_address),
-                pvt->system_address->vendor, pvt->system_address->device);
+                 pvt->system_address->vendor, pvt->system_address->device);
-        debugf1("Branchmap, control and errors - PCI Bus ID: %s  %x:%x\n",
+        edac_dbg(1, "Branchmap, control and errors - PCI Bus ID: %s  %x:%x\n",
-                pci_name(pvt->branchmap_werrors),
+                 pci_name(pvt->branchmap_werrors),
-                pvt->branchmap_werrors->vendor, pvt->branchmap_werrors->device);
+                 pvt->branchmap_werrors->vendor,
-        debugf1("FSB Error Regs - PCI Bus ID: %s  %x:%x\n",
+                 pvt->branchmap_werrors->device);
-                pci_name(pvt->fsb_error_regs),
+        edac_dbg(1, "FSB Error Regs - PCI Bus ID: %s  %x:%x\n",
-                pvt->fsb_error_regs->vendor, pvt->fsb_error_regs->device);
+                 pci_name(pvt->fsb_error_regs),
+                 pvt->fsb_error_regs->vendor, pvt->fsb_error_regs->device);
        pvt->branch_0 = pci_get_device(PCI_VENDOR_ID_INTEL,
                                       PCI_DEVICE_ID_INTEL_5400_FBD0, NULL);
@@ -882,8 +869,8 @@ static int determine_mtr(struct i5400_pvt *pvt, int dimm, int channel)
        n = dimm;
        if (n >= DIMMS_PER_CHANNEL) {
-                debugf0("ERROR: trying to access an invalid dimm: %d\n",
+                edac_dbg(0, "ERROR: trying to access an invalid dimm: %d\n",
-                        dimm);
+                         dimm);
                return 0;
        }
@@ -903,20 +890,29 @@ static void decode_mtr(int slot_row, u16 mtr)
        ans = MTR_DIMMS_PRESENT(mtr);
-        debugf2("\tMTR%d=0x%x:  DIMMs are %s\n", slot_row, mtr,
+        edac_dbg(2, "\tMTR%d=0x%x:  DIMMs are %sPresent\n",
-                ans ? "Present" : "NOT Present");
+                 slot_row, mtr, ans ? "" : "NOT ");
        if (!ans)
                return;
-        debugf2("\t\tWIDTH: x%d\n", MTR_DRAM_WIDTH(mtr));
+        edac_dbg(2, "\t\tWIDTH: x%d\n", MTR_DRAM_WIDTH(mtr));
-        debugf2("\t\tELECTRICAL THROTTLING is %s\n",
+        edac_dbg(2, "\t\tELECTRICAL THROTTLING is %s\n",
-                MTR_DIMMS_ETHROTTLE(mtr) ? "enabled" : "disabled");
+                 MTR_DIMMS_ETHROTTLE(mtr) ? "enabled" : "disabled");
-        debugf2("\t\tNUMBANK: %d bank(s)\n", MTR_DRAM_BANKS(mtr));
+        edac_dbg(2, "\t\tNUMBANK: %d bank(s)\n", MTR_DRAM_BANKS(mtr));
-        debugf2("\t\tNUMRANK: %s\n", MTR_DIMM_RANK(mtr) ? "double" : "single");
+        edac_dbg(2, "\t\tNUMRANK: %s\n",
-        debugf2("\t\tNUMROW: %s\n", numrow_toString[MTR_DIMM_ROWS(mtr)]);
+                 MTR_DIMM_RANK(mtr) ? "double" : "single");
-        debugf2("\t\tNUMCOL: %s\n", numcol_toString[MTR_DIMM_COLS(mtr)]);
+        edac_dbg(2, "\t\tNUMROW: %s\n",
+                 MTR_DIMM_ROWS(mtr) == 0 ? "8,192 - 13 rows" :
+                 MTR_DIMM_ROWS(mtr) == 1 ? "16,384 - 14 rows" :
+                 MTR_DIMM_ROWS(mtr) == 2 ? "32,768 - 15 rows" :
+                 "65,536 - 16 rows");
+        edac_dbg(2, "\t\tNUMCOL: %s\n",
+                 MTR_DIMM_COLS(mtr) == 0 ? "1,024 - 10 columns" :
+                 MTR_DIMM_COLS(mtr) == 1 ? "2,048 - 11 columns" :
+                 MTR_DIMM_COLS(mtr) == 2 ? "4,096 - 12 columns" :
+                 "reserved");
 }
 static void handle_channel(struct i5400_pvt *pvt, int dimm, int channel,
@@ -989,7 +985,7 @@ static void calculate_dimm_size(struct i5400_pvt *pvt)
                                        "-------------------------------");
                        p += n;
                        space -= n;
-                        debugf2("%s\n", mem_buffer);
+                        edac_dbg(2, "%s\n", mem_buffer);
                        p = mem_buffer;
                        space = PAGE_SIZE;
                }
@@ -1004,7 +1000,7 @@ static void calculate_dimm_size(struct i5400_pvt *pvt)
                        p += n;
                        space -= n;
                }
-                debugf2("%s\n", mem_buffer);
+                edac_dbg(2, "%s\n", mem_buffer);
                p = mem_buffer;
                space = PAGE_SIZE;
        }
@@ -1014,7 +1010,7 @@ static void calculate_dimm_size(struct i5400_pvt *pvt)
                        "-------------------------------");
        p += n;
        space -= n;
-        debugf2("%s\n", mem_buffer);
+        edac_dbg(2, "%s\n", mem_buffer);
        p = mem_buffer;
        space = PAGE_SIZE;
@@ -1029,7 +1025,7 @@ static void calculate_dimm_size(struct i5400_pvt *pvt)
        }
        space -= n;
-        debugf2("%s\n", mem_buffer);
+        edac_dbg(2, "%s\n", mem_buffer);
        p = mem_buffer;
        space = PAGE_SIZE;
@@ -1042,7 +1038,7 @@ static void calculate_dimm_size(struct i5400_pvt *pvt)
        }
        /* output the last message and free buffer */
-        debugf2("%s\n", mem_buffer);
+        edac_dbg(2, "%s\n", mem_buffer);
        kfree(mem_buffer);
 }
@@ -1065,25 +1061,25 @@ static void i5400_get_mc_regs(struct mem_ctl_info *mci)
        pvt = mci->pvt_info;
        pci_read_config_dword(pvt->system_address, AMBASE,
-                        (u32 *) &pvt->ambase);
+                        &pvt->u.ambase_bottom);
        pci_read_config_dword(pvt->system_address, AMBASE + sizeof(u32),
-                        ((u32 *) &pvt->ambase) + sizeof(u32));
+                        &pvt->u.ambase_top);
        maxdimmperch = pvt->maxdimmperch;
        maxch = pvt->maxch;
-        debugf2("AMBASE= 0x%lx  MAXCH= %d  MAX-DIMM-Per-CH= %d\n",
+        edac_dbg(2, "AMBASE= 0x%lx  MAXCH= %d  MAX-DIMM-Per-CH= %d\n",
-                (long unsigned int)pvt->ambase, pvt->maxch, pvt->maxdimmperch);
+                 (long unsigned int)pvt->ambase, pvt->maxch, pvt->maxdimmperch);
        /* Get the Branch Map regs */
        pci_read_config_word(pvt->branchmap_werrors, TOLM, &pvt->tolm);
        pvt->tolm >>= 12;
-        debugf2("\nTOLM (number of 256M regions) =%u (0x%x)\n", pvt->tolm,
+        edac_dbg(2, "\nTOLM (number of 256M regions) =%u (0x%x)\n",
-                pvt->tolm);
+                 pvt->tolm, pvt->tolm);
        actual_tolm = (u32) ((1000l * pvt->tolm) >> (30 - 28));
-        debugf2("Actual TOLM byte addr=%u.%03u GB (0x%x)\n",
+        edac_dbg(2, "Actual TOLM byte addr=%u.%03u GB (0x%x)\n",
-                actual_tolm/1000, actual_tolm % 1000, pvt->tolm << 28);
+                 actual_tolm/1000, actual_tolm % 1000, pvt->tolm << 28);
        pci_read_config_word(pvt->branchmap_werrors, MIR0, &pvt->mir0);
        pci_read_config_word(pvt->branchmap_werrors, MIR1, &pvt->mir1);
@@ -1092,11 +1088,13 @@ static void i5400_get_mc_regs(struct mem_ctl_info *mci)
        limit = (pvt->mir0 >> 4) & 0x0fff;
        way0 = pvt->mir0 & 0x1;
        way1 = pvt->mir0 & 0x2;
-        debugf2("MIR0: limit= 0x%x  WAY1= %u  WAY0= %x\n", limit, way1, way0);
+        edac_dbg(2, "MIR0: limit= 0x%x  WAY1= %u  WAY0= %x\n",
+                 limit, way1, way0);
        limit = (pvt->mir1 >> 4) & 0xfff;
        way0 = pvt->mir1 & 0x1;
        way1 = pvt->mir1 & 0x2;
-        debugf2("MIR1: limit= 0x%x  WAY1= %u  WAY0= %x\n", limit, way1, way0);
+        edac_dbg(2, "MIR1: limit= 0x%x  WAY1= %u  WAY0= %x\n",
+                 limit, way1, way0);
        /* Get the set of MTR[0-3] regs by each branch */
        for (slot_row = 0; slot_row < DIMMS_PER_CHANNEL; slot_row++) {
@@ -1106,8 +1104,8 @@ static void i5400_get_mc_regs(struct mem_ctl_info *mci)
                pci_read_config_word(pvt->branch_0, where,
                                &pvt->b0_mtr[slot_row]);
-                debugf2("MTR%d where=0x%x B0 value=0x%x\n", slot_row, where,
+                edac_dbg(2, "MTR%d where=0x%x B0 value=0x%x\n",
-                        pvt->b0_mtr[slot_row]);
+                         slot_row, where, pvt->b0_mtr[slot_row]);
                if (pvt->maxch < CHANNELS_PER_BRANCH) {
                        pvt->b1_mtr[slot_row] = 0;
@@ -1117,22 +1115,22 @@ static void i5400_get_mc_regs(struct mem_ctl_info *mci)
                /* Branch 1 set of MTR registers */
                pci_read_config_word(pvt->branch_1, where,
                                &pvt->b1_mtr[slot_row]);
-                debugf2("MTR%d where=0x%x B1 value=0x%x\n", slot_row, where,
+                edac_dbg(2, "MTR%d where=0x%x B1 value=0x%x\n",
-                        pvt->b1_mtr[slot_row]);
+                         slot_row, where, pvt->b1_mtr[slot_row]);
        }
        /* Read and dump branch 0's MTRs */
-        debugf2("\nMemory Technology Registers:\n");
+        edac_dbg(2, "Memory Technology Registers:\n");
-        debugf2("   Branch 0:\n");
+        edac_dbg(2, "   Branch 0:\n");
        for (slot_row = 0; slot_row < DIMMS_PER_CHANNEL; slot_row++)
                decode_mtr(slot_row, pvt->b0_mtr[slot_row]);
        pci_read_config_word(pvt->branch_0, AMBPRESENT_0,
                        &pvt->b0_ambpresent0);
-        debugf2("\t\tAMB-Branch 0-present0 0x%x:\n", pvt->b0_ambpresent0);
+        edac_dbg(2, "\t\tAMB-Branch 0-present0 0x%x:\n", pvt->b0_ambpresent0);
        pci_read_config_word(pvt->branch_0, AMBPRESENT_1,
                        &pvt->b0_ambpresent1);
-        debugf2("\t\tAMB-Branch 0-present1 0x%x:\n", pvt->b0_ambpresent1);
+        edac_dbg(2, "\t\tAMB-Branch 0-present1 0x%x:\n", pvt->b0_ambpresent1);
        /* Only if we have 2 branchs (4 channels) */
        if (pvt->maxch < CHANNELS_PER_BRANCH) {
@@ -1140,18 +1138,18 @@ static void i5400_get_mc_regs(struct mem_ctl_info *mci)
                pvt->b1_ambpresent1 = 0;
        } else {
                /* Read and dump  branch 1's MTRs */
-                debugf2("   Branch 1:\n");
+                edac_dbg(2, "   Branch 1:\n");
                for (slot_row = 0; slot_row < DIMMS_PER_CHANNEL; slot_row++)
                        decode_mtr(slot_row, pvt->b1_mtr[slot_row]);
                pci_read_config_word(pvt->branch_1, AMBPRESENT_0,
                                &pvt->b1_ambpresent0);
-                debugf2("\t\tAMB-Branch 1-present0 0x%x:\n",
+                edac_dbg(2, "\t\tAMB-Branch 1-present0 0x%x:\n",
-                        pvt->b1_ambpresent0);
+                         pvt->b1_ambpresent0);
                pci_read_config_word(pvt->branch_1, AMBPRESENT_1,
                                &pvt->b1_ambpresent1);
-                debugf2("\t\tAMB-Branch 1-present1 0x%x:\n",
+                edac_dbg(2, "\t\tAMB-Branch 1-present1 0x%x:\n",
-                        pvt->b1_ambpresent1);
+                         pvt->b1_ambpresent1);
        }
        /* Go and determine the size of each DIMM and place in an
@@ -1203,10 +1201,9 @@ static int i5400_init_dimms(struct mem_ctl_info *mci)
                        size_mb =  pvt->dimm_info[slot][channel].megabytes;
-                        debugf2("%s: dimm%zd (branch %d channel %d slot %d): %d.%03d GB\n",
+                        edac_dbg(2, "dimm (branch %d channel %d slot %d): %d.%03d GB\n",
-                                __func__, dimm - mci->dimms,
+                                 channel / 2, channel % 2, slot,
-                                channel / 2, channel % 2, slot,
+                                 size_mb / 1000, size_mb % 1000);
-                                size_mb / 1000, size_mb % 1000);
                        dimm->nr_pages = size_mb << 8;
                        dimm->grain = 8;
@@ -1227,7 +1224,7 @@ static int i5400_init_dimms(struct mem_ctl_info *mci)
         * With such single-DIMM mode, the SDCC algorithm degrades to SECDEC+.
         */
        if (ndimms == 1)
-                mci->dimms[0].edac_mode = EDAC_SECDED;
+                mci->dimms[0]->edac_mode = EDAC_SECDED;
        return (ndimms == 0);
 }
@@ -1270,10 +1267,9 @@ static int i5400_probe1(struct pci_dev *pdev, int dev_idx)
        if (dev_idx >= ARRAY_SIZE(i5400_devs))
                return -EINVAL;
-        debugf0("MC: %s: %s(), pdev bus %u dev=0x%x fn=0x%x\n",
+        edac_dbg(0, "MC: pdev bus %u dev=0x%x fn=0x%x\n",
-                __FILE__, __func__,
+                 pdev->bus->number,
-                pdev->bus->number,
+                 PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn));
-                PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn));
        /* We only are looking for func 0 of the set */
        if (PCI_FUNC(pdev->devfn) != 0)
@@ -1297,9 +1293,9 @@ static int i5400_probe1(struct pci_dev *pdev, int dev_idx)
        if (mci == NULL)
                return -ENOMEM;
-        debugf0("MC: %s: %s(): mci = %p\n", __FILE__, __func__, mci);
+        edac_dbg(0, "MC: mci = %p\n", mci);
-        mci->dev = &pdev->dev;  /* record ptr  to the generic device */
+        mci->pdev = &pdev->dev; /* record ptr  to the generic device */
        pvt = mci->pvt_info;
        pvt->system_address = pdev;     /* Record this device in our private */
@@ -1329,19 +1325,16 @@ static int i5400_probe1(struct pci_dev *pdev, int dev_idx)
        /* initialize the MC control structure 'dimms' table
         * with the mapping and control information */
        if (i5400_init_dimms(mci)) {
-                debugf0("MC: Setting mci->edac_cap to EDAC_FLAG_NONE\n"
+                edac_dbg(0, "MC: Setting mci->edac_cap to EDAC_FLAG_NONE because i5400_init_dimms() returned nonzero value\n");
-                        "    because i5400_init_dimms() returned nonzero "
-                        "value\n");
                mci->edac_cap = EDAC_FLAG_NONE; /* no dimms found */
        } else {
-                debugf1("MC: Enable error reporting now\n");
+                edac_dbg(1, "MC: Enable error reporting now\n");
                i5400_enable_error_reporting(mci);
        }
        /* add this new MC control structure to EDAC's list of MCs */
        if (edac_mc_add_mc(mci)) {
-                debugf0("MC: %s: %s(): failed edac_mc_add_mc()\n",
+                edac_dbg(0, "MC: failed edac_mc_add_mc()\n");
-                        __FILE__, __func__);
                /* FIXME: perhaps some code should go here that disables error
                 * reporting if we just enabled it
                 */
@@ -1385,7 +1378,7 @@ static int __devinit i5400_init_one(struct pci_dev *pdev,
 {
        int rc;
-        debugf0("MC: %s: %s()\n", __FILE__, __func__);
+        edac_dbg(0, "MC:\n");
        /* wake up device */
        rc = pci_enable_device(pdev);
@@ -1404,7 +1397,7 @@ static void __devexit i5400_remove_one(struct pci_dev *pdev)
 {
        struct mem_ctl_info *mci;
-        debugf0("%s: %s()\n", __FILE__, __func__);
+        edac_dbg(0, "\n");
        if (i5400_pci)
                edac_pci_release_generic_ctl(i5400_pci);
@@ -1450,7 +1443,7 @@ static int __init i5400_init(void)
 {
        int pci_rc;
-        debugf2("MC: %s: %s()\n", __FILE__, __func__);
+        edac_dbg(2, "MC:\n");
        /* Ensure that the OPSTATE is set correctly for POLL or NMI */
        opstate_init();
@@ -1466,7 +1459,7 @@ static int __init i5400_init(void)
 */
 static void __exit i5400_exit(void)
 {
-        debugf2("MC: %s: %s()\n", __FILE__, __func__);
+        edac_dbg(2, "MC:\n");
        pci_unregister_driver(&i5400_driver);
 }
diff --git a/drivers/edac/i7300_edac.c b/drivers/edac/i7300_edac.c
index 97c22fd650ee..a09d0667f72a 100644
--- a/drivers/edac/i7300_edac.c
+++ b/drivers/edac/i7300_edac.c
@@ -182,24 +182,6 @@ static const u16 mtr_regs[MAX_SLOTS] = {
 #define MTR_DIMM_COLS(mtr)              ((mtr) & 0x3)
 #define MTR_DIMM_COLS_ADDR_BITS(mtr)    (MTR_DIMM_COLS(mtr) + 10)
-#ifdef CONFIG_EDAC_DEBUG
-/* MTR NUMROW */
-static const char *numrow_toString[] = {
-        "8,192 - 13 rows",
-        "16,384 - 14 rows",
-        "32,768 - 15 rows",
-        "65,536 - 16 rows"
-};
-/* MTR NUMCOL */
-static const char *numcol_toString[] = {
-        "1,024 - 10 columns",
-        "2,048 - 11 columns",
-        "4,096 - 12 columns",
-        "reserved"
-};
-#endif
 /************************************************
 * i7300 Register definitions for error detection
 ************************************************/
@@ -467,10 +449,10 @@ static void i7300_process_fbd_error(struct mem_ctl_info *mci)
                         "Bank=%d RAS=%d CAS=%d Err=0x%lx (%s))",
                         bank, ras, cas, errors, specific);
-                edac_mc_handle_error(HW_EVENT_ERR_FATAL, mci, 0, 0, 0,
+                edac_mc_handle_error(HW_EVENT_ERR_FATAL, mci, 1, 0, 0, 0,
                                     branch, -1, rank,
                                     is_wr ? "Write error" : "Read error",
-                                     pvt->tmp_prt_buffer, NULL);
+                                     pvt->tmp_prt_buffer);
        }
@@ -513,11 +495,11 @@ static void i7300_process_fbd_error(struct mem_ctl_info *mci)
                         "DRAM-Bank=%d RAS=%d CAS=%d, Err=0x%lx (%s))",
                         bank, ras, cas, errors, specific);
-                edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, 0, 0,
+                edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, 1, 0, 0,
                                     syndrome,
                                     branch >> 1, channel % 2, rank,
                                     is_wr ? "Write error" : "Read error",
-                                     pvt->tmp_prt_buffer, NULL);
+                                     pvt->tmp_prt_buffer);
        }
        return;
 }
@@ -614,9 +596,8 @@ static int decode_mtr(struct i7300_pvt *pvt,
        mtr = pvt->mtr[slot][branch];
        ans = MTR_DIMMS_PRESENT(mtr) ? 1 : 0;
-        debugf2("\tMTR%d CH%d: DIMMs are %s (mtr)\n",
+        edac_dbg(2, "\tMTR%d CH%d: DIMMs are %sPresent (mtr)\n",
-                slot, channel,
+                 slot, channel, ans ? "" : "NOT ");
-                ans ? "Present" : "NOT Present");
        /* Determine if there is a DIMM present in this DIMM slot */
        if (!ans)
@@ -638,16 +619,25 @@ static int decode_mtr(struct i7300_pvt *pvt,
        dinfo->megabytes = 1 << addrBits;
-        debugf2("\t\tWIDTH: x%d\n", MTR_DRAM_WIDTH(mtr));
+        edac_dbg(2, "\t\tWIDTH: x%d\n", MTR_DRAM_WIDTH(mtr));
-        debugf2("\t\tELECTRICAL THROTTLING is %s\n",
+        edac_dbg(2, "\t\tELECTRICAL THROTTLING is %s\n",
-                MTR_DIMMS_ETHROTTLE(mtr) ? "enabled" : "disabled");
+                 MTR_DIMMS_ETHROTTLE(mtr) ? "enabled" : "disabled");
-        debugf2("\t\tNUMBANK: %d bank(s)\n", MTR_DRAM_BANKS(mtr));
+        edac_dbg(2, "\t\tNUMBANK: %d bank(s)\n", MTR_DRAM_BANKS(mtr));
-        debugf2("\t\tNUMRANK: %s\n", MTR_DIMM_RANKS(mtr) ? "double" : "single");
+        edac_dbg(2, "\t\tNUMRANK: %s\n",
-        debugf2("\t\tNUMROW: %s\n", numrow_toString[MTR_DIMM_ROWS(mtr)]);
+                 MTR_DIMM_RANKS(mtr) ? "double" : "single");
-        debugf2("\t\tNUMCOL: %s\n", numcol_toString[MTR_DIMM_COLS(mtr)]);
+        edac_dbg(2, "\t\tNUMROW: %s\n",
-        debugf2("\t\tSIZE: %d MB\n", dinfo->megabytes);
+                 MTR_DIMM_ROWS(mtr) == 0 ? "8,192 - 13 rows" :
+                 MTR_DIMM_ROWS(mtr) == 1 ? "16,384 - 14 rows" :
+                 MTR_DIMM_ROWS(mtr) == 2 ? "32,768 - 15 rows" :
+                 "65,536 - 16 rows");
+        edac_dbg(2, "\t\tNUMCOL: %s\n",
+                 MTR_DIMM_COLS(mtr) == 0 ? "1,024 - 10 columns" :
+                 MTR_DIMM_COLS(mtr) == 1 ? "2,048 - 11 columns" :
+                 MTR_DIMM_COLS(mtr) == 2 ? "4,096 - 12 columns" :
+                 "reserved");
+        edac_dbg(2, "\t\tSIZE: %d MB\n", dinfo->megabytes);
        /*
         * The type of error detection actually depends of the
@@ -663,9 +653,9 @@ static int decode_mtr(struct i7300_pvt *pvt,
        dimm->mtype = MEM_FB_DDR2;
        if (IS_SINGLE_MODE(pvt->mc_settings_a)) {
                dimm->edac_mode = EDAC_SECDED;
-                debugf2("\t\tECC code is 8-byte-over-32-byte SECDED+ code\n");
+                edac_dbg(2, "\t\tECC code is 8-byte-over-32-byte SECDED+ code\n");
        } else {
-                debugf2("\t\tECC code is on Lockstep mode\n");
+                edac_dbg(2, "\t\tECC code is on Lockstep mode\n");
                if (MTR_DRAM_WIDTH(mtr) == 8)
                        dimm->edac_mode = EDAC_S8ECD8ED;
                else
@@ -674,9 +664,9 @@ static int decode_mtr(struct i7300_pvt *pvt,
        /* ask what device type on this row */
        if (MTR_DRAM_WIDTH(mtr) == 8) {
-                debugf2("\t\tScrub algorithm for x8 is on %s mode\n",
+                edac_dbg(2, "\t\tScrub algorithm for x8 is on %s mode\n",
-                        IS_SCRBALGO_ENHANCED(pvt->mc_settings) ?
+                         IS_SCRBALGO_ENHANCED(pvt->mc_settings) ?
-                                            "enhanced" : "normal");
+                         "enhanced" : "normal");
                dimm->dtype = DEV_X8;
        } else
@@ -710,14 +700,14 @@ static void print_dimm_size(struct i7300_pvt *pvt)
                p += n;
                space -= n;
        }
-        debugf2("%s\n", pvt->tmp_prt_buffer);
+        edac_dbg(2, "%s\n", pvt->tmp_prt_buffer);
        p = pvt->tmp_prt_buffer;
        space = PAGE_SIZE;
        n = snprintf(p, space, "-------------------------------"
                               "------------------------------");
        p += n;
        space -= n;
-        debugf2("%s\n", pvt->tmp_prt_buffer);
+        edac_dbg(2, "%s\n", pvt->tmp_prt_buffer);
        p = pvt->tmp_prt_buffer;
        space = PAGE_SIZE;
@@ -733,7 +723,7 @@ static void print_dimm_size(struct i7300_pvt *pvt)
                        space -= n;
                }
-                debugf2("%s\n", pvt->tmp_prt_buffer);
+                edac_dbg(2, "%s\n", pvt->tmp_prt_buffer);
                p = pvt->tmp_prt_buffer;
                space = PAGE_SIZE;
        }
@@ -742,7 +732,7 @@ static void print_dimm_size(struct i7300_pvt *pvt)
                               "------------------------------");
        p += n;
        space -= n;
-        debugf2("%s\n", pvt->tmp_prt_buffer);
+        edac_dbg(2, "%s\n", pvt->tmp_prt_buffer);
        p = pvt->tmp_prt_buffer;
        space = PAGE_SIZE;
 #endif
@@ -765,7 +755,7 @@ static int i7300_init_csrows(struct mem_ctl_info *mci)
        pvt = mci->pvt_info;
-        debugf2("Memory Technology Registers:\n");
+        edac_dbg(2, "Memory Technology Registers:\n");
        /* Get the AMB present registers for the four channels */
        for (branch = 0; branch < MAX_BRANCHES; branch++) {
@@ -774,15 +764,15 @@ static int i7300_init_csrows(struct mem_ctl_info *mci)
                pci_read_config_word(pvt->pci_dev_2x_0_fbd_branch[branch],
                                     AMBPRESENT_0,
                                &pvt->ambpresent[channel]);
-                debugf2("\t\tAMB-present CH%d = 0x%x:\n",
+                edac_dbg(2, "\t\tAMB-present CH%d = 0x%x:\n",
-                        channel, pvt->ambpresent[channel]);
+                         channel, pvt->ambpresent[channel]);
                channel = to_channel(1, branch);
                pci_read_config_word(pvt->pci_dev_2x_0_fbd_branch[branch],
                                     AMBPRESENT_1,
                                &pvt->ambpresent[channel]);
-                debugf2("\t\tAMB-present CH%d = 0x%x:\n",
+                edac_dbg(2, "\t\tAMB-present CH%d = 0x%x:\n",
-                        channel, pvt->ambpresent[channel]);
+                         channel, pvt->ambpresent[channel]);
        }
        /* Get the set of MTR[0-7] regs by each branch */
@@ -824,12 +814,11 @@ static int i7300_init_csrows(struct mem_ctl_info *mci)
 static void decode_mir(int mir_no, u16 mir[MAX_MIR])
 {
        if (mir[mir_no] & 3)
-                debugf2("MIR%d: limit= 0x%x Branch(es) that participate:"
+                edac_dbg(2, "MIR%d: limit= 0x%x Branch(es) that participate: %s %s\n",
-                        " %s %s\n",
+                         mir_no,
-                        mir_no,
+                         (mir[mir_no] >> 4) & 0xfff,
-                        (mir[mir_no] >> 4) & 0xfff,
+                         (mir[mir_no] & 1) ? "B0" : "",
-                        (mir[mir_no] & 1) ? "B0" : "",
+                         (mir[mir_no] & 2) ? "B1" : "");
-                        (mir[mir_no] & 2) ? "B1" : "");
 }
 /**
@@ -849,17 +838,17 @@ static int i7300_get_mc_regs(struct mem_ctl_info *mci)
        pci_read_config_dword(pvt->pci_dev_16_0_fsb_ctlr, AMBASE,
                        (u32 *) &pvt->ambase);
-        debugf2("AMBASE= 0x%lx\n", (long unsigned int)pvt->ambase);
+        edac_dbg(2, "AMBASE= 0x%lx\n", (long unsigned int)pvt->ambase);
        /* Get the Branch Map regs */
        pci_read_config_word(pvt->pci_dev_16_1_fsb_addr_map, TOLM, &pvt->tolm);
        pvt->tolm >>= 12;
-        debugf2("TOLM (number of 256M regions) =%u (0x%x)\n", pvt->tolm,
+        edac_dbg(2, "TOLM (number of 256M regions) =%u (0x%x)\n",
-                pvt->tolm);
+                 pvt->tolm, pvt->tolm);
        actual_tolm = (u32) ((1000l * pvt->tolm) >> (30 - 28));
-        debugf2("Actual TOLM byte addr=%u.%03u GB (0x%x)\n",
+        edac_dbg(2, "Actual TOLM byte addr=%u.%03u GB (0x%x)\n",
-                actual_tolm/1000, actual_tolm % 1000, pvt->tolm << 28);
+                 actual_tolm/1000, actual_tolm % 1000, pvt->tolm << 28);
        /* Get memory controller settings */
        pci_read_config_dword(pvt->pci_dev_16_1_fsb_addr_map, MC_SETTINGS,
@@ -868,15 +857,15 @@ static int i7300_get_mc_regs(struct mem_ctl_info *mci)
                             &pvt->mc_settings_a);
        if (IS_SINGLE_MODE(pvt->mc_settings_a))
-                debugf0("Memory controller operating on single mode\n");
+                edac_dbg(0, "Memory controller operating on single mode\n");
        else
-                debugf0("Memory controller operating on %s mode\n",
+                edac_dbg(0, "Memory controller operating on %smirrored mode\n",
-                IS_MIRRORED(pvt->mc_settings) ? "mirrored" : "non-mirrored");
+                         IS_MIRRORED(pvt->mc_settings) ? "" : "non-");
-        debugf0("Error detection is %s\n",
+        edac_dbg(0, "Error detection is %s\n",
-                IS_ECC_ENABLED(pvt->mc_settings) ? "enabled" : "disabled");
+                 IS_ECC_ENABLED(pvt->mc_settings) ? "enabled" : "disabled");
-        debugf0("Retry is %s\n",
+        edac_dbg(0, "Retry is %s\n",
-                IS_RETRY_ENABLED(pvt->mc_settings) ? "enabled" : "disabled");
+                 IS_RETRY_ENABLED(pvt->mc_settings) ? "enabled" : "disabled");
        /* Get Memory Interleave Range registers */
        pci_read_config_word(pvt->pci_dev_16_1_fsb_addr_map, MIR0,
@@ -970,18 +959,18 @@ static int __devinit i7300_get_devices(struct mem_ctl_info *mci)
                }
        }
-        debugf1("System Address, processor bus- PCI Bus ID: %s  %x:%x\n",
+        edac_dbg(1, "System Address, processor bus- PCI Bus ID: %s  %x:%x\n",
-                pci_name(pvt->pci_dev_16_0_fsb_ctlr),
+                 pci_name(pvt->pci_dev_16_0_fsb_ctlr),
-                pvt->pci_dev_16_0_fsb_ctlr->vendor,
+                 pvt->pci_dev_16_0_fsb_ctlr->vendor,
-                pvt->pci_dev_16_0_fsb_ctlr->device);
+                 pvt->pci_dev_16_0_fsb_ctlr->device);
-        debugf1("Branchmap, control and errors - PCI Bus ID: %s  %x:%x\n",
+        edac_dbg(1, "Branchmap, control and errors - PCI Bus ID: %s  %x:%x\n",
-                pci_name(pvt->pci_dev_16_1_fsb_addr_map),
+                 pci_name(pvt->pci_dev_16_1_fsb_addr_map),
-                pvt->pci_dev_16_1_fsb_addr_map->vendor,
+                 pvt->pci_dev_16_1_fsb_addr_map->vendor,
-                pvt->pci_dev_16_1_fsb_addr_map->device);
+                 pvt->pci_dev_16_1_fsb_addr_map->device);
-        debugf1("FSB Error Regs - PCI Bus ID: %s  %x:%x\n",
+        edac_dbg(1, "FSB Error Regs - PCI Bus ID: %s  %x:%x\n",
-                pci_name(pvt->pci_dev_16_2_fsb_err_regs),
+                 pci_name(pvt->pci_dev_16_2_fsb_err_regs),
-                pvt->pci_dev_16_2_fsb_err_regs->vendor,
+                 pvt->pci_dev_16_2_fsb_err_regs->vendor,
-                pvt->pci_dev_16_2_fsb_err_regs->device);
+                 pvt->pci_dev_16_2_fsb_err_regs->device);
        pvt->pci_dev_2x_0_fbd_branch[0] = pci_get_device(PCI_VENDOR_ID_INTEL,
                                            PCI_DEVICE_ID_INTEL_I7300_MCH_FB0,
@@ -1032,10 +1021,9 @@ static int __devinit i7300_init_one(struct pci_dev *pdev,
        if (rc == -EIO)
                return rc;
-        debugf0("MC: " __FILE__ ": %s(), pdev bus %u dev=0x%x fn=0x%x\n",
+        edac_dbg(0, "MC: pdev bus %u dev=0x%x fn=0x%x\n",
-                __func__,
+                 pdev->bus->number,
-                pdev->bus->number,
+                 PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn));
-                PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn));
        /* We only are looking for func 0 of the set */
        if (PCI_FUNC(pdev->devfn) != 0)
@@ -1055,9 +1043,9 @@ static int __devinit i7300_init_one(struct pci_dev *pdev,
        if (mci == NULL)
                return -ENOMEM;
-        debugf0("MC: " __FILE__ ": %s(): mci = %p\n", __func__, mci);
+        edac_dbg(0, "MC: mci = %p\n", mci);
-        mci->dev = &pdev->dev;  /* record ptr  to the generic device */
+        mci->pdev = &pdev->dev; /* record ptr  to the generic device */
        pvt = mci->pvt_info;
        pvt->pci_dev_16_0_fsb_ctlr = pdev;      /* Record this device in our private */
@@ -1088,19 +1076,16 @@ static int __devinit i7300_init_one(struct pci_dev *pdev,
        /* initialize the MC control structure 'csrows' table
         * with the mapping and control information */
        if (i7300_get_mc_regs(mci)) {
-                debugf0("MC: Setting mci->edac_cap to EDAC_FLAG_NONE\n"
+                edac_dbg(0, "MC: Setting mci->edac_cap to EDAC_FLAG_NONE because i7300_init_csrows() returned nonzero value\n");
-                        "    because i7300_init_csrows() returned nonzero "
-                        "value\n");
                mci->edac_cap = EDAC_FLAG_NONE; /* no csrows found */
        } else {
-                debugf1("MC: Enable error reporting now\n");
+                edac_dbg(1, "MC: Enable error reporting now\n");
                i7300_enable_error_reporting(mci);
        }
        /* add this new MC control structure to EDAC's list of MCs */
        if (edac_mc_add_mc(mci)) {
-                debugf0("MC: " __FILE__
+                edac_dbg(0, "MC: failed edac_mc_add_mc()\n");
-                        ": %s(): failed edac_mc_add_mc()\n", __func__);
                /* FIXME: perhaps some code should go here that disables error
                 * reporting if we just enabled it
                 */
@@ -1142,7 +1127,7 @@ static void __devexit i7300_remove_one(struct pci_dev *pdev)
        struct mem_ctl_info *mci;
        char *tmp;
-        debugf0(__FILE__ ": %s()\n", __func__);
+        edac_dbg(0, "\n");
        if (i7300_pci)
                edac_pci_release_generic_ctl(i7300_pci);
@@ -1189,7 +1174,7 @@ static int __init i7300_init(void)
 {
        int pci_rc;
-        debugf2("MC: " __FILE__ ": %s()\n", __func__);
+        edac_dbg(2, "\n");
        /* Ensure that the OPSTATE is set correctly for POLL or NMI */
        opstate_init();
@@ -1204,7 +1189,7 @@ static int __init i7300_init(void)
 */
 static void __exit i7300_exit(void)
 {
-        debugf2("MC: " __FILE__ ": %s()\n", __func__);
+        edac_dbg(2, "\n");
        pci_unregister_driver(&i7300_driver);
 }
diff --git a/drivers/edac/i7core_edac.c b/drivers/edac/i7core_edac.c
index d27778f65a5d..3672101023bd 100644
--- a/drivers/edac/i7core_edac.c
+++ b/drivers/edac/i7core_edac.c
@@ -248,6 +248,8 @@ struct i7core_dev {
 };
 struct i7core_pvt {
+        struct device *addrmatch_dev, *chancounts_dev;
        struct pci_dev  *pci_noncore;
        struct pci_dev  *pci_mcr[MAX_MCR_FUNC + 1];
        struct pci_dev  *pci_ch[NUM_CHANS][MAX_CHAN_FUNC + 1];
@@ -514,29 +516,28 @@ static int get_dimm_config(struct mem_ctl_info *mci)
        pci_read_config_dword(pdev, MC_MAX_DOD, &pvt->info.max_dod);
        pci_read_config_dword(pdev, MC_CHANNEL_MAPPER, &pvt->info.ch_map);
-        debugf0("QPI %d control=0x%08x status=0x%08x dod=0x%08x map=0x%08x\n",
+        edac_dbg(0, "QPI %d control=0x%08x status=0x%08x dod=0x%08x map=0x%08x\n",
-                pvt->i7core_dev->socket, pvt->info.mc_control, pvt->info.mc_status,
+                 pvt->i7core_dev->socket, pvt->info.mc_control,
-                pvt->info.max_dod, pvt->info.ch_map);
+                 pvt->info.mc_status, pvt->info.max_dod, pvt->info.ch_map);
        if (ECC_ENABLED(pvt)) {
-                debugf0("ECC enabled with x%d SDCC\n", ECCx8(pvt) ? 8 : 4);
+                edac_dbg(0, "ECC enabled with x%d SDCC\n", ECCx8(pvt) ? 8 : 4);
                if (ECCx8(pvt))
                        mode = EDAC_S8ECD8ED;
                else
                        mode = EDAC_S4ECD4ED;
        } else {
-                debugf0("ECC disabled\n");
+                edac_dbg(0, "ECC disabled\n");
                mode = EDAC_NONE;
        }
        /* FIXME: need to handle the error codes */
-        debugf0("DOD Max limits: DIMMS: %d, %d-ranked, %d-banked "
+        edac_dbg(0, "DOD Max limits: DIMMS: %d, %d-ranked, %d-banked x%x x 0x%x\n",
-                "x%x x 0x%x\n",
+                 numdimms(pvt->info.max_dod),
-                numdimms(pvt->info.max_dod),
+                 numrank(pvt->info.max_dod >> 2),
-                numrank(pvt->info.max_dod >> 2),
+                 numbank(pvt->info.max_dod >> 4),
-                numbank(pvt->info.max_dod >> 4),
+                 numrow(pvt->info.max_dod >> 6),
-                numrow(pvt->info.max_dod >> 6),
+                 numcol(pvt->info.max_dod >> 9));
-                numcol(pvt->info.max_dod >> 9));
        for (i = 0; i < NUM_CHANS; i++) {
                u32 data, dimm_dod[3], value[8];
@@ -545,11 +546,11 @@ static int get_dimm_config(struct mem_ctl_info *mci)
                        continue;
                if (!CH_ACTIVE(pvt, i)) {
-                        debugf0("Channel %i is not active\n", i);
+                        edac_dbg(0, "Channel %i is not active\n", i);
                        continue;
                }
                if (CH_DISABLED(pvt, i)) {
-                        debugf0("Channel %i is disabled\n", i);
+                        edac_dbg(0, "Channel %i is disabled\n", i);
                        continue;
                }
@@ -580,15 +581,14 @@ static int get_dimm_config(struct mem_ctl_info *mci)
                pci_read_config_dword(pvt->pci_ch[i][1],
                                MC_DOD_CH_DIMM2, &dimm_dod[2]);
-                debugf0("Ch%d phy rd%d, wr%d (0x%08x): "
+                edac_dbg(0, "Ch%d phy rd%d, wr%d (0x%08x): %s%s%s%cDIMMs\n",
-                        "%s%s%s%cDIMMs\n",
+                         i,
-                        i,
+                         RDLCH(pvt->info.ch_map, i), WRLCH(pvt->info.ch_map, i),
-                        RDLCH(pvt->info.ch_map, i), WRLCH(pvt->info.ch_map, i),
+                         data,
-                        data,
+                         pvt->channel[i].is_3dimms_present ? "3DIMMS " : "",
-                        pvt->channel[i].is_3dimms_present ? "3DIMMS " : "",
+                         pvt->channel[i].is_3dimms_present ? "SINGLE_4R " : "",
-                        pvt->channel[i].is_3dimms_present ? "SINGLE_4R " : "",
+                         pvt->channel[i].has_4rank ? "HAS_4R " : "",
-                        pvt->channel[i].has_4rank ? "HAS_4R " : "",
+                         (data & REGISTERED_DIMM) ? 'R' : 'U');
-                        (data & REGISTERED_DIMM) ? 'R' : 'U');
                for (j = 0; j < 3; j++) {
                        u32 banks, ranks, rows, cols;
@@ -607,11 +607,10 @@ static int get_dimm_config(struct mem_ctl_info *mci)
                        /* DDR3 has 8 I/O banks */
                        size = (rows * cols * banks * ranks) >> (20 - 3);
-                        debugf0("\tdimm %d %d Mb offset: %x, "
+                        edac_dbg(0, "\tdimm %d %d Mb offset: %x, bank: %d, rank: %d, row: %#x, col: %#x\n",
-                                "bank: %d, rank: %d, row: %#x, col: %#x\n",
+                                 j, size,
-                                j, size,
+                                 RANKOFFSET(dimm_dod[j]),
-                                RANKOFFSET(dimm_dod[j]),
+                                 banks, ranks, rows, cols);
-                                banks, ranks, rows, cols);
                        npages = MiB_TO_PAGES(size);
@@ -647,12 +646,12 @@ static int get_dimm_config(struct mem_ctl_info *mci)
                pci_read_config_dword(pdev, MC_SAG_CH_5, &value[5]);
                pci_read_config_dword(pdev, MC_SAG_CH_6, &value[6]);
                pci_read_config_dword(pdev, MC_SAG_CH_7, &value[7]);
-                debugf1("\t[%i] DIVBY3\tREMOVED\tOFFSET\n", i);
+                edac_dbg(1, "\t[%i] DIVBY3\tREMOVED\tOFFSET\n", i);
                for (j = 0; j < 8; j++)
-                        debugf1("\t\t%#x\t%#x\t%#x\n",
+                        edac_dbg(1, "\t\t%#x\t%#x\t%#x\n",
-                                (value[j] >> 27) & 0x1,
+                                 (value[j] >> 27) & 0x1,
-                                (value[j] >> 24) & 0x7,
+                                 (value[j] >> 24) & 0x7,
-                                (value[j] & ((1 << 24) - 1)));
+                                 (value[j] & ((1 << 24) - 1)));
        }
        return 0;
@@ -662,6 +661,8 @@ static int get_dimm_config(struct mem_ctl_info *mci)
                        Error insertion routines
 ****************************************************************************/
+#define to_mci(k) container_of(k, struct mem_ctl_info, dev)
 /* The i7core has independent error injection features per channel.
   However, to have a simpler code, we don't allow enabling error injection
   on more than one channel.
@@ -691,9 +692,11 @@ static int disable_inject(const struct mem_ctl_info *mci)
 *      bit 0 - refers to the lower 32-byte half cacheline
 *      bit 1 - refers to the upper 32-byte half cacheline
 */
-static ssize_t i7core_inject_section_store(struct mem_ctl_info *mci,
+static ssize_t i7core_inject_section_store(struct device *dev,
+                                           struct device_attribute *mattr,
                                           const char *data, size_t count)
 {
+        struct mem_ctl_info *mci = to_mci(dev);
        struct i7core_pvt *pvt = mci->pvt_info;
        unsigned long value;
        int rc;
@@ -709,9 +712,11 @@ static ssize_t i7core_inject_section_store(struct mem_ctl_info *mci,
        return count;
 }
-static ssize_t i7core_inject_section_show(struct mem_ctl_info *mci,
+static ssize_t i7core_inject_section_show(struct device *dev,
-                                              char *data)
+                                          struct device_attribute *mattr,
+                                          char *data)
 {
+        struct mem_ctl_info *mci = to_mci(dev);
        struct i7core_pvt *pvt = mci->pvt_info;
        return sprintf(data, "0x%08x\n", pvt->inject.section);
 }
@@ -724,10 +729,12 @@ static ssize_t i7core_inject_section_show(struct mem_ctl_info *mci,
 *      bit 1 - inject ECC error
 *      bit 2 - inject parity error
 */
-static ssize_t i7core_inject_type_store(struct mem_ctl_info *mci,
+static ssize_t i7core_inject_type_store(struct device *dev,
+                                        struct device_attribute *mattr,
                                        const char *data, size_t count)
 {
-        struct i7core_pvt *pvt = mci->pvt_info;
+        struct mem_ctl_info *mci = to_mci(dev);
+struct i7core_pvt *pvt = mci->pvt_info;
        unsigned long value;
        int rc;
@@ -742,10 +749,13 @@ static ssize_t i7core_inject_type_store(struct mem_ctl_info *mci,
        return count;
 }
-static ssize_t i7core_inject_type_show(struct mem_ctl_info *mci,
+static ssize_t i7core_inject_type_show(struct device *dev,
-                                              char *data)
+                                       struct device_attribute *mattr,
+                                       char *data)
 {
+        struct mem_ctl_info *mci = to_mci(dev);
        struct i7core_pvt *pvt = mci->pvt_info;
        return sprintf(data, "0x%08x\n", pvt->inject.type);
 }
@@ -759,9 +769,11 @@ static ssize_t i7core_inject_type_show(struct mem_ctl_info *mci,
 *   23:16 and 31:24). Flipping bits in two symbol pairs will cause an
 *   uncorrectable error to be injected.
 */
-static ssize_t i7core_inject_eccmask_store(struct mem_ctl_info *mci,
+static ssize_t i7core_inject_eccmask_store(struct device *dev,
-                                        const char *data, size_t count)
+                                           struct device_attribute *mattr,
+                                           const char *data, size_t count)
 {
+        struct mem_ctl_info *mci = to_mci(dev);
        struct i7core_pvt *pvt = mci->pvt_info;
        unsigned long value;
        int rc;
@@ -777,10 +789,13 @@ static ssize_t i7core_inject_eccmask_store(struct mem_ctl_info *mci,
        return count;
 }
-static ssize_t i7core_inject_eccmask_show(struct mem_ctl_info *mci,
+static ssize_t i7core_inject_eccmask_show(struct device *dev,
-                                              char *data)
+                                          struct device_attribute *mattr,
+                                          char *data)
 {
+        struct mem_ctl_info *mci = to_mci(dev);
        struct i7core_pvt *pvt = mci->pvt_info;
        return sprintf(data, "0x%08x\n", pvt->inject.eccmask);
 }
@@ -797,14 +812,16 @@ static ssize_t i7core_inject_eccmask_show(struct mem_ctl_info *mci,
 #define DECLARE_ADDR_MATCH(param, limit)                        \
 static ssize_t i7core_inject_store_##param(                     \
-                struct mem_ctl_info *mci,                       \
+        struct device *dev,                                     \
-                const char *data, size_t count)                 \
+        struct device_attribute *mattr,                         \
+        const char *data, size_t count)                         \
 {                                                               \
+        struct mem_ctl_info *mci = to_mci(dev);                 \
        struct i7core_pvt *pvt;                                 \
        long value;                                             \
        int rc;                                                 \
                                                                \
-        debugf1("%s()\n", __func__);                            \
+        edac_dbg(1, "\n");                                      \
        pvt = mci->pvt_info;                                    \
                                                                \
        if (pvt->inject.enable)                                 \
@@ -824,13 +841,15 @@ static ssize_t i7core_inject_store_##param(			\
 }                                                               \
                                                                \
 static ssize_t i7core_inject_show_##param(                      \
-                struct mem_ctl_info *mci,                       \
+        struct device *dev,                                     \
-                char *data)                                     \
+        struct device_attribute *mattr,                         \
+        char *data)                                             \
 {                                                               \
+        struct mem_ctl_info *mci = to_mci(dev);                 \
        struct i7core_pvt *pvt;                                 \
                                                                \
        pvt = mci->pvt_info;                                    \
-        debugf1("%s() pvt=%p\n", __func__, pvt);                \
+        edac_dbg(1, "pvt=%p\n", pvt);                           \
        if (pvt->inject.param < 0)                              \
                return sprintf(data, "any\n");                  \
        else                                                    \
@@ -838,14 +857,9 @@ static ssize_t i7core_inject_show_##param(			\
 }
 #define ATTR_ADDR_MATCH(param)                                  \
-        {                                                       \
+        static DEVICE_ATTR(param, S_IRUGO | S_IWUSR,            \
-                .attr = {                                       \
+                    i7core_inject_show_##param,                 \
-                        .name = #param,                         \
+                    i7core_inject_store_##param)
-                        .mode = (S_IRUGO | S_IWUSR)             \
-                },                                              \
-                .show  = i7core_inject_show_##param,            \
-                .store = i7core_inject_store_##param,           \
-        }
 DECLARE_ADDR_MATCH(channel, 3);
 DECLARE_ADDR_MATCH(dimm, 3);
@@ -854,14 +868,21 @@ DECLARE_ADDR_MATCH(bank, 32);
 DECLARE_ADDR_MATCH(page, 0x10000);
 DECLARE_ADDR_MATCH(col, 0x4000);
+ATTR_ADDR_MATCH(channel);
+ATTR_ADDR_MATCH(dimm);
+ATTR_ADDR_MATCH(rank);
+ATTR_ADDR_MATCH(bank);
+ATTR_ADDR_MATCH(page);
+ATTR_ADDR_MATCH(col);
 static int write_and_test(struct pci_dev *dev, const int where, const u32 val)
 {
        u32 read;
        int count;
-        debugf0("setting pci %02x:%02x.%x reg=%02x value=%08x\n",
+        edac_dbg(0, "setting pci %02x:%02x.%x reg=%02x value=%08x\n",
-                dev->bus->number, PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn),
+                 dev->bus->number, PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn),
-                where, val);
+                 where, val);
        for (count = 0; count < 10; count++) {
                if (count)
@@ -899,9 +920,11 @@ static int write_and_test(struct pci_dev *dev, const int where, const u32 val)
 *    is reliable enough to check if the MC is using the
 *    three channels. However, this is not clear at the datasheet.
 */
-static ssize_t i7core_inject_enable_store(struct mem_ctl_info *mci,
+static ssize_t i7core_inject_enable_store(struct device *dev,
-                                       const char *data, size_t count)
+                                          struct device_attribute *mattr,
+                                          const char *data, size_t count)
 {
+        struct mem_ctl_info *mci = to_mci(dev);
        struct i7core_pvt *pvt = mci->pvt_info;
        u32 injectmask;
        u64 mask = 0;
@@ -994,17 +1017,18 @@ static ssize_t i7core_inject_enable_store(struct mem_ctl_info *mci,
        pci_write_config_dword(pvt->pci_noncore,
                               MC_CFG_CONTROL, 8);
-        debugf0("Error inject addr match 0x%016llx, ecc 0x%08x,"
+        edac_dbg(0, "Error inject addr match 0x%016llx, ecc 0x%08x, inject 0x%08x\n",
-                " inject 0x%08x\n",
+                 mask, pvt->inject.eccmask, injectmask);
-                mask, pvt->inject.eccmask, injectmask);
        return count;
 }
-static ssize_t i7core_inject_enable_show(struct mem_ctl_info *mci,
+static ssize_t i7core_inject_enable_show(struct device *dev,
-                                        char *data)
+                                         struct device_attribute *mattr,
+                                         char *data)
 {
+        struct mem_ctl_info *mci = to_mci(dev);
        struct i7core_pvt *pvt = mci->pvt_info;
        u32 injectmask;
@@ -1014,7 +1038,7 @@ static ssize_t i7core_inject_enable_show(struct mem_ctl_info *mci,
        pci_read_config_dword(pvt->pci_ch[pvt->inject.channel][0],
                               MC_CHANNEL_ERROR_INJECT, &injectmask);
-        debugf0("Inject error read: 0x%018x\n", injectmask);
+        edac_dbg(0, "Inject error read: 0x%018x\n", injectmask);
        if (injectmask & 0x0c)
                pvt->inject.enable = 1;
@@ -1024,12 +1048,14 @@ static ssize_t i7core_inject_enable_show(struct mem_ctl_info *mci,
 #define DECLARE_COUNTER(param)                                  \
 static ssize_t i7core_show_counter_##param(                     \
-                struct mem_ctl_info *mci,                       \
+        struct device *dev,                                     \
-                char *data)                                     \
+        struct device_attribute *mattr,                         \
+        char *data)                                             \
 {                                                               \
+        struct mem_ctl_info *mci = to_mci(dev);                 \
        struct i7core_pvt *pvt = mci->pvt_info;                 \
                                                                \
-        debugf1("%s() \n", __func__);                           \
+        edac_dbg(1, "\n");                                      \
        if (!pvt->ce_count_available || (pvt->is_registered))   \
                return sprintf(data, "data unavailable\n");     \
        return sprintf(data, "%lu\n",                           \
@@ -1037,121 +1063,179 @@ static ssize_t i7core_show_counter_##param(			\
 }
 #define ATTR_COUNTER(param)                                     \
-        {                                                       \
+        static DEVICE_ATTR(udimm##param, S_IRUGO | S_IWUSR,     \
-                .attr = {                                       \
+                    i7core_show_counter_##param,                \
-                        .name = __stringify(udimm##param),      \
+                    NULL)
-                        .mode = (S_IRUGO | S_IWUSR)             \
-                },                                              \
-                .show  = i7core_show_counter_##param            \
-        }
 DECLARE_COUNTER(0);
 DECLARE_COUNTER(1);
 DECLARE_COUNTER(2);
+ATTR_COUNTER(0);
+ATTR_COUNTER(1);
+ATTR_COUNTER(2);
 /*
- * Sysfs struct
+ * inject_addrmatch device sysfs struct
 */
-static const struct mcidev_sysfs_attribute i7core_addrmatch_attrs[] = {
+static struct attribute *i7core_addrmatch_attrs[] = {
-        ATTR_ADDR_MATCH(channel),
+        &dev_attr_channel.attr,
-        ATTR_ADDR_MATCH(dimm),
+        &dev_attr_dimm.attr,
-        ATTR_ADDR_MATCH(rank),
+        &dev_attr_rank.attr,
-        ATTR_ADDR_MATCH(bank),
+        &dev_attr_bank.attr,
-        ATTR_ADDR_MATCH(page),
+        &dev_attr_page.attr,
-        ATTR_ADDR_MATCH(col),
+        &dev_attr_col.attr,
-        { } /* End of list */
+        NULL
+};
+static struct attribute_group addrmatch_grp = {
+        .attrs  = i7core_addrmatch_attrs,
+};
+static const struct attribute_group *addrmatch_groups[] = {
+        &addrmatch_grp,
+        NULL
 };
-static const struct mcidev_sysfs_group i7core_inject_addrmatch = {
+static void addrmatch_release(struct device *device)
-        .name  = "inject_addrmatch",
+{
-        .mcidev_attr = i7core_addrmatch_attrs,
+        edac_dbg(1, "Releasing device %s\n", dev_name(device));
+        kfree(device);
+}
+static struct device_type addrmatch_type = {
+        .groups         = addrmatch_groups,
+        .release        = addrmatch_release,
 };
-static const struct mcidev_sysfs_attribute i7core_udimm_counters_attrs[] = {
+/*
-        ATTR_COUNTER(0),
+ * all_channel_counts sysfs struct
-        ATTR_COUNTER(1),
+ */
-        ATTR_COUNTER(2),
-        { .attr = { .name = NULL } }
+static struct attribute *i7core_udimm_counters_attrs[] = {
+        &dev_attr_udimm0.attr,
+        &dev_attr_udimm1.attr,
+        &dev_attr_udimm2.attr,
+        NULL
 };
-static const struct mcidev_sysfs_group i7core_udimm_counters = {
+static struct attribute_group all_channel_counts_grp = {
-        .name  = "all_channel_counts",
+        .attrs  = i7core_udimm_counters_attrs,
-        .mcidev_attr = i7core_udimm_counters_attrs,
 };
-static const struct mcidev_sysfs_attribute i7core_sysfs_rdimm_attrs[] = {
+static const struct attribute_group *all_channel_counts_groups[] = {
-        {
+        &all_channel_counts_grp,
-                .attr = {
+        NULL
-                        .name = "inject_section",
-                        .mode = (S_IRUGO | S_IWUSR)
-                },
-                .show  = i7core_inject_section_show,
-                .store = i7core_inject_section_store,
-        }, {
-                .attr = {
-                        .name = "inject_type",
-                        .mode = (S_IRUGO | S_IWUSR)
-                },
-                .show  = i7core_inject_type_show,
-                .store = i7core_inject_type_store,
-        }, {
-                .attr = {
-                        .name = "inject_eccmask",
-                        .mode = (S_IRUGO | S_IWUSR)
-                },
-                .show  = i7core_inject_eccmask_show,
-                .store = i7core_inject_eccmask_store,
-        }, {
-                .grp = &i7core_inject_addrmatch,
-        }, {
-                .attr = {
-                        .name = "inject_enable",
-                        .mode = (S_IRUGO | S_IWUSR)
-                },
-                .show  = i7core_inject_enable_show,
-                .store = i7core_inject_enable_store,
-        },
-        { }     /* End of list */
 };
-static const struct mcidev_sysfs_attribute i7core_sysfs_udimm_attrs[] = {
+static void all_channel_counts_release(struct device *device)
-        {
+{
-                .attr = {
+        edac_dbg(1, "Releasing device %s\n", dev_name(device));
-                        .name = "inject_section",
+        kfree(device);
-                        .mode = (S_IRUGO | S_IWUSR)
+}
-                },
-                .show  = i7core_inject_section_show,
+static struct device_type all_channel_counts_type = {
-                .store = i7core_inject_section_store,
+        .groups         = all_channel_counts_groups,
-        }, {
+        .release        = all_channel_counts_release,
-                .attr = {
-                        .name = "inject_type",
-                        .mode = (S_IRUGO | S_IWUSR)
-                },
-                .show  = i7core_inject_type_show,
-                .store = i7core_inject_type_store,
-        }, {
-                .attr = {
-                        .name = "inject_eccmask",
-                        .mode = (S_IRUGO | S_IWUSR)
-                },
-                .show  = i7core_inject_eccmask_show,
-                .store = i7core_inject_eccmask_store,
-        }, {
-                .grp = &i7core_inject_addrmatch,
-        }, {
-                .attr = {
-                        .name = "inject_enable",
-                        .mode = (S_IRUGO | S_IWUSR)
-                },
-                .show  = i7core_inject_enable_show,
-                .store = i7core_inject_enable_store,
-        }, {
-                .grp = &i7core_udimm_counters,
-        },
-        { }     /* End of list */
 };
+/*
+ * inject sysfs attributes
+ */
+static DEVICE_ATTR(inject_section, S_IRUGO | S_IWUSR,
+                   i7core_inject_section_show, i7core_inject_section_store);
+static DEVICE_ATTR(inject_type, S_IRUGO | S_IWUSR,
+                   i7core_inject_type_show, i7core_inject_type_store);
+static DEVICE_ATTR(inject_eccmask, S_IRUGO | S_IWUSR,
+                   i7core_inject_eccmask_show, i7core_inject_eccmask_store);
+static DEVICE_ATTR(inject_enable, S_IRUGO | S_IWUSR,
+                   i7core_inject_enable_show, i7core_inject_enable_store);
+static int i7core_create_sysfs_devices(struct mem_ctl_info *mci)
+{
+        struct i7core_pvt *pvt = mci->pvt_info;
+        int rc;
+        rc = device_create_file(&mci->dev, &dev_attr_inject_section);
+        if (rc < 0)
+                return rc;
+        rc = device_create_file(&mci->dev, &dev_attr_inject_type);
+        if (rc < 0)
+                return rc;
+        rc = device_create_file(&mci->dev, &dev_attr_inject_eccmask);
+        if (rc < 0)
+                return rc;
+        rc = device_create_file(&mci->dev, &dev_attr_inject_enable);
+        if (rc < 0)
+                return rc;
+        pvt->addrmatch_dev = kzalloc(sizeof(*pvt->addrmatch_dev), GFP_KERNEL);
+        if (!pvt->addrmatch_dev)
+                return rc;
+        pvt->addrmatch_dev->type = &addrmatch_type;
+        pvt->addrmatch_dev->bus = mci->dev.bus;
+        device_initialize(pvt->addrmatch_dev);
+        pvt->addrmatch_dev->parent = &mci->dev;
+        dev_set_name(pvt->addrmatch_dev, "inject_addrmatch");
+        dev_set_drvdata(pvt->addrmatch_dev, mci);
+        edac_dbg(1, "creating %s\n", dev_name(pvt->addrmatch_dev));
+        rc = device_add(pvt->addrmatch_dev);
+        if (rc < 0)
+                return rc;
+        if (!pvt->is_registered) {
+                pvt->chancounts_dev = kzalloc(sizeof(*pvt->chancounts_dev),
+                                              GFP_KERNEL);
+                if (!pvt->chancounts_dev) {
+                        put_device(pvt->addrmatch_dev);
+                        device_del(pvt->addrmatch_dev);
+                        return rc;
+                }
+                pvt->chancounts_dev->type = &all_channel_counts_type;
+                pvt->chancounts_dev->bus = mci->dev.bus;
+                device_initialize(pvt->chancounts_dev);
+                pvt->chancounts_dev->parent = &mci->dev;
+                dev_set_name(pvt->chancounts_dev, "all_channel_counts");
+                dev_set_drvdata(pvt->chancounts_dev, mci);
+                edac_dbg(1, "creating %s\n", dev_name(pvt->chancounts_dev));
+                rc = device_add(pvt->chancounts_dev);
+                if (rc < 0)
+                        return rc;
+        }
+        return 0;
+}
+static void i7core_delete_sysfs_devices(struct mem_ctl_info *mci)
+{
+        struct i7core_pvt *pvt = mci->pvt_info;
+        edac_dbg(1, "\n");
+        device_remove_file(&mci->dev, &dev_attr_inject_section);
+        device_remove_file(&mci->dev, &dev_attr_inject_type);
+        device_remove_file(&mci->dev, &dev_attr_inject_eccmask);
+        device_remove_file(&mci->dev, &dev_attr_inject_enable);
+        if (!pvt->is_registered) {
+                put_device(pvt->chancounts_dev);
+                device_del(pvt->chancounts_dev);
+        }
+        put_device(pvt->addrmatch_dev);
+        device_del(pvt->addrmatch_dev);
+}
 /****************************************************************************
        Device initialization routines: put/get, init/exit
 ****************************************************************************/
@@ -1164,14 +1248,14 @@ static void i7core_put_devices(struct i7core_dev *i7core_dev)
 {
        int i;
-        debugf0(__FILE__ ": %s()\n", __func__);
+        edac_dbg(0, "\n");
        for (i = 0; i < i7core_dev->n_devs; i++) {
                struct pci_dev *pdev = i7core_dev->pdev[i];
                if (!pdev)
                        continue;
-                debugf0("Removing dev %02x:%02x.%d\n",
+                edac_dbg(0, "Removing dev %02x:%02x.%d\n",
-                        pdev->bus->number,
+                         pdev->bus->number,
-                        PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn));
+                         PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn));
                pci_dev_put(pdev);
        }
 }
@@ -1214,12 +1298,12 @@ static unsigned i7core_pci_lastbus(void)
        while ((b = pci_find_next_bus(b)) != NULL) {
                bus = b->number;
-                debugf0("Found bus %d\n", bus);
+                edac_dbg(0, "Found bus %d\n", bus);
                if (bus > last_bus)
                        last_bus = bus;
        }
-        debugf0("Last bus %d\n", last_bus);
+        edac_dbg(0, "Last bus %d\n", last_bus);
        return last_bus;
 }
@@ -1326,10 +1410,10 @@ static int i7core_get_onedevice(struct pci_dev **prev,
                return -ENODEV;
        }
-        debugf0("Detected socket %d dev %02x:%02x.%d PCI ID %04x:%04x\n",
+        edac_dbg(0, "Detected socket %d dev %02x:%02x.%d PCI ID %04x:%04x\n",
-                socket, bus, dev_descr->dev,
+                 socket, bus, dev_descr->dev,
-                dev_descr->func,
+                 dev_descr->func,
-                PCI_VENDOR_ID_INTEL, dev_descr->dev_id);
+                 PCI_VENDOR_ID_INTEL, dev_descr->dev_id);
        /*
         * As stated on drivers/pci/search.c, the reference count for
@@ -1427,13 +1511,13 @@ static int mci_bind_devs(struct mem_ctl_info *mci,
                                family = "unknown";
                                pvt->enable_scrub = false;
                        }
-                        debugf0("Detected a processor type %s\n", family);
+                        edac_dbg(0, "Detected a processor type %s\n", family);
                } else
                        goto error;
-                debugf0("Associated fn %d.%d, dev = %p, socket %d\n",
+                edac_dbg(0, "Associated fn %d.%d, dev = %p, socket %d\n",
-                        PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn),
+                         PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn),
-                        pdev, i7core_dev->socket);
+                         pdev, i7core_dev->socket);
                if (PCI_SLOT(pdev->devfn) == 3 &&
                        PCI_FUNC(pdev->devfn) == 2)
@@ -1452,18 +1536,6 @@ error:
 /****************************************************************************
                        Error check routines
 ****************************************************************************/
-static void i7core_rdimm_update_errcount(struct mem_ctl_info *mci,
-                                      const int chan,
-                                      const int dimm,
-                                      const int add)
-{
-        int i;
-        for (i = 0; i < add; i++) {
-                edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, 0, 0, 0,
-                                     chan, dimm, -1, "error", "", NULL);
-        }
-}
 static void i7core_rdimm_update_ce_count(struct mem_ctl_info *mci,
                                         const int chan,
@@ -1502,12 +1574,17 @@ static void i7core_rdimm_update_ce_count(struct mem_ctl_info *mci,
        /*updated the edac core */
        if (add0 != 0)
-                i7core_rdimm_update_errcount(mci, chan, 0, add0);
+                edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, add0,
+                                     0, 0, 0,
+                                     chan, 0, -1, "error", "");
        if (add1 != 0)
-                i7core_rdimm_update_errcount(mci, chan, 1, add1);
+                edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, add1,
+                                     0, 0, 0,
+                                     chan, 1, -1, "error", "");
        if (add2 != 0)
-                i7core_rdimm_update_errcount(mci, chan, 2, add2);
+                edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, add2,
+                                     0, 0, 0,
+                                     chan, 2, -1, "error", "");
 }
 static void i7core_rdimm_check_mc_ecc_err(struct mem_ctl_info *mci)
@@ -1530,8 +1607,8 @@ static void i7core_rdimm_check_mc_ecc_err(struct mem_ctl_info *mci)
        pci_read_config_dword(pvt->pci_mcr[2], MC_COR_ECC_CNT_5,
                                                                &rcv[2][1]);
        for (i = 0 ; i < 3; i++) {
-                debugf3("MC_COR_ECC_CNT%d = 0x%x; MC_COR_ECC_CNT%d = 0x%x\n",
+                edac_dbg(3, "MC_COR_ECC_CNT%d = 0x%x; MC_COR_ECC_CNT%d = 0x%x\n",
-                        (i * 2), rcv[i][0], (i * 2) + 1, rcv[i][1]);
+                         (i * 2), rcv[i][0], (i * 2) + 1, rcv[i][1]);
                /*if the channel has 3 dimms*/
                if (pvt->channel[i].dimms > 2) {
                        new0 = DIMM_BOT_COR_ERR(rcv[i][0]);
@@ -1562,7 +1639,7 @@ static void i7core_udimm_check_mc_ecc_err(struct mem_ctl_info *mci)
        int new0, new1, new2;
        if (!pvt->pci_mcr[4]) {
-                debugf0("%s MCR registers not found\n", __func__);
+                edac_dbg(0, "MCR registers not found\n");
                return;
        }
@@ -1626,7 +1703,7 @@ static void i7core_mce_output_error(struct mem_ctl_info *mci,
                                    const struct mce *m)
 {
        struct i7core_pvt *pvt = mci->pvt_info;
-        char *type, *optype, *err, msg[80];
+        char *type, *optype, *err;
        enum hw_event_mc_err_type tp_event;
        unsigned long error = m->status & 0x1ff0000l;
        bool uncorrected_error = m->mcgstatus & 1ll << 61;
@@ -1704,20 +1781,18 @@ static void i7core_mce_output_error(struct mem_ctl_info *mci,
                err = "unknown";
        }
-        snprintf(msg, sizeof(msg), "count=%d %s", core_err_cnt, optype);
        /*
         * Call the helper to output message
         * FIXME: what to do if core_err_cnt > 1? Currently, it generates
         * only one event
         */
        if (uncorrected_error || !pvt->is_registered)
-                edac_mc_handle_error(tp_event, mci,
+                edac_mc_handle_error(tp_event, mci, core_err_cnt,
                                     m->addr >> PAGE_SHIFT,
                                     m->addr & ~PAGE_MASK,
                                     syndrome,
                                     channel, dimm, -1,
-                                     err, msg, m);
+                                     err, optype);
 }
 /*
@@ -1814,12 +1889,6 @@ static int i7core_mce_check_error(struct notifier_block *nb, unsigned long val,
        if (mce->bank != 8)
                return NOTIFY_DONE;
-#ifdef CONFIG_SMP
-        /* Only handle if it is the right mc controller */
-        if (mce->socketid != pvt->i7core_dev->socket)
-                return NOTIFY_DONE;
-#endif
        smp_rmb();
        if ((pvt->mce_out + 1) % MCE_LOG_LEN == pvt->mce_in) {
                smp_wmb();
@@ -2100,8 +2169,7 @@ static void i7core_unregister_mci(struct i7core_dev *i7core_dev)
        struct i7core_pvt *pvt;
        if (unlikely(!mci || !mci->pvt_info)) {
-                debugf0("MC: " __FILE__ ": %s(): dev = %p\n",
+                edac_dbg(0, "MC: dev = %p\n", &i7core_dev->pdev[0]->dev);
-                        __func__, &i7core_dev->pdev[0]->dev);
                i7core_printk(KERN_ERR, "Couldn't find mci handler\n");
                return;
@@ -2109,22 +2177,20 @@ static void i7core_unregister_mci(struct i7core_dev *i7core_dev)
        pvt = mci->pvt_info;
-        debugf0("MC: " __FILE__ ": %s(): mci = %p, dev = %p\n",
+        edac_dbg(0, "MC: mci = %p, dev = %p\n", mci, &i7core_dev->pdev[0]->dev);
-                __func__, mci, &i7core_dev->pdev[0]->dev);
        /* Disable scrubrate setting */
        if (pvt->enable_scrub)
                disable_sdram_scrub_setting(mci);
-        mce_unregister_decode_chain(&i7_mce_dec);
        /* Disable EDAC polling */
        i7core_pci_ctl_release(pvt);
        /* Remove MC sysfs nodes */
-        edac_mc_del_mc(mci->dev);
+        i7core_delete_sysfs_devices(mci);
+        edac_mc_del_mc(mci->pdev);
-        debugf1("%s: free mci struct\n", mci->ctl_name);
+        edac_dbg(1, "%s: free mci struct\n", mci->ctl_name);
        kfree(mci->ctl_name);
        edac_mc_free(mci);
        i7core_dev->mci = NULL;
@@ -2150,8 +2216,7 @@ static int i7core_register_mci(struct i7core_dev *i7core_dev)
        if (unlikely(!mci))
                return -ENOMEM;
-        debugf0("MC: " __FILE__ ": %s(): mci = %p, dev = %p\n",
+        edac_dbg(0, "MC: mci = %p, dev = %p\n", mci, &i7core_dev->pdev[0]->dev);
-                __func__, mci, &i7core_dev->pdev[0]->dev);
        pvt = mci->pvt_info;
        memset(pvt, 0, sizeof(*pvt));
@@ -2180,15 +2245,11 @@ static int i7core_register_mci(struct i7core_dev *i7core_dev)
        if (unlikely(rc < 0))
                goto fail0;
-        if (pvt->is_registered)
-                mci->mc_driver_sysfs_attributes = i7core_sysfs_rdimm_attrs;
-        else
-                mci->mc_driver_sysfs_attributes = i7core_sysfs_udimm_attrs;
        /* Get dimm basic config */
        get_dimm_config(mci);
        /* record ptr to the generic device */
-        mci->dev = &i7core_dev->pdev[0]->dev;
+        mci->pdev = &i7core_dev->pdev[0]->dev;
        /* Set the function pointer to an actual operation function */
        mci->edac_check = i7core_check_error;
@@ -2198,8 +2259,7 @@ static int i7core_register_mci(struct i7core_dev *i7core_dev)
        /* add this new MC control structure to EDAC's list of MCs */
        if (unlikely(edac_mc_add_mc(mci))) {
-                debugf0("MC: " __FILE__
+                edac_dbg(0, "MC: failed edac_mc_add_mc()\n");
-                        ": %s(): failed edac_mc_add_mc()\n", __func__);
                /* FIXME: perhaps some code should go here that disables error
                 * reporting if we just enabled it
                 */
@@ -2207,6 +2267,12 @@ static int i7core_register_mci(struct i7core_dev *i7core_dev)
                rc = -EINVAL;
                goto fail0;
        }
+        if (i7core_create_sysfs_devices(mci)) {
+                edac_dbg(0, "MC: failed to create sysfs nodes\n");
+                edac_mc_del_mc(mci->pdev);
+                rc = -EINVAL;
+                goto fail0;
+        }
        /* Default error mask is any memory */
        pvt->inject.channel = 0;
@@ -2222,8 +2288,6 @@ static int i7core_register_mci(struct i7core_dev *i7core_dev)
        /* DCLK for scrub rate setting */
        pvt->dclk_freq = get_dclk_freq();
-        mce_register_decode_chain(&i7_mce_dec);
        return 0;
 fail0:
@@ -2308,7 +2372,7 @@ static void __devexit i7core_remove(struct pci_dev *pdev)
 {
        struct i7core_dev *i7core_dev;
-        debugf0(__FILE__ ": %s()\n", __func__);
+        edac_dbg(0, "\n");
        /*
         * we have a trouble here: pdev value for removal will be wrong, since
@@ -2357,7 +2421,7 @@ static int __init i7core_init(void)
 {
        int pci_rc;
-        debugf2("MC: " __FILE__ ": %s()\n", __func__);
+        edac_dbg(2, "\n");
        /* Ensure that the OPSTATE is set correctly for POLL or NMI */
        opstate_init();
@@ -2367,8 +2431,10 @@ static int __init i7core_init(void)
        pci_rc = pci_register_driver(&i7core_driver);
-        if (pci_rc >= 0)
+        if (pci_rc >= 0) {
+                mce_register_decode_chain(&i7_mce_dec);
                return 0;
+        }
        i7core_printk(KERN_ERR, "Failed to register device with error %d.\n",
                      pci_rc);
@@ -2382,8 +2448,9 @@ static int __init i7core_init(void)
 */
 static void __exit i7core_exit(void)
 {
-        debugf2("MC: " __FILE__ ": %s()\n", __func__);
+        edac_dbg(2, "\n");
        pci_unregister_driver(&i7core_driver);
+        mce_unregister_decode_chain(&i7_mce_dec);
 }
 module_init(i7core_init);
diff --git a/drivers/edac/i82443bxgx_edac.c b/drivers/edac/i82443bxgx_edac.c
index 52072c28a8a6..90f303db5d1d 100644
--- a/drivers/edac/i82443bxgx_edac.c
+++ b/drivers/edac/i82443bxgx_edac.c
@@ -124,7 +124,7 @@ static void i82443bxgx_edacmc_get_error_info(struct mem_ctl_info *mci,
                                *info)
 {
        struct pci_dev *pdev;
-        pdev = to_pci_dev(mci->dev);
+        pdev = to_pci_dev(mci->pdev);
        pci_read_config_dword(pdev, I82443BXGX_EAP, &info->eap);
        if (info->eap & I82443BXGX_EAP_OFFSET_SBE)
                /* Clear error to allow next error to be reported [p.61] */
@@ -156,19 +156,19 @@ static int i82443bxgx_edacmc_process_error_info(struct mem_ctl_info *mci,
        if (info->eap & I82443BXGX_EAP_OFFSET_SBE) {
                error_found = 1;
                if (handle_errors)
-                        edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci,
+                        edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, 1,
                                             page, pageoffset, 0,
                                             edac_mc_find_csrow_by_page(mci, page),
-                                             0, -1, mci->ctl_name, "", NULL);
+                                             0, -1, mci->ctl_name, "");
        }
        if (info->eap & I82443BXGX_EAP_OFFSET_MBE) {
                error_found = 1;
                if (handle_errors)
-                        edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci,
+                        edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 1,
                                             page, pageoffset, 0,
                                             edac_mc_find_csrow_by_page(mci, page),
-                                             0, -1, mci->ctl_name, "", NULL);
+                                             0, -1, mci->ctl_name, "");
        }
        return error_found;
@@ -178,7 +178,7 @@ static void i82443bxgx_edacmc_check(struct mem_ctl_info *mci)
 {
        struct i82443bxgx_edacmc_error_info info;
-        debugf1("MC%d: %s: %s()\n", mci->mc_idx, __FILE__, __func__);
+        edac_dbg(1, "MC%d\n", mci->mc_idx);
        i82443bxgx_edacmc_get_error_info(mci, &info);
        i82443bxgx_edacmc_process_error_info(mci, &info, 1);
 }
@@ -197,18 +197,17 @@ static void i82443bxgx_init_csrows(struct mem_ctl_info *mci,
        pci_read_config_byte(pdev, I82443BXGX_DRAMC, &dramc);
        row_high_limit_last = 0;
        for (index = 0; index < mci->nr_csrows; index++) {
-                csrow = &mci->csrows[index];
+                csrow = mci->csrows[index];
-                dimm = csrow->channels[0].dimm;
+                dimm = csrow->channels[0]->dimm;
                pci_read_config_byte(pdev, I82443BXGX_DRB + index, &drbar);
-                debugf1("MC%d: %s: %s() Row=%d DRB = %#0x\n",
+                edac_dbg(1, "MC%d: Row=%d DRB = %#0x\n",
-                        mci->mc_idx, __FILE__, __func__, index, drbar);
+                         mci->mc_idx, index, drbar);
                row_high_limit = ((u32) drbar << 23);
                /* find the DRAM Chip Select Base address and mask */
-                debugf1("MC%d: %s: %s() Row=%d, "
+                edac_dbg(1, "MC%d: Row=%d, Boundary Address=%#0x, Last = %#0x\n",
-                        "Boundary Address=%#0x, Last = %#0x\n",
+                         mci->mc_idx, index, row_high_limit,
-                        mci->mc_idx, __FILE__, __func__, index, row_high_limit,
+                         row_high_limit_last);
-                        row_high_limit_last);
                /* 440GX goes to 2GB, represented with a DRB of 0. */
                if (row_high_limit_last && !row_high_limit)
@@ -241,7 +240,7 @@ static int i82443bxgx_edacmc_probe1(struct pci_dev *pdev, int dev_idx)
        enum mem_type mtype;
        enum edac_type edac_mode;
-        debugf0("MC: %s: %s()\n", __FILE__, __func__);
+        edac_dbg(0, "MC:\n");
        /* Something is really hosed if PCI config space reads from
         * the MC aren't working.
@@ -259,8 +258,8 @@ static int i82443bxgx_edacmc_probe1(struct pci_dev *pdev, int dev_idx)
        if (mci == NULL)
                return -ENOMEM;
-        debugf0("MC: %s: %s(): mci = %p\n", __FILE__, __func__, mci);
+        edac_dbg(0, "MC: mci = %p\n", mci);
-        mci->dev = &pdev->dev;
+        mci->pdev = &pdev->dev;
        mci->mtype_cap = MEM_FLAG_EDO | MEM_FLAG_SDR | MEM_FLAG_RDR;
        mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_EC | EDAC_FLAG_SECDED;
        pci_read_config_byte(pdev, I82443BXGX_DRAMC, &dramc);
@@ -275,8 +274,7 @@ static int i82443bxgx_edacmc_probe1(struct pci_dev *pdev, int dev_idx)
                mtype = MEM_RDR;
                break;
        default:
-                debugf0("Unknown/reserved DRAM type value "
+                edac_dbg(0, "Unknown/reserved DRAM type value in DRAMC register!\n");
-                        "in DRAMC register!\n");
                mtype = -MEM_UNKNOWN;
        }
@@ -305,8 +303,7 @@ static int i82443bxgx_edacmc_probe1(struct pci_dev *pdev, int dev_idx)
                edac_mode = EDAC_SECDED;
                break;
        default:
-                debugf0("%s(): Unknown/reserved ECC state "
+                edac_dbg(0, "Unknown/reserved ECC state in NBXCFG register!\n");
-                        "in NBXCFG register!\n", __func__);
                edac_mode = EDAC_UNKNOWN;
                break;
        }
@@ -330,7 +327,7 @@ static int i82443bxgx_edacmc_probe1(struct pci_dev *pdev, int dev_idx)
        mci->ctl_page_to_phys = NULL;
        if (edac_mc_add_mc(mci)) {
-                debugf3("%s(): failed edac_mc_add_mc()\n", __func__);
+                edac_dbg(3, "failed edac_mc_add_mc()\n");
                goto fail;
        }
@@ -345,7 +342,7 @@ static int i82443bxgx_edacmc_probe1(struct pci_dev *pdev, int dev_idx)
                        __func__);
        }
-        debugf3("MC: %s: %s(): success\n", __FILE__, __func__);
+        edac_dbg(3, "MC: success\n");
        return 0;
 fail:
@@ -361,7 +358,7 @@ static int __devinit i82443bxgx_edacmc_init_one(struct pci_dev *pdev,
 {
        int rc;
-        debugf0("MC: %s: %s()\n", __FILE__, __func__);
+        edac_dbg(0, "MC:\n");
        /* don't need to call pci_enable_device() */
        rc = i82443bxgx_edacmc_probe1(pdev, ent->driver_data);
@@ -376,7 +373,7 @@ static void __devexit i82443bxgx_edacmc_remove_one(struct pci_dev *pdev)
 {
        struct mem_ctl_info *mci;
-        debugf0("%s: %s()\n", __FILE__, __func__);
+        edac_dbg(0, "\n");
        if (i82443bxgx_pci)
                edac_pci_release_generic_ctl(i82443bxgx_pci);
@@ -428,7 +425,7 @@ static int __init i82443bxgx_edacmc_init(void)
                        id = &i82443bxgx_pci_tbl[i];
                }
                if (!mci_pdev) {
-                        debugf0("i82443bxgx pci_get_device fail\n");
+                        edac_dbg(0, "i82443bxgx pci_get_device fail\n");
                        pci_rc = -ENODEV;
                        goto fail1;
                }
@@ -436,7 +433,7 @@ static int __init i82443bxgx_edacmc_init(void)
                pci_rc = i82443bxgx_edacmc_init_one(mci_pdev, i82443bxgx_pci_tbl);
                if (pci_rc < 0) {
-                        debugf0("i82443bxgx init fail\n");
+                        edac_dbg(0, "i82443bxgx init fail\n");
                        pci_rc = -ENODEV;
                        goto fail1;
                }
diff --git a/drivers/edac/i82860_edac.c b/drivers/edac/i82860_edac.c
index 08045059d10b..1faa74971513 100644
--- a/drivers/edac/i82860_edac.c
+++ b/drivers/edac/i82860_edac.c
@@ -67,7 +67,7 @@ static void i82860_get_error_info(struct mem_ctl_info *mci,
 {
        struct pci_dev *pdev;
-        pdev = to_pci_dev(mci->dev);
+        pdev = to_pci_dev(mci->pdev);
        /*
         * This is a mess because there is no atomic way to read all the
@@ -109,25 +109,25 @@ static int i82860_process_error_info(struct mem_ctl_info *mci,
                return 1;
        if ((info->errsts ^ info->errsts2) & 0x0003) {
-                edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 0, 0, 0,
+                edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 1, 0, 0, 0,
-                                     -1, -1, -1, "UE overwrote CE", "", NULL);
+                                     -1, -1, -1, "UE overwrote CE", "");
                info->errsts = info->errsts2;
        }
        info->eap >>= PAGE_SHIFT;
        row = edac_mc_find_csrow_by_page(mci, info->eap);
-        dimm = mci->csrows[row].channels[0].dimm;
+        dimm = mci->csrows[row]->channels[0]->dimm;
        if (info->errsts & 0x0002)
-                edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci,
+                edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 1,
                                     info->eap, 0, 0,
                                     dimm->location[0], dimm->location[1], -1,
-                                     "i82860 UE", "", NULL);
+                                     "i82860 UE", "");
        else
-                edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci,
+                edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 1,
                                     info->eap, 0, info->derrsyn,
                                     dimm->location[0], dimm->location[1], -1,
-                                     "i82860 CE", "", NULL);
+                                     "i82860 CE", "");
        return 1;
 }
@@ -136,7 +136,7 @@ static void i82860_check(struct mem_ctl_info *mci)
 {
        struct i82860_error_info info;
-        debugf1("MC%d: %s()\n", mci->mc_idx, __func__);
+        edac_dbg(1, "MC%d\n", mci->mc_idx);
        i82860_get_error_info(mci, &info);
        i82860_process_error_info(mci, &info, 1);
 }
@@ -161,14 +161,13 @@ static void i82860_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev)
         * in all eight rows.
         */
        for (index = 0; index < mci->nr_csrows; index++) {
-                csrow = &mci->csrows[index];
+                csrow = mci->csrows[index];
-                dimm = csrow->channels[0].dimm;
+                dimm = csrow->channels[0]->dimm;
                pci_read_config_word(pdev, I82860_GBA + index * 2, &value);
                cumul_size = (value & I82860_GBA_MASK) <<
                        (I82860_GBA_SHIFT - PAGE_SHIFT);
-                debugf3("%s(): (%d) cumul_size 0x%x\n", __func__, index,
+                edac_dbg(3, "(%d) cumul_size 0x%x\n", index, cumul_size);
-                        cumul_size);
                if (cumul_size == last_cumul_size)
                        continue;       /* not populated */
@@ -210,8 +209,8 @@ static int i82860_probe1(struct pci_dev *pdev, int dev_idx)
        if (!mci)
                return -ENOMEM;
-        debugf3("%s(): init mci\n", __func__);
+        edac_dbg(3, "init mci\n");
-        mci->dev = &pdev->dev;
+        mci->pdev = &pdev->dev;
        mci->mtype_cap = MEM_FLAG_DDR;
        mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_SECDED;
        /* I"m not sure about this but I think that all RDRAM is SECDED */
@@ -229,7 +228,7 @@ static int i82860_probe1(struct pci_dev *pdev, int dev_idx)
         * type of memory controller.  The ID is therefore hardcoded to 0.
         */
        if (edac_mc_add_mc(mci)) {
-                debugf3("%s(): failed edac_mc_add_mc()\n", __func__);
+                edac_dbg(3, "failed edac_mc_add_mc()\n");
                goto fail;
        }
@@ -245,7 +244,7 @@ static int i82860_probe1(struct pci_dev *pdev, int dev_idx)
        }
        /* get this far and it's successful */
-        debugf3("%s(): success\n", __func__);
+        edac_dbg(3, "success\n");
        return 0;
@@ -260,7 +259,7 @@ static int __devinit i82860_init_one(struct pci_dev *pdev,
 {
        int rc;
-        debugf0("%s()\n", __func__);
+        edac_dbg(0, "\n");
        i82860_printk(KERN_INFO, "i82860 init one\n");
        if (pci_enable_device(pdev) < 0)
@@ -278,7 +277,7 @@ static void __devexit i82860_remove_one(struct pci_dev *pdev)
 {
        struct mem_ctl_info *mci;
-        debugf0("%s()\n", __func__);
+        edac_dbg(0, "\n");
        if (i82860_pci)
                edac_pci_release_generic_ctl(i82860_pci);
@@ -311,7 +310,7 @@ static int __init i82860_init(void)
 {
        int pci_rc;
-        debugf3("%s()\n", __func__);
+        edac_dbg(3, "\n");
       /* Ensure that the OPSTATE is set correctly for POLL or NMI */
       opstate_init();
@@ -324,7 +323,7 @@ static int __init i82860_init(void)
                                        PCI_DEVICE_ID_INTEL_82860_0, NULL);
                if (mci_pdev == NULL) {
-                        debugf0("860 pci_get_device fail\n");
+                        edac_dbg(0, "860 pci_get_device fail\n");
                        pci_rc = -ENODEV;
                        goto fail1;
                }
@@ -332,7 +331,7 @@ static int __init i82860_init(void)
                pci_rc = i82860_init_one(mci_pdev, i82860_pci_tbl);
                if (pci_rc < 0) {
-                        debugf0("860 init fail\n");
+                        edac_dbg(0, "860 init fail\n");
                        pci_rc = -ENODEV;
                        goto fail1;
                }
@@ -352,7 +351,7 @@ fail0:
 static void __exit i82860_exit(void)
 {
-        debugf3("%s()\n", __func__);
+        edac_dbg(3, "\n");
        pci_unregister_driver(&i82860_driver);
diff --git a/drivers/edac/i82875p_edac.c b/drivers/edac/i82875p_edac.c
index b613e31c16e5..3e416b1a6b53 100644
--- a/drivers/edac/i82875p_edac.c
+++ b/drivers/edac/i82875p_edac.c
@@ -189,7 +189,7 @@ static void i82875p_get_error_info(struct mem_ctl_info *mci,
 {
        struct pci_dev *pdev;
-        pdev = to_pci_dev(mci->dev);
+        pdev = to_pci_dev(mci->pdev);
        /*
         * This is a mess because there is no atomic way to read all the
@@ -227,7 +227,7 @@ static int i82875p_process_error_info(struct mem_ctl_info *mci,
 {
        int row, multi_chan;
-        multi_chan = mci->csrows[0].nr_channels - 1;
+        multi_chan = mci->csrows[0]->nr_channels - 1;
        if (!(info->errsts & 0x0081))
                return 0;
@@ -236,9 +236,9 @@ static int i82875p_process_error_info(struct mem_ctl_info *mci,
                return 1;
        if ((info->errsts ^ info->errsts2) & 0x0081) {
-                edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 0, 0, 0,
+                edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 1, 0, 0, 0,
                                     -1, -1, -1,
-                                     "UE overwrote CE", "", NULL);
+                                     "UE overwrote CE", "");
                info->errsts = info->errsts2;
        }
@@ -246,15 +246,15 @@ static int i82875p_process_error_info(struct mem_ctl_info *mci,
        row = edac_mc_find_csrow_by_page(mci, info->eap);
        if (info->errsts & 0x0080)
-                edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci,
+                edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 1,
                                     info->eap, 0, 0,
                                     row, -1, -1,
-                                     "i82875p UE", "", NULL);
+                                     "i82875p UE", "");
        else
-                edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci,
+                edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, 1,
                                     info->eap, 0, info->derrsyn,
                                     row, multi_chan ? (info->des & 0x1) : 0,
-                                     -1, "i82875p CE", "", NULL);
+                                     -1, "i82875p CE", "");
        return 1;
 }
@@ -263,7 +263,7 @@ static void i82875p_check(struct mem_ctl_info *mci)
 {
        struct i82875p_error_info info;
-        debugf1("MC%d: %s()\n", mci->mc_idx, __func__);
+        edac_dbg(1, "MC%d\n", mci->mc_idx);
        i82875p_get_error_info(mci, &info);
        i82875p_process_error_info(mci, &info, 1);
 }
@@ -367,12 +367,11 @@ static void i82875p_init_csrows(struct mem_ctl_info *mci,
         */
        for (index = 0; index < mci->nr_csrows; index++) {
-                csrow = &mci->csrows[index];
+                csrow = mci->csrows[index];
                value = readb(ovrfl_window + I82875P_DRB + index);
                cumul_size = value << (I82875P_DRB_SHIFT - PAGE_SHIFT);
-                debugf3("%s(): (%d) cumul_size 0x%x\n", __func__, index,
+                edac_dbg(3, "(%d) cumul_size 0x%x\n", index, cumul_size);
-                        cumul_size);
                if (cumul_size == last_cumul_size)
                        continue;       /* not populated */
@@ -382,7 +381,7 @@ static void i82875p_init_csrows(struct mem_ctl_info *mci,
                last_cumul_size = cumul_size;
                for (j = 0; j < nr_chans; j++) {
-                        dimm = csrow->channels[j].dimm;
+                        dimm = csrow->channels[j]->dimm;
                        dimm->nr_pages = nr_pages / nr_chans;
                        dimm->grain = 1 << 12;  /* I82875P_EAP has 4KiB reolution */
@@ -405,7 +404,7 @@ static int i82875p_probe1(struct pci_dev *pdev, int dev_idx)
        u32 nr_chans;
        struct i82875p_error_info discard;
-        debugf0("%s()\n", __func__);
+        edac_dbg(0, "\n");
        ovrfl_pdev = pci_get_device(PCI_VEND_DEV(INTEL, 82875_6), NULL);
@@ -426,11 +425,8 @@ static int i82875p_probe1(struct pci_dev *pdev, int dev_idx)
                goto fail0;
        }
-        /* Keeps mci available after edac_mc_del_mc() till edac_mc_free() */
+        edac_dbg(3, "init mci\n");
-        kobject_get(&mci->edac_mci_kobj);
+        mci->pdev = &pdev->dev;
-        debugf3("%s(): init mci\n", __func__);
-        mci->dev = &pdev->dev;
        mci->mtype_cap = MEM_FLAG_DDR;
        mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_SECDED;
        mci->edac_cap = EDAC_FLAG_UNKNOWN;
@@ -440,7 +436,7 @@ static int i82875p_probe1(struct pci_dev *pdev, int dev_idx)
        mci->dev_name = pci_name(pdev);
        mci->edac_check = i82875p_check;
        mci->ctl_page_to_phys = NULL;
-        debugf3("%s(): init pvt\n", __func__);
+        edac_dbg(3, "init pvt\n");
        pvt = (struct i82875p_pvt *)mci->pvt_info;
        pvt->ovrfl_pdev = ovrfl_pdev;
        pvt->ovrfl_window = ovrfl_window;
@@ -451,7 +447,7 @@ static int i82875p_probe1(struct pci_dev *pdev, int dev_idx)
         * type of memory controller.  The ID is therefore hardcoded to 0.
         */
        if (edac_mc_add_mc(mci)) {
-                debugf3("%s(): failed edac_mc_add_mc()\n", __func__);
+                edac_dbg(3, "failed edac_mc_add_mc()\n");
                goto fail1;
        }
@@ -467,11 +463,10 @@ static int i82875p_probe1(struct pci_dev *pdev, int dev_idx)
        }
        /* get this far and it's successful */
-        debugf3("%s(): success\n", __func__);
+        edac_dbg(3, "success\n");
        return 0;
 fail1:
-        kobject_put(&mci->edac_mci_kobj);
        edac_mc_free(mci);
 fail0:
@@ -489,7 +484,7 @@ static int __devinit i82875p_init_one(struct pci_dev *pdev,
 {
        int rc;
-        debugf0("%s()\n", __func__);
+        edac_dbg(0, "\n");
        i82875p_printk(KERN_INFO, "i82875p init one\n");
        if (pci_enable_device(pdev) < 0)
@@ -508,7 +503,7 @@ static void __devexit i82875p_remove_one(struct pci_dev *pdev)
        struct mem_ctl_info *mci;
        struct i82875p_pvt *pvt = NULL;
-        debugf0("%s()\n", __func__);
+        edac_dbg(0, "\n");
        if (i82875p_pci)
                edac_pci_release_generic_ctl(i82875p_pci);
@@ -554,7 +549,7 @@ static int __init i82875p_init(void)
 {
        int pci_rc;
-        debugf3("%s()\n", __func__);
+        edac_dbg(3, "\n");
       /* Ensure that the OPSTATE is set correctly for POLL or NMI */
       opstate_init();
@@ -569,7 +564,7 @@ static int __init i82875p_init(void)
                                        PCI_DEVICE_ID_INTEL_82875_0, NULL);
                if (!mci_pdev) {
-                        debugf0("875p pci_get_device fail\n");
+                        edac_dbg(0, "875p pci_get_device fail\n");
                        pci_rc = -ENODEV;
                        goto fail1;
                }
@@ -577,7 +572,7 @@ static int __init i82875p_init(void)
                pci_rc = i82875p_init_one(mci_pdev, i82875p_pci_tbl);
                if (pci_rc < 0) {
-                        debugf0("875p init fail\n");
+                        edac_dbg(0, "875p init fail\n");
                        pci_rc = -ENODEV;
                        goto fail1;
                }
@@ -597,7 +592,7 @@ fail0:
 static void __exit i82875p_exit(void)
 {
-        debugf3("%s()\n", __func__);
+        edac_dbg(3, "\n");
        i82875p_remove_one(mci_pdev);
        pci_dev_put(mci_pdev);
diff --git a/drivers/edac/i82975x_edac.c b/drivers/edac/i82975x_edac.c
index 433332c7cdba..069e26c11c4f 100644
--- a/drivers/edac/i82975x_edac.c
+++ b/drivers/edac/i82975x_edac.c
@@ -241,7 +241,7 @@ static void i82975x_get_error_info(struct mem_ctl_info *mci,
 {
        struct pci_dev *pdev;
-        pdev = to_pci_dev(mci->dev);
+        pdev = to_pci_dev(mci->pdev);
        /*
         * This is a mess because there is no atomic way to read all the
@@ -288,8 +288,8 @@ static int i82975x_process_error_info(struct mem_ctl_info *mci,
                return 1;
        if ((info->errsts ^ info->errsts2) & 0x0003) {
-                edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 0, 0, 0,
+                edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 1, 0, 0, 0,
-                                     -1, -1, -1, "UE overwrote CE", "", NULL);
+                                     -1, -1, -1, "UE overwrote CE", "");
                info->errsts = info->errsts2;
        }
@@ -308,21 +308,21 @@ static int i82975x_process_error_info(struct mem_ctl_info *mci,
                        (info->xeap & 1) ? 1 : 0, info->eap, (unsigned int) page);
                return 0;
        }
-        chan = (mci->csrows[row].nr_channels == 1) ? 0 : info->eap & 1;
+        chan = (mci->csrows[row]->nr_channels == 1) ? 0 : info->eap & 1;
        offst = info->eap
                        & ((1 << PAGE_SHIFT) -
-                           (1 << mci->csrows[row].channels[chan].dimm->grain));
+                           (1 << mci->csrows[row]->channels[chan]->dimm->grain));
        if (info->errsts & 0x0002)
-                edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci,
+                edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 1,
                                     page, offst, 0,
                                     row, -1, -1,
-                                     "i82975x UE", "", NULL);
+                                     "i82975x UE", "");
        else
-                edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci,
+                edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, 1,
                                     page, offst, info->derrsyn,
                                     row, chan ? chan : 0, -1,
-                                     "i82975x CE", "", NULL);
+                                     "i82975x CE", "");
        return 1;
 }
@@ -331,7 +331,7 @@ static void i82975x_check(struct mem_ctl_info *mci)
 {
        struct i82975x_error_info info;
-        debugf1("MC%d: %s()\n", mci->mc_idx, __func__);
+        edac_dbg(1, "MC%d\n", mci->mc_idx);
        i82975x_get_error_info(mci, &info);
        i82975x_process_error_info(mci, &info, 1);
 }
@@ -394,7 +394,7 @@ static void i82975x_init_csrows(struct mem_ctl_info *mci,
         */
        for (index = 0; index < mci->nr_csrows; index++) {
-                csrow = &mci->csrows[index];
+                csrow = mci->csrows[index];
                value = readb(mch_window + I82975X_DRB + index +
                                        ((index >= 4) ? 0x80 : 0));
@@ -406,8 +406,7 @@ static void i82975x_init_csrows(struct mem_ctl_info *mci,
                 */
                if (csrow->nr_channels > 1)
                        cumul_size <<= 1;
-                debugf3("%s(): (%d) cumul_size 0x%x\n", __func__, index,
+                edac_dbg(3, "(%d) cumul_size 0x%x\n", index, cumul_size);
-                        cumul_size);
                nr_pages = cumul_size - last_cumul_size;
                if (!nr_pages)
@@ -421,10 +420,10 @@ static void i82975x_init_csrows(struct mem_ctl_info *mci,
                 */
                dtype = i82975x_dram_type(mch_window, index);
                for (chan = 0; chan < csrow->nr_channels; chan++) {
-                        dimm = mci->csrows[index].channels[chan].dimm;
+                        dimm = mci->csrows[index]->channels[chan]->dimm;
                        dimm->nr_pages = nr_pages / csrow->nr_channels;
-                        strncpy(csrow->channels[chan].dimm->label,
+                        strncpy(csrow->channels[chan]->dimm->label,
                                        labels[(index >> 1) + (chan * 2)],
                                        EDAC_MC_LABEL_LEN);
                        dimm->grain = 1 << 7;   /* 128Byte cache-line resolution */
@@ -489,11 +488,11 @@ static int i82975x_probe1(struct pci_dev *pdev, int dev_idx)
        u8 c1drb[4];
 #endif
-        debugf0("%s()\n", __func__);
+        edac_dbg(0, "\n");
        pci_read_config_dword(pdev, I82975X_MCHBAR, &mchbar);
        if (!(mchbar & 1)) {
-                debugf3("%s(): failed, MCHBAR disabled!\n", __func__);
+                edac_dbg(3, "failed, MCHBAR disabled!\n");
                goto fail0;
        }
        mchbar &= 0xffffc000;   /* bits 31:14 used for 16K window */
@@ -558,8 +557,8 @@ static int i82975x_probe1(struct pci_dev *pdev, int dev_idx)
                goto fail1;
        }
-        debugf3("%s(): init mci\n", __func__);
+        edac_dbg(3, "init mci\n");
-        mci->dev = &pdev->dev;
+        mci->pdev = &pdev->dev;
        mci->mtype_cap = MEM_FLAG_DDR2;
        mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_SECDED;
        mci->edac_cap = EDAC_FLAG_NONE | EDAC_FLAG_SECDED;
@@ -569,7 +568,7 @@ static int i82975x_probe1(struct pci_dev *pdev, int dev_idx)
        mci->dev_name = pci_name(pdev);
        mci->edac_check = i82975x_check;
        mci->ctl_page_to_phys = NULL;
-        debugf3("%s(): init pvt\n", __func__);
+        edac_dbg(3, "init pvt\n");
        pvt = (struct i82975x_pvt *) mci->pvt_info;
        pvt->mch_window = mch_window;
        i82975x_init_csrows(mci, pdev, mch_window);
@@ -578,12 +577,12 @@ static int i82975x_probe1(struct pci_dev *pdev, int dev_idx)
        /* finalize this instance of memory controller with edac core */
        if (edac_mc_add_mc(mci)) {
-                debugf3("%s(): failed edac_mc_add_mc()\n", __func__);
+                edac_dbg(3, "failed edac_mc_add_mc()\n");
                goto fail2;
        }
        /* get this far and it's successful */
-        debugf3("%s(): success\n", __func__);
+        edac_dbg(3, "success\n");
        return 0;
 fail2:
@@ -601,7 +600,7 @@ static int __devinit i82975x_init_one(struct pci_dev *pdev,
 {
        int rc;
-        debugf0("%s()\n", __func__);
+        edac_dbg(0, "\n");
        if (pci_enable_device(pdev) < 0)
                return -EIO;
@@ -619,7 +618,7 @@ static void __devexit i82975x_remove_one(struct pci_dev *pdev)
        struct mem_ctl_info *mci;
        struct i82975x_pvt *pvt;
-        debugf0("%s()\n", __func__);
+        edac_dbg(0, "\n");
        mci = edac_mc_del_mc(&pdev->dev);
        if (mci  == NULL)
@@ -655,7 +654,7 @@ static int __init i82975x_init(void)
 {
        int pci_rc;
-        debugf3("%s()\n", __func__);
+        edac_dbg(3, "\n");
       /* Ensure that the OPSTATE is set correctly for POLL or NMI */
       opstate_init();
@@ -669,7 +668,7 @@ static int __init i82975x_init(void)
                                PCI_DEVICE_ID_INTEL_82975_0, NULL);
                if (!mci_pdev) {
-                        debugf0("i82975x pci_get_device fail\n");
+                        edac_dbg(0, "i82975x pci_get_device fail\n");
                        pci_rc = -ENODEV;
                        goto fail1;
                }
@@ -677,7 +676,7 @@ static int __init i82975x_init(void)
                pci_rc = i82975x_init_one(mci_pdev, i82975x_pci_tbl);
                if (pci_rc < 0) {
-                        debugf0("i82975x init fail\n");
+                        edac_dbg(0, "i82975x init fail\n");
                        pci_rc = -ENODEV;
                        goto fail1;
                }
@@ -697,7 +696,7 @@ fail0:
 static void __exit i82975x_exit(void)
 {
-        debugf3("%s()\n", __func__);
+        edac_dbg(3, "\n");
        pci_unregister_driver(&i82975x_driver);
diff --git a/drivers/edac/mpc85xx_edac.c b/drivers/edac/mpc85xx_edac.c
index 4c402353ba98..a1e791ec25d3 100644
--- a/drivers/edac/mpc85xx_edac.c
+++ b/drivers/edac/mpc85xx_edac.c
@@ -49,34 +49,45 @@ static u32 orig_hid1[2];
 /************************ MC SYSFS parts ***********************************/
-static ssize_t mpc85xx_mc_inject_data_hi_show(struct mem_ctl_info *mci,
+#define to_mci(k) container_of(k, struct mem_ctl_info, dev)
+static ssize_t mpc85xx_mc_inject_data_hi_show(struct device *dev,
+                                              struct device_attribute *mattr,
                                              char *data)
 {
+        struct mem_ctl_info *mci = to_mci(dev);
        struct mpc85xx_mc_pdata *pdata = mci->pvt_info;
        return sprintf(data, "0x%08x",
                       in_be32(pdata->mc_vbase +
                               MPC85XX_MC_DATA_ERR_INJECT_HI));
 }
-static ssize_t mpc85xx_mc_inject_data_lo_show(struct mem_ctl_info *mci,
+static ssize_t mpc85xx_mc_inject_data_lo_show(struct device *dev,
+                                              struct device_attribute *mattr,
                                              char *data)
 {
+        struct mem_ctl_info *mci = to_mci(dev);
        struct mpc85xx_mc_pdata *pdata = mci->pvt_info;
        return sprintf(data, "0x%08x",
                       in_be32(pdata->mc_vbase +
                               MPC85XX_MC_DATA_ERR_INJECT_LO));
 }
-static ssize_t mpc85xx_mc_inject_ctrl_show(struct mem_ctl_info *mci, char *data)
+static ssize_t mpc85xx_mc_inject_ctrl_show(struct device *dev,
+                                           struct device_attribute *mattr,
+                                           char *data)
 {
+        struct mem_ctl_info *mci = to_mci(dev);
        struct mpc85xx_mc_pdata *pdata = mci->pvt_info;
        return sprintf(data, "0x%08x",
                       in_be32(pdata->mc_vbase + MPC85XX_MC_ECC_ERR_INJECT));
 }
-static ssize_t mpc85xx_mc_inject_data_hi_store(struct mem_ctl_info *mci,
+static ssize_t mpc85xx_mc_inject_data_hi_store(struct device *dev,
+                                               struct device_attribute *mattr,
                                               const char *data, size_t count)
 {
+        struct mem_ctl_info *mci = to_mci(dev);
        struct mpc85xx_mc_pdata *pdata = mci->pvt_info;
        if (isdigit(*data)) {
                out_be32(pdata->mc_vbase + MPC85XX_MC_DATA_ERR_INJECT_HI,
@@ -86,9 +97,11 @@ static ssize_t mpc85xx_mc_inject_data_hi_store(struct mem_ctl_info *mci,
        return 0;
 }
-static ssize_t mpc85xx_mc_inject_data_lo_store(struct mem_ctl_info *mci,
+static ssize_t mpc85xx_mc_inject_data_lo_store(struct device *dev,
+                                               struct device_attribute *mattr,
                                               const char *data, size_t count)
 {
+        struct mem_ctl_info *mci = to_mci(dev);
        struct mpc85xx_mc_pdata *pdata = mci->pvt_info;
        if (isdigit(*data)) {
                out_be32(pdata->mc_vbase + MPC85XX_MC_DATA_ERR_INJECT_LO,
@@ -98,9 +111,11 @@ static ssize_t mpc85xx_mc_inject_data_lo_store(struct mem_ctl_info *mci,
        return 0;
 }
-static ssize_t mpc85xx_mc_inject_ctrl_store(struct mem_ctl_info *mci,
+static ssize_t mpc85xx_mc_inject_ctrl_store(struct device *dev,
-                                            const char *data, size_t count)
+                                               struct device_attribute *mattr,
+                                               const char *data, size_t count)
 {
+        struct mem_ctl_info *mci = to_mci(dev);
        struct mpc85xx_mc_pdata *pdata = mci->pvt_info;
        if (isdigit(*data)) {
                out_be32(pdata->mc_vbase + MPC85XX_MC_ECC_ERR_INJECT,
@@ -110,38 +125,35 @@ static ssize_t mpc85xx_mc_inject_ctrl_store(struct mem_ctl_info *mci,
        return 0;
 }
-static struct mcidev_sysfs_attribute mpc85xx_mc_sysfs_attributes[] = {
+DEVICE_ATTR(inject_data_hi, S_IRUGO | S_IWUSR,
-        {
+            mpc85xx_mc_inject_data_hi_show, mpc85xx_mc_inject_data_hi_store);
-         .attr = {
+DEVICE_ATTR(inject_data_lo, S_IRUGO | S_IWUSR,
-                  .name = "inject_data_hi",
+            mpc85xx_mc_inject_data_lo_show, mpc85xx_mc_inject_data_lo_store);
-                  .mode = (S_IRUGO | S_IWUSR)
+DEVICE_ATTR(inject_ctrl, S_IRUGO | S_IWUSR,
-                  },
+            mpc85xx_mc_inject_ctrl_show, mpc85xx_mc_inject_ctrl_store);
-         .show = mpc85xx_mc_inject_data_hi_show,
-         .store = mpc85xx_mc_inject_data_hi_store},
-        {
-         .attr = {
-                  .name = "inject_data_lo",
-                  .mode = (S_IRUGO | S_IWUSR)
-                  },
-         .show = mpc85xx_mc_inject_data_lo_show,
-         .store = mpc85xx_mc_inject_data_lo_store},
-        {
-         .attr = {
-                  .name = "inject_ctrl",
-                  .mode = (S_IRUGO | S_IWUSR)
-                  },
-         .show = mpc85xx_mc_inject_ctrl_show,
-         .store = mpc85xx_mc_inject_ctrl_store},
-        /* End of list */
+static int mpc85xx_create_sysfs_attributes(struct mem_ctl_info *mci)
-        {
+{
-         .attr = {.name = NULL}
+        int rc;
-         }
-};
+        rc = device_create_file(&mci->dev, &dev_attr_inject_data_hi);
+        if (rc < 0)
+                return rc;
+        rc = device_create_file(&mci->dev, &dev_attr_inject_data_lo);
+        if (rc < 0)
+                return rc;
+        rc = device_create_file(&mci->dev, &dev_attr_inject_ctrl);
+        if (rc < 0)
+                return rc;
-static void mpc85xx_set_mc_sysfs_attributes(struct mem_ctl_info *mci)
+        return 0;
+}
+static void mpc85xx_remove_sysfs_attributes(struct mem_ctl_info *mci)
 {
-        mci->mc_driver_sysfs_attributes = mpc85xx_mc_sysfs_attributes;
+        device_remove_file(&mci->dev, &dev_attr_inject_data_hi);
+        device_remove_file(&mci->dev, &dev_attr_inject_data_lo);
+        device_remove_file(&mci->dev, &dev_attr_inject_ctrl);
 }
 /**************************** PCI Err device ***************************/
@@ -268,7 +280,7 @@ static int __devinit mpc85xx_pci_err_probe(struct platform_device *op)
        out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_DR, ~0);
        if (edac_pci_add_device(pci, pdata->edac_idx) > 0) {
-                debugf3("%s(): failed edac_pci_add_device()\n", __func__);
+                edac_dbg(3, "failed edac_pci_add_device()\n");
                goto err;
        }
@@ -291,7 +303,7 @@ static int __devinit mpc85xx_pci_err_probe(struct platform_device *op)
        }
        devres_remove_group(&op->dev, mpc85xx_pci_err_probe);
-        debugf3("%s(): success\n", __func__);
+        edac_dbg(3, "success\n");
        printk(KERN_INFO EDAC_MOD_STR " PCI err registered\n");
        return 0;
@@ -309,7 +321,7 @@ static int mpc85xx_pci_err_remove(struct platform_device *op)
        struct edac_pci_ctl_info *pci = dev_get_drvdata(&op->dev);
        struct mpc85xx_pci_pdata *pdata = pci->pvt_info;
-        debugf0("%s()\n", __func__);
+        edac_dbg(0, "\n");
        out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_CAP_DR,
                 orig_pci_err_cap_dr);
@@ -570,7 +582,7 @@ static int __devinit mpc85xx_l2_err_probe(struct platform_device *op)
        pdata->edac_idx = edac_dev_idx++;
        if (edac_device_add_device(edac_dev) > 0) {
-                debugf3("%s(): failed edac_device_add_device()\n", __func__);
+                edac_dbg(3, "failed edac_device_add_device()\n");
                goto err;
        }
@@ -598,7 +610,7 @@ static int __devinit mpc85xx_l2_err_probe(struct platform_device *op)
        devres_remove_group(&op->dev, mpc85xx_l2_err_probe);
-        debugf3("%s(): success\n", __func__);
+        edac_dbg(3, "success\n");
        printk(KERN_INFO EDAC_MOD_STR " L2 err registered\n");
        return 0;
@@ -616,7 +628,7 @@ static int mpc85xx_l2_err_remove(struct platform_device *op)
        struct edac_device_ctl_info *edac_dev = dev_get_drvdata(&op->dev);
        struct mpc85xx_l2_pdata *pdata = edac_dev->pvt_info;
-        debugf0("%s()\n", __func__);
+        edac_dbg(0, "\n");
        if (edac_op_state == EDAC_OPSTATE_INT) {
                out_be32(pdata->l2_vbase + MPC85XX_L2_ERRINTEN, 0);
@@ -813,7 +825,7 @@ static void mpc85xx_mc_check(struct mem_ctl_info *mci)
        pfn = err_addr >> PAGE_SHIFT;
        for (row_index = 0; row_index < mci->nr_csrows; row_index++) {
-                csrow = &mci->csrows[row_index];
+                csrow = mci->csrows[row_index];
                if ((pfn >= csrow->first_page) && (pfn <= csrow->last_page))
                        break;
        }
@@ -854,16 +866,16 @@ static void mpc85xx_mc_check(struct mem_ctl_info *mci)
                mpc85xx_mc_printk(mci, KERN_ERR, "PFN out of range!\n");
        if (err_detect & DDR_EDE_SBE)
-                edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci,
+                edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, 1,
                                     pfn, err_addr & ~PAGE_MASK, syndrome,
                                     row_index, 0, -1,
-                                     mci->ctl_name, "", NULL);
+                                     mci->ctl_name, "");
        if (err_detect & DDR_EDE_MBE)
-                edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci,
+                edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 1,
                                     pfn, err_addr & ~PAGE_MASK, syndrome,
                                     row_index, 0, -1,
-                                     mci->ctl_name, "", NULL);
+                                     mci->ctl_name, "");
        out_be32(pdata->mc_vbase + MPC85XX_MC_ERR_DETECT, err_detect);
 }
@@ -933,8 +945,8 @@ static void __devinit mpc85xx_init_csrows(struct mem_ctl_info *mci)
                u32 start;
                u32 end;
-                csrow = &mci->csrows[index];
+                csrow = mci->csrows[index];
-                dimm = csrow->channels[0].dimm;
+                dimm = csrow->channels[0]->dimm;
                cs_bnds = in_be32(pdata->mc_vbase + MPC85XX_MC_CS_BNDS_0 +
                                  (index * MPC85XX_MC_CS_BNDS_OFS));
@@ -980,7 +992,8 @@ static int __devinit mpc85xx_mc_err_probe(struct platform_device *op)
        layers[1].type = EDAC_MC_LAYER_CHANNEL;
        layers[1].size = 1;
        layers[1].is_virt_csrow = false;
-        mci = edac_mc_alloc(edac_mc_idx, ARRAY_SIZE(layers), sizeof(*pdata));
+        mci = edac_mc_alloc(edac_mc_idx, ARRAY_SIZE(layers), layers,
+                            sizeof(*pdata));
        if (!mci) {
                devres_release_group(&op->dev, mpc85xx_mc_err_probe);
                return -ENOMEM;
@@ -989,9 +1002,9 @@ static int __devinit mpc85xx_mc_err_probe(struct platform_device *op)
        pdata = mci->pvt_info;
        pdata->name = "mpc85xx_mc_err";
        pdata->irq = NO_IRQ;
-        mci->dev = &op->dev;
+        mci->pdev = &op->dev;
        pdata->edac_idx = edac_mc_idx++;
-        dev_set_drvdata(mci->dev, mci);
+        dev_set_drvdata(mci->pdev, mci);
        mci->ctl_name = pdata->name;
        mci->dev_name = pdata->name;
@@ -1025,7 +1038,7 @@ static int __devinit mpc85xx_mc_err_probe(struct platform_device *op)
                goto err;
        }
-        debugf3("%s(): init mci\n", __func__);
+        edac_dbg(3, "init mci\n");
        mci->mtype_cap = MEM_FLAG_RDDR | MEM_FLAG_RDDR2 |
            MEM_FLAG_DDR | MEM_FLAG_DDR2;
        mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_SECDED;
@@ -1040,8 +1053,6 @@ static int __devinit mpc85xx_mc_err_probe(struct platform_device *op)
        mci->scrub_mode = SCRUB_SW_SRC;
-        mpc85xx_set_mc_sysfs_attributes(mci);
        mpc85xx_init_csrows(mci);
        /* store the original error disable bits */
@@ -1053,7 +1064,13 @@ static int __devinit mpc85xx_mc_err_probe(struct platform_device *op)
        out_be32(pdata->mc_vbase + MPC85XX_MC_ERR_DETECT, ~0);
        if (edac_mc_add_mc(mci)) {
-                debugf3("%s(): failed edac_mc_add_mc()\n", __func__);
+                edac_dbg(3, "failed edac_mc_add_mc()\n");
+                goto err;
+        }
+        if (mpc85xx_create_sysfs_attributes(mci)) {
+                edac_mc_del_mc(mci->pdev);
+                edac_dbg(3, "failed edac_mc_add_mc()\n");
                goto err;
        }
@@ -1087,7 +1104,7 @@ static int __devinit mpc85xx_mc_err_probe(struct platform_device *op)
        }
        devres_remove_group(&op->dev, mpc85xx_mc_err_probe);
-        debugf3("%s(): success\n", __func__);
+        edac_dbg(3, "success\n");
        printk(KERN_INFO EDAC_MOD_STR " MC err registered\n");
        return 0;
@@ -1105,7 +1122,7 @@ static int mpc85xx_mc_err_remove(struct platform_device *op)
        struct mem_ctl_info *mci = dev_get_drvdata(&op->dev);
        struct mpc85xx_mc_pdata *pdata = mci->pvt_info;
-        debugf0("%s()\n", __func__);
+        edac_dbg(0, "\n");
        if (edac_op_state == EDAC_OPSTATE_INT) {
                out_be32(pdata->mc_vbase + MPC85XX_MC_ERR_INT_EN, 0);
@@ -1116,6 +1133,7 @@ static int mpc85xx_mc_err_remove(struct platform_device *op)
                 orig_ddr_err_disable);
        out_be32(pdata->mc_vbase + MPC85XX_MC_ERR_SBE, orig_ddr_err_sbe);
+        mpc85xx_remove_sysfs_attributes(mci);
        edac_mc_del_mc(&op->dev);
        edac_mc_free(mci);
        return 0;
diff --git a/drivers/edac/mv64x60_edac.c b/drivers/edac/mv64x60_edac.c
index b0bb5a3d2527..2b315c2edc3c 100644
--- a/drivers/edac/mv64x60_edac.c
+++ b/drivers/edac/mv64x60_edac.c
@@ -169,7 +169,7 @@ static int __devinit mv64x60_pci_err_probe(struct platform_device *pdev)
                 MV64X60_PCIx_ERR_MASK_VAL);
        if (edac_pci_add_device(pci, pdata->edac_idx) > 0) {
-                debugf3("%s(): failed edac_pci_add_device()\n", __func__);
+                edac_dbg(3, "failed edac_pci_add_device()\n");
                goto err;
        }
@@ -194,7 +194,7 @@ static int __devinit mv64x60_pci_err_probe(struct platform_device *pdev)
        devres_remove_group(&pdev->dev, mv64x60_pci_err_probe);
        /* get this far and it's successful */
-        debugf3("%s(): success\n", __func__);
+        edac_dbg(3, "success\n");
        return 0;
@@ -210,7 +210,7 @@ static int mv64x60_pci_err_remove(struct platform_device *pdev)
 {
        struct edac_pci_ctl_info *pci = platform_get_drvdata(pdev);
-        debugf0("%s()\n", __func__);
+        edac_dbg(0, "\n");
        edac_pci_del_device(&pdev->dev);
@@ -336,7 +336,7 @@ static int __devinit mv64x60_sram_err_probe(struct platform_device *pdev)
        pdata->edac_idx = edac_dev_idx++;
        if (edac_device_add_device(edac_dev) > 0) {
-                debugf3("%s(): failed edac_device_add_device()\n", __func__);
+                edac_dbg(3, "failed edac_device_add_device()\n");
                goto err;
        }
@@ -363,7 +363,7 @@ static int __devinit mv64x60_sram_err_probe(struct platform_device *pdev)
        devres_remove_group(&pdev->dev, mv64x60_sram_err_probe);
        /* get this far and it's successful */
-        debugf3("%s(): success\n", __func__);
+        edac_dbg(3, "success\n");
        return 0;
@@ -379,7 +379,7 @@ static int mv64x60_sram_err_remove(struct platform_device *pdev)
 {
        struct edac_device_ctl_info *edac_dev = platform_get_drvdata(pdev);
-        debugf0("%s()\n", __func__);
+        edac_dbg(0, "\n");
        edac_device_del_device(&pdev->dev);
        edac_device_free_ctl_info(edac_dev);
@@ -531,7 +531,7 @@ static int __devinit mv64x60_cpu_err_probe(struct platform_device *pdev)
        pdata->edac_idx = edac_dev_idx++;
        if (edac_device_add_device(edac_dev) > 0) {
-                debugf3("%s(): failed edac_device_add_device()\n", __func__);
+                edac_dbg(3, "failed edac_device_add_device()\n");
                goto err;
        }
@@ -558,7 +558,7 @@ static int __devinit mv64x60_cpu_err_probe(struct platform_device *pdev)
        devres_remove_group(&pdev->dev, mv64x60_cpu_err_probe);
        /* get this far and it's successful */
-        debugf3("%s(): success\n", __func__);
+        edac_dbg(3, "success\n");
        return 0;
@@ -574,7 +574,7 @@ static int mv64x60_cpu_err_remove(struct platform_device *pdev)
 {
        struct edac_device_ctl_info *edac_dev = platform_get_drvdata(pdev);
-        debugf0("%s()\n", __func__);
+        edac_dbg(0, "\n");
        edac_device_del_device(&pdev->dev);
        edac_device_free_ctl_info(edac_dev);
@@ -611,17 +611,17 @@ static void mv64x60_mc_check(struct mem_ctl_info *mci)
        /* first bit clear in ECC Err Reg, 1 bit error, correctable by HW */
        if (!(reg & 0x1))
-                edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci,
+                edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, 1,
                                     err_addr >> PAGE_SHIFT,
                                     err_addr & PAGE_MASK, syndrome,
                                     0, 0, -1,
-                                     mci->ctl_name, "", NULL);
+                                     mci->ctl_name, "");
        else    /* 2 bit error, UE */
-                edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci,
+                edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 1,
                                     err_addr >> PAGE_SHIFT,
                                     err_addr & PAGE_MASK, 0,
                                     0, 0, -1,
-                                     mci->ctl_name, "", NULL);
+                                     mci->ctl_name, "");
        /* clear the error */
        out_le32(pdata->mc_vbase + MV64X60_SDRAM_ERR_ADDR, 0);
@@ -670,8 +670,8 @@ static void mv64x60_init_csrows(struct mem_ctl_info *mci,
        ctl = in_le32(pdata->mc_vbase + MV64X60_SDRAM_CONFIG);
-        csrow = &mci->csrows[0];
+        csrow = mci->csrows[0];
-        dimm = csrow->channels[0].dimm;
+        dimm = csrow->channels[0]->dimm;
        dimm->nr_pages = pdata->total_mem >> PAGE_SHIFT;
        dimm->grain = 8;
@@ -724,7 +724,7 @@ static int __devinit mv64x60_mc_err_probe(struct platform_device *pdev)
        }
        pdata = mci->pvt_info;
-        mci->dev = &pdev->dev;
+        mci->pdev = &pdev->dev;
        platform_set_drvdata(pdev, mci);
        pdata->name = "mv64x60_mc_err";
        pdata->irq = NO_IRQ;
@@ -766,7 +766,7 @@ static int __devinit mv64x60_mc_err_probe(struct platform_device *pdev)
                goto err2;
        }
-        debugf3("%s(): init mci\n", __func__);
+        edac_dbg(3, "init mci\n");
        mci->mtype_cap = MEM_FLAG_RDDR | MEM_FLAG_DDR;
        mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_SECDED;
        mci->edac_cap = EDAC_FLAG_SECDED;
@@ -790,7 +790,7 @@ static int __devinit mv64x60_mc_err_probe(struct platform_device *pdev)
        out_le32(pdata->mc_vbase + MV64X60_SDRAM_ERR_ECC_CNTL, ctl);
        if (edac_mc_add_mc(mci)) {
-                debugf3("%s(): failed edac_mc_add_mc()\n", __func__);
+                edac_dbg(3, "failed edac_mc_add_mc()\n");
                goto err;
        }
@@ -815,7 +815,7 @@ static int __devinit mv64x60_mc_err_probe(struct platform_device *pdev)
        }
        /* get this far and it's successful */
-        debugf3("%s(): success\n", __func__);
+        edac_dbg(3, "success\n");
        return 0;
@@ -831,7 +831,7 @@ static int mv64x60_mc_err_remove(struct platform_device *pdev)
 {
        struct mem_ctl_info *mci = platform_get_drvdata(pdev);
-        debugf0("%s()\n", __func__);
+        edac_dbg(0, "\n");
        edac_mc_del_mc(&pdev->dev);
        edac_mc_free(mci);
diff --git a/drivers/edac/pasemi_edac.c b/drivers/edac/pasemi_edac.c
index b095a906a994..2d35b78ada3c 100644
--- a/drivers/edac/pasemi_edac.c
+++ b/drivers/edac/pasemi_edac.c
@@ -74,7 +74,7 @@ static int system_mmc_id;
 static u32 pasemi_edac_get_error_info(struct mem_ctl_info *mci)
 {
-        struct pci_dev *pdev = to_pci_dev(mci->dev);
+        struct pci_dev *pdev = to_pci_dev(mci->pdev);
        u32 tmp;
        pci_read_config_dword(pdev, MCDEBUG_ERRSTA,
@@ -95,7 +95,7 @@ static u32 pasemi_edac_get_error_info(struct mem_ctl_info *mci)
 static void pasemi_edac_process_error_info(struct mem_ctl_info *mci, u32 errsta)
 {
-        struct pci_dev *pdev = to_pci_dev(mci->dev);
+        struct pci_dev *pdev = to_pci_dev(mci->pdev);
        u32 errlog1a;
        u32 cs;
@@ -110,16 +110,16 @@ static void pasemi_edac_process_error_info(struct mem_ctl_info *mci, u32 errsta)
        /* uncorrectable/multi-bit errors */
        if (errsta & (MCDEBUG_ERRSTA_MBE_STATUS |
                      MCDEBUG_ERRSTA_RFL_STATUS)) {
-                edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci,
+                edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 1,
-                                     mci->csrows[cs].first_page, 0, 0,
+                                     mci->csrows[cs]->first_page, 0, 0,
-                                     cs, 0, -1, mci->ctl_name, "", NULL);
+                                     cs, 0, -1, mci->ctl_name, "");
        }
        /* correctable/single-bit errors */
        if (errsta & MCDEBUG_ERRSTA_SBE_STATUS)
-                edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci,
+                edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, 1,
-                                     mci->csrows[cs].first_page, 0, 0,
+                                     mci->csrows[cs]->first_page, 0, 0,
-                                     cs, 0, -1, mci->ctl_name, "", NULL);
+                                     cs, 0, -1, mci->ctl_name, "");
 }
 static void pasemi_edac_check(struct mem_ctl_info *mci)
@@ -141,8 +141,8 @@ static int pasemi_edac_init_csrows(struct mem_ctl_info *mci,
        int index;
        for (index = 0; index < mci->nr_csrows; index++) {
-                csrow = &mci->csrows[index];
+                csrow = mci->csrows[index];
-                dimm = csrow->channels[0].dimm;
+                dimm = csrow->channels[0]->dimm;
                pci_read_config_dword(pdev,
                                      MCDRAM_RANKCFG + (index * 12),
@@ -225,7 +225,7 @@ static int __devinit pasemi_edac_probe(struct pci_dev *pdev,
                MCCFG_ERRCOR_ECC_GEN_EN |
                MCCFG_ERRCOR_ECC_CRR_EN;
-        mci->dev = &pdev->dev;
+        mci->pdev = &pdev->dev;
        mci->mtype_cap = MEM_FLAG_DDR | MEM_FLAG_RDDR;
        mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_EC | EDAC_FLAG_SECDED;
        mci->edac_cap = (errcor & MCCFG_ERRCOR_ECC_GEN_EN) ?
diff --git a/drivers/edac/ppc4xx_edac.c b/drivers/edac/ppc4xx_edac.c
index f3f9fed06ad7..bf0957635991 100644
--- a/drivers/edac/ppc4xx_edac.c
+++ b/drivers/edac/ppc4xx_edac.c
@@ -727,10 +727,10 @@ ppc4xx_edac_handle_ce(struct mem_ctl_info *mci,
        for (row = 0; row < mci->nr_csrows; row++)
                if (ppc4xx_edac_check_bank_error(status, row))
-                        edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci,
+                        edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, 1,
                                             0, 0, 0,
                                             row, 0, -1,
-                                             message, "", NULL);
+                                             message, "");
 }
 /**
@@ -758,10 +758,10 @@ ppc4xx_edac_handle_ue(struct mem_ctl_info *mci,
        for (row = 0; row < mci->nr_csrows; row++)
                if (ppc4xx_edac_check_bank_error(status, row))
-                        edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci,
+                        edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 1,
                                             page, offset, 0,
                                             row, 0, -1,
-                                             message, "", NULL);
+                                             message, "");
 }
 /**
@@ -1027,9 +1027,9 @@ ppc4xx_edac_mc_init(struct mem_ctl_info *mci,
        /* Initial driver pointers and private data */
-        mci->dev                = &op->dev;
+        mci->pdev               = &op->dev;
-        dev_set_drvdata(mci->dev, mci);
+        dev_set_drvdata(mci->pdev, mci);
        pdata                   = mci->pvt_info;
@@ -1334,7 +1334,7 @@ static int __devinit ppc4xx_edac_probe(struct platform_device *op)
        return 0;
 fail1:
-        edac_mc_del_mc(mci->dev);
+        edac_mc_del_mc(mci->pdev);
 fail:
        edac_mc_free(mci);
@@ -1368,7 +1368,7 @@ ppc4xx_edac_remove(struct platform_device *op)
        dcr_unmap(pdata->dcr_host, SDRAM_DCR_RESOURCE_LEN);
-        edac_mc_del_mc(mci->dev);
+        edac_mc_del_mc(mci->pdev);
        edac_mc_free(mci);
        return 0;
diff --git a/drivers/edac/r82600_edac.c b/drivers/edac/r82600_edac.c
index e1cacd164f31..f854debd5533 100644
--- a/drivers/edac/r82600_edac.c
+++ b/drivers/edac/r82600_edac.c
@@ -140,7 +140,7 @@ static void r82600_get_error_info(struct mem_ctl_info *mci,
 {
        struct pci_dev *pdev;
-        pdev = to_pci_dev(mci->dev);
+        pdev = to_pci_dev(mci->pdev);
        pci_read_config_dword(pdev, R82600_EAP, &info->eapr);
        if (info->eapr & BIT(0))
@@ -179,11 +179,11 @@ static int r82600_process_error_info(struct mem_ctl_info *mci,
                error_found = 1;
                if (handle_errors)
-                        edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci,
+                        edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, 1,
                                             page, 0, syndrome,
                                             edac_mc_find_csrow_by_page(mci, page),
                                             0, -1,
-                                             mci->ctl_name, "", NULL);
+                                             mci->ctl_name, "");
        }
        if (info->eapr & BIT(1)) {      /* UE? */
@@ -191,11 +191,11 @@ static int r82600_process_error_info(struct mem_ctl_info *mci,
                if (handle_errors)
                        /* 82600 doesn't give enough info */
-                        edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci,
+                        edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 1,
                                             page, 0, 0,
                                             edac_mc_find_csrow_by_page(mci, page),
                                             0, -1,
-                                             mci->ctl_name, "", NULL);
+                                             mci->ctl_name, "");
        }
        return error_found;
@@ -205,7 +205,7 @@ static void r82600_check(struct mem_ctl_info *mci)
 {
        struct r82600_error_info info;
-        debugf1("MC%d: %s()\n", mci->mc_idx, __func__);
+        edac_dbg(1, "MC%d\n", mci->mc_idx);
        r82600_get_error_info(mci, &info);
        r82600_process_error_info(mci, &info, 1);
 }
@@ -230,19 +230,19 @@ static void r82600_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev,
        row_high_limit_last = 0;
        for (index = 0; index < mci->nr_csrows; index++) {
-                csrow = &mci->csrows[index];
+                csrow = mci->csrows[index];
-                dimm = csrow->channels[0].dimm;
+                dimm = csrow->channels[0]->dimm;
                /* find the DRAM Chip Select Base address and mask */
                pci_read_config_byte(pdev, R82600_DRBA + index, &drbar);
-                debugf1("%s() Row=%d DRBA = %#0x\n", __func__, index, drbar);
+                edac_dbg(1, "Row=%d DRBA = %#0x\n", index, drbar);
                row_high_limit = ((u32) drbar << 24);
 /*              row_high_limit = ((u32)drbar << 24) | 0xffffffUL; */
-                debugf1("%s() Row=%d, Boundary Address=%#0x, Last = %#0x\n",
+                edac_dbg(1, "Row=%d, Boundary Address=%#0x, Last = %#0x\n",
-                        __func__, index, row_high_limit, row_high_limit_last);
+                         index, row_high_limit, row_high_limit_last);
                /* Empty row [p.57] */
                if (row_high_limit == row_high_limit_last)
@@ -277,14 +277,13 @@ static int r82600_probe1(struct pci_dev *pdev, int dev_idx)
        u32 sdram_refresh_rate;
        struct r82600_error_info discard;
-        debugf0("%s()\n", __func__);
+        edac_dbg(0, "\n");
        pci_read_config_byte(pdev, R82600_DRAMC, &dramcr);
        pci_read_config_dword(pdev, R82600_EAP, &eapr);
        scrub_disabled = eapr & BIT(31);
        sdram_refresh_rate = dramcr & (BIT(0) | BIT(1));
-        debugf2("%s(): sdram refresh rate = %#0x\n", __func__,
+        edac_dbg(2, "sdram refresh rate = %#0x\n", sdram_refresh_rate);
-                sdram_refresh_rate);
+        edac_dbg(2, "DRAMC register = %#0x\n", dramcr);
-        debugf2("%s(): DRAMC register = %#0x\n", __func__, dramcr);
        layers[0].type = EDAC_MC_LAYER_CHIP_SELECT;
        layers[0].size = R82600_NR_CSROWS;
        layers[0].is_virt_csrow = true;
@@ -295,8 +294,8 @@ static int r82600_probe1(struct pci_dev *pdev, int dev_idx)
        if (mci == NULL)
                return -ENOMEM;
-        debugf0("%s(): mci = %p\n", __func__, mci);
+        edac_dbg(0, "mci = %p\n", mci);
-        mci->dev = &pdev->dev;
+        mci->pdev = &pdev->dev;
        mci->mtype_cap = MEM_FLAG_RDDR | MEM_FLAG_DDR;
        mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_EC | EDAC_FLAG_SECDED;
        /* FIXME try to work out if the chip leads have been used for COM2
@@ -311,8 +310,8 @@ static int r82600_probe1(struct pci_dev *pdev, int dev_idx)
        if (ecc_enabled(dramcr)) {
                if (scrub_disabled)
-                        debugf3("%s(): mci = %p - Scrubbing disabled! EAP: "
+                        edac_dbg(3, "mci = %p - Scrubbing disabled! EAP: %#0x\n",
-                                "%#0x\n", __func__, mci, eapr);
+                                 mci, eapr);
        } else
                mci->edac_cap = EDAC_FLAG_NONE;
@@ -329,15 +328,14 @@ static int r82600_probe1(struct pci_dev *pdev, int dev_idx)
         * type of memory controller.  The ID is therefore hardcoded to 0.
         */
        if (edac_mc_add_mc(mci)) {
-                debugf3("%s(): failed edac_mc_add_mc()\n", __func__);
+                edac_dbg(3, "failed edac_mc_add_mc()\n");
                goto fail;
        }
        /* get this far and it's successful */
        if (disable_hardware_scrub) {
-                debugf3("%s(): Disabling Hardware Scrub (scrub on error)\n",
+                edac_dbg(3, "Disabling Hardware Scrub (scrub on error)\n");
-                        __func__);
                pci_write_bits32(pdev, R82600_EAP, BIT(31), BIT(31));
        }
@@ -352,7 +350,7 @@ static int r82600_probe1(struct pci_dev *pdev, int dev_idx)
                        __func__);
        }
-        debugf3("%s(): success\n", __func__);
+        edac_dbg(3, "success\n");
        return 0;
 fail:
@@ -364,7 +362,7 @@ fail:
 static int __devinit r82600_init_one(struct pci_dev *pdev,
                                const struct pci_device_id *ent)
 {
-        debugf0("%s()\n", __func__);
+        edac_dbg(0, "\n");
        /* don't need to call pci_enable_device() */
        return r82600_probe1(pdev, ent->driver_data);
@@ -374,7 +372,7 @@ static void __devexit r82600_remove_one(struct pci_dev *pdev)
 {
        struct mem_ctl_info *mci;
-        debugf0("%s()\n", __func__);
+        edac_dbg(0, "\n");
        if (r82600_pci)
                edac_pci_release_generic_ctl(r82600_pci);
diff --git a/drivers/edac/sb_edac.c b/drivers/edac/sb_edac.c
index 4adaf4b7da99..f3b1f9fafa4b 100644
--- a/drivers/edac/sb_edac.c
+++ b/drivers/edac/sb_edac.c
@@ -381,8 +381,8 @@ static inline int numrank(u32 mtr)
        int ranks = (1 << RANK_CNT_BITS(mtr));
        if (ranks > 4) {
-                debugf0("Invalid number of ranks: %d (max = 4) raw value = %x (%04x)",
+                edac_dbg(0, "Invalid number of ranks: %d (max = 4) raw value = %x (%04x)\n",
-                        ranks, (unsigned int)RANK_CNT_BITS(mtr), mtr);
+                         ranks, (unsigned int)RANK_CNT_BITS(mtr), mtr);
                return -EINVAL;
        }
@@ -394,8 +394,8 @@ static inline int numrow(u32 mtr)
        int rows = (RANK_WIDTH_BITS(mtr) + 12);
        if (rows < 13 || rows > 18) {
-                debugf0("Invalid number of rows: %d (should be between 14 and 17) raw value = %x (%04x)",
+                edac_dbg(0, "Invalid number of rows: %d (should be between 14 and 17) raw value = %x (%04x)\n",
-                        rows, (unsigned int)RANK_WIDTH_BITS(mtr), mtr);
+                         rows, (unsigned int)RANK_WIDTH_BITS(mtr), mtr);
                return -EINVAL;
        }
@@ -407,8 +407,8 @@ static inline int numcol(u32 mtr)
        int cols = (COL_WIDTH_BITS(mtr) + 10);
        if (cols > 12) {
-                debugf0("Invalid number of cols: %d (max = 4) raw value = %x (%04x)",
+                edac_dbg(0, "Invalid number of cols: %d (max = 4) raw value = %x (%04x)\n",
-                        cols, (unsigned int)COL_WIDTH_BITS(mtr), mtr);
+                         cols, (unsigned int)COL_WIDTH_BITS(mtr), mtr);
                return -EINVAL;
        }
@@ -475,8 +475,8 @@ static struct pci_dev *get_pdev_slot_func(u8 bus, unsigned slot,
                if (PCI_SLOT(sbridge_dev->pdev[i]->devfn) == slot &&
                    PCI_FUNC(sbridge_dev->pdev[i]->devfn) == func) {
-                        debugf1("Associated %02x.%02x.%d with %p\n",
+                        edac_dbg(1, "Associated %02x.%02x.%d with %p\n",
-                                bus, slot, func, sbridge_dev->pdev[i]);
+                                 bus, slot, func, sbridge_dev->pdev[i]);
                        return sbridge_dev->pdev[i];
                }
        }
@@ -523,45 +523,45 @@ static int get_dimm_config(struct mem_ctl_info *mci)
        pci_read_config_dword(pvt->pci_br, SAD_CONTROL, &reg);
        pvt->sbridge_dev->node_id = NODE_ID(reg);
-        debugf0("mc#%d: Node ID: %d, source ID: %d\n",
+        edac_dbg(0, "mc#%d: Node ID: %d, source ID: %d\n",
-                pvt->sbridge_dev->mc,
+                 pvt->sbridge_dev->mc,
-                pvt->sbridge_dev->node_id,
+                 pvt->sbridge_dev->node_id,
-                pvt->sbridge_dev->source_id);
+                 pvt->sbridge_dev->source_id);
        pci_read_config_dword(pvt->pci_ras, RASENABLES, &reg);
        if (IS_MIRROR_ENABLED(reg)) {
-                debugf0("Memory mirror is enabled\n");
+                edac_dbg(0, "Memory mirror is enabled\n");
                pvt->is_mirrored = true;
        } else {
-                debugf0("Memory mirror is disabled\n");
+                edac_dbg(0, "Memory mirror is disabled\n");
                pvt->is_mirrored = false;
        }
        pci_read_config_dword(pvt->pci_ta, MCMTR, &pvt->info.mcmtr);
        if (IS_LOCKSTEP_ENABLED(pvt->info.mcmtr)) {
-                debugf0("Lockstep is enabled\n");
+                edac_dbg(0, "Lockstep is enabled\n");
                mode = EDAC_S8ECD8ED;
                pvt->is_lockstep = true;
        } else {
-                debugf0("Lockstep is disabled\n");
+                edac_dbg(0, "Lockstep is disabled\n");
                mode = EDAC_S4ECD4ED;
                pvt->is_lockstep = false;
        }
        if (IS_CLOSE_PG(pvt->info.mcmtr)) {
-                debugf0("address map is on closed page mode\n");
+                edac_dbg(0, "address map is on closed page mode\n");
                pvt->is_close_pg = true;
        } else {
-                debugf0("address map is on open page mode\n");
+                edac_dbg(0, "address map is on open page mode\n");
                pvt->is_close_pg = false;
        }
-        pci_read_config_dword(pvt->pci_ta, RANK_CFG_A, &reg);
+        pci_read_config_dword(pvt->pci_ddrio, RANK_CFG_A, &reg);
        if (IS_RDIMM_ENABLED(reg)) {
                /* FIXME: Can also be LRDIMM */
-                debugf0("Memory is registered\n");
+                edac_dbg(0, "Memory is registered\n");
                mtype = MEM_RDDR3;
        } else {
-                debugf0("Memory is unregistered\n");
+                edac_dbg(0, "Memory is unregistered\n");
                mtype = MEM_DDR3;
        }
@@ -576,7 +576,7 @@ static int get_dimm_config(struct mem_ctl_info *mci)
                                       i, j, 0);
                        pci_read_config_dword(pvt->pci_tad[i],
                                              mtr_regs[j], &mtr);
-                        debugf4("Channel #%d  MTR%d = %x\n", i, j, mtr);
+                        edac_dbg(4, "Channel #%d  MTR%d = %x\n", i, j, mtr);
                        if (IS_DIMM_PRESENT(mtr)) {
                                pvt->channel[i].dimms++;
@@ -588,10 +588,10 @@ static int get_dimm_config(struct mem_ctl_info *mci)
                                size = (rows * cols * banks * ranks) >> (20 - 3);
                                npages = MiB_TO_PAGES(size);
-                                debugf0("mc#%d: channel %d, dimm %d, %d Mb (%d pages) bank: %d, rank: %d, row: %#x, col: %#x\n",
+                                edac_dbg(0, "mc#%d: channel %d, dimm %d, %d Mb (%d pages) bank: %d, rank: %d, row: %#x, col: %#x\n",
-                                        pvt->sbridge_dev->mc, i, j,
+                                         pvt->sbridge_dev->mc, i, j,
-                                        size, npages,
+                                         size, npages,
-                                        banks, ranks, rows, cols);
+                                         banks, ranks, rows, cols);
                                dimm->nr_pages = npages;
                                dimm->grain = 32;
@@ -629,8 +629,7 @@ static void get_memory_layout(const struct mem_ctl_info *mci)
        tmp_mb = (1 + pvt->tolm) >> 20;
        mb = div_u64_rem(tmp_mb, 1000, &kb);
-        debugf0("TOLM: %u.%03u GB (0x%016Lx)\n",
+        edac_dbg(0, "TOLM: %u.%03u GB (0x%016Lx)\n", mb, kb, (u64)pvt->tolm);
-                mb, kb, (u64)pvt->tolm);
        /* Address range is already 45:25 */
        pci_read_config_dword(pvt->pci_sad1, TOHM,
@@ -639,8 +638,7 @@ static void get_memory_layout(const struct mem_ctl_info *mci)
        tmp_mb = (1 + pvt->tohm) >> 20;
        mb = div_u64_rem(tmp_mb, 1000, &kb);
-        debugf0("TOHM: %u.%03u GB (0x%016Lx)",
+        edac_dbg(0, "TOHM: %u.%03u GB (0x%016Lx)", mb, kb, (u64)pvt->tohm);
-                mb, kb, (u64)pvt->tohm);
        /*
         * Step 2) Get SAD range and SAD Interleave list
@@ -663,13 +661,13 @@ static void get_memory_layout(const struct mem_ctl_info *mci)
                tmp_mb = (limit + 1) >> 20;
                mb = div_u64_rem(tmp_mb, 1000, &kb);
-                debugf0("SAD#%d %s up to %u.%03u GB (0x%016Lx) %s reg=0x%08x\n",
+                edac_dbg(0, "SAD#%d %s up to %u.%03u GB (0x%016Lx) Interleave: %s reg=0x%08x\n",
-                        n_sads,
+                         n_sads,
-                        get_dram_attr(reg),
+                         get_dram_attr(reg),
-                        mb, kb,
+                         mb, kb,
-                        ((u64)tmp_mb) << 20L,
+                         ((u64)tmp_mb) << 20L,
-                        INTERLEAVE_MODE(reg) ? "Interleave: 8:6" : "Interleave: [8:6]XOR[18:16]",
+                         INTERLEAVE_MODE(reg) ? "8:6" : "[8:6]XOR[18:16]",
-                        reg);
+                         reg);
                prv = limit;
                pci_read_config_dword(pvt->pci_sad0, interleave_list[n_sads],
@@ -679,8 +677,8 @@ static void get_memory_layout(const struct mem_ctl_info *mci)
                        if (j > 0 && sad_interl == sad_pkg(reg, j))
                                break;
-                        debugf0("SAD#%d, interleave #%d: %d\n",
+                        edac_dbg(0, "SAD#%d, interleave #%d: %d\n",
-                        n_sads, j, sad_pkg(reg, j));
+                                 n_sads, j, sad_pkg(reg, j));
                }
        }
@@ -697,16 +695,16 @@ static void get_memory_layout(const struct mem_ctl_info *mci)
                tmp_mb = (limit + 1) >> 20;
                mb = div_u64_rem(tmp_mb, 1000, &kb);
-                debugf0("TAD#%d: up to %u.%03u GB (0x%016Lx), socket interleave %d, memory interleave %d, TGT: %d, %d, %d, %d, reg=0x%08x\n",
+                edac_dbg(0, "TAD#%d: up to %u.%03u GB (0x%016Lx), socket interleave %d, memory interleave %d, TGT: %d, %d, %d, %d, reg=0x%08x\n",
-                        n_tads, mb, kb,
+                         n_tads, mb, kb,
-                        ((u64)tmp_mb) << 20L,
+                         ((u64)tmp_mb) << 20L,
-                        (u32)TAD_SOCK(reg),
+                         (u32)TAD_SOCK(reg),
-                        (u32)TAD_CH(reg),
+                         (u32)TAD_CH(reg),
-                        (u32)TAD_TGT0(reg),
+                         (u32)TAD_TGT0(reg),
-                        (u32)TAD_TGT1(reg),
+                         (u32)TAD_TGT1(reg),
-                        (u32)TAD_TGT2(reg),
+                         (u32)TAD_TGT2(reg),
-                        (u32)TAD_TGT3(reg),
+                         (u32)TAD_TGT3(reg),
-                        reg);
+                         reg);
                prv = limit;
        }
@@ -722,11 +720,11 @@ static void get_memory_layout(const struct mem_ctl_info *mci)
                                              &reg);
                        tmp_mb = TAD_OFFSET(reg) >> 20;
                        mb = div_u64_rem(tmp_mb, 1000, &kb);
-                        debugf0("TAD CH#%d, offset #%d: %u.%03u GB (0x%016Lx), reg=0x%08x\n",
+                        edac_dbg(0, "TAD CH#%d, offset #%d: %u.%03u GB (0x%016Lx), reg=0x%08x\n",
-                                i, j,
+                                 i, j,
-                                mb, kb,
+                                 mb, kb,
-                                ((u64)tmp_mb) << 20L,
+                                 ((u64)tmp_mb) << 20L,
-                                reg);
+                                 reg);
                }
        }
@@ -747,12 +745,12 @@ static void get_memory_layout(const struct mem_ctl_info *mci)
                        tmp_mb = RIR_LIMIT(reg) >> 20;
                        rir_way = 1 << RIR_WAY(reg);
                        mb = div_u64_rem(tmp_mb, 1000, &kb);
-                        debugf0("CH#%d RIR#%d, limit: %u.%03u GB (0x%016Lx), way: %d, reg=0x%08x\n",
+                        edac_dbg(0, "CH#%d RIR#%d, limit: %u.%03u GB (0x%016Lx), way: %d, reg=0x%08x\n",
-                                i, j,
+                                 i, j,
-                                mb, kb,
+                                 mb, kb,
-                                ((u64)tmp_mb) << 20L,
+                                 ((u64)tmp_mb) << 20L,
-                                rir_way,
+                                 rir_way,
-                                reg);
+                                 reg);
                        for (k = 0; k < rir_way; k++) {
                                pci_read_config_dword(pvt->pci_tad[i],
@@ -761,12 +759,12 @@ static void get_memory_layout(const struct mem_ctl_info *mci)
                                tmp_mb = RIR_OFFSET(reg) << 6;
                                mb = div_u64_rem(tmp_mb, 1000, &kb);
-                                debugf0("CH#%d RIR#%d INTL#%d, offset %u.%03u GB (0x%016Lx), tgt: %d, reg=0x%08x\n",
+                                edac_dbg(0, "CH#%d RIR#%d INTL#%d, offset %u.%03u GB (0x%016Lx), tgt: %d, reg=0x%08x\n",
-                                        i, j, k,
+                                         i, j, k,
-                                        mb, kb,
+                                         mb, kb,
-                                        ((u64)tmp_mb) << 20L,
+                                         ((u64)tmp_mb) << 20L,
-                                        (u32)RIR_RNK_TGT(reg),
+                                         (u32)RIR_RNK_TGT(reg),
-                                        reg);
+                                         reg);
                        }
                }
        }
@@ -853,16 +851,16 @@ static int get_memory_error_data(struct mem_ctl_info *mci,
                if (sad_way > 0 && sad_interl == sad_pkg(reg, sad_way))
                        break;
                sad_interleave[sad_way] = sad_pkg(reg, sad_way);
-                debugf0("SAD interleave #%d: %d\n",
+                edac_dbg(0, "SAD interleave #%d: %d\n",
-                        sad_way, sad_interleave[sad_way]);
+                         sad_way, sad_interleave[sad_way]);
        }
-        debugf0("mc#%d: Error detected on SAD#%d: address 0x%016Lx < 0x%016Lx, Interleave [%d:6]%s\n",
+        edac_dbg(0, "mc#%d: Error detected on SAD#%d: address 0x%016Lx < 0x%016Lx, Interleave [%d:6]%s\n",
-                pvt->sbridge_dev->mc,
+                 pvt->sbridge_dev->mc,
-                n_sads,
+                 n_sads,
-                addr,
+                 addr,
-                limit,
+                 limit,
-                sad_way + 7,
+                 sad_way + 7,
-                interleave_mode ? "" : "XOR[18:16]");
+                 interleave_mode ? "" : "XOR[18:16]");
        if (interleave_mode)
                idx = ((addr >> 6) ^ (addr >> 16)) & 7;
        else
@@ -884,8 +882,8 @@ static int get_memory_error_data(struct mem_ctl_info *mci,
                return -EINVAL;
        }
        *socket = sad_interleave[idx];
-        debugf0("SAD interleave index: %d (wayness %d) = CPU socket %d\n",
+        edac_dbg(0, "SAD interleave index: %d (wayness %d) = CPU socket %d\n",
-                idx, sad_way, *socket);
+                 idx, sad_way, *socket);
        /*
         * Move to the proper node structure, in order to access the
@@ -972,16 +970,16 @@ static int get_memory_error_data(struct mem_ctl_info *mci,
        offset = TAD_OFFSET(tad_offset);
-        debugf0("TAD#%d: address 0x%016Lx < 0x%016Lx, socket interleave %d, channel interleave %d (offset 0x%08Lx), index %d, base ch: %d, ch mask: 0x%02lx\n",
+        edac_dbg(0, "TAD#%d: address 0x%016Lx < 0x%016Lx, socket interleave %d, channel interleave %d (offset 0x%08Lx), index %d, base ch: %d, ch mask: 0x%02lx\n",
-                n_tads,
+                 n_tads,
-                addr,
+                 addr,
-                limit,
+                 limit,
-                (u32)TAD_SOCK(reg),
+                 (u32)TAD_SOCK(reg),
-                ch_way,
+                 ch_way,
-                offset,
+                 offset,
-                idx,
+                 idx,
-                base_ch,
+                 base_ch,
-                *channel_mask);
+                 *channel_mask);
        /* Calculate channel address */
        /* Remove the TAD offset */
@@ -1017,11 +1015,11 @@ static int get_memory_error_data(struct mem_ctl_info *mci,
                limit = RIR_LIMIT(reg);
                mb = div_u64_rem(limit >> 20, 1000, &kb);
-                debugf0("RIR#%d, limit: %u.%03u GB (0x%016Lx), way: %d\n",
+                edac_dbg(0, "RIR#%d, limit: %u.%03u GB (0x%016Lx), way: %d\n",
-                        n_rir,
+                         n_rir,
-                        mb, kb,
+                         mb, kb,
-                        limit,
+                         limit,
-                        1 << RIR_WAY(reg));
+                         1 << RIR_WAY(reg));
                if  (ch_addr <= limit)
                        break;
        }
@@ -1042,12 +1040,12 @@ static int get_memory_error_data(struct mem_ctl_info *mci,
                              &reg);
        *rank = RIR_RNK_TGT(reg);
-        debugf0("RIR#%d: channel address 0x%08Lx < 0x%08Lx, RIR interleave %d, index %d\n",
+        edac_dbg(0, "RIR#%d: channel address 0x%08Lx < 0x%08Lx, RIR interleave %d, index %d\n",
-                n_rir,
+                 n_rir,
-                ch_addr,
+                 ch_addr,
-                limit,
+                 limit,
-                rir_way,
+                 rir_way,
-                idx);
+                 idx);
        return 0;
 }
@@ -1064,14 +1062,14 @@ static void sbridge_put_devices(struct sbridge_dev *sbridge_dev)
 {
        int i;
-        debugf0(__FILE__ ": %s()\n", __func__);
+        edac_dbg(0, "\n");
        for (i = 0; i < sbridge_dev->n_devs; i++) {
                struct pci_dev *pdev = sbridge_dev->pdev[i];
                if (!pdev)
                        continue;
-                debugf0("Removing dev %02x:%02x.%d\n",
+                edac_dbg(0, "Removing dev %02x:%02x.%d\n",
-                        pdev->bus->number,
+                         pdev->bus->number,
-                        PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn));
+                         PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn));
                pci_dev_put(pdev);
        }
 }
@@ -1177,10 +1175,9 @@ static int sbridge_get_onedevice(struct pci_dev **prev,
                return -ENODEV;
        }
-        debugf0("Detected dev %02x:%d.%d PCI ID %04x:%04x\n",
+        edac_dbg(0, "Detected dev %02x:%d.%d PCI ID %04x:%04x\n",
-                bus, dev_descr->dev,
+                 bus, dev_descr->dev, dev_descr->func,
-                dev_descr->func,
+                 PCI_VENDOR_ID_INTEL, dev_descr->dev_id);
-                PCI_VENDOR_ID_INTEL, dev_descr->dev_id);
        /*
         * As stated on drivers/pci/search.c, the reference count for
@@ -1297,10 +1294,10 @@ static int mci_bind_devs(struct mem_ctl_info *mci,
                        goto error;
                }
-                debugf0("Associated PCI %02x.%02d.%d with dev = %p\n",
+                edac_dbg(0, "Associated PCI %02x.%02d.%d with dev = %p\n",
-                        sbridge_dev->bus,
+                         sbridge_dev->bus,
-                        PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn),
+                         PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn),
-                        pdev);
+                         pdev);
        }
        /* Check if everything were registered */
@@ -1435,8 +1432,7 @@ static void sbridge_mce_output_error(struct mem_ctl_info *mci,
         * to the group of dimm's where the error may be happening.
         */
        snprintf(msg, sizeof(msg),
-                 "count:%d%s%s area:%s err_code:%04x:%04x socket:%d channel_mask:%ld rank:%d",
+                 "%s%s area:%s err_code:%04x:%04x socket:%d channel_mask:%ld rank:%d",
-                 core_err_cnt,
                 overflow ? " OVERFLOW" : "",
                 (uncorrected_error && recoverable) ? " recoverable" : "",
                 area_type,
@@ -1445,20 +1441,20 @@ static void sbridge_mce_output_error(struct mem_ctl_info *mci,
                 channel_mask,
                 rank);
-        debugf0("%s", msg);
+        edac_dbg(0, "%s\n", msg);
        /* FIXME: need support for channel mask */
        /* Call the helper to output message */
-        edac_mc_handle_error(tp_event, mci,
+        edac_mc_handle_error(tp_event, mci, core_err_cnt,
                             m->addr >> PAGE_SHIFT, m->addr & ~PAGE_MASK, 0,
                             channel, dimm, -1,
-                             optype, msg, m);
+                             optype, msg);
        return;
 err_parsing:
-        edac_mc_handle_error(tp_event, mci, 0, 0, 0,
+        edac_mc_handle_error(tp_event, mci, core_err_cnt, 0, 0, 0,
                             -1, -1, -1,
-                             msg, "", m);
+                             msg, "");
 }
@@ -1592,8 +1588,7 @@ static void sbridge_unregister_mci(struct sbridge_dev *sbridge_dev)
        struct sbridge_pvt *pvt;
        if (unlikely(!mci || !mci->pvt_info)) {
-                debugf0("MC: " __FILE__ ": %s(): dev = %p\n",
+                edac_dbg(0, "MC: dev = %p\n", &sbridge_dev->pdev[0]->dev);
-                        __func__, &sbridge_dev->pdev[0]->dev);
                sbridge_printk(KERN_ERR, "Couldn't find mci handler\n");
                return;
@@ -1601,15 +1596,13 @@ static void sbridge_unregister_mci(struct sbridge_dev *sbridge_dev)
        pvt = mci->pvt_info;
-        debugf0("MC: " __FILE__ ": %s(): mci = %p, dev = %p\n",
+        edac_dbg(0, "MC: mci = %p, dev = %p\n",
-                __func__, mci, &sbridge_dev->pdev[0]->dev);
+                 mci, &sbridge_dev->pdev[0]->dev);
-        mce_unregister_decode_chain(&sbridge_mce_dec);
        /* Remove MC sysfs nodes */
-        edac_mc_del_mc(mci->dev);
+        edac_mc_del_mc(mci->pdev);
-        debugf1("%s: free mci struct\n", mci->ctl_name);
+        edac_dbg(1, "%s: free mci struct\n", mci->ctl_name);
        kfree(mci->ctl_name);
        edac_mc_free(mci);
        sbridge_dev->mci = NULL;
@@ -1640,8 +1633,8 @@ static int sbridge_register_mci(struct sbridge_dev *sbridge_dev)
        if (unlikely(!mci))
                return -ENOMEM;
-        debugf0("MC: " __FILE__ ": %s(): mci = %p, dev = %p\n",
+        edac_dbg(0, "MC: mci = %p, dev = %p\n",
-                __func__, mci, &sbridge_dev->pdev[0]->dev);
+                 mci, &sbridge_dev->pdev[0]->dev);
        pvt = mci->pvt_info;
        memset(pvt, 0, sizeof(*pvt));
@@ -1672,17 +1665,15 @@ static int sbridge_register_mci(struct sbridge_dev *sbridge_dev)
        get_memory_layout(mci);
        /* record ptr to the generic device */
-        mci->dev = &sbridge_dev->pdev[0]->dev;
+        mci->pdev = &sbridge_dev->pdev[0]->dev;
        /* add this new MC control structure to EDAC's list of MCs */
        if (unlikely(edac_mc_add_mc(mci))) {
-                debugf0("MC: " __FILE__
+                edac_dbg(0, "MC: failed edac_mc_add_mc()\n");
-                        ": %s(): failed edac_mc_add_mc()\n", __func__);
                rc = -EINVAL;
                goto fail0;
        }
-        mce_register_decode_chain(&sbridge_mce_dec);
        return 0;
 fail0:
@@ -1725,7 +1716,8 @@ static int __devinit sbridge_probe(struct pci_dev *pdev,
        mc = 0;
        list_for_each_entry(sbridge_dev, &sbridge_edac_list, list) {
-                debugf0("Registering MC#%d (%d of %d)\n", mc, mc + 1, num_mc);
+                edac_dbg(0, "Registering MC#%d (%d of %d)\n",
+                         mc, mc + 1, num_mc);
                sbridge_dev->mc = mc++;
                rc = sbridge_register_mci(sbridge_dev);
                if (unlikely(rc < 0))
@@ -1755,7 +1747,7 @@ static void __devexit sbridge_remove(struct pci_dev *pdev)
 {
        struct sbridge_dev *sbridge_dev;
-        debugf0(__FILE__ ": %s()\n", __func__);
+        edac_dbg(0, "\n");
        /*
         * we have a trouble here: pdev value for removal will be wrong, since
@@ -1804,15 +1796,17 @@ static int __init sbridge_init(void)
 {
        int pci_rc;
-        debugf2("MC: " __FILE__ ": %s()\n", __func__);
+        edac_dbg(2, "\n");
        /* Ensure that the OPSTATE is set correctly for POLL or NMI */
        opstate_init();
        pci_rc = pci_register_driver(&sbridge_driver);
-        if (pci_rc >= 0)
+        if (pci_rc >= 0) {
+                mce_register_decode_chain(&sbridge_mce_dec);
                return 0;
+        }
        sbridge_printk(KERN_ERR, "Failed to register device with error %d.\n",
                      pci_rc);
@@ -1826,8 +1820,9 @@ static int __init sbridge_init(void)
 */
 static void __exit sbridge_exit(void)
 {
-        debugf2("MC: " __FILE__ ": %s()\n", __func__);
+        edac_dbg(2, "\n");
        pci_unregister_driver(&sbridge_driver);
+        mce_unregister_decode_chain(&sbridge_mce_dec);
 }
 module_init(sbridge_init);
diff --git a/drivers/edac/tile_edac.c b/drivers/edac/tile_edac.c
index 7bb4614730db..1e904b7b79a0 100644
--- a/drivers/edac/tile_edac.c
+++ b/drivers/edac/tile_edac.c
@@ -69,12 +69,12 @@ static void tile_edac_check(struct mem_ctl_info *mci)
        /* Check if the current error count is different from the saved one. */
        if (mem_error.sbe_count != priv->ce_count) {
-                dev_dbg(mci->dev, "ECC CE err on node %d\n", priv->node);
+                dev_dbg(mci->pdev, "ECC CE err on node %d\n", priv->node);
                priv->ce_count = mem_error.sbe_count;
-                edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci,
+                edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, 1,
                                     0, 0, 0,
                                     0, 0, -1,
-                                     mci->ctl_name, "", NULL);
+                                     mci->ctl_name, "");
        }
 }
@@ -84,10 +84,10 @@ static void tile_edac_check(struct mem_ctl_info *mci)
 */
 static int __devinit tile_edac_init_csrows(struct mem_ctl_info *mci)
 {
-        struct csrow_info       *csrow = &mci->csrows[0];
+        struct csrow_info       *csrow = mci->csrows[0];
        struct tile_edac_priv   *priv = mci->pvt_info;
        struct mshim_mem_info   mem_info;
-        struct dimm_info *dimm = csrow->channels[0].dimm;
+        struct dimm_info *dimm = csrow->channels[0]->dimm;
        if (hv_dev_pread(priv->hv_devhdl, 0, (HV_VirtAddr)&mem_info,
                sizeof(struct mshim_mem_info), MSHIM_MEM_INFO_OFF) !=
@@ -149,7 +149,7 @@ static int __devinit tile_edac_mc_probe(struct platform_device *pdev)
        priv->node = pdev->id;
        priv->hv_devhdl = hv_devhdl;
-        mci->dev = &pdev->dev;
+        mci->pdev = &pdev->dev;
        mci->mtype_cap = MEM_FLAG_DDR2;
        mci->edac_ctl_cap = EDAC_FLAG_SECDED;
diff --git a/drivers/edac/x38_edac.c b/drivers/edac/x38_edac.c
index 1ac7962d63ea..08a992693e62 100644
--- a/drivers/edac/x38_edac.c
+++ b/drivers/edac/x38_edac.c
@@ -103,10 +103,10 @@ static int how_many_channel(struct pci_dev *pdev)
        pci_read_config_byte(pdev, X38_CAPID0 + 8, &capid0_8b);
        if (capid0_8b & 0x20) { /* check DCD: Dual Channel Disable */
-                debugf0("In single channel mode.\n");
+                edac_dbg(0, "In single channel mode\n");
                x38_channel_num = 1;
        } else {
-                debugf0("In dual channel mode.\n");
+                edac_dbg(0, "In dual channel mode\n");
                x38_channel_num = 2;
        }
@@ -151,7 +151,7 @@ static void x38_clear_error_info(struct mem_ctl_info *mci)
 {
        struct pci_dev *pdev;
-        pdev = to_pci_dev(mci->dev);
+        pdev = to_pci_dev(mci->pdev);
        /*
         * Clear any error bits.
@@ -172,7 +172,7 @@ static void x38_get_and_clear_error_info(struct mem_ctl_info *mci,
        struct pci_dev *pdev;
        void __iomem *window = mci->pvt_info;
-        pdev = to_pci_dev(mci->dev);
+        pdev = to_pci_dev(mci->pdev);
        /*
         * This is a mess because there is no atomic way to read all the
@@ -215,26 +215,26 @@ static void x38_process_error_info(struct mem_ctl_info *mci,
                return;
        if ((info->errsts ^ info->errsts2) & X38_ERRSTS_BITS) {
-                edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 0, 0, 0,
+                edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 1, 0, 0, 0,
                                     -1, -1, -1,
-                                     "UE overwrote CE", "", NULL);
+                                     "UE overwrote CE", "");
                info->errsts = info->errsts2;
        }
        for (channel = 0; channel < x38_channel_num; channel++) {
                log = info->eccerrlog[channel];
                if (log & X38_ECCERRLOG_UE) {
-                        edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci,
+                        edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, 1,
                                             0, 0, 0,
                                             eccerrlog_row(channel, log),
                                             -1, -1,
-                                             "x38 UE", "", NULL);
+                                             "x38 UE", "");
                } else if (log & X38_ECCERRLOG_CE) {
-                        edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci,
+                        edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci, 1,
                                             0, 0, eccerrlog_syndrome(log),
                                             eccerrlog_row(channel, log),
                                             -1, -1,
-                                             "x38 CE", "", NULL);
+                                             "x38 CE", "");
                }
        }
 }
@@ -243,7 +243,7 @@ static void x38_check(struct mem_ctl_info *mci)
 {
        struct x38_error_info info;
-        debugf1("MC%d: %s()\n", mci->mc_idx, __func__);
+        edac_dbg(1, "MC%d\n", mci->mc_idx);
        x38_get_and_clear_error_info(mci, &info);
        x38_process_error_info(mci, &info);
 }
@@ -331,7 +331,7 @@ static int x38_probe1(struct pci_dev *pdev, int dev_idx)
        bool stacked;
        void __iomem *window;
-        debugf0("MC: %s()\n", __func__);
+        edac_dbg(0, "MC:\n");
        window = x38_map_mchbar(pdev);
        if (!window)
@@ -352,9 +352,9 @@ static int x38_probe1(struct pci_dev *pdev, int dev_idx)
        if (!mci)
                return -ENOMEM;
-        debugf3("MC: %s(): init mci\n", __func__);
+        edac_dbg(3, "MC: init mci\n");
-        mci->dev = &pdev->dev;
+        mci->pdev = &pdev->dev;
        mci->mtype_cap = MEM_FLAG_DDR2;
        mci->edac_ctl_cap = EDAC_FLAG_SECDED;
@@ -378,7 +378,7 @@ static int x38_probe1(struct pci_dev *pdev, int dev_idx)
         */
        for (i = 0; i < mci->nr_csrows; i++) {
                unsigned long nr_pages;
-                struct csrow_info *csrow = &mci->csrows[i];
+                struct csrow_info *csrow = mci->csrows[i];
                nr_pages = drb_to_nr_pages(drbs, stacked,
                        i / X38_RANKS_PER_CHANNEL,
@@ -388,7 +388,7 @@ static int x38_probe1(struct pci_dev *pdev, int dev_idx)
                        continue;
                for (j = 0; j < x38_channel_num; j++) {
-                        struct dimm_info *dimm = csrow->channels[j].dimm;
+                        struct dimm_info *dimm = csrow->channels[j]->dimm;
                        dimm->nr_pages = nr_pages / x38_channel_num;
                        dimm->grain = nr_pages << PAGE_SHIFT;
@@ -402,12 +402,12 @@ static int x38_probe1(struct pci_dev *pdev, int dev_idx)
        rc = -ENODEV;
        if (edac_mc_add_mc(mci)) {
-                debugf3("MC: %s(): failed edac_mc_add_mc()\n", __func__);
+                edac_dbg(3, "MC: failed edac_mc_add_mc()\n");
                goto fail;
        }
        /* get this far and it's successful */
-        debugf3("MC: %s(): success\n", __func__);
+        edac_dbg(3, "MC: success\n");
        return 0;
 fail:
@@ -423,7 +423,7 @@ static int __devinit x38_init_one(struct pci_dev *pdev,
 {
        int rc;
-        debugf0("MC: %s()\n", __func__);
+        edac_dbg(0, "MC:\n");
        if (pci_enable_device(pdev) < 0)
                return -EIO;
@@ -439,7 +439,7 @@ static void __devexit x38_remove_one(struct pci_dev *pdev)
 {
        struct mem_ctl_info *mci;
-        debugf0("%s()\n", __func__);
+        edac_dbg(0, "\n");
        mci = edac_mc_del_mc(&pdev->dev);
        if (!mci)
@@ -472,7 +472,7 @@ static int __init x38_init(void)
 {
        int pci_rc;
-        debugf3("MC: %s()\n", __func__);
+        edac_dbg(3, "MC:\n");
        /* Ensure that the OPSTATE is set correctly for POLL or NMI */
        opstate_init();
@@ -486,14 +486,14 @@ static int __init x38_init(void)
                mci_pdev = pci_get_device(PCI_VENDOR_ID_INTEL,
                                        PCI_DEVICE_ID_INTEL_X38_HB, NULL);
                if (!mci_pdev) {
-                        debugf0("x38 pci_get_device fail\n");
+                        edac_dbg(0, "x38 pci_get_device fail\n");
                        pci_rc = -ENODEV;
                        goto fail1;
                }
                pci_rc = x38_init_one(mci_pdev, x38_pci_tbl);
                if (pci_rc < 0) {
-                        debugf0("x38 init fail\n");
+                        edac_dbg(0, "x38 init fail\n");
                        pci_rc = -ENODEV;
                        goto fail1;
                }
@@ -513,7 +513,7 @@ fail0:
 static void __exit x38_exit(void)
 {
-        debugf3("MC: %s()\n", __func__);
+        edac_dbg(3, "MC:\n");
        pci_unregister_driver(&x38_driver);
        if (!x38_registered) {
diff --git a/drivers/extcon/Kconfig b/drivers/extcon/Kconfig
index 29c5cf852efc..e175c8ed4ec4 100644
--- a/drivers/extcon/Kconfig
+++ b/drivers/extcon/Kconfig
@@ -21,12 +21,30 @@ config EXTCON_GPIO
          Say Y here to enable GPIO based extcon support. Note that GPIO
          extcon supports single state per extcon instance.
+config EXTCON_MAX77693
+        tristate "MAX77693 EXTCON Support"
+        depends on MFD_MAX77693
+        select IRQ_DOMAIN
+        select REGMAP_I2C
+        help
+          If you say yes here you get support for the MUIC device of
+          Maxim MAX77693 PMIC. The MAX77693 MUIC is a USB port accessory
+          detector and switch.
 config EXTCON_MAX8997
        tristate "MAX8997 EXTCON Support"
-        depends on MFD_MAX8997
+        depends on MFD_MAX8997 && IRQ_DOMAIN
        help
          If you say yes here you get support for the MUIC device of
          Maxim MAX8997 PMIC. The MAX8997 MUIC is a USB port accessory
          detector and switch.
+config EXTCON_ARIZONA
+        tristate "Wolfson Arizona EXTCON support"
+        depends on MFD_ARIZONA
+        help
+          Say Y here to enable support for external accessory detection
+          with Wolfson Arizona devices. These are audio CODECs with
+          advanced audio accessory detection support.
 endif # MULTISTATE_SWITCH
diff --git a/drivers/extcon/Makefile b/drivers/extcon/Makefile
index 86020bdb6da0..88961b332348 100644
--- a/drivers/extcon/Makefile
+++ b/drivers/extcon/Makefile
@@ -4,4 +4,6 @@
 obj-$(CONFIG_EXTCON)            += extcon_class.o
 obj-$(CONFIG_EXTCON_GPIO)       += extcon_gpio.o
+obj-$(CONFIG_EXTCON_MAX77693)   += extcon-max77693.o
 obj-$(CONFIG_EXTCON_MAX8997)    += extcon-max8997.o
+obj-$(CONFIG_EXTCON_ARIZONA)    += extcon-arizona.o
diff --git a/drivers/extcon/extcon-arizona.c b/drivers/extcon/extcon-arizona.c
new file mode 100644
index 000000000000..427a289f32a5
--- /dev/null
+++ b/drivers/extcon/extcon-arizona.c
@@ -0,0 +1,490 @@
+/*
+ * extcon-arizona.c - Extcon driver Wolfson Arizona devices
+ *
+ *  Copyright (C) 2012 Wolfson Microelectronics plc
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/i2c.h>
+#include <linux/slab.h>
+#include <linux/interrupt.h>
+#include <linux/err.h>
+#include <linux/gpio.h>
+#include <linux/platform_device.h>
+#include <linux/pm_runtime.h>
+#include <linux/regulator/consumer.h>
+#include <linux/extcon.h>
+#include <linux/mfd/arizona/core.h>
+#include <linux/mfd/arizona/pdata.h>
+#include <linux/mfd/arizona/registers.h>
+struct arizona_extcon_info {
+        struct device *dev;
+        struct arizona *arizona;
+        struct mutex lock;
+        struct regulator *micvdd;
+        int micd_mode;
+        const struct arizona_micd_config *micd_modes;
+        int micd_num_modes;
+        bool micd_reva;
+        bool mic;
+        bool detecting;
+        int jack_flips;
+        struct extcon_dev edev;
+};
+static const struct arizona_micd_config micd_default_modes[] = {
+        { ARIZONA_ACCDET_SRC, 1 << ARIZONA_MICD_BIAS_SRC_SHIFT, 0 },
+        { 0,                  2 << ARIZONA_MICD_BIAS_SRC_SHIFT, 1 },
+};
+#define ARIZONA_CABLE_MECHANICAL 0
+#define ARIZONA_CABLE_MICROPHONE 1
+#define ARIZONA_CABLE_HEADPHONE  2
+static const char *arizona_cable[] = {
+        "Mechanical",
+        "Microphone",
+        "Headphone",
+        NULL,
+};
+static void arizona_extcon_set_mode(struct arizona_extcon_info *info, int mode)
+{
+        struct arizona *arizona = info->arizona;
+        gpio_set_value_cansleep(arizona->pdata.micd_pol_gpio,
+                                info->micd_modes[mode].gpio);
+        regmap_update_bits(arizona->regmap, ARIZONA_MIC_DETECT_1,
+                           ARIZONA_MICD_BIAS_SRC_MASK,
+                           info->micd_modes[mode].bias);
+        regmap_update_bits(arizona->regmap, ARIZONA_ACCESSORY_DETECT_MODE_1,
+                           ARIZONA_ACCDET_SRC, info->micd_modes[mode].src);
+        info->micd_mode = mode;
+        dev_dbg(arizona->dev, "Set jack polarity to %d\n", mode);
+}
+static void arizona_start_mic(struct arizona_extcon_info *info)
+{
+        struct arizona *arizona = info->arizona;
+        bool change;
+        int ret;
+        info->detecting = true;
+        info->mic = false;
+        info->jack_flips = 0;
+        /* Microphone detection can't use idle mode */
+        pm_runtime_get(info->dev);
+        ret = regulator_enable(info->micvdd);
+        if (ret != 0) {
+                dev_err(arizona->dev, "Failed to enable MICVDD: %d\n",
+                        ret);
+        }
+        if (info->micd_reva) {
+                regmap_write(arizona->regmap, 0x80, 0x3);
+                regmap_write(arizona->regmap, 0x294, 0);
+                regmap_write(arizona->regmap, 0x80, 0x0);
+        }
+        regmap_update_bits_check(arizona->regmap, ARIZONA_MIC_DETECT_1,
+                                 ARIZONA_MICD_ENA, ARIZONA_MICD_ENA,
+                                 &change);
+        if (!change) {
+                regulator_disable(info->micvdd);
+                pm_runtime_put_autosuspend(info->dev);
+        }
+}
+static void arizona_stop_mic(struct arizona_extcon_info *info)
+{
+        struct arizona *arizona = info->arizona;
+        bool change;
+        regmap_update_bits_check(arizona->regmap, ARIZONA_MIC_DETECT_1,
+                                 ARIZONA_MICD_ENA, 0,
+                                 &change);
+        if (info->micd_reva) {
+                regmap_write(arizona->regmap, 0x80, 0x3);
+                regmap_write(arizona->regmap, 0x294, 2);
+                regmap_write(arizona->regmap, 0x80, 0x0);
+        }
+        if (change) {
+                regulator_disable(info->micvdd);
+                pm_runtime_put_autosuspend(info->dev);
+        }
+}
+static irqreturn_t arizona_micdet(int irq, void *data)
+{
+        struct arizona_extcon_info *info = data;
+        struct arizona *arizona = info->arizona;
+        unsigned int val;
+        int ret;
+        mutex_lock(&info->lock);
+        ret = regmap_read(arizona->regmap, ARIZONA_MIC_DETECT_3, &val);
+        if (ret != 0) {
+                dev_err(arizona->dev, "Failed to read MICDET: %d\n", ret);
+                return IRQ_NONE;
+        }
+        dev_dbg(arizona->dev, "MICDET: %x\n", val);
+        if (!(val & ARIZONA_MICD_VALID)) {
+                dev_warn(arizona->dev, "Microphone detection state invalid\n");
+                mutex_unlock(&info->lock);
+                return IRQ_NONE;
+        }
+        /* Due to jack detect this should never happen */
+        if (!(val & ARIZONA_MICD_STS)) {
+                dev_warn(arizona->dev, "Detected open circuit\n");
+                info->detecting = false;
+                goto handled;
+        }
+        /* If we got a high impedence we should have a headset, report it. */
+        if (info->detecting && (val & 0x400)) {
+                ret = extcon_update_state(&info->edev,
+                                          1 << ARIZONA_CABLE_MICROPHONE |
+                                          1 << ARIZONA_CABLE_HEADPHONE,
+                                          1 << ARIZONA_CABLE_MICROPHONE |
+                                          1 << ARIZONA_CABLE_HEADPHONE);
+                if (ret != 0)
+                        dev_err(arizona->dev, "Headset report failed: %d\n",
+                                ret);
+                info->mic = true;
+                info->detecting = false;
+                goto handled;
+        }
+        /* If we detected a lower impedence during initial startup
+         * then we probably have the wrong polarity, flip it.  Don't
+         * do this for the lowest impedences to speed up detection of
+         * plain headphones.  If both polarities report a low
+         * impedence then give up and report headphones.
+         */
+        if (info->detecting && (val & 0x3f8)) {
+                info->jack_flips++;
+                if (info->jack_flips >= info->micd_num_modes) {
+                        dev_dbg(arizona->dev, "Detected headphone\n");
+                        info->detecting = false;
+                        arizona_stop_mic(info);
+                        ret = extcon_set_cable_state_(&info->edev,
+                                                      ARIZONA_CABLE_HEADPHONE,
+                                                      true);
+                        if (ret != 0)
+                                dev_err(arizona->dev,
+                                        "Headphone report failed: %d\n",
+                                ret);
+                } else {
+                        info->micd_mode++;
+                        if (info->micd_mode == info->micd_num_modes)
+                                info->micd_mode = 0;
+                        arizona_extcon_set_mode(info, info->micd_mode);
+                        info->jack_flips++;
+                }
+                goto handled;
+        }
+        /*
+         * If we're still detecting and we detect a short then we've
+         * got a headphone.  Otherwise it's a button press, the
+         * button reporting is stubbed out for now.
+         */
+        if (val & 0x3fc) {
+                if (info->mic) {
+                        dev_dbg(arizona->dev, "Mic button detected\n");
+                } else if (info->detecting) {
+                        dev_dbg(arizona->dev, "Headphone detected\n");
+                        info->detecting = false;
+                        arizona_stop_mic(info);
+                        ret = extcon_set_cable_state_(&info->edev,
+                                                      ARIZONA_CABLE_HEADPHONE,
+                                                      true);
+                        if (ret != 0)
+                                dev_err(arizona->dev,
+                                        "Headphone report failed: %d\n",
+                                ret);
+                } else {
+                        dev_warn(arizona->dev, "Button with no mic: %x\n",
+                                 val);
+                }
+        } else {
+                dev_dbg(arizona->dev, "Mic button released\n");
+        }
+handled:
+        pm_runtime_mark_last_busy(info->dev);
+        mutex_unlock(&info->lock);
+        return IRQ_HANDLED;
+}
+static irqreturn_t arizona_jackdet(int irq, void *data)
+{
+        struct arizona_extcon_info *info = data;
+        struct arizona *arizona = info->arizona;
+        unsigned int val;
+        int ret;
+        pm_runtime_get_sync(info->dev);
+        mutex_lock(&info->lock);
+        ret = regmap_read(arizona->regmap, ARIZONA_AOD_IRQ_RAW_STATUS, &val);
+        if (ret != 0) {
+                dev_err(arizona->dev, "Failed to read jackdet status: %d\n",
+                        ret);
+                mutex_unlock(&info->lock);
+                pm_runtime_put_autosuspend(info->dev);
+                return IRQ_NONE;
+        }
+        if (val & ARIZONA_JD1_STS) {
+                dev_dbg(arizona->dev, "Detected jack\n");
+                ret = extcon_set_cable_state_(&info->edev,
+                                              ARIZONA_CABLE_MECHANICAL, true);
+                if (ret != 0)
+                        dev_err(arizona->dev, "Mechanical report failed: %d\n",
+                                ret);
+                arizona_start_mic(info);
+        } else {
+                dev_dbg(arizona->dev, "Detected jack removal\n");
+                arizona_stop_mic(info);
+                ret = extcon_update_state(&info->edev, 0xffffffff, 0);
+                if (ret != 0)
+                        dev_err(arizona->dev, "Removal report failed: %d\n",
+                                ret);
+        }
+        mutex_unlock(&info->lock);
+        pm_runtime_mark_last_busy(info->dev);
+        pm_runtime_put_autosuspend(info->dev);
+        return IRQ_HANDLED;
+}
+static int __devinit arizona_extcon_probe(struct platform_device *pdev)
+{
+        struct arizona *arizona = dev_get_drvdata(pdev->dev.parent);
+        struct arizona_pdata *pdata;
+        struct arizona_extcon_info *info;
+        int ret, mode;
+        pdata = dev_get_platdata(arizona->dev);
+        info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL);
+        if (!info) {
+                dev_err(&pdev->dev, "failed to allocate memory\n");
+                ret = -ENOMEM;
+                goto err;
+        }
+        info->micvdd = devm_regulator_get(arizona->dev, "MICVDD");
+        if (IS_ERR(info->micvdd)) {
+                ret = PTR_ERR(info->micvdd);
+                dev_err(arizona->dev, "Failed to get MICVDD: %d\n", ret);
+                goto err;
+        }
+        mutex_init(&info->lock);
+        info->arizona = arizona;
+        info->dev = &pdev->dev;
+        info->detecting = true;
+        platform_set_drvdata(pdev, info);
+        switch (arizona->type) {
+        case WM5102:
+                switch (arizona->rev) {
+                case 0:
+                        info->micd_reva = true;
+                        break;
+                default:
+                        break;
+                }
+                break;
+        default:
+                break;
+        }
+        info->edev.name = "Headset Jack";
+        info->edev.supported_cable = arizona_cable;
+        ret = extcon_dev_register(&info->edev, arizona->dev);
+        if (ret < 0) {
+                dev_err(arizona->dev, "extcon_dev_regster() failed: %d\n",
+                        ret);
+                goto err;
+        }
+        if (pdata->num_micd_configs) {
+                info->micd_modes = pdata->micd_configs;
+                info->micd_num_modes = pdata->num_micd_configs;
+        } else {
+                info->micd_modes = micd_default_modes;
+                info->micd_num_modes = ARRAY_SIZE(micd_default_modes);
+        }
+        if (arizona->pdata.micd_pol_gpio > 0) {
+                if (info->micd_modes[0].gpio)
+                        mode = GPIOF_OUT_INIT_HIGH;
+                else
+                        mode = GPIOF_OUT_INIT_LOW;
+                ret = devm_gpio_request_one(&pdev->dev,
+                                            arizona->pdata.micd_pol_gpio,
+                                            mode,
+                                            "MICD polarity");
+                if (ret != 0) {
+                        dev_err(arizona->dev, "Failed to request GPIO%d: %d\n",
+                                arizona->pdata.micd_pol_gpio, ret);
+                        goto err_register;
+                }
+        }
+        arizona_extcon_set_mode(info, 0);
+        pm_runtime_enable(&pdev->dev);
+        pm_runtime_idle(&pdev->dev);
+        pm_runtime_get_sync(&pdev->dev);
+        ret = arizona_request_irq(arizona, ARIZONA_IRQ_JD_RISE,
+                                  "JACKDET rise", arizona_jackdet, info);
+        if (ret != 0) {
+                dev_err(&pdev->dev, "Failed to get JACKDET rise IRQ: %d\n",
+                        ret);
+                goto err_register;
+        }
+        ret = arizona_set_irq_wake(arizona, ARIZONA_IRQ_JD_RISE, 1);
+        if (ret != 0) {
+                dev_err(&pdev->dev, "Failed to set JD rise IRQ wake: %d\n",
+                        ret);
+                goto err_rise;
+        }
+        ret = arizona_request_irq(arizona, ARIZONA_IRQ_JD_FALL,
+                                  "JACKDET fall", arizona_jackdet, info);
+        if (ret != 0) {
+                dev_err(&pdev->dev, "Failed to get JD fall IRQ: %d\n", ret);
+                goto err_rise_wake;
+        }
+        ret = arizona_set_irq_wake(arizona, ARIZONA_IRQ_JD_FALL, 1);
+        if (ret != 0) {
+                dev_err(&pdev->dev, "Failed to set JD fall IRQ wake: %d\n",
+                        ret);
+                goto err_fall;
+        }
+        ret = arizona_request_irq(arizona, ARIZONA_IRQ_MICDET,
+                                  "MICDET", arizona_micdet, info);
+        if (ret != 0) {
+                dev_err(&pdev->dev, "Failed to get MICDET IRQ: %d\n", ret);
+                goto err_fall_wake;
+        }
+        regmap_update_bits(arizona->regmap, ARIZONA_MIC_DETECT_1,
+                           ARIZONA_MICD_BIAS_STARTTIME_MASK |
+                           ARIZONA_MICD_RATE_MASK,
+                           7 << ARIZONA_MICD_BIAS_STARTTIME_SHIFT |
+                           8 << ARIZONA_MICD_RATE_SHIFT);
+        arizona_clk32k_enable(arizona);
+        regmap_update_bits(arizona->regmap, ARIZONA_JACK_DETECT_DEBOUNCE,
+                           ARIZONA_JD1_DB, ARIZONA_JD1_DB);
+        regmap_update_bits(arizona->regmap, ARIZONA_JACK_DETECT_ANALOGUE,
+                           ARIZONA_JD1_ENA, ARIZONA_JD1_ENA);
+        pm_runtime_put(&pdev->dev);
+        return 0;
+err_fall_wake:
+        arizona_set_irq_wake(arizona, ARIZONA_IRQ_JD_FALL, 0);
+err_fall:
+        arizona_free_irq(arizona, ARIZONA_IRQ_JD_FALL, info);
+err_rise_wake:
+        arizona_set_irq_wake(arizona, ARIZONA_IRQ_JD_RISE, 0);
+err_rise:
+        arizona_free_irq(arizona, ARIZONA_IRQ_JD_RISE, info);
+err_register:
+        pm_runtime_disable(&pdev->dev);
+        extcon_dev_unregister(&info->edev);
+err:
+        return ret;
+}
+static int __devexit arizona_extcon_remove(struct platform_device *pdev)
+{
+        struct arizona_extcon_info *info = platform_get_drvdata(pdev);
+        struct arizona *arizona = info->arizona;
+        pm_runtime_disable(&pdev->dev);
+        arizona_set_irq_wake(arizona, ARIZONA_IRQ_JD_RISE, 0);
+        arizona_set_irq_wake(arizona, ARIZONA_IRQ_JD_FALL, 0);
+        arizona_free_irq(arizona, ARIZONA_IRQ_MICDET, info);
+        arizona_free_irq(arizona, ARIZONA_IRQ_JD_RISE, info);
+        arizona_free_irq(arizona, ARIZONA_IRQ_JD_FALL, info);
+        regmap_update_bits(arizona->regmap, ARIZONA_JACK_DETECT_ANALOGUE,
+                           ARIZONA_JD1_ENA, 0);
+        arizona_clk32k_disable(arizona);
+        extcon_dev_unregister(&info->edev);
+        return 0;
+}
+static struct platform_driver arizona_extcon_driver = {
+        .driver         = {
+                .name   = "arizona-extcon",
+                .owner  = THIS_MODULE,
+        },
+        .probe          = arizona_extcon_probe,
+        .remove         = __devexit_p(arizona_extcon_remove),
+};
+module_platform_driver(arizona_extcon_driver);
+MODULE_DESCRIPTION("Arizona Extcon driver");
+MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:extcon-arizona");
diff --git a/drivers/extcon/extcon-max77693.c b/drivers/extcon/extcon-max77693.c
new file mode 100644
index 000000000000..920a609b2c35
--- /dev/null
+++ b/drivers/extcon/extcon-max77693.c
@@ -0,0 +1,779 @@
+/*
+ * extcon-max77693.c - MAX77693 extcon driver to support MAX77693 MUIC
+ *
+ * Copyright (C) 2012 Samsung Electrnoics
+ * Chanwoo Choi <cw00.choi@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/i2c.h>
+#include <linux/slab.h>
+#include <linux/interrupt.h>
+#include <linux/err.h>
+#include <linux/platform_device.h>
+#include <linux/mfd/max77693.h>
+#include <linux/mfd/max77693-private.h>
+#include <linux/extcon.h>
+#include <linux/regmap.h>
+#include <linux/irqdomain.h>
+#define DEV_NAME                        "max77693-muic"
+/* MAX77693 MUIC - STATUS1~3 Register */
+#define STATUS1_ADC_SHIFT               (0)
+#define STATUS1_ADCLOW_SHIFT            (5)
+#define STATUS1_ADCERR_SHIFT            (6)
+#define STATUS1_ADC1K_SHIFT             (7)
+#define STATUS1_ADC_MASK                (0x1f << STATUS1_ADC_SHIFT)
+#define STATUS1_ADCLOW_MASK             (0x1 << STATUS1_ADCLOW_SHIFT)
+#define STATUS1_ADCERR_MASK             (0x1 << STATUS1_ADCERR_SHIFT)
+#define STATUS1_ADC1K_MASK              (0x1 << STATUS1_ADC1K_SHIFT)
+#define STATUS2_CHGTYP_SHIFT            (0)
+#define STATUS2_CHGDETRUN_SHIFT         (3)
+#define STATUS2_DCDTMR_SHIFT            (4)
+#define STATUS2_DXOVP_SHIFT             (5)
+#define STATUS2_VBVOLT_SHIFT            (6)
+#define STATUS2_VIDRM_SHIFT             (7)
+#define STATUS2_CHGTYP_MASK             (0x7 << STATUS2_CHGTYP_SHIFT)
+#define STATUS2_CHGDETRUN_MASK          (0x1 << STATUS2_CHGDETRUN_SHIFT)
+#define STATUS2_DCDTMR_MASK             (0x1 << STATUS2_DCDTMR_SHIFT)
+#define STATUS2_DXOVP_MASK              (0x1 << STATUS2_DXOVP_SHIFT)
+#define STATUS2_VBVOLT_MASK             (0x1 << STATUS2_VBVOLT_SHIFT)
+#define STATUS2_VIDRM_MASK              (0x1 << STATUS2_VIDRM_SHIFT)
+#define STATUS3_OVP_SHIFT               (2)
+#define STATUS3_OVP_MASK                (0x1 << STATUS3_OVP_SHIFT)
+/* MAX77693 CDETCTRL1~2 register */
+#define CDETCTRL1_CHGDETEN_SHIFT        (0)
+#define CDETCTRL1_CHGTYPMAN_SHIFT       (1)
+#define CDETCTRL1_DCDEN_SHIFT           (2)
+#define CDETCTRL1_DCD2SCT_SHIFT         (3)
+#define CDETCTRL1_CDDELAY_SHIFT         (4)
+#define CDETCTRL1_DCDCPL_SHIFT          (5)
+#define CDETCTRL1_CDPDET_SHIFT          (7)
+#define CDETCTRL1_CHGDETEN_MASK         (0x1 << CDETCTRL1_CHGDETEN_SHIFT)
+#define CDETCTRL1_CHGTYPMAN_MASK        (0x1 << CDETCTRL1_CHGTYPMAN_SHIFT)
+#define CDETCTRL1_DCDEN_MASK            (0x1 << CDETCTRL1_DCDEN_SHIFT)
+#define CDETCTRL1_DCD2SCT_MASK          (0x1 << CDETCTRL1_DCD2SCT_SHIFT)
+#define CDETCTRL1_CDDELAY_MASK          (0x1 << CDETCTRL1_CDDELAY_SHIFT)
+#define CDETCTRL1_DCDCPL_MASK           (0x1 << CDETCTRL1_DCDCPL_SHIFT)
+#define CDETCTRL1_CDPDET_MASK           (0x1 << CDETCTRL1_CDPDET_SHIFT)
+#define CDETCTRL2_VIDRMEN_SHIFT         (1)
+#define CDETCTRL2_DXOVPEN_SHIFT         (3)
+#define CDETCTRL2_VIDRMEN_MASK          (0x1 << CDETCTRL2_VIDRMEN_SHIFT)
+#define CDETCTRL2_DXOVPEN_MASK          (0x1 << CDETCTRL2_DXOVPEN_SHIFT)
+/* MAX77693 MUIC - CONTROL1~3 register */
+#define COMN1SW_SHIFT                   (0)
+#define COMP2SW_SHIFT                   (3)
+#define COMN1SW_MASK                    (0x7 << COMN1SW_SHIFT)
+#define COMP2SW_MASK                    (0x7 << COMP2SW_SHIFT)
+#define COMP_SW_MASK                    (COMP2SW_MASK | COMN1SW_MASK)
+#define CONTROL1_SW_USB                 ((1 << COMP2SW_SHIFT) \
+                                                | (1 << COMN1SW_SHIFT))
+#define CONTROL1_SW_AUDIO               ((2 << COMP2SW_SHIFT) \
+                                                | (2 << COMN1SW_SHIFT))
+#define CONTROL1_SW_UART                ((3 << COMP2SW_SHIFT) \
+                                                | (3 << COMN1SW_SHIFT))
+#define CONTROL1_SW_OPEN                ((0 << COMP2SW_SHIFT) \
+                                                | (0 << COMN1SW_SHIFT))
+#define CONTROL2_LOWPWR_SHIFT           (0)
+#define CONTROL2_ADCEN_SHIFT            (1)
+#define CONTROL2_CPEN_SHIFT             (2)
+#define CONTROL2_SFOUTASRT_SHIFT        (3)
+#define CONTROL2_SFOUTORD_SHIFT         (4)
+#define CONTROL2_ACCDET_SHIFT           (5)
+#define CONTROL2_USBCPINT_SHIFT         (6)
+#define CONTROL2_RCPS_SHIFT             (7)
+#define CONTROL2_LOWPWR_MASK            (0x1 << CONTROL2_LOWPWR_SHIFT)
+#define CONTROL2_ADCEN_MASK             (0x1 << CONTROL2_ADCEN_SHIFT)
+#define CONTROL2_CPEN_MASK              (0x1 << CONTROL2_CPEN_SHIFT)
+#define CONTROL2_SFOUTASRT_MASK         (0x1 << CONTROL2_SFOUTASRT_SHIFT)
+#define CONTROL2_SFOUTORD_MASK          (0x1 << CONTROL2_SFOUTORD_SHIFT)
+#define CONTROL2_ACCDET_MASK            (0x1 << CONTROL2_ACCDET_SHIFT)
+#define CONTROL2_USBCPINT_MASK          (0x1 << CONTROL2_USBCPINT_SHIFT)
+#define CONTROL2_RCPS_MASK              (0x1 << CONTROL2_RCPS_SHIFT)
+#define CONTROL3_JIGSET_SHIFT           (0)
+#define CONTROL3_BTLDSET_SHIFT          (2)
+#define CONTROL3_ADCDBSET_SHIFT         (4)
+#define CONTROL3_JIGSET_MASK            (0x3 << CONTROL3_JIGSET_SHIFT)
+#define CONTROL3_BTLDSET_MASK           (0x3 << CONTROL3_BTLDSET_SHIFT)
+#define CONTROL3_ADCDBSET_MASK          (0x3 << CONTROL3_ADCDBSET_SHIFT)
+enum max77693_muic_adc_debounce_time {
+        ADC_DEBOUNCE_TIME_5MS = 0,
+        ADC_DEBOUNCE_TIME_10MS,
+        ADC_DEBOUNCE_TIME_25MS,
+        ADC_DEBOUNCE_TIME_38_62MS,
+};
+struct max77693_muic_info {
+        struct device *dev;
+        struct max77693_dev *max77693;
+        struct extcon_dev *edev;
+        int prev_adc;
+        int prev_adc_gnd;
+        int prev_chg_type;
+        u8 status[2];
+        int irq;
+        struct work_struct irq_work;
+        struct mutex mutex;
+};
+enum max77693_muic_charger_type {
+        MAX77693_CHARGER_TYPE_NONE = 0,
+        MAX77693_CHARGER_TYPE_USB,
+        MAX77693_CHARGER_TYPE_DOWNSTREAM_PORT,
+        MAX77693_CHARGER_TYPE_DEDICATED_CHG,
+        MAX77693_CHARGER_TYPE_APPLE_500MA,
+        MAX77693_CHARGER_TYPE_APPLE_1A_2A,
+        MAX77693_CHARGER_TYPE_DEAD_BATTERY = 7,
+};
+/**
+ * struct max77693_muic_irq
+ * @irq: the index of irq list of MUIC device.
+ * @name: the name of irq.
+ * @virq: the virtual irq to use irq domain
+ */
+struct max77693_muic_irq {
+        unsigned int irq;
+        const char *name;
+        unsigned int virq;
+};
+static struct max77693_muic_irq muic_irqs[] = {
+        { MAX77693_MUIC_IRQ_INT1_ADC,           "muic-ADC" },
+        { MAX77693_MUIC_IRQ_INT1_ADC_LOW,       "muic-ADCLOW" },
+        { MAX77693_MUIC_IRQ_INT1_ADC_ERR,       "muic-ADCError" },
+        { MAX77693_MUIC_IRQ_INT1_ADC1K,         "muic-ADC1K" },
+        { MAX77693_MUIC_IRQ_INT2_CHGTYP,        "muic-CHGTYP" },
+        { MAX77693_MUIC_IRQ_INT2_CHGDETREUN,    "muic-CHGDETREUN" },
+        { MAX77693_MUIC_IRQ_INT2_DCDTMR,        "muic-DCDTMR" },
+        { MAX77693_MUIC_IRQ_INT2_DXOVP,         "muic-DXOVP" },
+        { MAX77693_MUIC_IRQ_INT2_VBVOLT,        "muic-VBVOLT" },
+        { MAX77693_MUIC_IRQ_INT2_VIDRM,         "muic-VIDRM" },
+        { MAX77693_MUIC_IRQ_INT3_EOC,           "muic-EOC" },
+        { MAX77693_MUIC_IRQ_INT3_CGMBC,         "muic-CGMBC" },
+        { MAX77693_MUIC_IRQ_INT3_OVP,           "muic-OVP" },
+        { MAX77693_MUIC_IRQ_INT3_MBCCHG_ERR,    "muic-MBCCHG_ERR" },
+        { MAX77693_MUIC_IRQ_INT3_CHG_ENABLED,   "muic-CHG_ENABLED" },
+        { MAX77693_MUIC_IRQ_INT3_BAT_DET,       "muic-BAT_DET" },
+};
+/* Define supported accessory type */
+enum max77693_muic_acc_type {
+        MAX77693_MUIC_ADC_GROUND = 0x0,
+        MAX77693_MUIC_ADC_SEND_END_BUTTON,
+        MAX77693_MUIC_ADC_REMOTE_S1_BUTTON,
+        MAX77693_MUIC_ADC_REMOTE_S2_BUTTON,
+        MAX77693_MUIC_ADC_REMOTE_S3_BUTTON,
+        MAX77693_MUIC_ADC_REMOTE_S4_BUTTON,
+        MAX77693_MUIC_ADC_REMOTE_S5_BUTTON,
+        MAX77693_MUIC_ADC_REMOTE_S6_BUTTON,
+        MAX77693_MUIC_ADC_REMOTE_S7_BUTTON,
+        MAX77693_MUIC_ADC_REMOTE_S8_BUTTON,
+        MAX77693_MUIC_ADC_REMOTE_S9_BUTTON,
+        MAX77693_MUIC_ADC_REMOTE_S10_BUTTON,
+        MAX77693_MUIC_ADC_REMOTE_S11_BUTTON,
+        MAX77693_MUIC_ADC_REMOTE_S12_BUTTON,
+        MAX77693_MUIC_ADC_RESERVED_ACC_1,
+        MAX77693_MUIC_ADC_RESERVED_ACC_2,
+        MAX77693_MUIC_ADC_RESERVED_ACC_3,
+        MAX77693_MUIC_ADC_RESERVED_ACC_4,
+        MAX77693_MUIC_ADC_RESERVED_ACC_5,
+        MAX77693_MUIC_ADC_CEA936_AUDIO,
+        MAX77693_MUIC_ADC_PHONE_POWERED_DEV,
+        MAX77693_MUIC_ADC_TTY_CONVERTER,
+        MAX77693_MUIC_ADC_UART_CABLE,
+        MAX77693_MUIC_ADC_CEA936A_TYPE1_CHG,
+        MAX77693_MUIC_ADC_FACTORY_MODE_USB_OFF,
+        MAX77693_MUIC_ADC_FACTORY_MODE_USB_ON,
+        MAX77693_MUIC_ADC_AV_CABLE_NOLOAD,
+        MAX77693_MUIC_ADC_CEA936A_TYPE2_CHG,
+        MAX77693_MUIC_ADC_FACTORY_MODE_UART_OFF,
+        MAX77693_MUIC_ADC_FACTORY_MODE_UART_ON,
+        MAX77693_MUIC_ADC_AUDIO_MODE_REMOTE,
+        MAX77693_MUIC_ADC_OPEN,
+        /* The below accessories have same ADC value so ADCLow and
+           ADC1K bit is used to separate specific accessory */
+        MAX77693_MUIC_GND_USB_OTG = 0x100,      /* ADC:0x0, ADCLow:0, ADC1K:0 */
+        MAX77693_MUIC_GND_AV_CABLE_LOAD = 0x102,/* ADC:0x0, ADCLow:1, ADC1K:0 */
+        MAX77693_MUIC_GND_MHL_CABLE = 0x103,    /* ADC:0x0, ADCLow:1, ADC1K:1 */
+};
+/* MAX77693 MUIC device support below list of accessories(external connector) */
+const char *max77693_extcon_cable[] = {
+        [0] = "USB",
+        [1] = "USB-Host",
+        [2] = "TA",
+        [3] = "Fast-charger",
+        [4] = "Slow-charger",
+        [5] = "Charge-downstream",
+        [6] = "MHL",
+        [7] = "Audio-video-load",
+        [8] = "Audio-video-noload",
+        [9] = "JIG",
+        NULL,
+};
+static int max77693_muic_set_debounce_time(struct max77693_muic_info *info,
+                enum max77693_muic_adc_debounce_time time)
+{
+        int ret = 0;
+        u8 ctrl3;
+        switch (time) {
+        case ADC_DEBOUNCE_TIME_5MS:
+        case ADC_DEBOUNCE_TIME_10MS:
+        case ADC_DEBOUNCE_TIME_25MS:
+        case ADC_DEBOUNCE_TIME_38_62MS:
+                ret = max77693_read_reg(info->max77693->regmap_muic,
+                                MAX77693_MUIC_REG_CTRL3, &ctrl3);
+                ctrl3 &= ~CONTROL3_ADCDBSET_MASK;
+                ctrl3 |= (time << CONTROL3_ADCDBSET_SHIFT);
+                ret = max77693_write_reg(info->max77693->regmap_muic,
+                                MAX77693_MUIC_REG_CTRL3, ctrl3);
+                if (ret) {
+                        dev_err(info->dev, "failed to set ADC debounce time\n");
+                        ret = -EINVAL;
+                }
+                break;
+        default:
+                dev_err(info->dev, "invalid ADC debounce time\n");
+                ret = -EINVAL;
+                break;
+        }
+        return ret;
+};
+static int max77693_muic_set_path(struct max77693_muic_info *info,
+                u8 val, bool attached)
+{
+        int ret = 0;
+        u8 ctrl1, ctrl2 = 0;
+        if (attached)
+                ctrl1 = val;
+        else
+                ctrl1 = CONTROL1_SW_OPEN;
+        ret = max77693_update_reg(info->max77693->regmap_muic,
+                        MAX77693_MUIC_REG_CTRL1, ctrl1, COMP_SW_MASK);
+        if (ret < 0) {
+                dev_err(info->dev, "failed to update MUIC register\n");
+                goto out;
+        }
+        if (attached)
+                ctrl2 |= CONTROL2_CPEN_MASK;    /* LowPwr=0, CPEn=1 */
+        else
+                ctrl2 |= CONTROL2_LOWPWR_MASK;  /* LowPwr=1, CPEn=0 */
+        ret = max77693_update_reg(info->max77693->regmap_muic,
+                        MAX77693_MUIC_REG_CTRL2, ctrl2,
+                        CONTROL2_LOWPWR_MASK | CONTROL2_CPEN_MASK);
+        if (ret < 0) {
+                dev_err(info->dev, "failed to update MUIC register\n");
+                goto out;
+        }
+        dev_info(info->dev,
+                "CONTROL1 : 0x%02x, CONTROL2 : 0x%02x, state : %s\n",
+                ctrl1, ctrl2, attached ? "attached" : "detached");
+out:
+        return ret;
+}
+static int max77693_muic_adc_ground_handler(struct max77693_muic_info *info,
+                bool attached)
+{
+        int ret = 0;
+        int type;
+        int adc, adc1k, adclow;
+        if (attached) {
+                adc = info->status[0] & STATUS1_ADC_MASK;
+                adclow = info->status[0] & STATUS1_ADCLOW_MASK;
+                adclow >>= STATUS1_ADCLOW_SHIFT;
+                adc1k = info->status[0] & STATUS1_ADC1K_MASK;
+                adc1k >>= STATUS1_ADC1K_SHIFT;
+                /**
+                 * [0x1][ADCLow][ADC1K]
+                 * [0x1    0       0  ] : USB_OTG
+                 * [0x1    1       0  ] : Audio Video Cable with load
+                 * [0x1    1       1  ] : MHL
+                 */
+                type = ((0x1 << 8) | (adclow << 1) | adc1k);
+                /* Store previous ADC value to handle accessory
+                   when accessory will be detached */
+                info->prev_adc = adc;
+                info->prev_adc_gnd = type;
+        } else
+                type = info->prev_adc_gnd;
+        switch (type) {
+        case MAX77693_MUIC_GND_USB_OTG:
+                /* USB_OTG */
+                ret = max77693_muic_set_path(info, CONTROL1_SW_USB, attached);
+                if (ret < 0)
+                        goto out;
+                extcon_set_cable_state(info->edev, "USB-Host", attached);
+                break;
+        case MAX77693_MUIC_GND_AV_CABLE_LOAD:
+                /* Audio Video Cable with load */
+                ret = max77693_muic_set_path(info, CONTROL1_SW_AUDIO, attached);
+                if (ret < 0)
+                        goto out;
+                extcon_set_cable_state(info->edev,
+                                "Audio-video-load", attached);
+                break;
+        case MAX77693_MUIC_GND_MHL_CABLE:
+                /* MHL */
+                extcon_set_cable_state(info->edev, "MHL", attached);
+                break;
+        default:
+                dev_err(info->dev, "faild to detect %s accessory\n",
+                        attached ? "attached" : "detached");
+                dev_err(info->dev, "- adc:0x%x, adclow:0x%x, adc1k:0x%x\n",
+                        adc, adclow, adc1k);
+                ret = -EINVAL;
+                break;
+        }
+out:
+        return ret;
+}
+static int max77693_muic_adc_handler(struct max77693_muic_info *info,
+                int curr_adc, bool attached)
+{
+        int ret = 0;
+        int adc;
+        if (attached) {
+                /* Store ADC value to handle accessory
+                   when accessory will be detached */
+                info->prev_adc = curr_adc;
+                adc = curr_adc;
+        } else
+                adc = info->prev_adc;
+        dev_info(info->dev,
+                "external connector is %s (adc:0x%02x, prev_adc:0x%x)\n",
+                attached ? "attached" : "detached", curr_adc, info->prev_adc);
+        switch (adc) {
+        case MAX77693_MUIC_ADC_GROUND:
+                /* USB_OTG/MHL/Audio */
+                max77693_muic_adc_ground_handler(info, attached);
+                break;
+        case MAX77693_MUIC_ADC_FACTORY_MODE_USB_OFF:
+        case MAX77693_MUIC_ADC_FACTORY_MODE_USB_ON:
+                /* USB */
+                ret = max77693_muic_set_path(info, CONTROL1_SW_USB, attached);
+                if (ret < 0)
+                        goto out;
+                extcon_set_cable_state(info->edev, "USB", attached);
+                break;
+        case MAX77693_MUIC_ADC_FACTORY_MODE_UART_OFF:
+        case MAX77693_MUIC_ADC_FACTORY_MODE_UART_ON:
+                /* JIG */
+                ret = max77693_muic_set_path(info, CONTROL1_SW_UART, attached);
+                if (ret < 0)
+                        goto out;
+                extcon_set_cable_state(info->edev, "JIG", attached);
+                break;
+        case MAX77693_MUIC_ADC_AUDIO_MODE_REMOTE:
+                /* Audio Video cable with no-load */
+                ret = max77693_muic_set_path(info, CONTROL1_SW_AUDIO, attached);
+                if (ret < 0)
+                        goto out;
+                extcon_set_cable_state(info->edev,
+                                "Audio-video-noload", attached);
+                break;
+        case MAX77693_MUIC_ADC_SEND_END_BUTTON:
+        case MAX77693_MUIC_ADC_REMOTE_S1_BUTTON:
+        case MAX77693_MUIC_ADC_REMOTE_S2_BUTTON:
+        case MAX77693_MUIC_ADC_REMOTE_S3_BUTTON:
+        case MAX77693_MUIC_ADC_REMOTE_S4_BUTTON:
+        case MAX77693_MUIC_ADC_REMOTE_S5_BUTTON:
+        case MAX77693_MUIC_ADC_REMOTE_S6_BUTTON:
+        case MAX77693_MUIC_ADC_REMOTE_S7_BUTTON:
+        case MAX77693_MUIC_ADC_REMOTE_S8_BUTTON:
+        case MAX77693_MUIC_ADC_REMOTE_S9_BUTTON:
+        case MAX77693_MUIC_ADC_REMOTE_S10_BUTTON:
+        case MAX77693_MUIC_ADC_REMOTE_S11_BUTTON:
+        case MAX77693_MUIC_ADC_REMOTE_S12_BUTTON:
+        case MAX77693_MUIC_ADC_RESERVED_ACC_1:
+        case MAX77693_MUIC_ADC_RESERVED_ACC_2:
+        case MAX77693_MUIC_ADC_RESERVED_ACC_3:
+        case MAX77693_MUIC_ADC_RESERVED_ACC_4:
+        case MAX77693_MUIC_ADC_RESERVED_ACC_5:
+        case MAX77693_MUIC_ADC_CEA936_AUDIO:
+        case MAX77693_MUIC_ADC_PHONE_POWERED_DEV:
+        case MAX77693_MUIC_ADC_TTY_CONVERTER:
+        case MAX77693_MUIC_ADC_UART_CABLE:
+        case MAX77693_MUIC_ADC_CEA936A_TYPE1_CHG:
+        case MAX77693_MUIC_ADC_AV_CABLE_NOLOAD:
+        case MAX77693_MUIC_ADC_CEA936A_TYPE2_CHG:
+                /* This accessory isn't used in general case if it is specially
+                   needed to detect additional accessory, should implement
+                   proper operation when this accessory is attached/detached. */
+                dev_info(info->dev,
+                        "accessory is %s but it isn't used (adc:0x%x)\n",
+                        attached ? "attached" : "detached", adc);
+                goto out;
+        default:
+                dev_err(info->dev,
+                        "failed to detect %s accessory (adc:0x%x)\n",
+                        attached ? "attached" : "detached", adc);
+                ret = -EINVAL;
+                goto out;
+        }
+out:
+        return ret;
+}
+static int max77693_muic_chg_handler(struct max77693_muic_info *info,
+                int curr_chg_type, bool attached)
+{
+        int ret = 0;
+        int chg_type;
+        if (attached) {
+                /* Store previous charger type to control
+                   when charger accessory will be detached */
+                info->prev_chg_type = curr_chg_type;
+                chg_type = curr_chg_type;
+        } else
+                chg_type = info->prev_chg_type;
+        dev_info(info->dev,
+                "external connector is %s(chg_type:0x%x, prev_chg_type:0x%x)\n",
+                        attached ? "attached" : "detached",
+                        curr_chg_type, info->prev_chg_type);
+        switch (chg_type) {
+        case MAX77693_CHARGER_TYPE_USB:
+                ret = max77693_muic_set_path(info, CONTROL1_SW_USB, attached);
+                if (ret < 0)
+                        goto out;
+                extcon_set_cable_state(info->edev, "USB", attached);
+                break;
+        case MAX77693_CHARGER_TYPE_DOWNSTREAM_PORT:
+                extcon_set_cable_state(info->edev,
+                                "Charge-downstream", attached);
+                break;
+        case MAX77693_CHARGER_TYPE_DEDICATED_CHG:
+                extcon_set_cable_state(info->edev, "TA", attached);
+                break;
+        case MAX77693_CHARGER_TYPE_APPLE_500MA:
+                extcon_set_cable_state(info->edev, "Slow-charger", attached);
+                break;
+        case MAX77693_CHARGER_TYPE_APPLE_1A_2A:
+                extcon_set_cable_state(info->edev, "Fast-charger", attached);
+                break;
+        case MAX77693_CHARGER_TYPE_DEAD_BATTERY:
+                break;
+        default:
+                dev_err(info->dev,
+                        "failed to detect %s accessory (chg_type:0x%x)\n",
+                        attached ? "attached" : "detached", chg_type);
+                ret = -EINVAL;
+                goto out;
+        }
+out:
+        return ret;
+}
+static void max77693_muic_irq_work(struct work_struct *work)
+{
+        struct max77693_muic_info *info = container_of(work,
+                        struct max77693_muic_info, irq_work);
+        int curr_adc, curr_chg_type;
+        int irq_type = -1;
+        int i, ret = 0;
+        bool attached = true;
+        if (!info->edev)
+                return;
+        mutex_lock(&info->mutex);
+        for (i = 0 ; i < ARRAY_SIZE(muic_irqs) ; i++)
+                if (info->irq == muic_irqs[i].virq)
+                        irq_type = muic_irqs[i].irq;
+        ret = max77693_bulk_read(info->max77693->regmap_muic,
+                        MAX77693_MUIC_REG_STATUS1, 2, info->status);
+        if (ret) {
+                dev_err(info->dev, "failed to read MUIC register\n");
+                mutex_unlock(&info->mutex);
+                return;
+        }
+        switch (irq_type) {
+        case MAX77693_MUIC_IRQ_INT1_ADC:
+        case MAX77693_MUIC_IRQ_INT1_ADC_LOW:
+        case MAX77693_MUIC_IRQ_INT1_ADC_ERR:
+        case MAX77693_MUIC_IRQ_INT1_ADC1K:
+                /* Handle all of accessory except for
+                   type of charger accessory */
+                curr_adc = info->status[0] & STATUS1_ADC_MASK;
+                curr_adc >>= STATUS1_ADC_SHIFT;
+                /* Check accossory state which is either detached or attached */
+                if (curr_adc == MAX77693_MUIC_ADC_OPEN)
+                        attached = false;
+                ret = max77693_muic_adc_handler(info, curr_adc, attached);
+                break;
+        case MAX77693_MUIC_IRQ_INT2_CHGTYP:
+        case MAX77693_MUIC_IRQ_INT2_CHGDETREUN:
+        case MAX77693_MUIC_IRQ_INT2_DCDTMR:
+        case MAX77693_MUIC_IRQ_INT2_DXOVP:
+        case MAX77693_MUIC_IRQ_INT2_VBVOLT:
+        case MAX77693_MUIC_IRQ_INT2_VIDRM:
+                /* Handle charger accessory */
+                curr_chg_type = info->status[1] & STATUS2_CHGTYP_MASK;
+                curr_chg_type >>= STATUS2_CHGTYP_SHIFT;
+                /* Check charger accossory state which
+                   is either detached or attached */
+                if (curr_chg_type == MAX77693_CHARGER_TYPE_NONE)
+                        attached = false;
+                ret = max77693_muic_chg_handler(info, curr_chg_type, attached);
+                break;
+        case MAX77693_MUIC_IRQ_INT3_EOC:
+        case MAX77693_MUIC_IRQ_INT3_CGMBC:
+        case MAX77693_MUIC_IRQ_INT3_OVP:
+        case MAX77693_MUIC_IRQ_INT3_MBCCHG_ERR:
+        case MAX77693_MUIC_IRQ_INT3_CHG_ENABLED:
+        case MAX77693_MUIC_IRQ_INT3_BAT_DET:
+                break;
+        default:
+                dev_err(info->dev, "muic interrupt: irq %d occurred\n",
+                                irq_type);
+                break;
+        }
+        if (ret < 0)
+                dev_err(info->dev, "failed to handle MUIC interrupt\n");
+        mutex_unlock(&info->mutex);
+        return;
+}
+static irqreturn_t max77693_muic_irq_handler(int irq, void *data)
+{
+        struct max77693_muic_info *info = data;
+        info->irq = irq;
+        schedule_work(&info->irq_work);
+        return IRQ_HANDLED;
+}
+static struct regmap_config max77693_muic_regmap_config = {
+        .reg_bits = 8,
+        .val_bits = 8,
+};
+static int max77693_muic_detect_accessory(struct max77693_muic_info *info)
+{
+        int ret = 0;
+        int adc, chg_type;
+        mutex_lock(&info->mutex);
+        /* Read STATUSx register to detect accessory */
+        ret = max77693_bulk_read(info->max77693->regmap_muic,
+                        MAX77693_MUIC_REG_STATUS1, 2, info->status);
+        if (ret) {
+                dev_err(info->dev, "failed to read MUIC register\n");
+                mutex_unlock(&info->mutex);
+                return -EINVAL;
+        }
+        adc = info->status[0] & STATUS1_ADC_MASK;
+        adc >>= STATUS1_ADC_SHIFT;
+        if (adc != MAX77693_MUIC_ADC_OPEN) {
+                dev_info(info->dev,
+                        "external connector is attached (adc:0x%02x)\n", adc);
+                ret = max77693_muic_adc_handler(info, adc, true);
+                if (ret < 0)
+                        dev_err(info->dev, "failed to detect accessory\n");
+                goto out;
+        }
+        chg_type = info->status[1] & STATUS2_CHGTYP_MASK;
+        chg_type >>= STATUS2_CHGTYP_SHIFT;
+        if (chg_type != MAX77693_CHARGER_TYPE_NONE) {
+                dev_info(info->dev,
+                        "external connector is attached (chg_type:0x%x)\n",
+                        chg_type);
+                max77693_muic_chg_handler(info, chg_type, true);
+                if (ret < 0)
+                        dev_err(info->dev, "failed to detect charger accessory\n");
+        }
+out:
+        mutex_unlock(&info->mutex);
+        return ret;
+}
+static int __devinit max77693_muic_probe(struct platform_device *pdev)
+{
+        struct max77693_dev *max77693 = dev_get_drvdata(pdev->dev.parent);
+        struct max77693_muic_info *info;
+        int ret, i;
+        u8 id;
+        info = kzalloc(sizeof(struct max77693_muic_info), GFP_KERNEL);
+        if (!info) {
+                dev_err(&pdev->dev, "failed to allocate memory\n");
+                ret = -ENOMEM;
+                goto err_kfree;
+        }
+        info->dev = &pdev->dev;
+        info->max77693 = max77693;
+        info->max77693->regmap_muic = regmap_init_i2c(info->max77693->muic,
+                                         &max77693_muic_regmap_config);
+        if (IS_ERR(info->max77693->regmap_muic)) {
+                ret = PTR_ERR(info->max77693->regmap_muic);
+                dev_err(max77693->dev,
+                        "failed to allocate register map: %d\n", ret);
+                goto err_regmap;
+        }
+        platform_set_drvdata(pdev, info);
+        mutex_init(&info->mutex);
+        INIT_WORK(&info->irq_work, max77693_muic_irq_work);
+        /* Support irq domain for MAX77693 MUIC device */
+        for (i = 0; i < ARRAY_SIZE(muic_irqs); i++) {
+                struct max77693_muic_irq *muic_irq = &muic_irqs[i];
+                int virq = 0;
+                virq = irq_create_mapping(max77693->irq_domain, muic_irq->irq);
+                if (!virq)
+                        goto err_irq;
+                muic_irq->virq = virq;
+                ret = request_threaded_irq(virq, NULL,
+                                max77693_muic_irq_handler,
+                                0, muic_irq->name, info);
+                if (ret) {
+                        dev_err(&pdev->dev,
+                                "failed: irq request (IRQ: %d,"
+                                " error :%d)\n",
+                                muic_irq->irq, ret);
+                        for (i = i - 1; i >= 0; i--)
+                                free_irq(muic_irq->virq, info);
+                        goto err_irq;
+                }
+        }
+        /* Initialize extcon device */
+        info->edev = kzalloc(sizeof(struct extcon_dev), GFP_KERNEL);
+        if (!info->edev) {
+                dev_err(&pdev->dev, "failed to allocate memory for extcon\n");
+                ret = -ENOMEM;
+                goto err_irq;
+        }
+        info->edev->name = DEV_NAME;
+        info->edev->supported_cable = max77693_extcon_cable;
+        ret = extcon_dev_register(info->edev, NULL);
+        if (ret) {
+                dev_err(&pdev->dev, "failed to register extcon device\n");
+                goto err_extcon;
+        }
+        /* Check revision number of MUIC device*/
+        ret = max77693_read_reg(info->max77693->regmap_muic,
+                        MAX77693_MUIC_REG_ID, &id);
+        if (ret < 0) {
+                dev_err(&pdev->dev, "failed to read revision number\n");
+                goto err_extcon;
+        }
+        dev_info(info->dev, "device ID : 0x%x\n", id);
+        /* Set ADC debounce time */
+        max77693_muic_set_debounce_time(info, ADC_DEBOUNCE_TIME_25MS);
+        /* Detect accessory on boot */
+        max77693_muic_detect_accessory(info);
+        return ret;
+err_extcon:
+        kfree(info->edev);
+err_irq:
+err_regmap:
+        kfree(info);
+err_kfree:
+        return ret;
+}
+static int __devexit max77693_muic_remove(struct platform_device *pdev)
+{
+        struct max77693_muic_info *info = platform_get_drvdata(pdev);
+        int i;
+        for (i = 0; i < ARRAY_SIZE(muic_irqs); i++)
+                free_irq(muic_irqs[i].virq, info);
+        cancel_work_sync(&info->irq_work);
+        extcon_dev_unregister(info->edev);
+        kfree(info);
+        return 0;
+}
+static struct platform_driver max77693_muic_driver = {
+        .driver         = {
+                .name   = DEV_NAME,
+                .owner  = THIS_MODULE,
+        },
+        .probe          = max77693_muic_probe,
+        .remove         = __devexit_p(max77693_muic_remove),
+};
+module_platform_driver(max77693_muic_driver);
+MODULE_DESCRIPTION("Maxim MAX77693 Extcon driver");
+MODULE_AUTHOR("Chanwoo Choi <cw00.choi@samsung.com>");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:extcon-max77693");
diff --git a/drivers/extcon/extcon-max8997.c b/drivers/extcon/extcon-max8997.c
index 23416e443765..ef9090a4271d 100644
--- a/drivers/extcon/extcon-max8997.c
+++ b/drivers/extcon/extcon-max8997.c
@@ -26,6 +26,7 @@
 #include <linux/mfd/max8997.h>
 #include <linux/mfd/max8997-private.h>
 #include <linux/extcon.h>
+#include <linux/irqdomain.h>
 #define DEV_NAME                        "max8997-muic"
@@ -77,6 +78,7 @@
 struct max8997_muic_irq {
        unsigned int irq;
        const char *name;
+        unsigned int virq;
 };
 static struct max8997_muic_irq muic_irqs[] = {
@@ -116,8 +118,8 @@ const char *max8997_extcon_cable[] = {
        [5] = "Charge-downstream",
        [6] = "MHL",
        [7] = "Dock-desk",
-        [7] = "Dock-card",
+        [8] = "Dock-card",
-        [8] = "JIG",
+        [9] = "JIG",
        NULL,
 };
@@ -343,12 +345,10 @@ static void max8997_muic_irq_work(struct work_struct *work)
 {
        struct max8997_muic_info *info = container_of(work,
                        struct max8997_muic_info, irq_work);
-        struct max8997_dev *max8997 = i2c_get_clientdata(info->muic);
        u8 status[2];
        u8 adc, chg_type;
+        int irq_type = 0;
-        int irq_type = info->irq - max8997->irq_base;
+        int i, ret;
-        int ret;
        mutex_lock(&info->mutex);
@@ -363,6 +363,10 @@ static void max8997_muic_irq_work(struct work_struct *work)
        dev_dbg(info->dev, "%s: STATUS1:0x%x, 2:0x%x\n", __func__,
                        status[0], status[1]);
+        for (i = 0 ; i < ARRAY_SIZE(muic_irqs) ; i++)
+                if (info->irq == muic_irqs[i].virq)
+                        irq_type = muic_irqs[i].irq;
        switch (irq_type) {
        case MAX8997_MUICIRQ_ADC:
                adc = status[0] & STATUS1_ADC_MASK;
@@ -448,11 +452,15 @@ static int __devinit max8997_muic_probe(struct platform_device *pdev)
        for (i = 0; i < ARRAY_SIZE(muic_irqs); i++) {
                struct max8997_muic_irq *muic_irq = &muic_irqs[i];
+                int virq = 0;
-                ret = request_threaded_irq(pdata->irq_base + muic_irq->irq,
+                virq = irq_create_mapping(max8997->irq_domain, muic_irq->irq);
-                                NULL, max8997_muic_irq_handler,
+                if (!virq)
-                                0, muic_irq->name,
+                        goto err_irq;
-                                info);
+                muic_irq->virq = virq;
+                ret = request_threaded_irq(virq, NULL,max8997_muic_irq_handler,
+                                0, muic_irq->name, info);
                if (ret) {
                        dev_err(&pdev->dev,
                                "failed: irq request (IRQ: %d,"
@@ -496,7 +504,7 @@ err_extcon:
        kfree(info->edev);
 err_irq:
        while (--i >= 0)
-                free_irq(pdata->irq_base + muic_irqs[i].irq, info);
+                free_irq(muic_irqs[i].virq, info);
        kfree(info);
 err_kfree:
        return ret;
@@ -505,15 +513,15 @@ err_kfree:
 static int __devexit max8997_muic_remove(struct platform_device *pdev)
 {
        struct max8997_muic_info *info = platform_get_drvdata(pdev);
-        struct max8997_dev *max8997 = i2c_get_clientdata(info->muic);
        int i;
        for (i = 0; i < ARRAY_SIZE(muic_irqs); i++)
-                free_irq(max8997->irq_base + muic_irqs[i].irq, info);
+                free_irq(muic_irqs[i].virq, info);
        cancel_work_sync(&info->irq_work);
        extcon_dev_unregister(info->edev);
+        kfree(info->edev);
        kfree(info);
        return 0;
diff --git a/drivers/extcon/extcon_class.c b/drivers/extcon/extcon_class.c
index f598a700ec15..f6419f9db76c 100644
--- a/drivers/extcon/extcon_class.c
+++ b/drivers/extcon/extcon_class.c
@@ -65,7 +65,7 @@ const char *extcon_cable_name[] = {
        NULL,
 };
-struct class *extcon_class;
+static struct class *extcon_class;
 #if defined(CONFIG_ANDROID)
 static struct class_compat *switch_class;
 #endif /* CONFIG_ANDROID */
@@ -762,7 +762,7 @@ int extcon_dev_register(struct extcon_dev *edev, struct device *dev)
 #if defined(CONFIG_ANDROID)
        if (switch_class)
                ret = class_compat_create_link(switch_class, edev->dev,
-                                               dev);
+                                               NULL);
 #endif /* CONFIG_ANDROID */
        spin_lock_init(&edev->lock);
diff --git a/drivers/extcon/extcon_gpio.c b/drivers/extcon/extcon_gpio.c
index fe7a07b47336..3cc152e690b0 100644
--- a/drivers/extcon/extcon_gpio.c
+++ b/drivers/extcon/extcon_gpio.c
@@ -105,38 +105,35 @@ static int __devinit gpio_extcon_probe(struct platform_device *pdev)
        ret = extcon_dev_register(&extcon_data->edev, &pdev->dev);
        if (ret < 0)
-                goto err_extcon_dev_register;
+                return ret;
-        ret = gpio_request_one(extcon_data->gpio, GPIOF_DIR_IN, pdev->name);
+        ret = devm_gpio_request_one(&pdev->dev, extcon_data->gpio, GPIOF_DIR_IN,
+                                    pdev->name);
        if (ret < 0)
-                goto err_request_gpio;
+                goto err;
        INIT_DELAYED_WORK(&extcon_data->work, gpio_extcon_work);
        extcon_data->irq = gpio_to_irq(extcon_data->gpio);
        if (extcon_data->irq < 0) {
                ret = extcon_data->irq;
-                goto err_detect_irq_num_failed;
+                goto err;
        }
        ret = request_any_context_irq(extcon_data->irq, gpio_irq_handler,
                                      pdata->irq_flags, pdev->name,
                                      extcon_data);
        if (ret < 0)
-                goto err_request_irq;
+                goto err;
+        platform_set_drvdata(pdev, extcon_data);
        /* Perform initial detection */
        gpio_extcon_work(&extcon_data->work.work);
        return 0;
-err_request_irq:
+err:
-err_detect_irq_num_failed:
-        gpio_free(extcon_data->gpio);
-err_request_gpio:
        extcon_dev_unregister(&extcon_data->edev);
-err_extcon_dev_register:
-        devm_kfree(&pdev->dev, extcon_data);
        return ret;
 }
@@ -146,9 +143,8 @@ static int __devexit gpio_extcon_remove(struct platform_device *pdev)
        struct gpio_extcon_data *extcon_data = platform_get_drvdata(pdev);
        cancel_delayed_work_sync(&extcon_data->work);
-        gpio_free(extcon_data->gpio);
+        free_irq(extcon_data->irq, extcon_data);
        extcon_dev_unregister(&extcon_data->edev);
-        devm_kfree(&pdev->dev, extcon_data);
        return 0;
 }
diff --git a/drivers/firewire/core-device.c b/drivers/firewire/core-device.c
index 4d460ef87161..7a05fd24d68b 100644
--- a/drivers/firewire/core-device.c
+++ b/drivers/firewire/core-device.c
@@ -398,6 +398,14 @@ static ssize_t guid_show(struct device *dev,
        return ret;
 }
+static ssize_t is_local_show(struct device *dev,
+                             struct device_attribute *attr, char *buf)
+{
+        struct fw_device *device = fw_device(dev);
+        return sprintf(buf, "%u\n", device->is_local);
+}
 static int units_sprintf(char *buf, const u32 *directory)
 {
        struct fw_csr_iterator ci;
@@ -447,6 +455,7 @@ static ssize_t units_show(struct device *dev,
 static struct device_attribute fw_device_attributes[] = {
        __ATTR_RO(config_rom),
        __ATTR_RO(guid),
+        __ATTR_RO(is_local),
        __ATTR_RO(units),
        __ATTR_NULL,
 };
diff --git a/drivers/firewire/core-iso.c b/drivers/firewire/core-iso.c
index 8382e27e9a27..38c0aa60b2cb 100644
--- a/drivers/firewire/core-iso.c
+++ b/drivers/firewire/core-iso.c
@@ -146,7 +146,7 @@ EXPORT_SYMBOL(fw_iso_buffer_destroy);
 /* Convert DMA address to offset into virtually contiguous buffer. */
 size_t fw_iso_buffer_lookup(struct fw_iso_buffer *buffer, dma_addr_t completed)
 {
-        int i;
+        size_t i;
        dma_addr_t address;
        ssize_t offset;
diff --git a/drivers/firewire/core-transaction.c b/drivers/firewire/core-transaction.c
index 780708dc6e25..87d6f2d2f02d 100644
--- a/drivers/firewire/core-transaction.c
+++ b/drivers/firewire/core-transaction.c
@@ -525,9 +525,10 @@ const struct fw_address_region fw_high_memory_region =
        { .start = 0x000100000000ULL, .end = 0xffffe0000000ULL,  };
 EXPORT_SYMBOL(fw_high_memory_region);
-#if 0
+static const struct fw_address_region low_memory_region =
-const struct fw_address_region fw_low_memory_region =
        { .start = 0x000000000000ULL, .end = 0x000100000000ULL,  };
+#if 0
 const struct fw_address_region fw_private_region =
        { .start = 0xffffe0000000ULL, .end = 0xfffff0000000ULL,  };
 const struct fw_address_region fw_csr_region =
@@ -1198,6 +1199,23 @@ static struct fw_address_handler registers = {
        .address_callback       = handle_registers,
 };
+static void handle_low_memory(struct fw_card *card, struct fw_request *request,
+                int tcode, int destination, int source, int generation,
+                unsigned long long offset, void *payload, size_t length,
+                void *callback_data)
+{
+        /*
+         * This catches requests not handled by the physical DMA unit,
+         * i.e., wrong transaction types or unauthorized source nodes.
+         */
+        fw_send_response(card, request, RCODE_TYPE_ERROR);
+}
+static struct fw_address_handler low_memory = {
+        .length                 = 0x000100000000ULL,
+        .address_callback       = handle_low_memory,
+};
 MODULE_AUTHOR("Kristian Hoegsberg <krh@bitplanet.net>");
 MODULE_DESCRIPTION("Core IEEE1394 transaction logic");
 MODULE_LICENSE("GPL");
@@ -1259,6 +1277,7 @@ static int __init fw_core_init(void)
        fw_core_add_address_handler(&topology_map, &topology_map_region);
        fw_core_add_address_handler(&registers, &registers_region);
+        fw_core_add_address_handler(&low_memory, &low_memory_region);
        fw_core_add_descriptor(&vendor_id_descriptor);
        fw_core_add_descriptor(&model_id_descriptor);
diff --git a/drivers/firewire/ohci.c b/drivers/firewire/ohci.c
index c1af05e834b6..c788dbdaf3bc 100644
--- a/drivers/firewire/ohci.c
+++ b/drivers/firewire/ohci.c
@@ -191,6 +191,7 @@ struct fw_ohci {
        unsigned quirks;
        unsigned int pri_req_max;
        u32 bus_time;
+        bool bus_time_running;
        bool is_root;
        bool csr_state_setclear_abdicate;
        int n_ir;
@@ -1726,6 +1727,13 @@ static u32 update_bus_time(struct fw_ohci *ohci)
 {
        u32 cycle_time_seconds = get_cycle_time(ohci) >> 25;
+        if (unlikely(!ohci->bus_time_running)) {
+                reg_write(ohci, OHCI1394_IntMaskSet, OHCI1394_cycle64Seconds);
+                ohci->bus_time = (lower_32_bits(get_seconds()) & ~0x7f) |
+                                 (cycle_time_seconds & 0x40);
+                ohci->bus_time_running = true;
+        }
        if ((ohci->bus_time & 0x40) != (cycle_time_seconds & 0x40))
                ohci->bus_time += 0x40;
@@ -2213,7 +2221,7 @@ static int ohci_enable(struct fw_card *card,
 {
        struct fw_ohci *ohci = fw_ohci(card);
        struct pci_dev *dev = to_pci_dev(card->device);
-        u32 lps, seconds, version, irqs;
+        u32 lps, version, irqs;
        int i, ret;
        if (software_reset(ohci)) {
@@ -2269,9 +2277,12 @@ static int ohci_enable(struct fw_card *card,
                  (OHCI1394_MAX_PHYS_RESP_RETRIES << 8) |
                  (200 << 16));
-        seconds = lower_32_bits(get_seconds());
+        ohci->bus_time_running = false;
-        reg_write(ohci, OHCI1394_IsochronousCycleTimer, seconds << 25);
-        ohci->bus_time = seconds & ~0x3f;
+        for (i = 0; i < 32; i++)
+                if (ohci->ir_context_support & (1 << i))
+                        reg_write(ohci, OHCI1394_IsoRcvContextControlClear(i),
+                                  IR_CONTEXT_MULTI_CHANNEL_MODE);
        version = reg_read(ohci, OHCI1394_Version) & 0x00ff00ff;
        if (version >= OHCI_VERSION_1_1) {
@@ -2369,7 +2380,6 @@ static int ohci_enable(struct fw_card *card,
                OHCI1394_postedWriteErr |
                OHCI1394_selfIDComplete |
                OHCI1394_regAccessFail |
-                OHCI1394_cycle64Seconds |
                OHCI1394_cycleInconsistent |
                OHCI1394_unrecoverableError |
                OHCI1394_cycleTooLong |
@@ -2658,7 +2668,8 @@ static void ohci_write_csr(struct fw_card *card, int csr_offset, u32 value)
        case CSR_BUS_TIME:
                spin_lock_irqsave(&ohci->lock, flags);
-                ohci->bus_time = (ohci->bus_time & 0x7f) | (value & ~0x7f);
+                ohci->bus_time = (update_bus_time(ohci) & 0x40) |
+                                 (value & ~0x7f);
                spin_unlock_irqrestore(&ohci->lock, flags);
                break;
@@ -3539,6 +3550,13 @@ static int __devinit pci_probe(struct pci_dev *dev,
        INIT_WORK(&ohci->bus_reset_work, bus_reset_work);
+        if (!(pci_resource_flags(dev, 0) & IORESOURCE_MEM) ||
+            pci_resource_len(dev, 0) < OHCI1394_REGISTER_SIZE) {
+                dev_err(&dev->dev, "invalid MMIO resource\n");
+                err = -ENXIO;
+                goto fail_disable;
+        }
        err = pci_request_region(dev, 0, ohci_driver_name);
        if (err) {
                dev_err(&dev->dev, "MMIO resource unavailable\n");
diff --git a/drivers/firmware/dmi_scan.c b/drivers/firmware/dmi_scan.c
index 153980be4ee6..b298158cb922 100644
--- a/drivers/firmware/dmi_scan.c
+++ b/drivers/firmware/dmi_scan.c
@@ -6,6 +6,7 @@
 #include <linux/dmi.h>
 #include <linux/efi.h>
 #include <linux/bootmem.h>
+#include <linux/random.h>
 #include <asm/dmi.h>
 /*
@@ -111,6 +112,8 @@ static int __init dmi_walk_early(void (*decode)(const struct dmi_header *,
        dmi_table(buf, dmi_len, dmi_num, decode, NULL);
+        add_device_randomness(buf, dmi_len);
        dmi_iounmap(buf, dmi_len);
        return 0;
 }
diff --git a/drivers/firmware/memmap.c b/drivers/firmware/memmap.c
index adc07102a20d..c1cdc9236666 100644
--- a/drivers/firmware/memmap.c
+++ b/drivers/firmware/memmap.c
@@ -98,7 +98,7 @@ static LIST_HEAD(map_entries);
 /**
 * firmware_map_add_entry() - Does the real work to add a firmware memmap entry.
 * @start: Start of the memory range.
- * @end:   End of the memory range (inclusive).
+ * @end:   End of the memory range (exclusive).
 * @type:  Type of the memory range.
 * @entry: Pre-allocated (either kmalloc() or bootmem allocator), uninitialised
 *         entry.
@@ -113,7 +113,7 @@ static int firmware_map_add_entry(u64 start, u64 end,
        BUG_ON(start > end);
        entry->start = start;
-        entry->end = end;
+        entry->end = end - 1;
        entry->type = type;
        INIT_LIST_HEAD(&entry->list);
        kobject_init(&entry->kobj, &memmap_ktype);
@@ -148,7 +148,7 @@ static int add_sysfs_fw_map_entry(struct firmware_map_entry *entry)
 * firmware_map_add_hotplug() - Adds a firmware mapping entry when we do
 * memory hotplug.
 * @start: Start of the memory range.
- * @end:   End of the memory range (inclusive).
+ * @end:   End of the memory range (exclusive)
 * @type:  Type of the memory range.
 *
 * Adds a firmware mapping entry. This function is for memory hotplug, it is
@@ -175,7 +175,7 @@ int __meminit firmware_map_add_hotplug(u64 start, u64 end, const char *type)
 /**
 * firmware_map_add_early() - Adds a firmware mapping entry.
 * @start: Start of the memory range.
- * @end:   End of the memory range (inclusive).
+ * @end:   End of the memory range.
 * @type:  Type of the memory range.
 *
 * Adds a firmware mapping entry. This function uses the bootmem allocator
diff --git a/drivers/firmware/pcdp.c b/drivers/firmware/pcdp.c
index 51e0e2d8fac6..a330492e06f9 100644
--- a/drivers/firmware/pcdp.c
+++ b/drivers/firmware/pcdp.c
@@ -95,7 +95,7 @@ efi_setup_pcdp_console(char *cmdline)
        if (efi.hcdp == EFI_INVALID_TABLE_ADDR)
                return -ENODEV;
-        pcdp = ioremap(efi.hcdp, 4096);
+        pcdp = early_ioremap(efi.hcdp, 4096);
        printk(KERN_INFO "PCDP: v%d at 0x%lx\n", pcdp->rev, efi.hcdp);
        if (strstr(cmdline, "console=hcdp")) {
@@ -131,6 +131,6 @@ efi_setup_pcdp_console(char *cmdline)
        }
 out:
-        iounmap(pcdp);
+        early_iounmap(pcdp, 4096);
        return rc;
 }
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index c4067d0141f7..b16c8a72a2e2 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -136,7 +136,7 @@ config GPIO_MPC8XXX
 config GPIO_MSM_V1
        tristate "Qualcomm MSM GPIO v1"
-        depends on GPIOLIB && ARCH_MSM
+        depends on GPIOLIB && ARCH_MSM && (ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50)
        help
          Say yes here to support the GPIO interface on ARM v6 based
          Qualcomm MSM chips.  Most of the pins on the MSM can be
@@ -253,6 +253,12 @@ config GPIO_GE_FPGA
 comment "I2C GPIO expanders:"
+config GPIO_ARIZONA
+        tristate "Wolfson Microelectronics Arizona class devices"
+        depends on MFD_ARIZONA
+        help
+          Support for GPIOs on Wolfson Arizona class devices.
 config GPIO_MAX7300
        tristate "Maxim MAX7300 GPIO expander"
        depends on I2C
@@ -466,6 +472,18 @@ config GPIO_BT8XX
          If unsure, say N.
+config GPIO_AMD8111
+        tristate "AMD 8111 GPIO driver"
+        depends on PCI
+        help
+          The AMD 8111 south bridge contains 32 GPIO pins which can be used.
+          Note, that usually system firmware/ACPI handles GPIO pins on their
+          own and users might easily break their systems with uncarefull usage
+          of this driver!
+          If unsure, say N
 config GPIO_LANGWELL
        bool "Intel Langwell/Penwell GPIO support"
        depends on PCI && X86
@@ -579,6 +597,13 @@ config GPIO_AB8500
        help
          Select this to enable the AB8500 IC GPIO driver
+config GPIO_TPS6586X
+        bool "TPS6586X GPIO"
+        depends on MFD_TPS6586X
+        help
+          Select this option to enable GPIO driver for the TPS6586X
+          chip family.
 config GPIO_TPS65910
        bool "TPS65910 GPIO"
        depends on MFD_TPS65910
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 0f55662002c3..153caceeb053 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -12,6 +12,8 @@ obj-$(CONFIG_GPIO_74X164)	+= gpio-74x164.o
 obj-$(CONFIG_GPIO_AB8500)       += gpio-ab8500.o
 obj-$(CONFIG_GPIO_ADP5520)      += gpio-adp5520.o
 obj-$(CONFIG_GPIO_ADP5588)      += gpio-adp5588.o
+obj-$(CONFIG_GPIO_AMD8111)      += gpio-amd8111.o
+obj-$(CONFIG_GPIO_ARIZONA)      += gpio-arizona.o
 obj-$(CONFIG_GPIO_BT8XX)        += gpio-bt8xx.o
 obj-$(CONFIG_GPIO_CS5535)       += gpio-cs5535.o
 obj-$(CONFIG_GPIO_DA9052)       += gpio-da9052.o
@@ -61,6 +63,7 @@ obj-$(CONFIG_GPIO_TC3589X)	+= gpio-tc3589x.o
 obj-$(CONFIG_ARCH_TEGRA)        += gpio-tegra.o
 obj-$(CONFIG_GPIO_TIMBERDALE)   += gpio-timberdale.o
 obj-$(CONFIG_ARCH_DAVINCI_TNETV107X) += gpio-tnetv107x.o
+obj-$(CONFIG_GPIO_TPS6586X)     += gpio-tps6586x.o
 obj-$(CONFIG_GPIO_TPS65910)     += gpio-tps65910.o
 obj-$(CONFIG_GPIO_TPS65912)     += gpio-tps65912.o
 obj-$(CONFIG_GPIO_TWL4030)      += gpio-twl4030.o
diff --git a/drivers/gpio/devres.c b/drivers/gpio/devres.c
index 9e9947cb86a3..1077754f8289 100644
--- a/drivers/gpio/devres.c
+++ b/drivers/gpio/devres.c
@@ -98,6 +98,7 @@ int devm_gpio_request_one(struct device *dev, unsigned gpio,
        return 0;
 }
+EXPORT_SYMBOL(devm_gpio_request_one);
 /**
 *      devm_gpio_free - free an interrupt
diff --git a/drivers/gpio/gpio-amd8111.c b/drivers/gpio/gpio-amd8111.c
new file mode 100644
index 000000000000..710fafcdd1b1
--- /dev/null
+++ b/drivers/gpio/gpio-amd8111.c
@@ -0,0 +1,246 @@
+/*
+ * GPIO driver for AMD 8111 south bridges
+ *
+ * Copyright (c) 2012 Dmitry Eremin-Solenikov
+ *
+ * Based on the AMD RNG driver:
+ * Copyright 2005 (c) MontaVista Software, Inc.
+ * with the majority of the code coming from:
+ *
+ * Hardware driver for the Intel/AMD/VIA Random Number Generators (RNG)
+ * (c) Copyright 2003 Red Hat Inc <jgarzik@redhat.com>
+ *
+ * derived from
+ *
+ * Hardware driver for the AMD 768 Random Number Generator (RNG)
+ * (c) Copyright 2001 Red Hat Inc
+ *
+ * derived from
+ *
+ * Hardware driver for Intel i810 Random Number Generator (RNG)
+ * Copyright 2000,2001 Jeff Garzik <jgarzik@pobox.com>
+ * Copyright 2000,2001 Philipp Rumpf <prumpf@mandrakesoft.com>
+ *
+ * This file is licensed under  the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/gpio.h>
+#include <linux/pci.h>
+#include <linux/spinlock.h>
+#define PMBASE_OFFSET 0xb0
+#define PMBASE_SIZE   0x30
+#define AMD_REG_GPIO(i) (0x10 + (i))
+#define AMD_GPIO_LTCH_STS       0x40 /* Latch status, w1 */
+#define AMD_GPIO_RTIN           0x20 /* Real Time in, ro */
+#define AMD_GPIO_DEBOUNCE       0x10 /* Debounce, rw */
+#define AMD_GPIO_MODE_MASK      0x0c /* Pin Mode Select, rw */
+#define AMD_GPIO_MODE_IN        0x00
+#define AMD_GPIO_MODE_OUT       0x04
+/* Enable alternative (e.g. clkout, IRQ, etc) function of the pin */
+#define AMD_GPIO_MODE_ALTFN     0x08 /* Or 0x09 */
+#define AMD_GPIO_X_MASK         0x03 /* In/Out specific, rw */
+#define AMD_GPIO_X_IN_ACTIVEHI  0x01 /* Active High */
+#define AMD_GPIO_X_IN_LATCH     0x02 /* Latched version is selected */
+#define AMD_GPIO_X_OUT_LOW      0x00
+#define AMD_GPIO_X_OUT_HI       0x01
+#define AMD_GPIO_X_OUT_CLK0     0x02
+#define AMD_GPIO_X_OUT_CLK1     0x03
+/*
+ * Data for PCI driver interface
+ *
+ * This data only exists for exporting the supported
+ * PCI ids via MODULE_DEVICE_TABLE.  We do not actually
+ * register a pci_driver, because someone else might one day
+ * want to register another driver on the same PCI id.
+ */
+static DEFINE_PCI_DEVICE_TABLE(pci_tbl) = {
+        { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8111_SMBUS), 0 },
+        { 0, }, /* terminate list */
+};
+MODULE_DEVICE_TABLE(pci, pci_tbl);
+struct amd_gpio {
+        struct gpio_chip        chip;
+        u32                     pmbase;
+        void __iomem            *pm;
+        struct pci_dev          *pdev;
+        spinlock_t              lock; /* guards hw registers and orig table */
+        u8                      orig[32];
+};
+#define to_agp(chip)    container_of(chip, struct amd_gpio, chip)
+static int amd_gpio_request(struct gpio_chip *chip, unsigned offset)
+{
+        struct amd_gpio *agp = to_agp(chip);
+        agp->orig[offset] = ioread8(agp->pm + AMD_REG_GPIO(offset)) &
+                (AMD_GPIO_DEBOUNCE | AMD_GPIO_MODE_MASK | AMD_GPIO_X_MASK);
+        dev_dbg(&agp->pdev->dev, "Requested gpio %d, data %x\n", offset, agp->orig[offset]);
+        return 0;
+}
+static void amd_gpio_free(struct gpio_chip *chip, unsigned offset)
+{
+        struct amd_gpio *agp = to_agp(chip);
+        dev_dbg(&agp->pdev->dev, "Freed gpio %d, data %x\n", offset, agp->orig[offset]);
+        iowrite8(agp->orig[offset], agp->pm + AMD_REG_GPIO(offset));
+}
+static void amd_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
+{
+        struct amd_gpio *agp = to_agp(chip);
+        u8 temp;
+        unsigned long flags;
+        spin_lock_irqsave(&agp->lock, flags);
+        temp = ioread8(agp->pm + AMD_REG_GPIO(offset));
+        temp = (temp & AMD_GPIO_DEBOUNCE) | AMD_GPIO_MODE_OUT | (value ? AMD_GPIO_X_OUT_HI : AMD_GPIO_X_OUT_LOW);
+        iowrite8(temp, agp->pm + AMD_REG_GPIO(offset));
+        spin_unlock_irqrestore(&agp->lock, flags);
+        dev_dbg(&agp->pdev->dev, "Setting gpio %d, value %d, reg=%02x\n", offset, !!value, temp);
+}
+static int amd_gpio_get(struct gpio_chip *chip, unsigned offset)
+{
+        struct amd_gpio *agp = to_agp(chip);
+        u8 temp;
+        temp = ioread8(agp->pm + AMD_REG_GPIO(offset));
+        dev_dbg(&agp->pdev->dev, "Getting gpio %d, reg=%02x\n", offset, temp);
+        return (temp & AMD_GPIO_RTIN) ? 1 : 0;
+}
+static int amd_gpio_dirout(struct gpio_chip *chip, unsigned offset, int value)
+{
+        struct amd_gpio *agp = to_agp(chip);
+        u8 temp;
+        unsigned long flags;
+        spin_lock_irqsave(&agp->lock, flags);
+        temp = ioread8(agp->pm + AMD_REG_GPIO(offset));
+        temp = (temp & AMD_GPIO_DEBOUNCE) | AMD_GPIO_MODE_OUT | (value ? AMD_GPIO_X_OUT_HI : AMD_GPIO_X_OUT_LOW);
+        iowrite8(temp, agp->pm + AMD_REG_GPIO(offset));
+        spin_unlock_irqrestore(&agp->lock, flags);
+        dev_dbg(&agp->pdev->dev, "Dirout gpio %d, value %d, reg=%02x\n", offset, !!value, temp);
+        return 0;
+}
+static int amd_gpio_dirin(struct gpio_chip *chip, unsigned offset)
+{
+        struct amd_gpio *agp = to_agp(chip);
+        u8 temp;
+        unsigned long flags;
+        spin_lock_irqsave(&agp->lock, flags);
+        temp = ioread8(agp->pm + AMD_REG_GPIO(offset));
+        temp = (temp & AMD_GPIO_DEBOUNCE) | AMD_GPIO_MODE_IN;
+        iowrite8(temp, agp->pm + AMD_REG_GPIO(offset));
+        spin_unlock_irqrestore(&agp->lock, flags);
+        dev_dbg(&agp->pdev->dev, "Dirin gpio %d, reg=%02x\n", offset, temp);
+        return 0;
+}
+static struct amd_gpio gp = {
+        .chip = {
+                .label          = "AMD GPIO",
+                .owner          = THIS_MODULE,
+                .base           = -1,
+                .ngpio          = 32,
+                .request        = amd_gpio_request,
+                .free           = amd_gpio_free,
+                .set            = amd_gpio_set,
+                .get            = amd_gpio_get,
+                .direction_output = amd_gpio_dirout,
+                .direction_input = amd_gpio_dirin,
+        },
+};
+static int __init amd_gpio_init(void)
+{
+        int err = -ENODEV;
+        struct pci_dev *pdev = NULL;
+        const struct pci_device_id *ent;
+        /* We look for our device - AMD South Bridge
+         * I don't know about a system with two such bridges,
+         * so we can assume that there is max. one device.
+         *
+         * We can't use plain pci_driver mechanism,
+         * as the device is really a multiple function device,
+         * main driver that binds to the pci_device is an smbus
+         * driver and have to find & bind to the device this way.
+         */
+        for_each_pci_dev(pdev) {
+                ent = pci_match_id(pci_tbl, pdev);
+                if (ent)
+                        goto found;
+        }
+        /* Device not found. */
+        goto out;
+found:
+        err = pci_read_config_dword(pdev, 0x58, &gp.pmbase);
+        if (err)
+                goto out;
+        err = -EIO;
+        gp.pmbase &= 0x0000FF00;
+        if (gp.pmbase == 0)
+                goto out;
+        if (!request_region(gp.pmbase + PMBASE_OFFSET, PMBASE_SIZE, "AMD GPIO")) {
+                dev_err(&pdev->dev, "AMD GPIO region 0x%x already in use!\n",
+                        gp.pmbase + PMBASE_OFFSET);
+                err = -EBUSY;
+                goto out;
+        }
+        gp.pm = ioport_map(gp.pmbase + PMBASE_OFFSET, PMBASE_SIZE);
+        gp.pdev = pdev;
+        gp.chip.dev = &pdev->dev;
+        spin_lock_init(&gp.lock);
+        printk(KERN_INFO "AMD-8111 GPIO detected\n");
+        err = gpiochip_add(&gp.chip);
+        if (err) {
+                printk(KERN_ERR "GPIO registering failed (%d)\n",
+                       err);
+                release_region(gp.pmbase + PMBASE_OFFSET, PMBASE_SIZE);
+                goto out;
+        }
+out:
+        return err;
+}
+static void __exit amd_gpio_exit(void)
+{
+        int err = gpiochip_remove(&gp.chip);
+        WARN_ON(err);
+        ioport_unmap(gp.pm);
+        release_region(gp.pmbase + PMBASE_OFFSET, PMBASE_SIZE);
+}
+module_init(amd_gpio_init);
+module_exit(amd_gpio_exit);
+MODULE_AUTHOR("The Linux Kernel team");
+MODULE_DESCRIPTION("GPIO driver for AMD chipsets");
+MODULE_LICENSE("GPL");
diff --git a/drivers/gpio/gpio-arizona.c b/drivers/gpio/gpio-arizona.c
new file mode 100644
index 000000000000..8740d2eb06f8
--- /dev/null
+++ b/drivers/gpio/gpio-arizona.c
@@ -0,0 +1,163 @@
+/*
+ * gpiolib support for Wolfson Arizona class devices
+ *
+ * Copyright 2012 Wolfson Microelectronics PLC.
+ *
+ * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ *
+ */
+#include <linux/kernel.h>
+#include <linux/slab.h>
+#include <linux/module.h>
+#include <linux/gpio.h>
+#include <linux/platform_device.h>
+#include <linux/seq_file.h>
+#include <linux/mfd/arizona/core.h>
+#include <linux/mfd/arizona/pdata.h>
+#include <linux/mfd/arizona/registers.h>
+struct arizona_gpio {
+        struct arizona *arizona;
+        struct gpio_chip gpio_chip;
+};
+static inline struct arizona_gpio *to_arizona_gpio(struct gpio_chip *chip)
+{
+        return container_of(chip, struct arizona_gpio, gpio_chip);
+}
+static int arizona_gpio_direction_in(struct gpio_chip *chip, unsigned offset)
+{
+        struct arizona_gpio *arizona_gpio = to_arizona_gpio(chip);
+        struct arizona *arizona = arizona_gpio->arizona;
+        return regmap_update_bits(arizona->regmap, ARIZONA_GPIO1_CTRL + offset,
+                                  ARIZONA_GPN_DIR, ARIZONA_GPN_DIR);
+}
+static int arizona_gpio_get(struct gpio_chip *chip, unsigned offset)
+{
+        struct arizona_gpio *arizona_gpio = to_arizona_gpio(chip);
+        struct arizona *arizona = arizona_gpio->arizona;
+        unsigned int val;
+        int ret;
+        ret = regmap_read(arizona->regmap, ARIZONA_GPIO1_CTRL + offset, &val);
+        if (ret < 0)
+                return ret;
+        if (val & ARIZONA_GPN_LVL)
+                return 1;
+        else
+                return 0;
+}
+static int arizona_gpio_direction_out(struct gpio_chip *chip,
+                                     unsigned offset, int value)
+{
+        struct arizona_gpio *arizona_gpio = to_arizona_gpio(chip);
+        struct arizona *arizona = arizona_gpio->arizona;
+        if (value)
+                value = ARIZONA_GPN_LVL;
+        return regmap_update_bits(arizona->regmap, ARIZONA_GPIO1_CTRL + offset,
+                                  ARIZONA_GPN_DIR | ARIZONA_GPN_LVL, value);
+}
+static void arizona_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
+{
+        struct arizona_gpio *arizona_gpio = to_arizona_gpio(chip);
+        struct arizona *arizona = arizona_gpio->arizona;
+        if (value)
+                value = ARIZONA_GPN_LVL;
+        regmap_update_bits(arizona->regmap, ARIZONA_GPIO1_CTRL + offset,
+                           ARIZONA_GPN_LVL, value);
+}
+static struct gpio_chip template_chip = {
+        .label                  = "arizona",
+        .owner                  = THIS_MODULE,
+        .direction_input        = arizona_gpio_direction_in,
+        .get                    = arizona_gpio_get,
+        .direction_output       = arizona_gpio_direction_out,
+        .set                    = arizona_gpio_set,
+        .can_sleep              = 1,
+};
+static int __devinit arizona_gpio_probe(struct platform_device *pdev)
+{
+        struct arizona *arizona = dev_get_drvdata(pdev->dev.parent);
+        struct arizona_pdata *pdata = arizona->dev->platform_data;
+        struct arizona_gpio *arizona_gpio;
+        int ret;
+        arizona_gpio = devm_kzalloc(&pdev->dev, sizeof(*arizona_gpio),
+                                    GFP_KERNEL);
+        if (arizona_gpio == NULL)
+                return -ENOMEM;
+        arizona_gpio->arizona = arizona;
+        arizona_gpio->gpio_chip = template_chip;
+        arizona_gpio->gpio_chip.dev = &pdev->dev;
+        switch (arizona->type) {
+        case WM5102:
+        case WM5110:
+                arizona_gpio->gpio_chip.ngpio = 5;
+                break;
+        default:
+                dev_err(&pdev->dev, "Unknown chip variant %d\n",
+                        arizona->type);
+                return -EINVAL;
+        }
+        if (pdata && pdata->gpio_base)
+                arizona_gpio->gpio_chip.base = pdata->gpio_base;
+        else
+                arizona_gpio->gpio_chip.base = -1;
+        ret = gpiochip_add(&arizona_gpio->gpio_chip);
+        if (ret < 0) {
+                dev_err(&pdev->dev, "Could not register gpiochip, %d\n",
+                        ret);
+                goto err;
+        }
+        platform_set_drvdata(pdev, arizona_gpio);
+        return ret;
+err:
+        return ret;
+}
+static int __devexit arizona_gpio_remove(struct platform_device *pdev)
+{
+        struct arizona_gpio *arizona_gpio = platform_get_drvdata(pdev);
+        return gpiochip_remove(&arizona_gpio->gpio_chip);
+}
+static struct platform_driver arizona_gpio_driver = {
+        .driver.name    = "arizona-gpio",
+        .driver.owner   = THIS_MODULE,
+        .probe          = arizona_gpio_probe,
+        .remove         = __devexit_p(arizona_gpio_remove),
+};
+module_platform_driver(arizona_gpio_driver);
+MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
+MODULE_DESCRIPTION("GPIO interface for Arizona devices");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:arizona-gpio");
diff --git a/drivers/gpio/gpio-em.c b/drivers/gpio/gpio-em.c
index 150d9768811d..ae37181798b3 100644
--- a/drivers/gpio/gpio-em.c
+++ b/drivers/gpio/gpio-em.c
@@ -266,7 +266,7 @@ static int __devinit em_gio_irq_domain_init(struct em_gio_priv *p)
        return 0;
 }
-static void __devexit em_gio_irq_domain_cleanup(struct em_gio_priv *p)
+static void em_gio_irq_domain_cleanup(struct em_gio_priv *p)
 {
        struct gpio_em_config *pdata = p->pdev->dev.platform_data;
diff --git a/drivers/gpio/gpio-langwell.c b/drivers/gpio/gpio-langwell.c
index a1c8754f52cf..202a99207b7d 100644
--- a/drivers/gpio/gpio-langwell.c
+++ b/drivers/gpio/gpio-langwell.c
@@ -339,7 +339,7 @@ static int __devinit lnw_gpio_probe(struct pci_dev *pdev,
        resource_size_t start, len;
        struct lnw_gpio *lnw;
        u32 gpio_base;
-        int retval = 0;
+        int retval;
        int ngpio = id->driver_data;
        retval = pci_enable_device(pdev);
@@ -357,6 +357,7 @@ static int __devinit lnw_gpio_probe(struct pci_dev *pdev,
        base = ioremap_nocache(start, len);
        if (!base) {
                dev_err(&pdev->dev, "error mapping bar1\n");
+                retval = -EFAULT;
                goto err3;
        }
        gpio_base = *((u32 *)base + 1);
@@ -381,8 +382,10 @@ static int __devinit lnw_gpio_probe(struct pci_dev *pdev,
        lnw->domain = irq_domain_add_linear(pdev->dev.of_node, ngpio,
                                            &lnw_gpio_irq_ops, lnw);
-        if (!lnw->domain)
+        if (!lnw->domain) {
+                retval = -ENOMEM;
                goto err3;
+        }
        lnw->reg_base = base;
        lnw->chip.label = dev_name(&pdev->dev);
diff --git a/drivers/gpio/gpio-lpc32xx.c b/drivers/gpio/gpio-lpc32xx.c
index c2199beca98a..8a420f13905e 100644
--- a/drivers/gpio/gpio-lpc32xx.c
+++ b/drivers/gpio/gpio-lpc32xx.c
@@ -1,5 +1,5 @@
 /*
- * arch/arm/mach-lpc32xx/gpiolib.c
+ * GPIO driver for LPC32xx SoC
 *
 * Author: Kevin Wells <kevin.wells@nxp.com>
 *
@@ -28,6 +28,7 @@
 #include <mach/hardware.h>
 #include <mach/platform.h>
 #include <mach/gpio-lpc32xx.h>
+#include <mach/irqs.h>
 #define LPC32XX_GPIO_P3_INP_STATE               _GPREG(0x000)
 #define LPC32XX_GPIO_P3_OUTP_SET                _GPREG(0x004)
@@ -367,6 +368,66 @@ static int lpc32xx_gpio_request(struct gpio_chip *chip, unsigned pin)
        return -EINVAL;
 }
+static int lpc32xx_gpio_to_irq_p01(struct gpio_chip *chip, unsigned offset)
+{
+        return IRQ_LPC32XX_P0_P1_IRQ;
+}
+static const char lpc32xx_gpio_to_irq_gpio_p3_table[] = {
+        IRQ_LPC32XX_GPIO_00,
+        IRQ_LPC32XX_GPIO_01,
+        IRQ_LPC32XX_GPIO_02,
+        IRQ_LPC32XX_GPIO_03,
+        IRQ_LPC32XX_GPIO_04,
+        IRQ_LPC32XX_GPIO_05,
+};
+static int lpc32xx_gpio_to_irq_gpio_p3(struct gpio_chip *chip, unsigned offset)
+{
+        if (offset < ARRAY_SIZE(lpc32xx_gpio_to_irq_gpio_p3_table))
+                return lpc32xx_gpio_to_irq_gpio_p3_table[offset];
+        return -ENXIO;
+}
+static const char lpc32xx_gpio_to_irq_gpi_p3_table[] = {
+        IRQ_LPC32XX_GPI_00,
+        IRQ_LPC32XX_GPI_01,
+        IRQ_LPC32XX_GPI_02,
+        IRQ_LPC32XX_GPI_03,
+        IRQ_LPC32XX_GPI_04,
+        IRQ_LPC32XX_GPI_05,
+        IRQ_LPC32XX_GPI_06,
+        IRQ_LPC32XX_GPI_07,
+        IRQ_LPC32XX_GPI_08,
+        IRQ_LPC32XX_GPI_09,
+        -ENXIO, /* 10 */
+        -ENXIO, /* 11 */
+        -ENXIO, /* 12 */
+        -ENXIO, /* 13 */
+        -ENXIO, /* 14 */
+        -ENXIO, /* 15 */
+        -ENXIO, /* 16 */
+        -ENXIO, /* 17 */
+        -ENXIO, /* 18 */
+        IRQ_LPC32XX_GPI_19,
+        -ENXIO, /* 20 */
+        -ENXIO, /* 21 */
+        -ENXIO, /* 22 */
+        -ENXIO, /* 23 */
+        -ENXIO, /* 24 */
+        -ENXIO, /* 25 */
+        -ENXIO, /* 26 */
+        -ENXIO, /* 27 */
+        IRQ_LPC32XX_GPI_28,
+};
+static int lpc32xx_gpio_to_irq_gpi_p3(struct gpio_chip *chip, unsigned offset)
+{
+        if (offset < ARRAY_SIZE(lpc32xx_gpio_to_irq_gpi_p3_table))
+                return lpc32xx_gpio_to_irq_gpi_p3_table[offset];
+        return -ENXIO;
+}
 static struct lpc32xx_gpio_chip lpc32xx_gpiochip[] = {
        {
                .chip = {
@@ -376,6 +437,7 @@ static struct lpc32xx_gpio_chip lpc32xx_gpiochip[] = {
                        .direction_output       = lpc32xx_gpio_dir_output_p012,
                        .set                    = lpc32xx_gpio_set_value_p012,
                        .request                = lpc32xx_gpio_request,
+                        .to_irq                 = lpc32xx_gpio_to_irq_p01,
                        .base                   = LPC32XX_GPIO_P0_GRP,
                        .ngpio                  = LPC32XX_GPIO_P0_MAX,
                        .names                  = gpio_p0_names,
@@ -391,6 +453,7 @@ static struct lpc32xx_gpio_chip lpc32xx_gpiochip[] = {
                        .direction_output       = lpc32xx_gpio_dir_output_p012,
                        .set                    = lpc32xx_gpio_set_value_p012,
                        .request                = lpc32xx_gpio_request,
+                        .to_irq                 = lpc32xx_gpio_to_irq_p01,
                        .base                   = LPC32XX_GPIO_P1_GRP,
                        .ngpio                  = LPC32XX_GPIO_P1_MAX,
                        .names                  = gpio_p1_names,
@@ -421,6 +484,7 @@ static struct lpc32xx_gpio_chip lpc32xx_gpiochip[] = {
                        .direction_output       = lpc32xx_gpio_dir_output_p3,
                        .set                    = lpc32xx_gpio_set_value_p3,
                        .request                = lpc32xx_gpio_request,
+                        .to_irq                 = lpc32xx_gpio_to_irq_gpio_p3,
                        .base                   = LPC32XX_GPIO_P3_GRP,
                        .ngpio                  = LPC32XX_GPIO_P3_MAX,
                        .names                  = gpio_p3_names,
@@ -434,6 +498,7 @@ static struct lpc32xx_gpio_chip lpc32xx_gpiochip[] = {
                        .direction_input        = lpc32xx_gpio_dir_in_always,
                        .get                    = lpc32xx_gpi_get_value,
                        .request                = lpc32xx_gpio_request,
+                        .to_irq                 = lpc32xx_gpio_to_irq_gpi_p3,
                        .base                   = LPC32XX_GPI_P3_GRP,
                        .ngpio                  = LPC32XX_GPI_P3_MAX,
                        .names                  = gpi_p3_names,
@@ -457,13 +522,6 @@ static struct lpc32xx_gpio_chip lpc32xx_gpiochip[] = {
        },
 };
-/* Empty now, can be removed later when mach-lpc32xx is finally switched over
- * to DT support
- */
-void __init lpc32xx_gpio_init(void)
-{
-}
 static int lpc32xx_of_xlate(struct gpio_chip *gc,
                            const struct of_phandle_args *gpiospec, u32 *flags)
 {
diff --git a/drivers/gpio/gpio-msic.c b/drivers/gpio/gpio-msic.c
index 71a838f44501..b38986285868 100644
--- a/drivers/gpio/gpio-msic.c
+++ b/drivers/gpio/gpio-msic.c
@@ -99,7 +99,7 @@ static int msic_gpio_to_oreg(unsigned offset)
        if (offset < 20)
                return INTEL_MSIC_GPIO0HV0CTLO - offset + 16;
-        return INTEL_MSIC_GPIO1HV0CTLO + offset + 20;
+        return INTEL_MSIC_GPIO1HV0CTLO - offset + 20;
 }
 static int msic_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
diff --git a/drivers/gpio/gpio-mxc.c b/drivers/gpio/gpio-mxc.c
index c337143b18f8..80f44bb64a87 100644
--- a/drivers/gpio/gpio-mxc.c
+++ b/drivers/gpio/gpio-mxc.c
@@ -23,6 +23,7 @@
 #include <linux/interrupt.h>
 #include <linux/io.h>
 #include <linux/irq.h>
+#include <linux/irqdomain.h>
 #include <linux/gpio.h>
 #include <linux/platform_device.h>
 #include <linux/slab.h>
@@ -33,12 +34,11 @@
 #include <asm-generic/bug.h>
 #include <asm/mach/irq.h>
-#define irq_to_gpio(irq)        ((irq) - MXC_GPIO_IRQ_START)
 enum mxc_gpio_hwtype {
        IMX1_GPIO,      /* runs on i.mx1 */
        IMX21_GPIO,     /* runs on i.mx21 and i.mx27 */
-        IMX31_GPIO,     /* runs on all other i.mx */
+        IMX31_GPIO,     /* runs on i.mx31 */
+        IMX35_GPIO,     /* runs on all other i.mx */
 };
 /* device type dependent stuff */
@@ -50,6 +50,7 @@ struct mxc_gpio_hwdata {
        unsigned icr2_reg;
        unsigned imr_reg;
        unsigned isr_reg;
+        int edge_sel_reg;
        unsigned low_level;
        unsigned high_level;
        unsigned rise_edge;
@@ -61,7 +62,7 @@ struct mxc_gpio_port {
        void __iomem *base;
        int irq;
        int irq_high;
-        int virtual_irq_start;
+        struct irq_domain *domain;
        struct bgpio_chip bgc;
        u32 both_edges;
 };
@@ -74,6 +75,7 @@ static struct mxc_gpio_hwdata imx1_imx21_gpio_hwdata = {
        .icr2_reg       = 0x2c,
        .imr_reg        = 0x30,
        .isr_reg        = 0x34,
+        .edge_sel_reg   = -EINVAL,
        .low_level      = 0x03,
        .high_level     = 0x02,
        .rise_edge      = 0x00,
@@ -88,6 +90,22 @@ static struct mxc_gpio_hwdata imx31_gpio_hwdata = {
        .icr2_reg       = 0x10,
        .imr_reg        = 0x14,
        .isr_reg        = 0x18,
+        .edge_sel_reg   = -EINVAL,
+        .low_level      = 0x00,
+        .high_level     = 0x01,
+        .rise_edge      = 0x02,
+        .fall_edge      = 0x03,
+};
+static struct mxc_gpio_hwdata imx35_gpio_hwdata = {
+        .dr_reg         = 0x00,
+        .gdir_reg       = 0x04,
+        .psr_reg        = 0x08,
+        .icr1_reg       = 0x0c,
+        .icr2_reg       = 0x10,
+        .imr_reg        = 0x14,
+        .isr_reg        = 0x18,
+        .edge_sel_reg   = 0x1c,
        .low_level      = 0x00,
        .high_level     = 0x01,
        .rise_edge      = 0x02,
@@ -104,12 +122,13 @@ static struct mxc_gpio_hwdata *mxc_gpio_hwdata;
 #define GPIO_ICR2               (mxc_gpio_hwdata->icr2_reg)
 #define GPIO_IMR                (mxc_gpio_hwdata->imr_reg)
 #define GPIO_ISR                (mxc_gpio_hwdata->isr_reg)
+#define GPIO_EDGE_SEL           (mxc_gpio_hwdata->edge_sel_reg)
 #define GPIO_INT_LOW_LEV        (mxc_gpio_hwdata->low_level)
 #define GPIO_INT_HIGH_LEV       (mxc_gpio_hwdata->high_level)
 #define GPIO_INT_RISE_EDGE      (mxc_gpio_hwdata->rise_edge)
 #define GPIO_INT_FALL_EDGE      (mxc_gpio_hwdata->fall_edge)
-#define GPIO_INT_NONE           0x4
+#define GPIO_INT_BOTH_EDGES     0x4
 static struct platform_device_id mxc_gpio_devtype[] = {
        {
@@ -122,6 +141,9 @@ static struct platform_device_id mxc_gpio_devtype[] = {
                .name = "imx31-gpio",
                .driver_data = IMX31_GPIO,
        }, {
+                .name = "imx35-gpio",
+                .driver_data = IMX35_GPIO,
+        }, {
                /* sentinel */
        }
 };
@@ -130,6 +152,7 @@ static const struct of_device_id mxc_gpio_dt_ids[] = {
        { .compatible = "fsl,imx1-gpio", .data = &mxc_gpio_devtype[IMX1_GPIO], },
        { .compatible = "fsl,imx21-gpio", .data = &mxc_gpio_devtype[IMX21_GPIO], },
        { .compatible = "fsl,imx31-gpio", .data = &mxc_gpio_devtype[IMX31_GPIO], },
+        { .compatible = "fsl,imx35-gpio", .data = &mxc_gpio_devtype[IMX35_GPIO], },
        { /* sentinel */ }
 };
@@ -144,14 +167,15 @@ static LIST_HEAD(mxc_gpio_ports);
 static int gpio_set_irq_type(struct irq_data *d, u32 type)
 {
-        u32 gpio = irq_to_gpio(d->irq);
        struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
        struct mxc_gpio_port *port = gc->private;
        u32 bit, val;
+        u32 gpio_idx = d->hwirq;
+        u32 gpio = port->bgc.gc.base + gpio_idx;
        int edge;
        void __iomem *reg = port->base;
-        port->both_edges &= ~(1 << (gpio & 31));
+        port->both_edges &= ~(1 << gpio_idx);
        switch (type) {
        case IRQ_TYPE_EDGE_RISING:
                edge = GPIO_INT_RISE_EDGE;
@@ -160,15 +184,19 @@ static int gpio_set_irq_type(struct irq_data *d, u32 type)
                edge = GPIO_INT_FALL_EDGE;
                break;
        case IRQ_TYPE_EDGE_BOTH:
-                val = gpio_get_value(gpio);
+                if (GPIO_EDGE_SEL >= 0) {
-                if (val) {
+                        edge = GPIO_INT_BOTH_EDGES;
-                        edge = GPIO_INT_LOW_LEV;
-                        pr_debug("mxc: set GPIO %d to low trigger\n", gpio);
                } else {
-                        edge = GPIO_INT_HIGH_LEV;
+                        val = gpio_get_value(gpio);
-                        pr_debug("mxc: set GPIO %d to high trigger\n", gpio);
+                        if (val) {
+                                edge = GPIO_INT_LOW_LEV;
+                                pr_debug("mxc: set GPIO %d to low trigger\n", gpio);
+                        } else {
+                                edge = GPIO_INT_HIGH_LEV;
+                                pr_debug("mxc: set GPIO %d to high trigger\n", gpio);
+                        }
+                        port->both_edges |= 1 << gpio_idx;
                }
-                port->both_edges |= 1 << (gpio & 31);
                break;
        case IRQ_TYPE_LEVEL_LOW:
                edge = GPIO_INT_LOW_LEV;
@@ -180,11 +208,24 @@ static int gpio_set_irq_type(struct irq_data *d, u32 type)
                return -EINVAL;
        }
-        reg += GPIO_ICR1 + ((gpio & 0x10) >> 2); /* lower or upper register */
+        if (GPIO_EDGE_SEL >= 0) {
-        bit = gpio & 0xf;
+                val = readl(port->base + GPIO_EDGE_SEL);
-        val = readl(reg) & ~(0x3 << (bit << 1));
+                if (edge == GPIO_INT_BOTH_EDGES)
-        writel(val | (edge << (bit << 1)), reg);
+                        writel(val | (1 << gpio_idx),
-        writel(1 << (gpio & 0x1f), port->base + GPIO_ISR);
+                                port->base + GPIO_EDGE_SEL);
+                else
+                        writel(val & ~(1 << gpio_idx),
+                                port->base + GPIO_EDGE_SEL);
+        }
+        if (edge != GPIO_INT_BOTH_EDGES) {
+                reg += GPIO_ICR1 + ((gpio_idx & 0x10) >> 2); /* lower or upper register */
+                bit = gpio_idx & 0xf;
+                val = readl(reg) & ~(0x3 << (bit << 1));
+                writel(val | (edge << (bit << 1)), reg);
+        }
+        writel(1 << gpio_idx, port->base + GPIO_ISR);
        return 0;
 }
@@ -217,15 +258,13 @@ static void mxc_flip_edge(struct mxc_gpio_port *port, u32 gpio)
 /* handle 32 interrupts in one status register */
 static void mxc_gpio_irq_handler(struct mxc_gpio_port *port, u32 irq_stat)
 {
-        u32 gpio_irq_no_base = port->virtual_irq_start;
        while (irq_stat != 0) {
                int irqoffset = fls(irq_stat) - 1;
                if (port->both_edges & (1 << irqoffset))
                        mxc_flip_edge(port, irqoffset);
-                generic_handle_irq(gpio_irq_no_base + irqoffset);
+                generic_handle_irq(irq_find_mapping(port->domain, irqoffset));
                irq_stat &= ~(1 << irqoffset);
        }
@@ -276,10 +315,9 @@ static void mx2_gpio_irq_handler(u32 irq, struct irq_desc *desc)
 */
 static int gpio_set_wake_irq(struct irq_data *d, u32 enable)
 {
-        u32 gpio = irq_to_gpio(d->irq);
-        u32 gpio_idx = gpio & 0x1F;
        struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
        struct mxc_gpio_port *port = gc->private;
+        u32 gpio_idx = d->hwirq;
        if (enable) {
                if (port->irq_high && (gpio_idx >= 16))
@@ -296,12 +334,12 @@ static int gpio_set_wake_irq(struct irq_data *d, u32 enable)
        return 0;
 }
-static void __init mxc_gpio_init_gc(struct mxc_gpio_port *port)
+static void __init mxc_gpio_init_gc(struct mxc_gpio_port *port, int irq_base)
 {
        struct irq_chip_generic *gc;
        struct irq_chip_type *ct;
-        gc = irq_alloc_generic_chip("gpio-mxc", 1, port->virtual_irq_start,
+        gc = irq_alloc_generic_chip("gpio-mxc", 1, irq_base,
                                    port->base, handle_level_irq);
        gc->private = port;
@@ -338,7 +376,9 @@ static void __devinit mxc_gpio_get_hw(struct platform_device *pdev)
                return;
        }
-        if (hwtype == IMX31_GPIO)
+        if (hwtype == IMX35_GPIO)
+                mxc_gpio_hwdata = &imx35_gpio_hwdata;
+        else if (hwtype == IMX31_GPIO)
                mxc_gpio_hwdata = &imx31_gpio_hwdata;
        else
                mxc_gpio_hwdata = &imx1_imx21_gpio_hwdata;
@@ -352,7 +392,7 @@ static int mxc_gpio_to_irq(struct gpio_chip *gc, unsigned offset)
        struct mxc_gpio_port *port =
                container_of(bgc, struct mxc_gpio_port, bgc);
-        return port->virtual_irq_start + offset;
+        return irq_find_mapping(port->domain, offset);
 }
 static int __devinit mxc_gpio_probe(struct platform_device *pdev)
@@ -360,6 +400,7 @@ static int __devinit mxc_gpio_probe(struct platform_device *pdev)
        struct device_node *np = pdev->dev.of_node;
        struct mxc_gpio_port *port;
        struct resource *iores;
+        int irq_base;
        int err;
        mxc_gpio_get_hw(pdev);
@@ -398,10 +439,12 @@ static int __devinit mxc_gpio_probe(struct platform_device *pdev)
        writel(~0, port->base + GPIO_ISR);
        if (mxc_gpio_hwtype == IMX21_GPIO) {
-                /* setup one handler for all GPIO interrupts */
+                /*
-                if (pdev->id == 0)
+                 * Setup one handler for all GPIO interrupts. Actually setting
-                        irq_set_chained_handler(port->irq,
+                 * the handler is needed only once, but doing it for every port
-                                                mx2_gpio_irq_handler);
+                 * is more robust and easier.
+                 */
+                irq_set_chained_handler(port->irq, mx2_gpio_irq_handler);
        } else {
                /* setup one handler for each entry */
                irq_set_chained_handler(port->irq, mx3_gpio_irq_handler);
@@ -422,28 +465,37 @@ static int __devinit mxc_gpio_probe(struct platform_device *pdev)
                goto out_iounmap;
        port->bgc.gc.to_irq = mxc_gpio_to_irq;
-        port->bgc.gc.base = pdev->id * 32;
+        port->bgc.gc.base = (pdev->id < 0) ? of_alias_get_id(np, "gpio") * 32 :
-        port->bgc.dir = port->bgc.read_reg(port->bgc.reg_dir);
+                                             pdev->id * 32;
-        port->bgc.data = port->bgc.read_reg(port->bgc.reg_set);
        err = gpiochip_add(&port->bgc.gc);
        if (err)
                goto out_bgpio_remove;
-        /*
+        irq_base = irq_alloc_descs(-1, 0, 32, numa_node_id());
-         * In dt case, we use gpio number range dynamically
+        if (irq_base < 0) {
-         * allocated by gpio core.
+                err = irq_base;
-         */
+                goto out_gpiochip_remove;
-        port->virtual_irq_start = MXC_GPIO_IRQ_START + (np ? port->bgc.gc.base :
+        }
-                                                             pdev->id * 32);
+        port->domain = irq_domain_add_legacy(np, 32, irq_base, 0,
+                                             &irq_domain_simple_ops, NULL);
+        if (!port->domain) {
+                err = -ENODEV;
+                goto out_irqdesc_free;
+        }
        /* gpio-mxc can be a generic irq chip */
-        mxc_gpio_init_gc(port);
+        mxc_gpio_init_gc(port, irq_base);
        list_add_tail(&port->node, &mxc_gpio_ports);
        return 0;
+out_irqdesc_free:
+        irq_free_descs(irq_base, 32);
+out_gpiochip_remove:
+        WARN_ON(gpiochip_remove(&port->bgc.gc) < 0);
 out_bgpio_remove:
        bgpio_remove(&port->bgc);
 out_iounmap:
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index c4ed1722734c..e6efd77668f0 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -174,12 +174,22 @@ static inline void _gpio_dbck_enable(struct gpio_bank *bank)
        if (bank->dbck_enable_mask && !bank->dbck_enabled) {
                clk_enable(bank->dbck);
                bank->dbck_enabled = true;
+                __raw_writel(bank->dbck_enable_mask,
+                             bank->base + bank->regs->debounce_en);
        }
 }
 static inline void _gpio_dbck_disable(struct gpio_bank *bank)
 {
        if (bank->dbck_enable_mask && bank->dbck_enabled) {
+                /*
+                 * Disable debounce before cutting it's clock. If debounce is
+                 * enabled but the clock is not, GPIO module seems to be unable
+                 * to detect events and generate interrupts at least on OMAP3.
+                 */
+                __raw_writel(0, bank->base + bank->regs->debounce_en);
                clk_disable(bank->dbck);
                bank->dbck_enabled = false;
        }
@@ -889,12 +899,6 @@ static int gpio_debounce(struct gpio_chip *chip, unsigned offset,
        bank = container_of(chip, struct gpio_bank, chip);
-        if (!bank->dbck) {
-                bank->dbck = clk_get(bank->dev, "dbclk");
-                if (IS_ERR(bank->dbck))
-                        dev_err(bank->dev, "Could not get gpio dbck\n");
-        }
        spin_lock_irqsave(&bank->lock, flags);
        _set_gpio_debounce(bank, offset, debounce);
        spin_unlock_irqrestore(&bank->lock, flags);
@@ -966,6 +970,10 @@ static void omap_gpio_mod_init(struct gpio_bank *bank)
         /* Initialize interface clk ungated, module enabled */
        if (bank->regs->ctrl)
                __raw_writel(0, base + bank->regs->ctrl);
+        bank->dbck = clk_get(bank->dev, "dbclk");
+        if (IS_ERR(bank->dbck))
+                dev_err(bank->dev, "Could not get gpio dbck\n");
 }
 static __devinit void
@@ -1081,7 +1089,6 @@ static int __devinit omap_gpio_probe(struct platform_device *pdev)
        bank->is_mpuio = pdata->is_mpuio;
        bank->non_wakeup_gpios = pdata->non_wakeup_gpios;
        bank->loses_context = pdata->loses_context;
-        bank->get_context_loss_count = pdata->get_context_loss_count;
        bank->regs = pdata->regs;
 #ifdef CONFIG_OF_GPIO
        bank->chip.of_node = of_node_get(node);
@@ -1135,6 +1142,9 @@ static int __devinit omap_gpio_probe(struct platform_device *pdev)
        omap_gpio_chip_init(bank);
        omap_gpio_show_rev(bank);
+        if (bank->loses_context)
+                bank->get_context_loss_count = pdata->get_context_loss_count;
        pm_runtime_put(bank->dev);
        list_add_tail(&bank->node, &omap_gpio_list);
diff --git a/drivers/gpio/gpio-pca953x.c b/drivers/gpio/gpio-pca953x.c
index 1c313c710be3..9c693ae17956 100644
--- a/drivers/gpio/gpio-pca953x.c
+++ b/drivers/gpio/gpio-pca953x.c
@@ -78,10 +78,10 @@ struct pca953x_chip {
 #ifdef CONFIG_GPIO_PCA953X_IRQ
        struct mutex irq_lock;
-        uint16_t irq_mask;
+        u32 irq_mask;
-        uint16_t irq_stat;
+        u32 irq_stat;
-        uint16_t irq_trig_raise;
+        u32 irq_trig_raise;
-        uint16_t irq_trig_fall;
+        u32 irq_trig_fall;
        int      irq_base;
 #endif
@@ -98,12 +98,11 @@ static int pca953x_write_reg(struct pca953x_chip *chip, int reg, u32 val)
        if (chip->gpio_chip.ngpio <= 8)
                ret = i2c_smbus_write_byte_data(chip->client, reg, val);
        else if (chip->gpio_chip.ngpio == 24) {
-                ret = i2c_smbus_write_word_data(chip->client,
+                cpu_to_le32s(&val);
+                ret = i2c_smbus_write_i2c_block_data(chip->client,
                                                (reg << 2) | REG_ADDR_AI,
-                                                val & 0xffff);
+                                                3,
-                ret = i2c_smbus_write_byte_data(chip->client,
+                                                (u8 *) &val);
-                                                (reg << 2) + 2,
-                                                (val & 0xff0000) >> 16);
        }
        else {
                switch (chip->chip_type) {
@@ -135,22 +134,27 @@ static int pca953x_read_reg(struct pca953x_chip *chip, int reg, u32 *val)
 {
        int ret;
-        if (chip->gpio_chip.ngpio <= 8)
+        if (chip->gpio_chip.ngpio <= 8) {
                ret = i2c_smbus_read_byte_data(chip->client, reg);
-        else if (chip->gpio_chip.ngpio == 24) {
+                *val = ret;
-                ret =  i2c_smbus_read_word_data(chip->client, reg << 2);
-                ret |= (i2c_smbus_read_byte_data(chip->client,
-                                                 (reg << 2) + 2)<<16);
        }
-        else
+        else if (chip->gpio_chip.ngpio == 24) {
+                *val = 0;
+                ret = i2c_smbus_read_i2c_block_data(chip->client,
+                                                (reg << 2) | REG_ADDR_AI,
+                                                3,
+                                                (u8 *) val);
+                le32_to_cpus(val);
+        } else {
                ret = i2c_smbus_read_word_data(chip->client, reg << 1);
+                *val = ret;
+        }
        if (ret < 0) {
                dev_err(&chip->client->dev, "failed reading register\n");
                return ret;
        }
-        *val = (u32)ret;
        return 0;
 }
@@ -349,8 +353,8 @@ static void pca953x_irq_bus_lock(struct irq_data *d)
 static void pca953x_irq_bus_sync_unlock(struct irq_data *d)
 {
        struct pca953x_chip *chip = irq_data_get_irq_chip_data(d);
-        uint16_t new_irqs;
+        u32 new_irqs;
-        uint16_t level;
+        u32 level;
        /* Look for any newly setup interrupt */
        new_irqs = chip->irq_trig_fall | chip->irq_trig_raise;
@@ -368,8 +372,8 @@ static void pca953x_irq_bus_sync_unlock(struct irq_data *d)
 static int pca953x_irq_set_type(struct irq_data *d, unsigned int type)
 {
        struct pca953x_chip *chip = irq_data_get_irq_chip_data(d);
-        uint16_t level = d->irq - chip->irq_base;
+        u32 level = d->irq - chip->irq_base;
-        uint16_t mask = 1 << level;
+        u32 mask = 1 << level;
        if (!(type & IRQ_TYPE_EDGE_BOTH)) {
                dev_err(&chip->client->dev, "irq %d: unsupported type %d\n",
@@ -399,12 +403,12 @@ static struct irq_chip pca953x_irq_chip = {
        .irq_set_type           = pca953x_irq_set_type,
 };
-static uint16_t pca953x_irq_pending(struct pca953x_chip *chip)
+static u32 pca953x_irq_pending(struct pca953x_chip *chip)
 {
        u32 cur_stat;
-        uint16_t old_stat;
+        u32 old_stat;
-        uint16_t pending;
+        u32 pending;
-        uint16_t trigger;
+        u32 trigger;
        int ret, offset = 0;
        switch (chip->chip_type) {
@@ -440,8 +444,8 @@ static uint16_t pca953x_irq_pending(struct pca953x_chip *chip)
 static irqreturn_t pca953x_irq_handler(int irq, void *devid)
 {
        struct pca953x_chip *chip = devid;
-        uint16_t pending;
+        u32 pending;
-        uint16_t level;
+        u32 level;
        pending = pca953x_irq_pending(chip);
@@ -564,7 +568,7 @@ static void pca953x_irq_teardown(struct pca953x_chip *chip)
 * WARNING: This is DEPRECATED and will be removed eventually!
 */
 static void
-pca953x_get_alt_pdata(struct i2c_client *client, int *gpio_base, int *invert)
+pca953x_get_alt_pdata(struct i2c_client *client, int *gpio_base, u32 *invert)
 {
        struct device_node *node;
        const __be32 *val;
@@ -592,13 +596,13 @@ pca953x_get_alt_pdata(struct i2c_client *client, int *gpio_base, int *invert)
 }
 #else
 static void
-pca953x_get_alt_pdata(struct i2c_client *client, int *gpio_base, int *invert)
+pca953x_get_alt_pdata(struct i2c_client *client, int *gpio_base, u32 *invert)
 {
        *gpio_base = -1;
 }
 #endif
-static int __devinit device_pca953x_init(struct pca953x_chip *chip, int invert)
+static int __devinit device_pca953x_init(struct pca953x_chip *chip, u32 invert)
 {
        int ret;
@@ -617,7 +621,7 @@ out:
        return ret;
 }
-static int __devinit device_pca957x_init(struct pca953x_chip *chip, int invert)
+static int __devinit device_pca957x_init(struct pca953x_chip *chip, u32 invert)
 {
        int ret;
        u32 val = 0;
@@ -653,8 +657,9 @@ static int __devinit pca953x_probe(struct i2c_client *client,
 {
        struct pca953x_platform_data *pdata;
        struct pca953x_chip *chip;
-        int irq_base=0, invert=0;
+        int irq_base = 0;
        int ret;
+        u32 invert = 0;
        chip = kzalloc(sizeof(struct pca953x_chip), GFP_KERNEL);
        if (chip == NULL)
diff --git a/drivers/gpio/gpio-pcf857x.c b/drivers/gpio/gpio-pcf857x.c
index 2d1de9e7e9bd..076e236d0da7 100644
--- a/drivers/gpio/gpio-pcf857x.c
+++ b/drivers/gpio/gpio-pcf857x.c
@@ -61,61 +61,28 @@ struct pcf857x {
        struct i2c_client       *client;
        struct mutex            lock;           /* protect 'out' */
        unsigned                out;            /* software latch */
+        int (*write)(struct i2c_client *client, unsigned data);
+        int (*read)(struct i2c_client *client);
 };
 /*-------------------------------------------------------------------------*/
 /* Talk to 8-bit I/O expander */
-static int pcf857x_input8(struct gpio_chip *chip, unsigned offset)
+static int i2c_write_le8(struct i2c_client *client, unsigned data)
-{
-        struct pcf857x  *gpio = container_of(chip, struct pcf857x, chip);
-        int             status;
-        mutex_lock(&gpio->lock);
-        gpio->out |= (1 << offset);
-        status = i2c_smbus_write_byte(gpio->client, gpio->out);
-        mutex_unlock(&gpio->lock);
-        return status;
-}
-static int pcf857x_get8(struct gpio_chip *chip, unsigned offset)
-{
-        struct pcf857x  *gpio = container_of(chip, struct pcf857x, chip);
-        s32             value;
-        value = i2c_smbus_read_byte(gpio->client);
-        return (value < 0) ? 0 : (value & (1 << offset));
-}
-static int pcf857x_output8(struct gpio_chip *chip, unsigned offset, int value)
 {
-        struct pcf857x  *gpio = container_of(chip, struct pcf857x, chip);
+        return i2c_smbus_write_byte(client, data);
-        unsigned        bit = 1 << offset;
-        int             status;
-        mutex_lock(&gpio->lock);
-        if (value)
-                gpio->out |= bit;
-        else
-                gpio->out &= ~bit;
-        status = i2c_smbus_write_byte(gpio->client, gpio->out);
-        mutex_unlock(&gpio->lock);
-        return status;
 }
-static void pcf857x_set8(struct gpio_chip *chip, unsigned offset, int value)
+static int i2c_read_le8(struct i2c_client *client)
 {
-        pcf857x_output8(chip, offset, value);
+        return (int)i2c_smbus_read_byte(client);
 }
-/*-------------------------------------------------------------------------*/
 /* Talk to 16-bit I/O expander */
-static int i2c_write_le16(struct i2c_client *client, u16 word)
+static int i2c_write_le16(struct i2c_client *client, unsigned word)
 {
        u8 buf[2] = { word & 0xff, word >> 8, };
        int status;
@@ -135,29 +102,31 @@ static int i2c_read_le16(struct i2c_client *client)
        return (buf[1] << 8) | buf[0];
 }
-static int pcf857x_input16(struct gpio_chip *chip, unsigned offset)
+/*-------------------------------------------------------------------------*/
+static int pcf857x_input(struct gpio_chip *chip, unsigned offset)
 {
        struct pcf857x  *gpio = container_of(chip, struct pcf857x, chip);
        int             status;
        mutex_lock(&gpio->lock);
        gpio->out |= (1 << offset);
-        status = i2c_write_le16(gpio->client, gpio->out);
+        status = gpio->write(gpio->client, gpio->out);
        mutex_unlock(&gpio->lock);
        return status;
 }
-static int pcf857x_get16(struct gpio_chip *chip, unsigned offset)
+static int pcf857x_get(struct gpio_chip *chip, unsigned offset)
 {
        struct pcf857x  *gpio = container_of(chip, struct pcf857x, chip);
        int             value;
-        value = i2c_read_le16(gpio->client);
+        value = gpio->read(gpio->client);
        return (value < 0) ? 0 : (value & (1 << offset));
 }
-static int pcf857x_output16(struct gpio_chip *chip, unsigned offset, int value)
+static int pcf857x_output(struct gpio_chip *chip, unsigned offset, int value)
 {
        struct pcf857x  *gpio = container_of(chip, struct pcf857x, chip);
        unsigned        bit = 1 << offset;
@@ -168,15 +137,15 @@ static int pcf857x_output16(struct gpio_chip *chip, unsigned offset, int value)
                gpio->out |= bit;
        else
                gpio->out &= ~bit;
-        status = i2c_write_le16(gpio->client, gpio->out);
+        status = gpio->write(gpio->client, gpio->out);
        mutex_unlock(&gpio->lock);
        return status;
 }
-static void pcf857x_set16(struct gpio_chip *chip, unsigned offset, int value)
+static void pcf857x_set(struct gpio_chip *chip, unsigned offset, int value)
 {
-        pcf857x_output16(chip, offset, value);
+        pcf857x_output(chip, offset, value);
 }
 /*-------------------------------------------------------------------------*/
@@ -200,10 +169,15 @@ static int pcf857x_probe(struct i2c_client *client,
        mutex_init(&gpio->lock);
-        gpio->chip.base = pdata ? pdata->gpio_base : -1;
+        gpio->chip.base                 = pdata ? pdata->gpio_base : -1;
-        gpio->chip.can_sleep = 1;
+        gpio->chip.can_sleep            = 1;
-        gpio->chip.dev = &client->dev;
+        gpio->chip.dev                  = &client->dev;
-        gpio->chip.owner = THIS_MODULE;
+        gpio->chip.owner                = THIS_MODULE;
+        gpio->chip.get                  = pcf857x_get;
+        gpio->chip.set                  = pcf857x_set;
+        gpio->chip.direction_input      = pcf857x_input;
+        gpio->chip.direction_output     = pcf857x_output;
+        gpio->chip.ngpio                = id->driver_data;
        /* NOTE:  the OnSemi jlc1562b is also largely compatible with
         * these parts, notably for output.  It has a low-resolution
@@ -216,12 +190,9 @@ static int pcf857x_probe(struct i2c_client *client,
         *
         * NOTE: we don't distinguish here between *4 and *4a parts.
         */
-        gpio->chip.ngpio = id->driver_data;
        if (gpio->chip.ngpio == 8) {
-                gpio->chip.direction_input = pcf857x_input8;
+                gpio->write     = i2c_write_le8;
-                gpio->chip.get = pcf857x_get8;
+                gpio->read      = i2c_read_le8;
-                gpio->chip.direction_output = pcf857x_output8;
-                gpio->chip.set = pcf857x_set8;
                if (!i2c_check_functionality(client->adapter,
                                I2C_FUNC_SMBUS_BYTE))
@@ -238,10 +209,8 @@ static int pcf857x_probe(struct i2c_client *client,
         * NOTE: we don't distinguish here between '75 and '75c parts.
         */
        } else if (gpio->chip.ngpio == 16) {
-                gpio->chip.direction_input = pcf857x_input16;
+                gpio->write     = i2c_write_le16;
-                gpio->chip.get = pcf857x_get16;
+                gpio->read      = i2c_read_le16;
-                gpio->chip.direction_output = pcf857x_output16;
-                gpio->chip.set = pcf857x_set16;
                if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
                        status = -EIO;
diff --git a/drivers/gpio/gpio-pxa.c b/drivers/gpio/gpio-pxa.c
index 58a6a63a6ece..9cac88a65f78 100644
--- a/drivers/gpio/gpio-pxa.c
+++ b/drivers/gpio/gpio-pxa.c
@@ -62,6 +62,7 @@ int pxa_last_gpio;
 #ifdef CONFIG_OF
 static struct irq_domain *domain;
+static struct device_node *pxa_gpio_of_node;
 #endif
 struct pxa_gpio_chip {
@@ -277,6 +278,24 @@ static void pxa_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
                                (value ? GPSR_OFFSET : GPCR_OFFSET));
 }
+#ifdef CONFIG_OF_GPIO
+static int pxa_gpio_of_xlate(struct gpio_chip *gc,
+                             const struct of_phandle_args *gpiospec,
+                             u32 *flags)
+{
+        if (gpiospec->args[0] > pxa_last_gpio)
+                return -EINVAL;
+        if (gc != &pxa_gpio_chips[gpiospec->args[0] / 32].chip)
+                return -EINVAL;
+        if (flags)
+                *flags = gpiospec->args[1];
+        return gpiospec->args[0] % 32;
+}
+#endif
 static int __devinit pxa_init_gpio_chip(int gpio_end,
                                        int (*set_wake)(unsigned int, unsigned int))
 {
@@ -304,6 +323,11 @@ static int __devinit pxa_init_gpio_chip(int gpio_end,
                c->get = pxa_gpio_get;
                c->set = pxa_gpio_set;
                c->to_irq = pxa_gpio_to_irq;
+#ifdef CONFIG_OF_GPIO
+                c->of_node = pxa_gpio_of_node;
+                c->of_xlate = pxa_gpio_of_xlate;
+                c->of_gpio_n_cells = 2;
+#endif
                /* number of GPIOs on last bank may be less than 32 */
                c->ngpio = (gpio + 31 > gpio_end) ? (gpio_end - gpio + 1) : 32;
@@ -488,6 +512,7 @@ static int pxa_gpio_nums(void)
        return count;
 }
+#ifdef CONFIG_OF
 static struct of_device_id pxa_gpio_dt_ids[] = {
        { .compatible = "mrvl,pxa-gpio" },
        { .compatible = "mrvl,mmp-gpio", .data = (void *)MMP_GPIO },
@@ -505,9 +530,9 @@ static int pxa_irq_domain_map(struct irq_domain *d, unsigned int irq,
 const struct irq_domain_ops pxa_irq_domain_ops = {
        .map    = pxa_irq_domain_map,
+        .xlate  = irq_domain_xlate_twocell,
 };
-#ifdef CONFIG_OF
 static int __devinit pxa_gpio_probe_dt(struct platform_device *pdev)
 {
        int ret, nr_banks, nr_gpios, irq_base;
@@ -545,6 +570,7 @@ static int __devinit pxa_gpio_probe_dt(struct platform_device *pdev)
        }
        domain = irq_domain_add_legacy(np, nr_gpios, irq_base, 0,
                                       &pxa_irq_domain_ops, NULL);
+        pxa_gpio_of_node = np;
        return 0;
 err:
        iounmap(gpio_reg_base);
@@ -653,7 +679,7 @@ static struct platform_driver pxa_gpio_driver = {
        .probe          = pxa_gpio_probe,
        .driver         = {
                .name   = "pxa-gpio",
-                .of_match_table = pxa_gpio_dt_ids,
+                .of_match_table = of_match_ptr(pxa_gpio_dt_ids),
        },
 };
diff --git a/drivers/gpio/gpio-samsung.c b/drivers/gpio/gpio-samsung.c
index b6453d0e44ad..ba126cc04073 100644
--- a/drivers/gpio/gpio-samsung.c
+++ b/drivers/gpio/gpio-samsung.c
@@ -2454,12 +2454,6 @@ static struct samsung_gpio_chip exynos5_gpios_1[] = {
                },
        }, {
                .chip   = {
-                        .base   = EXYNOS5_GPC4(0),
-                        .ngpio  = EXYNOS5_GPIO_C4_NR,
-                        .label  = "GPC4",
-                },
-        }, {
-                .chip   = {
                        .base   = EXYNOS5_GPD0(0),
                        .ngpio  = EXYNOS5_GPIO_D0_NR,
                        .label  = "GPD0",
@@ -2513,6 +2507,12 @@ static struct samsung_gpio_chip exynos5_gpios_1[] = {
                        .label  = "GPY6",
                },
        }, {
+                .chip   = {
+                        .base   = EXYNOS5_GPC4(0),
+                        .ngpio  = EXYNOS5_GPIO_C4_NR,
+                        .label  = "GPC4",
+                },
+        }, {
                .config = &samsung_gpio_cfgs[9],
                .irq_base = IRQ_EINT(0),
                .chip   = {
@@ -2681,11 +2681,14 @@ static int exynos_gpio_xlate(struct gpio_chip *gc,
        if (s3c_gpio_cfgpin(pin, S3C_GPIO_SFN(gpiospec->args[1])))
                pr_warn("gpio_xlate: failed to set pin function\n");
-        if (s3c_gpio_setpull(pin, gpiospec->args[2]))
+        if (s3c_gpio_setpull(pin, gpiospec->args[2] & 0xffff))
                pr_warn("gpio_xlate: failed to set pin pull up/down\n");
        if (s5p_gpio_set_drvstr(pin, gpiospec->args[3]))
                pr_warn("gpio_xlate: failed to set pin drive strength\n");
+        if (flags)
+                *flags = gpiospec->args[2] >> 16;
        return gpiospec->args[0];
 }
@@ -2833,7 +2836,7 @@ static __init void exynos5_gpiolib_init(void)
        }
        /* need to set base address for gpc4 */
-        exynos5_gpios_1[11].base = gpio_base1 + 0x2E0;
+        exynos5_gpios_1[20].base = gpio_base1 + 0x2E0;
        /* need to set base address for gpx */
        chip = &exynos5_gpios_1[21];
diff --git a/drivers/gpio/gpio-sch.c b/drivers/gpio/gpio-sch.c
index 424dce8e3f30..8707d4572a06 100644
--- a/drivers/gpio/gpio-sch.c
+++ b/drivers/gpio/gpio-sch.c
@@ -241,7 +241,8 @@ static int __devinit sch_gpio_probe(struct platform_device *pdev)
                        break;
                default:
-                        return -ENODEV;
+                        err = -ENODEV;
+                        goto err_sch_gpio_core;
        }
        sch_gpio_core.dev = &pdev->dev;
diff --git a/drivers/gpio/gpio-sta2x11.c b/drivers/gpio/gpio-sta2x11.c
index 38416be8ba11..6064fb376e11 100644
--- a/drivers/gpio/gpio-sta2x11.c
+++ b/drivers/gpio/gpio-sta2x11.c
@@ -383,8 +383,9 @@ static int __devinit gsta_probe(struct platform_device *dev)
        }
        spin_lock_init(&chip->lock);
        gsta_gpio_setup(chip);
-        for (i = 0; i < GSTA_NR_GPIO; i++)
+        if (gpio_pdata)
-                gsta_set_config(chip, i, gpio_pdata->pinconfig[i]);
+                for (i = 0; i < GSTA_NR_GPIO; i++)
+                        gsta_set_config(chip, i, gpio_pdata->pinconfig[i]);
        /* 384 was used in previous code: be compatible for other drivers */
        err = irq_alloc_descs(-1, 384, GSTA_NR_GPIO, NUMA_NO_NODE);
diff --git a/drivers/gpio/gpio-tps6586x.c b/drivers/gpio/gpio-tps6586x.c
new file mode 100644
index 000000000000..2526b3bb0fae
--- /dev/null
+++ b/drivers/gpio/gpio-tps6586x.c
@@ -0,0 +1,158 @@
+/*
+ * TI TPS6586x GPIO driver
+ *
+ * Copyright (c) 2012, NVIDIA CORPORATION.  All rights reserved.
+ * Author: Laxman dewangan <ldewangan@nvidia.com>
+ *
+ * Based on tps6586x.c
+ * Copyright (c) 2010 CompuLab Ltd.
+ * Mike Rapoport <mike@compulab.co.il>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+#include <linux/errno.h>
+#include <linux/gpio.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/mfd/tps6586x.h>
+#include <linux/of_device.h>
+#include <linux/platform_device.h>
+/* GPIO control registers */
+#define TPS6586X_GPIOSET1       0x5d
+#define TPS6586X_GPIOSET2       0x5e
+struct tps6586x_gpio {
+        struct gpio_chip gpio_chip;
+        struct device *parent;
+};
+static inline struct tps6586x_gpio *to_tps6586x_gpio(struct gpio_chip *chip)
+{
+        return container_of(chip, struct tps6586x_gpio, gpio_chip);
+}
+static int tps6586x_gpio_get(struct gpio_chip *gc, unsigned offset)
+{
+        struct tps6586x_gpio *tps6586x_gpio = to_tps6586x_gpio(gc);
+        uint8_t val;
+        int ret;
+        ret = tps6586x_read(tps6586x_gpio->parent, TPS6586X_GPIOSET2, &val);
+        if (ret)
+                return ret;
+        return !!(val & (1 << offset));
+}
+static void tps6586x_gpio_set(struct gpio_chip *gc, unsigned offset,
+                              int value)
+{
+        struct tps6586x_gpio *tps6586x_gpio = to_tps6586x_gpio(gc);
+        tps6586x_update(tps6586x_gpio->parent, TPS6586X_GPIOSET2,
+                        value << offset, 1 << offset);
+}
+static int tps6586x_gpio_output(struct gpio_chip *gc, unsigned offset,
+                                int value)
+{
+        struct tps6586x_gpio *tps6586x_gpio = to_tps6586x_gpio(gc);
+        uint8_t val, mask;
+        tps6586x_gpio_set(gc, offset, value);
+        val = 0x1 << (offset * 2);
+        mask = 0x3 << (offset * 2);
+        return tps6586x_update(tps6586x_gpio->parent, TPS6586X_GPIOSET1,
+                                val, mask);
+}
+static int __devinit tps6586x_gpio_probe(struct platform_device *pdev)
+{
+        struct tps6586x_platform_data *pdata;
+        struct tps6586x_gpio *tps6586x_gpio;
+        int ret;
+        pdata = dev_get_platdata(pdev->dev.parent);
+        tps6586x_gpio = devm_kzalloc(&pdev->dev,
+                                sizeof(*tps6586x_gpio), GFP_KERNEL);
+        if (!tps6586x_gpio) {
+                dev_err(&pdev->dev, "Could not allocate tps6586x_gpio\n");
+                return -ENOMEM;
+        }
+        tps6586x_gpio->parent = pdev->dev.parent;
+        tps6586x_gpio->gpio_chip.owner = THIS_MODULE;
+        tps6586x_gpio->gpio_chip.label = pdev->name;
+        tps6586x_gpio->gpio_chip.dev = &pdev->dev;
+        tps6586x_gpio->gpio_chip.ngpio = 4;
+        tps6586x_gpio->gpio_chip.can_sleep = 1;
+        /* FIXME: add handling of GPIOs as dedicated inputs */
+        tps6586x_gpio->gpio_chip.direction_output = tps6586x_gpio_output;
+        tps6586x_gpio->gpio_chip.set    = tps6586x_gpio_set;
+        tps6586x_gpio->gpio_chip.get    = tps6586x_gpio_get;
+#ifdef CONFIG_OF_GPIO
+        tps6586x_gpio->gpio_chip.of_node = pdev->dev.parent->of_node;
+#endif
+        if (pdata && pdata->gpio_base)
+                tps6586x_gpio->gpio_chip.base = pdata->gpio_base;
+        else
+                tps6586x_gpio->gpio_chip.base = -1;
+        ret = gpiochip_add(&tps6586x_gpio->gpio_chip);
+        if (ret < 0) {
+                dev_err(&pdev->dev, "Could not register gpiochip, %d\n", ret);
+                return ret;
+        }
+        platform_set_drvdata(pdev, tps6586x_gpio);
+        return ret;
+}
+static int __devexit tps6586x_gpio_remove(struct platform_device *pdev)
+{
+        struct tps6586x_gpio *tps6586x_gpio = platform_get_drvdata(pdev);
+        return gpiochip_remove(&tps6586x_gpio->gpio_chip);
+}
+static struct platform_driver tps6586x_gpio_driver = {
+        .driver.name    = "tps6586x-gpio",
+        .driver.owner   = THIS_MODULE,
+        .probe          = tps6586x_gpio_probe,
+        .remove         = __devexit_p(tps6586x_gpio_remove),
+};
+static int __init tps6586x_gpio_init(void)
+{
+        return platform_driver_register(&tps6586x_gpio_driver);
+}
+subsys_initcall(tps6586x_gpio_init);
+static void __exit tps6586x_gpio_exit(void)
+{
+        platform_driver_unregister(&tps6586x_gpio_driver);
+}
+module_exit(tps6586x_gpio_exit);
+MODULE_ALIAS("platform:tps6586x-gpio");
+MODULE_DESCRIPTION("GPIO interface for TPS6586X PMIC");
+MODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>");
+MODULE_LICENSE("GPL");
diff --git a/drivers/gpio/gpio-tps65910.c b/drivers/gpio/gpio-tps65910.c
index c1ad2884f2ed..11f29c82253c 100644
--- a/drivers/gpio/gpio-tps65910.c
+++ b/drivers/gpio/gpio-tps65910.c
@@ -149,6 +149,9 @@ static int __devinit tps65910_gpio_probe(struct platform_device *pdev)
        tps65910_gpio->gpio_chip.set    = tps65910_gpio_set;
        tps65910_gpio->gpio_chip.get    = tps65910_gpio_get;
        tps65910_gpio->gpio_chip.dev = &pdev->dev;
+#ifdef CONFIG_OF_GPIO
+        tps65910_gpio->gpio_chip.of_node = tps65910->dev->of_node;
+#endif
        if (pdata && pdata->gpio_base)
                tps65910_gpio->gpio_chip.base = pdata->gpio_base;
        else
diff --git a/drivers/gpio/gpio-wm8994.c b/drivers/gpio/gpio-wm8994.c
index 92ea5350dfe9..1c764e779d80 100644
--- a/drivers/gpio/gpio-wm8994.c
+++ b/drivers/gpio/gpio-wm8994.c
@@ -19,6 +19,7 @@
 #include <linux/mfd/core.h>
 #include <linux/platform_device.h>
 #include <linux/seq_file.h>
+#include <linux/regmap.h>
 #include <linux/mfd/wm8994/core.h>
 #include <linux/mfd/wm8994/pdata.h>
@@ -89,8 +90,11 @@ static int wm8994_gpio_direction_out(struct gpio_chip *chip,
        struct wm8994_gpio *wm8994_gpio = to_wm8994_gpio(chip);
        struct wm8994 *wm8994 = wm8994_gpio->wm8994;
+        if (value)
+                value = WM8994_GPN_LVL;
        return wm8994_set_bits(wm8994, WM8994_GPIO_1 + offset,
-                               WM8994_GPN_DIR, 0);
+                               WM8994_GPN_DIR | WM8994_GPN_LVL, value);
 }
 static void wm8994_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
@@ -109,10 +113,7 @@ static int wm8994_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
        struct wm8994_gpio *wm8994_gpio = to_wm8994_gpio(chip);
        struct wm8994 *wm8994 = wm8994_gpio->wm8994;
-        if (!wm8994->irq_base)
+        return regmap_irq_get_virq(wm8994->irq_data, offset);
-                return -EINVAL;
-        return wm8994->irq_base + offset;
 }
@@ -251,7 +252,8 @@ static int __devinit wm8994_gpio_probe(struct platform_device *pdev)
        struct wm8994_gpio *wm8994_gpio;
        int ret;
-        wm8994_gpio = kzalloc(sizeof(*wm8994_gpio), GFP_KERNEL);
+        wm8994_gpio = devm_kzalloc(&pdev->dev, sizeof(*wm8994_gpio),
+                                   GFP_KERNEL);
        if (wm8994_gpio == NULL)
                return -ENOMEM;
@@ -276,20 +278,14 @@ static int __devinit wm8994_gpio_probe(struct platform_device *pdev)
        return ret;
 err:
-        kfree(wm8994_gpio);
        return ret;
 }
 static int __devexit wm8994_gpio_remove(struct platform_device *pdev)
 {
        struct wm8994_gpio *wm8994_gpio = platform_get_drvdata(pdev);
-        int ret;
-        ret = gpiochip_remove(&wm8994_gpio->gpio_chip);
-        if (ret == 0)
-                kfree(wm8994_gpio);
-        return ret;
+        return gpiochip_remove(&wm8994_gpio->gpio_chip);
 }
 static struct platform_driver wm8994_gpio_driver = {
diff --git a/drivers/gpio/gpiolib-of.c b/drivers/gpio/gpiolib-of.c
index d18068a9f3ec..a18c4aa68b1e 100644
--- a/drivers/gpio/gpiolib-of.c
+++ b/drivers/gpio/gpiolib-of.c
@@ -21,7 +21,7 @@
 #include <linux/of_gpio.h>
 #include <linux/slab.h>
-/* Private data structure for of_gpiochip_is_match */
+/* Private data structure for of_gpiochip_find_and_xlate */
 struct gg_data {
        enum of_gpio_flags *flags;
        struct of_phandle_args gpiospec;
@@ -62,7 +62,10 @@ static int of_gpiochip_find_and_xlate(struct gpio_chip *gc, void *data)
 int of_get_named_gpio_flags(struct device_node *np, const char *propname,
                           int index, enum of_gpio_flags *flags)
 {
-        struct gg_data gg_data = { .flags = flags, .out_gpio = -ENODEV };
+        /* Return -EPROBE_DEFER to support probe() functions to be called
+         * later when the GPIO actually becomes available
+         */
+        struct gg_data gg_data = { .flags = flags, .out_gpio = -EPROBE_DEFER };
        int ret;
        /* .of_xlate might decide to not fill in the flags, so clear it. */
@@ -73,7 +76,7 @@ int of_get_named_gpio_flags(struct device_node *np, const char *propname,
                                         &gg_data.gpiospec);
        if (ret) {
                pr_debug("%s: can't parse gpios property\n", __func__);
-                return -EINVAL;
+                return ret;
        }
        gpiochip_find(&gg_data, of_gpiochip_find_and_xlate);
diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c
index 120b2a0e3167..de0213c9d11c 100644
--- a/drivers/gpio/gpiolib.c
+++ b/drivers/gpio/gpiolib.c
@@ -1186,7 +1186,7 @@ int gpio_request(unsigned gpio, const char *label)
 {
        struct gpio_desc        *desc;
        struct gpio_chip        *chip;
-        int                     status = -EINVAL;
+        int                     status = -EPROBE_DEFER;
        unsigned long           flags;
        spin_lock_irqsave(&gpio_lock, flags);
diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
index 23120c00a881..90e28081712d 100644
--- a/drivers/gpu/drm/Kconfig
+++ b/drivers/gpu/drm/Kconfig
@@ -22,6 +22,7 @@ menuconfig DRM
 config DRM_USB
        tristate
        depends on DRM
+        depends on USB_ARCH_HAS_HCD
        select USB
 config DRM_KMS_HELPER
diff --git a/drivers/gpu/drm/ast/ast_mode.c b/drivers/gpu/drm/ast/ast_mode.c
index 65f9d231af14..7282c081fb53 100644
--- a/drivers/gpu/drm/ast/ast_mode.c
+++ b/drivers/gpu/drm/ast/ast_mode.c
@@ -460,8 +460,8 @@ static void ast_crtc_dpms(struct drm_crtc *crtc, int mode)
 }
 static bool ast_crtc_mode_fixup(struct drm_crtc *crtc,
-                                  struct drm_display_mode *mode,
+                                const struct drm_display_mode *mode,
-                                  struct drm_display_mode *adjusted_mode)
+                                struct drm_display_mode *adjusted_mode)
 {
        return true;
 }
@@ -680,7 +680,7 @@ static void ast_encoder_dpms(struct drm_encoder *encoder, int mode)
 }
 static bool ast_mode_fixup(struct drm_encoder *encoder,
-                           struct drm_display_mode *mode,
+                           const struct drm_display_mode *mode,
                           struct drm_display_mode *adjusted_mode)
 {
        return true;
diff --git a/drivers/gpu/drm/cirrus/cirrus_mode.c b/drivers/gpu/drm/cirrus/cirrus_mode.c
index 100f6308c509..a44d31aa4e3c 100644
--- a/drivers/gpu/drm/cirrus/cirrus_mode.c
+++ b/drivers/gpu/drm/cirrus/cirrus_mode.c
@@ -97,7 +97,7 @@ static void cirrus_crtc_dpms(struct drm_crtc *crtc, int mode)
 * to just pass that straight through, so this does nothing
 */
 static bool cirrus_crtc_mode_fixup(struct drm_crtc *crtc,
-                                   struct drm_display_mode *mode,
+                                   const struct drm_display_mode *mode,
                                   struct drm_display_mode *adjusted_mode)
 {
        return true;
@@ -429,8 +429,8 @@ void cirrus_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
 static bool cirrus_encoder_mode_fixup(struct drm_encoder *encoder,
-                                  struct drm_display_mode *mode,
+                                      const struct drm_display_mode *mode,
-                                  struct drm_display_mode *adjusted_mode)
+                                      struct drm_display_mode *adjusted_mode)
 {
        return true;
 }
diff --git a/drivers/gpu/drm/drm_bufs.c b/drivers/gpu/drm/drm_bufs.c
index 348b367debeb..b356c719f2f1 100644
--- a/drivers/gpu/drm/drm_bufs.c
+++ b/drivers/gpu/drm/drm_bufs.c
@@ -641,8 +641,6 @@ int drm_addbufs_agp(struct drm_device * dev, struct drm_buf_desc * request)
        if (order < DRM_MIN_ORDER || order > DRM_MAX_ORDER)
                return -EINVAL;
-        if (dev->queue_count)
-                return -EBUSY;  /* Not while in use */
        /* Make sure buffers are located in AGP memory that we own */
        valid = 0;
@@ -704,7 +702,6 @@ int drm_addbufs_agp(struct drm_device * dev, struct drm_buf_desc * request)
                buf->next = NULL;
                buf->waiting = 0;
                buf->pending = 0;
-                init_waitqueue_head(&buf->dma_wait);
                buf->file_priv = NULL;
                buf->dev_priv_size = dev->driver->dev_priv_size;
@@ -796,13 +793,11 @@ int drm_addbufs_pci(struct drm_device * dev, struct drm_buf_desc * request)
        order = drm_order(request->size);
        size = 1 << order;
-        DRM_DEBUG("count=%d, size=%d (%d), order=%d, queue_count=%d\n",
+        DRM_DEBUG("count=%d, size=%d (%d), order=%d\n",
-                  request->count, request->size, size, order, dev->queue_count);
+                  request->count, request->size, size, order);
        if (order < DRM_MIN_ORDER || order > DRM_MAX_ORDER)
                return -EINVAL;
-        if (dev->queue_count)
-                return -EBUSY;  /* Not while in use */
        alignment = (request->flags & _DRM_PAGE_ALIGN)
            ? PAGE_ALIGN(size) : size;
@@ -904,7 +899,6 @@ int drm_addbufs_pci(struct drm_device * dev, struct drm_buf_desc * request)
                        buf->next = NULL;
                        buf->waiting = 0;
                        buf->pending = 0;
-                        init_waitqueue_head(&buf->dma_wait);
                        buf->file_priv = NULL;
                        buf->dev_priv_size = dev->driver->dev_priv_size;
@@ -1019,8 +1013,6 @@ static int drm_addbufs_sg(struct drm_device * dev, struct drm_buf_desc * request
        if (order < DRM_MIN_ORDER || order > DRM_MAX_ORDER)
                return -EINVAL;
-        if (dev->queue_count)
-                return -EBUSY;  /* Not while in use */
        spin_lock(&dev->count_lock);
        if (dev->buf_use) {
@@ -1071,7 +1063,6 @@ static int drm_addbufs_sg(struct drm_device * dev, struct drm_buf_desc * request
                buf->next = NULL;
                buf->waiting = 0;
                buf->pending = 0;
-                init_waitqueue_head(&buf->dma_wait);
                buf->file_priv = NULL;
                buf->dev_priv_size = dev->driver->dev_priv_size;
@@ -1177,8 +1168,6 @@ static int drm_addbufs_fb(struct drm_device * dev, struct drm_buf_desc * request
        if (order < DRM_MIN_ORDER || order > DRM_MAX_ORDER)
                return -EINVAL;
-        if (dev->queue_count)
-                return -EBUSY;  /* Not while in use */
        spin_lock(&dev->count_lock);
        if (dev->buf_use) {
@@ -1228,7 +1217,6 @@ static int drm_addbufs_fb(struct drm_device * dev, struct drm_buf_desc * request
                buf->next = NULL;
                buf->waiting = 0;
                buf->pending = 0;
-                init_waitqueue_head(&buf->dma_wait);
                buf->file_priv = NULL;
                buf->dev_priv_size = dev->driver->dev_priv_size;
diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
index 08a7aa722d6b..6fbfc244748f 100644
--- a/drivers/gpu/drm/drm_crtc.c
+++ b/drivers/gpu/drm/drm_crtc.c
@@ -1981,7 +1981,7 @@ int drm_mode_cursor_ioctl(struct drm_device *dev,
        if (!drm_core_check_feature(dev, DRIVER_MODESET))
                return -EINVAL;
-        if (!req->flags)
+        if (!req->flags || (~DRM_MODE_CURSOR_FLAGS & req->flags))
                return -EINVAL;
        mutex_lock(&dev->mode_config.mutex);
diff --git a/drivers/gpu/drm/drm_debugfs.c b/drivers/gpu/drm/drm_debugfs.c
index 1c7a1c0d3edd..70b13fc19396 100644
--- a/drivers/gpu/drm/drm_debugfs.c
+++ b/drivers/gpu/drm/drm_debugfs.c
@@ -46,7 +46,6 @@ static struct drm_info_list drm_debugfs_list[] = {
        {"name", drm_name_info, 0},
        {"vm", drm_vm_info, 0},
        {"clients", drm_clients_info, 0},
-        {"queues", drm_queues_info, 0},
        {"bufs", drm_bufs_info, 0},
        {"gem_names", drm_gem_name_info, DRIVER_GEM},
 #if DRM_DEBUG_CODE
diff --git a/drivers/gpu/drm/drm_dma.c b/drivers/gpu/drm/drm_dma.c
index cfb4e333ec0f..08f5e5309b22 100644
--- a/drivers/gpu/drm/drm_dma.c
+++ b/drivers/gpu/drm/drm_dma.c
@@ -120,11 +120,6 @@ void drm_free_buffer(struct drm_device *dev, struct drm_buf * buf)
        buf->pending = 0;
        buf->file_priv = NULL;
        buf->used = 0;
-        if (drm_core_check_feature(dev, DRIVER_DMA_QUEUE)
-            && waitqueue_active(&buf->dma_wait)) {
-                wake_up_interruptible(&buf->dma_wait);
-        }
 }
 /**
diff --git a/drivers/gpu/drm/drm_drv.c b/drivers/gpu/drm/drm_drv.c
index 8a9d0792e4ec..9238de4009fa 100644
--- a/drivers/gpu/drm/drm_drv.c
+++ b/drivers/gpu/drm/drm_drv.c
@@ -182,7 +182,6 @@ static struct drm_ioctl_desc drm_ioctls[] = {
 int drm_lastclose(struct drm_device * dev)
 {
        struct drm_vma_entry *vma, *vma_temp;
-        int i;
        DRM_DEBUG("\n");
@@ -228,16 +227,6 @@ int drm_lastclose(struct drm_device * dev)
                kfree(vma);
        }
-        if (drm_core_check_feature(dev, DRIVER_DMA_QUEUE) && dev->queuelist) {
-                for (i = 0; i < dev->queue_count; i++) {
-                        kfree(dev->queuelist[i]);
-                        dev->queuelist[i] = NULL;
-                }
-                kfree(dev->queuelist);
-                dev->queuelist = NULL;
-        }
-        dev->queue_count = 0;
        if (drm_core_check_feature(dev, DRIVER_HAVE_DMA) &&
            !drm_core_check_feature(dev, DRIVER_MODESET))
                drm_dma_takedown(dev);
@@ -486,7 +475,7 @@ long drm_ioctl(struct file *filp,
                kfree(kdata);
        atomic_dec(&dev->ioctl_count);
        if (retcode)
-                DRM_DEBUG("ret = %x\n", retcode);
+                DRM_DEBUG("ret = %d\n", retcode);
        return retcode;
 }
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index eb92fe257a39..b7ee230572b7 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -87,6 +87,9 @@ static struct edid_quirk {
        int product_id;
        u32 quirks;
 } edid_quirk_list[] = {
+        /* ASUS VW222S */
+        { "ACI", 0x22a2, EDID_QUIRK_FORCE_REDUCED_BLANKING },
        /* Acer AL1706 */
        { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 },
        /* Acer F51 */
@@ -610,7 +613,7 @@ static bool
 drm_monitor_supports_rb(struct edid *edid)
 {
        if (edid->revision >= 4) {
-                bool ret;
+                bool ret = false;
                drm_for_each_detailed_block((u8 *)edid, is_rb, &ret);
                return ret;
        }
@@ -1039,6 +1042,24 @@ mode_in_range(const struct drm_display_mode *mode, struct edid *edid,
        return true;
 }
+static bool valid_inferred_mode(const struct drm_connector *connector,
+                                const struct drm_display_mode *mode)
+{
+        struct drm_display_mode *m;
+        bool ok = false;
+        list_for_each_entry(m, &connector->probed_modes, head) {
+                if (mode->hdisplay == m->hdisplay &&
+                    mode->vdisplay == m->vdisplay &&
+                    drm_mode_vrefresh(mode) == drm_mode_vrefresh(m))
+                        return false; /* duplicated */
+                if (mode->hdisplay <= m->hdisplay &&
+                    mode->vdisplay <= m->vdisplay)
+                        ok = true;
+        }
+        return ok;
+}
 static int
 drm_dmt_modes_for_range(struct drm_connector *connector, struct edid *edid,
                        struct detailed_timing *timing)
@@ -1048,7 +1069,8 @@ drm_dmt_modes_for_range(struct drm_connector *connector, struct edid *edid,
        struct drm_device *dev = connector->dev;
        for (i = 0; i < drm_num_dmt_modes; i++) {
-                if (mode_in_range(drm_dmt_modes + i, edid, timing)) {
+                if (mode_in_range(drm_dmt_modes + i, edid, timing) &&
+                    valid_inferred_mode(connector, drm_dmt_modes + i)) {
                        newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]);
                        if (newmode) {
                                drm_mode_probed_add(connector, newmode);
@@ -1088,7 +1110,8 @@ drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid,
                        return modes;
                fixup_mode_1366x768(newmode);
-                if (!mode_in_range(newmode, edid, timing)) {
+                if (!mode_in_range(newmode, edid, timing) ||
+                    !valid_inferred_mode(connector, newmode)) {
                        drm_mode_destroy(dev, newmode);
                        continue;
                }
@@ -1116,7 +1139,8 @@ drm_cvt_modes_for_range(struct drm_connector *connector, struct edid *edid,
                        return modes;
                fixup_mode_1366x768(newmode);
-                if (!mode_in_range(newmode, edid, timing)) {
+                if (!mode_in_range(newmode, edid, timing) ||
+                    !valid_inferred_mode(connector, newmode)) {
                        drm_mode_destroy(dev, newmode);
                        continue;
                }
diff --git a/drivers/gpu/drm/drm_edid_load.c b/drivers/gpu/drm/drm_edid_load.c
index 66d4a28ad5a2..0303935d10e2 100644
--- a/drivers/gpu/drm/drm_edid_load.c
+++ b/drivers/gpu/drm/drm_edid_load.c
@@ -119,7 +119,7 @@ static int edid_load(struct drm_connector *connector, char *name,
 {
        const struct firmware *fw;
        struct platform_device *pdev;
-        u8 *fwdata = NULL, *edid;
+        u8 *fwdata = NULL, *edid, *new_edid;
        int fwsize, expected;
        int builtin = 0, err = 0;
        int i, valid_extensions = 0;
@@ -195,12 +195,14 @@ static int edid_load(struct drm_connector *connector, char *name,
                    "\"%s\" for connector \"%s\"\n", valid_extensions,
                    edid[0x7e], name, connector_name);
                edid[0x7e] = valid_extensions;
-                edid = krealloc(edid, (valid_extensions + 1) * EDID_LENGTH,
+                new_edid = krealloc(edid, (valid_extensions + 1) * EDID_LENGTH,
                    GFP_KERNEL);
-                if (edid == NULL) {
+                if (new_edid == NULL) {
                        err = -ENOMEM;
+                        kfree(edid);
                        goto relfw_out;
                }
+                edid = new_edid;
        }
        connector->display_info.raw_edid = edid;
diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c
index 5683b7fdd746..f546d1e8af82 100644
--- a/drivers/gpu/drm/drm_fb_helper.c
+++ b/drivers/gpu/drm/drm_fb_helper.c
@@ -228,7 +228,7 @@ bool drm_fb_helper_restore_fbdev_mode(struct drm_fb_helper *fb_helper)
        int i, ret;
        for (i = 0; i < fb_helper->crtc_count; i++) {
                struct drm_mode_set *mode_set = &fb_helper->crtc_info[i].mode_set;
-                ret = drm_crtc_helper_set_config(mode_set);
+                ret = mode_set->crtc->funcs->set_config(mode_set);
                if (ret)
                        error = true;
        }
@@ -1353,7 +1353,7 @@ int drm_fb_helper_hotplug_event(struct drm_fb_helper *fb_helper)
        struct drm_device *dev = fb_helper->dev;
        int count = 0;
        u32 max_width, max_height, bpp_sel;
-        bool bound = false, crtcs_bound = false;
+        int bound = 0, crtcs_bound = 0;
        struct drm_crtc *crtc;
        if (!fb_helper->fb)
@@ -1362,12 +1362,12 @@ int drm_fb_helper_hotplug_event(struct drm_fb_helper *fb_helper)
        mutex_lock(&dev->mode_config.mutex);
        list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
                if (crtc->fb)
-                        crtcs_bound = true;
+                        crtcs_bound++;
                if (crtc->fb == fb_helper->fb)
-                        bound = true;
+                        bound++;
        }
-        if (!bound && crtcs_bound) {
+        if (bound < crtcs_bound) {
                fb_helper->delayed_hotplug = true;
                mutex_unlock(&dev->mode_config.mutex);
                return 0;
diff --git a/drivers/gpu/drm/drm_fops.c b/drivers/gpu/drm/drm_fops.c
index 123de28f94ef..5062eec673f1 100644
--- a/drivers/gpu/drm/drm_fops.c
+++ b/drivers/gpu/drm/drm_fops.c
@@ -75,10 +75,6 @@ static int drm_setup(struct drm_device * dev)
        dev->sigdata.lock = NULL;
-        dev->queue_count = 0;
-        dev->queue_reserved = 0;
-        dev->queue_slots = 0;
-        dev->queuelist = NULL;
        dev->context_flag = 0;
        dev->interrupt_flag = 0;
        dev->dma_flag = 0;
@@ -144,12 +140,12 @@ int drm_open(struct inode *inode, struct file *filp)
        }
        if (!retcode) {
                mutex_lock(&dev->struct_mutex);
-                if (minor->type == DRM_MINOR_LEGACY) {
+                if (dev->dev_mapping == NULL)
-                        if (dev->dev_mapping == NULL)
+                        dev->dev_mapping = &inode->i_data;
-                                dev->dev_mapping = inode->i_mapping;
+                /* ihold ensures nobody can remove inode with our i_data */
-                        else if (dev->dev_mapping != inode->i_mapping)
+                ihold(container_of(dev->dev_mapping, struct inode, i_data));
-                                retcode = -ENODEV;
+                inode->i_mapping = dev->dev_mapping;
-                }
+                filp->f_mapping = dev->dev_mapping;
                mutex_unlock(&dev->struct_mutex);
        }
@@ -370,72 +366,16 @@ int drm_fasync(int fd, struct file *filp, int on)
 }
 EXPORT_SYMBOL(drm_fasync);
-/*
- * Reclaim locked buffers; note that this may be a bad idea if the current
- * context doesn't have the hw lock...
- */
-static void drm_reclaim_locked_buffers(struct drm_device *dev, struct file *f)
-{
-        struct drm_file *file_priv = f->private_data;
-        if (drm_i_have_hw_lock(dev, file_priv)) {
-                dev->driver->reclaim_buffers_locked(dev, file_priv);
-        } else {
-                unsigned long _end = jiffies + 3 * DRM_HZ;
-                int locked = 0;
-                drm_idlelock_take(&file_priv->master->lock);
-                /*
-                 * Wait for a while.
-                 */
-                do {
-                        spin_lock_bh(&file_priv->master->lock.spinlock);
-                        locked = file_priv->master->lock.idle_has_lock;
-                        spin_unlock_bh(&file_priv->master->lock.spinlock);
-                        if (locked)
-                                break;
-                        schedule();
-                } while (!time_after_eq(jiffies, _end));
-                if (!locked) {
-                        DRM_ERROR("reclaim_buffers_locked() deadlock. Please rework this\n"
-                                  "\tdriver to use reclaim_buffers_idlelocked() instead.\n"
-                                  "\tI will go on reclaiming the buffers anyway.\n");
-                }
-                dev->driver->reclaim_buffers_locked(dev, file_priv);
-                drm_idlelock_release(&file_priv->master->lock);
-        }
-}
 static void drm_master_release(struct drm_device *dev, struct file *filp)
 {
        struct drm_file *file_priv = filp->private_data;
-        if (dev->driver->reclaim_buffers_locked &&
-            file_priv->master->lock.hw_lock)
-                drm_reclaim_locked_buffers(dev, filp);
-        if (dev->driver->reclaim_buffers_idlelocked &&
-            file_priv->master->lock.hw_lock) {
-                drm_idlelock_take(&file_priv->master->lock);
-                dev->driver->reclaim_buffers_idlelocked(dev, file_priv);
-                drm_idlelock_release(&file_priv->master->lock);
-        }
        if (drm_i_have_hw_lock(dev, file_priv)) {
                DRM_DEBUG("File %p released, freeing lock for context %d\n",
                          filp, _DRM_LOCKING_CONTEXT(file_priv->master->lock.hw_lock->lock));
                drm_lock_free(&file_priv->master->lock,
                              _DRM_LOCKING_CONTEXT(file_priv->master->lock.hw_lock->lock));
        }
-        if (drm_core_check_feature(dev, DRIVER_HAVE_DMA) &&
-            !dev->driver->reclaim_buffers_locked) {
-                dev->driver->reclaim_buffers(dev, file_priv);
-        }
 }
 static void drm_events_release(struct drm_file *file_priv)
@@ -505,6 +445,9 @@ int drm_release(struct inode *inode, struct file *filp)
        if (file_priv->minor->master)
                drm_master_release(dev, filp);
+        if (drm_core_check_feature(dev, DRIVER_HAVE_DMA))
+                drm_core_reclaim_buffers(dev, file_priv);
        drm_events_release(file_priv);
        if (dev->driver->driver_features & DRIVER_MODESET)
@@ -566,6 +509,9 @@ int drm_release(struct inode *inode, struct file *filp)
                }
        }
+        BUG_ON(dev->dev_mapping == NULL);
+        iput(container_of(dev->dev_mapping, struct inode, i_data));
        /* drop the reference held my the file priv */
        drm_master_put(&file_priv->master);
        file_priv->is_master = 0;
diff --git a/drivers/gpu/drm/drm_gem.c b/drivers/gpu/drm/drm_gem.c
index d58e69da1fb5..fbe0842038b5 100644
--- a/drivers/gpu/drm/drm_gem.c
+++ b/drivers/gpu/drm/drm_gem.c
@@ -354,7 +354,7 @@ drm_gem_create_mmap_offset(struct drm_gem_object *obj)
        /* Get a DRM GEM mmap offset allocated... */
        list->file_offset_node = drm_mm_search_free(&mm->offset_manager,
-                        obj->size / PAGE_SIZE, 0, 0);
+                        obj->size / PAGE_SIZE, 0, false);
        if (!list->file_offset_node) {
                DRM_ERROR("failed to allocate offset for bo %d\n", obj->name);
diff --git a/drivers/gpu/drm/drm_info.c b/drivers/gpu/drm/drm_info.c
index ab1162da70f8..8928edbb94c7 100644
--- a/drivers/gpu/drm/drm_info.c
+++ b/drivers/gpu/drm/drm_info.c
@@ -110,42 +110,6 @@ int drm_vm_info(struct seq_file *m, void *data)
 }
 /**
- * Called when "/proc/dri/.../queues" is read.
- */
-int drm_queues_info(struct seq_file *m, void *data)
-{
-        struct drm_info_node *node = (struct drm_info_node *) m->private;
-        struct drm_device *dev = node->minor->dev;
-        int i;
-        struct drm_queue *q;
-        mutex_lock(&dev->struct_mutex);
-        seq_printf(m, "  ctx/flags   use   fin"
-                   "   blk/rw/rwf  wait    flushed         queued"
-                   "      locks\n\n");
-        for (i = 0; i < dev->queue_count; i++) {
-                q = dev->queuelist[i];
-                atomic_inc(&q->use_count);
-                seq_printf(m,   "%5d/0x%03x %5d %5d"
-                           " %5d/%c%c/%c%c%c %5Zd\n",
-                           i,
-                           q->flags,
-                           atomic_read(&q->use_count),
-                           atomic_read(&q->finalization),
-                           atomic_read(&q->block_count),
-                           atomic_read(&q->block_read) ? 'r' : '-',
-                           atomic_read(&q->block_write) ? 'w' : '-',
-                           waitqueue_active(&q->read_queue) ? 'r' : '-',
-                           waitqueue_active(&q->write_queue) ? 'w' : '-',
-                           waitqueue_active(&q->flush_queue) ? 'f' : '-',
-                           DRM_BUFCOUNT(&q->waitlist));
-                atomic_dec(&q->use_count);
-        }
-        mutex_unlock(&dev->struct_mutex);
-        return 0;
-}
-/**
 * Called when "/proc/dri/.../bufs" is read.
 */
 int drm_bufs_info(struct seq_file *m, void *data)
@@ -235,7 +199,7 @@ int drm_clients_info(struct seq_file *m, void *data)
 }
-int drm_gem_one_name_info(int id, void *ptr, void *data)
+static int drm_gem_one_name_info(int id, void *ptr, void *data)
 {
        struct drm_gem_object *obj = ptr;
        struct seq_file *m = data;
diff --git a/drivers/gpu/drm/drm_irq.c b/drivers/gpu/drm/drm_irq.c
index c798eeae0a03..03f16f352fe2 100644
--- a/drivers/gpu/drm/drm_irq.c
+++ b/drivers/gpu/drm/drm_irq.c
@@ -974,7 +974,6 @@ EXPORT_SYMBOL(drm_vblank_off);
 * drm_vblank_pre_modeset - account for vblanks across mode sets
 * @dev: DRM device
 * @crtc: CRTC in question
- * @post: post or pre mode set?
 *
 * Account for vblank events across mode setting events, which will likely
 * reset the hardware frame counter.
@@ -1037,6 +1036,10 @@ int drm_modeset_ctl(struct drm_device *dev, void *data,
        if (!dev->num_crtcs)
                return 0;
+        /* KMS drivers handle this internally */
+        if (drm_core_check_feature(dev, DRIVER_MODESET))
+                return 0;
        crtc = modeset->crtc;
        if (crtc >= dev->num_crtcs)
                return -EINVAL;
diff --git a/drivers/gpu/drm/drm_lock.c b/drivers/gpu/drm/drm_lock.c
index 521152041691..32039553e172 100644
--- a/drivers/gpu/drm/drm_lock.c
+++ b/drivers/gpu/drm/drm_lock.c
@@ -70,10 +70,6 @@ int drm_lock(struct drm_device *dev, void *data, struct drm_file *file_priv)
                  lock->context, task_pid_nr(current),
                  master->lock.hw_lock->lock, lock->flags);
-        if (drm_core_check_feature(dev, DRIVER_DMA_QUEUE))
-                if (lock->context < 0)
-                        return -EINVAL;
        add_wait_queue(&master->lock.lock_queue, &entry);
        spin_lock_bh(&master->lock.spinlock);
        master->lock.user_waiters++;
diff --git a/drivers/gpu/drm/drm_mm.c b/drivers/gpu/drm/drm_mm.c
index 961fb54f4266..9bb82f7f0061 100644
--- a/drivers/gpu/drm/drm_mm.c
+++ b/drivers/gpu/drm/drm_mm.c
@@ -118,45 +118,53 @@ static inline unsigned long drm_mm_hole_node_end(struct drm_mm_node *hole_node)
 static void drm_mm_insert_helper(struct drm_mm_node *hole_node,
                                 struct drm_mm_node *node,
-                                 unsigned long size, unsigned alignment)
+                                 unsigned long size, unsigned alignment,
+                                 unsigned long color)
 {
        struct drm_mm *mm = hole_node->mm;
-        unsigned long tmp = 0, wasted = 0;
        unsigned long hole_start = drm_mm_hole_node_start(hole_node);
        unsigned long hole_end = drm_mm_hole_node_end(hole_node);
+        unsigned long adj_start = hole_start;
+        unsigned long adj_end = hole_end;
        BUG_ON(!hole_node->hole_follows || node->allocated);
-        if (alignment)
+        if (mm->color_adjust)
-                tmp = hole_start % alignment;
+                mm->color_adjust(hole_node, color, &adj_start, &adj_end);
-        if (!tmp) {
+        if (alignment) {
+                unsigned tmp = adj_start % alignment;
+                if (tmp)
+                        adj_start += alignment - tmp;
+        }
+        if (adj_start == hole_start) {
                hole_node->hole_follows = 0;
-                list_del_init(&hole_node->hole_stack);
+                list_del(&hole_node->hole_stack);
-        } else
+        }
-                wasted = alignment - tmp;
-        node->start = hole_start + wasted;
+        node->start = adj_start;
        node->size = size;
        node->mm = mm;
+        node->color = color;
        node->allocated = 1;
        INIT_LIST_HEAD(&node->hole_stack);
        list_add(&node->node_list, &hole_node->node_list);
-        BUG_ON(node->start + node->size > hole_end);
+        BUG_ON(node->start + node->size > adj_end);
+        node->hole_follows = 0;
        if (node->start + node->size < hole_end) {
                list_add(&node->hole_stack, &mm->hole_stack);
                node->hole_follows = 1;
-        } else {
-                node->hole_follows = 0;
        }
 }
 struct drm_mm_node *drm_mm_get_block_generic(struct drm_mm_node *hole_node,
                                             unsigned long size,
                                             unsigned alignment,
+                                             unsigned long color,
                                             int atomic)
 {
        struct drm_mm_node *node;
@@ -165,7 +173,7 @@ struct drm_mm_node *drm_mm_get_block_generic(struct drm_mm_node *hole_node,
        if (unlikely(node == NULL))
                return NULL;
-        drm_mm_insert_helper(hole_node, node, size, alignment);
+        drm_mm_insert_helper(hole_node, node, size, alignment, color);
        return node;
 }
@@ -181,11 +189,11 @@ int drm_mm_insert_node(struct drm_mm *mm, struct drm_mm_node *node,
 {
        struct drm_mm_node *hole_node;
-        hole_node = drm_mm_search_free(mm, size, alignment, 0);
+        hole_node = drm_mm_search_free(mm, size, alignment, false);
        if (!hole_node)
                return -ENOSPC;
-        drm_mm_insert_helper(hole_node, node, size, alignment);
+        drm_mm_insert_helper(hole_node, node, size, alignment, 0);
        return 0;
 }
@@ -194,50 +202,57 @@ EXPORT_SYMBOL(drm_mm_insert_node);
 static void drm_mm_insert_helper_range(struct drm_mm_node *hole_node,
                                       struct drm_mm_node *node,
                                       unsigned long size, unsigned alignment,
+                                       unsigned long color,
                                       unsigned long start, unsigned long end)
 {
        struct drm_mm *mm = hole_node->mm;
-        unsigned long tmp = 0, wasted = 0;
        unsigned long hole_start = drm_mm_hole_node_start(hole_node);
        unsigned long hole_end = drm_mm_hole_node_end(hole_node);
+        unsigned long adj_start = hole_start;
+        unsigned long adj_end = hole_end;
        BUG_ON(!hole_node->hole_follows || node->allocated);
-        if (hole_start < start)
+        if (mm->color_adjust)
-                wasted += start - hole_start;
+                mm->color_adjust(hole_node, color, &adj_start, &adj_end);
-        if (alignment)
-                tmp = (hole_start + wasted) % alignment;
-        if (tmp)
+        if (adj_start < start)
-                wasted += alignment - tmp;
+                adj_start = start;
+        if (alignment) {
+                unsigned tmp = adj_start % alignment;
+                if (tmp)
+                        adj_start += alignment - tmp;
+        }
-        if (!wasted) {
+        if (adj_start == hole_start) {
                hole_node->hole_follows = 0;
-                list_del_init(&hole_node->hole_stack);
+                list_del(&hole_node->hole_stack);
        }
-        node->start = hole_start + wasted;
+        node->start = adj_start;
        node->size = size;
        node->mm = mm;
+        node->color = color;
        node->allocated = 1;
        INIT_LIST_HEAD(&node->hole_stack);
        list_add(&node->node_list, &hole_node->node_list);
-        BUG_ON(node->start + node->size > hole_end);
+        BUG_ON(node->start + node->size > adj_end);
        BUG_ON(node->start + node->size > end);
+        node->hole_follows = 0;
        if (node->start + node->size < hole_end) {
                list_add(&node->hole_stack, &mm->hole_stack);
                node->hole_follows = 1;
-        } else {
-                node->hole_follows = 0;
        }
 }
 struct drm_mm_node *drm_mm_get_block_range_generic(struct drm_mm_node *hole_node,
                                                unsigned long size,
                                                unsigned alignment,
+                                                unsigned long color,
                                                unsigned long start,
                                                unsigned long end,
                                                int atomic)
@@ -248,7 +263,7 @@ struct drm_mm_node *drm_mm_get_block_range_generic(struct drm_mm_node *hole_node
        if (unlikely(node == NULL))
                return NULL;
-        drm_mm_insert_helper_range(hole_node, node, size, alignment,
+        drm_mm_insert_helper_range(hole_node, node, size, alignment, color,
                                   start, end);
        return node;
@@ -267,11 +282,11 @@ int drm_mm_insert_node_in_range(struct drm_mm *mm, struct drm_mm_node *node,
        struct drm_mm_node *hole_node;
        hole_node = drm_mm_search_free_in_range(mm, size, alignment,
-                                                start, end, 0);
+                                                start, end, false);
        if (!hole_node)
                return -ENOSPC;
-        drm_mm_insert_helper_range(hole_node, node, size, alignment,
+        drm_mm_insert_helper_range(hole_node, node, size, alignment, 0,
                                   start, end);
        return 0;
@@ -336,27 +351,23 @@ EXPORT_SYMBOL(drm_mm_put_block);
 static int check_free_hole(unsigned long start, unsigned long end,
                           unsigned long size, unsigned alignment)
 {
-        unsigned wasted = 0;
        if (end - start < size)
                return 0;
        if (alignment) {
                unsigned tmp = start % alignment;
                if (tmp)
-                        wasted = alignment - tmp;
+                        start += alignment - tmp;
-        }
-        if (end >= start + size + wasted) {
-                return 1;
        }
-        return 0;
+        return end >= start + size;
 }
-struct drm_mm_node *drm_mm_search_free(const struct drm_mm *mm,
+struct drm_mm_node *drm_mm_search_free_generic(const struct drm_mm *mm,
-                                       unsigned long size,
+                                               unsigned long size,
-                                       unsigned alignment, int best_match)
+                                               unsigned alignment,
+                                               unsigned long color,
+                                               bool best_match)
 {
        struct drm_mm_node *entry;
        struct drm_mm_node *best;
@@ -368,10 +379,17 @@ struct drm_mm_node *drm_mm_search_free(const struct drm_mm *mm,
        best_size = ~0UL;
        list_for_each_entry(entry, &mm->hole_stack, hole_stack) {
+                unsigned long adj_start = drm_mm_hole_node_start(entry);
+                unsigned long adj_end = drm_mm_hole_node_end(entry);
+                if (mm->color_adjust) {
+                        mm->color_adjust(entry, color, &adj_start, &adj_end);
+                        if (adj_end <= adj_start)
+                                continue;
+                }
                BUG_ON(!entry->hole_follows);
-                if (!check_free_hole(drm_mm_hole_node_start(entry),
+                if (!check_free_hole(adj_start, adj_end, size, alignment))
-                                     drm_mm_hole_node_end(entry),
-                                     size, alignment))
                        continue;
                if (!best_match)
@@ -385,14 +403,15 @@ struct drm_mm_node *drm_mm_search_free(const struct drm_mm *mm,
        return best;
 }
-EXPORT_SYMBOL(drm_mm_search_free);
+EXPORT_SYMBOL(drm_mm_search_free_generic);
-struct drm_mm_node *drm_mm_search_free_in_range(const struct drm_mm *mm,
+struct drm_mm_node *drm_mm_search_free_in_range_generic(const struct drm_mm *mm,
-                                                unsigned long size,
+                                                        unsigned long size,
-                                                unsigned alignment,
+                                                        unsigned alignment,
-                                                unsigned long start,
+                                                        unsigned long color,
-                                                unsigned long end,
+                                                        unsigned long start,
-                                                int best_match)
+                                                        unsigned long end,
+                                                        bool best_match)
 {
        struct drm_mm_node *entry;
        struct drm_mm_node *best;
@@ -410,6 +429,13 @@ struct drm_mm_node *drm_mm_search_free_in_range(const struct drm_mm *mm,
                        end : drm_mm_hole_node_end(entry);
                BUG_ON(!entry->hole_follows);
+                if (mm->color_adjust) {
+                        mm->color_adjust(entry, color, &adj_start, &adj_end);
+                        if (adj_end <= adj_start)
+                                continue;
+                }
                if (!check_free_hole(adj_start, adj_end, size, alignment))
                        continue;
@@ -424,7 +450,7 @@ struct drm_mm_node *drm_mm_search_free_in_range(const struct drm_mm *mm,
        return best;
 }
-EXPORT_SYMBOL(drm_mm_search_free_in_range);
+EXPORT_SYMBOL(drm_mm_search_free_in_range_generic);
 /**
 * Moves an allocation. To be used with embedded struct drm_mm_node.
@@ -437,6 +463,7 @@ void drm_mm_replace_node(struct drm_mm_node *old, struct drm_mm_node *new)
        new->mm = old->mm;
        new->start = old->start;
        new->size = old->size;
+        new->color = old->color;
        old->allocated = 0;
        new->allocated = 1;
@@ -452,9 +479,12 @@ EXPORT_SYMBOL(drm_mm_replace_node);
 * Warning: As long as the scan list is non-empty, no other operations than
 * adding/removing nodes to/from the scan list are allowed.
 */
-void drm_mm_init_scan(struct drm_mm *mm, unsigned long size,
+void drm_mm_init_scan(struct drm_mm *mm,
-                      unsigned alignment)
+                      unsigned long size,
+                      unsigned alignment,
+                      unsigned long color)
 {
+        mm->scan_color = color;
        mm->scan_alignment = alignment;
        mm->scan_size = size;
        mm->scanned_blocks = 0;
@@ -474,11 +504,14 @@ EXPORT_SYMBOL(drm_mm_init_scan);
 * Warning: As long as the scan list is non-empty, no other operations than
 * adding/removing nodes to/from the scan list are allowed.
 */
-void drm_mm_init_scan_with_range(struct drm_mm *mm, unsigned long size,
+void drm_mm_init_scan_with_range(struct drm_mm *mm,
+                                 unsigned long size,
                                 unsigned alignment,
+                                 unsigned long color,
                                 unsigned long start,
                                 unsigned long end)
 {
+        mm->scan_color = color;
        mm->scan_alignment = alignment;
        mm->scan_size = size;
        mm->scanned_blocks = 0;
@@ -522,17 +555,21 @@ int drm_mm_scan_add_block(struct drm_mm_node *node)
        hole_start = drm_mm_hole_node_start(prev_node);
        hole_end = drm_mm_hole_node_end(prev_node);
+        adj_start = hole_start;
+        adj_end = hole_end;
+        if (mm->color_adjust)
+                mm->color_adjust(prev_node, mm->scan_color, &adj_start, &adj_end);
        if (mm->scan_check_range) {
-                adj_start = hole_start < mm->scan_start ?
+                if (adj_start < mm->scan_start)
-                        mm->scan_start : hole_start;
+                        adj_start = mm->scan_start;
-                adj_end = hole_end > mm->scan_end ?
+                if (adj_end > mm->scan_end)
-                        mm->scan_end : hole_end;
+                        adj_end = mm->scan_end;
-        } else {
-                adj_start = hole_start;
-                adj_end = hole_end;
        }
-        if (check_free_hole(adj_start , adj_end,
+        if (check_free_hole(adj_start, adj_end,
                            mm->scan_size, mm->scan_alignment)) {
                mm->scan_hit_start = hole_start;
                mm->scan_hit_size = hole_end;
@@ -616,6 +653,8 @@ int drm_mm_init(struct drm_mm * mm, unsigned long start, unsigned long size)
        mm->head_node.size = start - mm->head_node.start;
        list_add_tail(&mm->head_node.hole_stack, &mm->hole_stack);
+        mm->color_adjust = NULL;
        return 0;
 }
 EXPORT_SYMBOL(drm_mm_init);
diff --git a/drivers/gpu/drm/drm_modes.c b/drivers/gpu/drm/drm_modes.c
index b7adb4a967fd..28637c181b15 100644
--- a/drivers/gpu/drm/drm_modes.c
+++ b/drivers/gpu/drm/drm_modes.c
@@ -706,9 +706,6 @@ void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags)
        p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal);
        p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay);
        p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal);
-        p->crtc_hadjusted = false;
-        p->crtc_vadjusted = false;
 }
 EXPORT_SYMBOL(drm_mode_set_crtcinfo);
diff --git a/drivers/gpu/drm/drm_pci.c b/drivers/gpu/drm/drm_pci.c
index 13f3d936472f..5320364582ce 100644
--- a/drivers/gpu/drm/drm_pci.c
+++ b/drivers/gpu/drm/drm_pci.c
@@ -465,3 +465,52 @@ void drm_pci_exit(struct drm_driver *driver, struct pci_driver *pdriver)
        DRM_INFO("Module unloaded\n");
 }
 EXPORT_SYMBOL(drm_pci_exit);
+int drm_pcie_get_speed_cap_mask(struct drm_device *dev, u32 *mask)
+{
+        struct pci_dev *root;
+        int pos;
+        u32 lnkcap, lnkcap2;
+        *mask = 0;
+        if (!dev->pdev)
+                return -EINVAL;
+        if (!pci_is_pcie(dev->pdev))
+                return -EINVAL;
+        root = dev->pdev->bus->self;
+        pos = pci_pcie_cap(root);
+        if (!pos)
+                return -EINVAL;
+        /* we've been informed via and serverworks don't make the cut */
+        if (root->vendor == PCI_VENDOR_ID_VIA ||
+            root->vendor == PCI_VENDOR_ID_SERVERWORKS)
+                return -EINVAL;
+        pci_read_config_dword(root, pos + PCI_EXP_LNKCAP, &lnkcap);
+        pci_read_config_dword(root, pos + PCI_EXP_LNKCAP2, &lnkcap2);
+        lnkcap &= PCI_EXP_LNKCAP_SLS;
+        lnkcap2 &= 0xfe;
+        if (lnkcap2) { /* PCIE GEN 3.0 */
+                if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_2_5GB)
+                        *mask |= DRM_PCIE_SPEED_25;
+                if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_5_0GB)
+                        *mask |= DRM_PCIE_SPEED_50;
+                if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_8_0GB)
+                        *mask |= DRM_PCIE_SPEED_80;
+        } else {
+                if (lnkcap & 1)
+                        *mask |= DRM_PCIE_SPEED_25;
+                if (lnkcap & 2)
+                        *mask |= DRM_PCIE_SPEED_50;
+        }
+        DRM_INFO("probing gen 2 caps for device %x:%x = %x/%x\n", root->vendor, root->device, lnkcap, lnkcap2);
+        return 0;
+}
+EXPORT_SYMBOL(drm_pcie_get_speed_cap_mask);
diff --git a/drivers/gpu/drm/drm_proc.c b/drivers/gpu/drm/drm_proc.c
index fff87221f9e9..da457b18eaaf 100644
--- a/drivers/gpu/drm/drm_proc.c
+++ b/drivers/gpu/drm/drm_proc.c
@@ -53,7 +53,6 @@ static struct drm_info_list drm_proc_list[] = {
        {"name", drm_name_info, 0},
        {"vm", drm_vm_info, 0},
        {"clients", drm_clients_info, 0},
-        {"queues", drm_queues_info, 0},
        {"bufs", drm_bufs_info, 0},
        {"gem_names", drm_gem_name_info, DRIVER_GEM},
 #if DRM_DEBUG_CODE
@@ -90,7 +89,7 @@ static const struct file_operations drm_proc_fops = {
 * Create a given set of proc files represented by an array of
 * gdm_proc_lists in the given root directory.
 */
-int drm_proc_create_files(struct drm_info_list *files, int count,
+static int drm_proc_create_files(struct drm_info_list *files, int count,
                          struct proc_dir_entry *root, struct drm_minor *minor)
 {
        struct drm_device *dev = minor->dev;
@@ -173,7 +172,7 @@ int drm_proc_init(struct drm_minor *minor, int minor_id,
        return 0;
 }
-int drm_proc_remove_files(struct drm_info_list *files, int count,
+static int drm_proc_remove_files(struct drm_info_list *files, int count,
                          struct drm_minor *minor)
 {
        struct list_head *pos, *q;
diff --git a/drivers/gpu/drm/drm_sysfs.c b/drivers/gpu/drm/drm_sysfs.c
index 45cf1dd3eb9c..45ac8d6c92b7 100644
--- a/drivers/gpu/drm/drm_sysfs.c
+++ b/drivers/gpu/drm/drm_sysfs.c
@@ -134,6 +134,7 @@ void drm_sysfs_destroy(void)
                return;
        class_remove_file(drm_class, &class_attr_version.attr);
        class_destroy(drm_class);
+        drm_class = NULL;
 }
 /**
@@ -554,6 +555,9 @@ void drm_sysfs_device_remove(struct drm_minor *minor)
 int drm_class_device_register(struct device *dev)
 {
+        if (!drm_class || IS_ERR(drm_class))
+                return -ENOENT;
        dev->class = drm_class;
        return device_register(dev);
 }
diff --git a/drivers/gpu/drm/exynos/exynos_drm_connector.c b/drivers/gpu/drm/exynos/exynos_drm_connector.c
index bf791fa0e50d..d9568198c300 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_connector.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_connector.c
@@ -196,7 +196,8 @@ static int exynos_drm_connector_mode_valid(struct drm_connector *connector,
        return ret;
 }
-struct drm_encoder *exynos_drm_best_encoder(struct drm_connector *connector)
+static struct drm_encoder *exynos_drm_best_encoder(
+                                                struct drm_connector *connector)
 {
        struct drm_device *dev = connector->dev;
        struct exynos_drm_connector *exynos_connector =
diff --git a/drivers/gpu/drm/exynos/exynos_drm_core.c b/drivers/gpu/drm/exynos/exynos_drm_core.c
index eaf630dc5dba..84dd099eae3b 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_core.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_core.c
@@ -33,7 +33,6 @@
 #include "exynos_drm_fbdev.h"
 static LIST_HEAD(exynos_drm_subdrv_list);
-static struct drm_device *drm_dev;
 static int exynos_drm_subdrv_probe(struct drm_device *dev,
                                        struct exynos_drm_subdrv *subdrv)
@@ -120,8 +119,6 @@ int exynos_drm_device_register(struct drm_device *dev)
        if (!dev)
                return -EINVAL;
-        drm_dev = dev;
        list_for_each_entry_safe(subdrv, n, &exynos_drm_subdrv_list, list) {
                subdrv->drm_dev = dev;
                err = exynos_drm_subdrv_probe(dev, subdrv);
@@ -149,8 +146,6 @@ int exynos_drm_device_unregister(struct drm_device *dev)
        list_for_each_entry(subdrv, &exynos_drm_subdrv_list, list)
                exynos_drm_subdrv_remove(dev, subdrv);
-        drm_dev = NULL;
        return 0;
 }
 EXPORT_SYMBOL_GPL(exynos_drm_device_unregister);
diff --git a/drivers/gpu/drm/exynos/exynos_drm_crtc.c b/drivers/gpu/drm/exynos/exynos_drm_crtc.c
index 4afb625128d7..abb1e2f8227f 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_crtc.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_crtc.c
@@ -29,21 +29,23 @@
 #include "drmP.h"
 #include "drm_crtc_helper.h"
-#include "exynos_drm_crtc.h"
 #include "exynos_drm_drv.h"
-#include "exynos_drm_fb.h"
 #include "exynos_drm_encoder.h"
-#include "exynos_drm_gem.h"
+#include "exynos_drm_plane.h"
 #define to_exynos_crtc(x)       container_of(x, struct exynos_drm_crtc,\
                                drm_crtc)
+enum exynos_crtc_mode {
+        CRTC_MODE_NORMAL,       /* normal mode */
+        CRTC_MODE_BLANK,        /* The private plane of crtc is blank */
+};
 /*
 * Exynos specific crtc structure.
 *
 * @drm_crtc: crtc object.
- * @overlay: contain information common to display controller and hdmi and
+ * @drm_plane: pointer of private plane object for this crtc
- *      contents of this overlay object would be copied to sub driver size.
 * @pipe: a crtc index created at load() with a new crtc object creation
 *      and the crtc object would be set to private->crtc array
 *      to get a crtc object corresponding to this pipe from private->crtc
@@ -52,115 +54,16 @@
 *      we can refer to the crtc to current hardware interrupt occured through
 *      this pipe value.
 * @dpms: store the crtc dpms value
+ * @mode: store the crtc mode value
 */
 struct exynos_drm_crtc {
        struct drm_crtc                 drm_crtc;
-        struct exynos_drm_overlay       overlay;
+        struct drm_plane                *plane;
        unsigned int                    pipe;
        unsigned int                    dpms;
+        enum exynos_crtc_mode           mode;
 };
-static void exynos_drm_crtc_apply(struct drm_crtc *crtc)
-{
-        struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
-        struct exynos_drm_overlay *overlay = &exynos_crtc->overlay;
-        exynos_drm_fn_encoder(crtc, overlay,
-                        exynos_drm_encoder_crtc_mode_set);
-        exynos_drm_fn_encoder(crtc, &exynos_crtc->pipe,
-                        exynos_drm_encoder_crtc_commit);
-}
-int exynos_drm_overlay_update(struct exynos_drm_overlay *overlay,
-                              struct drm_framebuffer *fb,
-                              struct drm_display_mode *mode,
-                              struct exynos_drm_crtc_pos *pos)
-{
-        struct exynos_drm_gem_buf *buffer;
-        unsigned int actual_w;
-        unsigned int actual_h;
-        int nr = exynos_drm_format_num_buffers(fb->pixel_format);
-        int i;
-        for (i = 0; i < nr; i++) {
-                buffer = exynos_drm_fb_buffer(fb, i);
-                if (!buffer) {
-                        DRM_LOG_KMS("buffer is null\n");
-                        return -EFAULT;
-                }
-                overlay->dma_addr[i] = buffer->dma_addr;
-                overlay->vaddr[i] = buffer->kvaddr;
-                DRM_DEBUG_KMS("buffer: %d, vaddr = 0x%lx, dma_addr = 0x%lx\n",
-                                i, (unsigned long)overlay->vaddr[i],
-                                (unsigned long)overlay->dma_addr[i]);
-        }
-        actual_w = min((mode->hdisplay - pos->crtc_x), pos->crtc_w);
-        actual_h = min((mode->vdisplay - pos->crtc_y), pos->crtc_h);
-        /* set drm framebuffer data. */
-        overlay->fb_x = pos->fb_x;
-        overlay->fb_y = pos->fb_y;
-        overlay->fb_width = fb->width;
-        overlay->fb_height = fb->height;
-        overlay->src_width = pos->src_w;
-        overlay->src_height = pos->src_h;
-        overlay->bpp = fb->bits_per_pixel;
-        overlay->pitch = fb->pitches[0];
-        overlay->pixel_format = fb->pixel_format;
-        /* set overlay range to be displayed. */
-        overlay->crtc_x = pos->crtc_x;
-        overlay->crtc_y = pos->crtc_y;
-        overlay->crtc_width = actual_w;
-        overlay->crtc_height = actual_h;
-        /* set drm mode data. */
-        overlay->mode_width = mode->hdisplay;
-        overlay->mode_height = mode->vdisplay;
-        overlay->refresh = mode->vrefresh;
-        overlay->scan_flag = mode->flags;
-        DRM_DEBUG_KMS("overlay : offset_x/y(%d,%d), width/height(%d,%d)",
-                        overlay->crtc_x, overlay->crtc_y,
-                        overlay->crtc_width, overlay->crtc_height);
-        return 0;
-}
-static int exynos_drm_crtc_update(struct drm_crtc *crtc)
-{
-        struct exynos_drm_crtc *exynos_crtc;
-        struct exynos_drm_overlay *overlay;
-        struct exynos_drm_crtc_pos pos;
-        struct drm_display_mode *mode = &crtc->mode;
-        struct drm_framebuffer *fb = crtc->fb;
-        if (!mode || !fb)
-                return -EINVAL;
-        exynos_crtc = to_exynos_crtc(crtc);
-        overlay = &exynos_crtc->overlay;
-        memset(&pos, 0, sizeof(struct exynos_drm_crtc_pos));
-        /* it means the offset of framebuffer to be displayed. */
-        pos.fb_x = crtc->x;
-        pos.fb_y = crtc->y;
-        /* OSD position to be displayed. */
-        pos.crtc_x = 0;
-        pos.crtc_y = 0;
-        pos.crtc_w = fb->width - crtc->x;
-        pos.crtc_h = fb->height - crtc->y;
-        pos.src_w = pos.crtc_w;
-        pos.src_h = pos.crtc_h;
-        return exynos_drm_overlay_update(overlay, crtc->fb, mode, &pos);
-}
 static void exynos_drm_crtc_dpms(struct drm_crtc *crtc, int mode)
 {
        struct drm_device *dev = crtc->dev;
@@ -175,23 +78,8 @@ static void exynos_drm_crtc_dpms(struct drm_crtc *crtc, int mode)
        mutex_lock(&dev->struct_mutex);
-        switch (mode) {
+        exynos_drm_fn_encoder(crtc, &mode, exynos_drm_encoder_crtc_dpms);
-        case DRM_MODE_DPMS_ON:
+        exynos_crtc->dpms = mode;
-                exynos_drm_fn_encoder(crtc, &mode,
-                                exynos_drm_encoder_crtc_dpms);
-                exynos_crtc->dpms = mode;
-                break;
-        case DRM_MODE_DPMS_STANDBY:
-        case DRM_MODE_DPMS_SUSPEND:
-        case DRM_MODE_DPMS_OFF:
-                exynos_drm_fn_encoder(crtc, &mode,
-                                exynos_drm_encoder_crtc_dpms);
-                exynos_crtc->dpms = mode;
-                break;
-        default:
-                DRM_ERROR("unspecified mode %d\n", mode);
-                break;
-        }
        mutex_unlock(&dev->struct_mutex);
 }
@@ -209,35 +97,13 @@ static void exynos_drm_crtc_commit(struct drm_crtc *crtc)
        DRM_DEBUG_KMS("%s\n", __FILE__);
-        /*
+        exynos_plane_commit(exynos_crtc->plane);
-         * when set_crtc is requested from user or at booting time,
+        exynos_plane_dpms(exynos_crtc->plane, DRM_MODE_DPMS_ON);
-         * crtc->commit would be called without dpms call so if dpms is
-         * no power on then crtc->dpms should be called
-         * with DRM_MODE_DPMS_ON for the hardware power to be on.
-         */
-        if (exynos_crtc->dpms != DRM_MODE_DPMS_ON) {
-                int mode = DRM_MODE_DPMS_ON;
-                /*
-                 * enable hardware(power on) to all encoders hdmi connected
-                 * to current crtc.
-                 */
-                exynos_drm_crtc_dpms(crtc, mode);
-                /*
-                 * enable dma to all encoders connected to current crtc and
-                 * lcd panel.
-                 */
-                exynos_drm_fn_encoder(crtc, &mode,
-                                        exynos_drm_encoder_dpms_from_crtc);
-        }
-        exynos_drm_fn_encoder(crtc, &exynos_crtc->pipe,
-                        exynos_drm_encoder_crtc_commit);
 }
 static bool
 exynos_drm_crtc_mode_fixup(struct drm_crtc *crtc,
-                            struct drm_display_mode *mode,
+                            const struct drm_display_mode *mode,
                            struct drm_display_mode *adjusted_mode)
 {
        DRM_DEBUG_KMS("%s\n", __FILE__);
@@ -251,31 +117,61 @@ exynos_drm_crtc_mode_set(struct drm_crtc *crtc, struct drm_display_mode *mode,
                          struct drm_display_mode *adjusted_mode, int x, int y,
                          struct drm_framebuffer *old_fb)
 {
+        struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
+        struct drm_plane *plane = exynos_crtc->plane;
+        unsigned int crtc_w;
+        unsigned int crtc_h;
+        int pipe = exynos_crtc->pipe;
+        int ret;
        DRM_DEBUG_KMS("%s\n", __FILE__);
+        exynos_drm_crtc_dpms(crtc, DRM_MODE_DPMS_ON);
        /*
         * copy the mode data adjusted by mode_fixup() into crtc->mode
         * so that hardware can be seet to proper mode.
         */
        memcpy(&crtc->mode, adjusted_mode, sizeof(*adjusted_mode));
-        return exynos_drm_crtc_update(crtc);
+        crtc_w = crtc->fb->width - x;
+        crtc_h = crtc->fb->height - y;
+        ret = exynos_plane_mode_set(plane, crtc, crtc->fb, 0, 0, crtc_w, crtc_h,
+                                    x, y, crtc_w, crtc_h);
+        if (ret)
+                return ret;
+        plane->crtc = crtc;
+        plane->fb = crtc->fb;
+        exynos_drm_fn_encoder(crtc, &pipe, exynos_drm_encoder_crtc_pipe);
+        return 0;
 }
 static int exynos_drm_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,
                                          struct drm_framebuffer *old_fb)
 {
+        struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
+        struct drm_plane *plane = exynos_crtc->plane;
+        unsigned int crtc_w;
+        unsigned int crtc_h;
        int ret;
        DRM_DEBUG_KMS("%s\n", __FILE__);
-        ret = exynos_drm_crtc_update(crtc);
+        crtc_w = crtc->fb->width - x;
+        crtc_h = crtc->fb->height - y;
+        ret = exynos_plane_mode_set(plane, crtc, crtc->fb, 0, 0, crtc_w, crtc_h,
+                                    x, y, crtc_w, crtc_h);
        if (ret)
                return ret;
-        exynos_drm_crtc_apply(crtc);
+        exynos_drm_crtc_commit(crtc);
-        return ret;
+        return 0;
 }
 static void exynos_drm_crtc_load_lut(struct drm_crtc *crtc)
@@ -284,6 +180,16 @@ static void exynos_drm_crtc_load_lut(struct drm_crtc *crtc)
        /* drm framework doesn't check NULL */
 }
+static void exynos_drm_crtc_disable(struct drm_crtc *crtc)
+{
+        struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
+        DRM_DEBUG_KMS("%s\n", __FILE__);
+        exynos_plane_dpms(exynos_crtc->plane, DRM_MODE_DPMS_OFF);
+        exynos_drm_crtc_dpms(crtc, DRM_MODE_DPMS_OFF);
+}
 static struct drm_crtc_helper_funcs exynos_crtc_helper_funcs = {
        .dpms           = exynos_drm_crtc_dpms,
        .prepare        = exynos_drm_crtc_prepare,
@@ -292,6 +198,7 @@ static struct drm_crtc_helper_funcs exynos_crtc_helper_funcs = {
        .mode_set       = exynos_drm_crtc_mode_set,
        .mode_set_base  = exynos_drm_crtc_mode_set_base,
        .load_lut       = exynos_drm_crtc_load_lut,
+        .disable        = exynos_drm_crtc_disable,
 };
 static int exynos_drm_crtc_page_flip(struct drm_crtc *crtc,
@@ -327,7 +234,8 @@ static int exynos_drm_crtc_page_flip(struct drm_crtc *crtc,
                                &dev_priv->pageflip_event_list);
                crtc->fb = fb;
-                ret = exynos_drm_crtc_update(crtc);
+                ret = exynos_drm_crtc_mode_set_base(crtc, crtc->x, crtc->y,
+                                                    NULL);
                if (ret) {
                        crtc->fb = old_fb;
                        drm_vblank_put(dev, exynos_crtc->pipe);
@@ -335,14 +243,6 @@ static int exynos_drm_crtc_page_flip(struct drm_crtc *crtc,
                        goto out;
                }
-                /*
-                 * the values related to a buffer of the drm framebuffer
-                 * to be applied should be set at here. because these values
-                 * first, are set to shadow registers and then to
-                 * real registers at vsync front porch period.
-                 */
-                exynos_drm_crtc_apply(crtc);
        }
 out:
        mutex_unlock(&dev->struct_mutex);
@@ -362,18 +262,73 @@ static void exynos_drm_crtc_destroy(struct drm_crtc *crtc)
        kfree(exynos_crtc);
 }
+static int exynos_drm_crtc_set_property(struct drm_crtc *crtc,
+                                        struct drm_property *property,
+                                        uint64_t val)
+{
+        struct drm_device *dev = crtc->dev;
+        struct exynos_drm_private *dev_priv = dev->dev_private;
+        struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
+        DRM_DEBUG_KMS("%s\n", __func__);
+        if (property == dev_priv->crtc_mode_property) {
+                enum exynos_crtc_mode mode = val;
+                if (mode == exynos_crtc->mode)
+                        return 0;
+                exynos_crtc->mode = mode;
+                switch (mode) {
+                case CRTC_MODE_NORMAL:
+                        exynos_drm_crtc_commit(crtc);
+                        break;
+                case CRTC_MODE_BLANK:
+                        exynos_plane_dpms(exynos_crtc->plane,
+                                          DRM_MODE_DPMS_OFF);
+                        break;
+                default:
+                        break;
+                }
+                return 0;
+        }
+        return -EINVAL;
+}
 static struct drm_crtc_funcs exynos_crtc_funcs = {
        .set_config     = drm_crtc_helper_set_config,
        .page_flip      = exynos_drm_crtc_page_flip,
        .destroy        = exynos_drm_crtc_destroy,
+        .set_property   = exynos_drm_crtc_set_property,
+};
+static const struct drm_prop_enum_list mode_names[] = {
+        { CRTC_MODE_NORMAL, "normal" },
+        { CRTC_MODE_BLANK, "blank" },
 };
-struct exynos_drm_overlay *get_exynos_drm_overlay(struct drm_device *dev,
+static void exynos_drm_crtc_attach_mode_property(struct drm_crtc *crtc)
-                struct drm_crtc *crtc)
 {
-        struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
+        struct drm_device *dev = crtc->dev;
+        struct exynos_drm_private *dev_priv = dev->dev_private;
+        struct drm_property *prop;
-        return &exynos_crtc->overlay;
+        DRM_DEBUG_KMS("%s\n", __func__);
+        prop = dev_priv->crtc_mode_property;
+        if (!prop) {
+                prop = drm_property_create_enum(dev, 0, "mode", mode_names,
+                                                ARRAY_SIZE(mode_names));
+                if (!prop)
+                        return;
+                dev_priv->crtc_mode_property = prop;
+        }
+        drm_object_attach_property(&crtc->base, prop, 0);
 }
 int exynos_drm_crtc_create(struct drm_device *dev, unsigned int nr)
@@ -392,7 +347,12 @@ int exynos_drm_crtc_create(struct drm_device *dev, unsigned int nr)
        exynos_crtc->pipe = nr;
        exynos_crtc->dpms = DRM_MODE_DPMS_OFF;
-        exynos_crtc->overlay.zpos = DEFAULT_ZPOS;
+        exynos_crtc->plane = exynos_plane_init(dev, 1 << nr, true);
+        if (!exynos_crtc->plane) {
+                kfree(exynos_crtc);
+                return -ENOMEM;
+        }
        crtc = &exynos_crtc->drm_crtc;
        private->crtc[nr] = crtc;
@@ -400,6 +360,8 @@ int exynos_drm_crtc_create(struct drm_device *dev, unsigned int nr)
        drm_crtc_init(dev, crtc, &exynos_crtc_funcs);
        drm_crtc_helper_add(crtc, &exynos_crtc_helper_funcs);
+        exynos_drm_crtc_attach_mode_property(crtc);
        return 0;
 }
diff --git a/drivers/gpu/drm/exynos/exynos_drm_crtc.h b/drivers/gpu/drm/exynos/exynos_drm_crtc.h
index 16b8e2195a0d..6bae8d8c250e 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_crtc.h
+++ b/drivers/gpu/drm/exynos/exynos_drm_crtc.h
@@ -29,39 +29,8 @@
 #ifndef _EXYNOS_DRM_CRTC_H_
 #define _EXYNOS_DRM_CRTC_H_
-struct exynos_drm_overlay *get_exynos_drm_overlay(struct drm_device *dev,
-                struct drm_crtc *crtc);
 int exynos_drm_crtc_create(struct drm_device *dev, unsigned int nr);
 int exynos_drm_crtc_enable_vblank(struct drm_device *dev, int crtc);
 void exynos_drm_crtc_disable_vblank(struct drm_device *dev, int crtc);
-/*
- * Exynos specific crtc postion structure.
- *
- * @fb_x: offset x on a framebuffer to be displyed
- *      - the unit is screen coordinates.
- * @fb_y: offset y on a framebuffer to be displayed
- *      - the unit is screen coordinates.
- * @src_w: width of source area to be displayed from a framebuffer.
- * @src_h: height of source area to be displayed from a framebuffer.
- * @crtc_x: offset x on hardware screen.
- * @crtc_y: offset y on hardware screen.
- * @crtc_w: width of hardware screen.
- * @crtc_h: height of hardware screen.
- */
-struct exynos_drm_crtc_pos {
-        unsigned int fb_x;
-        unsigned int fb_y;
-        unsigned int src_w;
-        unsigned int src_h;
-        unsigned int crtc_x;
-        unsigned int crtc_y;
-        unsigned int crtc_w;
-        unsigned int crtc_h;
-};
-int exynos_drm_overlay_update(struct exynos_drm_overlay *overlay,
-                              struct drm_framebuffer *fb,
-                              struct drm_display_mode *mode,
-                              struct exynos_drm_crtc_pos *pos);
 #endif
diff --git a/drivers/gpu/drm/exynos/exynos_drm_dmabuf.c b/drivers/gpu/drm/exynos/exynos_drm_dmabuf.c
index 274909271c36..613bf8a5d9b2 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_dmabuf.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_dmabuf.c
@@ -25,6 +25,7 @@
 #include "drmP.h"
 #include "drm.h"
+#include "exynos_drm.h"
 #include "exynos_drm_drv.h"
 #include "exynos_drm_gem.h"
@@ -86,6 +87,10 @@ static struct sg_table *
        npages = buf->size / buf->page_size;
        sgt = exynos_pages_to_sg(buf->pages, npages, buf->page_size);
+        if (!sgt) {
+                DRM_DEBUG_PRIME("exynos_pages_to_sg returned NULL!\n");
+                goto err_unlock;
+        }
        nents = dma_map_sg(attach->dev, sgt->sgl, sgt->nents, dir);
        DRM_DEBUG_PRIME("npages = %d buffer size = 0x%lx page_size = 0x%lx\n",
@@ -186,7 +191,7 @@ struct drm_gem_object *exynos_dmabuf_prime_import(struct drm_device *drm_dev,
        struct exynos_drm_gem_obj *exynos_gem_obj;
        struct exynos_drm_gem_buf *buffer;
        struct page *page;
-        int ret, i = 0;
+        int ret;
        DRM_DEBUG_PRIME("%s\n", __FILE__);
@@ -210,7 +215,7 @@ struct drm_gem_object *exynos_dmabuf_prime_import(struct drm_device *drm_dev,
        sgt = dma_buf_map_attachment(attach, DMA_BIDIRECTIONAL);
-        if (IS_ERR(sgt)) {
+        if (IS_ERR_OR_NULL(sgt)) {
                ret = PTR_ERR(sgt);
                goto err_buf_detach;
        }
@@ -236,13 +241,25 @@ struct drm_gem_object *exynos_dmabuf_prime_import(struct drm_device *drm_dev,
        }
        sgl = sgt->sgl;
-        buffer->dma_addr = sg_dma_address(sgl);
-        while (i < sgt->nents) {
+        if (sgt->nents == 1) {
-                buffer->pages[i] = sg_page(sgl);
+                buffer->dma_addr = sg_dma_address(sgt->sgl);
-                buffer->size += sg_dma_len(sgl);
+                buffer->size = sg_dma_len(sgt->sgl);
-                sgl = sg_next(sgl);
-                i++;
+                /* always physically continuous memory if sgt->nents is 1. */
+                exynos_gem_obj->flags |= EXYNOS_BO_CONTIG;
+        } else {
+                unsigned int i = 0;
+                buffer->dma_addr = sg_dma_address(sgl);
+                while (i < sgt->nents) {
+                        buffer->pages[i] = sg_page(sgl);
+                        buffer->size += sg_dma_len(sgl);
+                        sgl = sg_next(sgl);
+                        i++;
+                }
+                exynos_gem_obj->flags |= EXYNOS_BO_NONCONTIG;
        }
        exynos_gem_obj->buffer = buffer;
diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.c b/drivers/gpu/drm/exynos/exynos_drm_drv.c
index d6de2e07fa03..ebacec6f1e48 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_drv.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_drv.c
@@ -85,8 +85,11 @@ static int exynos_drm_load(struct drm_device *dev, unsigned long flags)
        }
        for (nr = 0; nr < MAX_PLANE; nr++) {
-                ret = exynos_plane_init(dev, nr);
+                struct drm_plane *plane;
-                if (ret)
+                unsigned int possible_crtcs = (1 << MAX_CRTC) - 1;
+                plane = exynos_plane_init(dev, possible_crtcs, false);
+                if (!plane)
                        goto err_crtc;
        }
@@ -221,8 +224,6 @@ static struct drm_ioctl_desc exynos_ioctls[] = {
                        exynos_drm_gem_mmap_ioctl, DRM_UNLOCKED | DRM_AUTH),
        DRM_IOCTL_DEF_DRV(EXYNOS_GEM_GET,
                        exynos_drm_gem_get_ioctl, DRM_UNLOCKED),
-        DRM_IOCTL_DEF_DRV(EXYNOS_PLANE_SET_ZPOS, exynos_plane_set_zpos_ioctl,
-                        DRM_UNLOCKED | DRM_AUTH),
        DRM_IOCTL_DEF_DRV(EXYNOS_VIDI_CONNECTION,
                        vidi_connection_ioctl, DRM_UNLOCKED | DRM_AUTH),
        DRM_IOCTL_DEF_DRV(EXYNOS_G2D_GET_VER,
diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.h b/drivers/gpu/drm/exynos/exynos_drm_drv.h
index c82c90c443e7..e22704b249d7 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_drv.h
+++ b/drivers/gpu/drm/exynos/exynos_drm_drv.h
@@ -59,12 +59,14 @@ enum exynos_drm_output_type {
 *
 * @mode_set: copy drm overlay info to hw specific overlay info.
 * @commit: apply hardware specific overlay data to registers.
+ * @enable: enable hardware specific overlay.
 * @disable: disable hardware specific overlay.
 */
 struct exynos_drm_overlay_ops {
        void (*mode_set)(struct device *subdrv_dev,
                         struct exynos_drm_overlay *overlay);
        void (*commit)(struct device *subdrv_dev, int zpos);
+        void (*enable)(struct device *subdrv_dev, int zpos);
        void (*disable)(struct device *subdrv_dev, int zpos);
 };
@@ -174,7 +176,7 @@ struct exynos_drm_manager_ops {
        void (*apply)(struct device *subdrv_dev);
        void (*mode_fixup)(struct device *subdrv_dev,
                                struct drm_connector *connector,
-                                struct drm_display_mode *mode,
+                                const struct drm_display_mode *mode,
                                struct drm_display_mode *adjusted_mode);
        void (*mode_set)(struct device *subdrv_dev, void *mode);
        void (*get_max_resol)(struct device *subdrv_dev, unsigned int *width,
@@ -235,6 +237,8 @@ struct exynos_drm_private {
         * this array is used to be aware of which crtc did it request vblank.
         */
        struct drm_crtc *crtc[MAX_CRTC];
+        struct drm_property *plane_zpos_property;
+        struct drm_property *crtc_mode_property;
 };
 /*
diff --git a/drivers/gpu/drm/exynos/exynos_drm_encoder.c b/drivers/gpu/drm/exynos/exynos_drm_encoder.c
index 23d5ad379f86..2c037cd7d2d4 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_encoder.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_encoder.c
@@ -30,7 +30,6 @@
 #include "drm_crtc_helper.h"
 #include "exynos_drm_drv.h"
-#include "exynos_drm_crtc.h"
 #include "exynos_drm_encoder.h"
 #define to_exynos_encoder(x)    container_of(x, struct exynos_drm_encoder,\
@@ -108,7 +107,7 @@ static void exynos_drm_encoder_dpms(struct drm_encoder *encoder, int mode)
 static bool
 exynos_drm_encoder_mode_fixup(struct drm_encoder *encoder,
-                               struct drm_display_mode *mode,
+                               const struct drm_display_mode *mode,
                               struct drm_display_mode *adjusted_mode)
 {
        struct drm_device *dev = encoder->dev;
@@ -136,21 +135,16 @@ static void exynos_drm_encoder_mode_set(struct drm_encoder *encoder,
        struct drm_connector *connector;
        struct exynos_drm_manager *manager = exynos_drm_get_manager(encoder);
        struct exynos_drm_manager_ops *manager_ops = manager->ops;
-        struct exynos_drm_overlay_ops *overlay_ops = manager->overlay_ops;
-        struct exynos_drm_overlay *overlay = get_exynos_drm_overlay(dev,
-                                                encoder->crtc);
        DRM_DEBUG_KMS("%s\n", __FILE__);
+        exynos_drm_encoder_dpms(encoder, DRM_MODE_DPMS_ON);
        list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
-                if (connector->encoder == encoder) {
+                if (connector->encoder == encoder)
                        if (manager_ops && manager_ops->mode_set)
                                manager_ops->mode_set(manager->dev,
                                                        adjusted_mode);
-                        if (overlay_ops && overlay_ops->mode_set)
-                                overlay_ops->mode_set(manager->dev, overlay);
-                }
        }
 }
@@ -310,8 +304,8 @@ void exynos_drm_enable_vblank(struct drm_encoder *encoder, void *data)
        struct exynos_drm_manager_ops *manager_ops = manager->ops;
        int crtc = *(int *)data;
-        if (manager->pipe == -1)
+        if (manager->pipe != crtc)
-                manager->pipe = crtc;
+                return;
        if (manager_ops->enable_vblank)
                manager_ops->enable_vblank(manager->dev);
@@ -324,34 +318,41 @@ void exynos_drm_disable_vblank(struct drm_encoder *encoder, void *data)
        struct exynos_drm_manager_ops *manager_ops = manager->ops;
        int crtc = *(int *)data;
-        if (manager->pipe == -1)
+        if (manager->pipe != crtc)
-                manager->pipe = crtc;
+                return;
        if (manager_ops->disable_vblank)
                manager_ops->disable_vblank(manager->dev);
 }
-void exynos_drm_encoder_crtc_plane_commit(struct drm_encoder *encoder,
+void exynos_drm_encoder_crtc_dpms(struct drm_encoder *encoder, void *data)
-                                          void *data)
 {
-        struct exynos_drm_manager *manager =
+        struct exynos_drm_encoder *exynos_encoder = to_exynos_encoder(encoder);
-                to_exynos_encoder(encoder)->manager;
+        struct exynos_drm_manager *manager = exynos_encoder->manager;
-        struct exynos_drm_overlay_ops *overlay_ops = manager->overlay_ops;
+        struct exynos_drm_manager_ops *manager_ops = manager->ops;
-        int zpos = DEFAULT_ZPOS;
+        int mode = *(int *)data;
-        if (data)
+        DRM_DEBUG_KMS("%s\n", __FILE__);
-                zpos = *(int *)data;
-        if (overlay_ops && overlay_ops->commit)
+        if (manager_ops && manager_ops->dpms)
-                overlay_ops->commit(manager->dev, zpos);
+                manager_ops->dpms(manager->dev, mode);
+        /*
+         * if this condition is ok then it means that the crtc is already
+         * detached from encoder and last function for detaching is properly
+         * done, so clear pipe from manager to prevent repeated call.
+         */
+        if (mode > DRM_MODE_DPMS_ON) {
+                if (!encoder->crtc)
+                        manager->pipe = -1;
+        }
 }
-void exynos_drm_encoder_crtc_commit(struct drm_encoder *encoder, void *data)
+void exynos_drm_encoder_crtc_pipe(struct drm_encoder *encoder, void *data)
 {
        struct exynos_drm_manager *manager =
                to_exynos_encoder(encoder)->manager;
-        int crtc = *(int *)data;
+        int pipe = *(int *)data;
-        int zpos = DEFAULT_ZPOS;
        DRM_DEBUG_KMS("%s\n", __FILE__);
@@ -359,76 +360,62 @@ void exynos_drm_encoder_crtc_commit(struct drm_encoder *encoder, void *data)
         * when crtc is detached from encoder, this pipe is used
         * to select manager operation
         */
-        manager->pipe = crtc;
+        manager->pipe = pipe;
-        exynos_drm_encoder_crtc_plane_commit(encoder, &zpos);
 }
-void exynos_drm_encoder_dpms_from_crtc(struct drm_encoder *encoder, void *data)
+void exynos_drm_encoder_plane_mode_set(struct drm_encoder *encoder, void *data)
 {
-        struct exynos_drm_encoder *exynos_encoder = to_exynos_encoder(encoder);
+        struct exynos_drm_manager *manager =
-        int mode = *(int *)data;
+                to_exynos_encoder(encoder)->manager;
+        struct exynos_drm_overlay_ops *overlay_ops = manager->overlay_ops;
+        struct exynos_drm_overlay *overlay = data;
        DRM_DEBUG_KMS("%s\n", __FILE__);
-        exynos_drm_encoder_dpms(encoder, mode);
+        if (overlay_ops && overlay_ops->mode_set)
+                overlay_ops->mode_set(manager->dev, overlay);
-        exynos_encoder->dpms = mode;
 }
-void exynos_drm_encoder_crtc_dpms(struct drm_encoder *encoder, void *data)
+void exynos_drm_encoder_plane_commit(struct drm_encoder *encoder, void *data)
 {
-        struct drm_device *dev = encoder->dev;
+        struct exynos_drm_manager *manager =
-        struct exynos_drm_encoder *exynos_encoder = to_exynos_encoder(encoder);
+                to_exynos_encoder(encoder)->manager;
-        struct exynos_drm_manager *manager = exynos_encoder->manager;
+        struct exynos_drm_overlay_ops *overlay_ops = manager->overlay_ops;
-        struct exynos_drm_manager_ops *manager_ops = manager->ops;
+        int zpos = DEFAULT_ZPOS;
-        struct drm_connector *connector;
-        int mode = *(int *)data;
        DRM_DEBUG_KMS("%s\n", __FILE__);
-        if (manager_ops && manager_ops->dpms)
+        if (data)
-                manager_ops->dpms(manager->dev, mode);
+                zpos = *(int *)data;
-        /*
-         * set current dpms mode to the connector connected to
-         * current encoder. connector->dpms would be checked
-         * at drm_helper_connector_dpms()
-         */
-        list_for_each_entry(connector, &dev->mode_config.connector_list, head)
-                if (connector->encoder == encoder)
-                        connector->dpms = mode;
-        /*
+        if (overlay_ops && overlay_ops->commit)
-         * if this condition is ok then it means that the crtc is already
+                overlay_ops->commit(manager->dev, zpos);
-         * detached from encoder and last function for detaching is properly
-         * done, so clear pipe from manager to prevent repeated call.
-         */
-        if (mode > DRM_MODE_DPMS_ON) {
-                if (!encoder->crtc)
-                        manager->pipe = -1;
-        }
 }
-void exynos_drm_encoder_crtc_mode_set(struct drm_encoder *encoder, void *data)
+void exynos_drm_encoder_plane_enable(struct drm_encoder *encoder, void *data)
 {
        struct exynos_drm_manager *manager =
                to_exynos_encoder(encoder)->manager;
        struct exynos_drm_overlay_ops *overlay_ops = manager->overlay_ops;
-        struct exynos_drm_overlay *overlay = data;
+        int zpos = DEFAULT_ZPOS;
-        if (overlay_ops && overlay_ops->mode_set)
+        DRM_DEBUG_KMS("%s\n", __FILE__);
-                overlay_ops->mode_set(manager->dev, overlay);
+        if (data)
+                zpos = *(int *)data;
+        if (overlay_ops && overlay_ops->enable)
+                overlay_ops->enable(manager->dev, zpos);
 }
-void exynos_drm_encoder_crtc_disable(struct drm_encoder *encoder, void *data)
+void exynos_drm_encoder_plane_disable(struct drm_encoder *encoder, void *data)
 {
        struct exynos_drm_manager *manager =
                to_exynos_encoder(encoder)->manager;
        struct exynos_drm_overlay_ops *overlay_ops = manager->overlay_ops;
        int zpos = DEFAULT_ZPOS;
-        DRM_DEBUG_KMS("\n");
+        DRM_DEBUG_KMS("%s\n", __FILE__);
        if (data)
                zpos = *(int *)data;
diff --git a/drivers/gpu/drm/exynos/exynos_drm_encoder.h b/drivers/gpu/drm/exynos/exynos_drm_encoder.h
index eb7d2316847e..6470d9ddf5a1 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_encoder.h
+++ b/drivers/gpu/drm/exynos/exynos_drm_encoder.h
@@ -40,13 +40,11 @@ void exynos_drm_fn_encoder(struct drm_crtc *crtc, void *data,
                            void (*fn)(struct drm_encoder *, void *));
 void exynos_drm_enable_vblank(struct drm_encoder *encoder, void *data);
 void exynos_drm_disable_vblank(struct drm_encoder *encoder, void *data);
-void exynos_drm_encoder_crtc_plane_commit(struct drm_encoder *encoder,
-                                          void *data);
-void exynos_drm_encoder_crtc_commit(struct drm_encoder *encoder, void *data);
-void exynos_drm_encoder_dpms_from_crtc(struct drm_encoder *encoder,
-                                        void *data);
 void exynos_drm_encoder_crtc_dpms(struct drm_encoder *encoder, void *data);
-void exynos_drm_encoder_crtc_mode_set(struct drm_encoder *encoder, void *data);
+void exynos_drm_encoder_crtc_pipe(struct drm_encoder *encoder, void *data);
-void exynos_drm_encoder_crtc_disable(struct drm_encoder *encoder, void *data);
+void exynos_drm_encoder_plane_mode_set(struct drm_encoder *encoder, void *data);
+void exynos_drm_encoder_plane_commit(struct drm_encoder *encoder, void *data);
+void exynos_drm_encoder_plane_enable(struct drm_encoder *encoder, void *data);
+void exynos_drm_encoder_plane_disable(struct drm_encoder *encoder, void *data);
 #endif
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
index 29fdbfeb43cb..a68d2b313f03 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
@@ -78,7 +78,6 @@ struct fimd_context {
        struct drm_crtc                 *crtc;
        struct clk                      *bus_clk;
        struct clk                      *lcd_clk;
-        struct resource                 *regs_res;
        void __iomem                    *regs;
        struct fimd_win_data            win_data[WINDOWS_NR];
        unsigned int                    clkdiv;
@@ -813,7 +812,7 @@ static int __devinit fimd_probe(struct platform_device *pdev)
                return -EINVAL;
        }
-        ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
+        ctx = devm_kzalloc(&pdev->dev, sizeof(*ctx), GFP_KERNEL);
        if (!ctx)
                return -ENOMEM;
@@ -838,33 +837,26 @@ static int __devinit fimd_probe(struct platform_device *pdev)
                goto err_clk;
        }
-        ctx->regs_res = request_mem_region(res->start, resource_size(res),
+        ctx->regs = devm_request_and_ioremap(&pdev->dev, res);
-                                           dev_name(dev));
-        if (!ctx->regs_res) {
-                dev_err(dev, "failed to claim register region\n");
-                ret = -ENOENT;
-                goto err_clk;
-        }
-        ctx->regs = ioremap(res->start, resource_size(res));
        if (!ctx->regs) {
                dev_err(dev, "failed to map registers\n");
                ret = -ENXIO;
-                goto err_req_region_io;
+                goto err_clk;
        }
        res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
        if (!res) {
                dev_err(dev, "irq request failed.\n");
-                goto err_req_region_irq;
+                goto err_clk;
        }
        ctx->irq = res->start;
-        ret = request_irq(ctx->irq, fimd_irq_handler, 0, "drm_fimd", ctx);
+        ret = devm_request_irq(&pdev->dev, ctx->irq, fimd_irq_handler,
-        if (ret < 0) {
+                                                        0, "drm_fimd", ctx);
+        if (ret) {
                dev_err(dev, "irq request failed.\n");
-                goto err_req_irq;
+                goto err_clk;
        }
        ctx->vidcon0 = pdata->vidcon0;
@@ -899,14 +891,6 @@ static int __devinit fimd_probe(struct platform_device *pdev)
        return 0;
-err_req_irq:
-err_req_region_irq:
-        iounmap(ctx->regs);
-err_req_region_io:
-        release_resource(ctx->regs_res);
-        kfree(ctx->regs_res);
 err_clk:
        clk_disable(ctx->lcd_clk);
        clk_put(ctx->lcd_clk);
@@ -916,7 +900,6 @@ err_bus_clk:
        clk_put(ctx->bus_clk);
 err_clk_get:
-        kfree(ctx);
        return ret;
 }
@@ -944,13 +927,6 @@ out:
        clk_put(ctx->lcd_clk);
        clk_put(ctx->bus_clk);
-        iounmap(ctx->regs);
-        release_resource(ctx->regs_res);
-        kfree(ctx->regs_res);
-        free_irq(ctx->irq, ctx);
-        kfree(ctx);
        return 0;
 }
diff --git a/drivers/gpu/drm/exynos/exynos_drm_gem.c b/drivers/gpu/drm/exynos/exynos_drm_gem.c
index 5c8b683029ea..f9efde40c097 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_gem.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_gem.c
@@ -99,25 +99,17 @@ out:
 struct page **exynos_gem_get_pages(struct drm_gem_object *obj,
                                                gfp_t gfpmask)
 {
-        struct inode *inode;
-        struct address_space *mapping;
        struct page *p, **pages;
        int i, npages;
-        /* This is the shared memory object that backs the GEM resource */
-        inode = obj->filp->f_path.dentry->d_inode;
-        mapping = inode->i_mapping;
        npages = obj->size >> PAGE_SHIFT;
        pages = drm_malloc_ab(npages, sizeof(struct page *));
        if (pages == NULL)
                return ERR_PTR(-ENOMEM);
-        gfpmask |= mapping_gfp_mask(mapping);
        for (i = 0; i < npages; i++) {
-                p = shmem_read_mapping_page_gfp(mapping, i, gfpmask);
+                p = alloc_page(gfpmask);
                if (IS_ERR(p))
                        goto fail;
                pages[i] = p;
@@ -126,31 +118,22 @@ struct page **exynos_gem_get_pages(struct drm_gem_object *obj,
        return pages;
 fail:
-        while (i--)
+        while (--i)
-                page_cache_release(pages[i]);
+                __free_page(pages[i]);
        drm_free_large(pages);
        return ERR_PTR(PTR_ERR(p));
 }
 static void exynos_gem_put_pages(struct drm_gem_object *obj,
-                                        struct page **pages,
+                                        struct page **pages)
-                                        bool dirty, bool accessed)
 {
-        int i, npages;
+        int npages;
        npages = obj->size >> PAGE_SHIFT;
-        for (i = 0; i < npages; i++) {
+        while (--npages >= 0)
-                if (dirty)
+                __free_page(pages[npages]);
-                        set_page_dirty(pages[i]);
-                if (accessed)
-                        mark_page_accessed(pages[i]);
-                /* Undo the reference we took when populating the table */
-                page_cache_release(pages[i]);
-        }
        drm_free_large(pages);
 }
@@ -189,7 +172,7 @@ static int exynos_drm_gem_get_pages(struct drm_gem_object *obj)
                return -EINVAL;
        }
-        pages = exynos_gem_get_pages(obj, GFP_KERNEL);
+        pages = exynos_gem_get_pages(obj, GFP_HIGHUSER_MOVABLE);
        if (IS_ERR(pages)) {
                DRM_ERROR("failed to get pages.\n");
                return PTR_ERR(pages);
@@ -230,7 +213,7 @@ err1:
        kfree(buf->sgt);
        buf->sgt = NULL;
 err:
-        exynos_gem_put_pages(obj, pages, true, false);
+        exynos_gem_put_pages(obj, pages);
        return ret;
 }
@@ -248,7 +231,7 @@ static void exynos_drm_gem_put_pages(struct drm_gem_object *obj)
        kfree(buf->sgt);
        buf->sgt = NULL;
-        exynos_gem_put_pages(obj, buf->pages, true, false);
+        exynos_gem_put_pages(obj, buf->pages);
        buf->pages = NULL;
        /* add some codes for UNCACHED type here. TODO */
@@ -291,11 +274,21 @@ void exynos_drm_gem_destroy(struct exynos_drm_gem_obj *exynos_gem_obj)
        if (!buf->pages)
                return;
+        /*
+         * do not release memory region from exporter.
+         *
+         * the region will be released by exporter
+         * once dmabuf's refcount becomes 0.
+         */
+        if (obj->import_attach)
+                goto out;
        if (exynos_gem_obj->flags & EXYNOS_BO_NONCONTIG)
                exynos_drm_gem_put_pages(obj);
        else
                exynos_drm_free_buf(obj->dev, exynos_gem_obj->flags, buf);
+out:
        exynos_drm_fini_buf(obj->dev, buf);
        exynos_gem_obj->buffer = NULL;
@@ -668,7 +661,7 @@ int exynos_drm_gem_dumb_create(struct drm_file *file_priv,
         *      with DRM_IOCTL_MODE_CREATE_DUMB command.
         */
-        args->pitch = args->width * args->bpp >> 3;
+        args->pitch = args->width * ((args->bpp + 7) / 8);
        args->size = PAGE_ALIGN(args->pitch * args->height);
        exynos_gem_obj = exynos_drm_gem_create(dev, args->flags, args->size);
diff --git a/drivers/gpu/drm/exynos/exynos_drm_gem.h b/drivers/gpu/drm/exynos/exynos_drm_gem.h
index 14d038b6cb02..085b2a5d5f70 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_gem.h
+++ b/drivers/gpu/drm/exynos/exynos_drm_gem.h
@@ -63,7 +63,8 @@ struct exynos_drm_gem_buf {
 *      by user request or at framebuffer creation.
 *      continuous memory region allocated by user request
 *      or at framebuffer creation.
- * @size: total memory size to physically non-continuous memory region.
+ * @size: size requested from user, in bytes and this size is aligned
+ *      in page unit.
 * @flags: indicate memory type to allocated buffer and cache attruibute.
 *
 * P.S. this object would be transfered to user as kms_bo.handle so
diff --git a/drivers/gpu/drm/exynos/exynos_drm_hdmi.c b/drivers/gpu/drm/exynos/exynos_drm_hdmi.c
index 5d9d2c2f8f3f..8ffcdf8b9e22 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_hdmi.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_hdmi.c
@@ -142,7 +142,7 @@ static void drm_hdmi_disable_vblank(struct device *subdrv_dev)
 static void drm_hdmi_mode_fixup(struct device *subdrv_dev,
                                struct drm_connector *connector,
-                                struct drm_display_mode *mode,
+                                const struct drm_display_mode *mode,
                                struct drm_display_mode *adjusted_mode)
 {
        struct drm_hdmi_context *ctx = to_context(subdrv_dev);
diff --git a/drivers/gpu/drm/exynos/exynos_drm_hdmi.h b/drivers/gpu/drm/exynos/exynos_drm_hdmi.h
index bd8126996e52..a91c42088e42 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_hdmi.h
+++ b/drivers/gpu/drm/exynos/exynos_drm_hdmi.h
@@ -51,7 +51,7 @@ struct exynos_hdmi_ops {
        /* manager */
        void (*mode_fixup)(void *ctx, struct drm_connector *connector,
-                                struct drm_display_mode *mode,
+                                const struct drm_display_mode *mode,
                                struct drm_display_mode *adjusted_mode);
        void (*mode_set)(void *ctx, void *mode);
        void (*get_max_resol)(void *ctx, unsigned int *width,
diff --git a/drivers/gpu/drm/exynos/exynos_drm_plane.c b/drivers/gpu/drm/exynos/exynos_drm_plane.c
index c4c6525d4653..b89829e5043a 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_plane.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_plane.c
@@ -12,9 +12,12 @@
 #include "drmP.h"
 #include "exynos_drm.h"
-#include "exynos_drm_crtc.h"
 #include "exynos_drm_drv.h"
 #include "exynos_drm_encoder.h"
+#include "exynos_drm_fb.h"
+#include "exynos_drm_gem.h"
+#define to_exynos_plane(x)      container_of(x, struct exynos_plane, base)
 struct exynos_plane {
        struct drm_plane                base;
@@ -30,6 +33,108 @@ static const uint32_t formats[] = {
        DRM_FORMAT_NV12MT,
 };
+int exynos_plane_mode_set(struct drm_plane *plane, struct drm_crtc *crtc,
+                          struct drm_framebuffer *fb, int crtc_x, int crtc_y,
+                          unsigned int crtc_w, unsigned int crtc_h,
+                          uint32_t src_x, uint32_t src_y,
+                          uint32_t src_w, uint32_t src_h)
+{
+        struct exynos_plane *exynos_plane = to_exynos_plane(plane);
+        struct exynos_drm_overlay *overlay = &exynos_plane->overlay;
+        unsigned int actual_w;
+        unsigned int actual_h;
+        int nr;
+        int i;
+        DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
+        nr = exynos_drm_format_num_buffers(fb->pixel_format);
+        for (i = 0; i < nr; i++) {
+                struct exynos_drm_gem_buf *buffer = exynos_drm_fb_buffer(fb, i);
+                if (!buffer) {
+                        DRM_LOG_KMS("buffer is null\n");
+                        return -EFAULT;
+                }
+                overlay->dma_addr[i] = buffer->dma_addr;
+                overlay->vaddr[i] = buffer->kvaddr;
+                DRM_DEBUG_KMS("buffer: %d, vaddr = 0x%lx, dma_addr = 0x%lx\n",
+                                i, (unsigned long)overlay->vaddr[i],
+                                (unsigned long)overlay->dma_addr[i]);
+        }
+        actual_w = min((unsigned)(crtc->mode.hdisplay - crtc_x), crtc_w);
+        actual_h = min((unsigned)(crtc->mode.vdisplay - crtc_y), crtc_h);
+        /* set drm framebuffer data. */
+        overlay->fb_x = src_x;
+        overlay->fb_y = src_y;
+        overlay->fb_width = fb->width;
+        overlay->fb_height = fb->height;
+        overlay->src_width = src_w;
+        overlay->src_height = src_h;
+        overlay->bpp = fb->bits_per_pixel;
+        overlay->pitch = fb->pitches[0];
+        overlay->pixel_format = fb->pixel_format;
+        /* set overlay range to be displayed. */
+        overlay->crtc_x = crtc_x;
+        overlay->crtc_y = crtc_y;
+        overlay->crtc_width = actual_w;
+        overlay->crtc_height = actual_h;
+        /* set drm mode data. */
+        overlay->mode_width = crtc->mode.hdisplay;
+        overlay->mode_height = crtc->mode.vdisplay;
+        overlay->refresh = crtc->mode.vrefresh;
+        overlay->scan_flag = crtc->mode.flags;
+        DRM_DEBUG_KMS("overlay : offset_x/y(%d,%d), width/height(%d,%d)",
+                        overlay->crtc_x, overlay->crtc_y,
+                        overlay->crtc_width, overlay->crtc_height);
+        exynos_drm_fn_encoder(crtc, overlay, exynos_drm_encoder_plane_mode_set);
+        return 0;
+}
+void exynos_plane_commit(struct drm_plane *plane)
+{
+        struct exynos_plane *exynos_plane = to_exynos_plane(plane);
+        struct exynos_drm_overlay *overlay = &exynos_plane->overlay;
+        exynos_drm_fn_encoder(plane->crtc, &overlay->zpos,
+                        exynos_drm_encoder_plane_commit);
+}
+void exynos_plane_dpms(struct drm_plane *plane, int mode)
+{
+        struct exynos_plane *exynos_plane = to_exynos_plane(plane);
+        struct exynos_drm_overlay *overlay = &exynos_plane->overlay;
+        DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
+        if (mode == DRM_MODE_DPMS_ON) {
+                if (exynos_plane->enabled)
+                        return;
+                exynos_drm_fn_encoder(plane->crtc, &overlay->zpos,
+                                exynos_drm_encoder_plane_enable);
+                exynos_plane->enabled = true;
+        } else {
+                if (!exynos_plane->enabled)
+                        return;
+                exynos_drm_fn_encoder(plane->crtc, &overlay->zpos,
+                                exynos_drm_encoder_plane_disable);
+                exynos_plane->enabled = false;
+        }
+}
 static int
 exynos_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
                     struct drm_framebuffer *fb, int crtc_x, int crtc_y,
@@ -37,64 +142,37 @@ exynos_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
                     uint32_t src_x, uint32_t src_y,
                     uint32_t src_w, uint32_t src_h)
 {
-        struct exynos_plane *exynos_plane =
-                container_of(plane, struct exynos_plane, base);
-        struct exynos_drm_overlay *overlay = &exynos_plane->overlay;
-        struct exynos_drm_crtc_pos pos;
        int ret;
        DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
-        memset(&pos, 0, sizeof(struct exynos_drm_crtc_pos));
+        ret = exynos_plane_mode_set(plane, crtc, fb, crtc_x, crtc_y,
-        pos.crtc_x = crtc_x;
+                        crtc_w, crtc_h, src_x >> 16, src_y >> 16,
-        pos.crtc_y = crtc_y;
+                        src_w >> 16, src_h >> 16);
-        pos.crtc_w = crtc_w;
-        pos.crtc_h = crtc_h;
-        /* considering 16.16 fixed point of source values */
-        pos.fb_x = src_x >> 16;
-        pos.fb_y = src_y >> 16;
-        pos.src_w = src_w >> 16;
-        pos.src_h = src_h >> 16;
-        ret = exynos_drm_overlay_update(overlay, fb, &crtc->mode, &pos);
        if (ret < 0)
                return ret;
-        exynos_drm_fn_encoder(crtc, overlay,
+        plane->crtc = crtc;
-                        exynos_drm_encoder_crtc_mode_set);
+        plane->fb = crtc->fb;
-        exynos_drm_fn_encoder(crtc, &overlay->zpos,
-                        exynos_drm_encoder_crtc_plane_commit);
-        exynos_plane->enabled = true;
+        exynos_plane_commit(plane);
+        exynos_plane_dpms(plane, DRM_MODE_DPMS_ON);
        return 0;
 }
 static int exynos_disable_plane(struct drm_plane *plane)
 {
-        struct exynos_plane *exynos_plane =
-                container_of(plane, struct exynos_plane, base);
-        struct exynos_drm_overlay *overlay = &exynos_plane->overlay;
        DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
-        if (!exynos_plane->enabled)
+        exynos_plane_dpms(plane, DRM_MODE_DPMS_OFF);
-                return 0;
-        exynos_drm_fn_encoder(plane->crtc, &overlay->zpos,
-                        exynos_drm_encoder_crtc_disable);
-        exynos_plane->enabled = false;
-        exynos_plane->overlay.zpos = DEFAULT_ZPOS;
        return 0;
 }
 static void exynos_plane_destroy(struct drm_plane *plane)
 {
-        struct exynos_plane *exynos_plane =
+        struct exynos_plane *exynos_plane = to_exynos_plane(plane);
-                container_of(plane, struct exynos_plane, base);
        DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
@@ -103,69 +181,79 @@ static void exynos_plane_destroy(struct drm_plane *plane)
        kfree(exynos_plane);
 }
+static int exynos_plane_set_property(struct drm_plane *plane,
+                                     struct drm_property *property,
+                                     uint64_t val)
+{
+        struct drm_device *dev = plane->dev;
+        struct exynos_plane *exynos_plane = to_exynos_plane(plane);
+        struct exynos_drm_private *dev_priv = dev->dev_private;
+        DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
+        if (property == dev_priv->plane_zpos_property) {
+                exynos_plane->overlay.zpos = val;
+                return 0;
+        }
+        return -EINVAL;
+}
 static struct drm_plane_funcs exynos_plane_funcs = {
        .update_plane   = exynos_update_plane,
        .disable_plane  = exynos_disable_plane,
        .destroy        = exynos_plane_destroy,
+        .set_property   = exynos_plane_set_property,
 };
-int exynos_plane_init(struct drm_device *dev, unsigned int nr)
+static void exynos_plane_attach_zpos_property(struct drm_plane *plane)
 {
-        struct exynos_plane *exynos_plane;
+        struct drm_device *dev = plane->dev;
-        uint32_t possible_crtcs;
+        struct exynos_drm_private *dev_priv = dev->dev_private;
+        struct drm_property *prop;
-        exynos_plane = kzalloc(sizeof(struct exynos_plane), GFP_KERNEL);
+        DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
-        if (!exynos_plane)
-                return -ENOMEM;
-        /* all CRTCs are available */
+        prop = dev_priv->plane_zpos_property;
-        possible_crtcs = (1 << MAX_CRTC) - 1;
+        if (!prop) {
+                prop = drm_property_create_range(dev, 0, "zpos", 0,
+                                                 MAX_PLANE - 1);
+                if (!prop)
+                        return;
-        exynos_plane->overlay.zpos = DEFAULT_ZPOS;
+                dev_priv->plane_zpos_property = prop;
+        }
-        return drm_plane_init(dev, &exynos_plane->base, possible_crtcs,
+        drm_object_attach_property(&plane->base, prop, 0);
-                              &exynos_plane_funcs, formats, ARRAY_SIZE(formats),
-                              false);
 }
-int exynos_plane_set_zpos_ioctl(struct drm_device *dev, void *data,
+struct drm_plane *exynos_plane_init(struct drm_device *dev,
-                                struct drm_file *file_priv)
+                                    unsigned int possible_crtcs, bool priv)
 {
-        struct drm_exynos_plane_set_zpos *zpos_req = data;
-        struct drm_mode_object *obj;
-        struct drm_plane *plane;
        struct exynos_plane *exynos_plane;
-        int ret = 0;
+        int err;
        DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
-        if (!drm_core_check_feature(dev, DRIVER_MODESET))
+        exynos_plane = kzalloc(sizeof(struct exynos_plane), GFP_KERNEL);
-                return -EINVAL;
+        if (!exynos_plane) {
+                DRM_ERROR("failed to allocate plane\n");
-        if (zpos_req->zpos < 0 || zpos_req->zpos >= MAX_PLANE) {
+                return NULL;
-                if (zpos_req->zpos != DEFAULT_ZPOS) {
-                        DRM_ERROR("zpos not within limits\n");
-                        return -EINVAL;
-                }
        }
-        mutex_lock(&dev->mode_config.mutex);
+        err = drm_plane_init(dev, &exynos_plane->base, possible_crtcs,
+                              &exynos_plane_funcs, formats, ARRAY_SIZE(formats),
-        obj = drm_mode_object_find(dev, zpos_req->plane_id,
+                              priv);
-                        DRM_MODE_OBJECT_PLANE);
+        if (err) {
-        if (!obj) {
+                DRM_ERROR("failed to initialize plane\n");
-                DRM_DEBUG_KMS("Unknown plane ID %d\n",
+                kfree(exynos_plane);
-                              zpos_req->plane_id);
+                return NULL;
-                ret = -EINVAL;
-                goto out;
        }
-        plane = obj_to_plane(obj);
+        if (priv)
-        exynos_plane = container_of(plane, struct exynos_plane, base);
+                exynos_plane->overlay.zpos = DEFAULT_ZPOS;
+        else
-        exynos_plane->overlay.zpos = zpos_req->zpos;
+                exynos_plane_attach_zpos_property(&exynos_plane->base);
-out:
+        return &exynos_plane->base;
-        mutex_unlock(&dev->mode_config.mutex);
-        return ret;
 }
diff --git a/drivers/gpu/drm/exynos/exynos_drm_plane.h b/drivers/gpu/drm/exynos/exynos_drm_plane.h
index 16b71f8217e7..88312458580d 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_plane.h
+++ b/drivers/gpu/drm/exynos/exynos_drm_plane.h
@@ -9,6 +9,12 @@
 *
 */
-int exynos_plane_init(struct drm_device *dev, unsigned int nr);
+int exynos_plane_mode_set(struct drm_plane *plane, struct drm_crtc *crtc,
-int exynos_plane_set_zpos_ioctl(struct drm_device *dev, void *data,
+                          struct drm_framebuffer *fb, int crtc_x, int crtc_y,
-                                struct drm_file *file_priv);
+                          unsigned int crtc_w, unsigned int crtc_h,
+                          uint32_t src_x, uint32_t src_y,
+                          uint32_t src_w, uint32_t src_h);
+void exynos_plane_commit(struct drm_plane *plane);
+void exynos_plane_dpms(struct drm_plane *plane, int mode);
+struct drm_plane *exynos_plane_init(struct drm_device *dev,
+                                    unsigned int possible_crtcs, bool priv);
diff --git a/drivers/gpu/drm/exynos/exynos_drm_vidi.c b/drivers/gpu/drm/exynos/exynos_drm_vidi.c
index 7b9c153dceb6..bb1550c4dd57 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_vidi.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_vidi.c
@@ -85,8 +85,6 @@ static const char fake_edid_info[] = {
        0x00, 0x00, 0x00, 0x06
 };
-static void vidi_fake_vblank_handler(struct work_struct *work);
 static bool vidi_display_is_connected(struct device *dev)
 {
        struct vidi_context *ctx = get_vidi_context(dev);
@@ -531,6 +529,16 @@ static int vidi_store_connection(struct device *dev,
        if (ctx->connected > 1)
                return -EINVAL;
+        /* use fake edid data for test. */
+        if (!ctx->raw_edid)
+                ctx->raw_edid = (struct edid *)fake_edid_info;
+        /* if raw_edid isn't same as fake data then it can't be tested. */
+        if (ctx->raw_edid != (struct edid *)fake_edid_info) {
+                DRM_DEBUG_KMS("edid data is not fake data.\n");
+                return -EINVAL;
+        }
        DRM_DEBUG_KMS("requested connection.\n");
        drm_helper_hpd_irq_event(ctx->subdrv.drm_dev);
@@ -549,6 +557,8 @@ int vidi_connection_ioctl(struct drm_device *drm_dev, void *data,
        struct exynos_drm_manager *manager;
        struct exynos_drm_display_ops *display_ops;
        struct drm_exynos_vidi_connection *vidi = data;
+        struct edid *raw_edid;
+        int edid_len;
        DRM_DEBUG_KMS("%s\n", __FILE__);
@@ -557,11 +567,6 @@ int vidi_connection_ioctl(struct drm_device *drm_dev, void *data,
                return -EINVAL;
        }
-        if (!vidi->edid) {
-                DRM_DEBUG_KMS("edid data is null.\n");
-                return -EINVAL;
-        }
        if (vidi->connection > 1) {
                DRM_DEBUG_KMS("connection should be 0 or 1.\n");
                return -EINVAL;
@@ -588,8 +593,30 @@ int vidi_connection_ioctl(struct drm_device *drm_dev, void *data,
                return -EINVAL;
        }
-        if (vidi->connection)
+        if (vidi->connection) {
-                ctx->raw_edid = (struct edid *)vidi->edid;
+                if (!vidi->edid) {
+                        DRM_DEBUG_KMS("edid data is null.\n");
+                        return -EINVAL;
+                }
+                raw_edid = (struct edid *)(uint32_t)vidi->edid;
+                edid_len = (1 + raw_edid->extensions) * EDID_LENGTH;
+                ctx->raw_edid = kzalloc(edid_len, GFP_KERNEL);
+                if (!ctx->raw_edid) {
+                        DRM_DEBUG_KMS("failed to allocate raw_edid.\n");
+                        return -ENOMEM;
+                }
+                memcpy(ctx->raw_edid, raw_edid, edid_len);
+        } else {
+                /*
+                 * with connection = 0, free raw_edid
+                 * only if raw edid data isn't same as fake data.
+                 */
+                if (ctx->raw_edid && ctx->raw_edid !=
+                                (struct edid *)fake_edid_info) {
+                        kfree(ctx->raw_edid);
+                        ctx->raw_edid = NULL;
+                }
+        }
        ctx->connected = vidi->connection;
        drm_helper_hpd_irq_event(ctx->subdrv.drm_dev);
@@ -614,9 +641,6 @@ static int __devinit vidi_probe(struct platform_device *pdev)
        INIT_WORK(&ctx->work, vidi_fake_vblank_handler);
-        /* for test */
-        ctx->raw_edid = (struct edid *)fake_edid_info;
        subdrv = &ctx->subdrv;
        subdrv->dev = dev;
        subdrv->manager = &vidi_manager;
@@ -644,6 +668,11 @@ static int __devexit vidi_remove(struct platform_device *pdev)
        exynos_drm_subdrv_unregister(&ctx->subdrv);
+        if (ctx->raw_edid != (struct edid *)fake_edid_info) {
+                kfree(ctx->raw_edid);
+                ctx->raw_edid = NULL;
+        }
        kfree(ctx);
        return 0;
diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c b/drivers/gpu/drm/exynos/exynos_hdmi.c
index a137e9e39a33..409e2ec1207c 100644
--- a/drivers/gpu/drm/exynos/exynos_hdmi.c
+++ b/drivers/gpu/drm/exynos/exynos_hdmi.c
@@ -63,7 +63,6 @@ struct hdmi_context {
        bool                            dvi_mode;
        struct mutex                    hdmi_mutex;
-        struct resource                 *regs_res;
        void __iomem                    *regs;
        unsigned int                    external_irq;
        unsigned int                    internal_irq;
@@ -1940,7 +1939,7 @@ static void hdmi_conf_apply(struct hdmi_context *hdata)
 }
 static void hdmi_mode_fixup(void *ctx, struct drm_connector *connector,
-                                struct drm_display_mode *mode,
+                                const struct drm_display_mode *mode,
                                struct drm_display_mode *adjusted_mode)
 {
        struct drm_display_mode *m;
@@ -2280,16 +2279,17 @@ static int __devinit hdmi_probe(struct platform_device *pdev)
                return -EINVAL;
        }
-        drm_hdmi_ctx = kzalloc(sizeof(*drm_hdmi_ctx), GFP_KERNEL);
+        drm_hdmi_ctx = devm_kzalloc(&pdev->dev, sizeof(*drm_hdmi_ctx),
+                                                                GFP_KERNEL);
        if (!drm_hdmi_ctx) {
                DRM_ERROR("failed to allocate common hdmi context.\n");
                return -ENOMEM;
        }
-        hdata = kzalloc(sizeof(struct hdmi_context), GFP_KERNEL);
+        hdata = devm_kzalloc(&pdev->dev, sizeof(struct hdmi_context),
+                                                                GFP_KERNEL);
        if (!hdata) {
                DRM_ERROR("out of memory\n");
-                kfree(drm_hdmi_ctx);
                return -ENOMEM;
        }
@@ -2318,26 +2318,18 @@ static int __devinit hdmi_probe(struct platform_device *pdev)
                goto err_resource;
        }
-        hdata->regs_res = request_mem_region(res->start, resource_size(res),
+        hdata->regs = devm_request_and_ioremap(&pdev->dev, res);
-                                           dev_name(dev));
-        if (!hdata->regs_res) {
-                DRM_ERROR("failed to claim register region\n");
-                ret = -ENOENT;
-                goto err_resource;
-        }
-        hdata->regs = ioremap(res->start, resource_size(res));
        if (!hdata->regs) {
                DRM_ERROR("failed to map registers\n");
                ret = -ENXIO;
-                goto err_req_region;
+                goto err_resource;
        }
        /* DDC i2c driver */
        if (i2c_add_driver(&ddc_driver)) {
                DRM_ERROR("failed to register ddc i2c driver\n");
                ret = -ENOENT;
-                goto err_iomap;
+                goto err_resource;
        }
        hdata->ddc_port = hdmi_ddc;
@@ -2398,16 +2390,9 @@ err_hdmiphy:
        i2c_del_driver(&hdmiphy_driver);
 err_ddc:
        i2c_del_driver(&ddc_driver);
-err_iomap:
-        iounmap(hdata->regs);
-err_req_region:
-        release_mem_region(hdata->regs_res->start,
-                        resource_size(hdata->regs_res));
 err_resource:
        hdmi_resources_cleanup(hdata);
 err_data:
-        kfree(hdata);
-        kfree(drm_hdmi_ctx);
        return ret;
 }
@@ -2425,18 +2410,11 @@ static int __devexit hdmi_remove(struct platform_device *pdev)
        hdmi_resources_cleanup(hdata);
-        iounmap(hdata->regs);
-        release_mem_region(hdata->regs_res->start,
-                        resource_size(hdata->regs_res));
        /* hdmiphy i2c driver */
        i2c_del_driver(&hdmiphy_driver);
        /* DDC i2c driver */
        i2c_del_driver(&ddc_driver);
-        kfree(hdata);
        return 0;
 }
diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c b/drivers/gpu/drm/exynos/exynos_mixer.c
index e2147a2ddcec..30fcc12f81dd 100644
--- a/drivers/gpu/drm/exynos/exynos_mixer.c
+++ b/drivers/gpu/drm/exynos/exynos_mixer.c
@@ -956,7 +956,8 @@ static int __devinit mixer_resources_init(struct exynos_drm_hdmi_context *ctx,
        clk_set_parent(mixer_res->sclk_mixer, mixer_res->sclk_hdmi);
-        mixer_res->mixer_regs = ioremap(res->start, resource_size(res));
+        mixer_res->mixer_regs = devm_ioremap(&pdev->dev, res->start,
+                                                        resource_size(res));
        if (mixer_res->mixer_regs == NULL) {
                dev_err(dev, "register mapping failed.\n");
                ret = -ENXIO;
@@ -967,38 +968,34 @@ static int __devinit mixer_resources_init(struct exynos_drm_hdmi_context *ctx,
        if (res == NULL) {
                dev_err(dev, "get memory resource failed.\n");
                ret = -ENXIO;
-                goto fail_mixer_regs;
+                goto fail;
        }
-        mixer_res->vp_regs = ioremap(res->start, resource_size(res));
+        mixer_res->vp_regs = devm_ioremap(&pdev->dev, res->start,
+                                                        resource_size(res));
        if (mixer_res->vp_regs == NULL) {
                dev_err(dev, "register mapping failed.\n");
                ret = -ENXIO;
-                goto fail_mixer_regs;
+                goto fail;
        }
        res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, "irq");
        if (res == NULL) {
                dev_err(dev, "get interrupt resource failed.\n");
                ret = -ENXIO;
-                goto fail_vp_regs;
+                goto fail;
        }
-        ret = request_irq(res->start, mixer_irq_handler, 0, "drm_mixer", ctx);
+        ret = devm_request_irq(&pdev->dev, res->start, mixer_irq_handler,
+                                                        0, "drm_mixer", ctx);
        if (ret) {
                dev_err(dev, "request interrupt failed.\n");
-                goto fail_vp_regs;
+                goto fail;
        }
        mixer_res->irq = res->start;
        return 0;
-fail_vp_regs:
-        iounmap(mixer_res->vp_regs);
-fail_mixer_regs:
-        iounmap(mixer_res->mixer_regs);
 fail:
        if (!IS_ERR_OR_NULL(mixer_res->sclk_dac))
                clk_put(mixer_res->sclk_dac);
@@ -1013,16 +1010,6 @@ fail:
        return ret;
 }
-static void mixer_resources_cleanup(struct mixer_context *ctx)
-{
-        struct mixer_resources *res = &ctx->mixer_res;
-        free_irq(res->irq, ctx);
-        iounmap(res->vp_regs);
-        iounmap(res->mixer_regs);
-}
 static int __devinit mixer_probe(struct platform_device *pdev)
 {
        struct device *dev = &pdev->dev;
@@ -1032,16 +1019,16 @@ static int __devinit mixer_probe(struct platform_device *pdev)
        dev_info(dev, "probe start\n");
-        drm_hdmi_ctx = kzalloc(sizeof(*drm_hdmi_ctx), GFP_KERNEL);
+        drm_hdmi_ctx = devm_kzalloc(&pdev->dev, sizeof(*drm_hdmi_ctx),
+                                                                GFP_KERNEL);
        if (!drm_hdmi_ctx) {
                DRM_ERROR("failed to allocate common hdmi context.\n");
                return -ENOMEM;
        }
-        ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
+        ctx = devm_kzalloc(&pdev->dev, sizeof(*ctx), GFP_KERNEL);
        if (!ctx) {
                DRM_ERROR("failed to alloc mixer context.\n");
-                kfree(drm_hdmi_ctx);
                return -ENOMEM;
        }
@@ -1072,17 +1059,10 @@ fail:
 static int mixer_remove(struct platform_device *pdev)
 {
-        struct device *dev = &pdev->dev;
+        dev_info(&pdev->dev, "remove successful\n");
-        struct exynos_drm_hdmi_context *drm_hdmi_ctx =
-                                        platform_get_drvdata(pdev);
-        struct mixer_context *ctx = drm_hdmi_ctx->ctx;
-        dev_info(dev, "remove successful\n");
        pm_runtime_disable(&pdev->dev);
-        mixer_resources_cleanup(ctx);
        return 0;
 }
diff --git a/drivers/gpu/drm/gma500/cdv_device.c b/drivers/gpu/drm/gma500/cdv_device.c
index 9764045428ce..b7e7b49d8f62 100644
--- a/drivers/gpu/drm/gma500/cdv_device.c
+++ b/drivers/gpu/drm/gma500/cdv_device.c
@@ -78,21 +78,6 @@ static int cdv_backlight_combination_mode(struct drm_device *dev)
        return REG_READ(BLC_PWM_CTL2) & PWM_LEGACY_MODE;
 }
-static int cdv_get_brightness(struct backlight_device *bd)
-{
-        struct drm_device *dev = bl_get_data(bd);
-        u32 val = REG_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
-        if (cdv_backlight_combination_mode(dev)) {
-                u8 lbpc;
-                val &= ~1;
-                pci_read_config_byte(dev->pdev, 0xF4, &lbpc);
-                val *= lbpc;
-        }
-        return val;
-}
 static u32 cdv_get_max_backlight(struct drm_device *dev)
 {
        u32 max = REG_READ(BLC_PWM_CTL);
@@ -110,6 +95,22 @@ static u32 cdv_get_max_backlight(struct drm_device *dev)
        return max;
 }
+static int cdv_get_brightness(struct backlight_device *bd)
+{
+        struct drm_device *dev = bl_get_data(bd);
+        u32 val = REG_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
+        if (cdv_backlight_combination_mode(dev)) {
+                u8 lbpc;
+                val &= ~1;
+                pci_read_config_byte(dev->pdev, 0xF4, &lbpc);
+                val *= lbpc;
+        }
+        return (val * 100)/cdv_get_max_backlight(dev);
+}
 static int cdv_set_brightness(struct backlight_device *bd)
 {
        struct drm_device *dev = bl_get_data(bd);
@@ -120,6 +121,9 @@ static int cdv_set_brightness(struct backlight_device *bd)
        if (level < 1)
                level = 1;
+        level *= cdv_get_max_backlight(dev);
+        level /= 100;
        if (cdv_backlight_combination_mode(dev)) {
                u32 max = cdv_get_max_backlight(dev);
                u8 lbpc;
@@ -157,7 +161,6 @@ static int cdv_backlight_init(struct drm_device *dev)
        cdv_backlight_device->props.brightness =
                        cdv_get_brightness(cdv_backlight_device);
-        cdv_backlight_device->props.max_brightness = cdv_get_max_backlight(dev);
        backlight_update_status(cdv_backlight_device);
        dev_priv->backlight_device = cdv_backlight_device;
        return 0;
diff --git a/drivers/gpu/drm/gma500/cdv_intel_crt.c b/drivers/gpu/drm/gma500/cdv_intel_crt.c
index 187422018601..8c175345d85c 100644
--- a/drivers/gpu/drm/gma500/cdv_intel_crt.c
+++ b/drivers/gpu/drm/gma500/cdv_intel_crt.c
@@ -82,7 +82,7 @@ static int cdv_intel_crt_mode_valid(struct drm_connector *connector,
 }
 static bool cdv_intel_crt_mode_fixup(struct drm_encoder *encoder,
-                                 struct drm_display_mode *mode,
+                                 const struct drm_display_mode *mode,
                                 struct drm_display_mode *adjusted_mode)
 {
        return true;
diff --git a/drivers/gpu/drm/gma500/cdv_intel_display.c b/drivers/gpu/drm/gma500/cdv_intel_display.c
index c3e9a0f701df..a68509ba22a8 100644
--- a/drivers/gpu/drm/gma500/cdv_intel_display.c
+++ b/drivers/gpu/drm/gma500/cdv_intel_display.c
@@ -913,7 +913,7 @@ static void cdv_intel_crtc_commit(struct drm_crtc *crtc)
 }
 static bool cdv_intel_crtc_mode_fixup(struct drm_crtc *crtc,
-                                  struct drm_display_mode *mode,
+                                  const struct drm_display_mode *mode,
                                  struct drm_display_mode *adjusted_mode)
 {
        return true;
diff --git a/drivers/gpu/drm/gma500/cdv_intel_hdmi.c b/drivers/gpu/drm/gma500/cdv_intel_hdmi.c
index 88b59d4a7b7f..a86f87b9ddde 100644
--- a/drivers/gpu/drm/gma500/cdv_intel_hdmi.c
+++ b/drivers/gpu/drm/gma500/cdv_intel_hdmi.c
@@ -90,7 +90,7 @@ static void cdv_hdmi_mode_set(struct drm_encoder *encoder,
 }
 static bool cdv_hdmi_mode_fixup(struct drm_encoder *encoder,
-                                  struct drm_display_mode *mode,
+                                  const struct drm_display_mode *mode,
                                  struct drm_display_mode *adjusted_mode)
 {
        return true;
diff --git a/drivers/gpu/drm/gma500/cdv_intel_lvds.c b/drivers/gpu/drm/gma500/cdv_intel_lvds.c
index ff5b58eb878c..c7f9468b74ba 100644
--- a/drivers/gpu/drm/gma500/cdv_intel_lvds.c
+++ b/drivers/gpu/drm/gma500/cdv_intel_lvds.c
@@ -270,7 +270,7 @@ static int cdv_intel_lvds_mode_valid(struct drm_connector *connector,
 }
 static bool cdv_intel_lvds_mode_fixup(struct drm_encoder *encoder,
-                                  struct drm_display_mode *mode,
+                                  const struct drm_display_mode *mode,
                                  struct drm_display_mode *adjusted_mode)
 {
        struct drm_device *dev = encoder->dev;
diff --git a/drivers/gpu/drm/gma500/intel_bios.c b/drivers/gpu/drm/gma500/intel_bios.c
index 973d7f6d66b7..8d7caf0f363e 100644
--- a/drivers/gpu/drm/gma500/intel_bios.c
+++ b/drivers/gpu/drm/gma500/intel_bios.c
@@ -427,7 +427,7 @@ parse_device_mapping(struct drm_psb_private *dev_priv,
 *
 * Returns 0 on success, nonzero on failure.
 */
-bool psb_intel_init_bios(struct drm_device *dev)
+int psb_intel_init_bios(struct drm_device *dev)
 {
        struct drm_psb_private *dev_priv = dev->dev_private;
        struct pci_dev *pdev = dev->pdev;
diff --git a/drivers/gpu/drm/gma500/intel_bios.h b/drivers/gpu/drm/gma500/intel_bios.h
index 0a738663eb5a..2e95523b84b1 100644
--- a/drivers/gpu/drm/gma500/intel_bios.h
+++ b/drivers/gpu/drm/gma500/intel_bios.h
@@ -431,7 +431,7 @@ struct bdb_driver_features {
        u8 custom_vbt_version;
 } __attribute__((packed));
-extern bool psb_intel_init_bios(struct drm_device *dev);
+extern int psb_intel_init_bios(struct drm_device *dev);
 extern void psb_intel_destroy_bios(struct drm_device *dev);
 /*
diff --git a/drivers/gpu/drm/gma500/mdfld_dsi_dpi.c b/drivers/gpu/drm/gma500/mdfld_dsi_dpi.c
index b34ff097b979..d4813e03f5ee 100644
--- a/drivers/gpu/drm/gma500/mdfld_dsi_dpi.c
+++ b/drivers/gpu/drm/gma500/mdfld_dsi_dpi.c
@@ -684,7 +684,7 @@ void mdfld_dsi_dpi_dpms(struct drm_encoder *encoder, int mode)
 }
 bool mdfld_dsi_dpi_mode_fixup(struct drm_encoder *encoder,
-                                     struct drm_display_mode *mode,
+                                     const struct drm_display_mode *mode,
                                     struct drm_display_mode *adjusted_mode)
 {
        struct mdfld_dsi_encoder *dsi_encoder = mdfld_dsi_encoder(encoder);
diff --git a/drivers/gpu/drm/gma500/mdfld_dsi_dpi.h b/drivers/gpu/drm/gma500/mdfld_dsi_dpi.h
index 6f762478b959..2b40663e1696 100644
--- a/drivers/gpu/drm/gma500/mdfld_dsi_dpi.h
+++ b/drivers/gpu/drm/gma500/mdfld_dsi_dpi.h
@@ -65,7 +65,7 @@ extern struct mdfld_dsi_encoder *mdfld_dsi_dpi_init(struct drm_device *dev,
 /* MDFLD DPI helper functions */
 extern void mdfld_dsi_dpi_dpms(struct drm_encoder *encoder, int mode);
 extern bool mdfld_dsi_dpi_mode_fixup(struct drm_encoder *encoder,
-                                struct drm_display_mode *mode,
+                                const struct drm_display_mode *mode,
                                struct drm_display_mode *adjusted_mode);
 extern void mdfld_dsi_dpi_prepare(struct drm_encoder *encoder);
 extern void mdfld_dsi_dpi_commit(struct drm_encoder *encoder);
diff --git a/drivers/gpu/drm/gma500/mdfld_intel_display.c b/drivers/gpu/drm/gma500/mdfld_intel_display.c
index 3f3cd619c79f..dec6a9aea3c6 100644
--- a/drivers/gpu/drm/gma500/mdfld_intel_display.c
+++ b/drivers/gpu/drm/gma500/mdfld_intel_display.c
@@ -117,7 +117,7 @@ static void psb_intel_crtc_commit(struct drm_crtc *crtc)
 }
 static bool psb_intel_crtc_mode_fixup(struct drm_crtc *crtc,
-                                  struct drm_display_mode *mode,
+                                  const struct drm_display_mode *mode,
                                  struct drm_display_mode *adjusted_mode)
 {
        return true;
diff --git a/drivers/gpu/drm/gma500/oaktrail_crtc.c b/drivers/gpu/drm/gma500/oaktrail_crtc.c
index f821c835ca90..cdafd2acc72f 100644
--- a/drivers/gpu/drm/gma500/oaktrail_crtc.c
+++ b/drivers/gpu/drm/gma500/oaktrail_crtc.c
@@ -487,7 +487,7 @@ oaktrail_crtc_mode_set_exit:
 }
 static bool oaktrail_crtc_mode_fixup(struct drm_crtc *crtc,
-                                  struct drm_display_mode *mode,
+                                  const struct drm_display_mode *mode,
                                  struct drm_display_mode *adjusted_mode)
 {
        return true;
diff --git a/drivers/gpu/drm/gma500/oaktrail_hdmi.c b/drivers/gpu/drm/gma500/oaktrail_hdmi.c
index c10899c953b9..2eb3dc4e9c9b 100644
--- a/drivers/gpu/drm/gma500/oaktrail_hdmi.c
+++ b/drivers/gpu/drm/gma500/oaktrail_hdmi.c
@@ -191,7 +191,7 @@ static int oaktrail_hdmi_mode_valid(struct drm_connector *connector,
 }
 static bool oaktrail_hdmi_mode_fixup(struct drm_encoder *encoder,
-                                 struct drm_display_mode *mode,
+                                 const struct drm_display_mode *mode,
                                 struct drm_display_mode *adjusted_mode)
 {
        return true;
diff --git a/drivers/gpu/drm/gma500/opregion.c b/drivers/gpu/drm/gma500/opregion.c
index 4f186eca3a30..c430bd424681 100644
--- a/drivers/gpu/drm/gma500/opregion.c
+++ b/drivers/gpu/drm/gma500/opregion.c
@@ -144,6 +144,8 @@ struct opregion_asle {
 #define ASLE_CBLV_VALID         (1<<31)
+static struct psb_intel_opregion *system_opregion;
 static u32 asle_set_backlight(struct drm_device *dev, u32 bclp)
 {
        struct drm_psb_private *dev_priv = dev->dev_private;
@@ -205,7 +207,7 @@ void psb_intel_opregion_enable_asle(struct drm_device *dev)
        struct drm_psb_private *dev_priv = dev->dev_private;
        struct opregion_asle *asle = dev_priv->opregion.asle;
-        if (asle) {
+        if (asle && system_opregion ) {
                /* Don't do this on Medfield or other non PC like devices, they
                   use the bit for something different altogether */
                psb_enable_pipestat(dev_priv, 0, PIPE_LEGACY_BLC_EVENT_ENABLE);
@@ -221,7 +223,6 @@ void psb_intel_opregion_enable_asle(struct drm_device *dev)
 #define ACPI_EV_LID            (1<<1)
 #define ACPI_EV_DOCK           (1<<2)
-static struct psb_intel_opregion *system_opregion;
 static int psb_intel_opregion_video_event(struct notifier_block *nb,
                                          unsigned long val, void *data)
@@ -266,9 +267,6 @@ void psb_intel_opregion_init(struct drm_device *dev)
                system_opregion = opregion;
                register_acpi_notifier(&psb_intel_opregion_notifier);
        }
-        if (opregion->asle)
-                psb_intel_opregion_enable_asle(dev);
 }
 void psb_intel_opregion_fini(struct drm_device *dev)
diff --git a/drivers/gpu/drm/gma500/opregion.h b/drivers/gpu/drm/gma500/opregion.h
index 72dc6b921265..4a90f8b0e16c 100644
--- a/drivers/gpu/drm/gma500/opregion.h
+++ b/drivers/gpu/drm/gma500/opregion.h
@@ -27,6 +27,7 @@ extern void psb_intel_opregion_asle_intr(struct drm_device *dev);
 extern void psb_intel_opregion_init(struct drm_device *dev);
 extern void psb_intel_opregion_fini(struct drm_device *dev);
 extern int psb_intel_opregion_setup(struct drm_device *dev);
+extern void psb_intel_opregion_enable_asle(struct drm_device *dev);
 #else
@@ -46,4 +47,8 @@ extern inline int psb_intel_opregion_setup(struct drm_device *dev)
 {
        return 0;
 }
+extern inline void psb_intel_opregion_enable_asle(struct drm_device *dev)
+{
+}
 #endif
diff --git a/drivers/gpu/drm/gma500/psb_device.c b/drivers/gpu/drm/gma500/psb_device.c
index eff039bf92d4..5971bc82b765 100644
--- a/drivers/gpu/drm/gma500/psb_device.c
+++ b/drivers/gpu/drm/gma500/psb_device.c
@@ -144,6 +144,10 @@ static int psb_backlight_init(struct drm_device *dev)
        psb_backlight_device->props.max_brightness = 100;
        backlight_update_status(psb_backlight_device);
        dev_priv->backlight_device = psb_backlight_device;
+        /* This must occur after the backlight is properly initialised */
+        psb_lid_timer_init(dev_priv);
        return 0;
 }
@@ -354,13 +358,6 @@ static int psb_chip_setup(struct drm_device *dev)
        return 0;
 }
-/* Not exactly an erratum more an irritation */
-static void psb_chip_errata(struct drm_device *dev)
-{
-        struct drm_psb_private *dev_priv = dev->dev_private;
-        psb_lid_timer_init(dev_priv);
-}
 static void psb_chip_teardown(struct drm_device *dev)
 {
        struct drm_psb_private *dev_priv = dev->dev_private;
@@ -379,7 +376,6 @@ const struct psb_ops psb_chip_ops = {
        .sgx_offset = PSB_SGX_OFFSET,
        .chip_setup = psb_chip_setup,
        .chip_teardown = psb_chip_teardown,
-        .errata = psb_chip_errata,
        .crtc_helper = &psb_intel_helper_funcs,
        .crtc_funcs = &psb_intel_crtc_funcs,
diff --git a/drivers/gpu/drm/gma500/psb_drv.c b/drivers/gpu/drm/gma500/psb_drv.c
index caba6e08693c..0c4737438530 100644
--- a/drivers/gpu/drm/gma500/psb_drv.c
+++ b/drivers/gpu/drm/gma500/psb_drv.c
@@ -374,6 +374,7 @@ static int psb_driver_load(struct drm_device *dev, unsigned long chipset)
        if (ret)
                return ret;
+        psb_intel_opregion_enable_asle(dev);
 #if 0
        /*enable runtime pm at last*/
        pm_runtime_enable(&dev->pdev->dev);
@@ -632,7 +633,6 @@ static struct drm_driver driver = {
        .open = psb_driver_open,
        .preclose = psb_driver_preclose,
        .postclose = psb_driver_close,
-        .reclaim_buffers = drm_core_reclaim_buffers,
        .gem_init_object = psb_gem_init_object,
        .gem_free_object = psb_gem_free_object,
diff --git a/drivers/gpu/drm/gma500/psb_intel_display.c b/drivers/gpu/drm/gma500/psb_intel_display.c
index 36c3c99612f6..8033526bb53b 100644
--- a/drivers/gpu/drm/gma500/psb_intel_display.c
+++ b/drivers/gpu/drm/gma500/psb_intel_display.c
@@ -543,7 +543,7 @@ void psb_intel_encoder_destroy(struct drm_encoder *encoder)
 }
 static bool psb_intel_crtc_mode_fixup(struct drm_crtc *crtc,
-                                  struct drm_display_mode *mode,
+                                  const struct drm_display_mode *mode,
                                  struct drm_display_mode *adjusted_mode)
 {
        return true;
@@ -1362,6 +1362,9 @@ void psb_intel_crtc_init(struct drm_device *dev, int pipe,
            (struct drm_connector **) (psb_intel_crtc + 1);
        psb_intel_crtc->mode_set.num_connectors = 0;
        psb_intel_cursor_init(dev, psb_intel_crtc);
+        /* Set to true so that the pipe is forced off on initial config. */
+        psb_intel_crtc->active = true;
 }
 int psb_intel_get_pipe_from_crtc_id(struct drm_device *dev, void *data,
diff --git a/drivers/gpu/drm/gma500/psb_intel_drv.h b/drivers/gpu/drm/gma500/psb_intel_drv.h
index 2515f83248cb..ebe1a28f60e1 100644
--- a/drivers/gpu/drm/gma500/psb_intel_drv.h
+++ b/drivers/gpu/drm/gma500/psb_intel_drv.h
@@ -268,7 +268,7 @@ extern struct drm_framebuffer *psb_intel_framebuffer_create(struct drm_device
                                                        *mode_cmd,
                                                        void *mm_private);
 extern bool psb_intel_lvds_mode_fixup(struct drm_encoder *encoder,
-                                      struct drm_display_mode *mode,
+                                      const struct drm_display_mode *mode,
                                      struct drm_display_mode *adjusted_mode);
 extern int psb_intel_lvds_mode_valid(struct drm_connector *connector,
                                     struct drm_display_mode *mode);
diff --git a/drivers/gpu/drm/gma500/psb_intel_lvds.c b/drivers/gpu/drm/gma500/psb_intel_lvds.c
index c83f5b5d1057..37adc9edf974 100644
--- a/drivers/gpu/drm/gma500/psb_intel_lvds.c
+++ b/drivers/gpu/drm/gma500/psb_intel_lvds.c
@@ -375,7 +375,7 @@ int psb_intel_lvds_mode_valid(struct drm_connector *connector,
 }
 bool psb_intel_lvds_mode_fixup(struct drm_encoder *encoder,
-                                  struct drm_display_mode *mode,
+                                  const struct drm_display_mode *mode,
                                  struct drm_display_mode *adjusted_mode)
 {
        struct drm_device *dev = encoder->dev;
diff --git a/drivers/gpu/drm/gma500/psb_intel_sdvo.c b/drivers/gpu/drm/gma500/psb_intel_sdvo.c
index d39b15be7649..0466c7b985f8 100644
--- a/drivers/gpu/drm/gma500/psb_intel_sdvo.c
+++ b/drivers/gpu/drm/gma500/psb_intel_sdvo.c
@@ -901,7 +901,7 @@ static bool psb_intel_sdvo_set_tv_format(struct psb_intel_sdvo *psb_intel_sdvo)
 static bool
 psb_intel_sdvo_set_output_timings_from_mode(struct psb_intel_sdvo *psb_intel_sdvo,
-                                        struct drm_display_mode *mode)
+                                        const struct drm_display_mode *mode)
 {
        struct psb_intel_sdvo_dtd output_dtd;
@@ -918,7 +918,7 @@ psb_intel_sdvo_set_output_timings_from_mode(struct psb_intel_sdvo *psb_intel_sdv
 static bool
 psb_intel_sdvo_set_input_timings_for_mode(struct psb_intel_sdvo *psb_intel_sdvo,
-                                        struct drm_display_mode *mode,
+                                        const struct drm_display_mode *mode,
                                        struct drm_display_mode *adjusted_mode)
 {
        /* Reset the input timing to the screen. Assume always input 0. */
@@ -942,7 +942,7 @@ psb_intel_sdvo_set_input_timings_for_mode(struct psb_intel_sdvo *psb_intel_sdvo,
 }
 static bool psb_intel_sdvo_mode_fixup(struct drm_encoder *encoder,
-                                  struct drm_display_mode *mode,
+                                  const struct drm_display_mode *mode,
                                  struct drm_display_mode *adjusted_mode)
 {
        struct psb_intel_sdvo *psb_intel_sdvo = to_psb_intel_sdvo(encoder);
diff --git a/drivers/gpu/drm/i2c/ch7006_drv.c b/drivers/gpu/drm/i2c/ch7006_drv.c
index d3f2e8785010..36d952280c50 100644
--- a/drivers/gpu/drm/i2c/ch7006_drv.c
+++ b/drivers/gpu/drm/i2c/ch7006_drv.c
@@ -88,7 +88,7 @@ static void ch7006_encoder_restore(struct drm_encoder *encoder)
 }
 static bool ch7006_encoder_mode_fixup(struct drm_encoder *encoder,
-                                      struct drm_display_mode *mode,
+                                      const struct drm_display_mode *mode,
                                      struct drm_display_mode *adjusted_mode)
 {
        struct ch7006_priv *priv = to_ch7006_priv(encoder);
diff --git a/drivers/gpu/drm/i2c/ch7006_mode.c b/drivers/gpu/drm/i2c/ch7006_mode.c
index c860f24a5afc..9b83574141a6 100644
--- a/drivers/gpu/drm/i2c/ch7006_mode.c
+++ b/drivers/gpu/drm/i2c/ch7006_mode.c
@@ -172,7 +172,7 @@ struct ch7006_mode ch7006_modes[] = {
 };
 struct ch7006_mode *ch7006_lookup_mode(struct drm_encoder *encoder,
-                                       struct drm_display_mode *drm_mode)
+                                       const struct drm_display_mode *drm_mode)
 {
        struct ch7006_priv *priv = to_ch7006_priv(encoder);
        struct ch7006_mode *mode;
diff --git a/drivers/gpu/drm/i2c/ch7006_priv.h b/drivers/gpu/drm/i2c/ch7006_priv.h
index 17667b7d57e7..09599f4c0c9a 100644
--- a/drivers/gpu/drm/i2c/ch7006_priv.h
+++ b/drivers/gpu/drm/i2c/ch7006_priv.h
@@ -111,7 +111,7 @@ extern struct ch7006_tv_norm_info ch7006_tv_norms[];
 extern struct ch7006_mode ch7006_modes[];
 struct ch7006_mode *ch7006_lookup_mode(struct drm_encoder *encoder,
-                                       struct drm_display_mode *drm_mode);
+                                       const struct drm_display_mode *drm_mode);
 void ch7006_setup_levels(struct drm_encoder *encoder);
 void ch7006_setup_subcarrier(struct drm_encoder *encoder);
diff --git a/drivers/gpu/drm/i2c/sil164_drv.c b/drivers/gpu/drm/i2c/sil164_drv.c
index b7d45ab4ba69..30b8ae5e5c4a 100644
--- a/drivers/gpu/drm/i2c/sil164_drv.c
+++ b/drivers/gpu/drm/i2c/sil164_drv.c
@@ -254,7 +254,7 @@ sil164_encoder_restore(struct drm_encoder *encoder)
 static bool
 sil164_encoder_mode_fixup(struct drm_encoder *encoder,
-                          struct drm_display_mode *mode,
+                          const struct drm_display_mode *mode,
                          struct drm_display_mode *adjusted_mode)
 {
        return true;
diff --git a/drivers/gpu/drm/i810/i810_dma.c b/drivers/gpu/drm/i810/i810_dma.c
index fa9439159ebd..57d892eaaa6e 100644
--- a/drivers/gpu/drm/i810/i810_dma.c
+++ b/drivers/gpu/drm/i810/i810_dma.c
@@ -881,7 +881,7 @@ static int i810_flush_queue(struct drm_device *dev)
 }
 /* Must be called with the lock held */
-static void i810_reclaim_buffers(struct drm_device *dev,
+void i810_driver_reclaim_buffers(struct drm_device *dev,
                                 struct drm_file *file_priv)
 {
        struct drm_device_dma *dma = dev->dma;
@@ -1220,12 +1220,17 @@ void i810_driver_preclose(struct drm_device *dev, struct drm_file *file_priv)
                if (dev_priv->page_flipping)
                        i810_do_cleanup_pageflip(dev);
        }
-}
-void i810_driver_reclaim_buffers_locked(struct drm_device *dev,
+        if (file_priv->master && file_priv->master->lock.hw_lock) {
-                                        struct drm_file *file_priv)
+                drm_idlelock_take(&file_priv->master->lock);
-{
+                i810_driver_reclaim_buffers(dev, file_priv);
-        i810_reclaim_buffers(dev, file_priv);
+                drm_idlelock_release(&file_priv->master->lock);
+        } else {
+                /* master disappeared, clean up stuff anyway and hope nothing
+                 * goes wrong */
+                i810_driver_reclaim_buffers(dev, file_priv);
+        }
 }
 int i810_driver_dma_quiescent(struct drm_device *dev)
diff --git a/drivers/gpu/drm/i810/i810_drv.c b/drivers/gpu/drm/i810/i810_drv.c
index ec12f7dc717a..f9924ad04d09 100644
--- a/drivers/gpu/drm/i810/i810_drv.c
+++ b/drivers/gpu/drm/i810/i810_drv.c
@@ -57,13 +57,12 @@ static const struct file_operations i810_driver_fops = {
 static struct drm_driver driver = {
        .driver_features =
            DRIVER_USE_AGP | DRIVER_REQUIRE_AGP | DRIVER_USE_MTRR |
-            DRIVER_HAVE_DMA | DRIVER_DMA_QUEUE,
+            DRIVER_HAVE_DMA,
        .dev_priv_size = sizeof(drm_i810_buf_priv_t),
        .load = i810_driver_load,
        .lastclose = i810_driver_lastclose,
        .preclose = i810_driver_preclose,
        .device_is_agp = i810_driver_device_is_agp,
-        .reclaim_buffers_locked = i810_driver_reclaim_buffers_locked,
        .dma_quiescent = i810_driver_dma_quiescent,
        .ioctls = i810_ioctls,
        .fops = &i810_driver_fops,
diff --git a/drivers/gpu/drm/i810/i810_drv.h b/drivers/gpu/drm/i810/i810_drv.h
index c9339f481795..6e0acad9e0f5 100644
--- a/drivers/gpu/drm/i810/i810_drv.h
+++ b/drivers/gpu/drm/i810/i810_drv.h
@@ -116,14 +116,12 @@ typedef struct drm_i810_private {
                                /* i810_dma.c */
 extern int i810_driver_dma_quiescent(struct drm_device *dev);
-extern void i810_driver_reclaim_buffers_locked(struct drm_device *dev,
+void i810_driver_reclaim_buffers(struct drm_device *dev,
-                                               struct drm_file *file_priv);
+                                 struct drm_file *file_priv);
 extern int i810_driver_load(struct drm_device *, unsigned long flags);
 extern void i810_driver_lastclose(struct drm_device *dev);
 extern void i810_driver_preclose(struct drm_device *dev,
                                 struct drm_file *file_priv);
-extern void i810_driver_reclaim_buffers_locked(struct drm_device *dev,
-                                               struct drm_file *file_priv);
 extern int i810_driver_device_is_agp(struct drm_device *dev);
 extern long i810_ioctl(struct file *file, unsigned int cmd, unsigned long arg);
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 2e9268da58d8..b0bacdba6d7e 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -7,6 +7,7 @@ i915-y := i915_drv.o i915_dma.o i915_irq.o \
          i915_debugfs.o \
          i915_suspend.o \
          i915_gem.o \
+          i915_gem_context.o \
          i915_gem_debug.o \
          i915_gem_evict.o \
          i915_gem_execbuffer.o \
diff --git a/drivers/gpu/drm/i915/dvo.h b/drivers/gpu/drm/i915/dvo.h
index 8c2ad014c47f..58914691a77b 100644
--- a/drivers/gpu/drm/i915/dvo.h
+++ b/drivers/gpu/drm/i915/dvo.h
@@ -86,7 +86,7 @@ struct intel_dvo_dev_ops {
         * buses with clock limitations.
         */
        bool (*mode_fixup)(struct intel_dvo_device *dvo,
-                           struct drm_display_mode *mode,
+                           const struct drm_display_mode *mode,
                           struct drm_display_mode *adjusted_mode);
        /*
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 5363e9c66c27..359f6e8b9b00 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -676,6 +676,7 @@ static void i915_ring_error_state(struct seq_file *m,
        seq_printf(m, "  INSTPM: 0x%08x\n", error->instpm[ring]);
        seq_printf(m, "  FADDR: 0x%08x\n", error->faddr[ring]);
        if (INTEL_INFO(dev)->gen >= 6) {
+                seq_printf(m, "  RC PSMI: 0x%08x\n", error->rc_psmi[ring]);
                seq_printf(m, "  FAULT_REG: 0x%08x\n", error->fault_reg[ring]);
                seq_printf(m, "  SYNC_0: 0x%08x\n",
                           error->semaphore_mboxes[ring][0]);
@@ -713,6 +714,7 @@ static int i915_error_state(struct seq_file *m, void *unused)
        seq_printf(m, "EIR: 0x%08x\n", error->eir);
        seq_printf(m, "IER: 0x%08x\n", error->ier);
        seq_printf(m, "PGTBL_ER: 0x%08x\n", error->pgtbl_er);
+        seq_printf(m, "CCID: 0x%08x\n", error->ccid);
        for (i = 0; i < dev_priv->num_fence_regs; i++)
                seq_printf(m, "  fence[%d] = %08llx\n", i, error->fence[i]);
@@ -1765,6 +1767,64 @@ static const struct file_operations i915_max_freq_fops = {
 };
 static ssize_t
+i915_min_freq_read(struct file *filp, char __user *ubuf, size_t max,
+                   loff_t *ppos)
+{
+        struct drm_device *dev = filp->private_data;
+        drm_i915_private_t *dev_priv = dev->dev_private;
+        char buf[80];
+        int len;
+        len = snprintf(buf, sizeof(buf),
+                       "min freq: %d\n", dev_priv->min_delay * 50);
+        if (len > sizeof(buf))
+                len = sizeof(buf);
+        return simple_read_from_buffer(ubuf, max, ppos, buf, len);
+}
+static ssize_t
+i915_min_freq_write(struct file *filp, const char __user *ubuf, size_t cnt,
+                    loff_t *ppos)
+{
+        struct drm_device *dev = filp->private_data;
+        struct drm_i915_private *dev_priv = dev->dev_private;
+        char buf[20];
+        int val = 1;
+        if (cnt > 0) {
+                if (cnt > sizeof(buf) - 1)
+                        return -EINVAL;
+                if (copy_from_user(buf, ubuf, cnt))
+                        return -EFAULT;
+                buf[cnt] = 0;
+                val = simple_strtoul(buf, NULL, 0);
+        }
+        DRM_DEBUG_DRIVER("Manually setting min freq to %d\n", val);
+        /*
+         * Turbo will still be enabled, but won't go below the set value.
+         */
+        dev_priv->min_delay = val / 50;
+        gen6_set_rps(dev, val / 50);
+        return cnt;
+}
+static const struct file_operations i915_min_freq_fops = {
+        .owner = THIS_MODULE,
+        .open = simple_open,
+        .read = i915_min_freq_read,
+        .write = i915_min_freq_write,
+        .llseek = default_llseek,
+};
+static ssize_t
 i915_cache_sharing_read(struct file *filp,
                   char __user *ubuf,
                   size_t max,
@@ -1997,6 +2057,12 @@ int i915_debugfs_init(struct drm_minor *minor)
                return ret;
        ret = i915_debugfs_create(minor->debugfs_root, minor,
+                                  "i915_min_freq",
+                                  &i915_min_freq_fops);
+        if (ret)
+                return ret;
+        ret = i915_debugfs_create(minor->debugfs_root, minor,
                                  "i915_cache_sharing",
                                  &i915_cache_sharing_fops);
        if (ret)
@@ -2028,6 +2094,8 @@ void i915_debugfs_cleanup(struct drm_minor *minor)
                                 1, minor);
        drm_debugfs_remove_files((struct drm_info_list *) &i915_max_freq_fops,
                                 1, minor);
+        drm_debugfs_remove_files((struct drm_info_list *) &i915_min_freq_fops,
+                                 1, minor);
        drm_debugfs_remove_files((struct drm_info_list *) &i915_cache_sharing_fops,
                                 1, minor);
        drm_debugfs_remove_files((struct drm_info_list *) &i915_ring_stop_fops,
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index f94792626b94..9cf7dfe022b9 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -1006,6 +1006,9 @@ static int i915_getparam(struct drm_device *dev, void *data,
        case I915_PARAM_HAS_ALIASING_PPGTT:
                value = dev_priv->mm.aliasing_ppgtt ? 1 : 0;
                break;
+        case I915_PARAM_HAS_WAIT_TIMEOUT:
+                value = 1;
+                break;
        default:
                DRM_DEBUG_DRIVER("Unknown parameter %d\n",
                                 param->param);
@@ -1082,8 +1085,8 @@ static int i915_set_status_page(struct drm_device *dev, void *data,
        ring->status_page.gfx_addr = hws->addr & (0x1ffff<<12);
-        dev_priv->dri1.gfx_hws_cpu_addr = ioremap_wc(dev->agp->base + hws->addr,
+        dev_priv->dri1.gfx_hws_cpu_addr =
-                                                     4096);
+                ioremap_wc(dev_priv->mm.gtt_base_addr + hws->addr, 4096);
        if (dev_priv->dri1.gfx_hws_cpu_addr == NULL) {
                i915_dma_cleanup(dev);
                ring->status_page.gfx_addr = 0;
@@ -1401,6 +1404,27 @@ i915_mtrr_setup(struct drm_i915_private *dev_priv, unsigned long base,
        }
 }
+static void i915_kick_out_firmware_fb(struct drm_i915_private *dev_priv)
+{
+        struct apertures_struct *ap;
+        struct pci_dev *pdev = dev_priv->dev->pdev;
+        bool primary;
+        ap = alloc_apertures(1);
+        if (!ap)
+                return;
+        ap->ranges[0].base = dev_priv->mm.gtt->gma_bus_addr;
+        ap->ranges[0].size =
+                dev_priv->mm.gtt->gtt_mappable_entries << PAGE_SHIFT;
+        primary =
+                pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
+        remove_conflicting_framebuffers(ap, "inteldrmfb", primary);
+        kfree(ap);
+}
 /**
 * i915_driver_load - setup chip and create an initial config
 * @dev: DRM device
@@ -1446,6 +1470,22 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
                goto free_priv;
        }
+        ret = intel_gmch_probe(dev_priv->bridge_dev, dev->pdev, NULL);
+        if (!ret) {
+                DRM_ERROR("failed to set up gmch\n");
+                ret = -EIO;
+                goto put_bridge;
+        }
+        dev_priv->mm.gtt = intel_gtt_get();
+        if (!dev_priv->mm.gtt) {
+                DRM_ERROR("Failed to initialize GTT\n");
+                ret = -ENODEV;
+                goto put_gmch;
+        }
+        i915_kick_out_firmware_fb(dev_priv);
        pci_set_master(dev->pdev);
        /* overlay on gen2 is broken and can't address above 1G */
@@ -1468,26 +1508,22 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
        if (!dev_priv->regs) {
                DRM_ERROR("failed to map registers\n");
                ret = -EIO;
-                goto put_bridge;
+                goto put_gmch;
-        }
-        dev_priv->mm.gtt = intel_gtt_get();
-        if (!dev_priv->mm.gtt) {
-                DRM_ERROR("Failed to initialize GTT\n");
-                ret = -ENODEV;
-                goto out_rmmap;
        }
        aperture_size = dev_priv->mm.gtt->gtt_mappable_entries << PAGE_SHIFT;
+        dev_priv->mm.gtt_base_addr = dev_priv->mm.gtt->gma_bus_addr;
        dev_priv->mm.gtt_mapping =
-                io_mapping_create_wc(dev->agp->base, aperture_size);
+                io_mapping_create_wc(dev_priv->mm.gtt_base_addr,
+                                     aperture_size);
        if (dev_priv->mm.gtt_mapping == NULL) {
                ret = -EIO;
                goto out_rmmap;
        }
-        i915_mtrr_setup(dev_priv, dev->agp->base, aperture_size);
+        i915_mtrr_setup(dev_priv, dev_priv->mm.gtt_base_addr,
+                        aperture_size);
        /* The i915 workqueue is primarily used for batched retirement of
         * requests (and thus managing bo) once the task has been completed
@@ -1511,7 +1547,11 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
                goto out_mtrrfree;
        }
+        /* This must be called before any calls to HAS_PCH_* */
+        intel_detect_pch(dev);
        intel_irq_init(dev);
+        intel_gt_init(dev);
        /* Try to make sure MCHBAR is enabled before poking at it */
        intel_setup_mchbar(dev);
@@ -1544,7 +1584,6 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
        if (!IS_I945G(dev) && !IS_I945GM(dev))
                pci_enable_msi(dev->pdev);
-        spin_lock_init(&dev_priv->gt_lock);
        spin_lock_init(&dev_priv->irq_lock);
        spin_lock_init(&dev_priv->error_lock);
        spin_lock_init(&dev_priv->rps_lock);
@@ -1563,8 +1602,6 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
        /* Start out suspended */
        dev_priv->mm.suspended = 1;
-        intel_detect_pch(dev);
        if (drm_core_check_feature(dev, DRIVER_MODESET)) {
                ret = i915_load_modeset_init(dev);
                if (ret < 0) {
@@ -1599,13 +1636,16 @@ out_gem_unload:
        destroy_workqueue(dev_priv->wq);
 out_mtrrfree:
        if (dev_priv->mm.gtt_mtrr >= 0) {
-                mtrr_del(dev_priv->mm.gtt_mtrr, dev->agp->base,
+                mtrr_del(dev_priv->mm.gtt_mtrr,
-                         dev->agp->agp_info.aper_size * 1024 * 1024);
+                         dev_priv->mm.gtt_base_addr,
+                         aperture_size);
                dev_priv->mm.gtt_mtrr = -1;
        }
        io_mapping_free(dev_priv->mm.gtt_mapping);
 out_rmmap:
        pci_iounmap(dev->pdev, dev_priv->regs);
+put_gmch:
+        intel_gmch_remove();
 put_bridge:
        pci_dev_put(dev_priv->bridge_dev);
 free_priv:
@@ -1637,8 +1677,9 @@ int i915_driver_unload(struct drm_device *dev)
        io_mapping_free(dev_priv->mm.gtt_mapping);
        if (dev_priv->mm.gtt_mtrr >= 0) {
-                mtrr_del(dev_priv->mm.gtt_mtrr, dev->agp->base,
+                mtrr_del(dev_priv->mm.gtt_mtrr,
-                         dev->agp->agp_info.aper_size * 1024 * 1024);
+                         dev_priv->mm.gtt_base_addr,
+                         dev_priv->mm.gtt->gtt_mappable_entries * PAGE_SIZE);
                dev_priv->mm.gtt_mtrr = -1;
        }
@@ -1679,6 +1720,7 @@ int i915_driver_unload(struct drm_device *dev)
                mutex_lock(&dev->struct_mutex);
                i915_gem_free_all_phys_object(dev);
                i915_gem_cleanup_ringbuffer(dev);
+                i915_gem_context_fini(dev);
                mutex_unlock(&dev->struct_mutex);
                i915_gem_cleanup_aliasing_ppgtt(dev);
                i915_gem_cleanup_stolen(dev);
@@ -1718,6 +1760,8 @@ int i915_driver_open(struct drm_device *dev, struct drm_file *file)
        spin_lock_init(&file_priv->mm.lock);
        INIT_LIST_HEAD(&file_priv->mm.request_list);
+        idr_init(&file_priv->context_idr);
        return 0;
 }
@@ -1737,7 +1781,13 @@ void i915_driver_lastclose(struct drm_device * dev)
 {
        drm_i915_private_t *dev_priv = dev->dev_private;
-        if (!dev_priv || drm_core_check_feature(dev, DRIVER_MODESET)) {
+        /* On gen6+ we refuse to init without kms enabled, but then the drm core
+         * goes right around and calls lastclose. Check for this and don't clean
+         * up anything. */
+        if (!dev_priv)
+                return;
+        if (drm_core_check_feature(dev, DRIVER_MODESET)) {
                intel_fb_restore_mode(dev);
                vga_switcheroo_process_delayed_switch();
                return;
@@ -1750,6 +1800,7 @@ void i915_driver_lastclose(struct drm_device * dev)
 void i915_driver_preclose(struct drm_device * dev, struct drm_file *file_priv)
 {
+        i915_gem_context_close(dev, file_priv);
        i915_gem_release(dev, file_priv);
 }
@@ -1803,6 +1854,9 @@ struct drm_ioctl_desc i915_ioctls[] = {
        DRM_IOCTL_DEF_DRV(I915_OVERLAY_ATTRS, intel_overlay_attrs, DRM_MASTER|DRM_CONTROL_ALLOW|DRM_UNLOCKED),
        DRM_IOCTL_DEF_DRV(I915_SET_SPRITE_COLORKEY, intel_sprite_set_colorkey, DRM_MASTER|DRM_CONTROL_ALLOW|DRM_UNLOCKED),
        DRM_IOCTL_DEF_DRV(I915_GET_SPRITE_COLORKEY, intel_sprite_get_colorkey, DRM_MASTER|DRM_CONTROL_ALLOW|DRM_UNLOCKED),
+        DRM_IOCTL_DEF_DRV(I915_GEM_WAIT, i915_gem_wait_ioctl, DRM_AUTH|DRM_UNLOCKED),
+        DRM_IOCTL_DEF_DRV(I915_GEM_CONTEXT_CREATE, i915_gem_context_create_ioctl, DRM_UNLOCKED),
+        DRM_IOCTL_DEF_DRV(I915_GEM_CONTEXT_DESTROY, i915_gem_context_destroy_ioctl, DRM_UNLOCKED),
 };
 int i915_max_ioctl = DRM_ARRAY_SIZE(i915_ioctls);
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 9fe9ebe52a7a..a24ffbe97c01 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -32,6 +32,7 @@
 #include "drm.h"
 #include "i915_drm.h"
 #include "i915_drv.h"
+#include "i915_trace.h"
 #include "intel_drv.h"
 #include <linux/console.h>
@@ -215,7 +216,6 @@ static const struct intel_device_info intel_ironlake_d_info = {
        .gen = 5,
        .need_gfx_hws = 1, .has_hotplug = 1,
        .has_bsd_ring = 1,
-        .has_pch_split = 1,
 };
 static const struct intel_device_info intel_ironlake_m_info = {
@@ -223,7 +223,6 @@ static const struct intel_device_info intel_ironlake_m_info = {
        .need_gfx_hws = 1, .has_hotplug = 1,
        .has_fbc = 1,
        .has_bsd_ring = 1,
-        .has_pch_split = 1,
 };
 static const struct intel_device_info intel_sandybridge_d_info = {
@@ -232,7 +231,6 @@ static const struct intel_device_info intel_sandybridge_d_info = {
        .has_bsd_ring = 1,
        .has_blt_ring = 1,
        .has_llc = 1,
-        .has_pch_split = 1,
        .has_force_wake = 1,
 };
@@ -243,7 +241,6 @@ static const struct intel_device_info intel_sandybridge_m_info = {
        .has_bsd_ring = 1,
        .has_blt_ring = 1,
        .has_llc = 1,
-        .has_pch_split = 1,
        .has_force_wake = 1,
 };
@@ -253,7 +250,6 @@ static const struct intel_device_info intel_ivybridge_d_info = {
        .has_bsd_ring = 1,
        .has_blt_ring = 1,
        .has_llc = 1,
-        .has_pch_split = 1,
        .has_force_wake = 1,
 };
@@ -264,7 +260,6 @@ static const struct intel_device_info intel_ivybridge_m_info = {
        .has_bsd_ring = 1,
        .has_blt_ring = 1,
        .has_llc = 1,
-        .has_pch_split = 1,
        .has_force_wake = 1,
 };
@@ -292,7 +287,6 @@ static const struct intel_device_info intel_haswell_d_info = {
        .has_bsd_ring = 1,
        .has_blt_ring = 1,
        .has_llc = 1,
-        .has_pch_split = 1,
        .has_force_wake = 1,
 };
@@ -302,7 +296,6 @@ static const struct intel_device_info intel_haswell_m_info = {
        .has_bsd_ring = 1,
        .has_blt_ring = 1,
        .has_llc = 1,
-        .has_pch_split = 1,
        .has_force_wake = 1,
 };
@@ -353,11 +346,43 @@ static const struct pci_device_id pciidlist[] = {		/* aka */
        INTEL_VGA_DEVICE(0x016a, &intel_ivybridge_d_info), /* GT2 server */
        INTEL_VGA_DEVICE(0x0402, &intel_haswell_d_info), /* GT1 desktop */
        INTEL_VGA_DEVICE(0x0412, &intel_haswell_d_info), /* GT2 desktop */
+        INTEL_VGA_DEVICE(0x0422, &intel_haswell_d_info), /* GT2 desktop */
        INTEL_VGA_DEVICE(0x040a, &intel_haswell_d_info), /* GT1 server */
        INTEL_VGA_DEVICE(0x041a, &intel_haswell_d_info), /* GT2 server */
+        INTEL_VGA_DEVICE(0x042a, &intel_haswell_d_info), /* GT2 server */
        INTEL_VGA_DEVICE(0x0406, &intel_haswell_m_info), /* GT1 mobile */
        INTEL_VGA_DEVICE(0x0416, &intel_haswell_m_info), /* GT2 mobile */
-        INTEL_VGA_DEVICE(0x0c16, &intel_haswell_d_info), /* SDV */
+        INTEL_VGA_DEVICE(0x0426, &intel_haswell_m_info), /* GT2 mobile */
+        INTEL_VGA_DEVICE(0x0C02, &intel_haswell_d_info), /* SDV GT1 desktop */
+        INTEL_VGA_DEVICE(0x0C12, &intel_haswell_d_info), /* SDV GT2 desktop */
+        INTEL_VGA_DEVICE(0x0C22, &intel_haswell_d_info), /* SDV GT2 desktop */
+        INTEL_VGA_DEVICE(0x0C0A, &intel_haswell_d_info), /* SDV GT1 server */
+        INTEL_VGA_DEVICE(0x0C1A, &intel_haswell_d_info), /* SDV GT2 server */
+        INTEL_VGA_DEVICE(0x0C2A, &intel_haswell_d_info), /* SDV GT2 server */
+        INTEL_VGA_DEVICE(0x0C06, &intel_haswell_m_info), /* SDV GT1 mobile */
+        INTEL_VGA_DEVICE(0x0C16, &intel_haswell_m_info), /* SDV GT2 mobile */
+        INTEL_VGA_DEVICE(0x0C26, &intel_haswell_m_info), /* SDV GT2 mobile */
+        INTEL_VGA_DEVICE(0x0A02, &intel_haswell_d_info), /* ULT GT1 desktop */
+        INTEL_VGA_DEVICE(0x0A12, &intel_haswell_d_info), /* ULT GT2 desktop */
+        INTEL_VGA_DEVICE(0x0A22, &intel_haswell_d_info), /* ULT GT2 desktop */
+        INTEL_VGA_DEVICE(0x0A0A, &intel_haswell_d_info), /* ULT GT1 server */
+        INTEL_VGA_DEVICE(0x0A1A, &intel_haswell_d_info), /* ULT GT2 server */
+        INTEL_VGA_DEVICE(0x0A2A, &intel_haswell_d_info), /* ULT GT2 server */
+        INTEL_VGA_DEVICE(0x0A06, &intel_haswell_m_info), /* ULT GT1 mobile */
+        INTEL_VGA_DEVICE(0x0A16, &intel_haswell_m_info), /* ULT GT2 mobile */
+        INTEL_VGA_DEVICE(0x0A26, &intel_haswell_m_info), /* ULT GT2 mobile */
+        INTEL_VGA_DEVICE(0x0D12, &intel_haswell_d_info), /* CRW GT1 desktop */
+        INTEL_VGA_DEVICE(0x0D22, &intel_haswell_d_info), /* CRW GT2 desktop */
+        INTEL_VGA_DEVICE(0x0D32, &intel_haswell_d_info), /* CRW GT2 desktop */
+        INTEL_VGA_DEVICE(0x0D1A, &intel_haswell_d_info), /* CRW GT1 server */
+        INTEL_VGA_DEVICE(0x0D2A, &intel_haswell_d_info), /* CRW GT2 server */
+        INTEL_VGA_DEVICE(0x0D3A, &intel_haswell_d_info), /* CRW GT2 server */
+        INTEL_VGA_DEVICE(0x0D16, &intel_haswell_m_info), /* CRW GT1 mobile */
+        INTEL_VGA_DEVICE(0x0D26, &intel_haswell_m_info), /* CRW GT2 mobile */
+        INTEL_VGA_DEVICE(0x0D36, &intel_haswell_m_info), /* CRW GT2 mobile */
+        INTEL_VGA_DEVICE(0x0f30, &intel_valleyview_m_info),
+        INTEL_VGA_DEVICE(0x0157, &intel_valleyview_m_info),
+        INTEL_VGA_DEVICE(0x0155, &intel_valleyview_d_info),
        {0, 0, 0}
 };
@@ -429,135 +454,6 @@ bool i915_semaphore_is_enabled(struct drm_device *dev)
        return 1;
 }
-void __gen6_gt_force_wake_get(struct drm_i915_private *dev_priv)
-{
-        int count;
-        count = 0;
-        while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK) & 1))
-                udelay(10);
-        I915_WRITE_NOTRACE(FORCEWAKE, 1);
-        POSTING_READ(FORCEWAKE);
-        count = 0;
-        while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK) & 1) == 0)
-                udelay(10);
-}
-void __gen6_gt_force_wake_mt_get(struct drm_i915_private *dev_priv)
-{
-        int count;
-        count = 0;
-        while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_MT_ACK) & 1))
-                udelay(10);
-        I915_WRITE_NOTRACE(FORCEWAKE_MT, _MASKED_BIT_ENABLE(1));
-        POSTING_READ(FORCEWAKE_MT);
-        count = 0;
-        while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_MT_ACK) & 1) == 0)
-                udelay(10);
-}
-/*
- * Generally this is called implicitly by the register read function. However,
- * if some sequence requires the GT to not power down then this function should
- * be called at the beginning of the sequence followed by a call to
- * gen6_gt_force_wake_put() at the end of the sequence.
- */
-void gen6_gt_force_wake_get(struct drm_i915_private *dev_priv)
-{
-        unsigned long irqflags;
-        spin_lock_irqsave(&dev_priv->gt_lock, irqflags);
-        if (dev_priv->forcewake_count++ == 0)
-                dev_priv->display.force_wake_get(dev_priv);
-        spin_unlock_irqrestore(&dev_priv->gt_lock, irqflags);
-}
-static void gen6_gt_check_fifodbg(struct drm_i915_private *dev_priv)
-{
-        u32 gtfifodbg;
-        gtfifodbg = I915_READ_NOTRACE(GTFIFODBG);
-        if (WARN(gtfifodbg & GT_FIFO_CPU_ERROR_MASK,
-             "MMIO read or write has been dropped %x\n", gtfifodbg))
-                I915_WRITE_NOTRACE(GTFIFODBG, GT_FIFO_CPU_ERROR_MASK);
-}
-void __gen6_gt_force_wake_put(struct drm_i915_private *dev_priv)
-{
-        I915_WRITE_NOTRACE(FORCEWAKE, 0);
-        /* The below doubles as a POSTING_READ */
-        gen6_gt_check_fifodbg(dev_priv);
-}
-void __gen6_gt_force_wake_mt_put(struct drm_i915_private *dev_priv)
-{
-        I915_WRITE_NOTRACE(FORCEWAKE_MT, _MASKED_BIT_DISABLE(1));
-        /* The below doubles as a POSTING_READ */
-        gen6_gt_check_fifodbg(dev_priv);
-}
-/*
- * see gen6_gt_force_wake_get()
- */
-void gen6_gt_force_wake_put(struct drm_i915_private *dev_priv)
-{
-        unsigned long irqflags;
-        spin_lock_irqsave(&dev_priv->gt_lock, irqflags);
-        if (--dev_priv->forcewake_count == 0)
-                dev_priv->display.force_wake_put(dev_priv);
-        spin_unlock_irqrestore(&dev_priv->gt_lock, irqflags);
-}
-int __gen6_gt_wait_for_fifo(struct drm_i915_private *dev_priv)
-{
-        int ret = 0;
-        if (dev_priv->gt_fifo_count < GT_FIFO_NUM_RESERVED_ENTRIES) {
-                int loop = 500;
-                u32 fifo = I915_READ_NOTRACE(GT_FIFO_FREE_ENTRIES);
-                while (fifo <= GT_FIFO_NUM_RESERVED_ENTRIES && loop--) {
-                        udelay(10);
-                        fifo = I915_READ_NOTRACE(GT_FIFO_FREE_ENTRIES);
-                }
-                if (WARN_ON(loop < 0 && fifo <= GT_FIFO_NUM_RESERVED_ENTRIES))
-                        ++ret;
-                dev_priv->gt_fifo_count = fifo;
-        }
-        dev_priv->gt_fifo_count--;
-        return ret;
-}
-void vlv_force_wake_get(struct drm_i915_private *dev_priv)
-{
-        int count;
-        count = 0;
-        /* Already awake? */
-        if ((I915_READ(0x130094) & 0xa1) == 0xa1)
-                return;
-        I915_WRITE_NOTRACE(FORCEWAKE_VLV, 0xffffffff);
-        POSTING_READ(FORCEWAKE_VLV);
-        count = 0;
-        while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK_VLV) & 1) == 0)
-                udelay(10);
-}
-void vlv_force_wake_put(struct drm_i915_private *dev_priv)
-{
-        I915_WRITE_NOTRACE(FORCEWAKE_VLV, 0xffff0000);
-        /* FIXME: confirm VLV behavior with Punit folks */
-        POSTING_READ(FORCEWAKE_VLV);
-}
 static int i915_drm_freeze(struct drm_device *dev)
 {
        struct drm_i915_private *dev_priv = dev->dev_private;
@@ -637,7 +533,7 @@ static int i915_drm_thaw(struct drm_device *dev)
        /* KMS EnterVT equivalent */
        if (drm_core_check_feature(dev, DRIVER_MODESET)) {
-                if (HAS_PCH_SPLIT(dev))
+                if (HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev))
                        ironlake_init_pch_refclk(dev);
                mutex_lock(&dev->struct_mutex);
@@ -794,9 +690,9 @@ static int gen6_do_reset(struct drm_device *dev)
        /* If reset with a user forcewake, try to restore, otherwise turn it off */
        if (dev_priv->forcewake_count)
-                dev_priv->display.force_wake_get(dev_priv);
+                dev_priv->gt.force_wake_get(dev_priv);
        else
-                dev_priv->display.force_wake_put(dev_priv);
+                dev_priv->gt.force_wake_put(dev_priv);
        /* Restore fifo count */
        dev_priv->gt_fifo_count = I915_READ_NOTRACE(GT_FIFO_FREE_ENTRIES);
@@ -805,7 +701,7 @@ static int gen6_do_reset(struct drm_device *dev)
        return ret;
 }
-static int intel_gpu_reset(struct drm_device *dev)
+int intel_gpu_reset(struct drm_device *dev)
 {
        struct drm_i915_private *dev_priv = dev->dev_private;
        int ret = -ENODEV;
@@ -863,10 +759,7 @@ int i915_reset(struct drm_device *dev)
        if (!i915_try_reset)
                return 0;
-        if (!mutex_trylock(&dev->struct_mutex))
+        mutex_lock(&dev->struct_mutex);
-                return -EBUSY;
-        dev_priv->stop_rings = 0;
        i915_gem_reset(dev);
@@ -909,12 +802,16 @@ int i915_reset(struct drm_device *dev)
                for_each_ring(ring, dev_priv, i)
                        ring->init(ring);
+                i915_gem_context_init(dev);
                i915_gem_init_ppgtt(dev);
-                mutex_unlock(&dev->struct_mutex);
+                /*
+                 * It would make sense to re-init all the other hw state, at
+                 * least the rps/rc6/emon init done within modeset_init_hw. For
+                 * some unknown reason, this blows up my ilk, so don't.
+                 */
-                if (drm_core_check_feature(dev, DRIVER_MODESET))
+                mutex_unlock(&dev->struct_mutex);
-                        intel_modeset_init_hw(dev);
                drm_irq_uninstall(dev);
                drm_irq_install(dev);
@@ -925,10 +822,12 @@ int i915_reset(struct drm_device *dev)
        return 0;
 }
 static int __devinit
 i915_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
 {
+        struct intel_device_info *intel_info =
+                (struct intel_device_info *) ent->driver_data;
        /* Only bind to function 0 of the device. Early generations
         * used function 1 as a placeholder for multi-head. This causes
         * us confusion instead, especially on the systems where both
@@ -937,6 +836,18 @@ i915_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
        if (PCI_FUNC(pdev->devfn))
                return -ENODEV;
+        /* We've managed to ship a kms-enabled ddx that shipped with an XvMC
+         * implementation for gen3 (and only gen3) that used legacy drm maps
+         * (gasp!) to share buffers between X and the client. Hence we need to
+         * keep around the fake agp stuff for gen3, even when kms is enabled. */
+        if (intel_info->gen != 3) {
+                driver.driver_features &=
+                        ~(DRIVER_USE_AGP | DRIVER_REQUIRE_AGP);
+        } else if (!intel_agp_enabled) {
+                DRM_ERROR("drm/i915 can't work without intel_agp module!\n");
+                return -ENODEV;
+        }
        return drm_get_pci_dev(pdev, ent, &driver);
 }
@@ -1058,7 +969,6 @@ static struct drm_driver driver = {
        .resume = i915_resume,
        .device_is_agp = i915_driver_device_is_agp,
-        .reclaim_buffers = drm_core_reclaim_buffers,
        .master_create = i915_master_create,
        .master_destroy = i915_master_destroy,
 #if defined(CONFIG_DEBUG_FS)
@@ -1097,11 +1007,6 @@ static struct pci_driver i915_pci_driver = {
 static int __init i915_init(void)
 {
-        if (!intel_agp_enabled) {
-                DRM_ERROR("drm/i915 can't work without intel_agp module!\n");
-                return -ENODEV;
-        }
        driver.num_ioctls = i915_max_ioctl;
        /*
@@ -1149,6 +1054,84 @@ MODULE_LICENSE("GPL and additional rights");
         ((reg) < 0x40000) &&            \
         ((reg) != FORCEWAKE))
+static bool IS_DISPLAYREG(u32 reg)
+{
+        /*
+         * This should make it easier to transition modules over to the
+         * new register block scheme, since we can do it incrementally.
+         */
+        if (reg >= 0x180000)
+                return false;
+        if (reg >= RENDER_RING_BASE &&
+            reg < RENDER_RING_BASE + 0xff)
+                return false;
+        if (reg >= GEN6_BSD_RING_BASE &&
+            reg < GEN6_BSD_RING_BASE + 0xff)
+                return false;
+        if (reg >= BLT_RING_BASE &&
+            reg < BLT_RING_BASE + 0xff)
+                return false;
+        if (reg == PGTBL_ER)
+                return false;
+        if (reg >= IPEIR_I965 &&
+            reg < HWSTAM)
+                return false;
+        if (reg == MI_MODE)
+                return false;
+        if (reg == GFX_MODE_GEN7)
+                return false;
+        if (reg == RENDER_HWS_PGA_GEN7 ||
+            reg == BSD_HWS_PGA_GEN7 ||
+            reg == BLT_HWS_PGA_GEN7)
+                return false;
+        if (reg == GEN6_BSD_SLEEP_PSMI_CONTROL ||
+            reg == GEN6_BSD_RNCID)
+                return false;
+        if (reg == GEN6_BLITTER_ECOSKPD)
+                return false;
+        if (reg >= 0x4000c &&
+            reg <= 0x4002c)
+                return false;
+        if (reg >= 0x4f000 &&
+            reg <= 0x4f08f)
+                return false;
+        if (reg >= 0x4f100 &&
+            reg <= 0x4f11f)
+                return false;
+        if (reg >= VLV_MASTER_IER &&
+            reg <= GEN6_PMIER)
+                return false;
+        if (reg >= FENCE_REG_SANDYBRIDGE_0 &&
+            reg < (FENCE_REG_SANDYBRIDGE_0 + (16*8)))
+                return false;
+        if (reg >= VLV_IIR_RW &&
+            reg <= VLV_ISR)
+                return false;
+        if (reg == FORCEWAKE_VLV ||
+            reg == FORCEWAKE_ACK_VLV)
+                return false;
+        if (reg == GEN6_GDRST)
+                return false;
+        return true;
+}
 #define __i915_read(x, y) \
 u##x i915_read##x(struct drm_i915_private *dev_priv, u32 reg) { \
        u##x val = 0; \
@@ -1156,11 +1139,13 @@ u##x i915_read##x(struct drm_i915_private *dev_priv, u32 reg) { \
                unsigned long irqflags; \
                spin_lock_irqsave(&dev_priv->gt_lock, irqflags); \
                if (dev_priv->forcewake_count == 0) \
-                        dev_priv->display.force_wake_get(dev_priv); \
+                        dev_priv->gt.force_wake_get(dev_priv); \
                val = read##y(dev_priv->regs + reg); \
                if (dev_priv->forcewake_count == 0) \
-                        dev_priv->display.force_wake_put(dev_priv); \
+                        dev_priv->gt.force_wake_put(dev_priv); \
                spin_unlock_irqrestore(&dev_priv->gt_lock, irqflags); \
+        } else if (IS_VALLEYVIEW(dev_priv->dev) && IS_DISPLAYREG(reg)) { \
+                val = read##y(dev_priv->regs + reg + 0x180000);         \
        } else { \
                val = read##y(dev_priv->regs + reg); \
        } \
@@ -1181,7 +1166,11 @@ void i915_write##x(struct drm_i915_private *dev_priv, u32 reg, u##x val) { \
        if (NEEDS_FORCE_WAKE((dev_priv), (reg))) { \
                __fifo_ret = __gen6_gt_wait_for_fifo(dev_priv); \
        } \
-        write##y(val, dev_priv->regs + reg); \
+        if (IS_VALLEYVIEW(dev_priv->dev) && IS_DISPLAYREG(reg)) { \
+                write##y(val, dev_priv->regs + reg + 0x180000);         \
+        } else {                                                        \
+                write##y(val, dev_priv->regs + reg);                    \
+        }                                                               \
        if (unlikely(__fifo_ret)) { \
                gen6_gt_check_fifodbg(dev_priv); \
        } \
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index b0b676abde0d..627fe35781b4 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -79,6 +79,10 @@ enum port {
 #define for_each_pipe(p) for ((p) = 0; (p) < dev_priv->num_pipe; (p)++)
+#define for_each_encoder_on_crtc(dev, __crtc, intel_encoder) \
+        list_for_each_entry((intel_encoder), &(dev)->mode_config.encoder_list, base.head) \
+                if ((intel_encoder)->base.crtc == (__crtc))
 struct intel_pch_pll {
        int refcount; /* count of number of CRTCs sharing this PLL */
        int active; /* count of number of active CRTCs (i.e. DPMS on) */
@@ -176,6 +180,7 @@ struct drm_i915_error_state {
        u32 eir;
        u32 pgtbl_er;
        u32 ier;
+        u32 ccid;
        bool waiting[I915_NUM_RINGS];
        u32 pipestat[I915_MAX_PIPES];
        u32 tail[I915_NUM_RINGS];
@@ -185,6 +190,7 @@ struct drm_i915_error_state {
        u32 instdone[I915_NUM_RINGS];
        u32 acthd[I915_NUM_RINGS];
        u32 semaphore_mboxes[I915_NUM_RINGS][I915_NUM_RINGS - 1];
+        u32 rc_psmi[I915_NUM_RINGS]; /* sleep state */
        /* our own tracking of ring head and tail */
        u32 cpu_ring_head[I915_NUM_RINGS];
        u32 cpu_ring_tail[I915_NUM_RINGS];
@@ -261,8 +267,6 @@ struct drm_i915_display_funcs {
                          struct drm_i915_gem_object *obj);
        int (*update_plane)(struct drm_crtc *crtc, struct drm_framebuffer *fb,
                            int x, int y);
-        void (*force_wake_get)(struct drm_i915_private *dev_priv);
-        void (*force_wake_put)(struct drm_i915_private *dev_priv);
        /* clock updates for mode set */
        /* cursor updates */
        /* render clock increase/decrease */
@@ -270,6 +274,11 @@ struct drm_i915_display_funcs {
        /* pll clock increase/decrease */
 };
+struct drm_i915_gt_funcs {
+        void (*force_wake_get)(struct drm_i915_private *dev_priv);
+        void (*force_wake_put)(struct drm_i915_private *dev_priv);
+};
 struct intel_device_info {
        u8 gen;
        u8 is_mobile:1;
@@ -284,7 +293,6 @@ struct intel_device_info {
        u8 is_crestline:1;
        u8 is_ivybridge:1;
        u8 is_valleyview:1;
-        u8 has_pch_split:1;
        u8 has_force_wake:1;
        u8 is_haswell:1;
        u8 has_fbc:1;
@@ -309,6 +317,17 @@ struct i915_hw_ppgtt {
        dma_addr_t scratch_page_dma_addr;
 };
+/* This must match up with the value previously used for execbuf2.rsvd1. */
+#define DEFAULT_CONTEXT_ID 0
+struct i915_hw_context {
+        int id;
+        bool is_initialized;
+        struct drm_i915_file_private *file_priv;
+        struct intel_ring_buffer *ring;
+        struct drm_i915_gem_object *obj;
+};
 enum no_fbc_reason {
        FBC_NO_OUTPUT, /* no outputs enabled to compress */
        FBC_STOLEN_TOO_SMALL, /* not enough space to hold compressed buffers */
@@ -321,6 +340,7 @@ enum no_fbc_reason {
 };
 enum intel_pch {
+        PCH_NONE = 0,   /* No PCH present */
        PCH_IBX,        /* Ibexpeak PCH */
        PCH_CPT,        /* Cougarpoint PCH */
        PCH_LPT,        /* Lynxpoint PCH */
@@ -350,6 +370,8 @@ typedef struct drm_i915_private {
        int relative_constants_mode;
        void __iomem *regs;
+        struct drm_i915_gt_funcs gt;
        /** gt_fifo_count and the subsequent register write are synchronized
         * with dev->struct_mutex. */
        unsigned gt_fifo_count;
@@ -652,11 +674,14 @@ typedef struct drm_i915_private {
                unsigned long gtt_end;
                struct io_mapping *gtt_mapping;
+                phys_addr_t gtt_base_addr;
                int gtt_mtrr;
                /** PPGTT used for aliasing the PPGTT with the GTT */
                struct i915_hw_ppgtt *aliasing_ppgtt;
+                u32 *l3_remap_info;
                struct shrinker inactive_shrinker;
                /**
@@ -817,6 +842,10 @@ typedef struct drm_i915_private {
        struct drm_property *broadcast_rgb_property;
        struct drm_property *force_audio_property;
+        struct work_struct parity_error_work;
+        bool hw_contexts_disabled;
+        uint32_t hw_context_size;
 } drm_i915_private_t;
 /* Iterate over initialised rings */
@@ -1026,6 +1055,7 @@ struct drm_i915_file_private {
                struct spinlock lock;
                struct list_head request_list;
        } mm;
+        struct idr context_idr;
 };
 #define INTEL_INFO(dev) (((struct drm_i915_private *) (dev)->dev_private)->info)
@@ -1071,7 +1101,8 @@ struct drm_i915_file_private {
 #define HAS_LLC(dev)            (INTEL_INFO(dev)->has_llc)
 #define I915_NEED_GFX_HWS(dev)  (INTEL_INFO(dev)->need_gfx_hws)
-#define HAS_ALIASING_PPGTT(dev) (INTEL_INFO(dev)->gen >=6)
+#define HAS_HW_CONTEXTS(dev)    (INTEL_INFO(dev)->gen >= 6)
+#define HAS_ALIASING_PPGTT(dev) (INTEL_INFO(dev)->gen >=6 && !IS_VALLEYVIEW(dev))
 #define HAS_OVERLAY(dev)                (INTEL_INFO(dev)->has_overlay)
 #define OVERLAY_NEEDS_PHYSICAL(dev)     (INTEL_INFO(dev)->overlay_needs_physical)
@@ -1094,13 +1125,13 @@ struct drm_i915_file_private {
 #define HAS_PIPE_CXSR(dev) (INTEL_INFO(dev)->has_pipe_cxsr)
 #define I915_HAS_FBC(dev) (INTEL_INFO(dev)->has_fbc)
-#define HAS_PCH_SPLIT(dev) (INTEL_INFO(dev)->has_pch_split)
 #define HAS_PIPE_CONTROL(dev) (INTEL_INFO(dev)->gen >= 5)
 #define INTEL_PCH_TYPE(dev) (((struct drm_i915_private *)(dev)->dev_private)->pch_type)
 #define HAS_PCH_LPT(dev) (INTEL_PCH_TYPE(dev) == PCH_LPT)
 #define HAS_PCH_CPT(dev) (INTEL_PCH_TYPE(dev) == PCH_CPT)
 #define HAS_PCH_IBX(dev) (INTEL_PCH_TYPE(dev) == PCH_IBX)
+#define HAS_PCH_SPLIT(dev) (INTEL_PCH_TYPE(dev) != PCH_NONE)
 #define HAS_FORCE_WAKE(dev) (INTEL_INFO(dev)->has_force_wake)
@@ -1166,6 +1197,7 @@ extern long i915_compat_ioctl(struct file *filp, unsigned int cmd,
 extern int i915_emit_box(struct drm_device *dev,
                         struct drm_clip_rect *box,
                         int DR1, int DR4);
+extern int intel_gpu_reset(struct drm_device *dev);
 extern int i915_reset(struct drm_device *dev);
 extern unsigned long i915_chipset_val(struct drm_i915_private *dev_priv);
 extern unsigned long i915_mch_val(struct drm_i915_private *dev_priv);
@@ -1178,6 +1210,7 @@ void i915_hangcheck_elapsed(unsigned long data);
 void i915_handle_error(struct drm_device *dev, bool wedged);
 extern void intel_irq_init(struct drm_device *dev);
+extern void intel_gt_init(struct drm_device *dev);
 void i915_error_state_free(struct kref *error_ref);
@@ -1237,6 +1270,8 @@ int i915_gem_get_tiling(struct drm_device *dev, void *data,
                        struct drm_file *file_priv);
 int i915_gem_get_aperture_ioctl(struct drm_device *dev, void *data,
                                struct drm_file *file_priv);
+int i915_gem_wait_ioctl(struct drm_device *dev, void *data,
+                        struct drm_file *file_priv);
 void i915_gem_load(struct drm_device *dev);
 int i915_gem_init_object(struct drm_gem_object *obj);
 int __must_check i915_gem_flush_ring(struct intel_ring_buffer *ring,
@@ -1306,6 +1341,8 @@ i915_gem_object_unpin_fence(struct drm_i915_gem_object *obj)
 void i915_gem_retire_requests(struct drm_device *dev);
 void i915_gem_retire_requests_ring(struct intel_ring_buffer *ring);
+int __must_check i915_gem_check_wedge(struct drm_i915_private *dev_priv,
+                                      bool interruptible);
 void i915_gem_reset(struct drm_device *dev);
 void i915_gem_clflush_object(struct drm_i915_gem_object *obj);
@@ -1315,6 +1352,7 @@ int __must_check i915_gem_object_set_domain(struct drm_i915_gem_object *obj,
 int __must_check i915_gem_object_finish_gpu(struct drm_i915_gem_object *obj);
 int __must_check i915_gem_init(struct drm_device *dev);
 int __must_check i915_gem_init_hw(struct drm_device *dev);
+void i915_gem_l3_remap(struct drm_device *dev);
 void i915_gem_init_swizzling(struct drm_device *dev);
 void i915_gem_init_ppgtt(struct drm_device *dev);
 void i915_gem_cleanup_ringbuffer(struct drm_device *dev);
@@ -1323,8 +1361,8 @@ int __must_check i915_gem_idle(struct drm_device *dev);
 int __must_check i915_add_request(struct intel_ring_buffer *ring,
                                  struct drm_file *file,
                                  struct drm_i915_gem_request *request);
-int __must_check i915_wait_request(struct intel_ring_buffer *ring,
+int __must_check i915_wait_seqno(struct intel_ring_buffer *ring,
-                                   uint32_t seqno);
+                                 uint32_t seqno);
 int i915_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf);
 int __must_check
 i915_gem_object_set_to_gtt_domain(struct drm_i915_gem_object *obj,
@@ -1358,6 +1396,16 @@ struct drm_gem_object *i915_gem_prime_import(struct drm_device *dev,
 struct dma_buf *i915_gem_prime_export(struct drm_device *dev,
                                struct drm_gem_object *gem_obj, int flags);
+/* i915_gem_context.c */
+void i915_gem_context_init(struct drm_device *dev);
+void i915_gem_context_fini(struct drm_device *dev);
+void i915_gem_context_close(struct drm_device *dev, struct drm_file *file);
+int i915_switch_context(struct intel_ring_buffer *ring,
+                        struct drm_file *file, int to_id);
+int i915_gem_context_create_ioctl(struct drm_device *dev, void *data,
+                                  struct drm_file *file);
+int i915_gem_context_destroy_ioctl(struct drm_device *dev, void *data,
+                                   struct drm_file *file);
 /* i915_gem_gtt.c */
 int __must_check i915_gem_init_aliasing_ppgtt(struct drm_device *dev);
@@ -1475,20 +1523,12 @@ extern bool intel_fbc_enabled(struct drm_device *dev);
 extern void intel_disable_fbc(struct drm_device *dev);
 extern bool ironlake_set_drps(struct drm_device *dev, u8 val);
 extern void ironlake_init_pch_refclk(struct drm_device *dev);
-extern void ironlake_enable_rc6(struct drm_device *dev);
 extern void gen6_set_rps(struct drm_device *dev, u8 val);
 extern void intel_detect_pch(struct drm_device *dev);
 extern int intel_trans_dp_port_sel(struct drm_crtc *crtc);
 extern int intel_enable_rc6(const struct drm_device *dev);
 extern bool i915_semaphore_is_enabled(struct drm_device *dev);
-extern void __gen6_gt_force_wake_get(struct drm_i915_private *dev_priv);
-extern void __gen6_gt_force_wake_mt_get(struct drm_i915_private *dev_priv);
-extern void __gen6_gt_force_wake_put(struct drm_i915_private *dev_priv);
-extern void __gen6_gt_force_wake_mt_put(struct drm_i915_private *dev_priv);
-extern void vlv_force_wake_get(struct drm_i915_private *dev_priv);
-extern void vlv_force_wake_put(struct drm_i915_private *dev_priv);
 /* overlay */
 #ifdef CONFIG_DEBUG_FS
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 288d7b8f49ae..489e2b162b27 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -96,9 +96,18 @@ i915_gem_wait_for_error(struct drm_device *dev)
        if (!atomic_read(&dev_priv->mm.wedged))
                return 0;
-        ret = wait_for_completion_interruptible(x);
+        /*
-        if (ret)
+         * Only wait 10 seconds for the gpu reset to complete to avoid hanging
+         * userspace. If it takes that long something really bad is going on and
+         * we should simply try to bail out and fail as gracefully as possible.
+         */
+        ret = wait_for_completion_interruptible_timeout(x, 10*HZ);
+        if (ret == 0) {
+                DRM_ERROR("Timed out waiting for the gpu reset to complete\n");
+                return -EIO;
+        } else if (ret < 0) {
                return ret;
+        }
        if (atomic_read(&dev_priv->mm.wedged)) {
                /* GPU is hung, bump the completion count to account for
@@ -1122,7 +1131,7 @@ int i915_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
        obj->fault_mappable = true;
-        pfn = ((dev->agp->base + obj->gtt_offset) >> PAGE_SHIFT) +
+        pfn = ((dev_priv->mm.gtt_base_addr + obj->gtt_offset) >> PAGE_SHIFT) +
                page_offset;
        /* Finally, remap it using the new GTT offset */
@@ -1132,6 +1141,11 @@ unlock:
 out:
        switch (ret) {
        case -EIO:
+                /* If this -EIO is due to a gpu hang, give the reset code a
+                 * chance to clean up the mess. Otherwise return the proper
+                 * SIGBUS. */
+                if (!atomic_read(&dev_priv->mm.wedged))
+                        return VM_FAULT_SIGBUS;
        case -EAGAIN:
                /* Give the error handler a chance to run and move the
                 * objects off the GPU active list. Next time we service the
@@ -1568,6 +1582,21 @@ i915_add_request(struct intel_ring_buffer *ring,
        int was_empty;
        int ret;
+        /*
+         * Emit any outstanding flushes - execbuf can fail to emit the flush
+         * after having emitted the batchbuffer command. Hence we need to fix
+         * things up similar to emitting the lazy request. The difference here
+         * is that the flush _must_ happen before the next request, no matter
+         * what.
+         */
+        if (ring->gpu_caches_dirty) {
+                ret = i915_gem_flush_ring(ring, 0, I915_GEM_GPU_DOMAINS);
+                if (ret)
+                        return ret;
+                ring->gpu_caches_dirty = false;
+        }
        BUG_ON(request == NULL);
        seqno = i915_gem_next_request_seqno(ring);
@@ -1613,6 +1642,9 @@ i915_add_request(struct intel_ring_buffer *ring,
                        queue_delayed_work(dev_priv->wq,
                                           &dev_priv->mm.retire_work, HZ);
        }
+        WARN_ON(!list_empty(&ring->gpu_write_list));
        return 0;
 }
@@ -1827,14 +1859,11 @@ i915_gem_retire_work_handler(struct work_struct *work)
         */
        idle = true;
        for_each_ring(ring, dev_priv, i) {
-                if (!list_empty(&ring->gpu_write_list)) {
+                if (ring->gpu_caches_dirty) {
                        struct drm_i915_gem_request *request;
-                        int ret;
-                        ret = i915_gem_flush_ring(ring,
-                                                  0, I915_GEM_GPU_DOMAINS);
                        request = kzalloc(sizeof(*request), GFP_KERNEL);
-                        if (ret || request == NULL ||
+                        if (request == NULL ||
                            i915_add_request(ring, NULL, request))
                            kfree(request);
                }
@@ -1848,11 +1877,10 @@ i915_gem_retire_work_handler(struct work_struct *work)
        mutex_unlock(&dev->struct_mutex);
 }
-static int
+int
-i915_gem_check_wedge(struct drm_i915_private *dev_priv)
+i915_gem_check_wedge(struct drm_i915_private *dev_priv,
+                     bool interruptible)
 {
-        BUG_ON(!mutex_is_locked(&dev_priv->dev->struct_mutex));
        if (atomic_read(&dev_priv->mm.wedged)) {
                struct completion *x = &dev_priv->error_completion;
                bool recovery_complete;
@@ -1863,7 +1891,16 @@ i915_gem_check_wedge(struct drm_i915_private *dev_priv)
                recovery_complete = x->done > 0;
                spin_unlock_irqrestore(&x->wait.lock, flags);
-                return recovery_complete ? -EIO : -EAGAIN;
+                /* Non-interruptible callers can't handle -EAGAIN, hence return
+                 * -EIO unconditionally for these. */
+                if (!interruptible)
+                        return -EIO;
+                /* Recovery complete, but still wedged means reset failure. */
+                if (recovery_complete)
+                        return -EIO;
+                return -EAGAIN;
        }
        return 0;
@@ -1899,34 +1936,85 @@ i915_gem_check_olr(struct intel_ring_buffer *ring, u32 seqno)
        return ret;
 }
+/**
+ * __wait_seqno - wait until execution of seqno has finished
+ * @ring: the ring expected to report seqno
+ * @seqno: duh!
+ * @interruptible: do an interruptible wait (normally yes)
+ * @timeout: in - how long to wait (NULL forever); out - how much time remaining
+ *
+ * Returns 0 if the seqno was found within the alloted time. Else returns the
+ * errno with remaining time filled in timeout argument.
+ */
 static int __wait_seqno(struct intel_ring_buffer *ring, u32 seqno,
-                        bool interruptible)
+                        bool interruptible, struct timespec *timeout)
 {
        drm_i915_private_t *dev_priv = ring->dev->dev_private;
-        int ret = 0;
+        struct timespec before, now, wait_time={1,0};
+        unsigned long timeout_jiffies;
+        long end;
+        bool wait_forever = true;
+        int ret;
        if (i915_seqno_passed(ring->get_seqno(ring), seqno))
                return 0;
        trace_i915_gem_request_wait_begin(ring, seqno);
+        if (timeout != NULL) {
+                wait_time = *timeout;
+                wait_forever = false;
+        }
+        timeout_jiffies = timespec_to_jiffies(&wait_time);
        if (WARN_ON(!ring->irq_get(ring)))
                return -ENODEV;
+        /* Record current time in case interrupted by signal, or wedged * */
+        getrawmonotonic(&before);
 #define EXIT_COND \
        (i915_seqno_passed(ring->get_seqno(ring), seqno) || \
        atomic_read(&dev_priv->mm.wedged))
+        do {
+                if (interruptible)
+                        end = wait_event_interruptible_timeout(ring->irq_queue,
+                                                               EXIT_COND,
+                                                               timeout_jiffies);
+                else
+                        end = wait_event_timeout(ring->irq_queue, EXIT_COND,
+                                                 timeout_jiffies);
-        if (interruptible)
+                ret = i915_gem_check_wedge(dev_priv, interruptible);
-                ret = wait_event_interruptible(ring->irq_queue,
+                if (ret)
-                                               EXIT_COND);
+                        end = ret;
-        else
+        } while (end == 0 && wait_forever);
-                wait_event(ring->irq_queue, EXIT_COND);
+        getrawmonotonic(&now);
        ring->irq_put(ring);
        trace_i915_gem_request_wait_end(ring, seqno);
 #undef EXIT_COND
-        return ret;
+        if (timeout) {
+                struct timespec sleep_time = timespec_sub(now, before);
+                *timeout = timespec_sub(*timeout, sleep_time);
+        }
+        switch (end) {
+        case -EIO:
+        case -EAGAIN: /* Wedged */
+        case -ERESTARTSYS: /* Signal */
+                return (int)end;
+        case 0: /* Timeout */
+                if (timeout)
+                        set_normalized_timespec(timeout, 0, 0);
+                return -ETIME;
+        default: /* Completed */
+                WARN_ON(end < 0); /* We're not aware of other errors */
+                return 0;
+        }
 }
 /**
@@ -1934,15 +2022,14 @@ static int __wait_seqno(struct intel_ring_buffer *ring, u32 seqno,
 * request and object lists appropriately for that event.
 */
 int
-i915_wait_request(struct intel_ring_buffer *ring,
+i915_wait_seqno(struct intel_ring_buffer *ring, uint32_t seqno)
-                  uint32_t seqno)
 {
        drm_i915_private_t *dev_priv = ring->dev->dev_private;
        int ret = 0;
        BUG_ON(seqno == 0);
-        ret = i915_gem_check_wedge(dev_priv);
+        ret = i915_gem_check_wedge(dev_priv, dev_priv->mm.interruptible);
        if (ret)
                return ret;
@@ -1950,9 +2037,7 @@ i915_wait_request(struct intel_ring_buffer *ring,
        if (ret)
                return ret;
-        ret = __wait_seqno(ring, seqno, dev_priv->mm.interruptible);
+        ret = __wait_seqno(ring, seqno, dev_priv->mm.interruptible, NULL);
-        if (atomic_read(&dev_priv->mm.wedged))
-                ret = -EAGAIN;
        return ret;
 }
@@ -1975,7 +2060,7 @@ i915_gem_object_wait_rendering(struct drm_i915_gem_object *obj)
         * it.
         */
        if (obj->active) {
-                ret = i915_wait_request(obj->ring, obj->last_rendering_seqno);
+                ret = i915_wait_seqno(obj->ring, obj->last_rendering_seqno);
                if (ret)
                        return ret;
                i915_gem_retire_requests_ring(obj->ring);
@@ -1985,6 +2070,115 @@ i915_gem_object_wait_rendering(struct drm_i915_gem_object *obj)
 }
 /**
+ * Ensures that an object will eventually get non-busy by flushing any required
+ * write domains, emitting any outstanding lazy request and retiring and
+ * completed requests.
+ */
+static int
+i915_gem_object_flush_active(struct drm_i915_gem_object *obj)
+{
+        int ret;
+        if (obj->active) {
+                ret = i915_gem_object_flush_gpu_write_domain(obj);
+                if (ret)
+                        return ret;
+                ret = i915_gem_check_olr(obj->ring,
+                                         obj->last_rendering_seqno);
+                if (ret)
+                        return ret;
+                i915_gem_retire_requests_ring(obj->ring);
+        }
+        return 0;
+}
+/**
+ * i915_gem_wait_ioctl - implements DRM_IOCTL_I915_GEM_WAIT
+ * @DRM_IOCTL_ARGS: standard ioctl arguments
+ *
+ * Returns 0 if successful, else an error is returned with the remaining time in
+ * the timeout parameter.
+ *  -ETIME: object is still busy after timeout
+ *  -ERESTARTSYS: signal interrupted the wait
+ *  -ENONENT: object doesn't exist
+ * Also possible, but rare:
+ *  -EAGAIN: GPU wedged
+ *  -ENOMEM: damn
+ *  -ENODEV: Internal IRQ fail
+ *  -E?: The add request failed
+ *
+ * The wait ioctl with a timeout of 0 reimplements the busy ioctl. With any
+ * non-zero timeout parameter the wait ioctl will wait for the given number of
+ * nanoseconds on an object becoming unbusy. Since the wait itself does so
+ * without holding struct_mutex the object may become re-busied before this
+ * function completes. A similar but shorter * race condition exists in the busy
+ * ioctl
+ */
+int
+i915_gem_wait_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
+{
+        struct drm_i915_gem_wait *args = data;
+        struct drm_i915_gem_object *obj;
+        struct intel_ring_buffer *ring = NULL;
+        struct timespec timeout_stack, *timeout = NULL;
+        u32 seqno = 0;
+        int ret = 0;
+        if (args->timeout_ns >= 0) {
+                timeout_stack = ns_to_timespec(args->timeout_ns);
+                timeout = &timeout_stack;
+        }
+        ret = i915_mutex_lock_interruptible(dev);
+        if (ret)
+                return ret;
+        obj = to_intel_bo(drm_gem_object_lookup(dev, file, args->bo_handle));
+        if (&obj->base == NULL) {
+                mutex_unlock(&dev->struct_mutex);
+                return -ENOENT;
+        }
+        /* Need to make sure the object gets inactive eventually. */
+        ret = i915_gem_object_flush_active(obj);
+        if (ret)
+                goto out;
+        if (obj->active) {
+                seqno = obj->last_rendering_seqno;
+                ring = obj->ring;
+        }
+        if (seqno == 0)
+                 goto out;
+        /* Do this after OLR check to make sure we make forward progress polling
+         * on this IOCTL with a 0 timeout (like busy ioctl)
+         */
+        if (!args->timeout_ns) {
+                ret = -ETIME;
+                goto out;
+        }
+        drm_gem_object_unreference(&obj->base);
+        mutex_unlock(&dev->struct_mutex);
+        ret = __wait_seqno(ring, seqno, true, timeout);
+        if (timeout) {
+                WARN_ON(!timespec_valid(timeout));
+                args->timeout_ns = timespec_to_ns(timeout);
+        }
+        return ret;
+out:
+        drm_gem_object_unreference(&obj->base);
+        mutex_unlock(&dev->struct_mutex);
+        return ret;
+}
+/**
 * i915_gem_object_sync - sync an object to a ring.
 *
 * @obj: object which may be in use on another ring.
@@ -2160,7 +2354,7 @@ static int i915_ring_idle(struct intel_ring_buffer *ring)
                        return ret;
        }
-        return i915_wait_request(ring, i915_gem_next_request_seqno(ring));
+        return i915_wait_seqno(ring, i915_gem_next_request_seqno(ring));
 }
 int i915_gpu_idle(struct drm_device *dev)
@@ -2171,6 +2365,10 @@ int i915_gpu_idle(struct drm_device *dev)
        /* Flush everything onto the inactive list. */
        for_each_ring(ring, dev_priv, i) {
+                ret = i915_switch_context(ring, NULL, DEFAULT_CONTEXT_ID);
+                if (ret)
+                        return ret;
                ret = i915_ring_idle(ring);
                if (ret)
                        return ret;
@@ -2364,7 +2562,7 @@ i915_gem_object_flush_fence(struct drm_i915_gem_object *obj)
        }
        if (obj->last_fenced_seqno) {
-                ret = i915_wait_request(obj->ring, obj->last_fenced_seqno);
+                ret = i915_wait_seqno(obj->ring, obj->last_fenced_seqno);
                if (ret)
                        return ret;
@@ -2551,8 +2749,8 @@ i915_gem_object_bind_to_gtt(struct drm_i915_gem_object *obj,
        if (map_and_fenceable)
                free_space =
                        drm_mm_search_free_in_range(&dev_priv->mm.gtt_space,
-                                                    size, alignment, 0,
+                                                    size, alignment,
-                                                    dev_priv->mm.gtt_mappable_end,
+                                                    0, dev_priv->mm.gtt_mappable_end,
                                                    0);
        else
                free_space = drm_mm_search_free(&dev_priv->mm.gtt_space,
@@ -2563,7 +2761,7 @@ i915_gem_object_bind_to_gtt(struct drm_i915_gem_object *obj,
                        obj->gtt_space =
                                drm_mm_get_block_range_generic(free_space,
                                                               size, alignment, 0,
-                                                               dev_priv->mm.gtt_mappable_end,
+                                                               0, dev_priv->mm.gtt_mappable_end,
                                                               0);
                else
                        obj->gtt_space =
@@ -3030,7 +3228,7 @@ i915_gem_ring_throttle(struct drm_device *dev, struct drm_file *file)
        if (seqno == 0)
                return 0;
-        ret = __wait_seqno(ring, seqno, true);
+        ret = __wait_seqno(ring, seqno, true, NULL);
        if (ret == 0)
                queue_delayed_work(dev_priv->wq, &dev_priv->mm.retire_work, 0);
@@ -3199,30 +3397,9 @@ i915_gem_busy_ioctl(struct drm_device *dev, void *data,
         * become non-busy without any further actions, therefore emit any
         * necessary flushes here.
         */
-        args->busy = obj->active;
+        ret = i915_gem_object_flush_active(obj);
-        if (args->busy) {
-                /* Unconditionally flush objects, even when the gpu still uses this
-                 * object. Userspace calling this function indicates that it wants to
-                 * use this buffer rather sooner than later, so issuing the required
-                 * flush earlier is beneficial.
-                 */
-                if (obj->base.write_domain & I915_GEM_GPU_DOMAINS) {
-                        ret = i915_gem_flush_ring(obj->ring,
-                                                  0, obj->base.write_domain);
-                } else {
-                        ret = i915_gem_check_olr(obj->ring,
-                                                 obj->last_rendering_seqno);
-                }
-                /* Update the active list for the hardware's current position.
+        args->busy = obj->active;
-                 * Otherwise this only updates on a delayed timer or when irqs
-                 * are actually unmasked, and our working set ends up being
-                 * larger than required.
-                 */
-                i915_gem_retire_requests_ring(obj->ring);
-                args->busy = obj->active;
-        }
        drm_gem_object_unreference(&obj->base);
 unlock:
@@ -3435,6 +3612,38 @@ i915_gem_idle(struct drm_device *dev)
        return 0;
 }
+void i915_gem_l3_remap(struct drm_device *dev)
+{
+        drm_i915_private_t *dev_priv = dev->dev_private;
+        u32 misccpctl;
+        int i;
+        if (!IS_IVYBRIDGE(dev))
+                return;
+        if (!dev_priv->mm.l3_remap_info)
+                return;
+        misccpctl = I915_READ(GEN7_MISCCPCTL);
+        I915_WRITE(GEN7_MISCCPCTL, misccpctl & ~GEN7_DOP_CLOCK_GATE_ENABLE);
+        POSTING_READ(GEN7_MISCCPCTL);
+        for (i = 0; i < GEN7_L3LOG_SIZE; i += 4) {
+                u32 remap = I915_READ(GEN7_L3LOG_BASE + i);
+                if (remap && remap != dev_priv->mm.l3_remap_info[i/4])
+                        DRM_DEBUG("0x%x was already programmed to %x\n",
+                                  GEN7_L3LOG_BASE + i, remap);
+                if (remap && !dev_priv->mm.l3_remap_info[i/4])
+                        DRM_DEBUG_DRIVER("Clearing remapped register\n");
+                I915_WRITE(GEN7_L3LOG_BASE + i, dev_priv->mm.l3_remap_info[i/4]);
+        }
+        /* Make sure all the writes land before disabling dop clock gating */
+        POSTING_READ(GEN7_L3LOG_BASE);
+        I915_WRITE(GEN7_MISCCPCTL, misccpctl);
+}
 void i915_gem_init_swizzling(struct drm_device *dev)
 {
        drm_i915_private_t *dev_priv = dev->dev_private;
@@ -3518,12 +3727,33 @@ void i915_gem_init_ppgtt(struct drm_device *dev)
        }
 }
+static bool
+intel_enable_blt(struct drm_device *dev)
+{
+        if (!HAS_BLT(dev))
+                return false;
+        /* The blitter was dysfunctional on early prototypes */
+        if (IS_GEN6(dev) && dev->pdev->revision < 8) {
+                DRM_INFO("BLT not supported on this pre-production hardware;"
+                         " graphics performance will be degraded.\n");
+                return false;
+        }
+        return true;
+}
 int
 i915_gem_init_hw(struct drm_device *dev)
 {
        drm_i915_private_t *dev_priv = dev->dev_private;
        int ret;
+        if (!intel_enable_gtt())
+                return -EIO;
+        i915_gem_l3_remap(dev);
        i915_gem_init_swizzling(dev);
        ret = intel_init_render_ring_buffer(dev);
@@ -3536,7 +3766,7 @@ i915_gem_init_hw(struct drm_device *dev)
                        goto cleanup_render_ring;
        }
-        if (HAS_BLT(dev)) {
+        if (intel_enable_blt(dev)) {
                ret = intel_init_blt_ring_buffer(dev);
                if (ret)
                        goto cleanup_bsd_ring;
@@ -3544,6 +3774,11 @@ i915_gem_init_hw(struct drm_device *dev)
        dev_priv->next_seqno = 1;
+        /*
+         * XXX: There was some w/a described somewhere suggesting loading
+         * contexts before PPGTT.
+         */
+        i915_gem_context_init(dev);
        i915_gem_init_ppgtt(dev);
        return 0;
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
new file mode 100644
index 000000000000..a9d58d72bb4d
--- /dev/null
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -0,0 +1,535 @@
+/*
+ * Copyright © 2011-2012 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ * Authors:
+ *    Ben Widawsky <ben@bwidawsk.net>
+ *
+ */
+/*
+ * This file implements HW context support. On gen5+ a HW context consists of an
+ * opaque GPU object which is referenced at times of context saves and restores.
+ * With RC6 enabled, the context is also referenced as the GPU enters and exists
+ * from RC6 (GPU has it's own internal power context, except on gen5). Though
+ * something like a context does exist for the media ring, the code only
+ * supports contexts for the render ring.
+ *
+ * In software, there is a distinction between contexts created by the user,
+ * and the default HW context. The default HW context is used by GPU clients
+ * that do not request setup of their own hardware context. The default
+ * context's state is never restored to help prevent programming errors. This
+ * would happen if a client ran and piggy-backed off another clients GPU state.
+ * The default context only exists to give the GPU some offset to load as the
+ * current to invoke a save of the context we actually care about. In fact, the
+ * code could likely be constructed, albeit in a more complicated fashion, to
+ * never use the default context, though that limits the driver's ability to
+ * swap out, and/or destroy other contexts.
+ *
+ * All other contexts are created as a request by the GPU client. These contexts
+ * store GPU state, and thus allow GPU clients to not re-emit state (and
+ * potentially query certain state) at any time. The kernel driver makes
+ * certain that the appropriate commands are inserted.
+ *
+ * The context life cycle is semi-complicated in that context BOs may live
+ * longer than the context itself because of the way the hardware, and object
+ * tracking works. Below is a very crude representation of the state machine
+ * describing the context life.
+ *                                         refcount     pincount     active
+ * S0: initial state                          0            0           0
+ * S1: context created                        1            0           0
+ * S2: context is currently running           2            1           X
+ * S3: GPU referenced, but not current        2            0           1
+ * S4: context is current, but destroyed      1            1           0
+ * S5: like S3, but destroyed                 1            0           1
+ *
+ * The most common (but not all) transitions:
+ * S0->S1: client creates a context
+ * S1->S2: client submits execbuf with context
+ * S2->S3: other clients submits execbuf with context
+ * S3->S1: context object was retired
+ * S3->S2: clients submits another execbuf
+ * S2->S4: context destroy called with current context
+ * S3->S5->S0: destroy path
+ * S4->S5->S0: destroy path on current context
+ *
+ * There are two confusing terms used above:
+ *  The "current context" means the context which is currently running on the
+ *  GPU. The GPU has loaded it's state already and has stored away the gtt
+ *  offset of the BO. The GPU is not actively referencing the data at this
+ *  offset, but it will on the next context switch. The only way to avoid this
+ *  is to do a GPU reset.
+ *
+ *  An "active context' is one which was previously the "current context" and is
+ *  on the active list waiting for the next context switch to occur. Until this
+ *  happens, the object must remain at the same gtt offset. It is therefore
+ *  possible to destroy a context, but it is still active.
+ *
+ */
+#include "drmP.h"
+#include "i915_drm.h"
+#include "i915_drv.h"
+/* This is a HW constraint. The value below is the largest known requirement
+ * I've seen in a spec to date, and that was a workaround for a non-shipping
+ * part. It should be safe to decrease this, but it's more future proof as is.
+ */
+#define CONTEXT_ALIGN (64<<10)
+static struct i915_hw_context *
+i915_gem_context_get(struct drm_i915_file_private *file_priv, u32 id);
+static int do_switch(struct drm_i915_gem_object *from_obj,
+                     struct i915_hw_context *to, u32 seqno);
+static int get_context_size(struct drm_device *dev)
+{
+        struct drm_i915_private *dev_priv = dev->dev_private;
+        int ret;
+        u32 reg;
+        switch (INTEL_INFO(dev)->gen) {
+        case 6:
+                reg = I915_READ(CXT_SIZE);
+                ret = GEN6_CXT_TOTAL_SIZE(reg) * 64;
+                break;
+        case 7:
+                reg = I915_READ(GEN7_CXT_SIZE);
+                ret = GEN7_CXT_TOTAL_SIZE(reg) * 64;
+                break;
+        default:
+                BUG();
+        }
+        return ret;
+}
+static void do_destroy(struct i915_hw_context *ctx)
+{
+        struct drm_device *dev = ctx->obj->base.dev;
+        struct drm_i915_private *dev_priv = dev->dev_private;
+        if (ctx->file_priv)
+                idr_remove(&ctx->file_priv->context_idr, ctx->id);
+        else
+                BUG_ON(ctx != dev_priv->ring[RCS].default_context);
+        drm_gem_object_unreference(&ctx->obj->base);
+        kfree(ctx);
+}
+static struct i915_hw_context *
+create_hw_context(struct drm_device *dev,
+                  struct drm_i915_file_private *file_priv)
+{
+        struct drm_i915_private *dev_priv = dev->dev_private;
+        struct i915_hw_context *ctx;
+        int ret, id;
+        ctx = kzalloc(sizeof(struct drm_i915_file_private), GFP_KERNEL);
+        if (ctx == NULL)
+                return ERR_PTR(-ENOMEM);
+        ctx->obj = i915_gem_alloc_object(dev, dev_priv->hw_context_size);
+        if (ctx->obj == NULL) {
+                kfree(ctx);
+                DRM_DEBUG_DRIVER("Context object allocated failed\n");
+                return ERR_PTR(-ENOMEM);
+        }
+        /* The ring associated with the context object is handled by the normal
+         * object tracking code. We give an initial ring value simple to pass an
+         * assertion in the context switch code.
+         */
+        ctx->ring = &dev_priv->ring[RCS];
+        /* Default context will never have a file_priv */
+        if (file_priv == NULL)
+                return ctx;
+        ctx->file_priv = file_priv;
+again:
+        if (idr_pre_get(&file_priv->context_idr, GFP_KERNEL) == 0) {
+                ret = -ENOMEM;
+                DRM_DEBUG_DRIVER("idr allocation failed\n");
+                goto err_out;
+        }
+        ret = idr_get_new_above(&file_priv->context_idr, ctx,
+                                DEFAULT_CONTEXT_ID + 1, &id);
+        if (ret == 0)
+                ctx->id = id;
+        if (ret == -EAGAIN)
+                goto again;
+        else if (ret)
+                goto err_out;
+        return ctx;
+err_out:
+        do_destroy(ctx);
+        return ERR_PTR(ret);
+}
+static inline bool is_default_context(struct i915_hw_context *ctx)
+{
+        return (ctx == ctx->ring->default_context);
+}
+/**
+ * The default context needs to exist per ring that uses contexts. It stores the
+ * context state of the GPU for applications that don't utilize HW contexts, as
+ * well as an idle case.
+ */
+static int create_default_context(struct drm_i915_private *dev_priv)
+{
+        struct i915_hw_context *ctx;
+        int ret;
+        BUG_ON(!mutex_is_locked(&dev_priv->dev->struct_mutex));
+        ctx = create_hw_context(dev_priv->dev, NULL);
+        if (IS_ERR(ctx))
+                return PTR_ERR(ctx);
+        /* We may need to do things with the shrinker which require us to
+         * immediately switch back to the default context. This can cause a
+         * problem as pinning the default context also requires GTT space which
+         * may not be available. To avoid this we always pin the
+         * default context.
+         */
+        dev_priv->ring[RCS].default_context = ctx;
+        ret = i915_gem_object_pin(ctx->obj, CONTEXT_ALIGN, false);
+        if (ret) {
+                do_destroy(ctx);
+                return ret;
+        }
+        ret = do_switch(NULL, ctx, 0);
+        if (ret) {
+                i915_gem_object_unpin(ctx->obj);
+                do_destroy(ctx);
+        } else {
+                DRM_DEBUG_DRIVER("Default HW context loaded\n");
+        }
+        return ret;
+}
+void i915_gem_context_init(struct drm_device *dev)
+{
+        struct drm_i915_private *dev_priv = dev->dev_private;
+        uint32_t ctx_size;
+        if (!HAS_HW_CONTEXTS(dev)) {
+                dev_priv->hw_contexts_disabled = true;
+                return;
+        }
+        /* If called from reset, or thaw... we've been here already */
+        if (dev_priv->hw_contexts_disabled ||
+            dev_priv->ring[RCS].default_context)
+                return;
+        ctx_size = get_context_size(dev);
+        dev_priv->hw_context_size = get_context_size(dev);
+        dev_priv->hw_context_size = round_up(dev_priv->hw_context_size, 4096);
+        if (ctx_size <= 0 || ctx_size > (1<<20)) {
+                dev_priv->hw_contexts_disabled = true;
+                return;
+        }
+        if (create_default_context(dev_priv)) {
+                dev_priv->hw_contexts_disabled = true;
+                return;
+        }
+        DRM_DEBUG_DRIVER("HW context support initialized\n");
+}
+void i915_gem_context_fini(struct drm_device *dev)
+{
+        struct drm_i915_private *dev_priv = dev->dev_private;
+        if (dev_priv->hw_contexts_disabled)
+                return;
+        /* The only known way to stop the gpu from accessing the hw context is
+         * to reset it. Do this as the very last operation to avoid confusing
+         * other code, leading to spurious errors. */
+        intel_gpu_reset(dev);
+        i915_gem_object_unpin(dev_priv->ring[RCS].default_context->obj);
+        do_destroy(dev_priv->ring[RCS].default_context);
+}
+static int context_idr_cleanup(int id, void *p, void *data)
+{
+        struct i915_hw_context *ctx = p;
+        BUG_ON(id == DEFAULT_CONTEXT_ID);
+        do_destroy(ctx);
+        return 0;
+}
+void i915_gem_context_close(struct drm_device *dev, struct drm_file *file)
+{
+        struct drm_i915_file_private *file_priv = file->driver_priv;
+        mutex_lock(&dev->struct_mutex);
+        idr_for_each(&file_priv->context_idr, context_idr_cleanup, NULL);
+        idr_destroy(&file_priv->context_idr);
+        mutex_unlock(&dev->struct_mutex);
+}
+static struct i915_hw_context *
+i915_gem_context_get(struct drm_i915_file_private *file_priv, u32 id)
+{
+        return (struct i915_hw_context *)idr_find(&file_priv->context_idr, id);
+}
+static inline int
+mi_set_context(struct intel_ring_buffer *ring,
+               struct i915_hw_context *new_context,
+               u32 hw_flags)
+{
+        int ret;
+        /* w/a: If Flush TLB Invalidation Mode is enabled, driver must do a TLB
+         * invalidation prior to MI_SET_CONTEXT. On GEN6 we don't set the value
+         * explicitly, so we rely on the value at ring init, stored in
+         * itlb_before_ctx_switch.
+         */
+        if (IS_GEN6(ring->dev) && ring->itlb_before_ctx_switch) {
+                ret = ring->flush(ring, 0, 0);
+                if (ret)
+                        return ret;
+        }
+        ret = intel_ring_begin(ring, 6);
+        if (ret)
+                return ret;
+        if (IS_GEN7(ring->dev))
+                intel_ring_emit(ring, MI_ARB_ON_OFF | MI_ARB_DISABLE);
+        else
+                intel_ring_emit(ring, MI_NOOP);
+        intel_ring_emit(ring, MI_NOOP);
+        intel_ring_emit(ring, MI_SET_CONTEXT);
+        intel_ring_emit(ring, new_context->obj->gtt_offset |
+                        MI_MM_SPACE_GTT |
+                        MI_SAVE_EXT_STATE_EN |
+                        MI_RESTORE_EXT_STATE_EN |
+                        hw_flags);
+        /* w/a: MI_SET_CONTEXT must always be followed by MI_NOOP */
+        intel_ring_emit(ring, MI_NOOP);
+        if (IS_GEN7(ring->dev))
+                intel_ring_emit(ring, MI_ARB_ON_OFF | MI_ARB_ENABLE);
+        else
+                intel_ring_emit(ring, MI_NOOP);
+        intel_ring_advance(ring);
+        return ret;
+}
+static int do_switch(struct drm_i915_gem_object *from_obj,
+                     struct i915_hw_context *to,
+                     u32 seqno)
+{
+        struct intel_ring_buffer *ring = NULL;
+        u32 hw_flags = 0;
+        int ret;
+        BUG_ON(to == NULL);
+        BUG_ON(from_obj != NULL && from_obj->pin_count == 0);
+        ret = i915_gem_object_pin(to->obj, CONTEXT_ALIGN, false);
+        if (ret)
+                return ret;
+        /* Clear this page out of any CPU caches for coherent swap-in/out. Note
+         * that thanks to write = false in this call and us not setting any gpu
+         * write domains when putting a context object onto the active list
+         * (when switching away from it), this won't block.
+         * XXX: We need a real interface to do this instead of trickery. */
+        ret = i915_gem_object_set_to_gtt_domain(to->obj, false);
+        if (ret) {
+                i915_gem_object_unpin(to->obj);
+                return ret;
+        }
+        if (!to->obj->has_global_gtt_mapping)
+                i915_gem_gtt_bind_object(to->obj, to->obj->cache_level);
+        if (!to->is_initialized || is_default_context(to))
+                hw_flags |= MI_RESTORE_INHIBIT;
+        else if (WARN_ON_ONCE(from_obj == to->obj)) /* not yet expected */
+                hw_flags |= MI_FORCE_RESTORE;
+        ring = to->ring;
+        ret = mi_set_context(ring, to, hw_flags);
+        if (ret) {
+                i915_gem_object_unpin(to->obj);
+                return ret;
+        }
+        /* The backing object for the context is done after switching to the
+         * *next* context. Therefore we cannot retire the previous context until
+         * the next context has already started running. In fact, the below code
+         * is a bit suboptimal because the retiring can occur simply after the
+         * MI_SET_CONTEXT instead of when the next seqno has completed.
+         */
+        if (from_obj != NULL) {
+                from_obj->base.read_domains = I915_GEM_DOMAIN_INSTRUCTION;
+                i915_gem_object_move_to_active(from_obj, ring, seqno);
+                /* As long as MI_SET_CONTEXT is serializing, ie. it flushes the
+                 * whole damn pipeline, we don't need to explicitly mark the
+                 * object dirty. The only exception is that the context must be
+                 * correct in case the object gets swapped out. Ideally we'd be
+                 * able to defer doing this until we know the object would be
+                 * swapped, but there is no way to do that yet.
+                 */
+                from_obj->dirty = 1;
+                BUG_ON(from_obj->ring != to->ring);
+                i915_gem_object_unpin(from_obj);
+                drm_gem_object_unreference(&from_obj->base);
+        }
+        drm_gem_object_reference(&to->obj->base);
+        ring->last_context_obj = to->obj;
+        to->is_initialized = true;
+        return 0;
+}
+/**
+ * i915_switch_context() - perform a GPU context switch.
+ * @ring: ring for which we'll execute the context switch
+ * @file_priv: file_priv associated with the context, may be NULL
+ * @id: context id number
+ * @seqno: sequence number by which the new context will be switched to
+ * @flags:
+ *
+ * The context life cycle is simple. The context refcount is incremented and
+ * decremented by 1 and create and destroy. If the context is in use by the GPU,
+ * it will have a refoucnt > 1. This allows us to destroy the context abstract
+ * object while letting the normal object tracking destroy the backing BO.
+ */
+int i915_switch_context(struct intel_ring_buffer *ring,
+                        struct drm_file *file,
+                        int to_id)
+{
+        struct drm_i915_private *dev_priv = ring->dev->dev_private;
+        struct drm_i915_file_private *file_priv = NULL;
+        struct i915_hw_context *to;
+        struct drm_i915_gem_object *from_obj = ring->last_context_obj;
+        if (dev_priv->hw_contexts_disabled)
+                return 0;
+        if (ring != &dev_priv->ring[RCS])
+                return 0;
+        if (file)
+                file_priv = file->driver_priv;
+        if (to_id == DEFAULT_CONTEXT_ID) {
+                to = ring->default_context;
+        } else {
+                to = i915_gem_context_get(file_priv, to_id);
+                if (to == NULL)
+                        return -ENOENT;
+        }
+        if (from_obj == to->obj)
+                return 0;
+        return do_switch(from_obj, to, i915_gem_next_request_seqno(to->ring));
+}
+int i915_gem_context_create_ioctl(struct drm_device *dev, void *data,
+                                  struct drm_file *file)
+{
+        struct drm_i915_private *dev_priv = dev->dev_private;
+        struct drm_i915_gem_context_create *args = data;
+        struct drm_i915_file_private *file_priv = file->driver_priv;
+        struct i915_hw_context *ctx;
+        int ret;
+        if (!(dev->driver->driver_features & DRIVER_GEM))
+                return -ENODEV;
+        if (dev_priv->hw_contexts_disabled)
+                return -ENODEV;
+        ret = i915_mutex_lock_interruptible(dev);
+        if (ret)
+                return ret;
+        ctx = create_hw_context(dev, file_priv);
+        mutex_unlock(&dev->struct_mutex);
+        if (IS_ERR(ctx))
+                return PTR_ERR(ctx);
+        args->ctx_id = ctx->id;
+        DRM_DEBUG_DRIVER("HW context %d created\n", args->ctx_id);
+        return 0;
+}
+int i915_gem_context_destroy_ioctl(struct drm_device *dev, void *data,
+                                   struct drm_file *file)
+{
+        struct drm_i915_gem_context_destroy *args = data;
+        struct drm_i915_file_private *file_priv = file->driver_priv;
+        struct i915_hw_context *ctx;
+        int ret;
+        if (!(dev->driver->driver_features & DRIVER_GEM))
+                return -ENODEV;
+        ret = i915_mutex_lock_interruptible(dev);
+        if (ret)
+                return ret;
+        ctx = i915_gem_context_get(file_priv, args->ctx_id);
+        if (!ctx) {
+                mutex_unlock(&dev->struct_mutex);
+                return -ENOENT;
+        }
+        do_destroy(ctx);
+        mutex_unlock(&dev->struct_mutex);
+        DRM_DEBUG_DRIVER("HW context %d destroyed\n", args->ctx_id);
+        return 0;
+}
diff --git a/drivers/gpu/drm/i915/i915_gem_debug.c b/drivers/gpu/drm/i915/i915_gem_debug.c
index a4f6aaabca99..bddf7bed183f 100644
--- a/drivers/gpu/drm/i915/i915_gem_debug.c
+++ b/drivers/gpu/drm/i915/i915_gem_debug.c
@@ -132,7 +132,8 @@ i915_gem_object_check_coherency(struct drm_i915_gem_object *obj, int handle)
                 __func__, obj, obj->gtt_offset, handle,
                 obj->size / 1024);
-        gtt_mapping = ioremap(dev->agp->base + obj->gtt_offset, obj->base.size);
+        gtt_mapping = ioremap(dev_priv->mm.gtt_base_addr + obj->gtt_offset,
+                              obj->base.size);
        if (gtt_mapping == NULL) {
                DRM_ERROR("failed to map GTT space\n");
                return;
diff --git a/drivers/gpu/drm/i915/i915_gem_evict.c b/drivers/gpu/drm/i915/i915_gem_evict.c
index ae7c24e12e52..eba0308f10e3 100644
--- a/drivers/gpu/drm/i915/i915_gem_evict.c
+++ b/drivers/gpu/drm/i915/i915_gem_evict.c
@@ -78,11 +78,12 @@ i915_gem_evict_something(struct drm_device *dev, int min_size,
        INIT_LIST_HEAD(&unwind_list);
        if (mappable)
-                drm_mm_init_scan_with_range(&dev_priv->mm.gtt_space, min_size,
+                drm_mm_init_scan_with_range(&dev_priv->mm.gtt_space,
-                                            alignment, 0,
+                                            min_size, alignment, 0,
-                                            dev_priv->mm.gtt_mappable_end);
+                                            0, dev_priv->mm.gtt_mappable_end);
        else
-                drm_mm_init_scan(&dev_priv->mm.gtt_space, min_size, alignment);
+                drm_mm_init_scan(&dev_priv->mm.gtt_space,
+                                 min_size, alignment, 0);
        /* First see if there is a large enough contiguous idle region... */
        list_for_each_entry(obj, &dev_priv->mm.inactive_list, mm_list) {
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 974a9f1068a3..ff2819ea0813 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -291,6 +291,16 @@ i915_gem_execbuffer_relocate_entry(struct drm_i915_gem_object *obj,
        target_i915_obj = to_intel_bo(target_obj);
        target_offset = target_i915_obj->gtt_offset;
+        /* Sandybridge PPGTT errata: We need a global gtt mapping for MI and
+         * pipe_control writes because the gpu doesn't properly redirect them
+         * through the ppgtt for non_secure batchbuffers. */
+        if (unlikely(IS_GEN6(dev) &&
+            reloc->write_domain == I915_GEM_DOMAIN_INSTRUCTION &&
+            !target_i915_obj->has_global_gtt_mapping)) {
+                i915_gem_gtt_bind_object(target_i915_obj,
+                                         target_i915_obj->cache_level);
+        }
        /* The target buffer should have appeared before us in the
         * exec_object list, so it should have a GTT space bound by now.
         */
@@ -399,16 +409,6 @@ i915_gem_execbuffer_relocate_entry(struct drm_i915_gem_object *obj,
                io_mapping_unmap_atomic(reloc_page);
        }
-        /* Sandybridge PPGTT errata: We need a global gtt mapping for MI and
-         * pipe_control writes because the gpu doesn't properly redirect them
-         * through the ppgtt for non_secure batchbuffers. */
-        if (unlikely(IS_GEN6(dev) &&
-            reloc->write_domain == I915_GEM_DOMAIN_INSTRUCTION &&
-            !target_i915_obj->has_global_gtt_mapping)) {
-                i915_gem_gtt_bind_object(target_i915_obj,
-                                         target_i915_obj->cache_level);
-        }
        /* and update the user's relocation entry */
        reloc->presumed_offset = target_offset;
@@ -810,33 +810,16 @@ err:
        return ret;
 }
-static int
+static void
 i915_gem_execbuffer_flush(struct drm_device *dev,
                          uint32_t invalidate_domains,
-                          uint32_t flush_domains,
+                          uint32_t flush_domains)
-                          uint32_t flush_rings)
 {
-        drm_i915_private_t *dev_priv = dev->dev_private;
-        int i, ret;
        if (flush_domains & I915_GEM_DOMAIN_CPU)
                intel_gtt_chipset_flush();
        if (flush_domains & I915_GEM_DOMAIN_GTT)
                wmb();
-        if ((flush_domains | invalidate_domains) & I915_GEM_GPU_DOMAINS) {
-                for (i = 0; i < I915_NUM_RINGS; i++)
-                        if (flush_rings & (1 << i)) {
-                                ret = i915_gem_flush_ring(&dev_priv->ring[i],
-                                                          invalidate_domains,
-                                                          flush_domains);
-                                if (ret)
-                                        return ret;
-                        }
-        }
-        return 0;
 }
 static int
@@ -885,12 +868,9 @@ i915_gem_execbuffer_move_to_gpu(struct intel_ring_buffer *ring,
                i915_gem_object_set_to_gpu_domain(obj, ring, &cd);
        if (cd.invalidate_domains | cd.flush_domains) {
-                ret = i915_gem_execbuffer_flush(ring->dev,
+                i915_gem_execbuffer_flush(ring->dev,
-                                                cd.invalidate_domains,
+                                          cd.invalidate_domains,
-                                                cd.flush_domains,
+                                          cd.flush_domains);
-                                                cd.flush_rings);
-                if (ret)
-                        return ret;
        }
        if (cd.flips) {
@@ -905,6 +885,16 @@ i915_gem_execbuffer_move_to_gpu(struct intel_ring_buffer *ring,
                        return ret;
        }
+        /* Unconditionally invalidate gpu caches and ensure that we do flush
+         * any residual writes from the previous batch.
+         */
+        ret = i915_gem_flush_ring(ring,
+                                  I915_GEM_GPU_DOMAINS,
+                                  ring->gpu_caches_dirty ? I915_GEM_GPU_DOMAINS : 0);
+        if (ret)
+                return ret;
+        ring->gpu_caches_dirty = false;
        return 0;
 }
@@ -983,26 +973,13 @@ i915_gem_execbuffer_retire_commands(struct drm_device *dev,
                                    struct intel_ring_buffer *ring)
 {
        struct drm_i915_gem_request *request;
-        u32 invalidate;
-        /*
+        /* Unconditionally force add_request to emit a full flush. */
-         * Ensure that the commands in the batch buffer are
+        ring->gpu_caches_dirty = true;
-         * finished before the interrupt fires.
-         *
-         * The sampler always gets flushed on i965 (sigh).
-         */
-        invalidate = I915_GEM_DOMAIN_COMMAND;
-        if (INTEL_INFO(dev)->gen >= 4)
-                invalidate |= I915_GEM_DOMAIN_SAMPLER;
-        if (ring->flush(ring, invalidate, 0)) {
-                i915_gem_next_request_seqno(ring);
-                return;
-        }
        /* Add a breadcrumb for the completion of the batch buffer */
        request = kzalloc(sizeof(*request), GFP_KERNEL);
        if (request == NULL || i915_add_request(ring, file, request)) {
-                i915_gem_next_request_seqno(ring);
                kfree(request);
        }
 }
@@ -1044,6 +1021,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
        struct drm_i915_gem_object *batch_obj;
        struct drm_clip_rect *cliprects = NULL;
        struct intel_ring_buffer *ring;
+        u32 ctx_id = i915_execbuffer2_get_context_id(*args);
        u32 exec_start, exec_len;
        u32 seqno;
        u32 mask;
@@ -1065,9 +1043,19 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
                break;
        case I915_EXEC_BSD:
                ring = &dev_priv->ring[VCS];
+                if (ctx_id != 0) {
+                        DRM_DEBUG("Ring %s doesn't support contexts\n",
+                                  ring->name);
+                        return -EPERM;
+                }
                break;
        case I915_EXEC_BLT:
                ring = &dev_priv->ring[BCS];
+                if (ctx_id != 0) {
+                        DRM_DEBUG("Ring %s doesn't support contexts\n",
+                                  ring->name);
+                        return -EPERM;
+                }
                break;
        default:
                DRM_DEBUG("execbuf with unknown ring: %d\n",
@@ -1240,6 +1228,10 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
                }
        }
+        ret = i915_switch_context(ring, file, ctx_id);
+        if (ret)
+                goto err;
        if (ring == &dev_priv->ring[RCS] &&
            mode != dev_priv->relative_constants_mode) {
                ret = intel_ring_begin(ring, 4);
@@ -1367,6 +1359,7 @@ i915_gem_execbuffer(struct drm_device *dev, void *data,
        exec2.num_cliprects = args->num_cliprects;
        exec2.cliprects_ptr = args->cliprects_ptr;
        exec2.flags = I915_EXEC_RENDER;
+        i915_execbuffer2_set_context_id(exec2, 0);
        ret = i915_gem_do_execbuffer(dev, data, file, &exec2, exec2_list);
        if (!ret) {
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 9fd25a435536..60815b861ec2 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -72,7 +72,7 @@ int i915_gem_init_aliasing_ppgtt(struct drm_device *dev)
        /* ppgtt PDEs reside in the global gtt pagetable, which has 512*1024
         * entries. For aliasing ppgtt support we just steal them at the end for
         * now. */
-        first_pd_entry_in_global_pt = 512*1024 - I915_PPGTT_PD_ENTRIES;
+        first_pd_entry_in_global_pt = dev_priv->mm.gtt->gtt_total_entries - I915_PPGTT_PD_ENTRIES;
        ppgtt = kzalloc(sizeof(*ppgtt), GFP_KERNEL);
        if (!ppgtt)
@@ -261,7 +261,10 @@ void i915_ppgtt_bind_object(struct i915_hw_ppgtt *ppgtt,
                pte_flags |= GEN6_PTE_CACHE_LLC;
                break;
        case I915_CACHE_NONE:
-                pte_flags |= GEN6_PTE_UNCACHED;
+                if (IS_HASWELL(dev))
+                        pte_flags |= HSW_PTE_UNCACHED;
+                else
+                        pte_flags |= GEN6_PTE_UNCACHED;
                break;
        default:
                BUG();
@@ -361,7 +364,8 @@ int i915_gem_gtt_prepare_object(struct drm_i915_gem_object *obj)
        struct drm_device *dev = obj->base.dev;
        struct drm_i915_private *dev_priv = dev->dev_private;
-        if (dev_priv->mm.gtt->needs_dmar)
+        /* don't map imported dma buf objects */
+        if (dev_priv->mm.gtt->needs_dmar && !obj->sg_table)
                return intel_gtt_map_memory(obj->pages,
                                            obj->base.size >> PAGE_SHIFT,
                                            &obj->sg_list,
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index b1fe0edda955..8a3828528b9d 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -375,6 +375,86 @@ static void gen6_pm_rps_work(struct work_struct *work)
        mutex_unlock(&dev_priv->dev->struct_mutex);
 }
+/**
+ * ivybridge_parity_work - Workqueue called when a parity error interrupt
+ * occurred.
+ * @work: workqueue struct
+ *
+ * Doesn't actually do anything except notify userspace. As a consequence of
+ * this event, userspace should try to remap the bad rows since statistically
+ * it is likely the same row is more likely to go bad again.
+ */
+static void ivybridge_parity_work(struct work_struct *work)
+{
+        drm_i915_private_t *dev_priv = container_of(work, drm_i915_private_t,
+                                                    parity_error_work);
+        u32 error_status, row, bank, subbank;
+        char *parity_event[5];
+        uint32_t misccpctl;
+        unsigned long flags;
+        /* We must turn off DOP level clock gating to access the L3 registers.
+         * In order to prevent a get/put style interface, acquire struct mutex
+         * any time we access those registers.
+         */
+        mutex_lock(&dev_priv->dev->struct_mutex);
+        misccpctl = I915_READ(GEN7_MISCCPCTL);
+        I915_WRITE(GEN7_MISCCPCTL, misccpctl & ~GEN7_DOP_CLOCK_GATE_ENABLE);
+        POSTING_READ(GEN7_MISCCPCTL);
+        error_status = I915_READ(GEN7_L3CDERRST1);
+        row = GEN7_PARITY_ERROR_ROW(error_status);
+        bank = GEN7_PARITY_ERROR_BANK(error_status);
+        subbank = GEN7_PARITY_ERROR_SUBBANK(error_status);
+        I915_WRITE(GEN7_L3CDERRST1, GEN7_PARITY_ERROR_VALID |
+                                    GEN7_L3CDERRST1_ENABLE);
+        POSTING_READ(GEN7_L3CDERRST1);
+        I915_WRITE(GEN7_MISCCPCTL, misccpctl);
+        spin_lock_irqsave(&dev_priv->irq_lock, flags);
+        dev_priv->gt_irq_mask &= ~GT_GEN7_L3_PARITY_ERROR_INTERRUPT;
+        I915_WRITE(GTIMR, dev_priv->gt_irq_mask);
+        spin_unlock_irqrestore(&dev_priv->irq_lock, flags);
+        mutex_unlock(&dev_priv->dev->struct_mutex);
+        parity_event[0] = "L3_PARITY_ERROR=1";
+        parity_event[1] = kasprintf(GFP_KERNEL, "ROW=%d", row);
+        parity_event[2] = kasprintf(GFP_KERNEL, "BANK=%d", bank);
+        parity_event[3] = kasprintf(GFP_KERNEL, "SUBBANK=%d", subbank);
+        parity_event[4] = NULL;
+        kobject_uevent_env(&dev_priv->dev->primary->kdev.kobj,
+                           KOBJ_CHANGE, parity_event);
+        DRM_DEBUG("Parity error: Row = %d, Bank = %d, Sub bank = %d.\n",
+                  row, bank, subbank);
+        kfree(parity_event[3]);
+        kfree(parity_event[2]);
+        kfree(parity_event[1]);
+}
+static void ivybridge_handle_parity_error(struct drm_device *dev)
+{
+        drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
+        unsigned long flags;
+        if (!IS_IVYBRIDGE(dev))
+                return;
+        spin_lock_irqsave(&dev_priv->irq_lock, flags);
+        dev_priv->gt_irq_mask |= GT_GEN7_L3_PARITY_ERROR_INTERRUPT;
+        I915_WRITE(GTIMR, dev_priv->gt_irq_mask);
+        spin_unlock_irqrestore(&dev_priv->irq_lock, flags);
+        queue_work(dev_priv->wq, &dev_priv->parity_error_work);
+}
 static void snb_gt_irq_handler(struct drm_device *dev,
                               struct drm_i915_private *dev_priv,
                               u32 gt_iir)
@@ -394,6 +474,9 @@ static void snb_gt_irq_handler(struct drm_device *dev,
                DRM_ERROR("GT error interrupt 0x%08x\n", gt_iir);
                i915_handle_error(dev, false);
        }
+        if (gt_iir & GT_GEN7_L3_PARITY_ERROR_INTERRUPT)
+                ivybridge_handle_parity_error(dev);
 }
 static void gen6_queue_rps_work(struct drm_i915_private *dev_priv,
@@ -412,7 +495,6 @@ static void gen6_queue_rps_work(struct drm_i915_private *dev_priv,
         */
        spin_lock_irqsave(&dev_priv->rps_lock, flags);
-        WARN(dev_priv->pm_iir & pm_iir, "Missed a PM interrupt\n");
        dev_priv->pm_iir |= pm_iir;
        I915_WRITE(GEN6_PMIMR, dev_priv->pm_iir);
        POSTING_READ(GEN6_PMIMR);
@@ -430,15 +512,10 @@ static irqreturn_t valleyview_irq_handler(DRM_IRQ_ARGS)
        unsigned long irqflags;
        int pipe;
        u32 pipe_stats[I915_MAX_PIPES];
-        u32 vblank_status;
-        int vblank = 0;
        bool blc_event;
        atomic_inc(&dev_priv->irq_received);
-        vblank_status = PIPE_START_VBLANK_INTERRUPT_STATUS |
-                PIPE_VBLANK_INTERRUPT_STATUS;
        while (true) {
                iir = I915_READ(VLV_IIR);
                gt_iir = I915_READ(GTIIR);
@@ -468,6 +545,16 @@ static irqreturn_t valleyview_irq_handler(DRM_IRQ_ARGS)
                }
                spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
+                for_each_pipe(pipe) {
+                        if (pipe_stats[pipe] & PIPE_VBLANK_INTERRUPT_STATUS)
+                                drm_handle_vblank(dev, pipe);
+                        if (pipe_stats[pipe] & PLANE_FLIPDONE_INT_STATUS_VLV) {
+                                intel_prepare_page_flip(dev, pipe);
+                                intel_finish_page_flip(dev, pipe);
+                        }
+                }
                /* Consume port.  Then clear IIR or we'll miss events */
                if (iir & I915_DISPLAY_PORT_INTERRUPT) {
                        u32 hotplug_status = I915_READ(PORT_HOTPLUG_STAT);
@@ -482,19 +569,6 @@ static irqreturn_t valleyview_irq_handler(DRM_IRQ_ARGS)
                        I915_READ(PORT_HOTPLUG_STAT);
                }
-                if (iir & I915_DISPLAY_PIPE_A_VBLANK_INTERRUPT) {
-                        drm_handle_vblank(dev, 0);
-                        vblank++;
-                        intel_finish_page_flip(dev, 0);
-                }
-                if (iir & I915_DISPLAY_PIPE_B_VBLANK_INTERRUPT) {
-                        drm_handle_vblank(dev, 1);
-                        vblank++;
-                        intel_finish_page_flip(dev, 0);
-                }
                if (pipe_stats[pipe] & PIPE_LEGACY_BLC_EVENT_STATUS)
                        blc_event = true;
@@ -992,6 +1066,7 @@ static void i915_record_ring_state(struct drm_device *dev,
        struct drm_i915_private *dev_priv = dev->dev_private;
        if (INTEL_INFO(dev)->gen >= 6) {
+                error->rc_psmi[ring->id] = I915_READ(ring->mmio_base + 0x50);
                error->fault_reg[ring->id] = I915_READ(RING_FAULT_REG(ring));
                error->semaphore_mboxes[ring->id][0]
                        = I915_READ(RING_SYNC_0(ring->mmio_base));
@@ -1105,6 +1180,7 @@ static void i915_capture_error_state(struct drm_device *dev)
        kref_init(&error->ref);
        error->eir = I915_READ(EIR);
        error->pgtbl_er = I915_READ(PGTBL_ER);
+        error->ccid = I915_READ(CCID);
        if (HAS_PCH_SPLIT(dev))
                error->ier = I915_READ(DEIER) | I915_READ(GTIER);
@@ -1427,23 +1503,20 @@ static int valleyview_enable_vblank(struct drm_device *dev, int pipe)
 {
        drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
        unsigned long irqflags;
-        u32 dpfl, imr;
+        u32 imr;
        if (!i915_pipe_enabled(dev, pipe))
                return -EINVAL;
        spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
-        dpfl = I915_READ(VLV_DPFLIPSTAT);
        imr = I915_READ(VLV_IMR);
-        if (pipe == 0) {
+        if (pipe == 0)
-                dpfl |= PIPEA_VBLANK_INT_EN;
                imr &= ~I915_DISPLAY_PIPE_A_VBLANK_INTERRUPT;
-        } else {
+        else
-                dpfl |= PIPEA_VBLANK_INT_EN;
                imr &= ~I915_DISPLAY_PIPE_B_VBLANK_INTERRUPT;
-        }
-        I915_WRITE(VLV_DPFLIPSTAT, dpfl);
        I915_WRITE(VLV_IMR, imr);
+        i915_enable_pipestat(dev_priv, pipe,
+                             PIPE_START_VBLANK_INTERRUPT_ENABLE);
        spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
        return 0;
@@ -1493,20 +1566,17 @@ static void valleyview_disable_vblank(struct drm_device *dev, int pipe)
 {
        drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
        unsigned long irqflags;
-        u32 dpfl, imr;
+        u32 imr;
        spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
-        dpfl = I915_READ(VLV_DPFLIPSTAT);
+        i915_disable_pipestat(dev_priv, pipe,
+                              PIPE_START_VBLANK_INTERRUPT_ENABLE);
        imr = I915_READ(VLV_IMR);
-        if (pipe == 0) {
+        if (pipe == 0)
-                dpfl &= ~PIPEA_VBLANK_INT_EN;
                imr |= I915_DISPLAY_PIPE_A_VBLANK_INTERRUPT;
-        } else {
+        else
-                dpfl &= ~PIPEB_VBLANK_INT_EN;
                imr |= I915_DISPLAY_PIPE_B_VBLANK_INTERRUPT;
-        }
        I915_WRITE(VLV_IMR, imr);
-        I915_WRITE(VLV_DPFLIPSTAT, dpfl);
        spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
 }
@@ -1649,7 +1719,6 @@ static void ironlake_irq_preinstall(struct drm_device *dev)
        atomic_set(&dev_priv->irq_received, 0);
        I915_WRITE(HWSTAM, 0xeffe);
        /* XXX hotplug from PCH */
@@ -1812,13 +1881,13 @@ static int ivybridge_irq_postinstall(struct drm_device *dev)
                   DE_PIPEA_VBLANK_IVB);
        POSTING_READ(DEIER);
-        dev_priv->gt_irq_mask = ~0;
+        dev_priv->gt_irq_mask = ~GT_GEN7_L3_PARITY_ERROR_INTERRUPT;
        I915_WRITE(GTIIR, I915_READ(GTIIR));
        I915_WRITE(GTIMR, dev_priv->gt_irq_mask);
        render_irqs = GT_USER_INTERRUPT | GEN6_BSD_USER_INTERRUPT |
-                GEN6_BLITTER_USER_INTERRUPT;
+                GEN6_BLITTER_USER_INTERRUPT | GT_GEN7_L3_PARITY_ERROR_INTERRUPT;
        I915_WRITE(GTIER, render_irqs);
        POSTING_READ(GTIER);
@@ -1841,16 +1910,24 @@ static int ivybridge_irq_postinstall(struct drm_device *dev)
 static int valleyview_irq_postinstall(struct drm_device *dev)
 {
        drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
-        u32 render_irqs;
        u32 enable_mask;
        u32 hotplug_en = I915_READ(PORT_HOTPLUG_EN);
+        u32 pipestat_enable = PLANE_FLIP_DONE_INT_EN_VLV;
        u16 msid;
        enable_mask = I915_DISPLAY_PORT_INTERRUPT;
-        enable_mask |= I915_DISPLAY_PIPE_A_VBLANK_INTERRUPT |
+        enable_mask |= I915_DISPLAY_PIPE_A_EVENT_INTERRUPT |
+                I915_DISPLAY_PIPE_A_VBLANK_INTERRUPT |
+                I915_DISPLAY_PIPE_B_EVENT_INTERRUPT |
                I915_DISPLAY_PIPE_B_VBLANK_INTERRUPT;
-        dev_priv->irq_mask = ~enable_mask;
+        /*
+         *Leave vblank interrupts masked initially.  enable/disable will
+         * toggle them based on usage.
+         */
+        dev_priv->irq_mask = (~enable_mask) |
+                I915_DISPLAY_PIPE_A_VBLANK_INTERRUPT |
+                I915_DISPLAY_PIPE_B_VBLANK_INTERRUPT;
        dev_priv->pipestat[0] = 0;
        dev_priv->pipestat[1] = 0;
@@ -1869,26 +1946,27 @@ static int valleyview_irq_postinstall(struct drm_device *dev)
        I915_WRITE(PIPESTAT(1), 0xffff);
        POSTING_READ(VLV_IER);
+        i915_enable_pipestat(dev_priv, 0, pipestat_enable);
+        i915_enable_pipestat(dev_priv, 1, pipestat_enable);
        I915_WRITE(VLV_IIR, 0xffffffff);
        I915_WRITE(VLV_IIR, 0xffffffff);
-        render_irqs = GT_GEN6_BLT_FLUSHDW_NOTIFY_INTERRUPT |
+        dev_priv->gt_irq_mask = ~0;
-                GT_GEN6_BLT_CS_ERROR_INTERRUPT |
-                GT_GEN6_BLT_USER_INTERRUPT |
-                GT_GEN6_BSD_USER_INTERRUPT |
-                GT_GEN6_BSD_CS_ERROR_INTERRUPT |
-                GT_GEN7_L3_PARITY_ERROR_INTERRUPT |
-                GT_PIPE_NOTIFY |
-                GT_RENDER_CS_ERROR_INTERRUPT |
-                GT_SYNC_STATUS |
-                GT_USER_INTERRUPT;
-        dev_priv->gt_irq_mask = ~render_irqs;
        I915_WRITE(GTIIR, I915_READ(GTIIR));
        I915_WRITE(GTIIR, I915_READ(GTIIR));
-        I915_WRITE(GTIMR, 0);
+        I915_WRITE(GTIMR, dev_priv->gt_irq_mask);
-        I915_WRITE(GTIER, render_irqs);
+        I915_WRITE(GTIER, GT_GEN6_BLT_FLUSHDW_NOTIFY_INTERRUPT |
+                   GT_GEN6_BLT_CS_ERROR_INTERRUPT |
+                   GT_GEN6_BLT_USER_INTERRUPT |
+                   GT_GEN6_BSD_USER_INTERRUPT |
+                   GT_GEN6_BSD_CS_ERROR_INTERRUPT |
+                   GT_GEN7_L3_PARITY_ERROR_INTERRUPT |
+                   GT_PIPE_NOTIFY |
+                   GT_RENDER_CS_ERROR_INTERRUPT |
+                   GT_SYNC_STATUS |
+                   GT_USER_INTERRUPT);
        POSTING_READ(GTIER);
        /* ack & enable invalid PTE error interrupts */
@@ -2167,9 +2245,9 @@ static int i915_irq_postinstall(struct drm_device *dev)
                        hotplug_en |= HDMIC_HOTPLUG_INT_EN;
                if (dev_priv->hotplug_supported_mask & HDMID_HOTPLUG_INT_STATUS)
                        hotplug_en |= HDMID_HOTPLUG_INT_EN;
-                if (dev_priv->hotplug_supported_mask & SDVOC_HOTPLUG_INT_STATUS)
+                if (dev_priv->hotplug_supported_mask & SDVOC_HOTPLUG_INT_STATUS_I915)
                        hotplug_en |= SDVOC_HOTPLUG_INT_EN;
-                if (dev_priv->hotplug_supported_mask & SDVOB_HOTPLUG_INT_STATUS)
+                if (dev_priv->hotplug_supported_mask & SDVOB_HOTPLUG_INT_STATUS_I915)
                        hotplug_en |= SDVOB_HOTPLUG_INT_EN;
                if (dev_priv->hotplug_supported_mask & CRT_HOTPLUG_INT_STATUS) {
                        hotplug_en |= CRT_HOTPLUG_INT_EN;
@@ -2329,10 +2407,8 @@ static void i965_irq_preinstall(struct drm_device * dev)
        atomic_set(&dev_priv->irq_received, 0);
-        if (I915_HAS_HOTPLUG(dev)) {
+        I915_WRITE(PORT_HOTPLUG_EN, 0);
-                I915_WRITE(PORT_HOTPLUG_EN, 0);
+        I915_WRITE(PORT_HOTPLUG_STAT, I915_READ(PORT_HOTPLUG_STAT));
-                I915_WRITE(PORT_HOTPLUG_STAT, I915_READ(PORT_HOTPLUG_STAT));
-        }
        I915_WRITE(HWSTAM, 0xeffe);
        for_each_pipe(pipe)
@@ -2345,11 +2421,13 @@ static void i965_irq_preinstall(struct drm_device * dev)
 static int i965_irq_postinstall(struct drm_device *dev)
 {
        drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
+        u32 hotplug_en;
        u32 enable_mask;
        u32 error_mask;
        /* Unmask the interrupts that we always want on. */
        dev_priv->irq_mask = ~(I915_ASLE_INTERRUPT |
+                               I915_DISPLAY_PORT_INTERRUPT |
                               I915_DISPLAY_PIPE_A_EVENT_INTERRUPT |
                               I915_DISPLAY_PIPE_B_EVENT_INTERRUPT |
                               I915_DISPLAY_PLANE_A_FLIP_PENDING_INTERRUPT |
@@ -2365,13 +2443,6 @@ static int i965_irq_postinstall(struct drm_device *dev)
        dev_priv->pipestat[0] = 0;
        dev_priv->pipestat[1] = 0;
-        if (I915_HAS_HOTPLUG(dev)) {
-                /* Enable in IER... */
-                enable_mask |= I915_DISPLAY_PORT_INTERRUPT;
-                /* and unmask in IMR */
-                dev_priv->irq_mask &= ~I915_DISPLAY_PORT_INTERRUPT;
-        }
        /*
         * Enable some error detection, note the instruction error mask
         * bit is reserved, so we leave it masked.
@@ -2391,36 +2462,40 @@ static int i965_irq_postinstall(struct drm_device *dev)
        I915_WRITE(IER, enable_mask);
        POSTING_READ(IER);
-        if (I915_HAS_HOTPLUG(dev)) {
+        /* Note HDMI and DP share hotplug bits */
-                u32 hotplug_en = I915_READ(PORT_HOTPLUG_EN);
+        hotplug_en = 0;
+        if (dev_priv->hotplug_supported_mask & HDMIB_HOTPLUG_INT_STATUS)
-                /* Note HDMI and DP share bits */
+                hotplug_en |= HDMIB_HOTPLUG_INT_EN;
-                if (dev_priv->hotplug_supported_mask & HDMIB_HOTPLUG_INT_STATUS)
+        if (dev_priv->hotplug_supported_mask & HDMIC_HOTPLUG_INT_STATUS)
-                        hotplug_en |= HDMIB_HOTPLUG_INT_EN;
+                hotplug_en |= HDMIC_HOTPLUG_INT_EN;
-                if (dev_priv->hotplug_supported_mask & HDMIC_HOTPLUG_INT_STATUS)
+        if (dev_priv->hotplug_supported_mask & HDMID_HOTPLUG_INT_STATUS)
-                        hotplug_en |= HDMIC_HOTPLUG_INT_EN;
+                hotplug_en |= HDMID_HOTPLUG_INT_EN;
-                if (dev_priv->hotplug_supported_mask & HDMID_HOTPLUG_INT_STATUS)
+        if (IS_G4X(dev)) {
-                        hotplug_en |= HDMID_HOTPLUG_INT_EN;
+                if (dev_priv->hotplug_supported_mask & SDVOC_HOTPLUG_INT_STATUS_G4X)
-                if (dev_priv->hotplug_supported_mask & SDVOC_HOTPLUG_INT_STATUS)
                        hotplug_en |= SDVOC_HOTPLUG_INT_EN;
-                if (dev_priv->hotplug_supported_mask & SDVOB_HOTPLUG_INT_STATUS)
+                if (dev_priv->hotplug_supported_mask & SDVOB_HOTPLUG_INT_STATUS_G4X)
                        hotplug_en |= SDVOB_HOTPLUG_INT_EN;
-                if (dev_priv->hotplug_supported_mask & CRT_HOTPLUG_INT_STATUS) {
+        } else {
-                        hotplug_en |= CRT_HOTPLUG_INT_EN;
+                if (dev_priv->hotplug_supported_mask & SDVOC_HOTPLUG_INT_STATUS_I965)
+                        hotplug_en |= SDVOC_HOTPLUG_INT_EN;
+                if (dev_priv->hotplug_supported_mask & SDVOB_HOTPLUG_INT_STATUS_I965)
+                        hotplug_en |= SDVOB_HOTPLUG_INT_EN;
+        }
+        if (dev_priv->hotplug_supported_mask & CRT_HOTPLUG_INT_STATUS) {
+                hotplug_en |= CRT_HOTPLUG_INT_EN;
-                        /* Programming the CRT detection parameters tends
+                /* Programming the CRT detection parameters tends
-                           to generate a spurious hotplug event about three
+                   to generate a spurious hotplug event about three
-                           seconds later.  So just do it once.
+                   seconds later.  So just do it once.
-                        */
+                   */
-                        if (IS_G4X(dev))
+                if (IS_G4X(dev))
-                                hotplug_en |= CRT_HOTPLUG_ACTIVATION_PERIOD_64;
+                        hotplug_en |= CRT_HOTPLUG_ACTIVATION_PERIOD_64;
-                        hotplug_en |= CRT_HOTPLUG_VOLTAGE_COMPARE_50;
+                hotplug_en |= CRT_HOTPLUG_VOLTAGE_COMPARE_50;
-                }
+        }
-                /* Ignore TV since it's buggy */
+        /* Ignore TV since it's buggy */
-                I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
+        I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
-        }
        intel_opregion_enable_asle(dev);
@@ -2478,8 +2553,7 @@ static irqreturn_t i965_irq_handler(DRM_IRQ_ARGS)
                ret = IRQ_HANDLED;
                /* Consume port.  Then clear IIR or we'll miss events */
-                if ((I915_HAS_HOTPLUG(dev)) &&
+                if (iir & I915_DISPLAY_PORT_INTERRUPT) {
-                    (iir & I915_DISPLAY_PORT_INTERRUPT)) {
                        u32 hotplug_status = I915_READ(PORT_HOTPLUG_STAT);
                        DRM_DEBUG_DRIVER("hotplug event received, stat 0x%08x\n",
@@ -2552,10 +2626,8 @@ static void i965_irq_uninstall(struct drm_device * dev)
        if (!dev_priv)
                return;
-        if (I915_HAS_HOTPLUG(dev)) {
+        I915_WRITE(PORT_HOTPLUG_EN, 0);
-                I915_WRITE(PORT_HOTPLUG_EN, 0);
+        I915_WRITE(PORT_HOTPLUG_STAT, I915_READ(PORT_HOTPLUG_STAT));
-                I915_WRITE(PORT_HOTPLUG_STAT, I915_READ(PORT_HOTPLUG_STAT));
-        }
        I915_WRITE(HWSTAM, 0xffffffff);
        for_each_pipe(pipe)
@@ -2576,6 +2648,7 @@ void intel_irq_init(struct drm_device *dev)
        INIT_WORK(&dev_priv->hotplug_work, i915_hotplug_work_func);
        INIT_WORK(&dev_priv->error_work, i915_error_work_func);
        INIT_WORK(&dev_priv->rps_work, gen6_pm_rps_work);
+        INIT_WORK(&dev_priv->parity_error_work, ivybridge_parity_work);
        dev->driver->get_vblank_counter = i915_get_vblank_counter;
        dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 48d5e8e051cf..28725ce5b82c 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -115,6 +115,7 @@
 #define GEN6_PTE_VALID                  (1 << 0)
 #define GEN6_PTE_UNCACHED               (1 << 1)
+#define HSW_PTE_UNCACHED                (0)
 #define GEN6_PTE_CACHE_LLC              (2 << 1)
 #define GEN6_PTE_CACHE_LLC_MLC          (3 << 1)
 #define GEN6_PTE_CACHE_BITS             (3 << 1)
@@ -217,6 +218,9 @@
 #define   MI_DISPLAY_FLIP_IVB_SPRITE_B (3 << 19)
 #define   MI_DISPLAY_FLIP_IVB_PLANE_C  (4 << 19)
 #define   MI_DISPLAY_FLIP_IVB_SPRITE_C (5 << 19)
+#define MI_ARB_ON_OFF           MI_INSTR(0x08, 0)
+#define   MI_ARB_ENABLE                 (1<<0)
+#define   MI_ARB_DISABLE                (0<<0)
 #define MI_SET_CONTEXT          MI_INSTR(0x18, 0)
 #define   MI_MM_SPACE_GTT               (1<<8)
@@ -299,6 +303,7 @@
 #define   DISPLAY_PLANE_B           (1<<20)
 #define GFX_OP_PIPE_CONTROL(len)        ((0x3<<29)|(0x3<<27)|(0x2<<24)|(len-2))
 #define   PIPE_CONTROL_CS_STALL                         (1<<20)
+#define   PIPE_CONTROL_TLB_INVALIDATE                   (1<<18)
 #define   PIPE_CONTROL_QW_WRITE                         (1<<14)
 #define   PIPE_CONTROL_DEPTH_STALL                      (1<<13)
 #define   PIPE_CONTROL_WRITE_FLUSH                      (1<<12)
@@ -686,10 +691,10 @@
 #define   GEN6_BLITTER_FBC_NOTIFY                       (1<<3)
 #define GEN6_BSD_SLEEP_PSMI_CONTROL     0x12050
author	Al Viro <viro@zeniv.linux.org.uk>	2008-12-04 09:50:55 -0500
committer	Al Viro <viro@zeniv.linux.org.uk>	2009-01-05 11:53:07 -0500
commit	c765d479037808532310212e9b3fa95760e975f2 (patch)
tree	74c9f5570a9a5477522bdf203067303b2e9ef6d3
parent	7f5ff766a7babd72fc192125e12ef5570effff4c (diff)