diff options
author | Kevin Hilman <khilman@mvista.com> | 2007-05-05 14:40:29 -0400 |
---|---|---|
committer | Tony Lindgren <tony@atomide.com> | 2008-02-08 13:37:59 -0500 |
commit | 5eb3bb9c0d123ad84ed5127fbc62731896d87181 (patch) | |
tree | af1209a8572410d06bc56c97d30dad6687af95f6 | |
parent | d11ac9791b87efb24506b6391a965b789385157c (diff) |
ARM: OMAP: Add 24xx GPIO debounce support
Add 24xx GPIO debounce support. Also minor formatting
clean-up.
Signed-off-by: Kevin Hilman <khilman@mvista.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
-rw-r--r-- | arch/arm/plat-omap/gpio.c | 60 | ||||
-rw-r--r-- | include/asm-arm/arch-omap/gpio.h | 2 |
2 files changed, 57 insertions, 5 deletions
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c index c233ebd7639a..56f4d1394d56 100644 --- a/arch/arm/plat-omap/gpio.c +++ b/arch/arm/plat-omap/gpio.c | |||
@@ -110,6 +110,8 @@ | |||
110 | #define OMAP24XX_GPIO_LEVELDETECT1 0x0044 | 110 | #define OMAP24XX_GPIO_LEVELDETECT1 0x0044 |
111 | #define OMAP24XX_GPIO_RISINGDETECT 0x0048 | 111 | #define OMAP24XX_GPIO_RISINGDETECT 0x0048 |
112 | #define OMAP24XX_GPIO_FALLINGDETECT 0x004c | 112 | #define OMAP24XX_GPIO_FALLINGDETECT 0x004c |
113 | #define OMAP24XX_GPIO_DEBOUNCE_EN 0x0050 | ||
114 | #define OMAP24XX_GPIO_DEBOUNCE_VAL 0x0054 | ||
113 | #define OMAP24XX_GPIO_CLEARIRQENABLE1 0x0060 | 115 | #define OMAP24XX_GPIO_CLEARIRQENABLE1 0x0060 |
114 | #define OMAP24XX_GPIO_SETIRQENABLE1 0x0064 | 116 | #define OMAP24XX_GPIO_SETIRQENABLE1 0x0064 |
115 | #define OMAP24XX_GPIO_CLEARWKUENA 0x0080 | 117 | #define OMAP24XX_GPIO_CLEARWKUENA 0x0080 |
@@ -463,8 +465,50 @@ do { \ | |||
463 | __raw_writel(l, base + reg); \ | 465 | __raw_writel(l, base + reg); \ |
464 | } while(0) | 466 | } while(0) |
465 | 467 | ||
468 | void omap_set_gpio_debounce(int gpio, int enable) | ||
469 | { | ||
470 | struct gpio_bank *bank; | ||
471 | void __iomem *reg; | ||
472 | u32 val, l = 1 << get_gpio_index(gpio); | ||
473 | |||
474 | if (cpu_class_is_omap1()) | ||
475 | return; | ||
476 | |||
477 | bank = get_gpio_bank(gpio); | ||
478 | reg = bank->base; | ||
479 | |||
480 | reg += OMAP24XX_GPIO_DEBOUNCE_EN; | ||
481 | val = __raw_readl(reg); | ||
482 | |||
483 | if (enable) | ||
484 | val |= l; | ||
485 | else | ||
486 | val &= ~l; | ||
487 | |||
488 | __raw_writel(val, reg); | ||
489 | } | ||
490 | EXPORT_SYMBOL(omap_set_gpio_debounce); | ||
491 | |||
492 | void omap_set_gpio_debounce_time(int gpio, int enc_time) | ||
493 | { | ||
494 | struct gpio_bank *bank; | ||
495 | void __iomem *reg; | ||
496 | |||
497 | if (cpu_class_is_omap1()) | ||
498 | return; | ||
499 | |||
500 | bank = get_gpio_bank(gpio); | ||
501 | reg = bank->base; | ||
502 | |||
503 | enc_time &= 0xff; | ||
504 | reg += OMAP24XX_GPIO_DEBOUNCE_VAL; | ||
505 | __raw_writel(enc_time, reg); | ||
506 | } | ||
507 | EXPORT_SYMBOL(omap_set_gpio_debounce_time); | ||
508 | |||
466 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) | 509 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) |
467 | static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger) | 510 | static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio, |
511 | int trigger) | ||
468 | { | 512 | { |
469 | void __iomem *base = bank->base; | 513 | void __iomem *base = bank->base; |
470 | u32 gpio_bit = 1 << gpio; | 514 | u32 gpio_bit = 1 << gpio; |
@@ -477,19 +521,25 @@ static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio, in | |||
477 | trigger & __IRQT_RISEDGE); | 521 | trigger & __IRQT_RISEDGE); |
478 | MOD_REG_BIT(OMAP24XX_GPIO_FALLINGDETECT, gpio_bit, | 522 | MOD_REG_BIT(OMAP24XX_GPIO_FALLINGDETECT, gpio_bit, |
479 | trigger & __IRQT_FALEDGE); | 523 | trigger & __IRQT_FALEDGE); |
524 | |||
480 | if (likely(!(bank->non_wakeup_gpios & gpio_bit))) { | 525 | if (likely(!(bank->non_wakeup_gpios & gpio_bit))) { |
481 | if (trigger != 0) | 526 | if (trigger != 0) |
482 | __raw_writel(1 << gpio, bank->base + OMAP24XX_GPIO_SETWKUENA); | 527 | __raw_writel(1 << gpio, bank->base |
528 | + OMAP24XX_GPIO_SETWKUENA); | ||
483 | else | 529 | else |
484 | __raw_writel(1 << gpio, bank->base + OMAP24XX_GPIO_CLEARWKUENA); | 530 | __raw_writel(1 << gpio, bank->base |
531 | + OMAP24XX_GPIO_CLEARWKUENA); | ||
485 | } else { | 532 | } else { |
486 | if (trigger != 0) | 533 | if (trigger != 0) |
487 | bank->enabled_non_wakeup_gpios |= gpio_bit; | 534 | bank->enabled_non_wakeup_gpios |= gpio_bit; |
488 | else | 535 | else |
489 | bank->enabled_non_wakeup_gpios &= ~gpio_bit; | 536 | bank->enabled_non_wakeup_gpios &= ~gpio_bit; |
490 | } | 537 | } |
491 | /* FIXME: Possibly do 'set_irq_handler(j, handle_level_irq)' if only level | 538 | |
492 | * triggering requested. */ | 539 | /* |
540 | * FIXME: Possibly do 'set_irq_handler(j, handle_level_irq)' if only | ||
541 | * level triggering requested. | ||
542 | */ | ||
493 | } | 543 | } |
494 | #endif | 544 | #endif |
495 | 545 | ||
diff --git a/include/asm-arm/arch-omap/gpio.h b/include/asm-arm/arch-omap/gpio.h index c782ef9a2ace..164da09be095 100644 --- a/include/asm-arm/arch-omap/gpio.h +++ b/include/asm-arm/arch-omap/gpio.h | |||
@@ -77,6 +77,8 @@ extern void omap_free_gpio(int gpio); | |||
77 | extern void omap_set_gpio_direction(int gpio, int is_input); | 77 | extern void omap_set_gpio_direction(int gpio, int is_input); |
78 | extern void omap_set_gpio_dataout(int gpio, int enable); | 78 | extern void omap_set_gpio_dataout(int gpio, int enable); |
79 | extern int omap_get_gpio_datain(int gpio); | 79 | extern int omap_get_gpio_datain(int gpio); |
80 | extern void omap_set_gpio_debounce(int gpio, int enable); | ||
81 | extern void omap_set_gpio_debounce_time(int gpio, int enable); | ||
80 | 82 | ||
81 | /*-------------------------------------------------------------------------*/ | 83 | /*-------------------------------------------------------------------------*/ |
82 | 84 | ||