diff options
author | Steven Toth <stoth@hauppauge.com> | 2008-07-01 09:43:27 -0400 |
---|---|---|
committer | Mauro Carvalho Chehab <mchehab@infradead.org> | 2008-07-26 11:54:31 -0400 |
commit | d8d12b4367e2e759f65c5f9dcb94d21ec237bbc5 (patch) | |
tree | 606a71d9f9da67334ef835b8605731998ce1b526 | |
parent | 6df516905b5c53b306d90be33f9c56434e8db053 (diff) |
V4L/DVB (8471): cx23885: Reallocated the sram to avoid concurrent VIDB/C issues.
This may be cx23885 chip specific and may not work on the cx23887.
Analog and mpeg encoder streaming are still to be tested.
Signed-off-by: Steven Toth <stoth@hauppauge.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@infradead.org>
-rw-r--r-- | drivers/media/video/cx23885/cx23885-core.c | 15 |
1 files changed, 9 insertions, 6 deletions
diff --git a/drivers/media/video/cx23885/cx23885-core.c b/drivers/media/video/cx23885/cx23885-core.c index 83067a49a7b7..3ae04d6e1362 100644 --- a/drivers/media/video/cx23885/cx23885-core.c +++ b/drivers/media/video/cx23885/cx23885-core.c | |||
@@ -80,8 +80,8 @@ static struct sram_channel cx23887_sram_channels[] = { | |||
80 | [SRAM_CH01] = { | 80 | [SRAM_CH01] = { |
81 | .name = "VID A", | 81 | .name = "VID A", |
82 | .cmds_start = 0x10000, | 82 | .cmds_start = 0x10000, |
83 | .ctrl_start = 0x105b0, | 83 | .ctrl_start = 0x10380, |
84 | .cdt = 0x107b0, | 84 | .cdt = 0x104c0, |
85 | .fifo_start = 0x40, | 85 | .fifo_start = 0x40, |
86 | .fifo_size = 0x2800, | 86 | .fifo_size = 0x2800, |
87 | .ptr1_reg = DMA1_PTR1, | 87 | .ptr1_reg = DMA1_PTR1, |
@@ -104,8 +104,8 @@ static struct sram_channel cx23887_sram_channels[] = { | |||
104 | [SRAM_CH03] = { | 104 | [SRAM_CH03] = { |
105 | .name = "TS1 B", | 105 | .name = "TS1 B", |
106 | .cmds_start = 0x100A0, | 106 | .cmds_start = 0x100A0, |
107 | .ctrl_start = 0x10670, | 107 | .ctrl_start = 0x10400, |
108 | .cdt = 0x10810, | 108 | .cdt = 0x10580, |
109 | .fifo_start = 0x5000, | 109 | .fifo_start = 0x5000, |
110 | .fifo_size = 0x1000, | 110 | .fifo_size = 0x1000, |
111 | .ptr1_reg = DMA3_PTR1, | 111 | .ptr1_reg = DMA3_PTR1, |
@@ -140,8 +140,8 @@ static struct sram_channel cx23887_sram_channels[] = { | |||
140 | [SRAM_CH06] = { | 140 | [SRAM_CH06] = { |
141 | .name = "TS2 C", | 141 | .name = "TS2 C", |
142 | .cmds_start = 0x10140, | 142 | .cmds_start = 0x10140, |
143 | .ctrl_start = 0x10680, | 143 | .ctrl_start = 0x10440, |
144 | .cdt = 0x108d0, | 144 | .cdt = 0x105e0, |
145 | .fifo_start = 0x6000, | 145 | .fifo_start = 0x6000, |
146 | .fifo_size = 0x1000, | 146 | .fifo_size = 0x1000, |
147 | .ptr1_reg = DMA5_PTR1, | 147 | .ptr1_reg = DMA5_PTR1, |
@@ -1044,6 +1044,9 @@ static int cx23885_start_dma(struct cx23885_tsport *port, | |||
1044 | dprintk(1, "%s() w: %d, h: %d, f: %d\n", __func__, | 1044 | dprintk(1, "%s() w: %d, h: %d, f: %d\n", __func__, |
1045 | buf->vb.width, buf->vb.height, buf->vb.field); | 1045 | buf->vb.width, buf->vb.height, buf->vb.field); |
1046 | 1046 | ||
1047 | /* Stop the fifo and risc engine for this port */ | ||
1048 | cx_clear(port->reg_dma_ctl, port->dma_ctl_val); | ||
1049 | |||
1047 | /* setup fifo + format */ | 1050 | /* setup fifo + format */ |
1048 | cx23885_sram_channel_setup(dev, | 1051 | cx23885_sram_channel_setup(dev, |
1049 | &dev->sram_channels[ port->sram_chno ], | 1052 | &dev->sram_channels[ port->sram_chno ], |