diff options
author | Linus Torvalds <torvalds@g5.osdl.org> | 2006-10-31 20:03:50 -0500 |
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committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-10-31 20:03:50 -0500 |
commit | d5b9b787b5e1618dfe82a2c2a6972374e85b02db (patch) | |
tree | 42fa7b4e4381e40fc94ae41fd932f9b7b1abece6 | |
parent | 16b7b2ac0148e839da86af8747b6fa4aad43a9b7 (diff) | |
parent | 024e4f2c5175a482c234cf67ed22368d770bf78f (diff) |
Merge branch 'release' of master.kernel.org:/pub/scm/linux/kernel/git/aegl/linux-2.6
* 'release' of master.kernel.org:/pub/scm/linux/kernel/git/aegl/linux-2.6:
[IA64] Correct definition of handle_IPI
[IA64] move SAL_CACHE_FLUSH check later in boot
[IA64] MCA recovery: Montecito support
[IA64] cpu-hotplug: Fixing confliction between CPU hot-add and IPI
[IA64] don't double >> PAGE_SHIFT pointer for /dev/kmem access
-rw-r--r-- | arch/ia64/kernel/mca_drv.c | 95 | ||||
-rw-r--r-- | arch/ia64/kernel/sal.c | 11 | ||||
-rw-r--r-- | arch/ia64/kernel/setup.c | 2 | ||||
-rw-r--r-- | arch/ia64/kernel/smp.c | 12 | ||||
-rw-r--r-- | include/asm-ia64/sal.h | 1 | ||||
-rw-r--r-- | include/asm-ia64/uaccess.h | 2 |
6 files changed, 86 insertions, 37 deletions
diff --git a/arch/ia64/kernel/mca_drv.c b/arch/ia64/kernel/mca_drv.c index a45009d2bc90..afc1403799c9 100644 --- a/arch/ia64/kernel/mca_drv.c +++ b/arch/ia64/kernel/mca_drv.c | |||
@@ -435,6 +435,50 @@ is_mca_global(peidx_table_t *peidx, pal_bus_check_info_t *pbci, | |||
435 | } | 435 | } |
436 | 436 | ||
437 | /** | 437 | /** |
438 | * get_target_identifier - Get the valid Cache or Bus check target identifier. | ||
439 | * @peidx: pointer of index of processor error section | ||
440 | * | ||
441 | * Return value: | ||
442 | * target address on Success / 0 on Failue | ||
443 | */ | ||
444 | static u64 | ||
445 | get_target_identifier(peidx_table_t *peidx) | ||
446 | { | ||
447 | u64 target_address = 0; | ||
448 | sal_log_mod_error_info_t *smei; | ||
449 | pal_cache_check_info_t *pcci; | ||
450 | int i, level = 9; | ||
451 | |||
452 | /* | ||
453 | * Look through the cache checks for a valid target identifier | ||
454 | * If more than one valid target identifier, return the one | ||
455 | * with the lowest cache level. | ||
456 | */ | ||
457 | for (i = 0; i < peidx_cache_check_num(peidx); i++) { | ||
458 | smei = (sal_log_mod_error_info_t *)peidx_cache_check(peidx, i); | ||
459 | if (smei->valid.target_identifier && smei->target_identifier) { | ||
460 | pcci = (pal_cache_check_info_t *)&(smei->check_info); | ||
461 | if (!target_address || (pcci->level < level)) { | ||
462 | target_address = smei->target_identifier; | ||
463 | level = pcci->level; | ||
464 | continue; | ||
465 | } | ||
466 | } | ||
467 | } | ||
468 | if (target_address) | ||
469 | return target_address; | ||
470 | |||
471 | /* | ||
472 | * Look at the bus check for a valid target identifier | ||
473 | */ | ||
474 | smei = peidx_bus_check(peidx, 0); | ||
475 | if (smei && smei->valid.target_identifier) | ||
476 | return smei->target_identifier; | ||
477 | |||
478 | return 0; | ||
479 | } | ||
480 | |||
481 | /** | ||
438 | * recover_from_read_error - Try to recover the errors which type are "read"s. | 482 | * recover_from_read_error - Try to recover the errors which type are "read"s. |
439 | * @slidx: pointer of index of SAL error record | 483 | * @slidx: pointer of index of SAL error record |
440 | * @peidx: pointer of index of processor error section | 484 | * @peidx: pointer of index of processor error section |
@@ -450,13 +494,14 @@ recover_from_read_error(slidx_table_t *slidx, | |||
450 | peidx_table_t *peidx, pal_bus_check_info_t *pbci, | 494 | peidx_table_t *peidx, pal_bus_check_info_t *pbci, |
451 | struct ia64_sal_os_state *sos) | 495 | struct ia64_sal_os_state *sos) |
452 | { | 496 | { |
453 | sal_log_mod_error_info_t *smei; | 497 | u64 target_identifier; |
454 | pal_min_state_area_t *pmsa; | 498 | pal_min_state_area_t *pmsa; |
455 | struct ia64_psr *psr1, *psr2; | 499 | struct ia64_psr *psr1, *psr2; |
456 | ia64_fptr_t *mca_hdlr_bh = (ia64_fptr_t*)mca_handler_bhhook; | 500 | ia64_fptr_t *mca_hdlr_bh = (ia64_fptr_t*)mca_handler_bhhook; |
457 | 501 | ||
458 | /* Is target address valid? */ | 502 | /* Is target address valid? */ |
459 | if (!pbci->tv) | 503 | target_identifier = get_target_identifier(peidx); |
504 | if (!target_identifier) | ||
460 | return fatal_mca("target address not valid"); | 505 | return fatal_mca("target address not valid"); |
461 | 506 | ||
462 | /* | 507 | /* |
@@ -487,32 +532,28 @@ recover_from_read_error(slidx_table_t *slidx, | |||
487 | pmsa = sos->pal_min_state; | 532 | pmsa = sos->pal_min_state; |
488 | if (psr1->cpl != 0 || | 533 | if (psr1->cpl != 0 || |
489 | ((psr2->cpl != 0) && mca_recover_range(pmsa->pmsa_iip))) { | 534 | ((psr2->cpl != 0) && mca_recover_range(pmsa->pmsa_iip))) { |
490 | smei = peidx_bus_check(peidx, 0); | 535 | /* |
491 | if (smei->valid.target_identifier) { | 536 | * setup for resume to bottom half of MCA, |
492 | /* | 537 | * "mca_handler_bhhook" |
493 | * setup for resume to bottom half of MCA, | 538 | */ |
494 | * "mca_handler_bhhook" | 539 | /* pass to bhhook as argument (gr8, ...) */ |
495 | */ | 540 | pmsa->pmsa_gr[8-1] = target_identifier; |
496 | /* pass to bhhook as argument (gr8, ...) */ | 541 | pmsa->pmsa_gr[9-1] = pmsa->pmsa_iip; |
497 | pmsa->pmsa_gr[8-1] = smei->target_identifier; | 542 | pmsa->pmsa_gr[10-1] = pmsa->pmsa_ipsr; |
498 | pmsa->pmsa_gr[9-1] = pmsa->pmsa_iip; | 543 | /* set interrupted return address (but no use) */ |
499 | pmsa->pmsa_gr[10-1] = pmsa->pmsa_ipsr; | 544 | pmsa->pmsa_br0 = pmsa->pmsa_iip; |
500 | /* set interrupted return address (but no use) */ | 545 | /* change resume address to bottom half */ |
501 | pmsa->pmsa_br0 = pmsa->pmsa_iip; | 546 | pmsa->pmsa_iip = mca_hdlr_bh->fp; |
502 | /* change resume address to bottom half */ | 547 | pmsa->pmsa_gr[1-1] = mca_hdlr_bh->gp; |
503 | pmsa->pmsa_iip = mca_hdlr_bh->fp; | 548 | /* set cpl with kernel mode */ |
504 | pmsa->pmsa_gr[1-1] = mca_hdlr_bh->gp; | 549 | psr2 = (struct ia64_psr *)&pmsa->pmsa_ipsr; |
505 | /* set cpl with kernel mode */ | 550 | psr2->cpl = 0; |
506 | psr2 = (struct ia64_psr *)&pmsa->pmsa_ipsr; | 551 | psr2->ri = 0; |
507 | psr2->cpl = 0; | 552 | psr2->bn = 1; |
508 | psr2->ri = 0; | 553 | psr2->i = 0; |
509 | psr2->bn = 1; | 554 | |
510 | psr2->i = 0; | 555 | return mca_recovered("user memory corruption. " |
511 | |||
512 | return mca_recovered("user memory corruption. " | ||
513 | "kill affected process - recovered."); | 556 | "kill affected process - recovered."); |
514 | } | ||
515 | |||
516 | } | 557 | } |
517 | 558 | ||
518 | return fatal_mca("kernel context not recovered, iip 0x%lx\n", | 559 | return fatal_mca("kernel context not recovered, iip 0x%lx\n", |
diff --git a/arch/ia64/kernel/sal.c b/arch/ia64/kernel/sal.c index 642fdc7b969d..20bad78b5073 100644 --- a/arch/ia64/kernel/sal.c +++ b/arch/ia64/kernel/sal.c | |||
@@ -223,12 +223,13 @@ static void __init sal_desc_ap_wakeup(void *p) { } | |||
223 | */ | 223 | */ |
224 | static int sal_cache_flush_drops_interrupts; | 224 | static int sal_cache_flush_drops_interrupts; |
225 | 225 | ||
226 | static void __init | 226 | void __init |
227 | check_sal_cache_flush (void) | 227 | check_sal_cache_flush (void) |
228 | { | 228 | { |
229 | unsigned long flags; | 229 | unsigned long flags; |
230 | int cpu; | 230 | int cpu; |
231 | u64 vector; | 231 | u64 vector, cache_type = 3; |
232 | struct ia64_sal_retval isrv; | ||
232 | 233 | ||
233 | cpu = get_cpu(); | 234 | cpu = get_cpu(); |
234 | local_irq_save(flags); | 235 | local_irq_save(flags); |
@@ -243,7 +244,10 @@ check_sal_cache_flush (void) | |||
243 | while (!ia64_get_irr(IA64_TIMER_VECTOR)) | 244 | while (!ia64_get_irr(IA64_TIMER_VECTOR)) |
244 | cpu_relax(); | 245 | cpu_relax(); |
245 | 246 | ||
246 | ia64_sal_cache_flush(3); | 247 | SAL_CALL(isrv, SAL_CACHE_FLUSH, cache_type, 0, 0, 0, 0, 0, 0); |
248 | |||
249 | if (isrv.status) | ||
250 | printk(KERN_ERR "SAL_CAL_FLUSH failed with %ld\n", isrv.status); | ||
247 | 251 | ||
248 | if (ia64_get_irr(IA64_TIMER_VECTOR)) { | 252 | if (ia64_get_irr(IA64_TIMER_VECTOR)) { |
249 | vector = ia64_get_ivr(); | 253 | vector = ia64_get_ivr(); |
@@ -331,7 +335,6 @@ ia64_sal_init (struct ia64_sal_systab *systab) | |||
331 | p += SAL_DESC_SIZE(*p); | 335 | p += SAL_DESC_SIZE(*p); |
332 | } | 336 | } |
333 | 337 | ||
334 | check_sal_cache_flush(); | ||
335 | } | 338 | } |
336 | 339 | ||
337 | int | 340 | int |
diff --git a/arch/ia64/kernel/setup.c b/arch/ia64/kernel/setup.c index c4caa8003492..d10404a41756 100644 --- a/arch/ia64/kernel/setup.c +++ b/arch/ia64/kernel/setup.c | |||
@@ -457,6 +457,8 @@ setup_arch (char **cmdline_p) | |||
457 | cpu_init(); /* initialize the bootstrap CPU */ | 457 | cpu_init(); /* initialize the bootstrap CPU */ |
458 | mmu_context_init(); /* initialize context_id bitmap */ | 458 | mmu_context_init(); /* initialize context_id bitmap */ |
459 | 459 | ||
460 | check_sal_cache_flush(); | ||
461 | |||
460 | #ifdef CONFIG_ACPI | 462 | #ifdef CONFIG_ACPI |
461 | acpi_boot_init(); | 463 | acpi_boot_init(); |
462 | #endif | 464 | #endif |
diff --git a/arch/ia64/kernel/smp.c b/arch/ia64/kernel/smp.c index 657ac99a451c..6ab95ceaf9d4 100644 --- a/arch/ia64/kernel/smp.c +++ b/arch/ia64/kernel/smp.c | |||
@@ -108,7 +108,7 @@ cpu_die(void) | |||
108 | } | 108 | } |
109 | 109 | ||
110 | irqreturn_t | 110 | irqreturn_t |
111 | handle_IPI (int irq, void *dev_id, struct pt_regs *regs) | 111 | handle_IPI (int irq, void *dev_id) |
112 | { | 112 | { |
113 | int this_cpu = get_cpu(); | 113 | int this_cpu = get_cpu(); |
114 | unsigned long *pending_ipis = &__ia64_per_cpu_var(ipi_operation); | 114 | unsigned long *pending_ipis = &__ia64_per_cpu_var(ipi_operation); |
@@ -328,10 +328,14 @@ int | |||
328 | smp_call_function (void (*func) (void *info), void *info, int nonatomic, int wait) | 328 | smp_call_function (void (*func) (void *info), void *info, int nonatomic, int wait) |
329 | { | 329 | { |
330 | struct call_data_struct data; | 330 | struct call_data_struct data; |
331 | int cpus = num_online_cpus()-1; | 331 | int cpus; |
332 | 332 | ||
333 | if (!cpus) | 333 | spin_lock(&call_lock); |
334 | cpus = num_online_cpus() - 1; | ||
335 | if (!cpus) { | ||
336 | spin_unlock(&call_lock); | ||
334 | return 0; | 337 | return 0; |
338 | } | ||
335 | 339 | ||
336 | /* Can deadlock when called with interrupts disabled */ | 340 | /* Can deadlock when called with interrupts disabled */ |
337 | WARN_ON(irqs_disabled()); | 341 | WARN_ON(irqs_disabled()); |
@@ -343,8 +347,6 @@ smp_call_function (void (*func) (void *info), void *info, int nonatomic, int wai | |||
343 | if (wait) | 347 | if (wait) |
344 | atomic_set(&data.finished, 0); | 348 | atomic_set(&data.finished, 0); |
345 | 349 | ||
346 | spin_lock(&call_lock); | ||
347 | |||
348 | call_data = &data; | 350 | call_data = &data; |
349 | mb(); /* ensure store to call_data precedes setting of IPI_CALL_FUNC */ | 351 | mb(); /* ensure store to call_data precedes setting of IPI_CALL_FUNC */ |
350 | send_IPI_allbutself(IPI_CALL_FUNC); | 352 | send_IPI_allbutself(IPI_CALL_FUNC); |
diff --git a/include/asm-ia64/sal.h b/include/asm-ia64/sal.h index 0b210abbe003..d000689d9142 100644 --- a/include/asm-ia64/sal.h +++ b/include/asm-ia64/sal.h | |||
@@ -659,6 +659,7 @@ ia64_sal_freq_base (unsigned long which, unsigned long *ticks_per_second, | |||
659 | } | 659 | } |
660 | 660 | ||
661 | extern s64 ia64_sal_cache_flush (u64 cache_type); | 661 | extern s64 ia64_sal_cache_flush (u64 cache_type); |
662 | extern void __init check_sal_cache_flush (void); | ||
662 | 663 | ||
663 | /* Initialize all the processor and platform level instruction and data caches */ | 664 | /* Initialize all the processor and platform level instruction and data caches */ |
664 | static inline s64 | 665 | static inline s64 |
diff --git a/include/asm-ia64/uaccess.h b/include/asm-ia64/uaccess.h index 9adb51211c22..449c8c0fa2bd 100644 --- a/include/asm-ia64/uaccess.h +++ b/include/asm-ia64/uaccess.h | |||
@@ -389,7 +389,7 @@ xlate_dev_kmem_ptr (char * p) | |||
389 | struct page *page; | 389 | struct page *page; |
390 | char * ptr; | 390 | char * ptr; |
391 | 391 | ||
392 | page = virt_to_page((unsigned long)p >> PAGE_SHIFT); | 392 | page = virt_to_page((unsigned long)p); |
393 | if (PageUncached(page)) | 393 | if (PageUncached(page)) |
394 | ptr = (char *)__pa(p) + __IA64_UNCACHED_OFFSET; | 394 | ptr = (char *)__pa(p) + __IA64_UNCACHED_OFFSET; |
395 | else | 395 | else |