diff options
author | Andi Kleen <ak@suse.de> | 2006-09-26 04:52:29 -0400 |
---|---|---|
committer | Andi Kleen <andi@basil.nowhere.org> | 2006-09-26 04:52:29 -0400 |
commit | 5cb6b99928a8f1a1bbdac7a16b88aef8cb64d432 (patch) | |
tree | 1a5964a3e6cf530a52efc1ac2dc8932d72cd86c9 | |
parent | 2e91a17b35116885373e04af142b1d08cf1b47bf (diff) |
[PATCH] Remove pirq overwrite support
This was an old workaround for broken MP-BIOS. The user could
specify overwrites on the command line.
I've never seen it being used for anything on 64bit. So get
rid of it for now.
Signed-off-by: Andi Kleen <ak@suse.de>
-rw-r--r-- | arch/x86_64/kernel/io_apic.c | 55 |
1 files changed, 0 insertions, 55 deletions
diff --git a/arch/x86_64/kernel/io_apic.c b/arch/x86_64/kernel/io_apic.c index 924a4a332954..86cc07caa0e5 100644 --- a/arch/x86_64/kernel/io_apic.c +++ b/arch/x86_64/kernel/io_apic.c | |||
@@ -225,14 +225,6 @@ static void clear_IO_APIC (void) | |||
225 | clear_IO_APIC_pin(apic, pin); | 225 | clear_IO_APIC_pin(apic, pin); |
226 | } | 226 | } |
227 | 227 | ||
228 | /* | ||
229 | * support for broken MP BIOSs, enables hand-redirection of PIRQ0-7 to | ||
230 | * specific CPU-side IRQs. | ||
231 | */ | ||
232 | |||
233 | #define MAX_PIRQS 8 | ||
234 | static int pirq_entries [MAX_PIRQS]; | ||
235 | static int pirqs_enabled; | ||
236 | int skip_ioapic_setup; | 228 | int skip_ioapic_setup; |
237 | int ioapic_force; | 229 | int ioapic_force; |
238 | 230 | ||
@@ -370,34 +362,6 @@ void __init check_ioapic(void) | |||
370 | } | 362 | } |
371 | } | 363 | } |
372 | 364 | ||
373 | static int __init ioapic_pirq_setup(char *str) | ||
374 | { | ||
375 | int i, max; | ||
376 | int ints[MAX_PIRQS+1]; | ||
377 | |||
378 | get_options(str, ARRAY_SIZE(ints), ints); | ||
379 | |||
380 | for (i = 0; i < MAX_PIRQS; i++) | ||
381 | pirq_entries[i] = -1; | ||
382 | |||
383 | pirqs_enabled = 1; | ||
384 | apic_printk(APIC_VERBOSE, "PIRQ redirection, working around broken MP-BIOS.\n"); | ||
385 | max = MAX_PIRQS; | ||
386 | if (ints[0] < MAX_PIRQS) | ||
387 | max = ints[0]; | ||
388 | |||
389 | for (i = 0; i < max; i++) { | ||
390 | apic_printk(APIC_VERBOSE, "... PIRQ%d -> IRQ %d\n", i, ints[i+1]); | ||
391 | /* | ||
392 | * PIRQs are mapped upside down, usually. | ||
393 | */ | ||
394 | pirq_entries[MAX_PIRQS-i-1] = ints[i+1]; | ||
395 | } | ||
396 | return 1; | ||
397 | } | ||
398 | |||
399 | __setup("pirq=", ioapic_pirq_setup); | ||
400 | |||
401 | /* | 365 | /* |
402 | * Find the IRQ entry number of a certain pin. | 366 | * Find the IRQ entry number of a certain pin. |
403 | */ | 367 | */ |
@@ -793,22 +757,6 @@ static int pin_2_irq(int idx, int apic, int pin) | |||
793 | } | 757 | } |
794 | } | 758 | } |
795 | BUG_ON(irq >= NR_IRQS); | 759 | BUG_ON(irq >= NR_IRQS); |
796 | |||
797 | /* | ||
798 | * PCI IRQ command line redirection. Yes, limits are hardcoded. | ||
799 | */ | ||
800 | if ((pin >= 16) && (pin <= 23)) { | ||
801 | if (pirq_entries[pin-16] != -1) { | ||
802 | if (!pirq_entries[pin-16]) { | ||
803 | apic_printk(APIC_VERBOSE, "disabling PIRQ%d\n", pin-16); | ||
804 | } else { | ||
805 | irq = pirq_entries[pin-16]; | ||
806 | apic_printk(APIC_VERBOSE, "using PIRQ%d -> IRQ %d\n", | ||
807 | pin-16, irq); | ||
808 | } | ||
809 | } | ||
810 | } | ||
811 | BUG_ON(irq >= NR_IRQS); | ||
812 | return irq; | 760 | return irq; |
813 | } | 761 | } |
814 | 762 | ||
@@ -1281,9 +1229,6 @@ static void __init enable_IO_APIC(void) | |||
1281 | irq_2_pin[i].pin = -1; | 1229 | irq_2_pin[i].pin = -1; |
1282 | irq_2_pin[i].next = 0; | 1230 | irq_2_pin[i].next = 0; |
1283 | } | 1231 | } |
1284 | if (!pirqs_enabled) | ||
1285 | for (i = 0; i < MAX_PIRQS; i++) | ||
1286 | pirq_entries[i] = -1; | ||
1287 | 1232 | ||
1288 | /* | 1233 | /* |
1289 | * The number of IO-APIC IRQ registers (== #pins): | 1234 | * The number of IO-APIC IRQ registers (== #pins): |