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authorBartlomiej Zolnierkiewicz <bzolnier@gmail.com>2007-10-13 11:47:51 -0400
committerBartlomiej Zolnierkiewicz <bzolnier@gmail.com>2007-10-13 11:47:51 -0400
commit88b2b32babd46cd54d2de4d17eb869aea3383e11 (patch)
treed446864f7c3431f8c428eecacd11caf7b794f018
parent6e249395eace037ef139a1c8996b31e3797e412a (diff)
ide: move ide_config_drive_speed() calls to upper layers (take 2)
* Convert {ide_hwif_t,ide_pci_device_t}->host_flag to be u16. * Add IDE_HFLAG_POST_SET_MODE host flag to indicate the need to program the host for the transfer mode after programming the device. Set it in au1xxx-ide, amd74xx, cs5530, cs5535, pdc202xx_new, sc1200, pmac and via82cxxx host drivers. * Add IDE_HFLAG_NO_SET_MODE host flag to indicate the need to completely skip programming of host/device for the transfer mode ("smart" hosts). Set it in it821x host driver and check it in ide_tune_dma(). * Add ide_set_pio_mode()/ide_set_dma_mode() helpers and convert all direct ->set_pio_mode/->speedproc users to use these helpers. * Move ide_config_drive_speed() calls from ->set_pio_mode/->speedproc methods to callers. * Rename ->speedproc method to ->set_dma_mode, make it void and update all implementations accordingly. * Update ide_set_xfer_rate() comments. * Unexport ide_config_drive_speed(). v2: * Fix issues noticed by Sergei: - export ide_set_dma_mode() instead of moving ->set_pio_mode abuse wrt to setting DMA modes from sc1200_set_pio_mode() to do_special() - check IDE_HFLAG_NO_SET_MODE in ide_tune_dma() - check for (hwif->set_pio_mode) == NULL in ide_set_pio_mode() - check for (hwif->set_dma_mode) == NULL in ide_set_dma_mode() - return -1 from ide_set_{pio,dma}_mode() if ->set_{pio,dma}_mode == NULL - don't set ->set_{pio,dma}_mode on it821x in "smart" mode - fix build problem in pmac.c - minor fixes in au1xxx-ide.c/cs5530.c/siimage.c - improve patch description Changes in behavior caused by this patch: - HDIO_SET_PIO_MODE ioctl would now return -ENOSYS for attempts to change PIO mode if it821x controller is in "smart" mode - removal of two debugging printk-s (from cs5530.c and sc1200.c) - transfer modes 0x00-0x07 passed from user space may be programmed twice on the device (not really an issue since 0x00 is not supported correctly by any host driver ATM, 0x01 is not supported at all and 0x02-0x07 are invalid) Acked-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Diffstat
-rw-r--r--drivers/ide/arm/icside.c8
-rw-r--r--drivers/ide/cris/ide-cris.c8
-rw-r--r--drivers/ide/ide-dma.c5
-rw-r--r--drivers/ide/ide-iops.c3
-rw-r--r--drivers/ide/ide-lib.c78
-rw-r--r--drivers/ide/ide.c2
-rw-r--r--drivers/ide/mips/au1xxx-ide.c27
-rw-r--r--drivers/ide/pci/aec62xx.c12
-rw-r--r--drivers/ide/pci/alim15x3.c33
-rw-r--r--drivers/ide/pci/amd74xx.c20
-rw-r--r--drivers/ide/pci/atiixp.c33
-rw-r--r--drivers/ide/pci/cmd64x.c9
-rw-r--r--drivers/ide/pci/cs5520.c13
-rw-r--r--drivers/ide/pci/cs5530.c50
-rw-r--r--drivers/ide/pci/cs5535.c28
-rw-r--r--drivers/ide/pci/hpt34x.c9
-rw-r--r--drivers/ide/pci/hpt366.c18
-rw-r--r--drivers/ide/pci/it8213.c34
-rw-r--r--drivers/ide/pci/it821x.c90
-rw-r--r--drivers/ide/pci/jmicron.c15
-rw-r--r--drivers/ide/pci/pdc202xx_new.c24
-rw-r--r--drivers/ide/pci/pdc202xx_old.c9
-rw-r--r--drivers/ide/pci/piix.c46
-rw-r--r--drivers/ide/pci/sc1200.c32
-rw-r--r--drivers/ide/pci/scc_pata.c28
-rw-r--r--drivers/ide/pci/serverworks.c14
-rw-r--r--drivers/ide/pci/sgiioc4.c8
-rw-r--r--drivers/ide/pci/siimage.c29
-rw-r--r--drivers/ide/pci/sis5513.c16
-rw-r--r--drivers/ide/pci/sl82c105.c23
-rw-r--r--drivers/ide/pci/slc90e66.c18
-rw-r--r--drivers/ide/pci/tc86c001.c9
-rw-r--r--drivers/ide/pci/triflex.c10
-rw-r--r--drivers/ide/pci/via82cxxx.c23
-rw-r--r--drivers/ide/ppc/pmac.c24
-rw-r--r--include/linux/ide.h17
36 files changed, 304 insertions, 521 deletions
diff --git a/drivers/ide/arm/icside.c b/drivers/ide/arm/icside.c
index 110e52377c71..bd1f5b670378 100644
--- a/drivers/ide/arm/icside.c
+++ b/drivers/ide/arm/icside.c
@@ -248,7 +248,7 @@ static void icside_build_sglist(ide_drive_t *drive, struct request *rq)
248 * MW1 80 50 50 150 C 248 * MW1 80 50 50 150 C
249 * MW2 70 25 25 120 C 249 * MW2 70 25 25 120 C
250 */ 250 */
251static int icside_set_speed(ide_drive_t *drive, const u8 xfer_mode) 251static void icside_set_dma_mode(ide_drive_t *drive, const u8 xfer_mode)
252{ 252{
253 int cycle_time, use_dma_info = 0; 253 int cycle_time, use_dma_info = 0;
254 254
@@ -273,7 +273,7 @@ static int icside_set_speed(ide_drive_t *drive, const u8 xfer_mode)
273 cycle_time = 480; 273 cycle_time = 480;
274 break; 274 break;
275 default: 275 default:
276 return 1; 276 return;
277 } 277 }
278 278
279 /* 279 /*
@@ -287,8 +287,6 @@ static int icside_set_speed(ide_drive_t *drive, const u8 xfer_mode)
287 287
288 printk("%s: %s selected (peak %dMB/s)\n", drive->name, 288 printk("%s: %s selected (peak %dMB/s)\n", drive->name,
289 ide_xfer_verbose(xfer_mode), 2000 / drive->drive_data); 289 ide_xfer_verbose(xfer_mode), 2000 / drive->drive_data);
290
291 return ide_config_drive_speed(drive, xfer_mode);
292} 290}
293 291
294static void icside_dma_host_off(ide_drive_t *drive) 292static void icside_dma_host_off(ide_drive_t *drive)
@@ -433,7 +431,7 @@ static void icside_dma_init(ide_hwif_t *hwif)
433 431
434 hwif->dmatable_cpu = NULL; 432 hwif->dmatable_cpu = NULL;
435 hwif->dmatable_dma = 0; 433 hwif->dmatable_dma = 0;
436 hwif->speedproc = icside_set_speed; 434 hwif->set_dma_mode = icside_set_dma_mode;
437 hwif->autodma = 1; 435 hwif->autodma = 1;
438 436
439 hwif->ide_dma_check = icside_dma_check; 437 hwif->ide_dma_check = icside_dma_check;
diff --git a/drivers/ide/cris/ide-cris.c b/drivers/ide/cris/ide-cris.c
index 4bb42b30bfc0..2b4d2a0ae5c2 100644
--- a/drivers/ide/cris/ide-cris.c
+++ b/drivers/ide/cris/ide-cris.c
@@ -716,11 +716,9 @@ static void cris_set_pio_mode(ide_drive_t *drive, const u8 pio)
716 } 716 }
717 717
718 cris_ide_set_speed(TYPE_PIO, setup, strobe, hold); 718 cris_ide_set_speed(TYPE_PIO, setup, strobe, hold);
719
720 (void)ide_config_drive_speed(drive, XFER_PIO_0 + pio);
721} 719}
722 720
723static int speed_cris_ide(ide_drive_t *drive, const u8 speed) 721static void cris_set_dma_mode(ide_drive_t *drive, const u8 speed)
724{ 722{
725 int cyc = 0, dvs = 0, strobe = 0, hold = 0; 723 int cyc = 0, dvs = 0, strobe = 0, hold = 0;
726 724
@@ -759,8 +757,6 @@ static int speed_cris_ide(ide_drive_t *drive, const u8 speed)
759 cris_ide_set_speed(TYPE_UDMA, cyc, dvs, 0); 757 cris_ide_set_speed(TYPE_UDMA, cyc, dvs, 0);
760 else 758 else
761 cris_ide_set_speed(TYPE_DMA, 0, strobe, hold); 759 cris_ide_set_speed(TYPE_DMA, 0, strobe, hold);
762
763 return ide_config_drive_speed(drive, speed);
764} 760}
765 761
766void __init 762void __init
@@ -791,7 +787,7 @@ init_e100_ide (void)
791 hwif->mmio = 1; 787 hwif->mmio = 1;
792 hwif->chipset = ide_etrax100; 788 hwif->chipset = ide_etrax100;
793 hwif->set_pio_mode = &cris_set_pio_mode; 789 hwif->set_pio_mode = &cris_set_pio_mode;
794 hwif->speedproc = &speed_cris_ide; 790 hwif->set_dma_mode = &cris_set_dma_mode;
795 hwif->ata_input_data = &cris_ide_input_data; 791 hwif->ata_input_data = &cris_ide_input_data;
796 hwif->ata_output_data = &cris_ide_output_data; 792 hwif->ata_output_data = &cris_ide_output_data;
797 hwif->atapi_input_bytes = &cris_atapi_input_bytes; 793 hwif->atapi_input_bytes = &cris_atapi_input_bytes;
diff --git a/drivers/ide/ide-dma.c b/drivers/ide/ide-dma.c
index 05781faaddd8..b453211ee0fc 100644
--- a/drivers/ide/ide-dma.c
+++ b/drivers/ide/ide-dma.c
@@ -774,7 +774,10 @@ int ide_tune_dma(ide_drive_t *drive)
774 if (!speed) 774 if (!speed)
775 return 0; 775 return 0;
776 776
777 if (drive->hwif->speedproc(drive, speed)) 777 if (drive->hwif->host_flags & IDE_HFLAG_NO_SET_MODE)
778 return 0;
779
780 if (ide_set_dma_mode(drive, speed))
778 return 0; 781 return 0;
779 782
780 return 1; 783 return 1;
diff --git a/drivers/ide/ide-iops.c b/drivers/ide/ide-iops.c
index e5fc2e505959..f5e73e2950d4 100644
--- a/drivers/ide/ide-iops.c
+++ b/drivers/ide/ide-iops.c
@@ -862,9 +862,6 @@ int ide_config_drive_speed(ide_drive_t *drive, u8 speed)
862 return error; 862 return error;
863} 863}
864 864
865EXPORT_SYMBOL(ide_config_drive_speed);
866
867
868/* 865/*
869 * This should get invoked any time we exit the driver to 866 * This should get invoked any time we exit the driver to
870 * wait for an interrupt response from a drive. handler() points 867 * wait for an interrupt response from a drive. handler() points
diff --git a/drivers/ide/ide-lib.c b/drivers/ide/ide-lib.c
index d97390c0543b..0e2562f0f74e 100644
--- a/drivers/ide/ide-lib.c
+++ b/drivers/ide/ide-lib.c
@@ -349,7 +349,7 @@ void ide_set_pio(ide_drive_t *drive, u8 req_pio)
349 drive->name, host_pio, req_pio, 349 drive->name, host_pio, req_pio,
350 req_pio == 255 ? "(auto-tune)" : "", pio); 350 req_pio == 255 ? "(auto-tune)" : "", pio);
351 351
352 hwif->set_pio_mode(drive, pio); 352 (void)ide_set_pio_mode(drive, XFER_PIO_0 + pio);
353} 353}
354 354
355EXPORT_SYMBOL_GPL(ide_set_pio); 355EXPORT_SYMBOL_GPL(ide_set_pio);
@@ -378,39 +378,83 @@ void ide_toggle_bounce(ide_drive_t *drive, int on)
378 blk_queue_bounce_limit(drive->queue, addr); 378 blk_queue_bounce_limit(drive->queue, addr);
379} 379}
380 380
381int ide_set_pio_mode(ide_drive_t *drive, const u8 mode)
382{
383 ide_hwif_t *hwif = drive->hwif;
384
385 if (hwif->set_pio_mode == NULL)
386 return -1;
387
388 /*
389 * TODO: temporary hack for some legacy host drivers that didn't
390 * set transfer mode on the device in ->set_pio_mode method...
391 */
392 if (hwif->set_dma_mode == NULL) {
393 hwif->set_pio_mode(drive, mode - XFER_PIO_0);
394 return 0;
395 }
396
397 if (hwif->host_flags & IDE_HFLAG_POST_SET_MODE) {
398 if (ide_config_drive_speed(drive, mode))
399 return -1;
400 hwif->set_pio_mode(drive, mode - XFER_PIO_0);
401 return 0;
402 } else {
403 hwif->set_pio_mode(drive, mode - XFER_PIO_0);
404 return ide_config_drive_speed(drive, mode);
405 }
406}
407
408int ide_set_dma_mode(ide_drive_t *drive, const u8 mode)
409{
410 ide_hwif_t *hwif = drive->hwif;
411
412 if (hwif->set_dma_mode == NULL)
413 return -1;
414
415 if (hwif->host_flags & IDE_HFLAG_POST_SET_MODE) {
416 if (ide_config_drive_speed(drive, mode))
417 return -1;
418 hwif->set_dma_mode(drive, mode);
419 return 0;
420 } else {
421 hwif->set_dma_mode(drive, mode);
422 return ide_config_drive_speed(drive, mode);
423 }
424}
425
426EXPORT_SYMBOL_GPL(ide_set_dma_mode);
427
381/** 428/**
382 * ide_set_xfer_rate - set transfer rate 429 * ide_set_xfer_rate - set transfer rate
383 * @drive: drive to set 430 * @drive: drive to set
384 * @speed: speed to attempt to set 431 * @rate: speed to attempt to set
385 * 432 *
386 * General helper for setting the speed of an IDE device. This 433 * General helper for setting the speed of an IDE device. This
387 * function knows about user enforced limits from the configuration 434 * function knows about user enforced limits from the configuration
388 * which speedproc() does not. High level drivers should never 435 * which ->set_pio_mode/->set_dma_mode does not.
389 * invoke speedproc() directly.
390 */ 436 */
391 437
392int ide_set_xfer_rate(ide_drive_t *drive, u8 rate) 438int ide_set_xfer_rate(ide_drive_t *drive, u8 rate)
393{ 439{
394 ide_hwif_t *hwif = drive->hwif; 440 ide_hwif_t *hwif = drive->hwif;
395 441
396 if (hwif->speedproc == NULL) 442 if (hwif->set_dma_mode == NULL)
397 return -1; 443 return -1;
398 444
399 rate = ide_rate_filter(drive, rate); 445 rate = ide_rate_filter(drive, rate);
400 446
401 if (rate >= XFER_PIO_0 && rate <= XFER_PIO_5) { 447 if (rate >= XFER_PIO_0 && rate <= XFER_PIO_5)
402 if (hwif->set_pio_mode) 448 return ide_set_pio_mode(drive, rate);
403 hwif->set_pio_mode(drive, rate - XFER_PIO_0);
404 449
405 /* 450 /*
406 * FIXME: this is incorrect to return zero here but 451 * TODO: transfer modes 0x00-0x07 passed from the user-space are
407 * since all users of ide_set_xfer_rate() ignore 452 * currently handled here which needs fixing (please note that such
408 * the return value it is not a problem currently 453 * case could happen iff the transfer mode has already been set on
409 */ 454 * the device by ide-proc.c::set_xfer_rate()).
410 return 0; 455 */
411 }
412 456
413 return hwif->speedproc(drive, rate); 457 return ide_set_dma_mode(drive, rate);
414} 458}
415 459
416static void ide_dump_opcode(ide_drive_t *drive) 460static void ide_dump_opcode(ide_drive_t *drive)
diff --git a/drivers/ide/ide.c b/drivers/ide/ide.c
index a96a8b1b3539..5c0e4078b5cb 100644
--- a/drivers/ide/ide.c
+++ b/drivers/ide/ide.c
@@ -397,7 +397,7 @@ static void ide_hwif_restore(ide_hwif_t *hwif, ide_hwif_t *tmp_hwif)
397#endif 397#endif
398 398
399 hwif->set_pio_mode = tmp_hwif->set_pio_mode; 399 hwif->set_pio_mode = tmp_hwif->set_pio_mode;
400 hwif->speedproc = tmp_hwif->speedproc; 400 hwif->set_dma_mode = tmp_hwif->set_dma_mode;
401 hwif->mdma_filter = tmp_hwif->mdma_filter; 401 hwif->mdma_filter = tmp_hwif->mdma_filter;
402 hwif->udma_filter = tmp_hwif->udma_filter; 402 hwif->udma_filter = tmp_hwif->udma_filter;
403 hwif->selectproc = tmp_hwif->selectproc; 403 hwif->selectproc = tmp_hwif->selectproc;
diff --git a/drivers/ide/mips/au1xxx-ide.c b/drivers/ide/mips/au1xxx-ide.c
index c319f6163127..aebde49365d1 100644
--- a/drivers/ide/mips/au1xxx-ide.c
+++ b/drivers/ide/mips/au1xxx-ide.c
@@ -101,14 +101,7 @@ void auide_outsw(unsigned long port, void *addr, u32 count)
101 101
102static void au1xxx_set_pio_mode(ide_drive_t *drive, const u8 pio) 102static void au1xxx_set_pio_mode(ide_drive_t *drive, const u8 pio)
103{ 103{
104 int mem_sttime; 104 int mem_sttime = 0, mem_stcfg = au_readl(MEM_STCFG2);
105 int mem_stcfg;
106
107 if (ide_config_drive_speed(drive, pio + XFER_PIO_0))
108 return;
109
110 mem_sttime = 0;
111 mem_stcfg = au_readl(MEM_STCFG2);
112 105
113 /* set pio mode! */ 106 /* set pio mode! */
114 switch(pio) { 107 switch(pio) {
@@ -168,13 +161,9 @@ static void au1xxx_set_pio_mode(ide_drive_t *drive, const u8 pio)
168 au_writel(mem_stcfg,MEM_STCFG2); 161 au_writel(mem_stcfg,MEM_STCFG2);
169} 162}
170 163
171static int auide_tune_chipset(ide_drive_t *drive, const u8 speed) 164static void auide_set_dma_mode(ide_drive_t *drive, const u8 speed)
172{ 165{
173 int mem_sttime; 166 int mem_sttime = 0, mem_stcfg = au_readl(MEM_STCFG2);
174 int mem_stcfg;
175
176 mem_sttime = 0;
177 mem_stcfg = au_readl(MEM_STCFG2);
178 167
179 switch(speed) { 168 switch(speed) {
180#ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA 169#ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA
@@ -210,16 +199,11 @@ static int auide_tune_chipset(ide_drive_t *drive, const u8 speed)
210 break; 199 break;
211#endif 200#endif
212 default: 201 default:
213 return 1; 202 return;
214 } 203 }
215 204
216 if (ide_config_drive_speed(drive, speed))
217 return 1;
218
219 au_writel(mem_sttime,MEM_STTIME2); 205 au_writel(mem_sttime,MEM_STTIME2);
220 au_writel(mem_stcfg,MEM_STCFG2); 206 au_writel(mem_stcfg,MEM_STCFG2);
221
222 return 0;
223} 207}
224 208
225/* 209/*
@@ -681,6 +665,7 @@ static int au_ide_probe(struct device *dev)
681#endif 665#endif
682 666
683 hwif->pio_mask = ATA_PIO4; 667 hwif->pio_mask = ATA_PIO4;
668 hwif->host_flags = IDE_HFLAG_POST_SET_MODE;
684 669
685 hwif->noprobe = 0; 670 hwif->noprobe = 0;
686 hwif->drives[0].unmask = 1; 671 hwif->drives[0].unmask = 1;
@@ -701,7 +686,7 @@ static int au_ide_probe(struct device *dev)
701#endif 686#endif
702 687
703 hwif->set_pio_mode = &au1xxx_set_pio_mode; 688 hwif->set_pio_mode = &au1xxx_set_pio_mode;
704 hwif->speedproc = &auide_tune_chipset; 689 hwif->set_dma_mode = &auide_set_dma_mode;
705 690
706#ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA 691#ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA
707 hwif->dma_off_quietly = &auide_dma_off_quietly; 692 hwif->dma_off_quietly = &auide_dma_off_quietly;
diff --git a/drivers/ide/pci/aec62xx.c b/drivers/ide/pci/aec62xx.c
index 0d5f62c5dfae..d6cb2d5143c8 100644
--- a/drivers/ide/pci/aec62xx.c
+++ b/drivers/ide/pci/aec62xx.c
@@ -87,7 +87,7 @@ static u8 pci_bus_clock_list_ultra (u8 speed, struct chipset_bus_clock_list_entr
87 return chipset_table->ultra_settings; 87 return chipset_table->ultra_settings;
88} 88}
89 89
90static int aec6210_tune_chipset(ide_drive_t *drive, const u8 speed) 90static void aec6210_set_mode(ide_drive_t *drive, const u8 speed)
91{ 91{
92 ide_hwif_t *hwif = HWIF(drive); 92 ide_hwif_t *hwif = HWIF(drive);
93 struct pci_dev *dev = hwif->pci_dev; 93 struct pci_dev *dev = hwif->pci_dev;
@@ -111,10 +111,9 @@ static int aec6210_tune_chipset(ide_drive_t *drive, const u8 speed)
111 tmp2 = ((ultra_conf << (2*drive->dn)) | (tmp1 & ~(3 << (2*drive->dn)))); 111 tmp2 = ((ultra_conf << (2*drive->dn)) | (tmp1 & ~(3 << (2*drive->dn))));
112 pci_write_config_byte(dev, 0x54, tmp2); 112 pci_write_config_byte(dev, 0x54, tmp2);
113 local_irq_restore(flags); 113 local_irq_restore(flags);
114 return(ide_config_drive_speed(drive, speed));
115} 114}
116 115
117static int aec6260_tune_chipset(ide_drive_t *drive, const u8 speed) 116static void aec6260_set_mode(ide_drive_t *drive, const u8 speed)
118{ 117{
119 ide_hwif_t *hwif = HWIF(drive); 118 ide_hwif_t *hwif = HWIF(drive);
120 struct pci_dev *dev = hwif->pci_dev; 119 struct pci_dev *dev = hwif->pci_dev;
@@ -135,12 +134,11 @@ static int aec6260_tune_chipset(ide_drive_t *drive, const u8 speed)
135 tmp2 = ((ultra_conf << (4*unit)) | (tmp1 & ~(7 << (4*unit)))); 134 tmp2 = ((ultra_conf << (4*unit)) | (tmp1 & ~(7 << (4*unit))));
136 pci_write_config_byte(dev, (0x44|hwif->channel), tmp2); 135 pci_write_config_byte(dev, (0x44|hwif->channel), tmp2);
137 local_irq_restore(flags); 136 local_irq_restore(flags);
138 return(ide_config_drive_speed(drive, speed));
139} 137}
140 138
141static void aec_set_pio_mode(ide_drive_t *drive, const u8 pio) 139static void aec_set_pio_mode(ide_drive_t *drive, const u8 pio)
142{ 140{
143 (void) HWIF(drive)->speedproc(drive, pio + XFER_PIO_0); 141 drive->hwif->set_dma_mode(drive, pio + XFER_PIO_0);
144} 142}
145 143
146static int aec62xx_config_drive_xfer_rate (ide_drive_t *drive) 144static int aec62xx_config_drive_xfer_rate (ide_drive_t *drive)
@@ -205,9 +203,9 @@ static void __devinit init_hwif_aec62xx(ide_hwif_t *hwif)
205 if (dev->device == PCI_DEVICE_ID_ARTOP_ATP850UF) { 203 if (dev->device == PCI_DEVICE_ID_ARTOP_ATP850UF) {
206 if(hwif->mate) 204 if(hwif->mate)
207 hwif->mate->serialized = hwif->serialized = 1; 205 hwif->mate->serialized = hwif->serialized = 1;
208 hwif->speedproc = &aec6210_tune_chipset; 206 hwif->set_dma_mode = &aec6210_set_mode;
209 } else 207 } else
210 hwif->speedproc = &aec6260_tune_chipset; 208 hwif->set_dma_mode = &aec6260_set_mode;
211 209
212 if (!hwif->dma_base) { 210 if (!hwif->dma_base) {
213 hwif->drives[0].autotune = hwif->drives[1].autotune = 1; 211 hwif->drives[0].autotune = hwif->drives[1].autotune = 1;
diff --git a/drivers/ide/pci/alim15x3.c b/drivers/ide/pci/alim15x3.c
index d04b966b4347..88f084eae193 100644
--- a/drivers/ide/pci/alim15x3.c
+++ b/drivers/ide/pci/alim15x3.c
@@ -283,14 +283,14 @@ static int ali_get_info (char *buffer, char **addr, off_t offset, int count)
283#endif /* defined(DISPLAY_ALI_TIMINGS) && defined(CONFIG_IDE_PROC_FS) */ 283#endif /* defined(DISPLAY_ALI_TIMINGS) && defined(CONFIG_IDE_PROC_FS) */
284 284
285/** 285/**
286 * ali_tune_pio - set host controller for PIO mode 286 * ali_set_pio_mode - set host controller for PIO mode
287 * @drive: drive 287 * @drive: drive
288 * @pio: PIO mode number 288 * @pio: PIO mode number
289 * 289 *
290 * Program the controller for the given PIO mode. 290 * Program the controller for the given PIO mode.
291 */ 291 */
292 292
293static void ali_tune_pio(ide_drive_t *drive, const u8 pio) 293static void ali_set_pio_mode(ide_drive_t *drive, const u8 pio)
294{ 294{
295 ide_hwif_t *hwif = HWIF(drive); 295 ide_hwif_t *hwif = HWIF(drive);
296 struct pci_dev *dev = hwif->pci_dev; 296 struct pci_dev *dev = hwif->pci_dev;
@@ -358,21 +358,6 @@ static void ali_tune_pio(ide_drive_t *drive, const u8 pio)
358} 358}
359 359
360/** 360/**
361 * ali_set_pio_mode - set up drive for PIO mode
362 * @drive: drive to tune
363 * @pio: desired mode
364 *
365 * Program the controller with the desired PIO timing for the given drive.
366 * Then set up the drive itself.
367 */
368
369static void ali_set_pio_mode(ide_drive_t *drive, const u8 pio)
370{
371 ali_tune_pio(drive, pio);
372 (void) ide_config_drive_speed(drive, XFER_PIO_0 + pio);
373}
374
375/**
376 * ali_udma_filter - compute UDMA mask 361 * ali_udma_filter - compute UDMA mask
377 * @drive: IDE device 362 * @drive: IDE device
378 * 363 *
@@ -401,15 +386,14 @@ static u8 ali_udma_filter(ide_drive_t *drive)
401} 386}
402 387
403/** 388/**
404 * ali15x3_tune_chipset - set up chipset/drive for new speed 389 * ali_set_dma_mode - set host controller for DMA mode
405 * @drive: drive to configure for 390 * @drive: drive
406 * @speed: desired speed 391 * @speed: DMA mode
407 * 392 *
408 * Configure the hardware for the desired IDE transfer mode. 393 * Configure the hardware for the desired IDE transfer mode.
409 * We also do the needed drive configuration through helpers
410 */ 394 */
411 395
412static int ali15x3_tune_chipset(ide_drive_t *drive, const u8 speed) 396static void ali_set_dma_mode(ide_drive_t *drive, const u8 speed)
413{ 397{
414 ide_hwif_t *hwif = HWIF(drive); 398 ide_hwif_t *hwif = HWIF(drive);
415 struct pci_dev *dev = hwif->pci_dev; 399 struct pci_dev *dev = hwif->pci_dev;
@@ -419,7 +403,7 @@ static int ali15x3_tune_chipset(ide_drive_t *drive, const u8 speed)
419 int m5229_udma = (hwif->channel) ? 0x57 : 0x56; 403 int m5229_udma = (hwif->channel) ? 0x57 : 0x56;
420 404
421 if (speed < XFER_PIO_0) 405 if (speed < XFER_PIO_0)
422 return 1; 406 return;
423 407
424 if (speed == XFER_UDMA_6) 408 if (speed == XFER_UDMA_6)
425 speed1 = 0x47; 409 speed1 = 0x47;
@@ -450,7 +434,6 @@ static int ali15x3_tune_chipset(ide_drive_t *drive, const u8 speed)
450 pci_write_config_byte(dev, 0x4b, tmpbyte); 434 pci_write_config_byte(dev, 0x4b, tmpbyte);
451 } 435 }
452 } 436 }
453 return (ide_config_drive_speed(drive, speed));
454} 437}
455 438
456/** 439/**
@@ -699,7 +682,7 @@ static void __devinit init_hwif_common_ali15x3 (ide_hwif_t *hwif)
699{ 682{
700 hwif->autodma = 0; 683 hwif->autodma = 0;
701 hwif->set_pio_mode = &ali_set_pio_mode; 684 hwif->set_pio_mode = &ali_set_pio_mode;
702 hwif->speedproc = &ali15x3_tune_chipset; 685 hwif->set_dma_mode = &ali_set_dma_mode;
703 hwif->udma_filter = &ali_udma_filter; 686 hwif->udma_filter = &ali_udma_filter;
704 687
705 /* don't use LBA48 DMA on ALi devices before rev 0xC5 */ 688 /* don't use LBA48 DMA on ALi devices before rev 0xC5 */
diff --git a/drivers/ide/pci/amd74xx.c b/drivers/ide/pci/amd74xx.c
index 71d2c670e97e..6ff4089a2379 100644
--- a/drivers/ide/pci/amd74xx.c
+++ b/drivers/ide/pci/amd74xx.c
@@ -229,20 +229,16 @@ static void amd_set_speed(struct pci_dev *dev, unsigned char dn, struct ide_timi
229} 229}
230 230
231/* 231/*
232 * amd_set_drive() computes timing values configures the drive and 232 * amd_set_drive() computes timing values and configures the chipset
233 * the chipset to a desired transfer mode. It also can be called 233 * to a desired transfer mode. It also can be called by upper layers.
234 * by upper layers.
235 */ 234 */
236 235
237static int amd_set_drive(ide_drive_t *drive, const u8 speed) 236static void amd_set_drive(ide_drive_t *drive, const u8 speed)
238{ 237{
239 ide_drive_t *peer = HWIF(drive)->drives + (~drive->dn & 1); 238 ide_drive_t *peer = HWIF(drive)->drives + (~drive->dn & 1);
240 struct ide_timing t, p; 239 struct ide_timing t, p;
241 int T, UT; 240 int T, UT;
242 241
243 if (ide_config_drive_speed(drive, speed))
244 return 1;
245
246 T = 1000000000 / amd_clock; 242 T = 1000000000 / amd_clock;
247 UT = (amd_config->udma_mask == ATA_UDMA2) ? T : (T / 2); 243 UT = (amd_config->udma_mask == ATA_UDMA2) ? T : (T / 2);
248 244
@@ -257,8 +253,6 @@ static int amd_set_drive(ide_drive_t *drive, const u8 speed)
257 if (speed == XFER_UDMA_6 && amd_clock <= 33333) t.udma = 15; 253 if (speed == XFER_UDMA_6 && amd_clock <= 33333) t.udma = 15;
258 254
259 amd_set_speed(HWIF(drive)->pci_dev, drive->dn, &t); 255 amd_set_speed(HWIF(drive)->pci_dev, drive->dn, &t);
260
261 return 0;
262} 256}
263 257
264/* 258/*
@@ -395,7 +389,7 @@ static void __devinit init_hwif_amd74xx(ide_hwif_t *hwif)
395 hwif->autodma = 0; 389 hwif->autodma = 0;
396 390
397 hwif->set_pio_mode = &amd_set_pio_mode; 391 hwif->set_pio_mode = &amd_set_pio_mode;
398 hwif->speedproc = &amd_set_drive; 392 hwif->set_dma_mode = &amd_set_drive;
399 393
400 for (i = 0; i < 2; i++) { 394 for (i = 0; i < 2; i++) {
401 hwif->drives[i].io_32bit = 1; 395 hwif->drives[i].io_32bit = 1;
@@ -437,7 +431,8 @@ static void __devinit init_hwif_amd74xx(ide_hwif_t *hwif)
437 .enablebits = {{0x40,0x02,0x02}, {0x40,0x01,0x01}}, \ 431 .enablebits = {{0x40,0x02,0x02}, {0x40,0x01,0x01}}, \
438 .bootable = ON_BOARD, \ 432 .bootable = ON_BOARD, \
439 .host_flags = IDE_HFLAG_PIO_NO_BLACKLIST \ 433 .host_flags = IDE_HFLAG_PIO_NO_BLACKLIST \
440 | IDE_HFLAG_PIO_NO_DOWNGRADE, \ 434 | IDE_HFLAG_PIO_NO_DOWNGRADE \
435 | IDE_HFLAG_POST_SET_MODE, \
441 .pio_mask = ATA_PIO5, \ 436 .pio_mask = ATA_PIO5, \
442 } 437 }
443 438
@@ -450,7 +445,8 @@ static void __devinit init_hwif_amd74xx(ide_hwif_t *hwif)
450 .enablebits = {{0x50,0x02,0x02}, {0x50,0x01,0x01}}, \ 445 .enablebits = {{0x50,0x02,0x02}, {0x50,0x01,0x01}}, \
451 .bootable = ON_BOARD, \ 446 .bootable = ON_BOARD, \
452 .host_flags = IDE_HFLAG_PIO_NO_BLACKLIST \ 447 .host_flags = IDE_HFLAG_PIO_NO_BLACKLIST \
453 | IDE_HFLAG_PIO_NO_DOWNGRADE, \ 448 | IDE_HFLAG_PIO_NO_DOWNGRADE \
449 | IDE_HFLAG_POST_SET_MODE, \
454 .pio_mask = ATA_PIO5, \ 450 .pio_mask = ATA_PIO5, \
455 } 451 }
456 452
diff --git a/drivers/ide/pci/atiixp.c b/drivers/ide/pci/atiixp.c
index 178876a3afca..0eb97f021d39 100644
--- a/drivers/ide/pci/atiixp.c
+++ b/drivers/ide/pci/atiixp.c
@@ -122,14 +122,14 @@ static void atiixp_dma_host_off(ide_drive_t *drive)
122} 122}
123 123
124/** 124/**
125 * atiixp_tune_pio - tune a drive attached to a ATIIXP 125 * atiixp_set_pio_mode - set host controller for PIO mode
126 * @drive: drive to tune 126 * @drive: drive
127 * @pio: desired PIO mode 127 * @pio: PIO mode number
128 * 128 *
129 * Set the interface PIO mode. 129 * Set the interface PIO mode.
130 */ 130 */
131 131
132static void atiixp_tune_pio(ide_drive_t *drive, u8 pio) 132static void atiixp_set_pio_mode(ide_drive_t *drive, const u8 pio)
133{ 133{
134 struct pci_dev *dev = drive->hwif->pci_dev; 134 struct pci_dev *dev = drive->hwif->pci_dev;
135 unsigned long flags; 135 unsigned long flags;
@@ -153,23 +153,16 @@ static void atiixp_tune_pio(ide_drive_t *drive, u8 pio)
153 spin_unlock_irqrestore(&atiixp_lock, flags); 153 spin_unlock_irqrestore(&atiixp_lock, flags);
154} 154}
155 155
156static void atiixp_set_pio_mode(ide_drive_t *drive, const u8 pio)
157{
158 atiixp_tune_pio(drive, pio);
159 (void)ide_config_drive_speed(drive, XFER_PIO_0 + pio);
160}
161
162/** 156/**
163 * atiixp_tune_chipset - tune a ATIIXP interface 157 * atiixp_set_dma_mode - set host controller for DMA mode
164 * @drive: IDE drive to tune 158 * @drive: drive
165 * @speed: speed to configure 159 * @speed: DMA mode
166 * 160 *
167 * Set a ATIIXP interface channel to the desired speeds. This involves 161 * Set a ATIIXP host controller to the desired DMA mode. This involves
168 * requires the right timing data into the ATIIXP configuration space 162 * programming the right timing data into the PCI configuration space.
169 * then setting the drive parameters appropriately
170 */ 163 */
171 164
172static int atiixp_speedproc(ide_drive_t *drive, const u8 speed) 165static void atiixp_set_dma_mode(ide_drive_t *drive, const u8 speed)
173{ 166{
174 struct pci_dev *dev = drive->hwif->pci_dev; 167 struct pci_dev *dev = drive->hwif->pci_dev;
175 unsigned long flags; 168 unsigned long flags;
@@ -204,9 +197,7 @@ static int atiixp_speedproc(ide_drive_t *drive, const u8 speed)
204 else 197 else
205 pio = speed - XFER_PIO_0; 198 pio = speed - XFER_PIO_0;
206 199
207 atiixp_tune_pio(drive, pio); 200 atiixp_set_pio_mode(drive, pio);
208
209 return ide_config_drive_speed(drive, speed);
210} 201}
211 202
212/** 203/**
@@ -249,7 +240,7 @@ static void __devinit init_hwif_atiixp(ide_hwif_t *hwif)
249 240
250 hwif->autodma = 0; 241 hwif->autodma = 0;
251 hwif->set_pio_mode = &atiixp_set_pio_mode; 242 hwif->set_pio_mode = &atiixp_set_pio_mode;
252 hwif->speedproc = &atiixp_speedproc; 243 hwif->set_dma_mode = &atiixp_set_dma_mode;
253 hwif->drives[0].autotune = 1; 244 hwif->drives[0].autotune = 1;
254 hwif->drives[1].autotune = 1; 245 hwif->drives[1].autotune = 1;
255 246
diff --git a/drivers/ide/pci/cmd64x.c b/drivers/ide/pci/cmd64x.c
index 0b568c60f926..d50f15e34b80 100644
--- a/drivers/ide/pci/cmd64x.c
+++ b/drivers/ide/pci/cmd64x.c
@@ -280,10 +280,9 @@ static void cmd64x_set_pio_mode(ide_drive_t *drive, const u8 pio)
280 return; 280 return;
281 281
282 cmd64x_tune_pio(drive, pio); 282 cmd64x_tune_pio(drive, pio);
283 (void) ide_config_drive_speed(drive, XFER_PIO_0 + pio);
284} 283}
285 284
286static int cmd64x_tune_chipset(ide_drive_t *drive, const u8 speed) 285static void cmd64x_set_dma_mode(ide_drive_t *drive, const u8 speed)
287{ 286{
288 ide_hwif_t *hwif = HWIF(drive); 287 ide_hwif_t *hwif = HWIF(drive);
289 struct pci_dev *dev = hwif->pci_dev; 288 struct pci_dev *dev = hwif->pci_dev;
@@ -324,13 +323,11 @@ static int cmd64x_tune_chipset(ide_drive_t *drive, const u8 speed)
324 program_cycle_times(drive, 480, 215); 323 program_cycle_times(drive, 480, 215);
325 break; 324 break;
326 default: 325 default:
327 return 1; 326 return;
328 } 327 }
329 328
330 if (speed >= XFER_SW_DMA_0) 329 if (speed >= XFER_SW_DMA_0)
331 (void) pci_write_config_byte(dev, pciU, regU); 330 (void) pci_write_config_byte(dev, pciU, regU);
332
333 return ide_config_drive_speed(drive, speed);
334} 331}
335 332
336static int cmd64x_config_drive_for_dma (ide_drive_t *drive) 333static int cmd64x_config_drive_for_dma (ide_drive_t *drive)
@@ -524,7 +521,7 @@ static void __devinit init_hwif_cmd64x(ide_hwif_t *hwif)
524 pci_read_config_byte(dev, PCI_REVISION_ID, &rev); 521 pci_read_config_byte(dev, PCI_REVISION_ID, &rev);
525 522
526 hwif->set_pio_mode = &cmd64x_set_pio_mode; 523 hwif->set_pio_mode = &cmd64x_set_pio_mode;
527 hwif->speedproc = &cmd64x_tune_chipset; 524 hwif->set_dma_mode = &cmd64x_set_dma_mode;
528 525
529 hwif->drives[0].autotune = hwif->drives[1].autotune = 1; 526 hwif->drives[0].autotune = hwif->drives[1].autotune = 1;
530 527
diff --git a/drivers/ide/pci/cs5520.c b/drivers/ide/pci/cs5520.c
index 1217d2a747fb..cb2a10203dc4 100644
--- a/drivers/ide/pci/cs5520.c
+++ b/drivers/ide/pci/cs5520.c
@@ -96,22 +96,13 @@ static void cs5520_set_pio_mode(ide_drive_t *drive, const u8 pio)
96 reg = inb(hwif->dma_base + 0x02 + 8*controller); 96 reg = inb(hwif->dma_base + 0x02 + 8*controller);
97 reg |= 1<<((drive->dn&1)+5); 97 reg |= 1<<((drive->dn&1)+5);
98 outb(reg, hwif->dma_base + 0x02 + 8*controller); 98 outb(reg, hwif->dma_base + 0x02 + 8*controller);
99
100 (void)ide_config_drive_speed(drive, XFER_PIO_0 + pio);
101} 99}
102 100
103static int cs5520_tune_chipset(ide_drive_t *drive, const u8 speed) 101static void cs5520_set_dma_mode(ide_drive_t *drive, const u8 speed)
104{ 102{
105 printk(KERN_ERR "cs55x0: bad ide timing.\n"); 103 printk(KERN_ERR "cs55x0: bad ide timing.\n");
106 104
107 cs5520_set_pio_mode(drive, 0); 105 cs5520_set_pio_mode(drive, 0);
108
109 /*
110 * FIXME: this is incorrect to return zero here but
111 * since all users of ide_set_xfer_rate() ignore
112 * the return value it is not a problem currently
113 */
114 return 0;
115} 106}
116 107
117static int cs5520_config_drive_xfer_rate(ide_drive_t *drive) 108static int cs5520_config_drive_xfer_rate(ide_drive_t *drive)
@@ -150,7 +141,7 @@ static int cs5520_dma_on(ide_drive_t *drive)
150static void __devinit init_hwif_cs5520(ide_hwif_t *hwif) 141static void __devinit init_hwif_cs5520(ide_hwif_t *hwif)
151{ 142{
152 hwif->set_pio_mode = &cs5520_set_pio_mode; 143 hwif->set_pio_mode = &cs5520_set_pio_mode;
153 hwif->speedproc = &cs5520_tune_chipset; 144 hwif->set_dma_mode = &cs5520_set_dma_mode;
154 hwif->ide_dma_check = &cs5520_config_drive_xfer_rate; 145 hwif->ide_dma_check = &cs5520_config_drive_xfer_rate;
155 hwif->ide_dma_on = &cs5520_dma_on; 146 hwif->ide_dma_on = &cs5520_dma_on;
156 147
diff --git a/drivers/ide/pci/cs5530.c b/drivers/ide/pci/cs5530.c
index 741507b4cd93..e4121577cef0 100644
--- a/drivers/ide/pci/cs5530.c
+++ b/drivers/ide/pci/cs5530.c
@@ -30,22 +30,6 @@
30#include <asm/io.h> 30#include <asm/io.h>
31#include <asm/irq.h> 31#include <asm/irq.h>
32 32
33/**
34 * cs5530_xfer_set_mode - set a new transfer mode at the drive
35 * @drive: drive to tune
36 * @mode: new mode
37 *
38 * Logging wrapper to the IDE driver speed configuration. This can
39 * probably go away now.
40 */
41
42static int cs5530_set_xfer_mode (ide_drive_t *drive, u8 mode)
43{
44 printk(KERN_DEBUG "%s: cs5530_set_xfer_mode(%s)\n",
45 drive->name, ide_xfer_verbose(mode));
46 return (ide_config_drive_speed(drive, mode));
47}
48
49/* 33/*
50 * Here are the standard PIO mode 0-4 timings for each "format". 34 * Here are the standard PIO mode 0-4 timings for each "format".
51 * Format-0 uses fast data reg timings, with slower command reg timings. 35 * Format-0 uses fast data reg timings, with slower command reg timings.
@@ -62,20 +46,12 @@ static unsigned int cs5530_pio_timings[2][5] = {
62#define CS5530_BAD_PIO(timings) (((timings)&~0x80000000)==0x0000e132) 46#define CS5530_BAD_PIO(timings) (((timings)&~0x80000000)==0x0000e132)
63#define CS5530_BASEREG(hwif) (((hwif)->dma_base & ~0xf) + ((hwif)->channel ? 0x30 : 0x20)) 47#define CS5530_BASEREG(hwif) (((hwif)->dma_base & ~0xf) + ((hwif)->channel ? 0x30 : 0x20))
64 48
65static void cs5530_tunepio(ide_drive_t *drive, u8 pio)
66{
67 unsigned long basereg = CS5530_BASEREG(drive->hwif);
68 unsigned int format = (inl(basereg + 4) >> 31) & 1;
69
70 outl(cs5530_pio_timings[format][pio], basereg + ((drive->dn & 1)<<3));
71}
72
73/** 49/**
74 * cs5530_set_pio_mode - set PIO mode 50 * cs5530_set_pio_mode - set host controller for PIO mode
75 * @drive: drive 51 * @drive: drive
76 * @pio: PIO mode number 52 * @pio: PIO mode number
77 * 53 *
78 * Handles setting of PIO mode for both the chipset and drive. 54 * Handles setting of PIO mode for the chipset.
79 * 55 *
80 * The init_hwif_cs5530() routine guarantees that all drives 56 * The init_hwif_cs5530() routine guarantees that all drives
81 * will have valid default PIO timings set up before we get here. 57 * will have valid default PIO timings set up before we get here.
@@ -83,8 +59,10 @@ static void cs5530_tunepio(ide_drive_t *drive, u8 pio)
83 59
84static void cs5530_set_pio_mode(ide_drive_t *drive, const u8 pio) 60static void cs5530_set_pio_mode(ide_drive_t *drive, const u8 pio)
85{ 61{
86 if (cs5530_set_xfer_mode(drive, XFER_PIO_0 + pio) == 0) 62 unsigned long basereg = CS5530_BASEREG(drive->hwif);
87 cs5530_tunepio(drive, pio); 63 unsigned int format = (inl(basereg + 4) >> 31) & 1;
64
65 outl(cs5530_pio_timings[format][pio], basereg + ((drive->dn & 1)<<3));
88} 66}
89 67
90/** 68/**
@@ -142,20 +120,11 @@ static int cs5530_config_dma(ide_drive_t *drive)
142 return 1; 120 return 1;
143} 121}
144 122
145static int cs5530_tune_chipset(ide_drive_t *drive, const u8 mode) 123static void cs5530_set_dma_mode(ide_drive_t *drive, const u8 mode)
146{ 124{
147 unsigned long basereg; 125 unsigned long basereg;
148 unsigned int reg, timings = 0; 126 unsigned int reg, timings = 0;
149 127
150 /*
151 * Tell the drive to switch to the new mode; abort on failure.
152 */
153 if (cs5530_set_xfer_mode(drive, mode))
154 return 1; /* failure */
155
156 /*
157 * Now tune the chipset to match the drive:
158 */
159 switch (mode) { 128 switch (mode) {
160 case XFER_UDMA_0: timings = 0x00921250; break; 129 case XFER_UDMA_0: timings = 0x00921250; break;
161 case XFER_UDMA_1: timings = 0x00911140; break; 130 case XFER_UDMA_1: timings = 0x00911140; break;
@@ -180,8 +149,6 @@ static int cs5530_tune_chipset(ide_drive_t *drive, const u8 mode)
180 outl(reg, basereg + 4); /* write drive0 config register */ 149 outl(reg, basereg + 4); /* write drive0 config register */
181 outl(timings, basereg + 12); /* write drive1 config register */ 150 outl(timings, basereg + 12); /* write drive1 config register */
182 } 151 }
183
184 return 0; /* success */
185} 152}
186 153
187/** 154/**
@@ -299,7 +266,7 @@ static void __devinit init_hwif_cs5530 (ide_hwif_t *hwif)
299 hwif->serialized = hwif->mate->serialized = 1; 266 hwif->serialized = hwif->mate->serialized = 1;
300 267
301 hwif->set_pio_mode = &cs5530_set_pio_mode; 268 hwif->set_pio_mode = &cs5530_set_pio_mode;
302 hwif->speedproc = &cs5530_tune_chipset; 269 hwif->set_dma_mode = &cs5530_set_dma_mode;
303 270
304 basereg = CS5530_BASEREG(hwif); 271 basereg = CS5530_BASEREG(hwif);
305 d0_timings = inl(basereg + 0); 272 d0_timings = inl(basereg + 0);
@@ -340,6 +307,7 @@ static ide_pci_device_t cs5530_chipset __devinitdata = {
340 .autodma = AUTODMA, 307 .autodma = AUTODMA,
341 .bootable = ON_BOARD, 308 .bootable = ON_BOARD,
342 .pio_mask = ATA_PIO4, 309 .pio_mask = ATA_PIO4,
310 .host_flags = IDE_HFLAG_POST_SET_MODE,
343}; 311};
344 312
345static int __devinit cs5530_init_one(struct pci_dev *dev, const struct pci_device_id *id) 313static int __devinit cs5530_init_one(struct pci_dev *dev, const struct pci_device_id *id)
diff --git a/drivers/ide/pci/cs5535.c b/drivers/ide/pci/cs5535.c
index 5d1be657adca..da606ba6d28c 100644
--- a/drivers/ide/pci/cs5535.c
+++ b/drivers/ide/pci/cs5535.c
@@ -131,26 +131,21 @@ static void cs5535_set_speed(ide_drive_t *drive, const u8 speed)
131 } 131 }
132} 132}
133 133
134/**** 134/**
135 * cs5535_set_drive - Configure the drive to the new speed 135 * cs5535_set_dma_mode - set host controller for DMA mode
136 * @drive: Drive to set up 136 * @drive: drive
137 * @speed: desired speed 137 * @speed: DMA mode
138 * 138 *
139 * cs5535_set_drive() configures the drive and the chipset to a 139 * Programs the chipset for DMA mode.
140 * new speed. It also can be called by upper layers.
141 */ 140 */
142static int cs5535_set_drive(ide_drive_t *drive, u8 speed)
143{
144 if (ide_config_drive_speed(drive, speed))
145 return 1;
146 141
142static void cs5535_set_dma_mode(ide_drive_t *drive, const u8 speed)
143{
147 cs5535_set_speed(drive, speed); 144 cs5535_set_speed(drive, speed);
148
149 return 0;
150} 145}
151 146
152/** 147/**
153 * cs5535_set_pio_mode - PIO setup 148 * cs5535_set_pio_mode - set host controller for PIO mode
154 * @drive: drive 149 * @drive: drive
155 * @pio: PIO mode number 150 * @pio: PIO mode number
156 * 151 *
@@ -159,9 +154,6 @@ static int cs5535_set_drive(ide_drive_t *drive, u8 speed)
159 154
160static void cs5535_set_pio_mode(ide_drive_t *drive, const u8 pio) 155static void cs5535_set_pio_mode(ide_drive_t *drive, const u8 pio)
161{ 156{
162 if (ide_config_drive_speed(drive, XFER_PIO_0 + pio))
163 return;
164
165 cs5535_set_speed(drive, XFER_PIO_0 + pio); 157 cs5535_set_speed(drive, XFER_PIO_0 + pio);
166} 158}
167 159
@@ -203,7 +195,7 @@ static void __devinit init_hwif_cs5535(ide_hwif_t *hwif)
203 hwif->autodma = 0; 195 hwif->autodma = 0;
204 196
205 hwif->set_pio_mode = &cs5535_set_pio_mode; 197 hwif->set_pio_mode = &cs5535_set_pio_mode;
206 hwif->speedproc = &cs5535_set_drive; 198 hwif->set_dma_mode = &cs5535_set_dma_mode;
207 hwif->ide_dma_check = &cs5535_dma_check; 199 hwif->ide_dma_check = &cs5535_dma_check;
208 200
209 hwif->atapi_dma = 1; 201 hwif->atapi_dma = 1;
@@ -227,7 +219,7 @@ static ide_pci_device_t cs5535_chipset __devinitdata = {
227 .init_hwif = init_hwif_cs5535, 219 .init_hwif = init_hwif_cs5535,
228 .autodma = AUTODMA, 220 .autodma = AUTODMA,
229 .bootable = ON_BOARD, 221 .bootable = ON_BOARD,
230 .host_flags = IDE_HFLAG_SINGLE, 222 .host_flags = IDE_HFLAG_SINGLE | IDE_HFLAG_POST_SET_MODE,
231 .pio_mask = ATA_PIO4, 223 .pio_mask = ATA_PIO4,
232}; 224};
233 225
diff --git a/drivers/ide/pci/hpt34x.c b/drivers/ide/pci/hpt34x.c
index a1bb10188fe5..218852aaf22a 100644
--- a/drivers/ide/pci/hpt34x.c
+++ b/drivers/ide/pci/hpt34x.c
@@ -43,7 +43,7 @@
43 43
44#define HPT343_DEBUG_DRIVE_INFO 0 44#define HPT343_DEBUG_DRIVE_INFO 0
45 45
46static int hpt34x_tune_chipset(ide_drive_t *drive, const u8 speed) 46static void hpt34x_set_mode(ide_drive_t *drive, const u8 speed)
47{ 47{
48 struct pci_dev *dev = HWIF(drive)->pci_dev; 48 struct pci_dev *dev = HWIF(drive)->pci_dev;
49 u32 reg1= 0, tmp1 = 0, reg2 = 0, tmp2 = 0; 49 u32 reg1= 0, tmp1 = 0, reg2 = 0, tmp2 = 0;
@@ -73,13 +73,11 @@ static int hpt34x_tune_chipset(ide_drive_t *drive, const u8 speed)
73 drive->dn, reg1, tmp1, reg2, tmp2, 73 drive->dn, reg1, tmp1, reg2, tmp2,
74 hi_speed, lo_speed); 74 hi_speed, lo_speed);
75#endif /* HPT343_DEBUG_DRIVE_INFO */ 75#endif /* HPT343_DEBUG_DRIVE_INFO */
76
77 return(ide_config_drive_speed(drive, speed));
78} 76}
79 77
80static void hpt34x_set_pio_mode(ide_drive_t *drive, const u8 pio) 78static void hpt34x_set_pio_mode(ide_drive_t *drive, const u8 pio)
81{ 79{
82 (void) hpt34x_tune_chipset(drive, (XFER_PIO_0 + pio)); 80 hpt34x_set_mode(drive, XFER_PIO_0 + pio);
83} 81}
84 82
85static int hpt34x_config_drive_xfer_rate (ide_drive_t *drive) 83static int hpt34x_config_drive_xfer_rate (ide_drive_t *drive)
@@ -145,7 +143,8 @@ static void __devinit init_hwif_hpt34x(ide_hwif_t *hwif)
145 hwif->autodma = 0; 143 hwif->autodma = 0;
146 144
147 hwif->set_pio_mode = &hpt34x_set_pio_mode; 145 hwif->set_pio_mode = &hpt34x_set_pio_mode;
148 hwif->speedproc = &hpt34x_tune_chipset; 146 hwif->set_dma_mode = &hpt34x_set_mode;
147
149 hwif->drives[0].autotune = 1; 148 hwif->drives[0].autotune = 1;
150 hwif->drives[1].autotune = 1; 149 hwif->drives[1].autotune = 1;
151 150
diff --git a/drivers/ide/pci/hpt366.c b/drivers/ide/pci/hpt366.c
index 0e7d3b60d43c..8812a9bb032f 100644
--- a/drivers/ide/pci/hpt366.c
+++ b/drivers/ide/pci/hpt366.c
@@ -600,7 +600,7 @@ static u32 get_speed_setting(u8 speed, struct hpt_info *info)
600 return (*info->settings)[i]; 600 return (*info->settings)[i];
601} 601}
602 602
603static int hpt36x_tune_chipset(ide_drive_t *drive, const u8 speed) 603static void hpt36x_set_mode(ide_drive_t *drive, const u8 speed)
604{ 604{
605 ide_hwif_t *hwif = HWIF(drive); 605 ide_hwif_t *hwif = HWIF(drive);
606 struct pci_dev *dev = hwif->pci_dev; 606 struct pci_dev *dev = hwif->pci_dev;
@@ -623,11 +623,9 @@ static int hpt36x_tune_chipset(ide_drive_t *drive, const u8 speed)
623 new_itr &= ~0xc0000000; 623 new_itr &= ~0xc0000000;
624 624
625 pci_write_config_dword(dev, itr_addr, new_itr); 625 pci_write_config_dword(dev, itr_addr, new_itr);
626
627 return ide_config_drive_speed(drive, speed);
628} 626}
629 627
630static int hpt37x_tune_chipset(ide_drive_t *drive, const u8 speed) 628static void hpt37x_set_mode(ide_drive_t *drive, const u8 speed)
631{ 629{
632 ide_hwif_t *hwif = HWIF(drive); 630 ide_hwif_t *hwif = HWIF(drive);
633 struct pci_dev *dev = hwif->pci_dev; 631 struct pci_dev *dev = hwif->pci_dev;
@@ -647,24 +645,22 @@ static int hpt37x_tune_chipset(ide_drive_t *drive, const u8 speed)
647 if (speed < XFER_MW_DMA_0) 645 if (speed < XFER_MW_DMA_0)
648 new_itr &= ~0x80000000; /* Disable on-chip PIO FIFO/buffer */ 646 new_itr &= ~0x80000000; /* Disable on-chip PIO FIFO/buffer */
649 pci_write_config_dword(dev, itr_addr, new_itr); 647 pci_write_config_dword(dev, itr_addr, new_itr);
650
651 return ide_config_drive_speed(drive, speed);
652} 648}
653 649
654static int hpt3xx_tune_chipset(ide_drive_t *drive, u8 speed) 650static void hpt3xx_set_mode(ide_drive_t *drive, const u8 speed)
655{ 651{
656 ide_hwif_t *hwif = HWIF(drive); 652 ide_hwif_t *hwif = HWIF(drive);
657 struct hpt_info *info = pci_get_drvdata(hwif->pci_dev); 653 struct hpt_info *info = pci_get_drvdata(hwif->pci_dev);
658 654
659 if (info->chip_type >= HPT370) 655 if (info->chip_type >= HPT370)
660 return hpt37x_tune_chipset(drive, speed); 656 hpt37x_set_mode(drive, speed);
661 else /* hpt368: hpt_minimum_revision(dev, 2) */ 657 else /* hpt368: hpt_minimum_revision(dev, 2) */
662 return hpt36x_tune_chipset(drive, speed); 658 hpt36x_set_mode(drive, speed);
663} 659}
664 660
665static void hpt3xx_set_pio_mode(ide_drive_t *drive, const u8 pio) 661static void hpt3xx_set_pio_mode(ide_drive_t *drive, const u8 pio)
666{ 662{
667 (void) hpt3xx_tune_chipset (drive, XFER_PIO_0 + pio); 663 hpt3xx_set_mode(drive, XFER_PIO_0 + pio);
668} 664}
669 665
670static int hpt3xx_quirkproc(ide_drive_t *drive) 666static int hpt3xx_quirkproc(ide_drive_t *drive)
@@ -1257,7 +1253,7 @@ static void __devinit init_hwif_hpt366(ide_hwif_t *hwif)
1257 hwif->select_data = hwif->channel ? 0x54 : 0x50; 1253 hwif->select_data = hwif->channel ? 0x54 : 0x50;
1258 1254
1259 hwif->set_pio_mode = &hpt3xx_set_pio_mode; 1255 hwif->set_pio_mode = &hpt3xx_set_pio_mode;
1260 hwif->speedproc = &hpt3xx_tune_chipset; 1256 hwif->set_dma_mode = &hpt3xx_set_mode;
1261 hwif->quirkproc = &hpt3xx_quirkproc; 1257 hwif->quirkproc = &hpt3xx_quirkproc;
1262 hwif->intrproc = &hpt3xx_intrproc; 1258 hwif->intrproc = &hpt3xx_intrproc;
1263 hwif->maskproc = &hpt3xx_maskproc; 1259 hwif->maskproc = &hpt3xx_maskproc;
diff --git a/drivers/ide/pci/it8213.c b/drivers/ide/pci/it8213.c
index 76e91ff9420b..ecf4ce078dce 100644
--- a/drivers/ide/pci/it8213.c
+++ b/drivers/ide/pci/it8213.c
@@ -48,15 +48,15 @@ static u8 it8213_dma_2_pio (u8 xfer_rate) {
48 } 48 }
49} 49}
50 50
51/* 51/**
52 * it8213_tune_pio - tune a drive 52 * it8213_set_pio_mode - set host controller for PIO mode
53 * @drive: drive to tune 53 * @drive: drive
54 * @pio: desired PIO mode 54 * @pio: PIO mode number
55 * 55 *
56 * Set the interface PIO mode. 56 * Set the interface PIO mode.
57 */ 57 */
58 58
59static void it8213_tune_pio(ide_drive_t *drive, const u8 pio) 59static void it8213_set_pio_mode(ide_drive_t *drive, const u8 pio)
60{ 60{
61 ide_hwif_t *hwif = HWIF(drive); 61 ide_hwif_t *hwif = HWIF(drive);
62 struct pci_dev *dev = hwif->pci_dev; 62 struct pci_dev *dev = hwif->pci_dev;
@@ -105,21 +105,15 @@ static void it8213_tune_pio(ide_drive_t *drive, const u8 pio)
105 spin_unlock_irqrestore(&tune_lock, flags); 105 spin_unlock_irqrestore(&tune_lock, flags);
106} 106}
107 107
108static void it8213_set_pio_mode(ide_drive_t *drive, const u8 pio)
109{
110 it8213_tune_pio(drive, pio);
111 ide_config_drive_speed(drive, XFER_PIO_0 + pio);
112}
113
114/** 108/**
115 * it8213_tune_chipset - set controller timings 109 * it8213_set_dma_mode - set host controller for DMA mode
116 * @drive: Drive to set up 110 * @drive: drive
117 * @speed: speed we want to achieve 111 * @speed: DMA mode
118 * 112 *
119 * Tune the ITE chipset for the desired mode. 113 * Tune the ITE chipset for the DMA mode.
120 */ 114 */
121 115
122static int it8213_tune_chipset(ide_drive_t *drive, const u8 speed) 116static void it8213_set_dma_mode(ide_drive_t *drive, const u8 speed)
123{ 117{
124 ide_hwif_t *hwif = HWIF(drive); 118 ide_hwif_t *hwif = HWIF(drive);
125 struct pci_dev *dev = hwif->pci_dev; 119 struct pci_dev *dev = hwif->pci_dev;
@@ -152,7 +146,7 @@ static int it8213_tune_chipset(ide_drive_t *drive, const u8 speed)
152 case XFER_SW_DMA_2: 146 case XFER_SW_DMA_2:
153 break; 147 break;
154 default: 148 default:
155 return -1; 149 return;
156 } 150 }
157 151
158 if (speed >= XFER_UDMA_0) { 152 if (speed >= XFER_UDMA_0) {
@@ -182,9 +176,7 @@ static int it8213_tune_chipset(ide_drive_t *drive, const u8 speed)
182 pci_write_config_byte(dev, 0x55, (u8) reg55 & ~w_flag); 176 pci_write_config_byte(dev, 0x55, (u8) reg55 & ~w_flag);
183 } 177 }
184 178
185 it8213_tune_pio(drive, it8213_dma_2_pio(speed)); 179 it8213_set_pio_mode(drive, it8213_dma_2_pio(speed));
186
187 return ide_config_drive_speed(drive, speed);
188} 180}
189 181
190/** 182/**
@@ -220,7 +212,7 @@ static void __devinit init_hwif_it8213(ide_hwif_t *hwif)
220{ 212{
221 u8 reg42h = 0; 213 u8 reg42h = 0;
222 214
223 hwif->speedproc = &it8213_tune_chipset; 215 hwif->set_dma_mode = &it8213_set_dma_mode;
224 hwif->set_pio_mode = &it8213_set_pio_mode; 216 hwif->set_pio_mode = &it8213_set_pio_mode;
225 217
226 hwif->autodma = 0; 218 hwif->autodma = 0;
diff --git a/drivers/ide/pci/it821x.c b/drivers/ide/pci/it821x.c
index 758a98230cc5..1b69d82478c6 100644
--- a/drivers/ide/pci/it821x.c
+++ b/drivers/ide/pci/it821x.c
@@ -229,24 +229,24 @@ static void it821x_clock_strategy(ide_drive_t *drive)
229} 229}
230 230
231/** 231/**
232 * it821x_tunepio - tune a drive 232 * it821x_set_pio_mode - set host controller for PIO mode
233 * @drive: drive to tune 233 * @drive: drive
234 * @pio: the desired PIO mode 234 * @pio: PIO mode number
235 * 235 *
236 * Try to tune the drive/host to the desired PIO mode taking into 236 * Tune the host to the desired PIO mode taking into the consideration
237 * the consideration the maximum PIO mode supported by the other 237 * the maximum PIO mode supported by the other device on the cable.
238 * device on the cable.
239 */ 238 */
240 239
241static int it821x_tunepio(ide_drive_t *drive, u8 set_pio) 240static void it821x_set_pio_mode(ide_drive_t *drive, const u8 pio)
242{ 241{
243 ide_hwif_t *hwif = drive->hwif; 242 ide_hwif_t *hwif = drive->hwif;
244 struct it821x_dev *itdev = ide_get_hwifdata(hwif); 243 struct it821x_dev *itdev = ide_get_hwifdata(hwif);
245 int unit = drive->select.b.unit; 244 int unit = drive->select.b.unit;
246 ide_drive_t *pair = &hwif->drives[1 - unit]; 245 ide_drive_t *pair = &hwif->drives[1 - unit];
246 u8 set_pio = pio;
247 247
248 /* Spec says 89 ref driver uses 88 */ 248 /* Spec says 89 ref driver uses 88 */
249 static u16 pio[] = { 0xAA88, 0xA382, 0xA181, 0x3332, 0x3121 }; 249 static u16 pio_timings[]= { 0xAA88, 0xA382, 0xA181, 0x3332, 0x3121 };
250 static u8 pio_want[] = { ATA_66, ATA_66, ATA_66, ATA_66, ATA_ANY }; 250 static u8 pio_want[] = { ATA_66, ATA_66, ATA_66, ATA_66, ATA_ANY };
251 251
252 /* 252 /*
@@ -261,22 +261,12 @@ static int it821x_tunepio(ide_drive_t *drive, u8 set_pio)
261 set_pio = pair_pio; 261 set_pio = pair_pio;
262 } 262 }
263 263
264 if (itdev->smart)
265 return 0;
266
267 /* We prefer 66Mhz clock for PIO 0-3, don't care for PIO4 */ 264 /* We prefer 66Mhz clock for PIO 0-3, don't care for PIO4 */
268 itdev->want[unit][1] = pio_want[set_pio]; 265 itdev->want[unit][1] = pio_want[set_pio];
269 itdev->want[unit][0] = 1; /* PIO is lowest priority */ 266 itdev->want[unit][0] = 1; /* PIO is lowest priority */
270 itdev->pio[unit] = pio[set_pio]; 267 itdev->pio[unit] = pio_timings[set_pio];
271 it821x_clock_strategy(drive); 268 it821x_clock_strategy(drive);
272 it821x_program(drive, itdev->pio[unit]); 269 it821x_program(drive, itdev->pio[unit]);
273
274 return ide_config_drive_speed(drive, XFER_PIO_0 + set_pio);
275}
276
277static void it821x_set_pio_mode(ide_drive_t *drive, const u8 pio)
278{
279 (void)it821x_tunepio(drive, pio);
280} 270}
281 271
282/** 272/**
@@ -405,47 +395,24 @@ static int it821x_dma_end(ide_drive_t *drive)
405} 395}
406 396
407/** 397/**
408 * it821x_tune_chipset - set controller timings 398 * it821x_set_dma_mode - set host controller for DMA mode
409 * @drive: Drive to set up 399 * @drive: drive
410 * @speed: speed we want to achieve 400 * @speed: DMA mode
411 * 401 *
412 * Tune the ITE chipset for the desired mode. 402 * Tune the ITE chipset for the desired DMA mode.
413 */ 403 */
414 404
415static int it821x_tune_chipset(ide_drive_t *drive, const u8 speed) 405static void it821x_set_dma_mode(ide_drive_t *drive, const u8 speed)
416{ 406{
417 407 /*
418 ide_hwif_t *hwif = drive->hwif; 408 * MWDMA tuning is really hard because our MWDMA and PIO
419 struct it821x_dev *itdev = ide_get_hwifdata(hwif); 409 * timings are kept in the same place. We can switch in the
420 410 * host dma on/off callbacks.
421 if (itdev->smart == 0) { 411 */
422 switch (speed) { 412 if (speed >= XFER_UDMA_0 && speed <= XFER_UDMA_6)
423 /* MWDMA tuning is really hard because our MWDMA and PIO 413 it821x_tune_udma(drive, speed - XFER_UDMA_0);
424 timings are kept in the same place. We can switch in the 414 else if (speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2)
425 host dma on/off callbacks */ 415 it821x_tune_mwdma(drive, speed - XFER_MW_DMA_0);
426 case XFER_MW_DMA_2:
427 case XFER_MW_DMA_1:
428 case XFER_MW_DMA_0:
429 it821x_tune_mwdma(drive, (speed - XFER_MW_DMA_0));
430 break;
431 case XFER_UDMA_6:
432 case XFER_UDMA_5:
433 case XFER_UDMA_4:
434 case XFER_UDMA_3:
435 case XFER_UDMA_2:
436 case XFER_UDMA_1:
437 case XFER_UDMA_0:
438 it821x_tune_udma(drive, (speed - XFER_UDMA_0));
439 break;
440 default:
441 return 1;
442 }
443
444 return ide_config_drive_speed(drive, speed);
445 }
446
447 /* don't touch anything in the smart mode */
448 return 0;
449} 416}
450 417
451/** 418/**
@@ -629,14 +596,15 @@ static void __devinit init_hwif_it821x(ide_hwif_t *hwif)
629 printk(KERN_WARNING "it821x: Revision 0x10, workarounds activated.\n"); 596 printk(KERN_WARNING "it821x: Revision 0x10, workarounds activated.\n");
630 } 597 }
631 598
632 hwif->speedproc = &it821x_tune_chipset; 599 if (idev->smart == 0) {
633 hwif->set_pio_mode = &it821x_set_pio_mode; 600 hwif->set_pio_mode = &it821x_set_pio_mode;
601 hwif->set_dma_mode = &it821x_set_dma_mode;
634 602
635 /* MWDMA/PIO clock switching for pass through mode */ 603 /* MWDMA/PIO clock switching for pass through mode */
636 if(!idev->smart) {
637 hwif->dma_start = &it821x_dma_start; 604 hwif->dma_start = &it821x_dma_start;
638 hwif->ide_dma_end = &it821x_dma_end; 605 hwif->ide_dma_end = &it821x_dma_end;
639 } 606 } else
607 hwif->host_flags |= IDE_HFLAG_NO_SET_MODE;
640 608
641 hwif->drives[0].autotune = 1; 609 hwif->drives[0].autotune = 1;
642 hwif->drives[1].autotune = 1; 610 hwif->drives[1].autotune = 1;
diff --git a/drivers/ide/pci/jmicron.c b/drivers/ide/pci/jmicron.c
index d379fbaf6743..582b4cae2b53 100644
--- a/drivers/ide/pci/jmicron.c
+++ b/drivers/ide/pci/jmicron.c
@@ -85,21 +85,18 @@ static u8 __devinit ata66_jmicron(ide_hwif_t *hwif)
85 85
86static void jmicron_set_pio_mode(ide_drive_t *drive, const u8 pio) 86static void jmicron_set_pio_mode(ide_drive_t *drive, const u8 pio)
87{ 87{
88 ide_config_drive_speed(drive, XFER_PIO_0 + pio);
89} 88}
90 89
91/** 90/**
92 * jmicron_tune_chipset - set controller timings 91 * jmicron_set_dma_mode - set host controller for DMA mode
93 * @drive: Drive to set up 92 * @drive: drive
94 * @speed: speed we want to achieve 93 * @mode: DMA mode
95 * 94 *
96 * As the JMicron snoops for timings all we actually need to do is 95 * As the JMicron snoops for timings we don't need to do anything here.
97 * set the transfer mode on the device.
98 */ 96 */
99 97
100static int jmicron_tune_chipset(ide_drive_t *drive, const u8 speed) 98static void jmicron_set_dma_mode(ide_drive_t *drive, const u8 mode)
101{ 99{
102 return ide_config_drive_speed(drive, speed);
103} 100}
104 101
105/** 102/**
@@ -129,8 +126,8 @@ static int jmicron_config_drive_for_dma (ide_drive_t *drive)
129 126
130static void __devinit init_hwif_jmicron(ide_hwif_t *hwif) 127static void __devinit init_hwif_jmicron(ide_hwif_t *hwif)
131{ 128{
132 hwif->speedproc = &jmicron_tune_chipset;
133 hwif->set_pio_mode = &jmicron_set_pio_mode; 129 hwif->set_pio_mode = &jmicron_set_pio_mode;
130 hwif->set_dma_mode = &jmicron_set_dma_mode;
134 131
135 hwif->drives[0].autotune = 1; 132 hwif->drives[0].autotune = 1;
136 hwif->drives[1].autotune = 1; 133 hwif->drives[1].autotune = 1;
diff --git a/drivers/ide/pci/pdc202xx_new.c b/drivers/ide/pci/pdc202xx_new.c
index 95600681bd3a..ad0bdcb0c02b 100644
--- a/drivers/ide/pci/pdc202xx_new.c
+++ b/drivers/ide/pci/pdc202xx_new.c
@@ -146,19 +146,16 @@ static struct udma_timing {
146 { 0x1a, 0x01, 0xcb }, /* UDMA mode 6 */ 146 { 0x1a, 0x01, 0xcb }, /* UDMA mode 6 */
147}; 147};
148 148
149static int pdcnew_tune_chipset(ide_drive_t *drive, const u8 speed) 149static void pdcnew_set_mode(ide_drive_t *drive, const u8 speed)
150{ 150{
151 ide_hwif_t *hwif = HWIF(drive); 151 ide_hwif_t *hwif = HWIF(drive);
152 u8 adj = (drive->dn & 1) ? 0x08 : 0x00; 152 u8 adj = (drive->dn & 1) ? 0x08 : 0x00;
153 153
154 /* 154 /*
155 * Issue SETFEATURES_XFER to the drive first. PDC202xx hardware will 155 * IDE core issues SETFEATURES_XFER to the drive first (thanks to
156 * IDE_HFLAG_POST_SET_MODE in ->host_flags). PDC202xx hardware will
156 * automatically set the timing registers based on 100 MHz PLL output. 157 * automatically set the timing registers based on 100 MHz PLL output.
157 */ 158 *
158 if (ide_config_drive_speed(drive, speed))
159 return 1;
160
161 /*
162 * As we set up the PLL to output 133 MHz for UltraDMA/133 capable 159 * As we set up the PLL to output 133 MHz for UltraDMA/133 capable
163 * chips, we must override the default register settings... 160 * chips, we must override the default register settings...
164 */ 161 */
@@ -211,13 +208,11 @@ static int pdcnew_tune_chipset(ide_drive_t *drive, const u8 speed)
211 208
212 set_indexed_reg(hwif, 0x10 + adj, tmp & 0x7f); 209 set_indexed_reg(hwif, 0x10 + adj, tmp & 0x7f);
213 } 210 }
214
215 return 0;
216} 211}
217 212
218static void pdcnew_set_pio_mode(ide_drive_t *drive, const u8 pio) 213static void pdcnew_set_pio_mode(ide_drive_t *drive, const u8 pio)
219{ 214{
220 (void)pdcnew_tune_chipset(drive, XFER_PIO_0 + pio); 215 pdcnew_set_mode(drive, XFER_PIO_0 + pio);
221} 216}
222 217
223static u8 pdcnew_cable_detect(ide_hwif_t *hwif) 218static u8 pdcnew_cable_detect(ide_hwif_t *hwif)
@@ -490,9 +485,9 @@ static void __devinit init_hwif_pdc202new(ide_hwif_t *hwif)
490 hwif->autodma = 0; 485 hwif->autodma = 0;
491 486
492 hwif->set_pio_mode = &pdcnew_set_pio_mode; 487 hwif->set_pio_mode = &pdcnew_set_pio_mode;
488 hwif->set_dma_mode = &pdcnew_set_mode;
493 489
494 hwif->quirkproc = &pdcnew_quirkproc; 490 hwif->quirkproc = &pdcnew_quirkproc;
495 hwif->speedproc = &pdcnew_tune_chipset;
496 hwif->resetproc = &pdcnew_reset; 491 hwif->resetproc = &pdcnew_reset;
497 492
498 hwif->err_stops_fifo = 1; 493 hwif->err_stops_fifo = 1;
@@ -583,6 +578,7 @@ static ide_pci_device_t pdcnew_chipsets[] __devinitdata = {
583 .bootable = OFF_BOARD, 578 .bootable = OFF_BOARD,
584 .pio_mask = ATA_PIO4, 579 .pio_mask = ATA_PIO4,
585 .udma_mask = 0x3f, /* udma0-5 */ 580 .udma_mask = 0x3f, /* udma0-5 */
581 .host_flags = IDE_HFLAG_POST_SET_MODE,
586 },{ /* 1 */ 582 },{ /* 1 */
587 .name = "PDC20269", 583 .name = "PDC20269",
588 .init_setup = init_setup_pdcnew, 584 .init_setup = init_setup_pdcnew,
@@ -592,6 +588,7 @@ static ide_pci_device_t pdcnew_chipsets[] __devinitdata = {
592 .bootable = OFF_BOARD, 588 .bootable = OFF_BOARD,
593 .pio_mask = ATA_PIO4, 589 .pio_mask = ATA_PIO4,
594 .udma_mask = 0x7f, /* udma0-6*/ 590 .udma_mask = 0x7f, /* udma0-6*/
591 .host_flags = IDE_HFLAG_POST_SET_MODE,
595 },{ /* 2 */ 592 },{ /* 2 */
596 .name = "PDC20270", 593 .name = "PDC20270",
597 .init_setup = init_setup_pdc20270, 594 .init_setup = init_setup_pdc20270,
@@ -601,6 +598,7 @@ static ide_pci_device_t pdcnew_chipsets[] __devinitdata = {
601 .bootable = OFF_BOARD, 598 .bootable = OFF_BOARD,
602 .pio_mask = ATA_PIO4, 599 .pio_mask = ATA_PIO4,
603 .udma_mask = 0x3f, /* udma0-5 */ 600 .udma_mask = 0x3f, /* udma0-5 */
601 .host_flags = IDE_HFLAG_POST_SET_MODE,
604 },{ /* 3 */ 602 },{ /* 3 */
605 .name = "PDC20271", 603 .name = "PDC20271",
606 .init_setup = init_setup_pdcnew, 604 .init_setup = init_setup_pdcnew,
@@ -610,6 +608,7 @@ static ide_pci_device_t pdcnew_chipsets[] __devinitdata = {
610 .bootable = OFF_BOARD, 608 .bootable = OFF_BOARD,
611 .pio_mask = ATA_PIO4, 609 .pio_mask = ATA_PIO4,
612 .udma_mask = 0x7f, /* udma0-6*/ 610 .udma_mask = 0x7f, /* udma0-6*/
611 .host_flags = IDE_HFLAG_POST_SET_MODE,
613 },{ /* 4 */ 612 },{ /* 4 */
614 .name = "PDC20275", 613 .name = "PDC20275",
615 .init_setup = init_setup_pdcnew, 614 .init_setup = init_setup_pdcnew,
@@ -619,6 +618,7 @@ static ide_pci_device_t pdcnew_chipsets[] __devinitdata = {
619 .bootable = OFF_BOARD, 618 .bootable = OFF_BOARD,
620 .pio_mask = ATA_PIO4, 619 .pio_mask = ATA_PIO4,
621 .udma_mask = 0x7f, /* udma0-6*/ 620 .udma_mask = 0x7f, /* udma0-6*/
621 .host_flags = IDE_HFLAG_POST_SET_MODE,
622 },{ /* 5 */ 622 },{ /* 5 */
623 .name = "PDC20276", 623 .name = "PDC20276",
624 .init_setup = init_setup_pdc20276, 624 .init_setup = init_setup_pdc20276,
@@ -628,6 +628,7 @@ static ide_pci_device_t pdcnew_chipsets[] __devinitdata = {
628 .bootable = OFF_BOARD, 628 .bootable = OFF_BOARD,
629 .pio_mask = ATA_PIO4, 629 .pio_mask = ATA_PIO4,
630 .udma_mask = 0x7f, /* udma0-6*/ 630 .udma_mask = 0x7f, /* udma0-6*/
631 .host_flags = IDE_HFLAG_POST_SET_MODE,
631 },{ /* 6 */ 632 },{ /* 6 */
632 .name = "PDC20277", 633 .name = "PDC20277",
633 .init_setup = init_setup_pdcnew, 634 .init_setup = init_setup_pdcnew,
@@ -637,6 +638,7 @@ static ide_pci_device_t pdcnew_chipsets[] __devinitdata = {
637 .bootable = OFF_BOARD, 638 .bootable = OFF_BOARD,
638 .pio_mask = ATA_PIO4, 639 .pio_mask = ATA_PIO4,
639 .udma_mask = 0x7f, /* udma0-6*/ 640 .udma_mask = 0x7f, /* udma0-6*/
641 .host_flags = IDE_HFLAG_POST_SET_MODE,
640 } 642 }
641}; 643};
642 644
diff --git a/drivers/ide/pci/pdc202xx_old.c b/drivers/ide/pci/pdc202xx_old.c
index b578307fad51..8c3e8cf36ec9 100644
--- a/drivers/ide/pci/pdc202xx_old.c
+++ b/drivers/ide/pci/pdc202xx_old.c
@@ -63,7 +63,7 @@ static const char *pdc_quirk_drives[] = {
63 63
64static void pdc_old_disable_66MHz_clock(ide_hwif_t *); 64static void pdc_old_disable_66MHz_clock(ide_hwif_t *);
65 65
66static int pdc202xx_tune_chipset(ide_drive_t *drive, const u8 speed) 66static void pdc202xx_set_mode(ide_drive_t *drive, const u8 speed)
67{ 67{
68 ide_hwif_t *hwif = HWIF(drive); 68 ide_hwif_t *hwif = HWIF(drive);
69 struct pci_dev *dev = hwif->pci_dev; 69 struct pci_dev *dev = hwif->pci_dev;
@@ -138,13 +138,11 @@ static int pdc202xx_tune_chipset(ide_drive_t *drive, const u8 speed)
138 pci_read_config_dword(dev, drive_pci, &drive_conf); 138 pci_read_config_dword(dev, drive_pci, &drive_conf);
139 printk("0x%08x\n", drive_conf); 139 printk("0x%08x\n", drive_conf);
140#endif 140#endif
141
142 return ide_config_drive_speed(drive, speed);
143} 141}
144 142
145static void pdc202xx_set_pio_mode(ide_drive_t *drive, const u8 pio) 143static void pdc202xx_set_pio_mode(ide_drive_t *drive, const u8 pio)
146{ 144{
147 pdc202xx_tune_chipset(drive, XFER_PIO_0 + pio); 145 pdc202xx_set_mode(drive, XFER_PIO_0 + pio);
148} 146}
149 147
150static u8 pdc202xx_old_cable_detect (ide_hwif_t *hwif) 148static u8 pdc202xx_old_cable_detect (ide_hwif_t *hwif)
@@ -330,14 +328,13 @@ static void __devinit init_hwif_pdc202xx(ide_hwif_t *hwif)
330 hwif->autodma = 0; 328 hwif->autodma = 0;
331 329
332 hwif->set_pio_mode = &pdc202xx_set_pio_mode; 330 hwif->set_pio_mode = &pdc202xx_set_pio_mode;
331 hwif->set_dma_mode = &pdc202xx_set_mode;
333 332
334 hwif->quirkproc = &pdc202xx_quirkproc; 333 hwif->quirkproc = &pdc202xx_quirkproc;
335 334
336 if (hwif->pci_dev->device != PCI_DEVICE_ID_PROMISE_20246) 335 if (hwif->pci_dev->device != PCI_DEVICE_ID_PROMISE_20246)
337 hwif->resetproc = &pdc202xx_reset; 336 hwif->resetproc = &pdc202xx_reset;
338 337
339 hwif->speedproc = &pdc202xx_tune_chipset;
340
341 hwif->err_stops_fifo = 1; 338 hwif->err_stops_fifo = 1;
342 339
343 hwif->drives[0].autotune = hwif->drives[1].autotune = 1; 340 hwif->drives[0].autotune = hwif->drives[1].autotune = 1;
diff --git a/drivers/ide/pci/piix.c b/drivers/ide/pci/piix.c
index fd8214a7ab98..38c91ba6497b 100644
--- a/drivers/ide/pci/piix.c
+++ b/drivers/ide/pci/piix.c
@@ -137,13 +137,14 @@ static u8 piix_dma_2_pio (u8 xfer_rate) {
137} 137}
138 138
139/** 139/**
140 * piix_tune_pio - tune PIIX for PIO mode 140 * piix_set_pio_mode - set host controller for PIO mode
141 * @drive: drive to tune 141 * @drive: drive
142 * @pio: desired PIO mode 142 * @pio: PIO mode number
143 * 143 *
144 * Set the interface PIO mode based upon the settings done by AMI BIOS. 144 * Set the interface PIO mode based upon the settings done by AMI BIOS.
145 */ 145 */
146static void piix_tune_pio (ide_drive_t *drive, u8 pio) 146
147static void piix_set_pio_mode(ide_drive_t *drive, const u8 pio)
147{ 148{
148 ide_hwif_t *hwif = HWIF(drive); 149 ide_hwif_t *hwif = HWIF(drive);
149 struct pci_dev *dev = hwif->pci_dev; 150 struct pci_dev *dev = hwif->pci_dev;
@@ -204,31 +205,15 @@ static void piix_tune_pio (ide_drive_t *drive, u8 pio)
204} 205}
205 206
206/** 207/**
207 * piix_set_pio_mode - set PIO mode 208 * piix_set_dma_mode - set host controller for DMA mode
208 * @drive: drive to tune 209 * @drive: drive
209 * @pio: desired PIO mode 210 * @speed: DMA mode
210 *
211 * Set the drive's PIO mode (might be useful if drive is not registered
212 * in CMOS for any reason).
213 */
214
215static void piix_set_pio_mode(ide_drive_t *drive, const u8 pio)
216{
217 piix_tune_pio(drive, pio);
218 (void) ide_config_drive_speed(drive, XFER_PIO_0 + pio);
219}
220
221/**
222 * piix_tune_chipset - tune a PIIX interface
223 * @drive: IDE drive to tune
224 * @speed: speed to configure
225 * 211 *
226 * Set a PIIX interface channel to the desired speeds. This involves 212 * Set a PIIX host controller to the desired DMA mode. This involves
227 * requires the right timing data into the PIIX configuration space 213 * programming the right timing data into the PCI configuration space.
228 * then setting the drive parameters appropriately
229 */ 214 */
230 215
231static int piix_tune_chipset(ide_drive_t *drive, const u8 speed) 216static void piix_set_dma_mode(ide_drive_t *drive, const u8 speed)
232{ 217{
233 ide_hwif_t *hwif = HWIF(drive); 218 ide_hwif_t *hwif = HWIF(drive);
234 struct pci_dev *dev = hwif->pci_dev; 219 struct pci_dev *dev = hwif->pci_dev;
@@ -259,7 +244,7 @@ static int piix_tune_chipset(ide_drive_t *drive, const u8 speed)
259 case XFER_MW_DMA_2: 244 case XFER_MW_DMA_2:
260 case XFER_MW_DMA_1: 245 case XFER_MW_DMA_1:
261 case XFER_SW_DMA_2: break; 246 case XFER_SW_DMA_2: break;
262 default: return -1; 247 default: return;
263 } 248 }
264 249
265 if (speed >= XFER_UDMA_0) { 250 if (speed >= XFER_UDMA_0) {
@@ -288,9 +273,7 @@ static int piix_tune_chipset(ide_drive_t *drive, const u8 speed)
288 pci_write_config_byte(dev, 0x55, (u8) reg55 & ~w_flag); 273 pci_write_config_byte(dev, 0x55, (u8) reg55 & ~w_flag);
289 } 274 }
290 275
291 piix_tune_pio(drive, piix_dma_2_pio(speed)); 276 piix_set_pio_mode(drive, piix_dma_2_pio(speed));
292
293 return ide_config_drive_speed(drive, speed);
294} 277}
295 278
296/** 279/**
@@ -448,7 +431,8 @@ static void __devinit init_hwif_piix(ide_hwif_t *hwif)
448 hwif->autodma = 0; 431 hwif->autodma = 0;
449 432
450 hwif->set_pio_mode = &piix_set_pio_mode; 433 hwif->set_pio_mode = &piix_set_pio_mode;
451 hwif->speedproc = &piix_tune_chipset; 434 hwif->set_dma_mode = &piix_set_dma_mode;
435
452 hwif->drives[0].autotune = 1; 436 hwif->drives[0].autotune = 1;
453 hwif->drives[1].autotune = 1; 437 hwif->drives[1].autotune = 1;
454 438
diff --git a/drivers/ide/pci/sc1200.c b/drivers/ide/pci/sc1200.c
index 79ecab689489..76f0868054a1 100644
--- a/drivers/ide/pci/sc1200.c
+++ b/drivers/ide/pci/sc1200.c
@@ -68,17 +68,6 @@ static unsigned short sc1200_get_pci_clock (void)
68 return pci_clock; 68 return pci_clock;
69} 69}
70 70
71extern char *ide_xfer_verbose (byte xfer_rate);
72
73/*
74 * Set a new transfer mode at the drive
75 */
76static int sc1200_set_xfer_mode (ide_drive_t *drive, byte mode)
77{
78 printk("%s: sc1200_set_xfer_mode(%s)\n", drive->name, ide_xfer_verbose(mode));
79 return ide_config_drive_speed(drive, mode);
80}
81
82/* 71/*
83 * Here are the standard PIO mode 0-4 timings for each "format". 72 * Here are the standard PIO mode 0-4 timings for each "format".
84 * Format-0 uses fast data reg timings, with slower command reg timings. 73 * Format-0 uses fast data reg timings, with slower command reg timings.
@@ -138,7 +127,7 @@ out:
138 return mask; 127 return mask;
139} 128}
140 129
141static int sc1200_tune_chipset(ide_drive_t *drive, const u8 mode) 130static void sc1200_set_dma_mode(ide_drive_t *drive, const u8 mode)
142{ 131{
143 ide_hwif_t *hwif = HWIF(drive); 132 ide_hwif_t *hwif = HWIF(drive);
144 int unit = drive->select.b.unit; 133 int unit = drive->select.b.unit;
@@ -146,17 +135,9 @@ static int sc1200_tune_chipset(ide_drive_t *drive, const u8 mode)
146 unsigned short pci_clock; 135 unsigned short pci_clock;
147 unsigned int basereg = hwif->channel ? 0x50 : 0x40; 136 unsigned int basereg = hwif->channel ? 0x50 : 0x40;
148 137
149 /*
150 * Tell the drive to switch to the new mode; abort on failure.
151 */
152 if (sc1200_set_xfer_mode(drive, mode))
153 return 1; /* failure */
154
155 pci_clock = sc1200_get_pci_clock(); 138 pci_clock = sc1200_get_pci_clock();
156 139
157 /* 140 /*
158 * Now tune the chipset to match the drive:
159 *
160 * Note that each DMA mode has several timings associated with it. 141 * Note that each DMA mode has several timings associated with it.
161 * The correct timing depends on the fast PCI clock freq. 142 * The correct timing depends on the fast PCI clock freq.
162 */ 143 */
@@ -216,8 +197,6 @@ static int sc1200_tune_chipset(ide_drive_t *drive, const u8 mode)
216 } else { 197 } else {
217 pci_write_config_dword(hwif->pci_dev, basereg+12, timings); 198 pci_write_config_dword(hwif->pci_dev, basereg+12, timings);
218 } 199 }
219
220 return 0; /* success */
221} 200}
222 201
223/* 202/*
@@ -286,13 +265,12 @@ static void sc1200_set_pio_mode(ide_drive_t *drive, const u8 pio)
286 if (mode != -1) { 265 if (mode != -1) {
287 printk("SC1200: %s: changing (U)DMA mode\n", drive->name); 266 printk("SC1200: %s: changing (U)DMA mode\n", drive->name);
288 hwif->dma_off_quietly(drive); 267 hwif->dma_off_quietly(drive);
289 if (sc1200_tune_chipset(drive, mode) == 0) 268 if (ide_set_dma_mode(drive, mode) == 0)
290 hwif->dma_host_on(drive); 269 hwif->dma_host_on(drive);
291 return; 270 return;
292 } 271 }
293 272
294 if (sc1200_set_xfer_mode(drive, XFER_PIO_0 + pio) == 0) 273 sc1200_tunepio(drive, pio);
295 sc1200_tunepio(drive, pio);
296} 274}
297 275
298#ifdef CONFIG_PM 276#ifdef CONFIG_PM
@@ -408,7 +386,7 @@ static void __devinit init_hwif_sc1200 (ide_hwif_t *hwif)
408 hwif->autodma = 1; 386 hwif->autodma = 1;
409 387
410 hwif->set_pio_mode = &sc1200_set_pio_mode; 388 hwif->set_pio_mode = &sc1200_set_pio_mode;
411 hwif->speedproc = &sc1200_tune_chipset; 389 hwif->set_dma_mode = &sc1200_set_dma_mode;
412 } 390 }
413 hwif->atapi_dma = 1; 391 hwif->atapi_dma = 1;
414 hwif->ultra_mask = 0x07; 392 hwif->ultra_mask = 0x07;
@@ -423,7 +401,7 @@ static ide_pci_device_t sc1200_chipset __devinitdata = {
423 .init_hwif = init_hwif_sc1200, 401 .init_hwif = init_hwif_sc1200,
424 .autodma = AUTODMA, 402 .autodma = AUTODMA,
425 .bootable = ON_BOARD, 403 .bootable = ON_BOARD,
426 .host_flags = IDE_HFLAG_ABUSE_DMA_MODES, 404 .host_flags = IDE_HFLAG_ABUSE_DMA_MODES | IDE_HFLAG_POST_SET_MODE,
427 .pio_mask = ATA_PIO4, 405 .pio_mask = ATA_PIO4,
428}; 406};
429 407
diff --git a/drivers/ide/pci/scc_pata.c b/drivers/ide/pci/scc_pata.c
index 66a526e0ece4..67f06dd11b34 100644
--- a/drivers/ide/pci/scc_pata.c
+++ b/drivers/ide/pci/scc_pata.c
@@ -190,15 +190,15 @@ scc_ide_outsl(unsigned long port, void *addr, u32 count)
190} 190}
191 191
192/** 192/**
193 * scc_tune_pio - tune a drive PIO mode 193 * scc_set_pio_mode - set host controller for PIO mode
194 * @drive: drive to tune 194 * @drive: drive
195 * @mode_wanted: the target operating mode 195 * @pio: PIO mode number
196 * 196 *
197 * Load the timing settings for this device mode into the 197 * Load the timing settings for this device mode into the
198 * controller. 198 * controller.
199 */ 199 */
200 200
201static void scc_tune_pio(ide_drive_t *drive, const u8 pio) 201static void scc_set_pio_mode(ide_drive_t *drive, const u8 pio)
202{ 202{
203 ide_hwif_t *hwif = HWIF(drive); 203 ide_hwif_t *hwif = HWIF(drive);
204 struct scc_ports *ports = ide_get_hwifdata(hwif); 204 struct scc_ports *ports = ide_get_hwifdata(hwif);
@@ -221,22 +221,16 @@ static void scc_tune_pio(ide_drive_t *drive, const u8 pio)
221 out_be32((void __iomem *)pioct_port, reg); 221 out_be32((void __iomem *)pioct_port, reg);
222} 222}
223 223
224static void scc_set_pio_mode(ide_drive_t *drive, const u8 pio)
225{
226 scc_tune_pio(drive, pio);
227 ide_config_drive_speed(drive, XFER_PIO_0 + pio);
228}
229
230/** 224/**
231 * scc_tune_chipset - tune a drive DMA mode 225 * scc_set_dma_mode - set host controller for DMA mode
232 * @drive: Drive to set up 226 * @drive: drive
233 * @speed: speed we want to achieve 227 * @speed: DMA mode
234 * 228 *
235 * Load the timing settings for this device mode into the 229 * Load the timing settings for this device mode into the
236 * controller. 230 * controller.
237 */ 231 */
238 232
239static int scc_tune_chipset(ide_drive_t *drive, const u8 speed) 233static void scc_set_dma_mode(ide_drive_t *drive, const u8 speed)
240{ 234{
241 ide_hwif_t *hwif = HWIF(drive); 235 ide_hwif_t *hwif = HWIF(drive);
242 struct scc_ports *ports = ide_get_hwifdata(hwif); 236 struct scc_ports *ports = ide_get_hwifdata(hwif);
@@ -271,7 +265,7 @@ static int scc_tune_chipset(ide_drive_t *drive, const u8 speed)
271 idx = speed - XFER_UDMA_0; 265 idx = speed - XFER_UDMA_0;
272 break; 266 break;
273 default: 267 default:
274 return 1; 268 return;
275 } 269 }
276 270
277 jcactsel = JCACTSELtbl[offset][idx]; 271 jcactsel = JCACTSELtbl[offset][idx];
@@ -287,8 +281,6 @@ static int scc_tune_chipset(ide_drive_t *drive, const u8 speed)
287 } 281 }
288 reg = JCTSStbl[offset][idx] << 16 | JCENVTtbl[offset][idx]; 282 reg = JCTSStbl[offset][idx] << 16 | JCENVTtbl[offset][idx];
289 out_be32((void __iomem *)udenvt_port, reg); 283 out_be32((void __iomem *)udenvt_port, reg);
290
291 return ide_config_drive_speed(drive, speed);
292} 284}
293 285
294/** 286/**
@@ -708,8 +700,8 @@ static void __devinit init_hwif_scc(ide_hwif_t *hwif)
708 700
709 hwif->dma_setup = scc_dma_setup; 701 hwif->dma_setup = scc_dma_setup;
710 hwif->ide_dma_end = scc_ide_dma_end; 702 hwif->ide_dma_end = scc_ide_dma_end;
711 hwif->speedproc = scc_tune_chipset;
712 hwif->set_pio_mode = scc_set_pio_mode; 703 hwif->set_pio_mode = scc_set_pio_mode;
704 hwif->set_dma_mode = scc_set_dma_mode;
713 hwif->ide_dma_check = scc_config_drive_for_dma; 705 hwif->ide_dma_check = scc_config_drive_for_dma;
714 hwif->ide_dma_test_irq = scc_dma_test_irq; 706 hwif->ide_dma_test_irq = scc_dma_test_irq;
715 hwif->udma_filter = scc_udma_filter; 707 hwif->udma_filter = scc_udma_filter;
diff --git a/drivers/ide/pci/serverworks.c b/drivers/ide/pci/serverworks.c
index 0351cf210427..49ec0ac64a4b 100644
--- a/drivers/ide/pci/serverworks.c
+++ b/drivers/ide/pci/serverworks.c
@@ -124,7 +124,7 @@ static u8 svwks_csb_check (struct pci_dev *dev)
124 return 0; 124 return 0;
125} 125}
126 126
127static void svwks_tune_pio(ide_drive_t *drive, const u8 pio) 127static void svwks_set_pio_mode(ide_drive_t *drive, const u8 pio)
128{ 128{
129 static const u8 pio_modes[] = { 0x5d, 0x47, 0x34, 0x22, 0x20 }; 129 static const u8 pio_modes[] = { 0x5d, 0x47, 0x34, 0x22, 0x20 };
130 static const u8 drive_pci[] = { 0x41, 0x40, 0x43, 0x42 }; 130 static const u8 drive_pci[] = { 0x41, 0x40, 0x43, 0x42 };
@@ -145,7 +145,7 @@ static void svwks_tune_pio(ide_drive_t *drive, const u8 pio)
145 } 145 }
146} 146}
147 147
148static int svwks_tune_chipset(ide_drive_t *drive, const u8 speed) 148static void svwks_set_dma_mode(ide_drive_t *drive, const u8 speed)
149{ 149{
150 static const u8 udma_modes[] = { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05 }; 150 static const u8 udma_modes[] = { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05 };
151 static const u8 dma_modes[] = { 0x77, 0x21, 0x20 }; 151 static const u8 dma_modes[] = { 0x77, 0x21, 0x20 };
@@ -193,14 +193,6 @@ static int svwks_tune_chipset(ide_drive_t *drive, const u8 speed)
193 pci_write_config_byte(dev, drive_pci2[drive->dn], dma_timing); 193 pci_write_config_byte(dev, drive_pci2[drive->dn], dma_timing);
194 pci_write_config_byte(dev, (0x56|hwif->channel), ultra_timing); 194 pci_write_config_byte(dev, (0x56|hwif->channel), ultra_timing);
195 pci_write_config_byte(dev, 0x54, ultra_enable); 195 pci_write_config_byte(dev, 0x54, ultra_enable);
196
197 return (ide_config_drive_speed(drive, speed));
198}
199
200static void svwks_set_pio_mode(ide_drive_t *drive, const u8 pio)
201{
202 svwks_tune_pio(drive, pio);
203 (void)ide_config_drive_speed(drive, XFER_PIO_0 + pio);
204} 196}
205 197
206static int svwks_config_drive_xfer_rate (ide_drive_t *drive) 198static int svwks_config_drive_xfer_rate (ide_drive_t *drive)
@@ -384,7 +376,7 @@ static void __devinit init_hwif_svwks (ide_hwif_t *hwif)
384 hwif->irq = hwif->channel ? 15 : 14; 376 hwif->irq = hwif->channel ? 15 : 14;
385 377
386 hwif->set_pio_mode = &svwks_set_pio_mode; 378 hwif->set_pio_mode = &svwks_set_pio_mode;
387 hwif->speedproc = &svwks_tune_chipset; 379 hwif->set_dma_mode = &svwks_set_dma_mode;
388 hwif->udma_filter = &svwks_udma_filter; 380 hwif->udma_filter = &svwks_udma_filter;
389 381
390 hwif->atapi_dma = 1; 382 hwif->atapi_dma = 1;
diff --git a/drivers/ide/pci/sgiioc4.c b/drivers/ide/pci/sgiioc4.c
index c292e1de1d56..26352626c0e8 100644
--- a/drivers/ide/pci/sgiioc4.c
+++ b/drivers/ide/pci/sgiioc4.c
@@ -291,12 +291,8 @@ static void sgiioc4_dma_off_quietly(ide_drive_t *drive)
291 drive->hwif->dma_host_off(drive); 291 drive->hwif->dma_host_off(drive);
292} 292}
293 293
294static int sgiioc4_speedproc(ide_drive_t *drive, const u8 speed) 294static void sgiioc4_set_dma_mode(ide_drive_t *drive, const u8 speed)
295{ 295{
296 if (speed != XFER_MW_DMA_2)
297 return 1;
298
299 return ide_config_drive_speed(drive, speed);
300} 296}
301 297
302static int sgiioc4_ide_dma_check(ide_drive_t *drive) 298static int sgiioc4_ide_dma_check(ide_drive_t *drive)
@@ -595,7 +591,7 @@ ide_init_sgiioc4(ide_hwif_t * hwif)
595 hwif->mwdma_mask = 0x04; 591 hwif->mwdma_mask = 0x04;
596 hwif->pio_mask = 0x00; 592 hwif->pio_mask = 0x00;
597 hwif->set_pio_mode = NULL; /* Sets timing for PIO mode */ 593 hwif->set_pio_mode = NULL; /* Sets timing for PIO mode */
598 hwif->speedproc = &sgiioc4_speedproc; 594 hwif->set_dma_mode = &sgiioc4_set_dma_mode;
599 hwif->selectproc = NULL;/* Use the default routine to select drive */ 595 hwif->selectproc = NULL;/* Use the default routine to select drive */
600 hwif->reset_poll = NULL;/* No HBA specific reset_poll needed */ 596 hwif->reset_poll = NULL;/* No HBA specific reset_poll needed */
601 hwif->pre_reset = NULL; /* No HBA specific pre_set needed */ 597 hwif->pre_reset = NULL; /* No HBA specific pre_set needed */
diff --git a/drivers/ide/pci/siimage.c b/drivers/ide/pci/siimage.c
index 5d1e5e52a044..ce7784996d12 100644
--- a/drivers/ide/pci/siimage.c
+++ b/drivers/ide/pci/siimage.c
@@ -165,16 +165,16 @@ out:
165} 165}
166 166
167/** 167/**
168 * sil_tune_pio - tune a drive 168 * sil_set_pio_mode - set host controller for PIO mode
169 * @drive: drive to tune 169 * @drive: drive
170 * @pio: the desired PIO mode 170 * @pio: PIO mode number
171 * 171 *
172 * Load the timing settings for this device mode into the 172 * Load the timing settings for this device mode into the
173 * controller. If we are in PIO mode 3 or 4 turn on IORDY 173 * controller. If we are in PIO mode 3 or 4 turn on IORDY
174 * monitoring (bit 9). The TF timing is bits 31:16 174 * monitoring (bit 9). The TF timing is bits 31:16
175 */ 175 */
176 176
177static void sil_tune_pio(ide_drive_t *drive, u8 pio) 177static void sil_set_pio_mode(ide_drive_t *drive, u8 pio)
178{ 178{
179 const u16 tf_speed[] = { 0x328a, 0x2283, 0x1281, 0x10c3, 0x10c1 }; 179 const u16 tf_speed[] = { 0x328a, 0x2283, 0x1281, 0x10c3, 0x10c1 };
180 const u16 data_speed[] = { 0x328a, 0x2283, 0x1104, 0x10c3, 0x10c1 }; 180 const u16 data_speed[] = { 0x328a, 0x2283, 0x1104, 0x10c3, 0x10c1 };
@@ -234,21 +234,15 @@ static void sil_tune_pio(ide_drive_t *drive, u8 pio)
234 } 234 }
235} 235}
236 236
237static void sil_set_pio_mode(ide_drive_t *drive, const u8 pio)
238{
239 sil_tune_pio(drive, pio);
240 (void)ide_config_drive_speed(drive, XFER_PIO_0 + pio);
241}
242
243/** 237/**
244 * siimage_tune_chipset - set controller timings 238 * sil_set_dma_mode - set host controller for DMA mode
245 * @drive: Drive to set up 239 * @drive: drive
246 * @speed: speed we want to achieve 240 * @speed: DMA mode
247 * 241 *
248 * Tune the SII chipset for the desired mode. 242 * Tune the SiI chipset for the desired DMA mode.
249 */ 243 */
250 244
251static int siimage_tune_chipset(ide_drive_t *drive, const u8 speed) 245static void sil_set_dma_mode(ide_drive_t *drive, const u8 speed)
252{ 246{
253 u8 ultra6[] = { 0x0F, 0x0B, 0x07, 0x05, 0x03, 0x02, 0x01 }; 247 u8 ultra6[] = { 0x0F, 0x0B, 0x07, 0x05, 0x03, 0x02, 0x01 };
254 u8 ultra5[] = { 0x0C, 0x07, 0x05, 0x04, 0x02, 0x01 }; 248 u8 ultra5[] = { 0x0C, 0x07, 0x05, 0x04, 0x02, 0x01 };
@@ -303,7 +297,7 @@ static int siimage_tune_chipset(ide_drive_t *drive, const u8 speed)
303 mode |= ((unit) ? 0x30 : 0x03); 297 mode |= ((unit) ? 0x30 : 0x03);
304 break; 298 break;
305 default: 299 default:
306 return 1; 300 return;
307 } 301 }
308 302
309 if (hwif->mmio) { 303 if (hwif->mmio) {
@@ -315,7 +309,6 @@ static int siimage_tune_chipset(ide_drive_t *drive, const u8 speed)
315 pci_write_config_word(hwif->pci_dev, ma, multi); 309 pci_write_config_word(hwif->pci_dev, ma, multi);
316 pci_write_config_word(hwif->pci_dev, ua, ultra); 310 pci_write_config_word(hwif->pci_dev, ua, ultra);
317 } 311 }
318 return (ide_config_drive_speed(drive, speed));
319} 312}
320 313
321/** 314/**
@@ -904,8 +897,8 @@ static void __devinit init_hwif_siimage(ide_hwif_t *hwif)
904 hwif->autodma = 0; 897 hwif->autodma = 0;
905 898
906 hwif->resetproc = &siimage_reset; 899 hwif->resetproc = &siimage_reset;
907 hwif->speedproc = &siimage_tune_chipset;
908 hwif->set_pio_mode = &sil_set_pio_mode; 900 hwif->set_pio_mode = &sil_set_pio_mode;
901 hwif->set_dma_mode = &sil_set_dma_mode;
909 hwif->reset_poll = &siimage_reset_poll; 902 hwif->reset_poll = &siimage_reset_poll;
910 hwif->pre_reset = &siimage_pre_reset; 903 hwif->pre_reset = &siimage_pre_reset;
911 hwif->udma_filter = &sil_udma_filter; 904 hwif->udma_filter = &sil_udma_filter;
diff --git a/drivers/ide/pci/sis5513.c b/drivers/ide/pci/sis5513.c
index 3e18899de631..b375ee53d66d 100644
--- a/drivers/ide/pci/sis5513.c
+++ b/drivers/ide/pci/sis5513.c
@@ -451,7 +451,7 @@ static void config_drive_art_rwp (ide_drive_t *drive)
451} 451}
452 452
453/* Set per-drive active and recovery time */ 453/* Set per-drive active and recovery time */
454static void config_art_rwp_pio (ide_drive_t *drive, u8 pio) 454static void sis_set_pio_mode(ide_drive_t *drive, const u8 pio)
455{ 455{
456 ide_hwif_t *hwif = HWIF(drive); 456 ide_hwif_t *hwif = HWIF(drive);
457 struct pci_dev *dev = hwif->pci_dev; 457 struct pci_dev *dev = hwif->pci_dev;
@@ -519,20 +519,14 @@ static void config_art_rwp_pio (ide_drive_t *drive, u8 pio)
519 } 519 }
520} 520}
521 521
522static void sis_set_pio_mode(ide_drive_t *drive, const u8 pio) 522static void sis_set_dma_mode(ide_drive_t *drive, const u8 speed)
523{
524 config_art_rwp_pio(drive, pio);
525 (void)ide_config_drive_speed(drive, XFER_PIO_0 + pio);
526}
527
528static int sis5513_tune_chipset(ide_drive_t *drive, const u8 speed)
529{ 523{
530 ide_hwif_t *hwif = HWIF(drive); 524 ide_hwif_t *hwif = HWIF(drive);
531 struct pci_dev *dev = hwif->pci_dev; 525 struct pci_dev *dev = hwif->pci_dev;
532 u32 regdw; 526 u32 regdw;
533 u8 drive_pci, reg; 527 u8 drive_pci, reg;
534 528
535 /* See config_art_rwp_pio for drive pci config registers */ 529 /* See sis_set_pio_mode() for drive PCI config registers */
536 drive_pci = 0x40; 530 drive_pci = 0x40;
537 if (chipset_family >= ATA_133) { 531 if (chipset_family >= ATA_133) {
538 u32 reg54h; 532 u32 reg54h;
@@ -600,8 +594,6 @@ static int sis5513_tune_chipset(ide_drive_t *drive, const u8 speed)
600 BUG(); 594 BUG();
601 break; 595 break;
602 } 596 }
603
604 return ide_config_drive_speed(drive, speed);
605} 597}
606 598
607static int sis5513_config_xfer_rate(ide_drive_t *drive) 599static int sis5513_config_xfer_rate(ide_drive_t *drive)
@@ -841,7 +833,7 @@ static void __devinit init_hwif_sis5513 (ide_hwif_t *hwif)
841 hwif->irq = hwif->channel ? 15 : 14; 833 hwif->irq = hwif->channel ? 15 : 14;
842 834
843 hwif->set_pio_mode = &sis_set_pio_mode; 835 hwif->set_pio_mode = &sis_set_pio_mode;
844 hwif->speedproc = &sis5513_tune_chipset; 836 hwif->set_dma_mode = &sis_set_dma_mode;
845 837
846 if (chipset_family >= ATA_133) 838 if (chipset_family >= ATA_133)
847 hwif->udma_filter = sis5513_ata133_udma_filter; 839 hwif->udma_filter = sis5513_ata133_udma_filter;
diff --git a/drivers/ide/pci/sl82c105.c b/drivers/ide/pci/sl82c105.c
index f492318ba797..2ef26e3f7be4 100644
--- a/drivers/ide/pci/sl82c105.c
+++ b/drivers/ide/pci/sl82c105.c
@@ -75,7 +75,7 @@ static unsigned int get_pio_timings(ide_drive_t *drive, u8 pio)
75/* 75/*
76 * Configure the chipset for PIO mode. 76 * Configure the chipset for PIO mode.
77 */ 77 */
78static void sl82c105_tune_pio(ide_drive_t *drive, const u8 pio) 78static void sl82c105_set_pio_mode(ide_drive_t *drive, const u8 pio)
79{ 79{
80 struct pci_dev *dev = HWIF(drive)->pci_dev; 80 struct pci_dev *dev = HWIF(drive)->pci_dev;
81 int reg = 0x44 + drive->dn * 4; 81 int reg = 0x44 + drive->dn * 4;
@@ -105,9 +105,9 @@ static void sl82c105_tune_pio(ide_drive_t *drive, const u8 pio)
105} 105}
106 106
107/* 107/*
108 * Configure the drive and chipset for a new transfer speed. 108 * Configure the chipset for DMA mode.
109 */ 109 */
110static int sl82c105_tune_chipset(ide_drive_t *drive, const u8 speed) 110static void sl82c105_set_dma_mode(ide_drive_t *drive, const u8 speed)
111{ 111{
112 static u16 mwdma_timings[] = {0x0707, 0x0201, 0x0200}; 112 static u16 mwdma_timings[] = {0x0707, 0x0201, 0x0200};
113 u16 drv_ctrl; 113 u16 drv_ctrl;
@@ -140,10 +140,8 @@ static int sl82c105_tune_chipset(ide_drive_t *drive, const u8 speed)
140 } 140 }
141 break; 141 break;
142 default: 142 default:
143 return -1; 143 return;
144 } 144 }
145
146 return ide_config_drive_speed(drive, speed);
147} 145}
148 146
149/* 147/*
@@ -306,17 +304,6 @@ static void sl82c105_resetproc(ide_drive_t *drive)
306 pci_read_config_dword(dev, 0x40, &val); 304 pci_read_config_dword(dev, 0x40, &val);
307 pci_set_drvdata(dev, (void *)val); 305 pci_set_drvdata(dev, (void *)val);
308} 306}
309
310/*
311 * We only deal with PIO mode here - DMA mode 'using_dma' is not
312 * initialised at the point that this function is called.
313 */
314static void sl82c105_set_pio_mode(ide_drive_t *drive, const u8 pio)
315{
316 sl82c105_tune_pio(drive, pio);
317
318 (void) ide_config_drive_speed(drive, XFER_PIO_0 + pio);
319}
320 307
321/* 308/*
322 * Return the revision of the Winbond bridge 309 * Return the revision of the Winbond bridge
@@ -383,7 +370,7 @@ static void __devinit init_hwif_sl82c105(ide_hwif_t *hwif)
383 DBG(("init_hwif_sl82c105(hwif: ide%d)\n", hwif->index)); 370 DBG(("init_hwif_sl82c105(hwif: ide%d)\n", hwif->index));
384 371
385 hwif->set_pio_mode = &sl82c105_set_pio_mode; 372 hwif->set_pio_mode = &sl82c105_set_pio_mode;
386 hwif->speedproc = &sl82c105_tune_chipset; 373 hwif->set_dma_mode = &sl82c105_set_dma_mode;
387 hwif->selectproc = &sl82c105_selectproc; 374 hwif->selectproc = &sl82c105_selectproc;
388 hwif->resetproc = &sl82c105_resetproc; 375 hwif->resetproc = &sl82c105_resetproc;
389 376
diff --git a/drivers/ide/pci/slc90e66.c b/drivers/ide/pci/slc90e66.c
index ae8e91324577..ebac87f7200a 100644
--- a/drivers/ide/pci/slc90e66.c
+++ b/drivers/ide/pci/slc90e66.c
@@ -42,7 +42,7 @@ static u8 slc90e66_dma_2_pio (u8 xfer_rate) {
42 } 42 }
43} 43}
44 44
45static void slc90e66_tune_pio (ide_drive_t *drive, u8 pio) 45static void slc90e66_set_pio_mode(ide_drive_t *drive, const u8 pio)
46{ 46{
47 ide_hwif_t *hwif = HWIF(drive); 47 ide_hwif_t *hwif = HWIF(drive);
48 struct pci_dev *dev = hwif->pci_dev; 48 struct pci_dev *dev = hwif->pci_dev;
@@ -95,13 +95,7 @@ static void slc90e66_tune_pio (ide_drive_t *drive, u8 pio)
95 spin_unlock_irqrestore(&ide_lock, flags); 95 spin_unlock_irqrestore(&ide_lock, flags);
96} 96}
97 97
98static void slc90e66_set_pio_mode(ide_drive_t *drive, const u8 pio) 98static void slc90e66_set_dma_mode(ide_drive_t *drive, const u8 speed)
99{
100 slc90e66_tune_pio(drive, pio);
101 (void) ide_config_drive_speed(drive, XFER_PIO_0 + pio);
102}
103
104static int slc90e66_tune_chipset(ide_drive_t *drive, const u8 speed)
105{ 99{
106 ide_hwif_t *hwif = HWIF(drive); 100 ide_hwif_t *hwif = HWIF(drive);
107 struct pci_dev *dev = hwif->pci_dev; 101 struct pci_dev *dev = hwif->pci_dev;
@@ -125,7 +119,7 @@ static int slc90e66_tune_chipset(ide_drive_t *drive, const u8 speed)
125 case XFER_MW_DMA_2: 119 case XFER_MW_DMA_2:
126 case XFER_MW_DMA_1: 120 case XFER_MW_DMA_1:
127 case XFER_SW_DMA_2: break; 121 case XFER_SW_DMA_2: break;
128 default: return -1; 122 default: return;
129 } 123 }
130 124
131 if (speed >= XFER_UDMA_0) { 125 if (speed >= XFER_UDMA_0) {
@@ -144,9 +138,7 @@ static int slc90e66_tune_chipset(ide_drive_t *drive, const u8 speed)
144 pci_write_config_word(dev, 0x4a, reg4a & ~a_speed); 138 pci_write_config_word(dev, 0x4a, reg4a & ~a_speed);
145 } 139 }
146 140
147 slc90e66_tune_pio(drive, slc90e66_dma_2_pio(speed)); 141 slc90e66_set_pio_mode(drive, slc90e66_dma_2_pio(speed));
148
149 return ide_config_drive_speed(drive, speed);
150} 142}
151 143
152static int slc90e66_config_drive_xfer_rate (ide_drive_t *drive) 144static int slc90e66_config_drive_xfer_rate (ide_drive_t *drive)
@@ -172,8 +164,8 @@ static void __devinit init_hwif_slc90e66 (ide_hwif_t *hwif)
172 if (!hwif->irq) 164 if (!hwif->irq)
173 hwif->irq = hwif->channel ? 15 : 14; 165 hwif->irq = hwif->channel ? 15 : 14;
174 166
175 hwif->speedproc = &slc90e66_tune_chipset;
176 hwif->set_pio_mode = &slc90e66_set_pio_mode; 167 hwif->set_pio_mode = &slc90e66_set_pio_mode;
168 hwif->set_dma_mode = &slc90e66_set_dma_mode;
177 169
178 pci_read_config_byte(hwif->pci_dev, 0x47, &reg47); 170 pci_read_config_byte(hwif->pci_dev, 0x47, &reg47);
179 171
diff --git a/drivers/ide/pci/tc86c001.c b/drivers/ide/pci/tc86c001.c
index e23b9cfb6eb4..840415d68d38 100644
--- a/drivers/ide/pci/tc86c001.c
+++ b/drivers/ide/pci/tc86c001.c
@@ -13,7 +13,7 @@
13#include <linux/pci.h> 13#include <linux/pci.h>
14#include <linux/ide.h> 14#include <linux/ide.h>
15 15
16static int tc86c001_tune_chipset(ide_drive_t *drive, const u8 speed) 16static void tc86c001_set_mode(ide_drive_t *drive, const u8 speed)
17{ 17{
18 ide_hwif_t *hwif = HWIF(drive); 18 ide_hwif_t *hwif = HWIF(drive);
19 unsigned long scr_port = hwif->config_data + (drive->dn ? 0x02 : 0x00); 19 unsigned long scr_port = hwif->config_data + (drive->dn ? 0x02 : 0x00);
@@ -39,13 +39,11 @@ static int tc86c001_tune_chipset(ide_drive_t *drive, const u8 speed)
39 scr &= (speed < XFER_MW_DMA_0) ? 0xf8ff : 0xff0f; 39 scr &= (speed < XFER_MW_DMA_0) ? 0xf8ff : 0xff0f;
40 scr |= mode; 40 scr |= mode;
41 outw(scr, scr_port); 41 outw(scr, scr_port);
42
43 return ide_config_drive_speed(drive, speed);
44} 42}
45 43
46static void tc86c001_set_pio_mode(ide_drive_t *drive, const u8 pio) 44static void tc86c001_set_pio_mode(ide_drive_t *drive, const u8 pio)
47{ 45{
48 (void) tc86c001_tune_chipset(drive, XFER_PIO_0 + pio); 46 tc86c001_set_mode(drive, XFER_PIO_0 + pio);
49} 47}
50 48
51/* 49/*
@@ -193,7 +191,8 @@ static void __devinit init_hwif_tc86c001(ide_hwif_t *hwif)
193 hwif->config_data = sc_base; 191 hwif->config_data = sc_base;
194 192
195 hwif->set_pio_mode = &tc86c001_set_pio_mode; 193 hwif->set_pio_mode = &tc86c001_set_pio_mode;
196 hwif->speedproc = &tc86c001_tune_chipset; 194 hwif->set_dma_mode = &tc86c001_set_mode;
195
197 hwif->busproc = &tc86c001_busproc; 196 hwif->busproc = &tc86c001_busproc;
198 197
199 hwif->drives[0].autotune = hwif->drives[1].autotune = 1; 198 hwif->drives[0].autotune = hwif->drives[1].autotune = 1;
diff --git a/drivers/ide/pci/triflex.c b/drivers/ide/pci/triflex.c
index c3ff066eea5a..54e411d4e56c 100644
--- a/drivers/ide/pci/triflex.c
+++ b/drivers/ide/pci/triflex.c
@@ -40,7 +40,7 @@
40#include <linux/ide.h> 40#include <linux/ide.h>
41#include <linux/init.h> 41#include <linux/init.h>
42 42
43static int triflex_tune_chipset(ide_drive_t *drive, const u8 speed) 43static void triflex_set_mode(ide_drive_t *drive, const u8 speed)
44{ 44{
45 ide_hwif_t *hwif = HWIF(drive); 45 ide_hwif_t *hwif = HWIF(drive);
46 struct pci_dev *dev = hwif->pci_dev; 46 struct pci_dev *dev = hwif->pci_dev;
@@ -82,20 +82,18 @@ static int triflex_tune_chipset(ide_drive_t *drive, const u8 speed)
82 timing = 0x0808; 82 timing = 0x0808;
83 break; 83 break;
84 default: 84 default:
85 return -1; 85 return;
86 } 86 }
87 87
88 triflex_timings &= ~(0xFFFF << (16 * unit)); 88 triflex_timings &= ~(0xFFFF << (16 * unit));
89 triflex_timings |= (timing << (16 * unit)); 89 triflex_timings |= (timing << (16 * unit));
90 90
91 pci_write_config_dword(dev, channel_offset, triflex_timings); 91 pci_write_config_dword(dev, channel_offset, triflex_timings);
92
93 return (ide_config_drive_speed(drive, speed));
94} 92}
95 93
96static void triflex_set_pio_mode(ide_drive_t *drive, const u8 pio) 94static void triflex_set_pio_mode(ide_drive_t *drive, const u8 pio)
97{ 95{
98 (void)triflex_tune_chipset(drive, XFER_PIO_0 + pio); 96 triflex_set_mode(drive, XFER_PIO_0 + pio);
99} 97}
100 98
101static int triflex_config_drive_xfer_rate(ide_drive_t *drive) 99static int triflex_config_drive_xfer_rate(ide_drive_t *drive)
@@ -111,7 +109,7 @@ static int triflex_config_drive_xfer_rate(ide_drive_t *drive)
111static void __devinit init_hwif_triflex(ide_hwif_t *hwif) 109static void __devinit init_hwif_triflex(ide_hwif_t *hwif)
112{ 110{
113 hwif->set_pio_mode = &triflex_set_pio_mode; 111 hwif->set_pio_mode = &triflex_set_pio_mode;
114 hwif->speedproc = &triflex_tune_chipset; 112 hwif->set_dma_mode = &triflex_set_mode;
115 113
116 if (hwif->dma_base == 0) 114 if (hwif->dma_base == 0)
117 return; 115 return;
diff --git a/drivers/ide/pci/via82cxxx.c b/drivers/ide/pci/via82cxxx.c
index ac094e51d2bf..479e49661032 100644
--- a/drivers/ide/pci/via82cxxx.c
+++ b/drivers/ide/pci/via82cxxx.c
@@ -153,21 +153,17 @@ static void via_set_speed(ide_hwif_t *hwif, u8 dn, struct ide_timing *timing)
153 * @drive: Drive to set up 153 * @drive: Drive to set up
154 * @speed: desired speed 154 * @speed: desired speed
155 * 155 *
156 * via_set_drive() computes timing values configures the drive and 156 * via_set_drive() computes timing values configures the chipset to
157 * the chipset to a desired transfer mode. It also can be called 157 * a desired transfer mode. It also can be called by upper layers.
158 * by upper layers.
159 */ 158 */
160 159
161static int via_set_drive(ide_drive_t *drive, const u8 speed) 160static void via_set_drive(ide_drive_t *drive, const u8 speed)
162{ 161{
163 ide_drive_t *peer = HWIF(drive)->drives + (~drive->dn & 1); 162 ide_drive_t *peer = HWIF(drive)->drives + (~drive->dn & 1);
164 struct via82cxxx_dev *vdev = pci_get_drvdata(drive->hwif->pci_dev); 163 struct via82cxxx_dev *vdev = pci_get_drvdata(drive->hwif->pci_dev);
165 struct ide_timing t, p; 164 struct ide_timing t, p;
166 unsigned int T, UT; 165 unsigned int T, UT;
167 166
168 if (ide_config_drive_speed(drive, speed))
169 return 1;
170
171 T = 1000000000 / via_clock; 167 T = 1000000000 / via_clock;
172 168
173 switch (vdev->via_config->udma_mask) { 169 switch (vdev->via_config->udma_mask) {
@@ -186,12 +182,10 @@ static int via_set_drive(ide_drive_t *drive, const u8 speed)
186 } 182 }
187 183
188 via_set_speed(HWIF(drive), drive->dn, &t); 184 via_set_speed(HWIF(drive), drive->dn, &t);
189
190 return 0;
191} 185}
192 186
193/** 187/**
194 * via_set_pio_mode - PIO setup 188 * via_set_pio_mode - set host controller for PIO mode
195 * @drive: drive 189 * @drive: drive
196 * @pio: PIO mode number 190 * @pio: PIO mode number
197 * 191 *
@@ -452,8 +446,7 @@ static void __devinit init_hwif_via82cxxx(ide_hwif_t *hwif)
452 hwif->autodma = 0; 446 hwif->autodma = 0;
453 447
454 hwif->set_pio_mode = &via_set_pio_mode; 448 hwif->set_pio_mode = &via_set_pio_mode;
455 hwif->speedproc = &via_set_drive; 449 hwif->set_dma_mode = &via_set_drive;
456
457 450
458#ifdef CONFIG_PPC_CHRP 451#ifdef CONFIG_PPC_CHRP
459 if(machine_is(chrp) && _chrp_type == _CHRP_Pegasos) { 452 if(machine_is(chrp) && _chrp_type == _CHRP_Pegasos) {
@@ -496,7 +489,8 @@ static ide_pci_device_t via82cxxx_chipsets[] __devinitdata = {
496 .enablebits = {{0x40,0x02,0x02}, {0x40,0x01,0x01}}, 489 .enablebits = {{0x40,0x02,0x02}, {0x40,0x01,0x01}},
497 .bootable = ON_BOARD, 490 .bootable = ON_BOARD,
498 .host_flags = IDE_HFLAG_PIO_NO_BLACKLIST 491 .host_flags = IDE_HFLAG_PIO_NO_BLACKLIST
499 | IDE_HFLAG_PIO_NO_DOWNGRADE, 492 | IDE_HFLAG_PIO_NO_DOWNGRADE
493 | IDE_HFLAG_POST_SET_MODE,
500 .pio_mask = ATA_PIO5, 494 .pio_mask = ATA_PIO5,
501 },{ /* 1 */ 495 },{ /* 1 */
502 .name = "VP_IDE", 496 .name = "VP_IDE",
@@ -506,7 +500,8 @@ static ide_pci_device_t via82cxxx_chipsets[] __devinitdata = {
506 .enablebits = {{0x00,0x00,0x00}, {0x00,0x00,0x00}}, 500 .enablebits = {{0x00,0x00,0x00}, {0x00,0x00,0x00}},
507 .bootable = ON_BOARD, 501 .bootable = ON_BOARD,
508 .host_flags = IDE_HFLAG_PIO_NO_BLACKLIST 502 .host_flags = IDE_HFLAG_PIO_NO_BLACKLIST
509 | IDE_HFLAG_PIO_NO_DOWNGRADE, 503 | IDE_HFLAG_PIO_NO_DOWNGRADE
504 | IDE_HFLAG_POST_SET_MODE,
510 .pio_mask = ATA_PIO5, 505 .pio_mask = ATA_PIO5,
511 } 506 }
512}; 507};
diff --git a/drivers/ide/ppc/pmac.c b/drivers/ide/ppc/pmac.c
index 313194a0f36e..7d8873839e21 100644
--- a/drivers/ide/ppc/pmac.c
+++ b/drivers/ide/ppc/pmac.c
@@ -611,9 +611,6 @@ pmac_ide_set_pio_mode(ide_drive_t *drive, const u8 pio)
611 drive->name, pio, *timings); 611 drive->name, pio, *timings);
612#endif 612#endif
613 613
614 if (ide_config_drive_speed(drive, XFER_PIO_0 + pio))
615 return;
616
617 *timings = t; 614 *timings = t;
618 pmac_ide_do_update_timings(drive); 615 pmac_ide_do_update_timings(drive);
619} 616}
@@ -822,11 +819,7 @@ set_timings_mdma(ide_drive_t *drive, int intf_type, u32 *timings, u32 *timings2,
822} 819}
823#endif /* #ifdef CONFIG_BLK_DEV_IDEDMA_PMAC */ 820#endif /* #ifdef CONFIG_BLK_DEV_IDEDMA_PMAC */
824 821
825/* 822static void pmac_ide_set_dma_mode(ide_drive_t *drive, const u8 speed)
826 * Speedproc. This function is called by the core to set any of the standard
827 * DMA timing (MDMA or UDMA) to both the drive and the controller.
828 */
829static int pmac_ide_tune_chipset(ide_drive_t *drive, const u8 speed)
830{ 823{
831 int unit = (drive->select.b.unit & 0x01); 824 int unit = (drive->select.b.unit & 0x01);
832 int ret = 0; 825 int ret = 0;
@@ -867,25 +860,19 @@ static int pmac_ide_tune_chipset(ide_drive_t *drive, const u8 speed)
867 case XFER_SW_DMA_2: 860 case XFER_SW_DMA_2:
868 case XFER_SW_DMA_1: 861 case XFER_SW_DMA_1:
869 case XFER_SW_DMA_0: 862 case XFER_SW_DMA_0:
870 return 1; 863 return;
871#endif /* CONFIG_BLK_DEV_IDEDMA_PMAC */ 864#endif /* CONFIG_BLK_DEV_IDEDMA_PMAC */
872 default: 865 default:
873 ret = 1; 866 ret = 1;
874 } 867 }
875 if (ret) 868 if (ret)
876 return ret; 869 return;
877
878 ret = ide_config_drive_speed(drive, speed);
879 if (ret)
880 return ret;
881 870
882 /* Apply timings to controller */ 871 /* Apply timings to controller */
883 *timings = tl[0]; 872 *timings = tl[0];
884 *timings2 = tl[1]; 873 *timings2 = tl[1];
885 874
886 pmac_ide_do_update_timings(drive); 875 pmac_ide_do_update_timings(drive);
887
888 return 0;
889} 876}
890 877
891/* 878/*
@@ -1147,7 +1134,8 @@ pmac_ide_setup_device(pmac_ide_hwif_t *pmif, ide_hwif_t *hwif)
1147 hwif->drives[1].unmask = 1; 1134 hwif->drives[1].unmask = 1;
1148 hwif->drives[0].autotune = IDE_TUNE_AUTO; 1135 hwif->drives[0].autotune = IDE_TUNE_AUTO;
1149 hwif->drives[1].autotune = IDE_TUNE_AUTO; 1136 hwif->drives[1].autotune = IDE_TUNE_AUTO;
1150 hwif->host_flags = IDE_HFLAG_SET_PIO_MODE_KEEP_DMA; 1137 hwif->host_flags = IDE_HFLAG_SET_PIO_MODE_KEEP_DMA |
1138 IDE_HFLAG_POST_SET_MODE;
1151 hwif->pio_mask = ATA_PIO4; 1139 hwif->pio_mask = ATA_PIO4;
1152 hwif->set_pio_mode = pmac_ide_set_pio_mode; 1140 hwif->set_pio_mode = pmac_ide_set_pio_mode;
1153 if (pmif->kind == controller_un_ata6 1141 if (pmif->kind == controller_un_ata6
@@ -1156,7 +1144,7 @@ pmac_ide_setup_device(pmac_ide_hwif_t *pmif, ide_hwif_t *hwif)
1156 hwif->selectproc = pmac_ide_kauai_selectproc; 1144 hwif->selectproc = pmac_ide_kauai_selectproc;
1157 else 1145 else
1158 hwif->selectproc = pmac_ide_selectproc; 1146 hwif->selectproc = pmac_ide_selectproc;
1159 hwif->speedproc = pmac_ide_tune_chipset; 1147 hwif->set_dma_mode = pmac_ide_set_dma_mode;
1160 1148
1161 printk(KERN_INFO "ide%d: Found Apple %s controller, bus ID %d%s, irq %d\n", 1149 printk(KERN_INFO "ide%d: Found Apple %s controller, bus ID %d%s, irq %d\n",
1162 hwif->index, model_name[pmif->kind], pmif->aapl_bus_id, 1150 hwif->index, model_name[pmif->kind], pmif->aapl_bus_id,
diff --git a/include/linux/ide.h b/include/linux/ide.h
index a7d8b4bc7681..02a27e8cbad2 100644
--- a/include/linux/ide.h
+++ b/include/linux/ide.h
@@ -681,7 +681,7 @@ typedef struct hwif_s {
681 u8 straight8; /* Alan's straight 8 check */ 681 u8 straight8; /* Alan's straight 8 check */
682 u8 bus_state; /* power state of the IDE bus */ 682 u8 bus_state; /* power state of the IDE bus */
683 683
684 u8 host_flags; 684 u16 host_flags;
685 685
686 u8 pio_mask; 686 u8 pio_mask;
687 687
@@ -702,10 +702,10 @@ typedef struct hwif_s {
702#if 0 702#if 0
703 ide_hwif_ops_t *hwifops; 703 ide_hwif_ops_t *hwifops;
704#else 704#else
705 /* routine to set PIO mode for drives */ 705 /* routine to program host for PIO mode */
706 void (*set_pio_mode)(ide_drive_t *, const u8); 706 void (*set_pio_mode)(ide_drive_t *, const u8);
707 /* routine to retune DMA modes for drives */ 707 /* routine to program host for DMA mode */
708 int (*speedproc)(ide_drive_t *, const u8); 708 void (*set_dma_mode)(ide_drive_t *, const u8);
709 /* tweaks hardware to select drive */ 709 /* tweaks hardware to select drive */
710 void (*selectproc)(ide_drive_t *); 710 void (*selectproc)(ide_drive_t *);
711 /* chipset polling based on hba specifics */ 711 /* chipset polling based on hba specifics */
@@ -1257,6 +1257,10 @@ enum {
1257 * for hosts which have separate PIO and DMA timings (ie. PMAC) 1257 * for hosts which have separate PIO and DMA timings (ie. PMAC)
1258 */ 1258 */
1259 IDE_HFLAG_SET_PIO_MODE_KEEP_DMA = (1 << 7), 1259 IDE_HFLAG_SET_PIO_MODE_KEEP_DMA = (1 << 7),
1260 /* program host for the transfer mode after programming device */
1261 IDE_HFLAG_POST_SET_MODE = (1 << 8),
1262 /* don't program host/device for the transfer mode ("smart" hosts) */
1263 IDE_HFLAG_NO_SET_MODE = (1 << 9),
1260}; 1264};
1261 1265
1262typedef struct ide_pci_device_s { 1266typedef struct ide_pci_device_s {
@@ -1273,7 +1277,7 @@ typedef struct ide_pci_device_s {
1273 u8 bootable; 1277 u8 bootable;
1274 unsigned int extra; 1278 unsigned int extra;
1275 struct ide_pci_device_s *next; 1279 struct ide_pci_device_s *next;
1276 u8 host_flags; 1280 u16 host_flags;
1277 u8 pio_mask; 1281 u8 pio_mask;
1278 u8 udma_mask; 1282 u8 udma_mask;
1279} ide_pci_device_t; 1283} ide_pci_device_t;
@@ -1414,6 +1418,9 @@ unsigned int ide_pio_cycle_time(ide_drive_t *, u8);
1414u8 ide_get_best_pio_mode(ide_drive_t *, u8, u8); 1418u8 ide_get_best_pio_mode(ide_drive_t *, u8, u8);
1415extern const ide_pio_timings_t ide_pio_timings[6]; 1419extern const ide_pio_timings_t ide_pio_timings[6];
1416 1420
1421int ide_set_pio_mode(ide_drive_t *, u8);
1422int ide_set_dma_mode(ide_drive_t *, u8);
1423
1417void ide_set_pio(ide_drive_t *, u8); 1424void ide_set_pio(ide_drive_t *, u8);
1418 1425
1419static inline void ide_set_max_pio(ide_drive_t *drive) 1426static inline void ide_set_max_pio(ide_drive_t *drive)
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-15 09:43:55 -0500