diff options
author | Matt Carlson <mcarlson@broadcom.com> | 2008-12-21 23:19:30 -0500 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2008-12-21 23:19:30 -0500 |
commit | 027455adacdc142cc018e555ce391014fa227e70 (patch) | |
tree | 39dc4c0611ed7c4bc4ca6df87d894fc40692e5b0 | |
parent | 2023276ebf074a01eb56f38ed4d04deef1deee67 (diff) |
tg3: Cleanup IPV6 LSO
This patch attempts to make the relationship between IPV6 checksum
offload and IPV6 LSO more obvious. The patch also toggles a bit
needed for IPV6 LSO on 5785 and 57780 devices.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: Benjamin Li <benli@broadcom.com>
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r-- | drivers/net/tg3.c | 47 | ||||
-rw-r--r-- | drivers/net/tg3.h | 2 |
2 files changed, 25 insertions, 24 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c index bacbfc582704..9af8c9bb9864 100644 --- a/drivers/net/tg3.c +++ b/drivers/net/tg3.c | |||
@@ -7518,7 +7518,11 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy) | |||
7518 | rdmac_mode |= RDMAC_MODE_FIFO_LONG_BURST; | 7518 | rdmac_mode |= RDMAC_MODE_FIFO_LONG_BURST; |
7519 | 7519 | ||
7520 | if (tp->tg3_flags2 & TG3_FLG2_HW_TSO) | 7520 | if (tp->tg3_flags2 & TG3_FLG2_HW_TSO) |
7521 | rdmac_mode |= (1 << 27); | 7521 | rdmac_mode |= RDMAC_MODE_IPV4_LSO_EN; |
7522 | |||
7523 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5785 || | ||
7524 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57780) | ||
7525 | rdmac_mode |= RDMAC_MODE_IPV6_LSO_EN; | ||
7522 | 7526 | ||
7523 | /* Receive/send statistics. */ | 7527 | /* Receive/send statistics. */ |
7524 | if (tp->tg3_flags2 & TG3_FLG2_5750_PLUS) { | 7528 | if (tp->tg3_flags2 & TG3_FLG2_5750_PLUS) { |
@@ -9274,8 +9278,8 @@ static int tg3_set_tso(struct net_device *dev, u32 value) | |||
9274 | return -EINVAL; | 9278 | return -EINVAL; |
9275 | return 0; | 9279 | return 0; |
9276 | } | 9280 | } |
9277 | if ((tp->tg3_flags2 & TG3_FLG2_HW_TSO_2) && | 9281 | if ((dev->features & NETIF_F_IPV6_CSUM) && |
9278 | (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5906)) { | 9282 | (tp->tg3_flags2 & TG3_FLG2_HW_TSO_2)) { |
9279 | if (value) { | 9283 | if (value) { |
9280 | dev->features |= NETIF_F_TSO6; | 9284 | dev->features |= NETIF_F_TSO6; |
9281 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5761 || | 9285 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5761 || |
@@ -12358,6 +12362,18 @@ static int __devinit tg3_get_invariants(struct tg3 *tp) | |||
12358 | (tp->tg3_flags2 & TG3_FLG2_5750_PLUS)) | 12362 | (tp->tg3_flags2 & TG3_FLG2_5750_PLUS)) |
12359 | tp->tg3_flags2 |= TG3_FLG2_5705_PLUS; | 12363 | tp->tg3_flags2 |= TG3_FLG2_5705_PLUS; |
12360 | 12364 | ||
12365 | /* 5700 B0 chips do not support checksumming correctly due | ||
12366 | * to hardware bugs. | ||
12367 | */ | ||
12368 | if (tp->pci_chip_rev_id == CHIPREV_ID_5700_B0) | ||
12369 | tp->tg3_flags |= TG3_FLAG_BROKEN_CHECKSUMS; | ||
12370 | else { | ||
12371 | tp->tg3_flags |= TG3_FLAG_RX_CHECKSUMS; | ||
12372 | tp->dev->features |= NETIF_F_IP_CSUM | NETIF_F_SG; | ||
12373 | if (tp->tg3_flags3 & TG3_FLG3_5755_PLUS) | ||
12374 | tp->dev->features |= NETIF_F_IPV6_CSUM; | ||
12375 | } | ||
12376 | |||
12361 | if (tp->tg3_flags2 & TG3_FLG2_5750_PLUS) { | 12377 | if (tp->tg3_flags2 & TG3_FLG2_5750_PLUS) { |
12362 | tp->tg3_flags |= TG3_FLAG_SUPPORT_MSI; | 12378 | tp->tg3_flags |= TG3_FLAG_SUPPORT_MSI; |
12363 | if (GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5750_AX || | 12379 | if (GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5750_AX || |
@@ -12614,12 +12630,6 @@ static int __devinit tg3_get_invariants(struct tg3 *tp) | |||
12614 | return err; | 12630 | return err; |
12615 | } | 12631 | } |
12616 | 12632 | ||
12617 | /* 5700 B0 chips do not support checksumming correctly due | ||
12618 | * to hardware bugs. | ||
12619 | */ | ||
12620 | if (tp->pci_chip_rev_id == CHIPREV_ID_5700_B0) | ||
12621 | tp->tg3_flags |= TG3_FLAG_BROKEN_CHECKSUMS; | ||
12622 | |||
12623 | /* Derive initial jumbo mode from MTU assigned in | 12633 | /* Derive initial jumbo mode from MTU assigned in |
12624 | * ether_setup() via the alloc_etherdev() call | 12634 | * ether_setup() via the alloc_etherdev() call |
12625 | */ | 12635 | */ |
@@ -13756,9 +13766,10 @@ static int __devinit tg3_init_one(struct pci_dev *pdev, | |||
13756 | * is off by default, but can be enabled using ethtool. | 13766 | * is off by default, but can be enabled using ethtool. |
13757 | */ | 13767 | */ |
13758 | if (tp->tg3_flags2 & TG3_FLG2_HW_TSO) { | 13768 | if (tp->tg3_flags2 & TG3_FLG2_HW_TSO) { |
13759 | dev->features |= NETIF_F_TSO; | 13769 | if (dev->features & NETIF_F_IP_CSUM) |
13760 | if ((tp->tg3_flags2 & TG3_FLG2_HW_TSO_2) && | 13770 | dev->features |= NETIF_F_TSO; |
13761 | (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5906)) | 13771 | if ((dev->features & NETIF_F_IPV6_CSUM) && |
13772 | (tp->tg3_flags2 & TG3_FLG2_HW_TSO_2)) | ||
13762 | dev->features |= NETIF_F_TSO6; | 13773 | dev->features |= NETIF_F_TSO6; |
13763 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5761 || | 13774 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5761 || |
13764 | (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5784 && | 13775 | (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5784 && |
@@ -13812,18 +13823,6 @@ static int __devinit tg3_init_one(struct pci_dev *pdev, | |||
13812 | goto err_out_apeunmap; | 13823 | goto err_out_apeunmap; |
13813 | } | 13824 | } |
13814 | 13825 | ||
13815 | /* Tigon3 can do ipv4 only... and some chips have buggy | ||
13816 | * checksumming. | ||
13817 | */ | ||
13818 | if ((tp->tg3_flags & TG3_FLAG_BROKEN_CHECKSUMS) == 0) { | ||
13819 | dev->features |= NETIF_F_IP_CSUM | NETIF_F_SG; | ||
13820 | if (tp->tg3_flags3 & TG3_FLG3_5755_PLUS) | ||
13821 | dev->features |= NETIF_F_IPV6_CSUM; | ||
13822 | |||
13823 | tp->tg3_flags |= TG3_FLAG_RX_CHECKSUMS; | ||
13824 | } else | ||
13825 | tp->tg3_flags &= ~TG3_FLAG_RX_CHECKSUMS; | ||
13826 | |||
13827 | /* flow control autonegotiation is default behavior */ | 13826 | /* flow control autonegotiation is default behavior */ |
13828 | tp->tg3_flags |= TG3_FLAG_PAUSE_AUTONEG; | 13827 | tp->tg3_flags |= TG3_FLAG_PAUSE_AUTONEG; |
13829 | tp->link_config.flowctrl = FLOW_CTRL_TX | FLOW_CTRL_RX; | 13828 | tp->link_config.flowctrl = FLOW_CTRL_TX | FLOW_CTRL_RX; |
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h index 0880cfacdcba..f3cda6428af6 100644 --- a/drivers/net/tg3.h +++ b/drivers/net/tg3.h | |||
@@ -1207,6 +1207,8 @@ | |||
1207 | #define RDMAC_MODE_MBUF_SBD_CRPT_ENAB 0x00002000 | 1207 | #define RDMAC_MODE_MBUF_SBD_CRPT_ENAB 0x00002000 |
1208 | #define RDMAC_MODE_FIFO_SIZE_128 0x00020000 | 1208 | #define RDMAC_MODE_FIFO_SIZE_128 0x00020000 |
1209 | #define RDMAC_MODE_FIFO_LONG_BURST 0x00030000 | 1209 | #define RDMAC_MODE_FIFO_LONG_BURST 0x00030000 |
1210 | #define RDMAC_MODE_IPV4_LSO_EN 0x08000000 | ||
1211 | #define RDMAC_MODE_IPV6_LSO_EN 0x10000000 | ||
1210 | #define RDMAC_STATUS 0x00004804 | 1212 | #define RDMAC_STATUS 0x00004804 |
1211 | #define RDMAC_STATUS_TGTABORT 0x00000004 | 1213 | #define RDMAC_STATUS_TGTABORT 0x00000004 |
1212 | #define RDMAC_STATUS_MSTABORT 0x00000008 | 1214 | #define RDMAC_STATUS_MSTABORT 0x00000008 |