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author | Russell King <rmk+kernel@arm.linux.org.uk> | 2009-11-16 11:28:15 -0500 |
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committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2009-11-16 11:28:15 -0500 |
commit | e12399fec3793e0c2b75d366c7fd48a360f6e328 (patch) | |
tree | fee270c800c2c9bb646eabee322dddd2b213e03b | |
parent | 378ce74bee4cb0183489bc0f850790a2264ca975 (diff) | |
parent | 2bf30108435339c4cf149f9d279d0dc961345393 (diff) |
Merge branch 'for-rmk' of git://git.marvell.com/orion
-rw-r--r-- | arch/arm/mach-kirkwood/common.c | 8 | ||||
-rw-r--r-- | arch/arm/mach-kirkwood/include/mach/bridge-regs.h | 3 |
2 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c index 7177c4aa6342..242dd0775343 100644 --- a/arch/arm/mach-kirkwood/common.c +++ b/arch/arm/mach-kirkwood/common.c | |||
@@ -915,6 +915,14 @@ void __init kirkwood_init(void) | |||
915 | kirkwood_uart0_data[0].uartclk = kirkwood_tclk; | 915 | kirkwood_uart0_data[0].uartclk = kirkwood_tclk; |
916 | kirkwood_uart1_data[0].uartclk = kirkwood_tclk; | 916 | kirkwood_uart1_data[0].uartclk = kirkwood_tclk; |
917 | 917 | ||
918 | /* | ||
919 | * Disable propagation of mbus errors to the CPU local bus, | ||
920 | * as this causes mbus errors (which can occur for example | ||
921 | * for PCI aborts) to throw CPU aborts, which we're not set | ||
922 | * up to deal with. | ||
923 | */ | ||
924 | writel(readl(CPU_CONFIG) & ~CPU_CONFIG_ERROR_PROP, CPU_CONFIG); | ||
925 | |||
918 | kirkwood_setup_cpu_mbus(); | 926 | kirkwood_setup_cpu_mbus(); |
919 | 927 | ||
920 | #ifdef CONFIG_CACHE_FEROCEON_L2 | 928 | #ifdef CONFIG_CACHE_FEROCEON_L2 |
diff --git a/arch/arm/mach-kirkwood/include/mach/bridge-regs.h b/arch/arm/mach-kirkwood/include/mach/bridge-regs.h index 9e80d9232c83..418f5017c50e 100644 --- a/arch/arm/mach-kirkwood/include/mach/bridge-regs.h +++ b/arch/arm/mach-kirkwood/include/mach/bridge-regs.h | |||
@@ -13,6 +13,9 @@ | |||
13 | 13 | ||
14 | #include <mach/kirkwood.h> | 14 | #include <mach/kirkwood.h> |
15 | 15 | ||
16 | #define CPU_CONFIG (BRIDGE_VIRT_BASE | 0x0100) | ||
17 | #define CPU_CONFIG_ERROR_PROP 0x00000004 | ||
18 | |||
16 | #define CPU_CONTROL (BRIDGE_VIRT_BASE | 0x0104) | 19 | #define CPU_CONTROL (BRIDGE_VIRT_BASE | 0x0104) |
17 | #define CPU_RESET 0x00000002 | 20 | #define CPU_RESET 0x00000002 |
18 | 21 | ||