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authorMasato Noguchi <Masato.Noguchi@jp.sony.com>2007-07-20 15:39:37 -0400
committerArnd Bergmann <arnd@klappe.arndb.de>2007-07-20 15:41:55 -0400
commit1cfc0f86eb0348dd04ace8c2171642ebe9cd87bb (patch)
tree4d7d4de86d020eab3c00975117f8e2b4745f995b
parentcfd529b25d9b1d48423b85d76066348e2459e646 (diff)
[CELL] spufs: fix decr_status meanings
The decr_status in the LSCSA is confusedly used as two meanings: * SPU decrementer was running * SPU decrementer was wrapped as a result of adjust and the code to set decr_status is missing. This patch fixes these problems by using the decr_status argument as a set of flags. This requires a rebuild of the shipped spu_restore code. Signed-off-by: Masato Noguchi <Masato.Noguchi@jp.sony.com> Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Diffstat
-rw-r--r--arch/powerpc/platforms/cell/spufs/spu_restore.c2
-rw-r--r--arch/powerpc/platforms/cell/spufs/spu_restore_dump.h_shipped470
-rw-r--r--arch/powerpc/platforms/cell/spufs/switch.c12
-rw-r--r--include/asm-powerpc/spu_csa.h8
4 files changed, 269 insertions, 223 deletions
diff --git a/arch/powerpc/platforms/cell/spufs/spu_restore.c b/arch/powerpc/platforms/cell/spufs/spu_restore.c
index 4e19ed7a0756..7114e033460e 100644
--- a/arch/powerpc/platforms/cell/spufs/spu_restore.c
+++ b/arch/powerpc/platforms/cell/spufs/spu_restore.c
@@ -90,7 +90,7 @@ static inline void restore_decr(void)
90 * decrementer value from LSCSA. 90 * decrementer value from LSCSA.
91 */ 91 */
92 offset = LSCSA_QW_OFFSET(decr_status); 92 offset = LSCSA_QW_OFFSET(decr_status);
93 decr_running = regs_spill[offset].slot[0]; 93 decr_running = regs_spill[offset].slot[0] & SPU_DECR_STATUS_RUNNING;
94 if (decr_running) { 94 if (decr_running) {
95 offset = LSCSA_QW_OFFSET(decr); 95 offset = LSCSA_QW_OFFSET(decr);
96 decr = regs_spill[offset].slot[0]; 96 decr = regs_spill[offset].slot[0];
diff --git a/arch/powerpc/platforms/cell/spufs/spu_restore_dump.h_shipped b/arch/powerpc/platforms/cell/spufs/spu_restore_dump.h_shipped
index 15183d209b58..799815e22377 100644
--- a/arch/powerpc/platforms/cell/spufs/spu_restore_dump.h_shipped
+++ b/arch/powerpc/platforms/cell/spufs/spu_restore_dump.h_shipped
@@ -10,7 +10,7 @@ static unsigned int spu_restore_code[] __attribute__((__aligned__(128))) = {
100x24fd8081, 100x24fd8081,
110x1cd80081, 110x1cd80081,
120x33001180, 120x33001180,
130x42030003, 130x42034003,
140x33800284, 140x33800284,
150x1c010204, 150x1c010204,
160x40200000, 160x40200000,
@@ -24,22 +24,22 @@ static unsigned int spu_restore_code[] __attribute__((__aligned__(128))) = {
240x23fffd84, 240x23fffd84,
250x1c100183, 250x1c100183,
260x217ffa85, 260x217ffa85,
270x3080a000, 270x3080b000,
280x3080a201, 280x3080b201,
290x3080a402, 290x3080b402,
300x3080a603, 300x3080b603,
310x3080a804, 310x3080b804,
320x3080aa05, 320x3080ba05,
330x3080ac06, 330x3080bc06,
340x3080ae07, 340x3080be07,
350x3080b008, 350x3080c008,
360x3080b209, 360x3080c209,
370x3080b40a, 370x3080c40a,
380x3080b60b, 380x3080c60b,
390x3080b80c, 390x3080c80c,
400x3080ba0d, 400x3080ca0d,
410x3080bc0e, 410x3080cc0e,
420x3080be0f, 420x3080ce0f,
430x00003ffc, 430x00003ffc,
440x00000000, 440x00000000,
450x00000000, 450x00000000,
@@ -48,19 +48,18 @@ static unsigned int spu_restore_code[] __attribute__((__aligned__(128))) = {
480x3ec00083, 480x3ec00083,
490xb0a14103, 490xb0a14103,
500x01a00204, 500x01a00204,
510x3ec10082, 510x3ec10083,
520x4202800e, 520x4202c002,
530x04000703, 530xb0a14203,
540xb0a14202, 540x21a00802,
550x21a00803, 550x3fbf028a,
560x3fbf028d, 560x3f20050a,
570x3f20068d, 570x3fbe0502,
580x3fbe0682,
590x3fe30102, 580x3fe30102,
600x21a00882, 590x21a00882,
610x3f82028f, 600x3f82028b,
620x3fe3078f, 610x3fe3058b,
630x3fbf0784, 620x3fbf0584,
640x3f200204, 630x3f200204,
650x3fbe0204, 640x3fbe0204,
660x3fe30204, 650x3fe30204,
@@ -75,52 +74,46 @@ static unsigned int spu_restore_code[] __attribute__((__aligned__(128))) = {
750x21a00083, 740x21a00083,
760x40800082, 750x40800082,
770x21a00b02, 760x21a00b02,
780x10002818, 770x10002612,
790x42a00002, 780x42a00003,
800x32800007, 790x42074006,
810x4207000c, 800x1800c204,
820x18008208, 810x40a00008,
830x40a0000b, 820x40800789,
840x4080020a, 830x1c010305,
850x40800709, 840x34000302,
860x00200000,
870x42070002,
880x3ac30384,
890x1cffc489, 850x1cffc489,
900x00200000, 860x3ec00303,
910x18008383, 870x3ec00287,
920x38830382, 880xb0408403,
930x4cffc486, 890x24000302,
940x3ac28185, 900x34000282,
950xb0408584, 910x1c020306,
960x28830382, 920xb0408207,
970x1c020387, 930x18020204,
980x38828182, 940x24000282,
990xb0408405, 950x217ffa09,
1000x1802c408, 960x04000403,
1010x28828182,
1020x217ff886,
1030x04000583,
1040x21a00803, 970x21a00803,
1050x3fbe0682, 980x3fbe0502,
1060x3fe30102, 990x3fe30102,
1070x04000106, 1000x04000105,
1080x21a00886, 1010x21a00885,
1090x04000603, 1020x42074002,
1100x21a00903, 1030x21a00902,
1110x40803c02, 1040x40803c03,
1120x21a00982, 1050x21a00983,
1130x40800003, 1060x04000484,
1140x04000184,
1150x21a00a04, 1070x21a00a04,
1160x40802202, 1080x40802202,
1170x21a00a82, 1090x21a00a82,
1180x42028005, 1100x30809c03,
1190x34208702, 1110x34000182,
1200x21002282, 1120x14004102,
1130x21002782,
1210x21a00804, 1140x21a00804,
1220x21a00886, 1150x21a00885,
1230x3fbf0782, 1160x3fbf0582,
1240x3f200102, 1170x3f200102,
1250x3fbe0102, 1180x3fbe0102,
1260x3fe30102, 1190x3fe30102,
@@ -133,194 +126,233 @@ static unsigned int spu_restore_code[] __attribute__((__aligned__(128))) = {
1330x40800083, 1260x40800083,
1340x21a00b83, 1270x21a00b83,
1350x01a00c02, 1280x01a00c02,
1360x01a00d83, 1290x01a00d84,
1370x3420c282, 1300x3080a003,
1310x34000182,
1380x21a00e02, 1320x21a00e02,
1390x34210283, 1330x3080a203,
1400x21a00f03, 1340x34000182,
1410x34200284, 1350x21a00f02,
1420x77400200, 1360x3080a403,
1430x3421c282, 1370x34000182,
1380x77400100,
1390x3080a603,
1400x34000182,
1440x21a00702, 1410x21a00702,
1450x34218283, 1420x3080a803,
1460x21a00083, 1430x34000182,
1470x34214282, 1440x21a00082,
1450x3080aa03,
1460x34000182,
1480x21a00b02, 1470x21a00b02,
1490x4200480c, 1480x3080ae02,
1500x00200000, 1490x3080ac04,
1510x1c010286, 1500x42004805,
1520x34220284, 1510x34000103,
1530x34220302, 1520x34000202,
1540x0f608203, 1530x1cffc183,
1550x5c024204, 1540x3b810106,
1560x3b81810b, 1550x0f608184,
1570x42013c02, 1560x42013802,
1580x00200000, 1570x5c020183,
1590x18008185, 1580x38810102,
1600x38808183, 1590x3b810102,
1610x3b814182, 1600x21000e83,
1620x21004e84,
1630x4020007f, 1610x4020007f,
1640x35000100, 1620x35000100,
1650x000004e0, 1630x00000470,
1660x000002a0, 1640x000002f8,
1670x000002e8, 1650x00000430,
1680x00000428,
1690x00000360, 1660x00000360,
1700x000002e8, 1670x000002f8,
1710x000004a0,
1720x00000468,
1730x000003c8, 1680x000003c8,
1690x000004a8,
1700x00000298,
1740x00000360, 1710x00000360,
1720x00200000,
1750x409ffe02, 1730x409ffe02,
1760x30801203, 1740x30801203,
1770x40800204, 1750x40800208,
1780x3ec40085, 1760x3ec40084,
1790x10009c09, 1770x40800407,
1800x3ac10606, 1780x3ac20289,
1810xb060c105, 1790xb060c104,
1820x4020007f, 1800x3ac1c284,
1830x4020007f,
1840x20801203, 1810x20801203,
1850x38810602, 1820x38820282,
1860xb0408586, 1830x41004003,
1870x28810602, 1840xb0408189,
1880x32004180, 1850x28820282,
1890x34204702, 1860x3881c282,
1870xb0408304,
1880x2881c282,
1890x00400000,
1900x40800003,
1910x35000000,
1920x30809e03,
1930x34000182,
1900x21a00382, 1940x21a00382,
1910x4020007f, 1950x4020007f,
1920x327fdc80, 1960x327fd700,
1930x409ffe02, 1970x409ffe02,
1940x30801203, 1980x30801203,
1950x40800204, 1990x40800206,
1960x3ec40087, 2000x3ec40084,
1970x40800405, 2010x40800407,
1980x00200000, 2020x40800608,
1990x40800606, 2030x3ac1828a,
2000x3ac10608, 2040x3ac20289,
2010x3ac14609, 2050xb060c104,
2020x3ac1860a, 2060x3ac1c284,
2030xb060c107,
2040x20801203, 2070x20801203,
2080x38818282,
2050x41004003, 2090x41004003,
2060x38810602, 2100xb040818a,
2070x4020007f, 2110x10005b0b,
2080xb0408188, 2120x41201003,
2090x4020007f, 2130x28818282,
2100x28810602, 2140x3881c282,
2110x41201002, 2150xb0408184,
2120x38814603,
2130x10009c09,
2140xb060c109,
2150x4020007f,
2160x28814603,
2170x41193f83, 2160x41193f83,
2180x38818602,
2190x60ffc003, 2170x60ffc003,
2200xb040818a, 2180x2881c282,
2210x28818602, 2190x38820282,
2220x32003080, 2200xb0408189,
2210x28820282,
2220x327fef80,
2230x409ffe02, 2230x409ffe02,
2240x30801203, 2240x30801203,
2250x40800204, 2250x40800207,
2260x3ec40087, 2260x3ec40086,
2270x41201008, 2270x4120100b,
2280x10009c14, 2280x10005b14,
2290x40800405, 2290x40800404,
2300x3ac10609, 2300x3ac1c289,
2310x40800606, 2310x40800608,
2320x3ac1460a, 2320xb060c106,
2330xb060c107, 2330x3ac10286,
2340x3ac1860b, 2340x3ac2028a,
2350x20801203, 2350x20801203,
2360x38810602, 2360x3881c282,
2370xb0408409,
2380x28810602,
2390x38814603,
2400xb060c40a,
2410x4020007f,
2420x28814603,
2430x41193f83, 2370x41193f83,
2440x38818602,
2450x60ffc003, 2380x60ffc003,
2460xb040818b, 2390xb0408589,
2470x28818602, 2400x2881c282,
2480x32002380, 2410x38810282,
2490x409ffe02, 2420xb0408586,
2500x30801204, 2430x28810282,
2510x40800205, 2440x38820282,
2520x3ec40083, 2450xb040818a,
2530x40800406, 2460x28820282,
2540x3ac14607,
2550x3ac18608,
2560xb0810103,
2570x41004002,
2580x20801204,
2590x4020007f,
2600x38814603,
2610x10009c0b,
2620xb060c107,
2630x4020007f,
2640x4020007f,
2650x28814603,
2660x38818602,
2670x4020007f,
2680x4020007f, 2470x4020007f,
2690xb0408588, 2480x327fe280,
2700x28818602, 2490x409ffe02,
2500x30801203,
2510x40800207,
2520x3ec40084,
2530x40800408,
2540x10005b14,
2550x40800609,
2560x3ac1c28a,
2570x3ac2028b,
2580xb060c104,
2590x3ac24284,
2600x20801203,
2610x41201003,
2620x3881c282,
2630xb040830a,
2640x2881c282,
2650x38820282,
2660xb040818b,
2670x41193f83,
2680x60ffc003,
2690x28820282,
2700x38824282,
2710xb0408184,
2720x28824282,
2710x4020007f, 2730x4020007f,
2720x32001780, 2740x327fd580,
2730x409ffe02, 2750x409ffe02,
2740x1000640e, 2760x1000658e,
2750x40800204, 2770x40800206,
2760x30801203, 2780x30801203,
2770x40800405, 2790x40800407,
2780x3ec40087, 2800x3ec40084,
2790x40800606, 2810x40800608,
2800x3ac10608, 2820x3ac1828a,
2810x3ac14609, 2830x3ac20289,
2820x3ac1860a, 2840xb060c104,
2830xb060c107, 2850x3ac1c284,
2840x20801203, 2860x20801203,
2850x413d8003, 2870x413d8003,
2860x38810602, 2880x38818282,
2890x4020007f,
2900x327fd800,
2910x409ffe03,
2920x30801202,
2930x40800207,
2940x3ec40084,
2950x10005b09,
2960x3ac1c288,
2970xb0408184,
2870x4020007f, 2980x4020007f,
2880x327fd780,
2890x409ffe02,
2900x10007f0c,
2910x40800205,
2920x30801204,
2930x40800406,
2940x3ec40083,
2950x3ac14607,
2960x3ac18608,
2970xb0810103,
2980x413d8002,
2990x20801204,
3000x38814603,
3010x4020007f, 2990x4020007f,
3020x327feb80, 3000x20801202,
3010x3881c282,
3020xb0408308,
3030x2881c282,
3040x327fc680,
3030x409ffe02, 3050x409ffe02,
3060x1000588b,
3070x40800208,
3040x30801203, 3080x30801203,
3050x40800204, 3090x40800407,
3060x3ec40087, 3100x3ec40084,
3070x40800405, 3110x3ac20289,
3080x1000650a, 3120xb060c104,
3090x40800606, 3130x3ac1c284,
3100x3ac10608,
3110x3ac14609,
3120x3ac1860a,
3130xb060c107,
3140x20801203, 3140x20801203,
3150x38810602, 3150x413d8003,
3160xb0408588, 3160x38820282,
3170x4020007f, 3170x327fbd80,
3180x327fc980, 3180x00200000,
3190x00400000, 3190x00000da0,
3200x40800003, 3200x00000000,
3210x4020007f, 3210x00000000,
3220x35000000, 3220x00000000,
3230x00000d90,
3240x00000000,
3250x00000000,
3260x00000000,
3270x00000db0,
3280x00000000,
3290x00000000,
3300x00000000,
3310x00000dc0,
3320x00000000,
3330x00000000,
3340x00000000,
3350x00000d80,
3360x00000000,
3370x00000000,
3380x00000000,
3390x00000df0,
3400x00000000,
3410x00000000,
3420x00000000,
3430x00000de0,
3440x00000000,
3450x00000000,
3460x00000000,
3470x00000dd0,
3480x00000000,
3490x00000000,
3500x00000000,
3510x00000e04,
3520x00000000,
3530x00000000,
3230x00000000, 3540x00000000,
3550x00000e00,
3240x00000000, 3560x00000000,
3250x00000000, 3570x00000000,
3260x00000000, 3580x00000000,
diff --git a/arch/powerpc/platforms/cell/spufs/switch.c b/arch/powerpc/platforms/cell/spufs/switch.c
index a08fe93817f6..d4dea1874847 100644
--- a/arch/powerpc/platforms/cell/spufs/switch.c
+++ b/arch/powerpc/platforms/cell/spufs/switch.c
@@ -1285,7 +1285,15 @@ static inline void setup_decr(struct spu_state *csa, struct spu *spu)
1285 cycles_t resume_time = get_cycles(); 1285 cycles_t resume_time = get_cycles();
1286 cycles_t delta_time = resume_time - csa->suspend_time; 1286 cycles_t delta_time = resume_time - csa->suspend_time;
1287 1287
1288 csa->lscsa->decr_status.slot[0] = SPU_DECR_STATUS_RUNNING;
1289 if (csa->lscsa->decr.slot[0] < delta_time) {
1290 csa->lscsa->decr_status.slot[0] |=
1291 SPU_DECR_STATUS_WRAPPED;
1292 }
1293
1288 csa->lscsa->decr.slot[0] -= delta_time; 1294 csa->lscsa->decr.slot[0] -= delta_time;
1295 } else {
1296 csa->lscsa->decr_status.slot[0] = 0;
1289 } 1297 }
1290} 1298}
1291 1299
@@ -1544,10 +1552,10 @@ static inline void restore_decr_wrapped(struct spu_state *csa, struct spu *spu)
1544 * "wrapped" flag is set, OR in a '1' to 1552 * "wrapped" flag is set, OR in a '1' to
1545 * CSA.SPU_Event_Status[Tm]. 1553 * CSA.SPU_Event_Status[Tm].
1546 */ 1554 */
1547 if (csa->lscsa->decr_status.slot[0] == 1) { 1555 if (csa->lscsa->decr_status.slot[0] & SPU_DECR_STATUS_WRAPPED) {
1548 csa->spu_chnldata_RW[0] |= 0x20; 1556 csa->spu_chnldata_RW[0] |= 0x20;
1549 } 1557 }
1550 if ((csa->lscsa->decr_status.slot[0] == 1) && 1558 if ((csa->lscsa->decr_status.slot[0] & SPU_DECR_STATUS_WRAPPED) &&
1551 (csa->spu_chnlcnt_RW[0] == 0 && 1559 (csa->spu_chnlcnt_RW[0] == 0 &&
1552 ((csa->spu_chnldata_RW[2] & 0x20) == 0x0) && 1560 ((csa->spu_chnldata_RW[2] & 0x20) == 0x0) &&
1553 ((csa->spu_chnldata_RW[0] & 0x20) != 0x1))) { 1561 ((csa->spu_chnldata_RW[0] & 0x20) != 0x1))) {
diff --git a/include/asm-powerpc/spu_csa.h b/include/asm-powerpc/spu_csa.h
index c48ae185c874..e87794d5d4ea 100644
--- a/include/asm-powerpc/spu_csa.h
+++ b/include/asm-powerpc/spu_csa.h
@@ -50,6 +50,12 @@
50#define SPU_STOPPED_STATUS_P_I 8 50#define SPU_STOPPED_STATUS_P_I 8
51#define SPU_STOPPED_STATUS_R 9 51#define SPU_STOPPED_STATUS_R 9
52 52
53/*
54 * Definitions for software decrementer status flag.
55 */
56#define SPU_DECR_STATUS_RUNNING 0x1
57#define SPU_DECR_STATUS_WRAPPED 0x2
58
53#ifndef __ASSEMBLY__ 59#ifndef __ASSEMBLY__
54/** 60/**
55 * spu_reg128 - generic 128-bit register definition. 61 * spu_reg128 - generic 128-bit register definition.
@@ -63,7 +69,7 @@ struct spu_reg128 {
63 * @gprs: Array of saved registers. 69 * @gprs: Array of saved registers.
64 * @fpcr: Saved floating point status control register. 70 * @fpcr: Saved floating point status control register.
65 * @decr: Saved decrementer value. 71 * @decr: Saved decrementer value.
66 * @decr_status: Indicates decrementer run status. 72 * @decr_status: Indicates software decrementer status flags.
67 * @ppu_mb: Saved PPU mailbox data. 73 * @ppu_mb: Saved PPU mailbox data.
68 * @ppuint_mb: Saved PPU interrupting mailbox data. 74 * @ppuint_mb: Saved PPU interrupting mailbox data.
69 * @tag_mask: Saved tag group mask. 75 * @tag_mask: Saved tag group mask.
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-04 20:50:29 -0500