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authorDely Sy <dlsy@snoqualmie.dp.intel.com>2005-05-06 20:19:09 -0400
committerGreg KH <gregkh@suse.de>2005-05-17 17:31:11 -0400
commit8b245e45f34280ec61e3c8d643d4613b9e0eb7a4 (patch)
treeaefa5d7e3d4689f5f1df21a7820088e8d9c7070b
parentee17fd93a5892c162b0a02d58cdfdb9c50cf8467 (diff)
[PATCH] PCI Hotplug: get pciehp to work on the downstream port of a switch
Here is the updated patch to get pciehp driver to work for downstream port of a switch and handle the difference in the offset value of PCI Express capability list item of different ports. Signed-off-by: Dely Sy <dely.l.sy@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
-rw-r--r--drivers/pci/hotplug/pciehp.h1
-rw-r--r--drivers/pci/hotplug/pciehp_core.c2
-rw-r--r--drivers/pci/hotplug/pciehp_hpc.c156
-rw-r--r--drivers/pci/pcie/portdrv_bus.c3
4 files changed, 83 insertions, 79 deletions
diff --git a/drivers/pci/hotplug/pciehp.h b/drivers/pci/hotplug/pciehp.h
index f313121d5141..46b294a12418 100644
--- a/drivers/pci/hotplug/pciehp.h
+++ b/drivers/pci/hotplug/pciehp.h
@@ -130,6 +130,7 @@ struct controller {
130 u8 slot_bus; /* Bus where the slots handled by this controller sit */ 130 u8 slot_bus; /* Bus where the slots handled by this controller sit */
131 u8 ctrlcap; 131 u8 ctrlcap;
132 u16 vendor_id; 132 u16 vendor_id;
133 u8 cap_base;
133}; 134};
134 135
135struct irq_mapping { 136struct irq_mapping {
diff --git a/drivers/pci/hotplug/pciehp_core.c b/drivers/pci/hotplug/pciehp_core.c
index ed1fd8d6178d..df4915dbc321 100644
--- a/drivers/pci/hotplug/pciehp_core.c
+++ b/drivers/pci/hotplug/pciehp_core.c
@@ -607,7 +607,7 @@ static int pciehp_resume (struct pcie_device *dev)
607static struct pcie_port_service_id port_pci_ids[] = { { 607static struct pcie_port_service_id port_pci_ids[] = { {
608 .vendor = PCI_ANY_ID, 608 .vendor = PCI_ANY_ID,
609 .device = PCI_ANY_ID, 609 .device = PCI_ANY_ID,
610 .port_type = PCIE_RC_PORT, 610 .port_type = PCIE_ANY_PORT,
611 .service_type = PCIE_PORT_SERVICE_HP, 611 .service_type = PCIE_PORT_SERVICE_HP,
612 .driver_data = 0, 612 .driver_data = 0,
613 }, { /* end: all zeroes */ } 613 }, { /* end: all zeroes */ }
diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c
index 9e70c4681f77..1cda30bd6e47 100644
--- a/drivers/pci/hotplug/pciehp_hpc.c
+++ b/drivers/pci/hotplug/pciehp_hpc.c
@@ -109,20 +109,20 @@ enum ctrl_offsets {
109}; 109};
110static int pcie_cap_base = 0; /* Base of the PCI Express capability item structure */ 110static int pcie_cap_base = 0; /* Base of the PCI Express capability item structure */
111 111
112#define PCIE_CAP_ID ( pcie_cap_base + PCIECAPID ) 112#define PCIE_CAP_ID(cb) ( cb + PCIECAPID )
113#define NXT_CAP_PTR ( pcie_cap_base + NXTCAPPTR ) 113#define NXT_CAP_PTR(cb) ( cb + NXTCAPPTR )
114#define CAP_REG ( pcie_cap_base + CAPREG ) 114#define CAP_REG(cb) ( cb + CAPREG )
115#define DEV_CAP ( pcie_cap_base + DEVCAP ) 115#define DEV_CAP(cb) ( cb + DEVCAP )
116#define DEV_CTRL ( pcie_cap_base + DEVCTRL ) 116#define DEV_CTRL(cb) ( cb + DEVCTRL )
117#define DEV_STATUS ( pcie_cap_base + DEVSTATUS ) 117#define DEV_STATUS(cb) ( cb + DEVSTATUS )
118#define LNK_CAP ( pcie_cap_base + LNKCAP ) 118#define LNK_CAP(cb) ( cb + LNKCAP )
119#define LNK_CTRL ( pcie_cap_base + LNKCTRL ) 119#define LNK_CTRL(cb) ( cb + LNKCTRL )
120#define LNK_STATUS ( pcie_cap_base + LNKSTATUS ) 120#define LNK_STATUS(cb) ( cb + LNKSTATUS )
121#define SLOT_CAP ( pcie_cap_base + SLOTCAP ) 121#define SLOT_CAP(cb) ( cb + SLOTCAP )
122#define SLOT_CTRL ( pcie_cap_base + SLOTCTRL ) 122#define SLOT_CTRL(cb) ( cb + SLOTCTRL )
123#define SLOT_STATUS ( pcie_cap_base + SLOTSTATUS ) 123#define SLOT_STATUS(cb) ( cb + SLOTSTATUS )
124#define ROOT_CTRL ( pcie_cap_base + ROOTCTRL ) 124#define ROOT_CTRL(cb) ( cb + ROOTCTRL )
125#define ROOT_STATUS ( pcie_cap_base + ROOTSTATUS ) 125#define ROOT_STATUS(cb) ( cb + ROOTSTATUS )
126 126
127#define hp_register_read_word(pdev, reg , value) \ 127#define hp_register_read_word(pdev, reg , value) \
128 pci_read_config_word(pdev, reg, &value) 128 pci_read_config_word(pdev, reg, &value)
@@ -303,7 +303,7 @@ static int pcie_write_cmd(struct slot *slot, u16 cmd)
303 return -1; 303 return -1;
304 } 304 }
305 305
306 retval = hp_register_read_word(php_ctlr->pci_dev, SLOT_STATUS, slot_status); 306 retval = hp_register_read_word(php_ctlr->pci_dev, SLOT_STATUS(slot->ctrl->cap_base), slot_status);
307 if (retval) { 307 if (retval) {
308 err("%s : hp_register_read_word SLOT_STATUS failed\n", __FUNCTION__); 308 err("%s : hp_register_read_word SLOT_STATUS failed\n", __FUNCTION__);
309 return retval; 309 return retval;
@@ -317,7 +317,7 @@ static int pcie_write_cmd(struct slot *slot, u16 cmd)
317 } 317 }
318 318
319 dbg("%s: Before hp_register_write_word SLOT_CTRL %x\n", __FUNCTION__, cmd); 319 dbg("%s: Before hp_register_write_word SLOT_CTRL %x\n", __FUNCTION__, cmd);
320 retval = hp_register_write_word(php_ctlr->pci_dev, SLOT_CTRL, cmd | CMD_CMPL_INTR_ENABLE); 320 retval = hp_register_write_word(php_ctlr->pci_dev, SLOT_CTRL(slot->ctrl->cap_base), cmd | CMD_CMPL_INTR_ENABLE);
321 if (retval) { 321 if (retval) {
322 err("%s : hp_register_write_word SLOT_CTRL failed\n", __FUNCTION__); 322 err("%s : hp_register_write_word SLOT_CTRL failed\n", __FUNCTION__);
323 return retval; 323 return retval;
@@ -342,7 +342,7 @@ static int hpc_check_lnk_status(struct controller *ctrl)
342 return -1; 342 return -1;
343 } 343 }
344 344
345 retval = hp_register_read_word(php_ctlr->pci_dev, LNK_STATUS, lnk_status); 345 retval = hp_register_read_word(php_ctlr->pci_dev, LNK_STATUS(ctrl->cap_base), lnk_status);
346 346
347 if (retval) { 347 if (retval) {
348 err("%s : hp_register_read_word LNK_STATUS failed\n", __FUNCTION__); 348 err("%s : hp_register_read_word LNK_STATUS failed\n", __FUNCTION__);
@@ -376,14 +376,14 @@ static int hpc_get_attention_status(struct slot *slot, u8 *status)
376 return -1; 376 return -1;
377 } 377 }
378 378
379 retval = hp_register_read_word(php_ctlr->pci_dev, SLOT_CTRL, slot_ctrl); 379 retval = hp_register_read_word(php_ctlr->pci_dev, SLOT_CTRL(slot->ctrl->cap_base), slot_ctrl);
380 380
381 if (retval) { 381 if (retval) {
382 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__); 382 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__);
383 return retval; 383 return retval;
384 } 384 }
385 385
386 dbg("%s: SLOT_CTRL %x, value read %x\n", __FUNCTION__,SLOT_CTRL, slot_ctrl); 386 dbg("%s: SLOT_CTRL %x, value read %x\n", __FUNCTION__,SLOT_CTRL(slot->ctrl->cap_base), slot_ctrl);
387 387
388 atten_led_state = (slot_ctrl & ATTN_LED_CTRL) >> 6; 388 atten_led_state = (slot_ctrl & ATTN_LED_CTRL) >> 6;
389 389
@@ -423,13 +423,13 @@ static int hpc_get_power_status(struct slot * slot, u8 *status)
423 return -1; 423 return -1;
424 } 424 }
425 425
426 retval = hp_register_read_word(php_ctlr->pci_dev, SLOT_CTRL, slot_ctrl); 426 retval = hp_register_read_word(php_ctlr->pci_dev, SLOT_CTRL(slot->ctrl->cap_base), slot_ctrl);
427 427
428 if (retval) { 428 if (retval) {
429 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__); 429 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__);
430 return retval; 430 return retval;
431 } 431 }
432 dbg("%s: SLOT_CTRL %x value read %x\n", __FUNCTION__, SLOT_CTRL, slot_ctrl); 432 dbg("%s: SLOT_CTRL %x value read %x\n", __FUNCTION__, SLOT_CTRL(slot->ctrl->cap_base), slot_ctrl);
433 433
434 pwr_state = (slot_ctrl & PWR_CTRL) >> 10; 434 pwr_state = (slot_ctrl & PWR_CTRL) >> 10;
435 435
@@ -463,7 +463,7 @@ static int hpc_get_latch_status(struct slot *slot, u8 *status)
463 return -1; 463 return -1;
464 } 464 }
465 465
466 retval = hp_register_read_word(php_ctlr->pci_dev, SLOT_STATUS, slot_status); 466 retval = hp_register_read_word(php_ctlr->pci_dev, SLOT_STATUS(slot->ctrl->cap_base), slot_status);
467 467
468 if (retval) { 468 if (retval) {
469 err("%s : hp_register_read_word SLOT_STATUS failed\n", __FUNCTION__); 469 err("%s : hp_register_read_word SLOT_STATUS failed\n", __FUNCTION__);
@@ -490,7 +490,7 @@ static int hpc_get_adapter_status(struct slot *slot, u8 *status)
490 return -1; 490 return -1;
491 } 491 }
492 492
493 retval = hp_register_read_word(php_ctlr->pci_dev, SLOT_STATUS, slot_status); 493 retval = hp_register_read_word(php_ctlr->pci_dev, SLOT_STATUS(slot->ctrl->cap_base), slot_status);
494 494
495 if (retval) { 495 if (retval) {
496 err("%s : hp_register_read_word SLOT_STATUS failed\n", __FUNCTION__); 496 err("%s : hp_register_read_word SLOT_STATUS failed\n", __FUNCTION__);
@@ -518,7 +518,7 @@ static int hpc_query_power_fault(struct slot * slot)
518 return -1; 518 return -1;
519 } 519 }
520 520
521 retval = hp_register_read_word(php_ctlr->pci_dev, SLOT_STATUS, slot_status); 521 retval = hp_register_read_word(php_ctlr->pci_dev, SLOT_STATUS(slot->ctrl->cap_base), slot_status);
522 522
523 if (retval) { 523 if (retval) {
524 err("%s : hp_register_read_word SLOT_STATUS failed\n", __FUNCTION__); 524 err("%s : hp_register_read_word SLOT_STATUS failed\n", __FUNCTION__);
@@ -549,7 +549,7 @@ static int hpc_set_attention_status(struct slot *slot, u8 value)
549 err("%s: Invalid HPC slot number!\n", __FUNCTION__); 549 err("%s: Invalid HPC slot number!\n", __FUNCTION__);
550 return -1; 550 return -1;
551 } 551 }
552 rc = hp_register_read_word(php_ctlr->pci_dev, SLOT_CTRL, slot_ctrl); 552 rc = hp_register_read_word(php_ctlr->pci_dev, SLOT_CTRL(slot->ctrl->cap_base), slot_ctrl);
553 553
554 if (rc) { 554 if (rc) {
555 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__); 555 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__);
@@ -574,7 +574,7 @@ static int hpc_set_attention_status(struct slot *slot, u8 value)
574 slot_cmd = slot_cmd | HP_INTR_ENABLE; 574 slot_cmd = slot_cmd | HP_INTR_ENABLE;
575 575
576 pcie_write_cmd(slot, slot_cmd); 576 pcie_write_cmd(slot, slot_cmd);
577 dbg("%s: SLOT_CTRL %x write cmd %x\n", __FUNCTION__, SLOT_CTRL, slot_cmd); 577 dbg("%s: SLOT_CTRL %x write cmd %x\n", __FUNCTION__, SLOT_CTRL(slot->ctrl->cap_base), slot_cmd);
578 578
579 return rc; 579 return rc;
580} 580}
@@ -598,7 +598,7 @@ static void hpc_set_green_led_on(struct slot *slot)
598 return ; 598 return ;
599 } 599 }
600 600
601 rc = hp_register_read_word(php_ctlr->pci_dev, SLOT_CTRL, slot_ctrl); 601 rc = hp_register_read_word(php_ctlr->pci_dev, SLOT_CTRL(slot->ctrl->cap_base), slot_ctrl);
602 602
603 if (rc) { 603 if (rc) {
604 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__); 604 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__);
@@ -611,7 +611,7 @@ static void hpc_set_green_led_on(struct slot *slot)
611 611
612 pcie_write_cmd(slot, slot_cmd); 612 pcie_write_cmd(slot, slot_cmd);
613 613
614 dbg("%s: SLOT_CTRL %x write cmd %x\n",__FUNCTION__, SLOT_CTRL, slot_cmd); 614 dbg("%s: SLOT_CTRL %x write cmd %x\n",__FUNCTION__, SLOT_CTRL(slot->ctrl->cap_base), slot_cmd);
615 return; 615 return;
616} 616}
617 617
@@ -633,7 +633,7 @@ static void hpc_set_green_led_off(struct slot *slot)
633 return ; 633 return ;
634 } 634 }
635 635
636 rc = hp_register_read_word(php_ctlr->pci_dev, SLOT_CTRL, slot_ctrl); 636 rc = hp_register_read_word(php_ctlr->pci_dev, SLOT_CTRL(slot->ctrl->cap_base), slot_ctrl);
637 637
638 if (rc) { 638 if (rc) {
639 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__); 639 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__);
@@ -646,7 +646,7 @@ static void hpc_set_green_led_off(struct slot *slot)
646 if (!pciehp_poll_mode) 646 if (!pciehp_poll_mode)
647 slot_cmd = slot_cmd | HP_INTR_ENABLE; 647 slot_cmd = slot_cmd | HP_INTR_ENABLE;
648 pcie_write_cmd(slot, slot_cmd); 648 pcie_write_cmd(slot, slot_cmd);
649 dbg("%s: SLOT_CTRL %x write cmd %x\n", __FUNCTION__, SLOT_CTRL, slot_cmd); 649 dbg("%s: SLOT_CTRL %x write cmd %x\n", __FUNCTION__, SLOT_CTRL(slot->ctrl->cap_base), slot_cmd);
650 650
651 return; 651 return;
652} 652}
@@ -669,7 +669,7 @@ static void hpc_set_green_led_blink(struct slot *slot)
669 return ; 669 return ;
670 } 670 }
671 671
672 rc = hp_register_read_word(php_ctlr->pci_dev, SLOT_CTRL, slot_ctrl); 672 rc = hp_register_read_word(php_ctlr->pci_dev, SLOT_CTRL(slot->ctrl->cap_base), slot_ctrl);
673 673
674 if (rc) { 674 if (rc) {
675 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__); 675 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__);
@@ -683,7 +683,7 @@ static void hpc_set_green_led_blink(struct slot *slot)
683 slot_cmd = slot_cmd | HP_INTR_ENABLE; 683 slot_cmd = slot_cmd | HP_INTR_ENABLE;
684 pcie_write_cmd(slot, slot_cmd); 684 pcie_write_cmd(slot, slot_cmd);
685 685
686 dbg("%s: SLOT_CTRL %x write cmd %x\n",__FUNCTION__, SLOT_CTRL, slot_cmd); 686 dbg("%s: SLOT_CTRL %x write cmd %x\n",__FUNCTION__, SLOT_CTRL(slot->ctrl->cap_base), slot_cmd);
687 return; 687 return;
688} 688}
689 689
@@ -707,7 +707,7 @@ int pcie_get_ctlr_slot_config(struct controller *ctrl,
707 *first_device_num = 0; 707 *first_device_num = 0;
708 *num_ctlr_slots = 1; 708 *num_ctlr_slots = 1;
709 709
710 rc = hp_register_read_dword(php_ctlr->pci_dev, SLOT_CAP, slot_cap); 710 rc = hp_register_read_dword(php_ctlr->pci_dev, SLOT_CAP(ctrl->cap_base), slot_cap);
711 711
712 if (rc) { 712 if (rc) {
713 err("%s : hp_register_read_dword SLOT_CAP failed\n", __FUNCTION__); 713 err("%s : hp_register_read_dword SLOT_CAP failed\n", __FUNCTION__);
@@ -793,13 +793,13 @@ static int hpc_power_on_slot(struct slot * slot)
793 return -1; 793 return -1;
794 } 794 }
795 795
796 retval = hp_register_read_word(php_ctlr->pci_dev, SLOT_CTRL, slot_ctrl); 796 retval = hp_register_read_word(php_ctlr->pci_dev, SLOT_CTRL(slot->ctrl->cap_base), slot_ctrl);
797 797
798 if (retval) { 798 if (retval) {
799 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__); 799 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__);
800 return retval; 800 return retval;
801 } 801 }
802 dbg("%s: SLOT_CTRL %x, value read %xn", __FUNCTION__, SLOT_CTRL, 802 dbg("%s: SLOT_CTRL %x, value read %xn", __FUNCTION__, SLOT_CTRL(slot->ctrl->cap_base),
803 slot_ctrl); 803 slot_ctrl);
804 804
805 slot_cmd = (slot_ctrl & ~PWR_CTRL) | POWER_ON; 805 slot_cmd = (slot_ctrl & ~PWR_CTRL) | POWER_ON;
@@ -813,7 +813,7 @@ static int hpc_power_on_slot(struct slot * slot)
813 err("%s: Write %x command failed!\n", __FUNCTION__, slot_cmd); 813 err("%s: Write %x command failed!\n", __FUNCTION__, slot_cmd);
814 return -1; 814 return -1;
815 } 815 }
816 dbg("%s: SLOT_CTRL %x write cmd %x\n",__FUNCTION__, SLOT_CTRL, slot_cmd); 816 dbg("%s: SLOT_CTRL %x write cmd %x\n",__FUNCTION__, SLOT_CTRL(slot->ctrl->cap_base), slot_cmd);
817 817
818 DBG_LEAVE_ROUTINE 818 DBG_LEAVE_ROUTINE
819 819
@@ -842,13 +842,13 @@ static int hpc_power_off_slot(struct slot * slot)
842 err("%s: Invalid HPC slot number!\n", __FUNCTION__); 842 err("%s: Invalid HPC slot number!\n", __FUNCTION__);
843 return -1; 843 return -1;
844 } 844 }
845 retval = hp_register_read_word(php_ctlr->pci_dev, SLOT_CTRL, slot_ctrl); 845 retval = hp_register_read_word(php_ctlr->pci_dev, SLOT_CTRL(slot->ctrl->cap_base), slot_ctrl);
846 846
847 if (retval) { 847 if (retval) {
848 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__); 848 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__);
849 return retval; 849 return retval;
850 } 850 }
851 dbg("%s: SLOT_CTRL %x, value read %x\n", __FUNCTION__, SLOT_CTRL, 851 dbg("%s: SLOT_CTRL %x, value read %x\n", __FUNCTION__, SLOT_CTRL(slot->ctrl->cap_base),
852 slot_ctrl); 852 slot_ctrl);
853 853
854 slot_cmd = (slot_ctrl & ~PWR_CTRL) | POWER_OFF; 854 slot_cmd = (slot_ctrl & ~PWR_CTRL) | POWER_OFF;
@@ -862,7 +862,7 @@ static int hpc_power_off_slot(struct slot * slot)
862 err("%s: Write command failed!\n", __FUNCTION__); 862 err("%s: Write command failed!\n", __FUNCTION__);
863 return -1; 863 return -1;
864 } 864 }
865 dbg("%s: SLOT_CTRL %x write cmd %x\n",__FUNCTION__, SLOT_CTRL, slot_cmd); 865 dbg("%s: SLOT_CTRL %x write cmd %x\n",__FUNCTION__, SLOT_CTRL(slot->ctrl->cap_base), slot_cmd);
866 866
867 DBG_LEAVE_ROUTINE 867 DBG_LEAVE_ROUTINE
868 868
@@ -900,7 +900,7 @@ static irqreturn_t pcie_isr(int IRQ, void *dev_id, struct pt_regs *regs)
900 return IRQ_NONE; 900 return IRQ_NONE;
901 } 901 }
902 902
903 rc = hp_register_read_word(php_ctlr->pci_dev, SLOT_STATUS, slot_status); 903 rc = hp_register_read_word(php_ctlr->pci_dev, SLOT_STATUS(ctrl->cap_base), slot_status);
904 if (rc) { 904 if (rc) {
905 err("%s : hp_register_read_word SLOT_STATUS failed\n", __FUNCTION__); 905 err("%s : hp_register_read_word SLOT_STATUS failed\n", __FUNCTION__);
906 return IRQ_NONE; 906 return IRQ_NONE;
@@ -918,7 +918,7 @@ static irqreturn_t pcie_isr(int IRQ, void *dev_id, struct pt_regs *regs)
918 dbg("%s: intr_loc %x\n", __FUNCTION__, intr_loc); 918 dbg("%s: intr_loc %x\n", __FUNCTION__, intr_loc);
919 /* Mask Hot-plug Interrupt Enable */ 919 /* Mask Hot-plug Interrupt Enable */
920 if (!pciehp_poll_mode) { 920 if (!pciehp_poll_mode) {
921 rc = hp_register_read_word(php_ctlr->pci_dev, SLOT_CTRL, temp_word); 921 rc = hp_register_read_word(php_ctlr->pci_dev, SLOT_CTRL(ctrl->cap_base), temp_word);
922 if (rc) { 922 if (rc) {
923 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__); 923 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__);
924 return IRQ_NONE; 924 return IRQ_NONE;
@@ -928,14 +928,14 @@ static irqreturn_t pcie_isr(int IRQ, void *dev_id, struct pt_regs *regs)
928 dbg("%s: hp_register_read_word SLOT_CTRL with value %x\n", __FUNCTION__, temp_word); 928 dbg("%s: hp_register_read_word SLOT_CTRL with value %x\n", __FUNCTION__, temp_word);
929 temp_word = (temp_word & ~HP_INTR_ENABLE & ~CMD_CMPL_INTR_ENABLE) | 0x00; 929 temp_word = (temp_word & ~HP_INTR_ENABLE & ~CMD_CMPL_INTR_ENABLE) | 0x00;
930 930
931 rc = hp_register_write_word(php_ctlr->pci_dev, SLOT_CTRL, temp_word); 931 rc = hp_register_write_word(php_ctlr->pci_dev, SLOT_CTRL(ctrl->cap_base), temp_word);
932 if (rc) { 932 if (rc) {
933 err("%s : hp_register_write_word SLOT_CTRL failed\n", __FUNCTION__); 933 err("%s : hp_register_write_word SLOT_CTRL failed\n", __FUNCTION__);
934 return IRQ_NONE; 934 return IRQ_NONE;
935 } 935 }
936 dbg("%s: hp_register_write_word SLOT_CTRL with value %x\n", __FUNCTION__, temp_word); 936 dbg("%s: hp_register_write_word SLOT_CTRL with value %x\n", __FUNCTION__, temp_word);
937 937
938 rc = hp_register_read_word(php_ctlr->pci_dev, SLOT_STATUS, slot_status); 938 rc = hp_register_read_word(php_ctlr->pci_dev, SLOT_STATUS(ctrl->cap_base), slot_status);
939 if (rc) { 939 if (rc) {
940 err("%s : hp_register_read_word SLOT_STATUS failed\n", __FUNCTION__); 940 err("%s : hp_register_read_word SLOT_STATUS failed\n", __FUNCTION__);
941 return IRQ_NONE; 941 return IRQ_NONE;
@@ -944,7 +944,7 @@ static irqreturn_t pcie_isr(int IRQ, void *dev_id, struct pt_regs *regs)
944 944
945 /* Clear command complete interrupt caused by this write */ 945 /* Clear command complete interrupt caused by this write */
946 temp_word = 0x1f; 946 temp_word = 0x1f;
947 rc = hp_register_write_word(php_ctlr->pci_dev, SLOT_STATUS, temp_word); 947 rc = hp_register_write_word(php_ctlr->pci_dev, SLOT_STATUS(ctrl->cap_base), temp_word);
948 if (rc) { 948 if (rc) {
949 err("%s : hp_register_write_word SLOT_STATUS failed\n", __FUNCTION__); 949 err("%s : hp_register_write_word SLOT_STATUS failed\n", __FUNCTION__);
950 return IRQ_NONE; 950 return IRQ_NONE;
@@ -975,14 +975,14 @@ static irqreturn_t pcie_isr(int IRQ, void *dev_id, struct pt_regs *regs)
975 975
976 /* Clear all events after serving them */ 976 /* Clear all events after serving them */
977 temp_word = 0x1F; 977 temp_word = 0x1F;
978 rc = hp_register_write_word(php_ctlr->pci_dev, SLOT_STATUS, temp_word); 978 rc = hp_register_write_word(php_ctlr->pci_dev, SLOT_STATUS(ctrl->cap_base), temp_word);
979 if (rc) { 979 if (rc) {
980 err("%s : hp_register_write_word SLOT_STATUS failed\n", __FUNCTION__); 980 err("%s : hp_register_write_word SLOT_STATUS failed\n", __FUNCTION__);
981 return IRQ_NONE; 981 return IRQ_NONE;
982 } 982 }
983 /* Unmask Hot-plug Interrupt Enable */ 983 /* Unmask Hot-plug Interrupt Enable */
984 if (!pciehp_poll_mode) { 984 if (!pciehp_poll_mode) {
985 rc = hp_register_read_word(php_ctlr->pci_dev, SLOT_CTRL, temp_word); 985 rc = hp_register_read_word(php_ctlr->pci_dev, SLOT_CTRL(ctrl->cap_base), temp_word);
986 if (rc) { 986 if (rc) {
987 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__); 987 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__);
988 return IRQ_NONE; 988 return IRQ_NONE;
@@ -992,14 +992,14 @@ static irqreturn_t pcie_isr(int IRQ, void *dev_id, struct pt_regs *regs)
992 dbg("%s: hp_register_read_word SLOT_CTRL with value %x\n", __FUNCTION__, temp_word); 992 dbg("%s: hp_register_read_word SLOT_CTRL with value %x\n", __FUNCTION__, temp_word);
993 temp_word = (temp_word & ~HP_INTR_ENABLE) | HP_INTR_ENABLE; 993 temp_word = (temp_word & ~HP_INTR_ENABLE) | HP_INTR_ENABLE;
994 994
995 rc = hp_register_write_word(php_ctlr->pci_dev, SLOT_CTRL, temp_word); 995 rc = hp_register_write_word(php_ctlr->pci_dev, SLOT_CTRL(ctrl->cap_base), temp_word);
996 if (rc) { 996 if (rc) {
997 err("%s : hp_register_write_word SLOT_CTRL failed\n", __FUNCTION__); 997 err("%s : hp_register_write_word SLOT_CTRL failed\n", __FUNCTION__);
998 return IRQ_NONE; 998 return IRQ_NONE;
999 } 999 }
1000 dbg("%s: hp_register_write_word SLOT_CTRL with value %x\n", __FUNCTION__, temp_word); 1000 dbg("%s: hp_register_write_word SLOT_CTRL with value %x\n", __FUNCTION__, temp_word);
1001 1001
1002 rc = hp_register_read_word(php_ctlr->pci_dev, SLOT_STATUS, slot_status); 1002 rc = hp_register_read_word(php_ctlr->pci_dev, SLOT_STATUS(ctrl->cap_base), slot_status);
1003 if (rc) { 1003 if (rc) {
1004 err("%s : hp_register_read_word SLOT_STATUS failed\n", __FUNCTION__); 1004 err("%s : hp_register_read_word SLOT_STATUS failed\n", __FUNCTION__);
1005 return IRQ_NONE; 1005 return IRQ_NONE;
@@ -1008,7 +1008,7 @@ static irqreturn_t pcie_isr(int IRQ, void *dev_id, struct pt_regs *regs)
1008 1008
1009 /* Clear command complete interrupt caused by this write */ 1009 /* Clear command complete interrupt caused by this write */
1010 temp_word = 0x1F; 1010 temp_word = 0x1F;
1011 rc = hp_register_write_word(php_ctlr->pci_dev, SLOT_STATUS, temp_word); 1011 rc = hp_register_write_word(php_ctlr->pci_dev, SLOT_STATUS(ctrl->cap_base), temp_word);
1012 if (rc) { 1012 if (rc) {
1013 err("%s : hp_register_write_word SLOT_STATUS failed\n", __FUNCTION__); 1013 err("%s : hp_register_write_word SLOT_STATUS failed\n", __FUNCTION__);
1014 return IRQ_NONE; 1014 return IRQ_NONE;
@@ -1038,7 +1038,7 @@ static int hpc_get_max_lnk_speed (struct slot *slot, enum pci_bus_speed *value)
1038 return -1; 1038 return -1;
1039 } 1039 }
1040 1040
1041 retval = hp_register_read_dword(php_ctlr->pci_dev, LNK_CAP, lnk_cap); 1041 retval = hp_register_read_dword(php_ctlr->pci_dev, LNK_CAP(slot->ctrl->cap_base), lnk_cap);
1042 1042
1043 if (retval) { 1043 if (retval) {
1044 err("%s : hp_register_read_dword LNK_CAP failed\n", __FUNCTION__); 1044 err("%s : hp_register_read_dword LNK_CAP failed\n", __FUNCTION__);
@@ -1079,7 +1079,7 @@ static int hpc_get_max_lnk_width (struct slot *slot, enum pcie_link_width *value
1079 return -1; 1079 return -1;
1080 } 1080 }
1081 1081
1082 retval = hp_register_read_dword(php_ctlr->pci_dev, LNK_CAP, lnk_cap); 1082 retval = hp_register_read_dword(php_ctlr->pci_dev, LNK_CAP(slot->ctrl->cap_base), lnk_cap);
1083 1083
1084 if (retval) { 1084 if (retval) {
1085 err("%s : hp_register_read_dword LNK_CAP failed\n", __FUNCTION__); 1085 err("%s : hp_register_read_dword LNK_CAP failed\n", __FUNCTION__);
@@ -1141,7 +1141,7 @@ static int hpc_get_cur_lnk_speed (struct slot *slot, enum pci_bus_speed *value)
1141 return -1; 1141 return -1;
1142 } 1142 }
1143 1143
1144 retval = hp_register_read_word(php_ctlr->pci_dev, LNK_STATUS, lnk_status); 1144 retval = hp_register_read_word(php_ctlr->pci_dev, LNK_STATUS(slot->ctrl->cap_base), lnk_status);
1145 1145
1146 if (retval) { 1146 if (retval) {
1147 err("%s : hp_register_read_word LNK_STATUS failed\n", __FUNCTION__); 1147 err("%s : hp_register_read_word LNK_STATUS failed\n", __FUNCTION__);
@@ -1182,7 +1182,7 @@ static int hpc_get_cur_lnk_width (struct slot *slot, enum pcie_link_width *value
1182 return -1; 1182 return -1;
1183 } 1183 }
1184 1184
1185 retval = hp_register_read_word(php_ctlr->pci_dev, LNK_STATUS, lnk_status); 1185 retval = hp_register_read_word(php_ctlr->pci_dev, LNK_STATUS(slot->ctrl->cap_base), lnk_status);
1186 1186
1187 if (retval) { 1187 if (retval) {
1188 err("%s : hp_register_read_word LNK_STATUS failed\n", __FUNCTION__); 1188 err("%s : hp_register_read_word LNK_STATUS failed\n", __FUNCTION__);
@@ -1292,47 +1292,48 @@ int pcie_init(struct controller * ctrl,
1292 goto abort_free_ctlr; 1292 goto abort_free_ctlr;
1293 } 1293 }
1294 1294
1295 pcie_cap_base = cap_base; 1295 ctrl->cap_base = cap_base;
1296 1296
1297 dbg("%s: pcie_cap_base %x\n", __FUNCTION__, pcie_cap_base); 1297 dbg("%s: pcie_cap_base %x\n", __FUNCTION__, pcie_cap_base);
1298 1298
1299 rc = hp_register_read_word(pdev, CAP_REG, cap_reg); 1299 rc = hp_register_read_word(pdev, CAP_REG(ctrl->cap_base), cap_reg);
1300 if (rc) { 1300 if (rc) {
1301 err("%s : hp_register_read_word CAP_REG failed\n", __FUNCTION__); 1301 err("%s : hp_register_read_word CAP_REG failed\n", __FUNCTION__);
1302 goto abort_free_ctlr; 1302 goto abort_free_ctlr;
1303 } 1303 }
1304 dbg("%s: CAP_REG offset %x cap_reg %x\n", __FUNCTION__, CAP_REG, cap_reg); 1304 dbg("%s: CAP_REG offset %x cap_reg %x\n", __FUNCTION__, CAP_REG(ctrl->cap_base), cap_reg);
1305 1305
1306 if (((cap_reg & SLOT_IMPL) == 0) || ((cap_reg & DEV_PORT_TYPE) != 0x0040)){ 1306 if (((cap_reg & SLOT_IMPL) == 0) || (((cap_reg & DEV_PORT_TYPE) != 0x0040)
1307 && ((cap_reg & DEV_PORT_TYPE) != 0x0060))) {
1307 dbg("%s : This is not a root port or the port is not connected to a slot\n", __FUNCTION__); 1308 dbg("%s : This is not a root port or the port is not connected to a slot\n", __FUNCTION__);
1308 goto abort_free_ctlr; 1309 goto abort_free_ctlr;
1309 } 1310 }
1310 1311
1311 rc = hp_register_read_dword(php_ctlr->pci_dev, SLOT_CAP, slot_cap); 1312 rc = hp_register_read_dword(php_ctlr->pci_dev, SLOT_CAP(ctrl->cap_base), slot_cap);
1312 if (rc) { 1313 if (rc) {
1313 err("%s : hp_register_read_word CAP_REG failed\n", __FUNCTION__); 1314 err("%s : hp_register_read_word CAP_REG failed\n", __FUNCTION__);
1314 goto abort_free_ctlr; 1315 goto abort_free_ctlr;
1315 } 1316 }
1316 dbg("%s: SLOT_CAP offset %x slot_cap %x\n", __FUNCTION__, SLOT_CAP, slot_cap); 1317 dbg("%s: SLOT_CAP offset %x slot_cap %x\n", __FUNCTION__, SLOT_CAP(ctrl->cap_base), slot_cap);
1317 1318
1318 if (!(slot_cap & HP_CAP)) { 1319 if (!(slot_cap & HP_CAP)) {
1319 dbg("%s : This slot is not hot-plug capable\n", __FUNCTION__); 1320 dbg("%s : This slot is not hot-plug capable\n", __FUNCTION__);
1320 goto abort_free_ctlr; 1321 goto abort_free_ctlr;
1321 } 1322 }
1322 /* For debugging purpose */ 1323 /* For debugging purpose */
1323 rc = hp_register_read_word(php_ctlr->pci_dev, SLOT_STATUS, slot_status); 1324 rc = hp_register_read_word(php_ctlr->pci_dev, SLOT_STATUS(ctrl->cap_base), slot_status);
1324 if (rc) { 1325 if (rc) {
1325 err("%s : hp_register_read_word SLOT_STATUS failed\n", __FUNCTION__); 1326 err("%s : hp_register_read_word SLOT_STATUS failed\n", __FUNCTION__);
1326 goto abort_free_ctlr; 1327 goto abort_free_ctlr;
1327 } 1328 }
1328 dbg("%s: SLOT_STATUS offset %x slot_status %x\n", __FUNCTION__, SLOT_STATUS, slot_status); 1329 dbg("%s: SLOT_STATUS offset %x slot_status %x\n", __FUNCTION__, SLOT_STATUS(ctrl->cap_base), slot_status);
1329 1330
1330 rc = hp_register_read_word(php_ctlr->pci_dev, SLOT_CTRL, slot_ctrl); 1331 rc = hp_register_read_word(php_ctlr->pci_dev, SLOT_CTRL(ctrl->cap_base), slot_ctrl);
1331 if (rc) { 1332 if (rc) {
1332 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__); 1333 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__);
1333 goto abort_free_ctlr; 1334 goto abort_free_ctlr;
1334 } 1335 }
1335 dbg("%s: SLOT_CTRL offset %x slot_ctrl %x\n", __FUNCTION__, SLOT_CTRL, slot_ctrl); 1336 dbg("%s: SLOT_CTRL offset %x slot_ctrl %x\n", __FUNCTION__, SLOT_CTRL(ctrl->cap_base), slot_ctrl);
1336 1337
1337 if (first) { 1338 if (first) {
1338 spin_lock_init(&hpc_event_lock); 1339 spin_lock_init(&hpc_event_lock);
@@ -1372,36 +1373,37 @@ int pcie_init(struct controller * ctrl,
1372 php_ctlr->num_slots = 1; 1373 php_ctlr->num_slots = 1;
1373 1374
1374 /* Mask Hot-plug Interrupt Enable */ 1375 /* Mask Hot-plug Interrupt Enable */
1375 rc = hp_register_read_word(pdev, SLOT_CTRL, temp_word); 1376 rc = hp_register_read_word(pdev, SLOT_CTRL(ctrl->cap_base), temp_word);
1376 if (rc) { 1377 if (rc) {
1377 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__); 1378 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__);
1378 goto abort_free_ctlr; 1379 goto abort_free_ctlr;
1379 } 1380 }
1380 1381
1381 dbg("%s: SLOT_CTRL %x value read %x\n", __FUNCTION__, SLOT_CTRL, temp_word); 1382 dbg("%s: SLOT_CTRL %x value read %x\n", __FUNCTION__, SLOT_CTRL(ctrl->cap_base), temp_word);
1382 temp_word = (temp_word & ~HP_INTR_ENABLE & ~CMD_CMPL_INTR_ENABLE) | 0x00; 1383 temp_word = (temp_word & ~HP_INTR_ENABLE & ~CMD_CMPL_INTR_ENABLE) | 0x00;
1383 1384
1384 rc = hp_register_write_word(pdev, SLOT_CTRL, temp_word); 1385 rc = hp_register_write_word(pdev, SLOT_CTRL(ctrl->cap_base), temp_word);
1385 if (rc) { 1386 if (rc) {
1386 err("%s : hp_register_write_word SLOT_CTRL failed\n", __FUNCTION__); 1387 err("%s : hp_register_write_word SLOT_CTRL failed\n", __FUNCTION__);
1387 goto abort_free_ctlr; 1388 goto abort_free_ctlr;
1388 } 1389 }
1389 dbg("%s : Mask HPIE hp_register_write_word SLOT_CTRL %x\n", __FUNCTION__, temp_word); 1390 dbg("%s : Mask HPIE hp_register_write_word SLOT_CTRL %x\n", __FUNCTION__, temp_word);
1390 1391
1391 rc = hp_register_read_word(php_ctlr->pci_dev, SLOT_STATUS, slot_status); 1392 rc = hp_register_read_word(php_ctlr->pci_dev, SLOT_STATUS(ctrl->cap_base), slot_status);
1392 if (rc) { 1393 if (rc) {
1393 err("%s : hp_register_read_word SLOT_STATUS failed\n", __FUNCTION__); 1394 err("%s : hp_register_read_word SLOT_STATUS failed\n", __FUNCTION__);
1394 goto abort_free_ctlr; 1395 goto abort_free_ctlr;
1395 } 1396 }
1396 dbg("%s: Mask HPIE SLOT_STATUS offset %x reads slot_status %x\n", __FUNCTION__, SLOT_STATUS, slot_status); 1397 dbg("%s: Mask HPIE SLOT_STATUS offset %x reads slot_status %x\n", __FUNCTION__, SLOT_STATUS(ctrl->cap_base)
1398 , slot_status);
1397 1399
1398 temp_word = 0x1F; /* Clear all events */ 1400 temp_word = 0x1F; /* Clear all events */
1399 rc = hp_register_write_word(php_ctlr->pci_dev, SLOT_STATUS, temp_word); 1401 rc = hp_register_write_word(php_ctlr->pci_dev, SLOT_STATUS(ctrl->cap_base), temp_word);
1400 if (rc) { 1402 if (rc) {
1401 err("%s : hp_register_write_word SLOT_STATUS failed\n", __FUNCTION__); 1403 err("%s : hp_register_write_word SLOT_STATUS failed\n", __FUNCTION__);
1402 goto abort_free_ctlr; 1404 goto abort_free_ctlr;
1403 } 1405 }
1404 dbg("%s: SLOT_STATUS offset %x writes slot_status %x\n", __FUNCTION__, SLOT_STATUS, temp_word); 1406 dbg("%s: SLOT_STATUS offset %x writes slot_status %x\n", __FUNCTION__, SLOT_STATUS(ctrl->cap_base), temp_word);
1405 1407
1406 if (pciehp_poll_mode) {/* Install interrupt polling code */ 1408 if (pciehp_poll_mode) {/* Install interrupt polling code */
1407 /* Install and start the interrupt polling timer */ 1409 /* Install and start the interrupt polling timer */
@@ -1417,12 +1419,12 @@ int pcie_init(struct controller * ctrl,
1417 } 1419 }
1418 } 1420 }
1419 1421
1420 rc = hp_register_read_word(pdev, SLOT_CTRL, temp_word); 1422 rc = hp_register_read_word(pdev, SLOT_CTRL(ctrl->cap_base), temp_word);
1421 if (rc) { 1423 if (rc) {
1422 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__); 1424 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__);
1423 goto abort_free_ctlr; 1425 goto abort_free_ctlr;
1424 } 1426 }
1425 dbg("%s: SLOT_CTRL %x value read %x\n", __FUNCTION__, SLOT_CTRL, temp_word); 1427 dbg("%s: SLOT_CTRL %x value read %x\n", __FUNCTION__, SLOT_CTRL(ctrl->cap_base), temp_word);
1426 dbg("%s: slot_cap %x\n", __FUNCTION__, slot_cap); 1428 dbg("%s: slot_cap %x\n", __FUNCTION__, slot_cap);
1427 1429
1428 intr_enable = intr_enable | PRSN_DETECT_ENABLE; 1430 intr_enable = intr_enable | PRSN_DETECT_ENABLE;
@@ -1446,27 +1448,27 @@ int pcie_init(struct controller * ctrl,
1446 dbg("%s: temp_word %x\n", __FUNCTION__, temp_word); 1448 dbg("%s: temp_word %x\n", __FUNCTION__, temp_word);
1447 1449
1448 /* Unmask Hot-plug Interrupt Enable for the interrupt notification mechanism case */ 1450 /* Unmask Hot-plug Interrupt Enable for the interrupt notification mechanism case */
1449 rc = hp_register_write_word(pdev, SLOT_CTRL, temp_word); 1451 rc = hp_register_write_word(pdev, SLOT_CTRL(ctrl->cap_base), temp_word);
1450 if (rc) { 1452 if (rc) {
1451 err("%s : hp_register_write_word SLOT_CTRL failed\n", __FUNCTION__); 1453 err("%s : hp_register_write_word SLOT_CTRL failed\n", __FUNCTION__);
1452 goto abort_free_ctlr; 1454 goto abort_free_ctlr;
1453 } 1455 }
1454 dbg("%s : Unmask HPIE hp_register_write_word SLOT_CTRL with %x\n", __FUNCTION__, temp_word); 1456 dbg("%s : Unmask HPIE hp_register_write_word SLOT_CTRL with %x\n", __FUNCTION__, temp_word);
1455 rc = hp_register_read_word(php_ctlr->pci_dev, SLOT_STATUS, slot_status); 1457 rc = hp_register_read_word(php_ctlr->pci_dev, SLOT_STATUS(ctrl->cap_base), slot_status);
1456 if (rc) { 1458 if (rc) {
1457 err("%s : hp_register_read_word SLOT_STATUS failed\n", __FUNCTION__); 1459 err("%s : hp_register_read_word SLOT_STATUS failed\n", __FUNCTION__);
1458 goto abort_free_ctlr; 1460 goto abort_free_ctlr;
1459 } 1461 }
1460 dbg("%s: Unmask HPIE SLOT_STATUS offset %x reads slot_status %x\n", __FUNCTION__, 1462 dbg("%s: Unmask HPIE SLOT_STATUS offset %x reads slot_status %x\n", __FUNCTION__,
1461 SLOT_STATUS, slot_status); 1463 SLOT_STATUS(ctrl->cap_base), slot_status);
1462 1464
1463 temp_word = 0x1F; /* Clear all events */ 1465 temp_word = 0x1F; /* Clear all events */
1464 rc = hp_register_write_word(php_ctlr->pci_dev, SLOT_STATUS, temp_word); 1466 rc = hp_register_write_word(php_ctlr->pci_dev, SLOT_STATUS(ctrl->cap_base), temp_word);
1465 if (rc) { 1467 if (rc) {
1466 err("%s : hp_register_write_word SLOT_STATUS failed\n", __FUNCTION__); 1468 err("%s : hp_register_write_word SLOT_STATUS failed\n", __FUNCTION__);
1467 goto abort_free_ctlr; 1469 goto abort_free_ctlr;
1468 } 1470 }
1469 dbg("%s: SLOT_STATUS offset %x writes slot_status %x\n", __FUNCTION__, SLOT_STATUS, temp_word); 1471 dbg("%s: SLOT_STATUS offset %x writes slot_status %x\n", __FUNCTION__, SLOT_STATUS(ctrl->cap_base), temp_word);
1470 1472
1471 /* Add this HPC instance into the HPC list */ 1473 /* Add this HPC instance into the HPC list */
1472 spin_lock(&list_lock); 1474 spin_lock(&list_lock);
diff --git a/drivers/pci/pcie/portdrv_bus.c b/drivers/pci/pcie/portdrv_bus.c
index 4037a3e568de..3e84b501e6a4 100644
--- a/drivers/pci/pcie/portdrv_bus.c
+++ b/drivers/pci/pcie/portdrv_bus.c
@@ -39,7 +39,8 @@ static int pcie_port_bus_match(struct device *dev, struct device_driver *drv)
39 driver->id_table->vendor != pciedev->id.vendor) || 39 driver->id_table->vendor != pciedev->id.vendor) ||
40 (driver->id_table->device != PCI_ANY_ID && 40 (driver->id_table->device != PCI_ANY_ID &&
41 driver->id_table->device != pciedev->id.device) || 41 driver->id_table->device != pciedev->id.device) ||
42 driver->id_table->port_type != pciedev->id.port_type || 42 (driver->id_table->port_type != PCIE_ANY_PORT &&
43 driver->id_table->port_type != pciedev->id.port_type) ||
43 driver->id_table->service_type != pciedev->id.service_type ) 44 driver->id_table->service_type != pciedev->id.service_type )
44 return 0; 45 return 0;
45 46