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authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-06-20 14:37:49 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-06-20 14:37:49 -0400
commit91b90475e793e84a57d956af8c52645e292badcb (patch)
tree8de670e02f99a2a2bde82384104dcb8cb09cdadf
parentbcc408b75b707f46da1f81058ffa3c9df6f0170f (diff)
parentf0ffeddc897a5cc5d5c6cc1b99a8799a8b34b28f (diff)
Merge master.kernel.org:/home/rmk/linux-2.6-arm
Diffstat
-rw-r--r--arch/arm/Kconfig13
-rw-r--r--arch/arm/Makefile1
-rw-r--r--arch/arm/common/dmabounce.c18
-rw-r--r--arch/arm/common/sharpsl_param.c2
-rw-r--r--arch/arm/configs/enp2611_defconfig8
-rw-r--r--arch/arm/configs/ixdp2400_defconfig8
-rw-r--r--arch/arm/configs/ixdp2401_defconfig8
-rw-r--r--arch/arm/configs/ixdp2800_defconfig8
-rw-r--r--arch/arm/configs/ixdp2801_defconfig8
-rw-r--r--arch/arm/kernel/Makefile2
-rw-r--r--arch/arm/kernel/arch.c46
-rw-r--r--arch/arm/lib/ashldi3.c47
-rw-r--r--arch/arm/lib/ashrdi3.c48
-rw-r--r--arch/arm/lib/gcclib.h27
-rw-r--r--arch/arm/lib/longlong.h68
-rw-r--r--arch/arm/lib/lshrdi3.c47
-rw-r--r--arch/arm/lib/muldi3.c31
-rw-r--r--arch/arm/lib/ucmpdi2.c30
-rw-r--r--arch/arm/lib/udivdi3.c372
-rw-r--r--arch/arm/mach-aaec2000/Kconfig11
-rw-r--r--arch/arm/mach-aaec2000/Makefile9
-rw-r--r--arch/arm/mach-aaec2000/aaed2000.c48
-rw-r--r--arch/arm/mach-aaec2000/core.c157
-rw-r--r--arch/arm/mach-aaec2000/core.h16
-rw-r--r--arch/arm/mach-integrator/core.c1
-rw-r--r--arch/arm/mach-ixp2000/core.c34
-rw-r--r--arch/arm/mach-versatile/Makefile1
-rw-r--r--arch/arm/mach-versatile/core.c14
-rw-r--r--arch/arm/mach-versatile/pci.c360
-rw-r--r--arch/arm/mm/Kconfig2
-rw-r--r--arch/arm/mm/copypage-v6.c6
-rw-r--r--arch/arm/mm/fault-armv.c31
-rw-r--r--arch/arm/mm/flush.c44
-rw-r--r--arch/arm/mm/ioremap.c47
-rw-r--r--drivers/char/watchdog/ixp2000_wdt.c7
-rw-r--r--include/asm-arm/arch-aaec2000/aaec2000.h151
-rw-r--r--include/asm-arm/arch-aaec2000/debug-macro.S36
-rw-r--r--include/asm-arm/arch-aaec2000/dma.h17
-rw-r--r--include/asm-arm/arch-aaec2000/entry-macro.S33
-rw-r--r--include/asm-arm/arch-aaec2000/hardware.h49
-rw-r--r--include/asm-arm/arch-aaec2000/io.h19
-rw-r--r--include/asm-arm/arch-aaec2000/irqs.h46
-rw-r--r--include/asm-arm/arch-aaec2000/memory.h73
-rw-r--r--include/asm-arm/arch-aaec2000/param.h15
-rw-r--r--include/asm-arm/arch-aaec2000/system.h24
-rw-r--r--include/asm-arm/arch-aaec2000/timex.h18
-rw-r--r--include/asm-arm/arch-aaec2000/uncompress.h47
-rw-r--r--include/asm-arm/arch-aaec2000/vmalloc.h16
-rw-r--r--include/asm-arm/arch-ixp2000/ixp2000-regs.h1
-rw-r--r--include/asm-arm/arch-versatile/hardware.h27
-rw-r--r--include/asm-arm/arch-versatile/io.h2
-rw-r--r--include/asm-arm/arch-versatile/platform.h17
-rw-r--r--include/asm-arm/cacheflush.h3
-rw-r--r--include/asm-arm/io.h27
54 files changed, 1705 insertions, 496 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 475950c8a831..ee8a9ad7bbd9 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -67,10 +67,6 @@ config GENERIC_BUST_SPINLOCK
67config GENERIC_ISA_DMA 67config GENERIC_ISA_DMA
68 bool 68 bool
69 69
70config GENERIC_IOMAP
71 bool
72 default y
73
74config FIQ 70config FIQ
75 bool 71 bool
76 72
@@ -202,6 +198,11 @@ config ARCH_H720X
202 help 198 help
203 This enables support for systems based on the Hynix HMS720x 199 This enables support for systems based on the Hynix HMS720x
204 200
201config ARCH_AAEC2000
202 bool "Agilent AAEC-2000 based"
203 help
204 This enables support for systems based on the Agilent AAEC-2000
205
205endchoice 206endchoice
206 207
207source "arch/arm/mach-clps711x/Kconfig" 208source "arch/arm/mach-clps711x/Kconfig"
@@ -234,6 +235,8 @@ source "arch/arm/mach-h720x/Kconfig"
234 235
235source "arch/arm/mach-versatile/Kconfig" 236source "arch/arm/mach-versatile/Kconfig"
236 237
238source "arch/arm/mach-aaec2000/Kconfig"
239
237# Definitions to make life easier 240# Definitions to make life easier
238config ARCH_ACORN 241config ARCH_ACORN
239 bool 242 bool
@@ -277,7 +280,7 @@ config ISA_DMA_API
277 default y 280 default y
278 281
279config PCI 282config PCI
280 bool "PCI support" if ARCH_INTEGRATOR_AP 283 bool "PCI support" if ARCH_INTEGRATOR_AP || ARCH_VERSATILE_PB
281 help 284 help
282 Find out whether you have a PCI motherboard. PCI is the name of a 285 Find out whether you have a PCI motherboard. PCI is the name of a
283 bus system, i.e. the way the CPU talks to the other stuff inside 286 bus system, i.e. the way the CPU talks to the other stuff inside
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 2277e3d179cc..8330495e2448 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -97,6 +97,7 @@ textaddr-$(CONFIG_ARCH_FORTUNET) := 0xc0008000
97 machine-$(CONFIG_ARCH_VERSATILE) := versatile 97 machine-$(CONFIG_ARCH_VERSATILE) := versatile
98 machine-$(CONFIG_ARCH_IMX) := imx 98 machine-$(CONFIG_ARCH_IMX) := imx
99 machine-$(CONFIG_ARCH_H720X) := h720x 99 machine-$(CONFIG_ARCH_H720X) := h720x
100 machine-$(CONFIG_ARCH_AAEC2000) := aaec2000
100 101
101ifeq ($(CONFIG_ARCH_EBSA110),y) 102ifeq ($(CONFIG_ARCH_EBSA110),y)
102# This is what happens if you forget the IOCS16 line. 103# This is what happens if you forget the IOCS16 line.
diff --git a/arch/arm/common/dmabounce.c b/arch/arm/common/dmabounce.c
index 5797b1b100a1..9d63a01214eb 100644
--- a/arch/arm/common/dmabounce.c
+++ b/arch/arm/common/dmabounce.c
@@ -30,6 +30,8 @@
30#include <linux/dmapool.h> 30#include <linux/dmapool.h>
31#include <linux/list.h> 31#include <linux/list.h>
32 32
33#include <asm/cacheflush.h>
34
33#undef DEBUG 35#undef DEBUG
34 36
35#undef STATS 37#undef STATS
@@ -302,12 +304,24 @@ unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
302 304
303 DO_STATS ( device_info->bounce_count++ ); 305 DO_STATS ( device_info->bounce_count++ );
304 306
305 if ((dir == DMA_FROM_DEVICE) || 307 if (dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL) {
306 (dir == DMA_BIDIRECTIONAL)) { 308 unsigned long ptr;
309
307 dev_dbg(dev, 310 dev_dbg(dev,
308 "%s: copy back safe %p to unsafe %p size %d\n", 311 "%s: copy back safe %p to unsafe %p size %d\n",
309 __func__, buf->safe, buf->ptr, size); 312 __func__, buf->safe, buf->ptr, size);
310 memcpy(buf->ptr, buf->safe, size); 313 memcpy(buf->ptr, buf->safe, size);
314
315 /*
316 * DMA buffers must have the same cache properties
317 * as if they were really used for DMA - which means
318 * data must be written back to RAM. Note that
319 * we don't use dmac_flush_range() here for the
320 * bidirectional case because we know the cache
321 * lines will be coherent with the data written.
322 */
323 ptr = (unsigned long)buf->ptr;
324 dmac_clean_range(ptr, ptr + size);
311 } 325 }
312 free_safe_buffer(device_info, buf); 326 free_safe_buffer(device_info, buf);
313 } 327 }
diff --git a/arch/arm/common/sharpsl_param.c b/arch/arm/common/sharpsl_param.c
index c2c557a224c2..c94864c5b1af 100644
--- a/arch/arm/common/sharpsl_param.c
+++ b/arch/arm/common/sharpsl_param.c
@@ -22,7 +22,7 @@
22 * them early in the boot process, then pass them to the appropriate drivers. 22 * them early in the boot process, then pass them to the appropriate drivers.
23 * Not all devices use all paramaters but the format is common to all. 23 * Not all devices use all paramaters but the format is common to all.
24 */ 24 */
25#ifdef ARCH_SA1100 25#ifdef CONFIG_ARCH_SA1100
26#define PARAM_BASE 0xe8ffc000 26#define PARAM_BASE 0xe8ffc000
27#else 27#else
28#define PARAM_BASE 0xa0000a00 28#define PARAM_BASE 0xa0000a00
diff --git a/arch/arm/configs/enp2611_defconfig b/arch/arm/configs/enp2611_defconfig
index e8f9fccffe84..06fae4b62774 100644
--- a/arch/arm/configs/enp2611_defconfig
+++ b/arch/arm/configs/enp2611_defconfig
@@ -50,7 +50,13 @@ CONFIG_BASE_SMALL=0
50# 50#
51# Loadable module support 51# Loadable module support
52# 52#
53# CONFIG_MODULES is not set 53CONFIG_MODULES=y
54CONFIG_MODULE_UNLOAD=y
55# CONFIG_MODULE_FORCE_UNLOAD is not set
56CONFIG_OBSOLETE_MODPARM=y
57# CONFIG_MODVERSIONS is not set
58# CONFIG_MODULE_SRCVERSION_ALL is not set
59CONFIG_KMOD=y
54 60
55# 61#
56# System Type 62# System Type
diff --git a/arch/arm/configs/ixdp2400_defconfig b/arch/arm/configs/ixdp2400_defconfig
index 4fd663ecbe39..810a450a55d2 100644
--- a/arch/arm/configs/ixdp2400_defconfig
+++ b/arch/arm/configs/ixdp2400_defconfig
@@ -50,7 +50,13 @@ CONFIG_BASE_SMALL=0
50# 50#
51# Loadable module support 51# Loadable module support
52# 52#
53# CONFIG_MODULES is not set 53CONFIG_MODULES=y
54CONFIG_MODULE_UNLOAD=y
55# CONFIG_MODULE_FORCE_UNLOAD is not set
56CONFIG_OBSOLETE_MODPARM=y
57# CONFIG_MODVERSIONS is not set
58# CONFIG_MODULE_SRCVERSION_ALL is not set
59CONFIG_KMOD=y
54 60
55# 61#
56# System Type 62# System Type
diff --git a/arch/arm/configs/ixdp2401_defconfig b/arch/arm/configs/ixdp2401_defconfig
index 6f51c98084a3..72e1b940e975 100644
--- a/arch/arm/configs/ixdp2401_defconfig
+++ b/arch/arm/configs/ixdp2401_defconfig
@@ -50,7 +50,13 @@ CONFIG_BASE_SMALL=0
50# 50#
51# Loadable module support 51# Loadable module support
52# 52#
53# CONFIG_MODULES is not set 53CONFIG_MODULES=y
54CONFIG_MODULE_UNLOAD=y
55# CONFIG_MODULE_FORCE_UNLOAD is not set
56CONFIG_OBSOLETE_MODPARM=y
57# CONFIG_MODVERSIONS is not set
58# CONFIG_MODULE_SRCVERSION_ALL is not set
59CONFIG_KMOD=y
54 60
55# 61#
56# System Type 62# System Type
diff --git a/arch/arm/configs/ixdp2800_defconfig b/arch/arm/configs/ixdp2800_defconfig
index 7be3521f91fc..1592e45f0278 100644
--- a/arch/arm/configs/ixdp2800_defconfig
+++ b/arch/arm/configs/ixdp2800_defconfig
@@ -50,7 +50,13 @@ CONFIG_BASE_SMALL=0
50# 50#
51# Loadable module support 51# Loadable module support
52# 52#
53# CONFIG_MODULES is not set 53CONFIG_MODULES=y
54CONFIG_MODULE_UNLOAD=y
55# CONFIG_MODULE_FORCE_UNLOAD is not set
56CONFIG_OBSOLETE_MODPARM=y
57# CONFIG_MODVERSIONS is not set
58# CONFIG_MODULE_SRCVERSION_ALL is not set
59CONFIG_KMOD=y
54 60
55# 61#
56# System Type 62# System Type
diff --git a/arch/arm/configs/ixdp2801_defconfig b/arch/arm/configs/ixdp2801_defconfig
index cd84a20f30f1..f1afe3d09ec6 100644
--- a/arch/arm/configs/ixdp2801_defconfig
+++ b/arch/arm/configs/ixdp2801_defconfig
@@ -50,7 +50,13 @@ CONFIG_BASE_SMALL=0
50# 50#
51# Loadable module support 51# Loadable module support
52# 52#
53# CONFIG_MODULES is not set 53CONFIG_MODULES=y
54CONFIG_MODULE_UNLOAD=y
55# CONFIG_MODULE_FORCE_UNLOAD is not set
56CONFIG_OBSOLETE_MODPARM=y
57# CONFIG_MODVERSIONS is not set
58# CONFIG_MODULE_SRCVERSION_ALL is not set
59CONFIG_KMOD=y
54 60
55# 61#
56# System Type 62# System Type
diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile
index 4a2af55e134b..3e1b0327e4d7 100644
--- a/arch/arm/kernel/Makefile
+++ b/arch/arm/kernel/Makefile
@@ -6,7 +6,7 @@ AFLAGS_head.o := -DTEXTADDR=$(TEXTADDR) -DDATAADDR=$(DATAADDR)
6 6
7# Object file lists. 7# Object file lists.
8 8
9obj-y := arch.o compat.o dma.o entry-armv.o entry-common.o irq.o \ 9obj-y := compat.o dma.o entry-armv.o entry-common.o irq.o \
10 process.o ptrace.o semaphore.o setup.o signal.o sys_arm.o \ 10 process.o ptrace.o semaphore.o setup.o signal.o sys_arm.o \
11 time.o traps.o 11 time.o traps.o
12 12
diff --git a/arch/arm/kernel/arch.c b/arch/arm/kernel/arch.c
deleted file mode 100644
index 4e02fbeb10a6..000000000000
--- a/arch/arm/kernel/arch.c
+++ /dev/null
@@ -1,46 +0,0 @@
1/*
2 * linux/arch/arm/kernel/arch.c
3 *
4 * Architecture specific fixups.
5 */
6#include <linux/config.h>
7#include <linux/init.h>
8#include <linux/types.h>
9
10#include <asm/elf.h>
11#include <asm/page.h>
12#include <asm/setup.h>
13#include <asm/mach/arch.h>
14
15unsigned int vram_size;
16
17#ifdef CONFIG_ARCH_ACORN
18
19unsigned int memc_ctrl_reg;
20unsigned int number_mfm_drives;
21
22static int __init parse_tag_acorn(const struct tag *tag)
23{
24 memc_ctrl_reg = tag->u.acorn.memc_control_reg;
25 number_mfm_drives = tag->u.acorn.adfsdrives;
26
27 switch (tag->u.acorn.vram_pages) {
28 case 512:
29 vram_size += PAGE_SIZE * 256;
30 case 256:
31 vram_size += PAGE_SIZE * 256;
32 default:
33 break;
34 }
35#if 0
36 if (vram_size) {
37 desc->video_start = 0x02000000;
38 desc->video_end = 0x02000000 + vram_size;
39 }
40#endif
41 return 0;
42}
43
44__tagtable(ATAG_ACORN, parse_tag_acorn);
45
46#endif
diff --git a/arch/arm/lib/ashldi3.c b/arch/arm/lib/ashldi3.c
index 130f5a839669..b62875cfd8f8 100644
--- a/arch/arm/lib/ashldi3.c
+++ b/arch/arm/lib/ashldi3.c
@@ -31,31 +31,26 @@ Boston, MA 02111-1307, USA. */
31 31
32#include "gcclib.h" 32#include "gcclib.h"
33 33
34DItype 34s64 __ashldi3(s64 u, int b)
35__ashldi3 (DItype u, word_type b)
36{ 35{
37 DIunion w; 36 DIunion w;
38 word_type bm; 37 int bm;
39 DIunion uu; 38 DIunion uu;
40 39
41 if (b == 0) 40 if (b == 0)
42 return u; 41 return u;
43 42
44 uu.ll = u; 43 uu.ll = u;
45 44
46 bm = (sizeof (SItype) * BITS_PER_UNIT) - b; 45 bm = (sizeof(s32) * BITS_PER_UNIT) - b;
47 if (bm <= 0) 46 if (bm <= 0) {
48 { 47 w.s.low = 0;
49 w.s.low = 0; 48 w.s.high = (u32) uu.s.low << -bm;
50 w.s.high = (USItype)uu.s.low << -bm; 49 } else {
51 } 50 u32 carries = (u32) uu.s.low >> bm;
52 else 51 w.s.low = (u32) uu.s.low << b;
53 { 52 w.s.high = ((u32) uu.s.high << b) | carries;
54 USItype carries = (USItype)uu.s.low >> bm; 53 }
55 w.s.low = (USItype)uu.s.low << b; 54
56 w.s.high = ((USItype)uu.s.high << b) | carries; 55 return w.ll;
57 }
58
59 return w.ll;
60} 56}
61
diff --git a/arch/arm/lib/ashrdi3.c b/arch/arm/lib/ashrdi3.c
index 71625d218f8d..9a8600a7543f 100644
--- a/arch/arm/lib/ashrdi3.c
+++ b/arch/arm/lib/ashrdi3.c
@@ -31,31 +31,27 @@ Boston, MA 02111-1307, USA. */
31 31
32#include "gcclib.h" 32#include "gcclib.h"
33 33
34DItype 34s64 __ashrdi3(s64 u, int b)
35__ashrdi3 (DItype u, word_type b)
36{ 35{
37 DIunion w; 36 DIunion w;
38 word_type bm; 37 int bm;
39 DIunion uu; 38 DIunion uu;
40 39
41 if (b == 0) 40 if (b == 0)
42 return u; 41 return u;
43 42
44 uu.ll = u; 43 uu.ll = u;
45 44
46 bm = (sizeof (SItype) * BITS_PER_UNIT) - b; 45 bm = (sizeof(s32) * BITS_PER_UNIT) - b;
47 if (bm <= 0) 46 if (bm <= 0) {
48 { 47 /* w.s.high = 1..1 or 0..0 */
49 /* w.s.high = 1..1 or 0..0 */ 48 w.s.high = uu.s.high >> (sizeof(s32) * BITS_PER_UNIT - 1);
50 w.s.high = uu.s.high >> (sizeof (SItype) * BITS_PER_UNIT - 1); 49 w.s.low = uu.s.high >> -bm;
51 w.s.low = uu.s.high >> -bm; 50 } else {
52 } 51 u32 carries = (u32) uu.s.high << bm;
53 else 52 w.s.high = uu.s.high >> b;
54 { 53 w.s.low = ((u32) uu.s.low >> b) | carries;
55 USItype carries = (USItype)uu.s.high << bm; 54 }
56 w.s.high = uu.s.high >> b; 55
57 w.s.low = ((USItype)uu.s.low >> b) | carries; 56 return w.ll;
58 }
59
60 return w.ll;
61} 57}
diff --git a/arch/arm/lib/gcclib.h b/arch/arm/lib/gcclib.h
index 65314a3d9e27..8b6dcc656de7 100644
--- a/arch/arm/lib/gcclib.h
+++ b/arch/arm/lib/gcclib.h
@@ -1,25 +1,22 @@
1/* gcclib.h -- definitions for various functions 'borrowed' from gcc-2.95.3 */ 1/* gcclib.h -- definitions for various functions 'borrowed' from gcc-2.95.3 */
2/* I Molton 29/07/01 */ 2/* I Molton 29/07/01 */
3 3
4#define BITS_PER_UNIT 8 4#include <linux/types.h>
5#define SI_TYPE_SIZE (sizeof (SItype) * BITS_PER_UNIT)
6 5
7typedef unsigned int UQItype __attribute__ ((mode (QI))); 6#define BITS_PER_UNIT 8
8typedef int SItype __attribute__ ((mode (SI))); 7#define SI_TYPE_SIZE (sizeof(s32) * BITS_PER_UNIT)
9typedef unsigned int USItype __attribute__ ((mode (SI)));
10typedef int DItype __attribute__ ((mode (DI)));
11typedef int word_type __attribute__ ((mode (__word__)));
12typedef unsigned int UDItype __attribute__ ((mode (DI)));
13 8
14#ifdef __ARMEB__ 9#ifdef __ARMEB__
15 struct DIstruct {SItype high, low;}; 10struct DIstruct {
11 s32 high, low;
12};
16#else 13#else
17 struct DIstruct {SItype low, high;}; 14struct DIstruct {
15 s32 low, high;
16};
18#endif 17#endif
19 18
20typedef union 19typedef union {
21{ 20 struct DIstruct s;
22 struct DIstruct s; 21 s64 ll;
23 DItype ll;
24} DIunion; 22} DIunion;
25
diff --git a/arch/arm/lib/longlong.h b/arch/arm/lib/longlong.h
index 179eea4edc35..90ae647e4d76 100644
--- a/arch/arm/lib/longlong.h
+++ b/arch/arm/lib/longlong.h
@@ -26,18 +26,18 @@
26 26
27#define __BITS4 (SI_TYPE_SIZE / 4) 27#define __BITS4 (SI_TYPE_SIZE / 4)
28#define __ll_B (1L << (SI_TYPE_SIZE / 2)) 28#define __ll_B (1L << (SI_TYPE_SIZE / 2))
29#define __ll_lowpart(t) ((USItype) (t) % __ll_B) 29#define __ll_lowpart(t) ((u32) (t) % __ll_B)
30#define __ll_highpart(t) ((USItype) (t) / __ll_B) 30#define __ll_highpart(t) ((u32) (t) / __ll_B)
31 31
32/* Define auxiliary asm macros. 32/* Define auxiliary asm macros.
33 33
34 1) umul_ppmm(high_prod, low_prod, multipler, multiplicand) 34 1) umul_ppmm(high_prod, low_prod, multipler, multiplicand)
35 multiplies two USItype integers MULTIPLER and MULTIPLICAND, 35 multiplies two u32 integers MULTIPLER and MULTIPLICAND,
36 and generates a two-part USItype product in HIGH_PROD and 36 and generates a two-part u32 product in HIGH_PROD and
37 LOW_PROD. 37 LOW_PROD.
38 38
39 2) __umulsidi3(a,b) multiplies two USItype integers A and B, 39 2) __umulsidi3(a,b) multiplies two u32 integers A and B,
40 and returns a UDItype product. This is just a variant of umul_ppmm. 40 and returns a u64 product. This is just a variant of umul_ppmm.
41 41
42 3) udiv_qrnnd(quotient, remainder, high_numerator, low_numerator, 42 3) udiv_qrnnd(quotient, remainder, high_numerator, low_numerator,
43 denominator) divides a two-word unsigned integer, composed by the 43 denominator) divides a two-word unsigned integer, composed by the
@@ -77,23 +77,23 @@
77#define add_ssaaaa(sh, sl, ah, al, bh, bl) \ 77#define add_ssaaaa(sh, sl, ah, al, bh, bl) \
78 __asm__ ("adds %1, %4, %5 \n\ 78 __asm__ ("adds %1, %4, %5 \n\
79 adc %0, %2, %3" \ 79 adc %0, %2, %3" \
80 : "=r" ((USItype) (sh)), \ 80 : "=r" ((u32) (sh)), \
81 "=&r" ((USItype) (sl)) \ 81 "=&r" ((u32) (sl)) \
82 : "%r" ((USItype) (ah)), \ 82 : "%r" ((u32) (ah)), \
83 "rI" ((USItype) (bh)), \ 83 "rI" ((u32) (bh)), \
84 "%r" ((USItype) (al)), \ 84 "%r" ((u32) (al)), \
85 "rI" ((USItype) (bl))) 85 "rI" ((u32) (bl)))
86#define sub_ddmmss(sh, sl, ah, al, bh, bl) \ 86#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
87 __asm__ ("subs %1, %4, %5 \n\ 87 __asm__ ("subs %1, %4, %5 \n\
88 sbc %0, %2, %3" \ 88 sbc %0, %2, %3" \
89 : "=r" ((USItype) (sh)), \ 89 : "=r" ((u32) (sh)), \
90 "=&r" ((USItype) (sl)) \ 90 "=&r" ((u32) (sl)) \
91 : "r" ((USItype) (ah)), \ 91 : "r" ((u32) (ah)), \
92 "rI" ((USItype) (bh)), \ 92 "rI" ((u32) (bh)), \
93 "r" ((USItype) (al)), \ 93 "r" ((u32) (al)), \
94 "rI" ((USItype) (bl))) 94 "rI" ((u32) (bl)))
95#define umul_ppmm(xh, xl, a, b) \ 95#define umul_ppmm(xh, xl, a, b) \
96{register USItype __t0, __t1, __t2; \ 96{register u32 __t0, __t1, __t2; \
97 __asm__ ("%@ Inlined umul_ppmm \n\ 97 __asm__ ("%@ Inlined umul_ppmm \n\
98 mov %2, %5, lsr #16 \n\ 98 mov %2, %5, lsr #16 \n\
99 mov %0, %6, lsr #16 \n\ 99 mov %0, %6, lsr #16 \n\
@@ -107,14 +107,14 @@
107 addcs %0, %0, #65536 \n\ 107 addcs %0, %0, #65536 \n\
108 adds %1, %1, %3, lsl #16 \n\ 108 adds %1, %1, %3, lsl #16 \n\
109 adc %0, %0, %3, lsr #16" \ 109 adc %0, %0, %3, lsr #16" \
110 : "=&r" ((USItype) (xh)), \ 110 : "=&r" ((u32) (xh)), \
111 "=r" ((USItype) (xl)), \ 111 "=r" ((u32) (xl)), \
112 "=&r" (__t0), "=&r" (__t1), "=r" (__t2) \ 112 "=&r" (__t0), "=&r" (__t1), "=r" (__t2) \
113 : "r" ((USItype) (a)), \ 113 : "r" ((u32) (a)), \
114 "r" ((USItype) (b)));} 114 "r" ((u32) (b)));}
115#define UMUL_TIME 20 115#define UMUL_TIME 20
116#define UDIV_TIME 100 116#define UDIV_TIME 100
117#endif /* __arm__ */ 117#endif /* __arm__ */
118 118
119#define __umulsidi3(u, v) \ 119#define __umulsidi3(u, v) \
120 ({DIunion __w; \ 120 ({DIunion __w; \
@@ -123,14 +123,14 @@
123 123
124#define __udiv_qrnnd_c(q, r, n1, n0, d) \ 124#define __udiv_qrnnd_c(q, r, n1, n0, d) \
125 do { \ 125 do { \
126 USItype __d1, __d0, __q1, __q0; \ 126 u32 __d1, __d0, __q1, __q0; \
127 USItype __r1, __r0, __m; \ 127 u32 __r1, __r0, __m; \
128 __d1 = __ll_highpart (d); \ 128 __d1 = __ll_highpart (d); \
129 __d0 = __ll_lowpart (d); \ 129 __d0 = __ll_lowpart (d); \
130 \ 130 \
131 __r1 = (n1) % __d1; \ 131 __r1 = (n1) % __d1; \
132 __q1 = (n1) / __d1; \ 132 __q1 = (n1) / __d1; \
133 __m = (USItype) __q1 * __d0; \ 133 __m = (u32) __q1 * __d0; \
134 __r1 = __r1 * __ll_B | __ll_highpart (n0); \ 134 __r1 = __r1 * __ll_B | __ll_highpart (n0); \
135 if (__r1 < __m) \ 135 if (__r1 < __m) \
136 { \ 136 { \
@@ -143,7 +143,7 @@
143 \ 143 \
144 __r0 = __r1 % __d1; \ 144 __r0 = __r1 % __d1; \
145 __q0 = __r1 / __d1; \ 145 __q0 = __r1 / __d1; \
146 __m = (USItype) __q0 * __d0; \ 146 __m = (u32) __q0 * __d0; \
147 __r0 = __r0 * __ll_B | __ll_lowpart (n0); \ 147 __r0 = __r0 * __ll_B | __ll_lowpart (n0); \
148 if (__r0 < __m) \ 148 if (__r0 < __m) \
149 { \ 149 { \
@@ -154,7 +154,7 @@
154 } \ 154 } \
155 __r0 -= __m; \ 155 __r0 -= __m; \
156 \ 156 \
157 (q) = (USItype) __q1 * __ll_B | __q0; \ 157 (q) = (u32) __q1 * __ll_B | __q0; \
158 (r) = __r0; \ 158 (r) = __r0; \
159 } while (0) 159 } while (0)
160 160
@@ -163,14 +163,14 @@
163 163
164#define count_leading_zeros(count, x) \ 164#define count_leading_zeros(count, x) \
165 do { \ 165 do { \
166 USItype __xr = (x); \ 166 u32 __xr = (x); \
167 USItype __a; \ 167 u32 __a; \
168 \ 168 \
169 if (SI_TYPE_SIZE <= 32) \ 169 if (SI_TYPE_SIZE <= 32) \
170 { \ 170 { \
171 __a = __xr < ((USItype)1<<2*__BITS4) \ 171 __a = __xr < ((u32)1<<2*__BITS4) \
172 ? (__xr < ((USItype)1<<__BITS4) ? 0 : __BITS4) \ 172 ? (__xr < ((u32)1<<__BITS4) ? 0 : __BITS4) \
173 : (__xr < ((USItype)1<<3*__BITS4) ? 2*__BITS4 : 3*__BITS4); \ 173 : (__xr < ((u32)1<<3*__BITS4) ? 2*__BITS4 : 3*__BITS4); \
174 } \ 174 } \
175 else \ 175 else \
176 { \ 176 { \
diff --git a/arch/arm/lib/lshrdi3.c b/arch/arm/lib/lshrdi3.c
index b666f1bad451..3681f49d2b6e 100644
--- a/arch/arm/lib/lshrdi3.c
+++ b/arch/arm/lib/lshrdi3.c
@@ -31,31 +31,26 @@ Boston, MA 02111-1307, USA. */
31 31
32#include "gcclib.h" 32#include "gcclib.h"
33 33
34DItype 34s64 __lshrdi3(s64 u, int b)
35__lshrdi3 (DItype u, word_type b)
36{ 35{
37 DIunion w; 36 DIunion w;
38 word_type bm; 37 int bm;
39 DIunion uu; 38 DIunion uu;
40 39
41 if (b == 0) 40 if (b == 0)
42 return u; 41 return u;
43 42
44 uu.ll = u; 43 uu.ll = u;
45 44
46 bm = (sizeof (SItype) * BITS_PER_UNIT) - b; 45 bm = (sizeof(s32) * BITS_PER_UNIT) - b;
47 if (bm <= 0) 46 if (bm <= 0) {
48 { 47 w.s.high = 0;
49 w.s.high = 0; 48 w.s.low = (u32) uu.s.high >> -bm;
50 w.s.low = (USItype)uu.s.high >> -bm; 49 } else {
51 } 50 u32 carries = (u32) uu.s.high << bm;
52 else 51 w.s.high = (u32) uu.s.high >> b;
53 { 52 w.s.low = ((u32) uu.s.low >> b) | carries;
54 USItype carries = (USItype)uu.s.high << bm; 53 }
55 w.s.high = (USItype)uu.s.high >> b; 54
56 w.s.low = ((USItype)uu.s.low >> b) | carries; 55 return w.ll;
57 }
58
59 return w.ll;
60} 56}
61
diff --git a/arch/arm/lib/muldi3.c b/arch/arm/lib/muldi3.c
index 44d611b1cfdb..0a3b93313f18 100644
--- a/arch/arm/lib/muldi3.c
+++ b/arch/arm/lib/muldi3.c
@@ -32,7 +32,7 @@ Boston, MA 02111-1307, USA. */
32#include "gcclib.h" 32#include "gcclib.h"
33 33
34#define umul_ppmm(xh, xl, a, b) \ 34#define umul_ppmm(xh, xl, a, b) \
35{register USItype __t0, __t1, __t2; \ 35{register u32 __t0, __t1, __t2; \
36 __asm__ ("%@ Inlined umul_ppmm \n\ 36 __asm__ ("%@ Inlined umul_ppmm \n\
37 mov %2, %5, lsr #16 \n\ 37 mov %2, %5, lsr #16 \n\
38 mov %0, %6, lsr #16 \n\ 38 mov %0, %6, lsr #16 \n\
@@ -46,32 +46,27 @@ Boston, MA 02111-1307, USA. */
46 addcs %0, %0, #65536 \n\ 46 addcs %0, %0, #65536 \n\
47 adds %1, %1, %3, lsl #16 \n\ 47 adds %1, %1, %3, lsl #16 \n\
48 adc %0, %0, %3, lsr #16" \ 48 adc %0, %0, %3, lsr #16" \
49 : "=&r" ((USItype) (xh)), \ 49 : "=&r" ((u32) (xh)), \
50 "=r" ((USItype) (xl)), \ 50 "=r" ((u32) (xl)), \
51 "=&r" (__t0), "=&r" (__t1), "=r" (__t2) \ 51 "=&r" (__t0), "=&r" (__t1), "=r" (__t2) \
52 : "r" ((USItype) (a)), \ 52 : "r" ((u32) (a)), \
53 "r" ((USItype) (b)));} 53 "r" ((u32) (b)));}
54
55 54
56#define __umulsidi3(u, v) \ 55#define __umulsidi3(u, v) \
57 ({DIunion __w; \ 56 ({DIunion __w; \
58 umul_ppmm (__w.s.high, __w.s.low, u, v); \ 57 umul_ppmm (__w.s.high, __w.s.low, u, v); \
59 __w.ll; }) 58 __w.ll; })
60 59
61 60s64 __muldi3(s64 u, s64 v)
62DItype
63__muldi3 (DItype u, DItype v)
64{ 61{
65 DIunion w; 62 DIunion w;
66 DIunion uu, vv; 63 DIunion uu, vv;
67 64
68 uu.ll = u, 65 uu.ll = u, vv.ll = v;
69 vv.ll = v;
70 66
71 w.ll = __umulsidi3 (uu.s.low, vv.s.low); 67 w.ll = __umulsidi3(uu.s.low, vv.s.low);
72 w.s.high += ((USItype) uu.s.low * (USItype) vv.s.high 68 w.s.high += ((u32) uu.s.low * (u32) vv.s.high
73 + (USItype) uu.s.high * (USItype) vv.s.low); 69 + (u32) uu.s.high * (u32) vv.s.low);
74 70
75 return w.ll; 71 return w.ll;
76} 72}
77
diff --git a/arch/arm/lib/ucmpdi2.c b/arch/arm/lib/ucmpdi2.c
index 6c6ae63efa02..57f3f2df3850 100644
--- a/arch/arm/lib/ucmpdi2.c
+++ b/arch/arm/lib/ucmpdi2.c
@@ -31,21 +31,19 @@ Boston, MA 02111-1307, USA. */
31 31
32#include "gcclib.h" 32#include "gcclib.h"
33 33
34word_type 34int __ucmpdi2(s64 a, s64 b)
35__ucmpdi2 (DItype a, DItype b)
36{ 35{
37 DIunion au, bu; 36 DIunion au, bu;
38 37
39 au.ll = a, bu.ll = b; 38 au.ll = a, bu.ll = b;
40 39
41 if ((USItype) au.s.high < (USItype) bu.s.high) 40 if ((u32) au.s.high < (u32) bu.s.high)
42 return 0; 41 return 0;
43 else if ((USItype) au.s.high > (USItype) bu.s.high) 42 else if ((u32) au.s.high > (u32) bu.s.high)
44 return 2; 43 return 2;
45 if ((USItype) au.s.low < (USItype) bu.s.low) 44 if ((u32) au.s.low < (u32) bu.s.low)
46 return 0; 45 return 0;
47 else if ((USItype) au.s.low > (USItype) bu.s.low) 46 else if ((u32) au.s.low > (u32) bu.s.low)
48 return 2; 47 return 2;
49 return 1; 48 return 1;
50} 49}
51
diff --git a/arch/arm/lib/udivdi3.c b/arch/arm/lib/udivdi3.c
index d25195f673f4..e343be4c6642 100644
--- a/arch/arm/lib/udivdi3.c
+++ b/arch/arm/lib/udivdi3.c
@@ -32,211 +32,191 @@ Boston, MA 02111-1307, USA. */
32#include "gcclib.h" 32#include "gcclib.h"
33#include "longlong.h" 33#include "longlong.h"
34 34
35static const UQItype __clz_tab[] = 35static const u8 __clz_tab[] = {
36{ 36 0, 1, 2, 2, 3, 3, 3, 3, 4, 4, 4, 4, 4, 4, 4, 4, 5, 5, 5, 5, 5, 5, 5, 5,
37 0,1,2,2,3,3,3,3,4,4,4,4,4,4,4,4,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5,5, 37 5, 5, 5, 5, 5, 5, 5, 5,
38 6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6, 38 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6,
39 7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7, 39 6, 6, 6, 6, 6, 6, 6, 6,
40 7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7, 40 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
41 8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8, 41 7, 7, 7, 7, 7, 7, 7, 7,
42 8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8, 42 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
43 8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8, 43 7, 7, 7, 7, 7, 7, 7, 7,
44 8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8, 44 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
45 8, 8, 8, 8, 8, 8, 8, 8,
46 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
47 8, 8, 8, 8, 8, 8, 8, 8,
48 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
49 8, 8, 8, 8, 8, 8, 8, 8,
50 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
51 8, 8, 8, 8, 8, 8, 8, 8,
45}; 52};
46 53
47UDItype 54u64 __udivmoddi4(u64 n, u64 d, u64 * rp)
48__udivmoddi4 (UDItype n, UDItype d, UDItype *rp)
49{ 55{
50 DIunion ww; 56 DIunion ww;
51 DIunion nn, dd; 57 DIunion nn, dd;
52 DIunion rr; 58 DIunion rr;
53 USItype d0, d1, n0, n1, n2; 59 u32 d0, d1, n0, n1, n2;
54 USItype q0, q1; 60 u32 q0, q1;
55 USItype b, bm; 61 u32 b, bm;
56 62
57 nn.ll = n; 63 nn.ll = n;
58 dd.ll = d; 64 dd.ll = d;
59 65
60 d0 = dd.s.low; 66 d0 = dd.s.low;
61 d1 = dd.s.high; 67 d1 = dd.s.high;
62 n0 = nn.s.low; 68 n0 = nn.s.low;
63 n1 = nn.s.high; 69 n1 = nn.s.high;
64 70
65 if (d1 == 0) 71 if (d1 == 0) {
66 { 72 if (d0 > n1) {
67 if (d0 > n1) 73 /* 0q = nn / 0D */
68 { 74
69 /* 0q = nn / 0D */ 75 count_leading_zeros(bm, d0);
70 76
71 count_leading_zeros (bm, d0); 77 if (bm != 0) {
72 78 /* Normalize, i.e. make the most significant bit of the
73 if (bm != 0) 79 denominator set. */
74 { 80
75 /* Normalize, i.e. make the most significant bit of the 81 d0 = d0 << bm;
76 denominator set. */ 82 n1 = (n1 << bm) | (n0 >> (SI_TYPE_SIZE - bm));
77 83 n0 = n0 << bm;
78 d0 = d0 << bm; 84 }
79 n1 = (n1 << bm) | (n0 >> (SI_TYPE_SIZE - bm)); 85
80 n0 = n0 << bm; 86 udiv_qrnnd(q0, n0, n1, n0, d0);
81 } 87 q1 = 0;
82 88
83 udiv_qrnnd (q0, n0, n1, n0, d0); 89 /* Remainder in n0 >> bm. */
84 q1 = 0; 90 } else {
85 91 /* qq = NN / 0d */
86 /* Remainder in n0 >> bm. */ 92
87 } 93 if (d0 == 0)
88 else 94 d0 = 1 / d0; /* Divide intentionally by zero. */
89 { 95
90 /* qq = NN / 0d */ 96 count_leading_zeros(bm, d0);
91 97
92 if (d0 == 0) 98 if (bm == 0) {
93 d0 = 1 / d0; /* Divide intentionally by zero. */ 99 /* From (n1 >= d0) /\ (the most significant bit of d0 is set),
94 100 conclude (the most significant bit of n1 is set) /\ (the
95 count_leading_zeros (bm, d0); 101 leading quotient digit q1 = 1).
96 102
97 if (bm == 0) 103 This special case is necessary, not an optimization.
98 { 104 (Shifts counts of SI_TYPE_SIZE are undefined.) */
99 /* From (n1 >= d0) /\ (the most significant bit of d0 is set), 105
100 conclude (the most significant bit of n1 is set) /\ (the 106 n1 -= d0;
101 leading quotient digit q1 = 1). 107 q1 = 1;
102 108 } else {
103 This special case is necessary, not an optimization. 109 /* Normalize. */
104 (Shifts counts of SI_TYPE_SIZE are undefined.) */ 110
105 111 b = SI_TYPE_SIZE - bm;
106 n1 -= d0; 112
107 q1 = 1; 113 d0 = d0 << bm;
108 } 114 n2 = n1 >> b;
109 else 115 n1 = (n1 << bm) | (n0 >> b);
110 { 116 n0 = n0 << bm;
111 /* Normalize. */ 117
112 118 udiv_qrnnd(q1, n1, n2, n1, d0);
113 b = SI_TYPE_SIZE - bm; 119 }
114 120
115 d0 = d0 << bm; 121 /* n1 != d0... */
116 n2 = n1 >> b; 122
117 n1 = (n1 << bm) | (n0 >> b); 123 udiv_qrnnd(q0, n0, n1, n0, d0);
118 n0 = n0 << bm; 124
119 125 /* Remainder in n0 >> bm. */
120 udiv_qrnnd (q1, n1, n2, n1, d0); 126 }
121 } 127
122 128 if (rp != 0) {
123 /* n1 != d0... */ 129 rr.s.low = n0 >> bm;
124 130 rr.s.high = 0;
125 udiv_qrnnd (q0, n0, n1, n0, d0); 131 *rp = rr.ll;
126 132 }
127 /* Remainder in n0 >> bm. */ 133 } else {
128 } 134 if (d1 > n1) {
129 135 /* 00 = nn / DD */
130 if (rp != 0) 136
131 { 137 q0 = 0;
132 rr.s.low = n0 >> bm; 138 q1 = 0;
133 rr.s.high = 0; 139
134 *rp = rr.ll; 140 /* Remainder in n1n0. */
135 } 141 if (rp != 0) {
136 } 142 rr.s.low = n0;
137 else 143 rr.s.high = n1;
138 { 144 *rp = rr.ll;
139 if (d1 > n1) 145 }
140 { 146 } else {
141 /* 00 = nn / DD */ 147 /* 0q = NN / dd */
142 148
143 q0 = 0; 149 count_leading_zeros(bm, d1);
144 q1 = 0; 150 if (bm == 0) {
145 151 /* From (n1 >= d1) /\ (the most significant bit of d1 is set),
146 /* Remainder in n1n0. */ 152 conclude (the most significant bit of n1 is set) /\ (the
147 if (rp != 0) 153 quotient digit q0 = 0 or 1).
148 { 154
149 rr.s.low = n0; 155 This special case is necessary, not an optimization. */
150 rr.s.high = n1; 156
151 *rp = rr.ll; 157 /* The condition on the next line takes advantage of that
152 } 158 n1 >= d1 (true due to program flow). */
153 } 159 if (n1 > d1 || n0 >= d0) {
154 else 160 q0 = 1;
155 { 161 sub_ddmmss(n1, n0, n1, n0, d1, d0);
156 /* 0q = NN / dd */ 162 } else
157 163 q0 = 0;
158 count_leading_zeros (bm, d1); 164
159 if (bm == 0) 165 q1 = 0;
160 { 166
161 /* From (n1 >= d1) /\ (the most significant bit of d1 is set), 167 if (rp != 0) {
162 conclude (the most significant bit of n1 is set) /\ (the 168 rr.s.low = n0;
163 quotient digit q0 = 0 or 1). 169 rr.s.high = n1;
164 170 *rp = rr.ll;
165 This special case is necessary, not an optimization. */ 171 }
166 172 } else {
167 /* The condition on the next line takes advantage of that 173 u32 m1, m0;
168 n1 >= d1 (true due to program flow). */ 174 /* Normalize. */
169 if (n1 > d1 || n0 >= d0) 175
170 { 176 b = SI_TYPE_SIZE - bm;
171 q0 = 1; 177
172 sub_ddmmss (n1, n0, n1, n0, d1, d0); 178 d1 = (d1 << bm) | (d0 >> b);
173 } 179 d0 = d0 << bm;
174 else 180 n2 = n1 >> b;
175 q0 = 0; 181 n1 = (n1 << bm) | (n0 >> b);
176 182 n0 = n0 << bm;
177 q1 = 0; 183
178 184 udiv_qrnnd(q0, n1, n2, n1, d1);
179 if (rp != 0) 185 umul_ppmm(m1, m0, q0, d0);
180 { 186
181 rr.s.low = n0; 187 if (m1 > n1 || (m1 == n1 && m0 > n0)) {
182 rr.s.high = n1; 188 q0--;
183 *rp = rr.ll; 189 sub_ddmmss(m1, m0, m1, m0, d1, d0);
184 } 190 }
185 } 191
186 else 192 q1 = 0;
187 { 193
188 USItype m1, m0; 194 /* Remainder in (n1n0 - m1m0) >> bm. */
189 /* Normalize. */ 195 if (rp != 0) {
190 196 sub_ddmmss(n1, n0, n1, n0, m1, m0);
191 b = SI_TYPE_SIZE - bm; 197 rr.s.low = (n1 << b) | (n0 >> bm);
192 198 rr.s.high = n1 >> bm;
193 d1 = (d1 << bm) | (d0 >> b); 199 *rp = rr.ll;
194 d0 = d0 << bm; 200 }
195 n2 = n1 >> b; 201 }
196 n1 = (n1 << bm) | (n0 >> b); 202 }
197 n0 = n0 << bm; 203 }
198 204
199 udiv_qrnnd (q0, n1, n2, n1, d1); 205 ww.s.low = q0;
200 umul_ppmm (m1, m0, q0, d0); 206 ww.s.high = q1;
201 207 return ww.ll;
202 if (m1 > n1 || (m1 == n1 && m0 > n0))
203 {
204 q0--;
205 sub_ddmmss (m1, m0, m1, m0, d1, d0);
206 }
207
208 q1 = 0;
209
210 /* Remainder in (n1n0 - m1m0) >> bm. */
211 if (rp != 0)
212 {
213 sub_ddmmss (n1, n0, n1, n0, m1, m0);
214 rr.s.low = (n1 << b) | (n0 >> bm);
215 rr.s.high = n1 >> bm;
216 *rp = rr.ll;
217 }
218 }
219 }
220 }
221
222 ww.s.low = q0;
223 ww.s.high = q1;
224 return ww.ll;
225} 208}
226 209
227UDItype 210u64 __udivdi3(u64 n, u64 d)
228__udivdi3 (UDItype n, UDItype d)
229{ 211{
230 return __udivmoddi4 (n, d, (UDItype *) 0); 212 return __udivmoddi4(n, d, (u64 *) 0);
231} 213}
232 214
233UDItype 215u64 __umoddi3(u64 u, u64 v)
234__umoddi3 (UDItype u, UDItype v)
235{ 216{
236 UDItype w; 217 u64 w;
237 218
238 (void) __udivmoddi4 (u ,v, &w); 219 (void)__udivmoddi4(u, v, &w);
239 220
240 return w; 221 return w;
241} 222}
242
diff --git a/arch/arm/mach-aaec2000/Kconfig b/arch/arm/mach-aaec2000/Kconfig
new file mode 100644
index 000000000000..5e4bef93754c
--- /dev/null
+++ b/arch/arm/mach-aaec2000/Kconfig
@@ -0,0 +1,11 @@
1if ARCH_AAEC2000
2
3menu "Agilent AAEC-2000 Implementations"
4
5config MACH_AAED2000
6 bool "Agilent AAED-2000 Development Platform"
7 select CPU_ARM920T
8
9endmenu
10
11endif
diff --git a/arch/arm/mach-aaec2000/Makefile b/arch/arm/mach-aaec2000/Makefile
new file mode 100644
index 000000000000..20ec83896c37
--- /dev/null
+++ b/arch/arm/mach-aaec2000/Makefile
@@ -0,0 +1,9 @@
1#
2# Makefile for the linux kernel.
3#
4
5# Common support (must be linked before board specific support)
6obj-y += core.o
7
8# Specific board support
9obj-$(CONFIG_MACH_AAED2000) += aaed2000.o
diff --git a/arch/arm/mach-aaec2000/aaed2000.c b/arch/arm/mach-aaec2000/aaed2000.c
new file mode 100644
index 000000000000..5417ca3f4621
--- /dev/null
+++ b/arch/arm/mach-aaec2000/aaed2000.c
@@ -0,0 +1,48 @@
1/*
2 * linux/arch/arm/mach-aaec2000/aaed2000.c
3 *
4 * Support for the Agilent AAED-2000 Development Platform.
5 *
6 * Copyright (c) 2005 Nicolas Bellido Y Ortega
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 */
13#include <linux/module.h>
14#include <linux/kernel.h>
15#include <linux/init.h>
16#include <linux/device.h>
17#include <linux/major.h>
18#include <linux/interrupt.h>
19
20#include <asm/setup.h>
21#include <asm/memory.h>
22#include <asm/mach-types.h>
23#include <asm/hardware.h>
24#include <asm/irq.h>
25
26#include <asm/mach/arch.h>
27#include <asm/mach/map.h>
28#include <asm/mach/irq.h>
29
30#include "core.h"
31
32static void __init aaed2000_init_irq(void)
33{
34 aaec2000_init_irq();
35}
36
37static void __init aaed2000_map_io(void)
38{
39 aaec2000_map_io();
40}
41
42MACHINE_START(AAED2000, "Agilent AAED-2000 Development Platform")
43 MAINTAINER("Nicolas Bellido Y Ortega")
44 BOOT_MEM(0xf0000000, PIO_BASE, VIO_BASE)
45 MAPIO(aaed2000_map_io)
46 INITIRQ(aaed2000_init_irq)
47 .timer = &aaec2000_timer,
48MACHINE_END
diff --git a/arch/arm/mach-aaec2000/core.c b/arch/arm/mach-aaec2000/core.c
new file mode 100644
index 000000000000..fc145b3768fa
--- /dev/null
+++ b/arch/arm/mach-aaec2000/core.c
@@ -0,0 +1,157 @@
1/*
2 * linux/arch/arm/mach-aaec2000/core.c
3 *
4 * Code common to all AAEC-2000 machines
5 *
6 * Copyright (c) 2005 Nicolas Bellido Y Ortega
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12#include <linux/config.h>
13#include <linux/module.h>
14#include <linux/kernel.h>
15#include <linux/init.h>
16#include <linux/list.h>
17#include <linux/errno.h>
18#include <linux/interrupt.h>
19#include <linux/timex.h>
20#include <linux/signal.h>
21
22#include <asm/hardware.h>
23#include <asm/irq.h>
24
25#include <asm/mach/irq.h>
26#include <asm/mach/time.h>
27#include <asm/mach/map.h>
28
29/*
30 * Common I/O mapping:
31 *
32 * Static virtual address mappings are as follow:
33 *
34 * 0xf8000000-0xf8001ffff: Devices connected to APB bus
35 * 0xf8002000-0xf8003ffff: Devices connected to AHB bus
36 *
37 * Below 0xe8000000 is reserved for vm allocation.
38 *
39 * The machine specific code must provide the extra mapping beside the
40 * default mapping provided here.
41 */
42static struct map_desc standard_io_desc[] __initdata = {
43 /* virtual physical length type */
44 { VIO_APB_BASE, PIO_APB_BASE, IO_APB_LENGTH, MT_DEVICE },
45 { VIO_AHB_BASE, PIO_AHB_BASE, IO_AHB_LENGTH, MT_DEVICE }
46};
47
48void __init aaec2000_map_io(void)
49{
50 iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc));
51}
52
53/*
54 * Interrupt handling routines
55 */
56static void aaec2000_int_ack(unsigned int irq)
57{
58 IRQ_INTSR = 1 << irq;
59}
60
61static void aaec2000_int_mask(unsigned int irq)
62{
63 IRQ_INTENC |= (1 << irq);
64}
65
66static void aaec2000_int_unmask(unsigned int irq)
67{
68 IRQ_INTENS |= (1 << irq);
69}
70
71static struct irqchip aaec2000_irq_chip = {
72 .ack = aaec2000_int_ack,
73 .mask = aaec2000_int_mask,
74 .unmask = aaec2000_int_unmask,
75};
76
77void __init aaec2000_init_irq(void)
78{
79 unsigned int i;
80
81 for (i = 0; i < NR_IRQS; i++) {
82 set_irq_handler(i, do_level_IRQ);
83 set_irq_chip(i, &aaec2000_irq_chip);
84 set_irq_flags(i, IRQF_VALID);
85 }
86
87 /* Disable all interrupts */
88 IRQ_INTENC = 0xffffffff;
89
90 /* Clear any pending interrupts */
91 IRQ_INTSR = IRQ_INTSR;
92}
93
94/*
95 * Time keeping
96 */
97/* IRQs are disabled before entering here from do_gettimeofday() */
98static unsigned long aaec2000_gettimeoffset(void)
99{
100 unsigned long ticks_to_match, elapsed, usec;
101
102 /* Get ticks before next timer match */
103 ticks_to_match = TIMER1_LOAD - TIMER1_VAL;
104
105 /* We need elapsed ticks since last match */
106 elapsed = LATCH - ticks_to_match;
107
108 /* Now, convert them to usec */
109 usec = (unsigned long)(elapsed * (tick_nsec / 1000))/LATCH;
110
111 return usec;
112}
113
114/* We enter here with IRQs enabled */
115static irqreturn_t
116aaec2000_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
117{
118 /* TODO: Check timer accuracy */
119 write_seqlock(&xtime_lock);
120
121 timer_tick(regs);
122 TIMER1_CLEAR = 1;
123
124 write_sequnlock(&xtime_lock);
125
126 return IRQ_HANDLED;
127}
128
129static struct irqaction aaec2000_timer_irq = {
130 .name = "AAEC-2000 Timer Tick",
131 .flags = SA_INTERRUPT,
132 .handler = aaec2000_timer_interrupt
133};
134
135static void __init aaec2000_timer_init(void)
136{
137 /* Disable timer 1 */
138 TIMER1_CTRL = 0;
139
140 /* We have somehow to generate a 100Hz clock.
141 * We then use the 508KHz timer in periodic mode.
142 */
143 TIMER1_LOAD = LATCH;
144 TIMER1_CLEAR = 1; /* Clear interrupt */
145
146 setup_irq(INT_TMR1_OFL, &aaec2000_timer_irq);
147
148 TIMER1_CTRL = TIMER_CTRL_ENABLE |
149 TIMER_CTRL_PERIODIC |
150 TIMER_CTRL_CLKSEL_508K;
151}
152
153struct sys_timer aaec2000_timer = {
154 .init = aaec2000_timer_init,
155 .offset = aaec2000_gettimeoffset,
156};
157
diff --git a/arch/arm/mach-aaec2000/core.h b/arch/arm/mach-aaec2000/core.h
new file mode 100644
index 000000000000..91893d848c16
--- /dev/null
+++ b/arch/arm/mach-aaec2000/core.h
@@ -0,0 +1,16 @@
1/*
2 * linux/arch/arm/mach-aaec2000/core.h
3 *
4 * Copyright (c) 2005 Nicolas Bellido Y Ortega
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11
12struct sys_timer;
13
14extern struct sys_timer aaec2000_timer;
15extern void __init aaec2000_map_io(void);
16extern void __init aaec2000_init_irq(void);
diff --git a/arch/arm/mach-integrator/core.c b/arch/arm/mach-integrator/core.c
index d302f0405fd2..bd1e5e3c9d34 100644
--- a/arch/arm/mach-integrator/core.c
+++ b/arch/arm/mach-integrator/core.c
@@ -227,7 +227,6 @@ integrator_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
227 * primary CPU 227 * primary CPU
228 */ 228 */
229 if (hard_smp_processor_id() == 0) { 229 if (hard_smp_processor_id() == 0) {
230 nmi_tick();
231 timer_tick(regs); 230 timer_tick(regs);
232#ifdef CONFIG_SMP 231#ifdef CONFIG_SMP
233 smp_send_timer(); 232 smp_send_timer();
diff --git a/arch/arm/mach-ixp2000/core.c b/arch/arm/mach-ixp2000/core.c
index 4f3c3d5c781c..fc0555596d6d 100644
--- a/arch/arm/mach-ixp2000/core.c
+++ b/arch/arm/mach-ixp2000/core.c
@@ -162,12 +162,13 @@ void __init ixp2000_map_io(void)
162static unsigned ticks_per_jiffy; 162static unsigned ticks_per_jiffy;
163static unsigned ticks_per_usec; 163static unsigned ticks_per_usec;
164static unsigned next_jiffy_time; 164static unsigned next_jiffy_time;
165static volatile unsigned long *missing_jiffy_timer_csr;
165 166
166unsigned long ixp2000_gettimeoffset (void) 167unsigned long ixp2000_gettimeoffset (void)
167{ 168{
168 unsigned long offset; 169 unsigned long offset;
169 170
170 offset = next_jiffy_time - *IXP2000_T4_CSR; 171 offset = next_jiffy_time - *missing_jiffy_timer_csr;
171 172
172 return offset / ticks_per_usec; 173 return offset / ticks_per_usec;
173} 174}
@@ -179,7 +180,7 @@ static int ixp2000_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
179 /* clear timer 1 */ 180 /* clear timer 1 */
180 ixp2000_reg_write(IXP2000_T1_CLR, 1); 181 ixp2000_reg_write(IXP2000_T1_CLR, 1);
181 182
182 while ((next_jiffy_time - *IXP2000_T4_CSR) > ticks_per_jiffy) { 183 while ((next_jiffy_time - *missing_jiffy_timer_csr) > ticks_per_jiffy) {
183 timer_tick(regs); 184 timer_tick(regs);
184 next_jiffy_time -= ticks_per_jiffy; 185 next_jiffy_time -= ticks_per_jiffy;
185 } 186 }
@@ -197,20 +198,37 @@ static struct irqaction ixp2000_timer_irq = {
197 198
198void __init ixp2000_init_time(unsigned long tick_rate) 199void __init ixp2000_init_time(unsigned long tick_rate)
199{ 200{
200 ixp2000_reg_write(IXP2000_T1_CLR, 0);
201 ixp2000_reg_write(IXP2000_T4_CLR, 0);
202
203 ticks_per_jiffy = (tick_rate + HZ/2) / HZ; 201 ticks_per_jiffy = (tick_rate + HZ/2) / HZ;
204 ticks_per_usec = tick_rate / 1000000; 202 ticks_per_usec = tick_rate / 1000000;
205 203
204 /*
205 * We use timer 1 as our timer interrupt.
206 */
207 ixp2000_reg_write(IXP2000_T1_CLR, 0);
206 ixp2000_reg_write(IXP2000_T1_CLD, ticks_per_jiffy - 1); 208 ixp2000_reg_write(IXP2000_T1_CLD, ticks_per_jiffy - 1);
207 ixp2000_reg_write(IXP2000_T1_CTL, (1 << 7)); 209 ixp2000_reg_write(IXP2000_T1_CTL, (1 << 7));
208 210
209 /* 211 /*
210 * We use T4 as a monotonic counter to track missed jiffies 212 * We use a second timer as a monotonic counter for tracking
213 * missed jiffies. The IXP2000 has four timers, but if we're
214 * on an A-step IXP2800, timer 2 and 3 don't work, so on those
215 * chips we use timer 4. Timer 4 is the only timer that can
216 * be used for the watchdog, so we use timer 2 if we're on a
217 * non-buggy chip.
211 */ 218 */
212 ixp2000_reg_write(IXP2000_T4_CLD, -1); 219 if ((*IXP2000_PRODUCT_ID & 0x001ffef0) == 0x00000000) {
213 ixp2000_reg_write(IXP2000_T4_CTL, (1 << 7)); 220 printk(KERN_INFO "Enabling IXP2800 erratum #25 workaround\n");
221
222 ixp2000_reg_write(IXP2000_T4_CLR, 0);
223 ixp2000_reg_write(IXP2000_T4_CLD, -1);
224 ixp2000_reg_write(IXP2000_T4_CTL, (1 << 7));
225 missing_jiffy_timer_csr = IXP2000_T4_CSR;
226 } else {
227 ixp2000_reg_write(IXP2000_T2_CLR, 0);
228 ixp2000_reg_write(IXP2000_T2_CLD, -1);
229 ixp2000_reg_write(IXP2000_T2_CTL, (1 << 7));
230 missing_jiffy_timer_csr = IXP2000_T2_CSR;
231 }
214 next_jiffy_time = 0xffffffff; 232 next_jiffy_time = 0xffffffff;
215 233
216 /* register for interrupt */ 234 /* register for interrupt */
diff --git a/arch/arm/mach-versatile/Makefile b/arch/arm/mach-versatile/Makefile
index 5d608837757a..ba81e70ed813 100644
--- a/arch/arm/mach-versatile/Makefile
+++ b/arch/arm/mach-versatile/Makefile
@@ -5,3 +5,4 @@
5obj-y := core.o clock.o 5obj-y := core.o clock.o
6obj-$(CONFIG_ARCH_VERSATILE_PB) += versatile_pb.o 6obj-$(CONFIG_ARCH_VERSATILE_PB) += versatile_pb.o
7obj-$(CONFIG_MACH_VERSATILE_AB) += versatile_ab.o 7obj-$(CONFIG_MACH_VERSATILE_AB) += versatile_ab.o
8obj-$(CONFIG_PCI) += pci.o
diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c
index 302c2a7b9b63..6a7cbea5e098 100644
--- a/arch/arm/mach-versatile/core.c
+++ b/arch/arm/mach-versatile/core.c
@@ -196,11 +196,15 @@ static struct map_desc versatile_io_desc[] __initdata = {
196#ifdef CONFIG_DEBUG_LL 196#ifdef CONFIG_DEBUG_LL
197 { IO_ADDRESS(VERSATILE_UART0_BASE), VERSATILE_UART0_BASE, SZ_4K, MT_DEVICE }, 197 { IO_ADDRESS(VERSATILE_UART0_BASE), VERSATILE_UART0_BASE, SZ_4K, MT_DEVICE },
198#endif 198#endif
199#ifdef FIXME 199#ifdef CONFIG_PCI
200 { PCI_MEMORY_VADDR, PHYS_PCI_MEM_BASE, SZ_16M, MT_DEVICE }, 200 { IO_ADDRESS(VERSATILE_PCI_CORE_BASE), VERSATILE_PCI_CORE_BASE, SZ_4K, MT_DEVICE },
201 { PCI_CONFIG_VADDR, PHYS_PCI_CONFIG_BASE, SZ_16M, MT_DEVICE }, 201 { VERSATILE_PCI_VIRT_BASE, VERSATILE_PCI_BASE, VERSATILE_PCI_BASE_SIZE, MT_DEVICE },
202 { PCI_V3_VADDR, PHYS_PCI_V3_BASE, SZ_512K, MT_DEVICE }, 202 { VERSATILE_PCI_CFG_VIRT_BASE, VERSATILE_PCI_CFG_BASE, VERSATILE_PCI_CFG_BASE_SIZE, MT_DEVICE },
203 { PCI_IO_VADDR, PHYS_PCI_IO_BASE, SZ_64K, MT_DEVICE }, 203#if 0
204 { VERSATILE_PCI_VIRT_MEM_BASE0, VERSATILE_PCI_MEM_BASE0, SZ_16M, MT_DEVICE },
205 { VERSATILE_PCI_VIRT_MEM_BASE1, VERSATILE_PCI_MEM_BASE1, SZ_16M, MT_DEVICE },
206 { VERSATILE_PCI_VIRT_MEM_BASE2, VERSATILE_PCI_MEM_BASE2, SZ_16M, MT_DEVICE },
207#endif
204#endif 208#endif
205}; 209};
206 210
diff --git a/arch/arm/mach-versatile/pci.c b/arch/arm/mach-versatile/pci.c
new file mode 100644
index 000000000000..d1565e851f0e
--- /dev/null
+++ b/arch/arm/mach-versatile/pci.c
@@ -0,0 +1,360 @@
1/*
2 * linux/arch/arm/mach-versatile/pci.c
3 *
4 * (C) Copyright Koninklijke Philips Electronics NV 2004. All rights reserved.
5 * You can redistribute and/or modify this software under the terms of version 2
6 * of the GNU General Public License as published by the Free Software Foundation.
7 * THIS SOFTWARE IS PROVIDED "AS IS" WITHOUT ANY WARRANTY; WITHOUT EVEN THE IMPLIED
8 * WARRANTY OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. See the GNU
9 * General Public License for more details.
10 * Koninklijke Philips Electronics nor its subsidiaries is obligated to provide any support for this software.
11 *
12 * ARM Versatile PCI driver.
13 *
14 * 14/04/2005 Initial version, colin.king@philips.com
15 *
16 */
17#include <linux/config.h>
18#include <linux/kernel.h>
19#include <linux/pci.h>
20#include <linux/ptrace.h>
21#include <linux/slab.h>
22#include <linux/ioport.h>
23#include <linux/interrupt.h>
24#include <linux/spinlock.h>
25#include <linux/init.h>
26
27#include <asm/hardware.h>
28#include <asm/io.h>
29#include <asm/irq.h>
30#include <asm/system.h>
31#include <asm/mach/pci.h>
32#include <asm/mach-types.h>
33
34/*
35 * these spaces are mapped using the following base registers:
36 *
37 * Usage Local Bus Memory Base/Map registers used
38 *
39 * Mem 50000000 - 5FFFFFFF LB_BASE0/LB_MAP0, non prefetch
40 * Mem 60000000 - 6FFFFFFF LB_BASE1/LB_MAP1, prefetch
41 * IO 44000000 - 4FFFFFFF LB_BASE2/LB_MAP2, IO
42 * Cfg 42000000 - 42FFFFFF PCI config
43 *
44 */
45#define SYS_PCICTL IO_ADDRESS(VERSATILE_SYS_PCICTL)
46#define PCI_IMAP0 IO_ADDRESS(VERSATILE_PCI_CORE_BASE+0x0)
47#define PCI_IMAP1 IO_ADDRESS(VERSATILE_PCI_CORE_BASE+0x4)
48#define PCI_IMAP2 IO_ADDRESS(VERSATILE_PCI_CORE_BASE+0x8)
49#define PCI_SMAP0 IO_ADDRESS(VERSATILE_PCI_CORE_BASE+0x10)
50#define PCI_SMAP1 IO_ADDRESS(VERSATILE_PCI_CORE_BASE+0x14)
51#define PCI_SMAP2 IO_ADDRESS(VERSATILE_PCI_CORE_BASE+0x18)
52#define PCI_SELFID IO_ADDRESS(VERSATILE_PCI_CORE_BASE+0xc)
53
54#define DEVICE_ID_OFFSET 0x00
55#define CSR_OFFSET 0x04
56#define CLASS_ID_OFFSET 0x08
57
58#define VP_PCI_DEVICE_ID 0x030010ee
59#define VP_PCI_CLASS_ID 0x0b400000
60
61static unsigned long pci_slot_ignore = 0;
62
63static int __init versatile_pci_slot_ignore(char *str)
64{
65 int retval;
66 int slot;
67
68 while ((retval = get_option(&str,&slot))) {
69 if ((slot < 0) || (slot > 31)) {
70 printk("Illegal slot value: %d\n",slot);
71 } else {
72 pci_slot_ignore |= (1 << slot);
73 }
74 }
75 return 1;
76}
77
78__setup("pci_slot_ignore=", versatile_pci_slot_ignore);
79
80
81static unsigned long __pci_addr(struct pci_bus *bus,
82 unsigned int devfn, int offset)
83{
84 unsigned int busnr = bus->number;
85
86 /*
87 * Trap out illegal values
88 */
89 if (offset > 255)
90 BUG();
91 if (busnr > 255)
92 BUG();
93 if (devfn > 255)
94 BUG();
95
96 return (VERSATILE_PCI_CFG_VIRT_BASE | (busnr << 16) |
97 (PCI_SLOT(devfn) << 11) | (PCI_FUNC(devfn) << 8) | offset);
98}
99
100static int versatile_read_config(struct pci_bus *bus, unsigned int devfn, int where,
101 int size, u32 *val)
102{
103 unsigned long addr = __pci_addr(bus, devfn, where);
104 u32 v;
105 int slot = PCI_SLOT(devfn);
106
107 if (pci_slot_ignore & (1 << slot)) {
108 /* Ignore this slot */
109 switch (size) {
110 case 1:
111 v = 0xff;
112 break;
113 case 2:
114 v = 0xffff;
115 break;
116 default:
117 v = 0xffffffff;
118 }
119 } else {
120 switch (size) {
121 case 1:
122 addr &= ~3;
123 v = __raw_readb(addr);
124 break;
125
126 case 2:
127 v = __raw_readl(addr & ~3);
128 if (addr & 2) v >>= 16;
129 v &= 0xffff;
130 break;
131
132 default:
133 addr &= ~3;
134 v = __raw_readl(addr);
135 break;
136 }
137 }
138
139 *val = v;
140 return PCIBIOS_SUCCESSFUL;
141}
142
143static int versatile_write_config(struct pci_bus *bus, unsigned int devfn, int where,
144 int size, u32 val)
145{
146 unsigned long addr = __pci_addr(bus, devfn, where);
147 int slot = PCI_SLOT(devfn);
148
149 if (pci_slot_ignore & (1 << slot)) {
150 return PCIBIOS_SUCCESSFUL;
151 }
152
153 switch (size) {
154 case 1:
155 __raw_writeb((u8)val, addr);
156 break;
157
158 case 2:
159 __raw_writew((u16)val, addr);
160 break;
161
162 case 4:
163 __raw_writel(val, addr);
164 break;
165 }
166
167 return PCIBIOS_SUCCESSFUL;
168}
169
170static struct pci_ops pci_versatile_ops = {
171 .read = versatile_read_config,
172 .write = versatile_write_config,
173};
174
175static struct resource io_mem = {
176 .name = "PCI I/O space",
177 .start = VERSATILE_PCI_MEM_BASE0,
178 .end = VERSATILE_PCI_MEM_BASE0+VERSATILE_PCI_MEM_BASE0_SIZE-1,
179 .flags = IORESOURCE_IO,
180};
181
182static struct resource non_mem = {
183 .name = "PCI non-prefetchable",
184 .start = VERSATILE_PCI_MEM_BASE1,
185 .end = VERSATILE_PCI_MEM_BASE1+VERSATILE_PCI_MEM_BASE1_SIZE-1,
186 .flags = IORESOURCE_MEM,
187};
188
189static struct resource pre_mem = {
190 .name = "PCI prefetchable",
191 .start = VERSATILE_PCI_MEM_BASE2,
192 .end = VERSATILE_PCI_MEM_BASE2+VERSATILE_PCI_MEM_BASE2_SIZE-1,
193 .flags = IORESOURCE_MEM | IORESOURCE_PREFETCH,
194};
195
196static int __init pci_versatile_setup_resources(struct resource **resource)
197{
198 int ret = 0;
199
200 ret = request_resource(&iomem_resource, &io_mem);
201 if (ret) {
202 printk(KERN_ERR "PCI: unable to allocate I/O "
203 "memory region (%d)\n", ret);
204 goto out;
205 }
206 ret = request_resource(&iomem_resource, &non_mem);
207 if (ret) {
208 printk(KERN_ERR "PCI: unable to allocate non-prefetchable "
209 "memory region (%d)\n", ret);
210 goto release_io_mem;
211 }
212 ret = request_resource(&iomem_resource, &pre_mem);
213 if (ret) {
214 printk(KERN_ERR "PCI: unable to allocate prefetchable "
215 "memory region (%d)\n", ret);
216 goto release_non_mem;
217 }
218
219 /*
220 * bus->resource[0] is the IO resource for this bus
221 * bus->resource[1] is the mem resource for this bus
222 * bus->resource[2] is the prefetch mem resource for this bus
223 */
224 resource[0] = &io_mem;
225 resource[1] = &non_mem;
226 resource[2] = &pre_mem;
227
228 goto out;
229
230 release_non_mem:
231 release_resource(&non_mem);
232 release_io_mem:
233 release_resource(&io_mem);
234 out:
235 return ret;
236}
237
238int __init pci_versatile_setup(int nr, struct pci_sys_data *sys)
239{
240 int ret = 0;
241 int i;
242 int myslot = -1;
243 unsigned long val;
244
245 if (nr == 0) {
246 sys->mem_offset = 0;
247 ret = pci_versatile_setup_resources(sys->resource);
248 if (ret < 0) {
249 printk("pci_versatile_setup: resources... oops?\n");
250 goto out;
251 }
252 } else {
253 printk("pci_versatile_setup: resources... nr == 0??\n");
254 goto out;
255 }
256
257 __raw_writel(VERSATILE_PCI_MEM_BASE0 >> 28,PCI_IMAP0);
258 __raw_writel(VERSATILE_PCI_MEM_BASE1 >> 28,PCI_IMAP1);
259 __raw_writel(VERSATILE_PCI_MEM_BASE2 >> 28,PCI_IMAP2);
260
261 __raw_writel(1, SYS_PCICTL);
262
263 val = __raw_readl(SYS_PCICTL);
264 if (!(val & 1)) {
265 printk("Not plugged into PCI backplane!\n");
266 ret = -EIO;
267 goto out;
268 }
269
270 /*
271 * We need to discover the PCI core first to configure itself
272 * before the main PCI probing is performed
273 */
274 for (i=0; i<32; i++) {
275 if ((__raw_readl(VERSATILE_PCI_VIRT_BASE+(i<<11)+DEVICE_ID_OFFSET) == VP_PCI_DEVICE_ID) &&
276 (__raw_readl(VERSATILE_PCI_VIRT_BASE+(i<<11)+CLASS_ID_OFFSET) == VP_PCI_CLASS_ID)) {
277 myslot = i;
278
279 __raw_writel(myslot, PCI_SELFID);
280 val = __raw_readl(VERSATILE_PCI_CFG_VIRT_BASE+(myslot<<11)+CSR_OFFSET);
281 val |= (1<<2);
282 __raw_writel(val, VERSATILE_PCI_CFG_VIRT_BASE+(myslot<<11)+CSR_OFFSET);
283 break;
284 }
285 }
286
287 if (myslot == -1) {
288 printk("Cannot find PCI core!\n");
289 ret = -EIO;
290 } else {
291 printk("PCI core found (slot %d)\n",myslot);
292 /* Do not to map Versatile FPGA PCI device
293 into memory space as we are short of
294 mappable memory */
295 pci_slot_ignore |= (1 << myslot);
296 ret = 1;
297 }
298
299 out:
300 return ret;
301}
302
303
304struct pci_bus *pci_versatile_scan_bus(int nr, struct pci_sys_data *sys)
305{
306 return pci_scan_bus(sys->busnr, &pci_versatile_ops, sys);
307}
308
309/*
310 * V3_LB_BASE? - local bus address
311 * V3_LB_MAP? - pci bus address
312 */
313void __init pci_versatile_preinit(void)
314{
315}
316
317void __init pci_versatile_postinit(void)
318{
319}
320
321
322/*
323 * map the specified device/slot/pin to an IRQ. Different backplanes may need to modify this.
324 */
325static int __init versatile_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
326{
327 int irq;
328 int devslot = PCI_SLOT(dev->devfn);
329
330 /* slot, pin, irq
331 24 1 27
332 25 1 28 untested
333 26 1 29
334 27 1 30 untested
335 */
336
337 irq = 27 + ((slot + pin + 2) % 3); /* Fudged */
338
339 printk("map irq: slot %d, pin %d, devslot %d, irq: %d\n",slot,pin,devslot,irq);
340
341 return irq;
342}
343
344static struct hw_pci versatile_pci __initdata = {
345 .swizzle = NULL,
346 .map_irq = versatile_map_irq,
347 .nr_controllers = 1,
348 .setup = pci_versatile_setup,
349 .scan = pci_versatile_scan_bus,
350 .preinit = pci_versatile_preinit,
351 .postinit = pci_versatile_postinit,
352};
353
354static int __init versatile_pci_init(void)
355{
356 pci_common_init(&versatile_pci);
357 return 0;
358}
359
360subsys_initcall(versatile_pci_init);
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index 3fefb43c67f7..95606b4a3ba6 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -62,7 +62,7 @@ config CPU_ARM720T
62# ARM920T 62# ARM920T
63config CPU_ARM920T 63config CPU_ARM920T
64 bool "Support ARM920T processor" if !ARCH_S3C2410 64 bool "Support ARM920T processor" if !ARCH_S3C2410
65 depends on ARCH_INTEGRATOR || ARCH_S3C2410 || ARCH_IMX 65 depends on ARCH_INTEGRATOR || ARCH_S3C2410 || ARCH_IMX || ARCH_AAEC2000
66 default y if ARCH_S3C2410 66 default y if ARCH_S3C2410
67 select CPU_32v4 67 select CPU_32v4
68 select CPU_ABRT_EV4T 68 select CPU_ABRT_EV4T
diff --git a/arch/arm/mm/copypage-v6.c b/arch/arm/mm/copypage-v6.c
index a8c00236bd3d..27d041574ea7 100644
--- a/arch/arm/mm/copypage-v6.c
+++ b/arch/arm/mm/copypage-v6.c
@@ -30,8 +30,6 @@
30 30
31static DEFINE_SPINLOCK(v6_lock); 31static DEFINE_SPINLOCK(v6_lock);
32 32
33#define DCACHE_COLOUR(vaddr) ((vaddr & (SHMLBA - 1)) >> PAGE_SHIFT)
34
35/* 33/*
36 * Copy the user page. No aliasing to deal with so we can just 34 * Copy the user page. No aliasing to deal with so we can just
37 * attack the kernel's existing mapping of these pages. 35 * attack the kernel's existing mapping of these pages.
@@ -55,7 +53,7 @@ void v6_clear_user_page_nonaliasing(void *kaddr, unsigned long vaddr)
55 */ 53 */
56void v6_copy_user_page_aliasing(void *kto, const void *kfrom, unsigned long vaddr) 54void v6_copy_user_page_aliasing(void *kto, const void *kfrom, unsigned long vaddr)
57{ 55{
58 unsigned int offset = DCACHE_COLOUR(vaddr); 56 unsigned int offset = CACHE_COLOUR(vaddr);
59 unsigned long from, to; 57 unsigned long from, to;
60 58
61 /* 59 /*
@@ -95,7 +93,7 @@ void v6_copy_user_page_aliasing(void *kto, const void *kfrom, unsigned long vadd
95 */ 93 */
96void v6_clear_user_page_aliasing(void *kaddr, unsigned long vaddr) 94void v6_clear_user_page_aliasing(void *kaddr, unsigned long vaddr)
97{ 95{
98 unsigned int offset = DCACHE_COLOUR(vaddr); 96 unsigned int offset = CACHE_COLOUR(vaddr);
99 unsigned long to = to_address + (offset << PAGE_SHIFT); 97 unsigned long to = to_address + (offset << PAGE_SHIFT);
100 98
101 /* 99 /*
diff --git a/arch/arm/mm/fault-armv.c b/arch/arm/mm/fault-armv.c
index 01967ddeef53..be4ab3d73c91 100644
--- a/arch/arm/mm/fault-armv.c
+++ b/arch/arm/mm/fault-armv.c
@@ -77,9 +77,8 @@ no_pmd:
77} 77}
78 78
79static void 79static void
80make_coherent(struct vm_area_struct *vma, unsigned long addr, struct page *page, int dirty) 80make_coherent(struct address_space *mapping, struct vm_area_struct *vma, unsigned long addr, unsigned long pfn)
81{ 81{
82 struct address_space *mapping = page_mapping(page);
83 struct mm_struct *mm = vma->vm_mm; 82 struct mm_struct *mm = vma->vm_mm;
84 struct vm_area_struct *mpnt; 83 struct vm_area_struct *mpnt;
85 struct prio_tree_iter iter; 84 struct prio_tree_iter iter;
@@ -87,9 +86,6 @@ make_coherent(struct vm_area_struct *vma, unsigned long addr, struct page *page,
87 pgoff_t pgoff; 86 pgoff_t pgoff;
88 int aliases = 0; 87 int aliases = 0;
89 88
90 if (!mapping)
91 return;
92
93 pgoff = vma->vm_pgoff + ((addr - vma->vm_start) >> PAGE_SHIFT); 89 pgoff = vma->vm_pgoff + ((addr - vma->vm_start) >> PAGE_SHIFT);
94 90
95 /* 91 /*
@@ -115,9 +111,11 @@ make_coherent(struct vm_area_struct *vma, unsigned long addr, struct page *page,
115 if (aliases) 111 if (aliases)
116 adjust_pte(vma, addr); 112 adjust_pte(vma, addr);
117 else 113 else
118 flush_cache_page(vma, addr, page_to_pfn(page)); 114 flush_cache_page(vma, addr, pfn);
119} 115}
120 116
117void __flush_dcache_page(struct address_space *mapping, struct page *page);
118
121/* 119/*
122 * Take care of architecture specific things when placing a new PTE into 120 * Take care of architecture specific things when placing a new PTE into
123 * a page table, or changing an existing PTE. Basically, there are two 121 * a page table, or changing an existing PTE. Basically, there are two
@@ -134,29 +132,22 @@ make_coherent(struct vm_area_struct *vma, unsigned long addr, struct page *page,
134void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr, pte_t pte) 132void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr, pte_t pte)
135{ 133{
136 unsigned long pfn = pte_pfn(pte); 134 unsigned long pfn = pte_pfn(pte);
135 struct address_space *mapping;
137 struct page *page; 136 struct page *page;
138 137
139 if (!pfn_valid(pfn)) 138 if (!pfn_valid(pfn))
140 return; 139 return;
140
141 page = pfn_to_page(pfn); 141 page = pfn_to_page(pfn);
142 if (page_mapping(page)) { 142 mapping = page_mapping(page);
143 if (mapping) {
143 int dirty = test_and_clear_bit(PG_dcache_dirty, &page->flags); 144 int dirty = test_and_clear_bit(PG_dcache_dirty, &page->flags);
144 145
145 if (dirty) { 146 if (dirty)
146 /* 147 __flush_dcache_page(mapping, page);
147 * This is our first userspace mapping of this page.
148 * Ensure that the physical page is coherent with
149 * the kernel mapping.
150 *
151 * FIXME: only need to do this on VIVT and aliasing
152 * VIPT cache architectures. We can do that
153 * by choosing whether to set this bit...
154 */
155 __cpuc_flush_dcache_page(page_address(page));
156 }
157 148
158 if (cache_is_vivt()) 149 if (cache_is_vivt())
159 make_coherent(vma, addr, page, dirty); 150 make_coherent(mapping, vma, addr, pfn);
160 } 151 }
161} 152}
162 153
diff --git a/arch/arm/mm/flush.c b/arch/arm/mm/flush.c
index 4085ed983e46..191788fb18d1 100644
--- a/arch/arm/mm/flush.c
+++ b/arch/arm/mm/flush.c
@@ -37,13 +37,8 @@ static void flush_pfn_alias(unsigned long pfn, unsigned long vaddr)
37#define flush_pfn_alias(pfn,vaddr) do { } while (0) 37#define flush_pfn_alias(pfn,vaddr) do { } while (0)
38#endif 38#endif
39 39
40static void __flush_dcache_page(struct address_space *mapping, struct page *page) 40void __flush_dcache_page(struct address_space *mapping, struct page *page)
41{ 41{
42 struct mm_struct *mm = current->active_mm;
43 struct vm_area_struct *mpnt;
44 struct prio_tree_iter iter;
45 pgoff_t pgoff;
46
47 /* 42 /*
48 * Writeback any data associated with the kernel mapping of this 43 * Writeback any data associated with the kernel mapping of this
49 * page. This ensures that data in the physical page is mutually 44 * page. This ensures that data in the physical page is mutually
@@ -52,24 +47,21 @@ static void __flush_dcache_page(struct address_space *mapping, struct page *page
52 __cpuc_flush_dcache_page(page_address(page)); 47 __cpuc_flush_dcache_page(page_address(page));
53 48
54 /* 49 /*
55 * If there's no mapping pointer here, then this page isn't 50 * If this is a page cache page, and we have an aliasing VIPT cache,
56 * visible to userspace yet, so there are no cache lines 51 * we only need to do one flush - which would be at the relevant
57 * associated with any other aliases.
58 */
59 if (!mapping)
60 return;
61
62 /*
63 * This is a page cache page. If we have a VIPT cache, we
64 * only need to do one flush - which would be at the relevant
65 * userspace colour, which is congruent with page->index. 52 * userspace colour, which is congruent with page->index.
66 */ 53 */
67 if (cache_is_vipt()) { 54 if (mapping && cache_is_vipt_aliasing())
68 if (cache_is_vipt_aliasing()) 55 flush_pfn_alias(page_to_pfn(page),
69 flush_pfn_alias(page_to_pfn(page), 56 page->index << PAGE_CACHE_SHIFT);
70 page->index << PAGE_CACHE_SHIFT); 57}
71 return; 58
72 } 59static void __flush_dcache_aliases(struct address_space *mapping, struct page *page)
60{
61 struct mm_struct *mm = current->active_mm;
62 struct vm_area_struct *mpnt;
63 struct prio_tree_iter iter;
64 pgoff_t pgoff;
73 65
74 /* 66 /*
75 * There are possible user space mappings of this page: 67 * There are possible user space mappings of this page:
@@ -116,12 +108,12 @@ void flush_dcache_page(struct page *page)
116{ 108{
117 struct address_space *mapping = page_mapping(page); 109 struct address_space *mapping = page_mapping(page);
118 110
119 if (cache_is_vipt_nonaliasing())
120 return;
121
122 if (mapping && !mapping_mapped(mapping)) 111 if (mapping && !mapping_mapped(mapping))
123 set_bit(PG_dcache_dirty, &page->flags); 112 set_bit(PG_dcache_dirty, &page->flags);
124 else 113 else {
125 __flush_dcache_page(mapping, page); 114 __flush_dcache_page(mapping, page);
115 if (mapping && cache_is_vivt())
116 __flush_dcache_aliases(mapping, page);
117 }
126} 118}
127EXPORT_SYMBOL(flush_dcache_page); 119EXPORT_SYMBOL(flush_dcache_page);
diff --git a/arch/arm/mm/ioremap.c b/arch/arm/mm/ioremap.c
index 00bb8fd37a59..7110e54182b1 100644
--- a/arch/arm/mm/ioremap.c
+++ b/arch/arm/mm/ioremap.c
@@ -170,3 +170,50 @@ void __iounmap(void __iomem *addr)
170 vfree((void *) (PAGE_MASK & (unsigned long) addr)); 170 vfree((void *) (PAGE_MASK & (unsigned long) addr));
171} 171}
172EXPORT_SYMBOL(__iounmap); 172EXPORT_SYMBOL(__iounmap);
173
174#ifdef __io
175void __iomem *ioport_map(unsigned long port, unsigned int nr)
176{
177 return __io(port);
178}
179EXPORT_SYMBOL(ioport_map);
180
181void ioport_unmap(void __iomem *addr)
182{
183}
184EXPORT_SYMBOL(ioport_unmap);
185#endif
186
187#ifdef CONFIG_PCI
188#include <linux/pci.h>
189#include <linux/ioport.h>
190
191void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen)
192{
193 unsigned long start = pci_resource_start(dev, bar);
194 unsigned long len = pci_resource_len(dev, bar);
195 unsigned long flags = pci_resource_flags(dev, bar);
196
197 if (!len || !start)
198 return NULL;
199 if (maxlen && len > maxlen)
200 len = maxlen;
201 if (flags & IORESOURCE_IO)
202 return ioport_map(start, len);
203 if (flags & IORESOURCE_MEM) {
204 if (flags & IORESOURCE_CACHEABLE)
205 return ioremap(start, len);
206 return ioremap_nocache(start, len);
207 }
208 return NULL;
209}
210EXPORT_SYMBOL(pci_iomap);
211
212void pci_iounmap(struct pci_dev *dev, void __iomem *addr)
213{
214 if ((unsigned long)addr >= VMALLOC_START &&
215 (unsigned long)addr < VMALLOC_END)
216 iounmap(addr);
217}
218EXPORT_SYMBOL(pci_iounmap);
219#endif
diff --git a/drivers/char/watchdog/ixp2000_wdt.c b/drivers/char/watchdog/ixp2000_wdt.c
index ab659d37b4d2..4e98c215e5b1 100644
--- a/drivers/char/watchdog/ixp2000_wdt.c
+++ b/drivers/char/watchdog/ixp2000_wdt.c
@@ -192,7 +192,12 @@ static struct miscdevice ixp2000_wdt_miscdev =
192 192
193static int __init ixp2000_wdt_init(void) 193static int __init ixp2000_wdt_init(void)
194{ 194{
195 wdt_tick_rate = (*IXP2000_T1_CLD * HZ)/ 256;; 195 if ((*IXP2000_PRODUCT_ID & 0x001ffef0) == 0x00000000) {
196 printk(KERN_INFO "Unable to use IXP2000 watchdog due to IXP2800 erratum #25.\n");
197 return -EIO;
198 }
199
200 wdt_tick_rate = (*IXP2000_T1_CLD * HZ) / 256;
196 201
197 return misc_register(&ixp2000_wdt_miscdev); 202 return misc_register(&ixp2000_wdt_miscdev);
198} 203}
diff --git a/include/asm-arm/arch-aaec2000/aaec2000.h b/include/asm-arm/arch-aaec2000/aaec2000.h
new file mode 100644
index 000000000000..0e9b7e18af05
--- /dev/null
+++ b/include/asm-arm/arch-aaec2000/aaec2000.h
@@ -0,0 +1,151 @@
1/*
2 * linux/include/asm-arm/arch-aaec2000/aaec2000.h
3 *
4 * AAEC-2000 registers definition
5 *
6 * Copyright (c) 2005 Nicolas Bellido Y Ortega
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#ifndef __ASM_ARCH_AAEC2000_H
14#define __ASM_ARCH_AAEC2000_H
15
16#ifndef __ASM_ARCH_HARDWARE_H
17#error You must include hardware.h not this file
18#endif /* __ASM_ARCH_HARDWARE_H */
19
20/* Interrupt controller */
21#define IRQ_BASE __REG(0x80000500)
22#define IRQ_INTSR __REG(0x80000500) /* Int Status Register */
23#define IRQ_INTRSR __REG(0x80000504) /* Int Raw (unmasked) Status */
24#define IRQ_INTENS __REG(0x80000508) /* Int Enable Set */
25#define IRQ_INTENC __REG(0x8000050c) /* Int Enable Clear */
26
27/* UART 1 */
28#define UART1_BASE __REG(0x80000600)
29#define UART1_DR __REG(0x80000600) /* Data/FIFO Register */
30#define UART1_LCR __REG(0x80000604) /* Link Control Register */
31#define UART1_BRCR __REG(0x80000608) /* Baud Rate Control Register */
32#define UART1_CR __REG(0x8000060c) /* Control Register */
33#define UART1_SR __REG(0x80000610) /* Status Register */
34#define UART1_INT __REG(0x80000614) /* Interrupt Status Register */
35#define UART1_INTM __REG(0x80000618) /* Interrupt Mask Register */
36#define UART1_INTRES __REG(0x8000061c) /* Int Result (masked status) Register */
37
38/* UART 2 */
39#define UART2_BASE __REG(0x80000700)
40#define UART2_DR __REG(0x80000700) /* Data/FIFO Register */
41#define UART2_LCR __REG(0x80000704) /* Link Control Register */
42#define UART2_BRCR __REG(0x80000708) /* Baud Rate Control Register */
43#define UART2_CR __REG(0x8000070c) /* Control Register */
44#define UART2_SR __REG(0x80000710) /* Status Register */
45#define UART2_INT __REG(0x80000714) /* Interrupt Status Register */
46#define UART2_INTM __REG(0x80000718) /* Interrupt Mask Register */
47#define UART2_INTRES __REG(0x8000071c) /* Int Result (masked status) Register */
48
49/* UART 3 */
50#define UART3_BASE __REG(0x80000800)
51#define UART3_DR __REG(0x80000800) /* Data/FIFO Register */
52#define UART3_LCR __REG(0x80000804) /* Link Control Register */
53#define UART3_BRCR __REG(0x80000808) /* Baud Rate Control Register */
54#define UART3_CR __REG(0x8000080c) /* Control Register */
55#define UART3_SR __REG(0x80000810) /* Status Register */
56#define UART3_INT __REG(0x80000814) /* Interrupt Status Register */
57#define UART3_INTM __REG(0x80000818) /* Interrupt Mask Register */
58#define UART3_INTRES __REG(0x8000081c) /* Int Result (masked status) Register */
59
60/* These are used in some places */
61#define _UART1_BASE __PREG(UART1_BASE)
62#define _UART2_BASE __PREG(UART2_BASE)
63#define _UART3_BASE __PREG(UART3_BASE)
64
65/* UART Registers Offsets */
66#define UART_DR 0x00
67#define UART_LCR 0x04
68#define UART_BRCR 0x08
69#define UART_CR 0x0c
70#define UART_SR 0x10
71#define UART_INT 0x14
72#define UART_INTM 0x18
73#define UART_INTRES 0x1c
74
75/* UART_LCR Bitmask */
76#define UART_LCR_BRK (1 << 0) /* Send Break */
77#define UART_LCR_PEN (1 << 1) /* Parity Enable */
78#define UART_LCR_EP (1 << 2) /* Even/Odd Parity */
79#define UART_LCR_S2 (1 << 3) /* One/Two Stop bits */
80#define UART_LCR_FIFO (1 << 4) /* FIFO Enable */
81#define UART_LCR_WL5 (0 << 5) /* Word Length - 5 bits */
82#define UART_LCR_WL6 (1 << 5) /* Word Length - 6 bits */
83#define UART_LCR_WL7 (1 << 6) /* Word Length - 7 bits */
84#define UART_LCR_WL8 (1 << 7) /* Word Length - 8 bits */
85
86/* UART_CR Bitmask */
87#define UART_CR_EN (1 << 0) /* UART Enable */
88#define UART_CR_SIR (1 << 1) /* IrDA SIR Enable */
89#define UART_CR_SIRLP (1 << 2) /* Low Power IrDA Enable */
90#define UART_CR_RXP (1 << 3) /* Receive Pin Polarity */
91#define UART_CR_TXP (1 << 4) /* Transmit Pin Polarity */
92#define UART_CR_MXP (1 << 5) /* Modem Pin Polarity */
93#define UART_CR_LOOP (1 << 6) /* Loopback Mode */
94
95/* UART_SR Bitmask */
96#define UART_SR_CTS (1 << 0) /* Clear To Send Status */
97#define UART_SR_DSR (1 << 1) /* Data Set Ready Status */
98#define UART_SR_DCD (1 << 2) /* Data Carrier Detect Status */
99#define UART_SR_TxBSY (1 << 3) /* Transmitter Busy Status */
100#define UART_SR_RxFE (1 << 4) /* Receive FIFO Empty Status */
101#define UART_SR_TxFF (1 << 5) /* Transmit FIFO Full Status */
102#define UART_SR_RxFF (1 << 6) /* Receive FIFO Full Status */
103#define UART_SR_TxFE (1 << 7) /* Transmit FIFO Empty Status */
104
105/* UART_INT Bitmask */
106#define UART_INT_RIS (1 << 0) /* Rx Interrupt */
107#define UART_INT_TIS (1 << 1) /* Tx Interrupt */
108#define UART_INT_MIS (1 << 2) /* Modem Interrupt */
109#define UART_INT_RTIS (1 << 3) /* Receive Timeout Interrupt */
110
111/* Timer 1 */
112#define TIMER1_BASE __REG(0x80000c00)
113#define TIMER1_LOAD __REG(0x80000c00) /* Timer 1 Load Register */
114#define TIMER1_VAL __REG(0x80000c04) /* Timer 1 Value Register */
115#define TIMER1_CTRL __REG(0x80000c08) /* Timer 1 Control Register */
116#define TIMER1_CLEAR __REG(0x80000c0c) /* Timer 1 Clear Register */
117
118/* Timer 2 */
119#define TIMER2_BASE __REG(0x80000d00)
120#define TIMER2_LOAD __REG(0x80000d00) /* Timer 2 Load Register */
121#define TIMER2_VAL __REG(0x80000d04) /* Timer 2 Value Register */
122#define TIMER2_CTRL __REG(0x80000d08) /* Timer 2 Control Register */
123#define TIMER2_CLEAR __REG(0x80000d0c) /* Timer 2 Clear Register */
124
125/* Timer 3 */
126#define TIMER3_BASE __REG(0x80000e00)
127#define TIMER3_LOAD __REG(0x80000e00) /* Timer 3 Load Register */
128#define TIMER3_VAL __REG(0x80000e04) /* Timer 3 Value Register */
129#define TIMER3_CTRL __REG(0x80000e08) /* Timer 3 Control Register */
130#define TIMER3_CLEAR __REG(0x80000e0c) /* Timer 3 Clear Register */
131
132/* Timer Control register bits */
133#define TIMER_CTRL_ENABLE (1 << 7) /* Enable (Start° Timer */
134#define TIMER_CTRL_PERIODIC (1 << 6) /* Periodic Running Mode */
135#define TIMER_CTRL_FREE_RUNNING (0 << 6) /* Normal Running Mode */
136#define TIMER_CTRL_CLKSEL_508K (1 << 3) /* 508KHz Clock select (Timer 1, 2) */
137#define TIMER_CTRL_CLKSEL_2K (0 << 3) /* 2KHz Clock Select (Timer 1, 2)*/
138
139/* Power and State Control */
140#define POWER_BASE __REG(0x80000400)
141#define POWER_PWRSR __REG(0x80000400) /* Power Status Register */
142#define POWER_PWRCNT __REG(0x80000404) /* Power/Clock control */
143#define POWER_HALT __REG(0x80000408) /* Power Idle Mode */
144#define POWER_STDBY __REG(0x8000040c) /* Power Standby Mode */
145#define POWER_BLEOI __REG(0x80000410) /* Battery Low End of Interrupt */
146#define POWER_MCEOI __REG(0x80000414) /* Media Changed EoI */
147#define POWER_TEOI __REG(0x80000418) /* Tick EoI */
148#define POWER_STFCLR __REG(0x8000041c) /* NbFlg, RSTFlg, PFFlg, CLDFlg Clear */
149#define POWER_CLKSET __REG(0x80000420) /* Clock Speed Control */
150
151#endif /* __ARM_ARCH_AAEC2000_H */
diff --git a/include/asm-arm/arch-aaec2000/debug-macro.S b/include/asm-arm/arch-aaec2000/debug-macro.S
new file mode 100644
index 000000000000..e4f1fa539a74
--- /dev/null
+++ b/include/asm-arm/arch-aaec2000/debug-macro.S
@@ -0,0 +1,36 @@
1/* linux/include/asm-arm/arch-aaec2000/debug-macro.S
2 *
3 * Debugging macro include header
4 *
5 * Copyright (c) 2005 Nicolas Bellido Y Ortega
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12 .macro addruart,rx
13 mrc p15, 0, \rx, c1, c0
14 tst \rx, #1 @ MMU enabled?
15 moveq \rx, #0x80000000 @ physical
16 movne \rx, #io_p2v(0x80000000) @ virtual
17 orr \rx, \rx, #0x00000800
18 .endm
19
20 .macro senduart,rd,rx
21 str \rd, [\rx, #0]
22 .endm
23
24 .macro busyuart,rd,rx
251002: ldr \rd, [\rx, #0x10]
26 tst \rd, #(1 << 7)
27 beq 1002b
28 .endm
29
30 .macro waituart,rd,rx
31#if 0
321001: ldr \rd, [\rx, #0x10]
33 tst \rd, #(1 << 5)
34 beq 1001b
35#endif
36 .endm
diff --git a/include/asm-arm/arch-aaec2000/dma.h b/include/asm-arm/arch-aaec2000/dma.h
new file mode 100644
index 000000000000..28c890b4a1d3
--- /dev/null
+++ b/include/asm-arm/arch-aaec2000/dma.h
@@ -0,0 +1,17 @@
1/*
2 * linux/include/asm-arm/arch-aaec2000/dma.h
3 *
4 * Copyright (c) 2005 Nicolas Bellido Y Ortega
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __ASM_ARCH_DMA_H
12#define __ASM_ARCH_DMA_H
13
14#define MAX_DMA_ADDRESS 0xffffffff
15#define MAX_DMA_CHANNELS 0
16
17#endif
diff --git a/include/asm-arm/arch-aaec2000/entry-macro.S b/include/asm-arm/arch-aaec2000/entry-macro.S
new file mode 100644
index 000000000000..df31313ab07e
--- /dev/null
+++ b/include/asm-arm/arch-aaec2000/entry-macro.S
@@ -0,0 +1,33 @@
1/*
2 * linux/include/asm-arm/arch-aaec2000/entry-macro.S
3 *
4 * Low-level IRQ helper for aaec-2000 based platforms
5 *
6 * Copyright (c) 2005 Nicolas Bellido Y Ortega
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 */
13
14 .macro disable_fiq
15 .endm
16
17 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
18 mov r4, #0xf8000000
19 add r4, r4, #0x00000500
20 mov \base, r4
21 ldr \irqstat, [\base, #0]
22 cmp \irqstat, #0
23 bne 1001f
24 ldr \irqnr, =NR_IRQS+1
25 b 1003f
261001: mov \irqnr, #0
271002: ands \tmp, \irqstat, #1
28 mov \irqstat, \irqstat, LSR #1
29 add \irqnr, \irqnr, #1
30 beq 1002b
31 sub \irqnr, \irqnr, #1
321003:
33 .endm
diff --git a/include/asm-arm/arch-aaec2000/hardware.h b/include/asm-arm/arch-aaec2000/hardware.h
new file mode 100644
index 000000000000..4c37219e030e
--- /dev/null
+++ b/include/asm-arm/arch-aaec2000/hardware.h
@@ -0,0 +1,49 @@
1/*
2 * linux/include/asm-arm/arch-aaec2000/hardware.h
3 *
4 * Copyright (c) 2005 Nicolas Bellido Y Ortega
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __ASM_ARCH_HARDWARE_H
12#define __ASM_ARCH_HARDWARE_H
13
14#include <linux/config.h>
15
16/* The kernel is loaded at physical address 0xf8000000.
17 * We map the IO space a bit after
18 */
19#define PIO_APB_BASE 0x80000000
20#define VIO_APB_BASE 0xf8000000
21#define IO_APB_LENGTH 0x2000
22#define PIO_AHB_BASE 0x80002000
23#define VIO_AHB_BASE 0xf8002000
24#define IO_AHB_LENGTH 0x2000
25
26#define VIO_BASE VIO_APB_BASE
27#define PIO_BASE PIO_APB_BASE
28
29#define io_p2v(x) ( (x) - PIO_BASE + VIO_BASE )
30#define io_v2p(x) ( (x) + PIO_BASE - VIO_BASE )
31
32#ifndef __ASSEMBLY__
33
34#include <asm/types.h>
35
36/* FIXME: Is it needed to optimize this a la pxa ?? */
37#define __REG(x) (*((volatile u32 *)io_p2v(x)))
38#define __PREG(x) (io_v2p((u32)&(x)))
39
40#else /* __ASSEMBLY__ */
41
42#define __REG(x) io_p2v(x)
43#define __PREG(x) io_v2p(x)
44
45#endif
46
47#include "aaec2000.h"
48
49#endif /* __ASM_ARCH_HARDWARE_H */
diff --git a/include/asm-arm/arch-aaec2000/io.h b/include/asm-arm/arch-aaec2000/io.h
new file mode 100644
index 000000000000..c58a8d10425a
--- /dev/null
+++ b/include/asm-arm/arch-aaec2000/io.h
@@ -0,0 +1,19 @@
1/*
2 * linux/include/asm-arm/arch-aaec2000/io.h
3 *
4 * Copied from asm/arch/sa1100/io.h
5 */
6#ifndef __ASM_ARM_ARCH_IO_H
7#define __ASM_ARM_ARCH_IO_H
8
9#define IO_SPACE_LIMIT 0xffffffff
10
11/*
12 * We don't actually have real ISA nor PCI buses, but there is so many
13 * drivers out there that might just work if we fake them...
14 */
15#define __io(a) ((void __iomem *)(a))
16#define __mem_pci(a) (a)
17#define __mem_isa(a) (a)
18
19#endif
diff --git a/include/asm-arm/arch-aaec2000/irqs.h b/include/asm-arm/arch-aaec2000/irqs.h
new file mode 100644
index 000000000000..de252220e806
--- /dev/null
+++ b/include/asm-arm/arch-aaec2000/irqs.h
@@ -0,0 +1,46 @@
1/*
2 * linux/include/asm-arm/arch-aaec2000/irqs.h
3 *
4 * Copyright (c) 2005 Nicolas Bellido Y Ortega
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __ASM_ARCH_IRQS_H
12#define __ASM_ARCH_IRQS_H
13
14
15#define INT_GPIOF0_FIQ 0 /* External GPIO Port F O Fast Interrupt Input */
16#define INT_BL_FIQ 1 /* Battery Low Fast Interrupt */
17#define INT_WE_FIQ 2 /* Watchdog Expired Fast Interrupt */
18#define INT_MV_FIQ 3 /* Media Changed Interrupt */
19#define INT_SC 4 /* Sound Codec Interrupt */
20#define INT_GPIO1 5 /* GPIO Port F Configurable Int 1 */
21#define INT_GPIO2 6 /* GPIO Port F Configurable Int 2 */
22#define INT_GPIO3 7 /* GPIO Port F Configurable Int 3 */
23#define INT_TMR1_OFL 8 /* Timer 1 Overflow Interrupt */
24#define INT_TMR2_OFL 9 /* Timer 2 Overflow Interrupt */
25#define INT_RTC_CM 10 /* RTC Compare Match Interrupt */
26#define INT_TICK 11 /* 64Hz Tick Interrupt */
27#define INT_UART1 12 /* UART1 Interrupt */
28#define INT_UART2 13 /* UART2 & Modem State Changed Interrupt */
29#define INT_LCD 14 /* LCD Interrupt */
30#define INT_SSI 15 /* SSI End of Transfer Interrupt */
31#define INT_UART3 16 /* UART3 Interrupt */
32#define INT_SCI 17 /* SCI Interrupt */
33#define INT_AAC 18 /* Advanced Audio Codec Interrupt */
34#define INT_MMC 19 /* MMC Interrupt */
35#define INT_USB 20 /* USB Interrupt */
36#define INT_DMA 21 /* DMA Interrupt */
37#define INT_TMR3_UOFL 22 /* Timer 3 Underflow Interrupt */
38#define INT_GPIO4 23 /* GPIO Port F Configurable Int 4 */
39#define INT_GPIO5 24 /* GPIO Port F Configurable Int 4 */
40#define INT_GPIO6 25 /* GPIO Port F Configurable Int 4 */
41#define INT_GPIO7 26 /* GPIO Port F Configurable Int 4 */
42#define INT_BMI 27 /* BMI Interrupt */
43
44#define NR_IRQS (INT_BMI + 1)
45
46#endif /* __ASM_ARCH_IRQS_H */
diff --git a/include/asm-arm/arch-aaec2000/memory.h b/include/asm-arm/arch-aaec2000/memory.h
new file mode 100644
index 000000000000..681b6a6171a1
--- /dev/null
+++ b/include/asm-arm/arch-aaec2000/memory.h
@@ -0,0 +1,73 @@
1/*
2 * linux/include/asm-arm/arch-aaec2000/memory.h
3 *
4 * Copyright (c) 2005 Nicolas Bellido Y Ortega
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __ASM_ARCH_MEMORY_H
12#define __ASM_ARCH_MEMORY_H
13
14#include <linux/config.h>
15
16#define PHYS_OFFSET (0xf0000000UL)
17
18#define __virt_to_bus(x) __virt_to_phys(x)
19#define __bus_to_virt(x) __phys_to_virt(x)
20
21#ifdef CONFIG_DISCONTIGMEM
22
23/*
24 * The nodes are the followings:
25 *
26 * node 0: 0xf000.0000 - 0xf3ff.ffff
27 * node 1: 0xf400.0000 - 0xf7ff.ffff
28 * node 2: 0xf800.0000 - 0xfbff.ffff
29 * node 3: 0xfc00.0000 - 0xffff.ffff
30 */
31
32/*
33 * Given a kernel address, find the home node of the underlying memory.
34 */
35#define KVADDR_TO_NID(addr) \
36 (((unsigned long)(addr) - PAGE_OFFSET) >> NODE_MAX_MEM_SHIFT)
37
38/*
39 * Given a page frame number, convert it to a node id.
40 */
41#define PFN_TO_NID(pfn) \
42 (((pfn) - PHYS_PFN_OFFSET) >> (NODE_MAX_MEM_SHIFT - PAGE_SHIFT))
43
44/*
45 * Given a kaddr, ADDR_TO_MAPBASE finds the owning node of the memory
46 * and return the mem_map of that node.
47 */
48#define ADDR_TO_MAPBASE(kaddr) NODE_MEM_MAP(KVADDR_TO_NID(kaddr))
49
50/*
51 * Given a page frame number, find the owning node of the memory
52 * and return the mem_map of that node.
53 */
54#define PFN_TO_MAPBASE(pfn) NODE_MEM_MAP(PFN_TO_NID(pfn))
55
56/*
57 * Given a kaddr, LOCAL_MEM_MAP finds the owning node of the memory
58 * and returns the index corresponding to the appropriate page in the
59 * node's mem_map.
60 */
61#define LOCAL_MAP_NR(addr) \
62 (((unsigned long)(addr) & (NODE_MAX_MEM_SIZE - 1)) >> PAGE_SHIFT)
63
64#define NODE_MAX_MEM_SHIFT 26
65#define NODE_MAX_MEM_SIZE (1 << NODE_MAX_MEM_SHIFT)
66
67#else
68
69#define PFN_TO_NID(addr) (0)
70
71#endif /* CONFIG_DISCONTIGMEM */
72
73#endif /* __ASM_ARCH_MEMORY_H */
diff --git a/include/asm-arm/arch-aaec2000/param.h b/include/asm-arm/arch-aaec2000/param.h
new file mode 100644
index 000000000000..139936c2faf2
--- /dev/null
+++ b/include/asm-arm/arch-aaec2000/param.h
@@ -0,0 +1,15 @@
1/*
2 * linux/include/asm-arm/arch-aaec2000/param.h
3 *
4 * Copyright (c) 2005 Nicolas Bellido Y Ortega
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __ASM_ARCH_PARAM_H
12#define __ASM_ARCH_PARAM_H
13
14#endif /* __ASM_ARCH_PARAM_H */
15
diff --git a/include/asm-arm/arch-aaec2000/system.h b/include/asm-arm/arch-aaec2000/system.h
new file mode 100644
index 000000000000..08de97b407a8
--- /dev/null
+++ b/include/asm-arm/arch-aaec2000/system.h
@@ -0,0 +1,24 @@
1/*
2 * linux/include/asm-arm/arch-aaed2000/system.h
3 *
4 * Copyright (c) 2005 Nicolas Bellido Y Ortega
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __ASM_ARCH_SYSTEM_H
12#define __ASM_ARCH_SYSTEM_H
13
14static inline void arch_idle(void)
15{
16 cpu_do_idle();
17}
18
19static inline void arch_reset(char mode)
20{
21 cpu_reset(0);
22}
23
24#endif /* __ASM_ARCH_SYSTEM_H */
diff --git a/include/asm-arm/arch-aaec2000/timex.h b/include/asm-arm/arch-aaec2000/timex.h
new file mode 100644
index 000000000000..f5708b38fb7f
--- /dev/null
+++ b/include/asm-arm/arch-aaec2000/timex.h
@@ -0,0 +1,18 @@
1/*
2 * linux/include/asm-arm/arch-aaec2000/timex.h
3 *
4 * AAEC-2000 Architecture timex specification
5 *
6 * Copyright (c) 2005 Nicolas Bellido Y Ortega
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#ifndef __ASM_ARCH_TIMEX_H
14#define __ASM_ARCH_TIMEX_H
15
16#define CLOCK_TICK_RATE 508000
17
18#endif /* __ASM_ARCH_TIMEX_H */
diff --git a/include/asm-arm/arch-aaec2000/uncompress.h b/include/asm-arm/arch-aaec2000/uncompress.h
new file mode 100644
index 000000000000..fff0c94b75c4
--- /dev/null
+++ b/include/asm-arm/arch-aaec2000/uncompress.h
@@ -0,0 +1,47 @@
1/*
2 * linux/include/asm-arm/arch-aaec2000/uncompress.h
3 *
4 * Copyright (c) 2005 Nicolas Bellido Y Ortega
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __ASM_ARCH_UNCOMPRESS_H
12#define __ASM_ARCH_UNCOMPRESS_H
13
14#include "hardware.h"
15
16#define UART(x) (*(volatile unsigned long *)(serial_port + (x)))
17
18static void putstr( const char *s )
19{
20 unsigned long serial_port;
21 do {
22 serial_port = _UART3_BASE;
23 if (UART(UART_CR) & UART_CR_EN) break;
24 serial_port = _UART1_BASE;
25 if (UART(UART_CR) & UART_CR_EN) break;
26 serial_port = _UART2_BASE;
27 if (UART(UART_CR) & UART_CR_EN) break;
28 return;
29 } while (0);
30
31 for (; *s; s++) {
32 /* wait for space in the UART's transmitter */
33 while ((UART(UART_SR) & UART_SR_TxFF));
34 /* send the character out. */
35 UART(UART_DR) = *s;
36 /* if a LF, also do CR... */
37 if (*s == 10) {
38 while ((UART(UART_SR) & UART_SR_TxFF));
39 UART(UART_DR) = 13;
40 }
41 }
42}
43
44#define arch_decomp_setup()
45#define arch_decomp_wdog()
46
47#endif /* __ASM_ARCH_UNCOMPRESS_H */
diff --git a/include/asm-arm/arch-aaec2000/vmalloc.h b/include/asm-arm/arch-aaec2000/vmalloc.h
new file mode 100644
index 000000000000..ecb991e2e4ff
--- /dev/null
+++ b/include/asm-arm/arch-aaec2000/vmalloc.h
@@ -0,0 +1,16 @@
1/*
2 * linux/include/asm-arm/arch-aaec2000/vmalloc.h
3 *
4 * Copyright (c) 2005 Nicolas Bellido Y Ortega
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __ASM_ARCH_VMALLOC_H
12#define __ASM_ARCH_VMALLOC_H
13
14#define VMALLOC_END (PAGE_OFFSET + 0x10000000)
15
16#endif /* __ASM_ARCH_VMALLOC_H */
diff --git a/include/asm-arm/arch-ixp2000/ixp2000-regs.h b/include/asm-arm/arch-ixp2000/ixp2000-regs.h
index 6c56708d0ff0..a1d9e181b10f 100644
--- a/include/asm-arm/arch-ixp2000/ixp2000-regs.h
+++ b/include/asm-arm/arch-ixp2000/ixp2000-regs.h
@@ -363,6 +363,7 @@
363#define IXP2000_MIN_REV_MASK 0x0000000F 363#define IXP2000_MIN_REV_MASK 0x0000000F
364#define IXP2000_PROD_ID_MASK 0xFFFFFFFF 364#define IXP2000_PROD_ID_MASK 0xFFFFFFFF
365 365
366#define IXP2000_PRODUCT_ID GLOBAL_REG(0x00)
366#define IXP2000_MISC_CONTROL GLOBAL_REG(0x04) 367#define IXP2000_MISC_CONTROL GLOBAL_REG(0x04)
367#define IXP2000_MSF_CLK_CNTRL GLOBAL_REG(0x08) 368#define IXP2000_MSF_CLK_CNTRL GLOBAL_REG(0x08)
368#define IXP2000_RESET0 GLOBAL_REG(0x0c) 369#define IXP2000_RESET0 GLOBAL_REG(0x0c)
diff --git a/include/asm-arm/arch-versatile/hardware.h b/include/asm-arm/arch-versatile/hardware.h
index d5fb4a251e7f..41c1bee342ad 100644
--- a/include/asm-arm/arch-versatile/hardware.h
+++ b/include/asm-arm/arch-versatile/hardware.h
@@ -25,19 +25,26 @@
25#include <asm/sizes.h> 25#include <asm/sizes.h>
26#include <asm/arch/platform.h> 26#include <asm/arch/platform.h>
27 27
28// FIXME = PCI settings need to be fixed!!!!!
29
30/* 28/*
31 * Similar to above, but for PCI addresses (memory, IO, Config and the 29 * PCI space virtual addresses
32 * V3 chip itself). WARNING: this has to mirror definitions in platform.h
33 */ 30 */
34#define PCI_MEMORY_VADDR 0xe8000000 31#define VERSATILE_PCI_VIRT_BASE 0xe8000000
35#define PCI_CONFIG_VADDR 0xec000000 32#define VERSATILE_PCI_CFG_VIRT_BASE 0xe9000000
36#define PCI_V3_VADDR 0xed000000 33
37#define PCI_IO_VADDR 0xee000000 34#if 0
35#define VERSATILE_PCI_VIRT_MEM_BASE0 0xf4000000
36#define VERSATILE_PCI_VIRT_MEM_BASE1 0xf5000000
37#define VERSATILE_PCI_VIRT_MEM_BASE2 0xf6000000
38
39#define PCIO_BASE VERSATILE_PCI_VIRT_MEM_BASE0
40#define PCIMEM_BASE VERSATILE_PCI_VIRT_MEM_BASE1
41#endif
42
43/* CIK guesswork */
44#define PCIBIOS_MIN_IO 0x44000000
45#define PCIBIOS_MIN_MEM 0x50000000
38 46
39#define PCIO_BASE PCI_IO_VADDR 47#define pcibios_assign_all_busses() 1
40#define PCIMEM_BASE PCI_MEMORY_VADDR
41 48
42/* macro to get at IO space when running virtually */ 49/* macro to get at IO space when running virtually */
43#define IO_ADDRESS(x) (((x) & 0x0fffffff) + (((x) >> 4) & 0x0f000000) + 0xf0000000) 50#define IO_ADDRESS(x) (((x) & 0x0fffffff) + (((x) >> 4) & 0x0f000000) + 0xf0000000)
diff --git a/include/asm-arm/arch-versatile/io.h b/include/asm-arm/arch-versatile/io.h
index dbb7158788fc..9f895bf61494 100644
--- a/include/asm-arm/arch-versatile/io.h
+++ b/include/asm-arm/arch-versatile/io.h
@@ -20,7 +20,7 @@
20#ifndef __ASM_ARM_ARCH_IO_H 20#ifndef __ASM_ARM_ARCH_IO_H
21#define __ASM_ARM_ARCH_IO_H 21#define __ASM_ARM_ARCH_IO_H
22 22
23#define IO_SPACE_LIMIT 0xffff 23#define IO_SPACE_LIMIT 0xffffffff
24 24
25#define __io(a) ((void __iomem *)(a)) 25#define __io(a) ((void __iomem *)(a))
26#define __mem_pci(a) (a) 26#define __mem_pci(a) (a)
diff --git a/include/asm-arm/arch-versatile/platform.h b/include/asm-arm/arch-versatile/platform.h
index a71093e44c58..cbdd9fb96332 100644
--- a/include/asm-arm/arch-versatile/platform.h
+++ b/include/asm-arm/arch-versatile/platform.h
@@ -76,7 +76,7 @@
76#define VERSATILE_SYS_NVFLAGSSET_OFFSET 0x38 76#define VERSATILE_SYS_NVFLAGSSET_OFFSET 0x38
77#define VERSATILE_SYS_NVFLAGSCLR_OFFSET 0x3C 77#define VERSATILE_SYS_NVFLAGSCLR_OFFSET 0x3C
78#define VERSATILE_SYS_RESETCTL_OFFSET 0x40 78#define VERSATILE_SYS_RESETCTL_OFFSET 0x40
79#define VERSATILE_SYS_PICCTL_OFFSET 0x44 79#define VERSATILE_SYS_PCICTL_OFFSET 0x44
80#define VERSATILE_SYS_MCI_OFFSET 0x48 80#define VERSATILE_SYS_MCI_OFFSET 0x48
81#define VERSATILE_SYS_FLASH_OFFSET 0x4C 81#define VERSATILE_SYS_FLASH_OFFSET 0x4C
82#define VERSATILE_SYS_CLCD_OFFSET 0x50 82#define VERSATILE_SYS_CLCD_OFFSET 0x50
@@ -114,7 +114,7 @@
114#define VERSATILE_SYS_NVFLAGSSET (VERSATILE_SYS_BASE + VERSATILE_SYS_NVFLAGSSET_OFFSET) 114#define VERSATILE_SYS_NVFLAGSSET (VERSATILE_SYS_BASE + VERSATILE_SYS_NVFLAGSSET_OFFSET)
115#define VERSATILE_SYS_NVFLAGSCLR (VERSATILE_SYS_BASE + VERSATILE_SYS_NVFLAGSCLR_OFFSET) 115#define VERSATILE_SYS_NVFLAGSCLR (VERSATILE_SYS_BASE + VERSATILE_SYS_NVFLAGSCLR_OFFSET)
116#define VERSATILE_SYS_RESETCTL (VERSATILE_SYS_BASE + VERSATILE_SYS_RESETCTL_OFFSET) 116#define VERSATILE_SYS_RESETCTL (VERSATILE_SYS_BASE + VERSATILE_SYS_RESETCTL_OFFSET)
117#define VERSATILE_SYS_PICCTL (VERSATILE_SYS_BASE + VERSATILE_SYS_PICCTL_OFFSET) 117#define VERSATILE_SYS_PCICTL (VERSATILE_SYS_BASE + VERSATILE_SYS_PCICTL_OFFSET)
118#define VERSATILE_SYS_MCI (VERSATILE_SYS_BASE + VERSATILE_SYS_MCI_OFFSET) 118#define VERSATILE_SYS_MCI (VERSATILE_SYS_BASE + VERSATILE_SYS_MCI_OFFSET)
119#define VERSATILE_SYS_FLASH (VERSATILE_SYS_BASE + VERSATILE_SYS_FLASH_OFFSET) 119#define VERSATILE_SYS_FLASH (VERSATILE_SYS_BASE + VERSATILE_SYS_FLASH_OFFSET)
120#define VERSATILE_SYS_CLCD (VERSATILE_SYS_BASE + VERSATILE_SYS_CLCD_OFFSET) 120#define VERSATILE_SYS_CLCD (VERSATILE_SYS_BASE + VERSATILE_SYS_CLCD_OFFSET)
@@ -225,7 +225,20 @@
225#define VERSATILE_SSMC_BASE 0x20000000 /* SSMC */ 225#define VERSATILE_SSMC_BASE 0x20000000 /* SSMC */
226#define VERSATILE_IB2_BASE 0x24000000 /* IB2 module */ 226#define VERSATILE_IB2_BASE 0x24000000 /* IB2 module */
227#define VERSATILE_MBX_BASE 0x40000000 /* MBX */ 227#define VERSATILE_MBX_BASE 0x40000000 /* MBX */
228
229/* PCI space */
228#define VERSATILE_PCI_BASE 0x41000000 /* PCI Interface */ 230#define VERSATILE_PCI_BASE 0x41000000 /* PCI Interface */
231#define VERSATILE_PCI_CFG_BASE 0x42000000
232#define VERSATILE_PCI_MEM_BASE0 0x44000000
233#define VERSATILE_PCI_MEM_BASE1 0x50000000
234#define VERSATILE_PCI_MEM_BASE2 0x60000000
235/* Sizes of above maps */
236#define VERSATILE_PCI_BASE_SIZE 0x01000000
237#define VERSATILE_PCI_CFG_BASE_SIZE 0x02000000
238#define VERSATILE_PCI_MEM_BASE0_SIZE 0x0c000000 /* 32Mb */
239#define VERSATILE_PCI_MEM_BASE1_SIZE 0x10000000 /* 256Mb */
240#define VERSATILE_PCI_MEM_BASE2_SIZE 0x10000000 /* 256Mb */
241
229#define VERSATILE_SDRAM67_BASE 0x70000000 /* SDRAM banks 6 and 7 */ 242#define VERSATILE_SDRAM67_BASE 0x70000000 /* SDRAM banks 6 and 7 */
230#define VERSATILE_LT_BASE 0x80000000 /* Logic Tile expansion */ 243#define VERSATILE_LT_BASE 0x80000000 /* Logic Tile expansion */
231 244
diff --git a/include/asm-arm/cacheflush.h b/include/asm-arm/cacheflush.h
index 09ffeed507c2..035cdcff43d2 100644
--- a/include/asm-arm/cacheflush.h
+++ b/include/asm-arm/cacheflush.h
@@ -16,6 +16,9 @@
16 16
17#include <asm/mman.h> 17#include <asm/mman.h>
18#include <asm/glue.h> 18#include <asm/glue.h>
19#include <asm/shmparam.h>
20
21#define CACHE_COLOUR(vaddr) ((vaddr & (SHMLBA - 1)) >> PAGE_SHIFT)
19 22
20/* 23/*
21 * Cache Model 24 * Cache Model
diff --git a/include/asm-arm/io.h b/include/asm-arm/io.h
index 658ffa384fda..08a46302d265 100644
--- a/include/asm-arm/io.h
+++ b/include/asm-arm/io.h
@@ -273,6 +273,33 @@ extern void __iounmap(void __iomem *addr);
273#endif 273#endif
274 274
275/* 275/*
276 * io{read,write}{8,16,32} macros
277 */
278#define ioread8(p) ({ unsigned int __v = __raw_readb(p); __v; })
279#define ioread16(p) ({ unsigned int __v = le16_to_cpu(__raw_readw(p)); __v; })
280#define ioread32(p) ({ unsigned int __v = le32_to_cpu(__raw_readl(p)); __v; })
281
282#define iowrite8(v,p) __raw_writeb(v, p)
283#define iowrite16(v,p) __raw_writew(cpu_to_le16(v), p)
284#define iowrite32(v,p) __raw_writel(cpu_to_le32(v), p)
285
286#define ioread8_rep(p,d,c) __raw_readsb(p,d,c)
287#define ioread16_rep(p,d,c) __raw_readsw(p,d,c)
288#define ioread32_rep(p,d,c) __raw_readsl(p,d,c)
289
290#define iowrite8_rep(p,s,c) __raw_writesb(p,s,c)
291#define iowrite16_rep(p,s,c) __raw_writesw(p,s,c)
292#define iowrite32_rep(p,s,c) __raw_writesl(p,s,c)
293
294extern void __iomem *ioport_map(unsigned long port, unsigned int nr);
295extern void ioport_unmap(void __iomem *addr);
296
297struct pci_dev;
298
299extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen);
300extern void pci_iounmap(struct pci_dev *dev, void __iomem *addr);
301
302/*
276 * can the hardware map this into one segment or not, given no other 303 * can the hardware map this into one segment or not, given no other
277 * constraints. 304 * constraints.
278 */ 305 */
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-28 08:20:52 -0500