diff options
author | Jeff Garzik <jeff@garzik.org> | 2007-10-19 15:45:35 -0400 |
---|---|---|
committer | Jeff Garzik <jeff@garzik.org> | 2007-10-23 19:53:16 -0400 |
commit | d12341f9f2b7cc38c699c2af3a9f17eb39b64b17 (patch) | |
tree | 1b93ba3090ab95325ecf8ebc5498425f964fcf8a | |
parent | 6bd3bd6794d4139aa1b5193a82e3adfcb488c392 (diff) |
char/pcmcia/synclink_cs: trim trailing whitespace
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
-rw-r--r-- | drivers/char/pcmcia/synclink_cs.c | 706 |
1 files changed, 353 insertions, 353 deletions
diff --git a/drivers/char/pcmcia/synclink_cs.c b/drivers/char/pcmcia/synclink_cs.c index 2b889317461e..8caff0ca80ff 100644 --- a/drivers/char/pcmcia/synclink_cs.c +++ b/drivers/char/pcmcia/synclink_cs.c | |||
@@ -123,7 +123,7 @@ typedef struct | |||
123 | #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK)) | 123 | #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK)) |
124 | 124 | ||
125 | struct _input_signal_events { | 125 | struct _input_signal_events { |
126 | int ri_up; | 126 | int ri_up; |
127 | int ri_down; | 127 | int ri_down; |
128 | int dsr_up; | 128 | int dsr_up; |
129 | int dsr_down; | 129 | int dsr_down; |
@@ -137,7 +137,7 @@ struct _input_signal_events { | |||
137 | /* | 137 | /* |
138 | * Device instance data structure | 138 | * Device instance data structure |
139 | */ | 139 | */ |
140 | 140 | ||
141 | typedef struct _mgslpc_info { | 141 | typedef struct _mgslpc_info { |
142 | void *if_ptr; /* General purpose pointer (used by SPPP) */ | 142 | void *if_ptr; /* General purpose pointer (used by SPPP) */ |
143 | int magic; | 143 | int magic; |
@@ -146,15 +146,15 @@ typedef struct _mgslpc_info { | |||
146 | int line; | 146 | int line; |
147 | unsigned short close_delay; | 147 | unsigned short close_delay; |
148 | unsigned short closing_wait; /* time to wait before closing */ | 148 | unsigned short closing_wait; /* time to wait before closing */ |
149 | 149 | ||
150 | struct mgsl_icount icount; | 150 | struct mgsl_icount icount; |
151 | 151 | ||
152 | struct tty_struct *tty; | 152 | struct tty_struct *tty; |
153 | int timeout; | 153 | int timeout; |
154 | int x_char; /* xon/xoff character */ | 154 | int x_char; /* xon/xoff character */ |
155 | int blocked_open; /* # of blocked opens */ | 155 | int blocked_open; /* # of blocked opens */ |
156 | unsigned char read_status_mask; | 156 | unsigned char read_status_mask; |
157 | unsigned char ignore_status_mask; | 157 | unsigned char ignore_status_mask; |
158 | 158 | ||
159 | unsigned char *tx_buf; | 159 | unsigned char *tx_buf; |
160 | int tx_put; | 160 | int tx_put; |
@@ -170,10 +170,10 @@ typedef struct _mgslpc_info { | |||
170 | int rx_buf_size; /* size in bytes of single rx buffer */ | 170 | int rx_buf_size; /* size in bytes of single rx buffer */ |
171 | int rx_buf_count; /* total number of rx buffers */ | 171 | int rx_buf_count; /* total number of rx buffers */ |
172 | int rx_frame_count; /* number of full rx buffers */ | 172 | int rx_frame_count; /* number of full rx buffers */ |
173 | 173 | ||
174 | wait_queue_head_t open_wait; | 174 | wait_queue_head_t open_wait; |
175 | wait_queue_head_t close_wait; | 175 | wait_queue_head_t close_wait; |
176 | 176 | ||
177 | wait_queue_head_t status_event_wait_q; | 177 | wait_queue_head_t status_event_wait_q; |
178 | wait_queue_head_t event_wait_q; | 178 | wait_queue_head_t event_wait_q; |
179 | struct timer_list tx_timer; /* HDLC transmit timeout timer */ | 179 | struct timer_list tx_timer; /* HDLC transmit timeout timer */ |
@@ -192,7 +192,7 @@ typedef struct _mgslpc_info { | |||
192 | 192 | ||
193 | int bh_running; | 193 | int bh_running; |
194 | int bh_requested; | 194 | int bh_requested; |
195 | 195 | ||
196 | int dcd_chkcount; /* check counts to prevent */ | 196 | int dcd_chkcount; /* check counts to prevent */ |
197 | int cts_chkcount; /* too many IRQs if a signal */ | 197 | int cts_chkcount; /* too many IRQs if a signal */ |
198 | int dsr_chkcount; /* is floating */ | 198 | int dsr_chkcount; /* is floating */ |
@@ -212,7 +212,7 @@ typedef struct _mgslpc_info { | |||
212 | 212 | ||
213 | unsigned int io_base; /* base I/O address of adapter */ | 213 | unsigned int io_base; /* base I/O address of adapter */ |
214 | unsigned int irq_level; | 214 | unsigned int irq_level; |
215 | 215 | ||
216 | MGSL_PARAMS params; /* communications parameters */ | 216 | MGSL_PARAMS params; /* communications parameters */ |
217 | 217 | ||
218 | unsigned char serial_signals; /* current serial signal states */ | 218 | unsigned char serial_signals; /* current serial signal states */ |
@@ -249,7 +249,7 @@ typedef struct _mgslpc_info { | |||
249 | */ | 249 | */ |
250 | #define TXBUFSIZE 4096 | 250 | #define TXBUFSIZE 4096 |
251 | 251 | ||
252 | 252 | ||
253 | #define CHA 0x00 /* channel A offset */ | 253 | #define CHA 0x00 /* channel A offset */ |
254 | #define CHB 0x40 /* channel B offset */ | 254 | #define CHB 0x40 /* channel B offset */ |
255 | 255 | ||
@@ -298,9 +298,9 @@ typedef struct _mgslpc_info { | |||
298 | #define PIM 0x3d | 298 | #define PIM 0x3d |
299 | #define PCR 0x3e | 299 | #define PCR 0x3e |
300 | #define CCR4 0x3f | 300 | #define CCR4 0x3f |
301 | 301 | ||
302 | // IMR/ISR | 302 | // IMR/ISR |
303 | 303 | ||
304 | #define IRQ_BREAK_ON BIT15 // rx break detected | 304 | #define IRQ_BREAK_ON BIT15 // rx break detected |
305 | #define IRQ_DATAOVERRUN BIT14 // receive data overflow | 305 | #define IRQ_DATAOVERRUN BIT14 // receive data overflow |
306 | #define IRQ_ALLSENT BIT13 // all sent | 306 | #define IRQ_ALLSENT BIT13 // all sent |
@@ -315,13 +315,13 @@ typedef struct _mgslpc_info { | |||
315 | #define IRQ_DCD BIT2 // carrier detect status change | 315 | #define IRQ_DCD BIT2 // carrier detect status change |
316 | #define IRQ_OVERRUN BIT1 // receive frame overflow | 316 | #define IRQ_OVERRUN BIT1 // receive frame overflow |
317 | #define IRQ_RXFIFO BIT0 // receive pool full | 317 | #define IRQ_RXFIFO BIT0 // receive pool full |
318 | 318 | ||
319 | // STAR | 319 | // STAR |
320 | 320 | ||
321 | #define XFW BIT6 // transmit FIFO write enable | 321 | #define XFW BIT6 // transmit FIFO write enable |
322 | #define CEC BIT2 // command executing | 322 | #define CEC BIT2 // command executing |
323 | #define CTS BIT1 // CTS state | 323 | #define CTS BIT1 // CTS state |
324 | 324 | ||
325 | #define PVR_DTR BIT0 | 325 | #define PVR_DTR BIT0 |
326 | #define PVR_DSR BIT1 | 326 | #define PVR_DSR BIT1 |
327 | #define PVR_RI BIT2 | 327 | #define PVR_RI BIT2 |
@@ -329,25 +329,25 @@ typedef struct _mgslpc_info { | |||
329 | #define PVR_RS232 0x20 /* 0010b */ | 329 | #define PVR_RS232 0x20 /* 0010b */ |
330 | #define PVR_V35 0xe0 /* 1110b */ | 330 | #define PVR_V35 0xe0 /* 1110b */ |
331 | #define PVR_RS422 0x40 /* 0100b */ | 331 | #define PVR_RS422 0x40 /* 0100b */ |
332 | 332 | ||
333 | /* Register access functions */ | 333 | /* Register access functions */ |
334 | 334 | ||
335 | #define write_reg(info, reg, val) outb((val),(info)->io_base + (reg)) | 335 | #define write_reg(info, reg, val) outb((val),(info)->io_base + (reg)) |
336 | #define read_reg(info, reg) inb((info)->io_base + (reg)) | 336 | #define read_reg(info, reg) inb((info)->io_base + (reg)) |
337 | 337 | ||
338 | #define read_reg16(info, reg) inw((info)->io_base + (reg)) | 338 | #define read_reg16(info, reg) inw((info)->io_base + (reg)) |
339 | #define write_reg16(info, reg, val) outw((val), (info)->io_base + (reg)) | 339 | #define write_reg16(info, reg, val) outw((val), (info)->io_base + (reg)) |
340 | 340 | ||
341 | #define set_reg_bits(info, reg, mask) \ | 341 | #define set_reg_bits(info, reg, mask) \ |
342 | write_reg(info, (reg), \ | 342 | write_reg(info, (reg), \ |
343 | (unsigned char) (read_reg(info, (reg)) | (mask))) | 343 | (unsigned char) (read_reg(info, (reg)) | (mask))) |
344 | #define clear_reg_bits(info, reg, mask) \ | 344 | #define clear_reg_bits(info, reg, mask) \ |
345 | write_reg(info, (reg), \ | 345 | write_reg(info, (reg), \ |
346 | (unsigned char) (read_reg(info, (reg)) & ~(mask))) | 346 | (unsigned char) (read_reg(info, (reg)) & ~(mask))) |
347 | /* | 347 | /* |
348 | * interrupt enable/disable routines | 348 | * interrupt enable/disable routines |
349 | */ | 349 | */ |
350 | static void irq_disable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask) | 350 | static void irq_disable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask) |
351 | { | 351 | { |
352 | if (channel == CHA) { | 352 | if (channel == CHA) { |
353 | info->imra_value |= mask; | 353 | info->imra_value |= mask; |
@@ -357,7 +357,7 @@ static void irq_disable(MGSLPC_INFO *info, unsigned char channel, unsigned short | |||
357 | write_reg16(info, CHB + IMR, info->imrb_value); | 357 | write_reg16(info, CHB + IMR, info->imrb_value); |
358 | } | 358 | } |
359 | } | 359 | } |
360 | static void irq_enable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask) | 360 | static void irq_enable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask) |
361 | { | 361 | { |
362 | if (channel == CHA) { | 362 | if (channel == CHA) { |
363 | info->imra_value &= ~mask; | 363 | info->imra_value &= ~mask; |
@@ -558,7 +558,7 @@ static int mgslpc_probe(struct pcmcia_device *link) | |||
558 | spin_lock_init(&info->lock); | 558 | spin_lock_init(&info->lock); |
559 | spin_lock_init(&info->netlock); | 559 | spin_lock_init(&info->netlock); |
560 | memcpy(&info->params,&default_params,sizeof(MGSL_PARAMS)); | 560 | memcpy(&info->params,&default_params,sizeof(MGSL_PARAMS)); |
561 | info->idle_mode = HDLC_TXIDLE_FLAGS; | 561 | info->idle_mode = HDLC_TXIDLE_FLAGS; |
562 | info->imra_value = 0xffff; | 562 | info->imra_value = 0xffff; |
563 | info->imrb_value = 0xffff; | 563 | info->imrb_value = 0xffff; |
564 | info->pim_value = 0xff; | 564 | info->pim_value = 0xff; |
@@ -600,7 +600,7 @@ static int mgslpc_config(struct pcmcia_device *link) | |||
600 | u_char buf[64]; | 600 | u_char buf[64]; |
601 | cistpl_cftable_entry_t dflt = { 0 }; | 601 | cistpl_cftable_entry_t dflt = { 0 }; |
602 | cistpl_cftable_entry_t *cfg; | 602 | cistpl_cftable_entry_t *cfg; |
603 | 603 | ||
604 | if (debug_level >= DEBUG_LEVEL_INFO) | 604 | if (debug_level >= DEBUG_LEVEL_INFO) |
605 | printk("mgslpc_config(0x%p)\n", link); | 605 | printk("mgslpc_config(0x%p)\n", link); |
606 | 606 | ||
@@ -624,7 +624,7 @@ static int mgslpc_config(struct pcmcia_device *link) | |||
624 | 624 | ||
625 | link->conf.ConfigIndex = cfg->index; | 625 | link->conf.ConfigIndex = cfg->index; |
626 | link->conf.Attributes |= CONF_ENABLE_IRQ; | 626 | link->conf.Attributes |= CONF_ENABLE_IRQ; |
627 | 627 | ||
628 | /* IO window settings */ | 628 | /* IO window settings */ |
629 | link->io.NumPorts1 = 0; | 629 | link->io.NumPorts1 = 0; |
630 | if ((cfg->io.nwin > 0) || (dflt.io.nwin > 0)) { | 630 | if ((cfg->io.nwin > 0) || (dflt.io.nwin > 0)) { |
@@ -644,7 +644,7 @@ static int mgslpc_config(struct pcmcia_device *link) | |||
644 | link->conf.IntType = INT_MEMORY_AND_IO; | 644 | link->conf.IntType = INT_MEMORY_AND_IO; |
645 | link->conf.ConfigIndex = 8; | 645 | link->conf.ConfigIndex = 8; |
646 | link->conf.Present = PRESENT_OPTION; | 646 | link->conf.Present = PRESENT_OPTION; |
647 | 647 | ||
648 | link->irq.Attributes |= IRQ_HANDLE_PRESENT; | 648 | link->irq.Attributes |= IRQ_HANDLE_PRESENT; |
649 | link->irq.Handler = mgslpc_isr; | 649 | link->irq.Handler = mgslpc_isr; |
650 | link->irq.Instance = info; | 650 | link->irq.Instance = info; |
@@ -753,10 +753,10 @@ static inline int mgslpc_paranoia_check(MGSLPC_INFO *info, | |||
753 | #define CMD_TXEOM BIT1 // transmit end message | 753 | #define CMD_TXEOM BIT1 // transmit end message |
754 | #define CMD_TXRESET BIT0 // transmit reset | 754 | #define CMD_TXRESET BIT0 // transmit reset |
755 | 755 | ||
756 | static BOOLEAN wait_command_complete(MGSLPC_INFO *info, unsigned char channel) | 756 | static BOOLEAN wait_command_complete(MGSLPC_INFO *info, unsigned char channel) |
757 | { | 757 | { |
758 | int i = 0; | 758 | int i = 0; |
759 | /* wait for command completion */ | 759 | /* wait for command completion */ |
760 | while (read_reg(info, (unsigned char)(channel+STAR)) & BIT2) { | 760 | while (read_reg(info, (unsigned char)(channel+STAR)) & BIT2) { |
761 | udelay(1); | 761 | udelay(1); |
762 | if (i++ == 1000) | 762 | if (i++ == 1000) |
@@ -765,7 +765,7 @@ static BOOLEAN wait_command_complete(MGSLPC_INFO *info, unsigned char channel) | |||
765 | return TRUE; | 765 | return TRUE; |
766 | } | 766 | } |
767 | 767 | ||
768 | static void issue_command(MGSLPC_INFO *info, unsigned char channel, unsigned char cmd) | 768 | static void issue_command(MGSLPC_INFO *info, unsigned char channel, unsigned char cmd) |
769 | { | 769 | { |
770 | wait_command_complete(info, channel); | 770 | wait_command_complete(info, channel); |
771 | write_reg(info, (unsigned char) (channel + CMDR), cmd); | 771 | write_reg(info, (unsigned char) (channel + CMDR), cmd); |
@@ -775,12 +775,12 @@ static void tx_pause(struct tty_struct *tty) | |||
775 | { | 775 | { |
776 | MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data; | 776 | MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data; |
777 | unsigned long flags; | 777 | unsigned long flags; |
778 | 778 | ||
779 | if (mgslpc_paranoia_check(info, tty->name, "tx_pause")) | 779 | if (mgslpc_paranoia_check(info, tty->name, "tx_pause")) |
780 | return; | 780 | return; |
781 | if (debug_level >= DEBUG_LEVEL_INFO) | 781 | if (debug_level >= DEBUG_LEVEL_INFO) |
782 | printk("tx_pause(%s)\n",info->device_name); | 782 | printk("tx_pause(%s)\n",info->device_name); |
783 | 783 | ||
784 | spin_lock_irqsave(&info->lock,flags); | 784 | spin_lock_irqsave(&info->lock,flags); |
785 | if (info->tx_enabled) | 785 | if (info->tx_enabled) |
786 | tx_stop(info); | 786 | tx_stop(info); |
@@ -791,12 +791,12 @@ static void tx_release(struct tty_struct *tty) | |||
791 | { | 791 | { |
792 | MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data; | 792 | MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data; |
793 | unsigned long flags; | 793 | unsigned long flags; |
794 | 794 | ||
795 | if (mgslpc_paranoia_check(info, tty->name, "tx_release")) | 795 | if (mgslpc_paranoia_check(info, tty->name, "tx_release")) |
796 | return; | 796 | return; |
797 | if (debug_level >= DEBUG_LEVEL_INFO) | 797 | if (debug_level >= DEBUG_LEVEL_INFO) |
798 | printk("tx_release(%s)\n",info->device_name); | 798 | printk("tx_release(%s)\n",info->device_name); |
799 | 799 | ||
800 | spin_lock_irqsave(&info->lock,flags); | 800 | spin_lock_irqsave(&info->lock,flags); |
801 | if (!info->tx_enabled) | 801 | if (!info->tx_enabled) |
802 | tx_start(info); | 802 | tx_start(info); |
@@ -810,7 +810,7 @@ static int bh_action(MGSLPC_INFO *info) | |||
810 | { | 810 | { |
811 | unsigned long flags; | 811 | unsigned long flags; |
812 | int rc = 0; | 812 | int rc = 0; |
813 | 813 | ||
814 | spin_lock_irqsave(&info->lock,flags); | 814 | spin_lock_irqsave(&info->lock,flags); |
815 | 815 | ||
816 | if (info->pending_bh & BH_RECEIVE) { | 816 | if (info->pending_bh & BH_RECEIVE) { |
@@ -829,9 +829,9 @@ static int bh_action(MGSLPC_INFO *info) | |||
829 | info->bh_running = 0; | 829 | info->bh_running = 0; |
830 | info->bh_requested = 0; | 830 | info->bh_requested = 0; |
831 | } | 831 | } |
832 | 832 | ||
833 | spin_unlock_irqrestore(&info->lock,flags); | 833 | spin_unlock_irqrestore(&info->lock,flags); |
834 | 834 | ||
835 | return rc; | 835 | return rc; |
836 | } | 836 | } |
837 | 837 | ||
@@ -842,22 +842,22 @@ static void bh_handler(struct work_struct *work) | |||
842 | 842 | ||
843 | if (!info) | 843 | if (!info) |
844 | return; | 844 | return; |
845 | 845 | ||
846 | if (debug_level >= DEBUG_LEVEL_BH) | 846 | if (debug_level >= DEBUG_LEVEL_BH) |
847 | printk( "%s(%d):bh_handler(%s) entry\n", | 847 | printk( "%s(%d):bh_handler(%s) entry\n", |
848 | __FILE__,__LINE__,info->device_name); | 848 | __FILE__,__LINE__,info->device_name); |
849 | 849 | ||
850 | info->bh_running = 1; | 850 | info->bh_running = 1; |
851 | 851 | ||
852 | while((action = bh_action(info)) != 0) { | 852 | while((action = bh_action(info)) != 0) { |
853 | 853 | ||
854 | /* Process work item */ | 854 | /* Process work item */ |
855 | if ( debug_level >= DEBUG_LEVEL_BH ) | 855 | if ( debug_level >= DEBUG_LEVEL_BH ) |
856 | printk( "%s(%d):bh_handler() work item action=%d\n", | 856 | printk( "%s(%d):bh_handler() work item action=%d\n", |
857 | __FILE__,__LINE__,action); | 857 | __FILE__,__LINE__,action); |
858 | 858 | ||
859 | switch (action) { | 859 | switch (action) { |
860 | 860 | ||
861 | case BH_RECEIVE: | 861 | case BH_RECEIVE: |
862 | while(rx_get_frame(info)); | 862 | while(rx_get_frame(info)); |
863 | break; | 863 | break; |
@@ -897,7 +897,7 @@ static void bh_status(MGSLPC_INFO *info) | |||
897 | info->cts_chkcount = 0; | 897 | info->cts_chkcount = 0; |
898 | } | 898 | } |
899 | 899 | ||
900 | /* eom: non-zero = end of frame */ | 900 | /* eom: non-zero = end of frame */ |
901 | static void rx_ready_hdlc(MGSLPC_INFO *info, int eom) | 901 | static void rx_ready_hdlc(MGSLPC_INFO *info, int eom) |
902 | { | 902 | { |
903 | unsigned char data[2]; | 903 | unsigned char data[2]; |
@@ -906,7 +906,7 @@ static void rx_ready_hdlc(MGSLPC_INFO *info, int eom) | |||
906 | 906 | ||
907 | if (debug_level >= DEBUG_LEVEL_ISR) | 907 | if (debug_level >= DEBUG_LEVEL_ISR) |
908 | printk("%s(%d):rx_ready_hdlc(eom=%d)\n",__FILE__,__LINE__,eom); | 908 | printk("%s(%d):rx_ready_hdlc(eom=%d)\n",__FILE__,__LINE__,eom); |
909 | 909 | ||
910 | if (!info->rx_enabled) | 910 | if (!info->rx_enabled) |
911 | return; | 911 | return; |
912 | 912 | ||
@@ -920,12 +920,12 @@ static void rx_ready_hdlc(MGSLPC_INFO *info, int eom) | |||
920 | } | 920 | } |
921 | 921 | ||
922 | if (eom) { | 922 | if (eom) { |
923 | /* end of frame, get FIFO count from RBCL register */ | 923 | /* end of frame, get FIFO count from RBCL register */ |
924 | if (!(fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f))) | 924 | if (!(fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f))) |
925 | fifo_count = 32; | 925 | fifo_count = 32; |
926 | } else | 926 | } else |
927 | fifo_count = 32; | 927 | fifo_count = 32; |
928 | 928 | ||
929 | do { | 929 | do { |
930 | if (fifo_count == 1) { | 930 | if (fifo_count == 1) { |
931 | read_count = 1; | 931 | read_count = 1; |
@@ -969,7 +969,7 @@ static void rx_ready_async(MGSLPC_INFO *info, int tcd) | |||
969 | struct mgsl_icount *icount = &info->icount; | 969 | struct mgsl_icount *icount = &info->icount; |
970 | 970 | ||
971 | if (tcd) { | 971 | if (tcd) { |
972 | /* early termination, get FIFO count from RBCL register */ | 972 | /* early termination, get FIFO count from RBCL register */ |
973 | fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f); | 973 | fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f); |
974 | 974 | ||
975 | /* Zero fifo count could mean 0 or 32 bytes available. | 975 | /* Zero fifo count could mean 0 or 32 bytes available. |
@@ -981,7 +981,7 @@ static void rx_ready_async(MGSLPC_INFO *info, int tcd) | |||
981 | fifo_count = 32; | 981 | fifo_count = 32; |
982 | 982 | ||
983 | tty_buffer_request_room(tty, fifo_count); | 983 | tty_buffer_request_room(tty, fifo_count); |
984 | /* Flush received async data to receive data buffer. */ | 984 | /* Flush received async data to receive data buffer. */ |
985 | while (fifo_count) { | 985 | while (fifo_count) { |
986 | data = read_reg(info, CHA + RXFIFO); | 986 | data = read_reg(info, CHA + RXFIFO); |
987 | status = read_reg(info, CHA + RXFIFO); | 987 | status = read_reg(info, CHA + RXFIFO); |
@@ -995,7 +995,7 @@ static void rx_ready_async(MGSLPC_INFO *info, int tcd) | |||
995 | // BIT6:framing error | 995 | // BIT6:framing error |
996 | 996 | ||
997 | if (status & (BIT7 + BIT6)) { | 997 | if (status & (BIT7 + BIT6)) { |
998 | if (status & BIT7) | 998 | if (status & BIT7) |
999 | icount->parity++; | 999 | icount->parity++; |
1000 | else | 1000 | else |
1001 | icount->frame++; | 1001 | icount->frame++; |
@@ -1003,7 +1003,7 @@ static void rx_ready_async(MGSLPC_INFO *info, int tcd) | |||
1003 | /* discard char if tty control flags say so */ | 1003 | /* discard char if tty control flags say so */ |
1004 | if (status & info->ignore_status_mask) | 1004 | if (status & info->ignore_status_mask) |
1005 | continue; | 1005 | continue; |
1006 | 1006 | ||
1007 | status &= info->read_status_mask; | 1007 | status &= info->read_status_mask; |
1008 | 1008 | ||
1009 | if (status & BIT7) | 1009 | if (status & BIT7) |
@@ -1022,7 +1022,7 @@ static void rx_ready_async(MGSLPC_INFO *info, int tcd) | |||
1022 | __FILE__,__LINE__,icount->rx,icount->brk, | 1022 | __FILE__,__LINE__,icount->rx,icount->brk, |
1023 | icount->parity,icount->frame,icount->overrun); | 1023 | icount->parity,icount->frame,icount->overrun); |
1024 | } | 1024 | } |
1025 | 1025 | ||
1026 | if (work) | 1026 | if (work) |
1027 | tty_flip_buffer_push(tty); | 1027 | tty_flip_buffer_push(tty); |
1028 | } | 1028 | } |
@@ -1032,7 +1032,7 @@ static void tx_done(MGSLPC_INFO *info) | |||
1032 | { | 1032 | { |
1033 | if (!info->tx_active) | 1033 | if (!info->tx_active) |
1034 | return; | 1034 | return; |
1035 | 1035 | ||
1036 | info->tx_active = 0; | 1036 | info->tx_active = 0; |
1037 | info->tx_aborting = 0; | 1037 | info->tx_aborting = 0; |
1038 | 1038 | ||
@@ -1040,8 +1040,8 @@ static void tx_done(MGSLPC_INFO *info) | |||
1040 | return; | 1040 | return; |
1041 | 1041 | ||
1042 | info->tx_count = info->tx_put = info->tx_get = 0; | 1042 | info->tx_count = info->tx_put = info->tx_get = 0; |
1043 | del_timer(&info->tx_timer); | 1043 | del_timer(&info->tx_timer); |
1044 | 1044 | ||
1045 | if (info->drop_rts_on_tx_done) { | 1045 | if (info->drop_rts_on_tx_done) { |
1046 | get_signals(info); | 1046 | get_signals(info); |
1047 | if (info->serial_signals & SerialSignal_RTS) { | 1047 | if (info->serial_signals & SerialSignal_RTS) { |
@@ -1054,7 +1054,7 @@ static void tx_done(MGSLPC_INFO *info) | |||
1054 | #if SYNCLINK_GENERIC_HDLC | 1054 | #if SYNCLINK_GENERIC_HDLC |
1055 | if (info->netcount) | 1055 | if (info->netcount) |
1056 | hdlcdev_tx_done(info); | 1056 | hdlcdev_tx_done(info); |
1057 | else | 1057 | else |
1058 | #endif | 1058 | #endif |
1059 | { | 1059 | { |
1060 | if (info->tty->stopped || info->tty->hw_stopped) { | 1060 | if (info->tty->stopped || info->tty->hw_stopped) { |
@@ -1090,7 +1090,7 @@ static void tx_ready(MGSLPC_INFO *info) | |||
1090 | 1090 | ||
1091 | while (info->tx_count && fifo_count) { | 1091 | while (info->tx_count && fifo_count) { |
1092 | c = min(2, min_t(int, fifo_count, min(info->tx_count, TXBUFSIZE - info->tx_get))); | 1092 | c = min(2, min_t(int, fifo_count, min(info->tx_count, TXBUFSIZE - info->tx_get))); |
1093 | 1093 | ||
1094 | if (c == 1) { | 1094 | if (c == 1) { |
1095 | write_reg(info, CHA + TXFIFO, *(info->tx_buf + info->tx_get)); | 1095 | write_reg(info, CHA + TXFIFO, *(info->tx_buf + info->tx_get)); |
1096 | } else { | 1096 | } else { |
@@ -1220,9 +1220,9 @@ static void ri_change(MGSLPC_INFO *info) | |||
1220 | } | 1220 | } |
1221 | 1221 | ||
1222 | /* Interrupt service routine entry point. | 1222 | /* Interrupt service routine entry point. |
1223 | * | 1223 | * |
1224 | * Arguments: | 1224 | * Arguments: |
1225 | * | 1225 | * |
1226 | * irq interrupt number that caused interrupt | 1226 | * irq interrupt number that caused interrupt |
1227 | * dev_id device ID supplied during interrupt registration | 1227 | * dev_id device ID supplied during interrupt registration |
1228 | */ | 1228 | */ |
@@ -1233,18 +1233,18 @@ static irqreturn_t mgslpc_isr(int irq, void *dev_id) | |||
1233 | unsigned char gis, pis; | 1233 | unsigned char gis, pis; |
1234 | int count=0; | 1234 | int count=0; |
1235 | 1235 | ||
1236 | if (debug_level >= DEBUG_LEVEL_ISR) | 1236 | if (debug_level >= DEBUG_LEVEL_ISR) |
1237 | printk("mgslpc_isr(%d) entry.\n", irq); | 1237 | printk("mgslpc_isr(%d) entry.\n", irq); |
1238 | if (!info) | 1238 | if (!info) |
1239 | return IRQ_NONE; | 1239 | return IRQ_NONE; |
1240 | 1240 | ||
1241 | if (!(info->p_dev->_locked)) | 1241 | if (!(info->p_dev->_locked)) |
1242 | return IRQ_HANDLED; | 1242 | return IRQ_HANDLED; |
1243 | 1243 | ||
1244 | spin_lock(&info->lock); | 1244 | spin_lock(&info->lock); |
1245 | 1245 | ||
1246 | while ((gis = read_reg(info, CHA + GIS))) { | 1246 | while ((gis = read_reg(info, CHA + GIS))) { |
1247 | if (debug_level >= DEBUG_LEVEL_ISR) | 1247 | if (debug_level >= DEBUG_LEVEL_ISR) |
1248 | printk("mgslpc_isr %s gis=%04X\n", info->device_name,gis); | 1248 | printk("mgslpc_isr %s gis=%04X\n", info->device_name,gis); |
1249 | 1249 | ||
1250 | if ((gis & 0x70) || count > 1000) { | 1250 | if ((gis & 0x70) || count > 1000) { |
@@ -1268,7 +1268,7 @@ static irqreturn_t mgslpc_isr(int irq, void *dev_id) | |||
1268 | irq_disable(info, CHA, IRQ_TIMER); | 1268 | irq_disable(info, CHA, IRQ_TIMER); |
1269 | } | 1269 | } |
1270 | 1270 | ||
1271 | /* receive IRQs */ | 1271 | /* receive IRQs */ |
1272 | if (isr & IRQ_EXITHUNT) { | 1272 | if (isr & IRQ_EXITHUNT) { |
1273 | info->icount.exithunt++; | 1273 | info->icount.exithunt++; |
1274 | wake_up_interruptible(&info->event_wait_q); | 1274 | wake_up_interruptible(&info->event_wait_q); |
@@ -1283,12 +1283,12 @@ static irqreturn_t mgslpc_isr(int irq, void *dev_id) | |||
1283 | } | 1283 | } |
1284 | if (isr & (IRQ_RXEOM + IRQ_RXFIFO)) { | 1284 | if (isr & (IRQ_RXEOM + IRQ_RXFIFO)) { |
1285 | if (info->params.mode == MGSL_MODE_HDLC) | 1285 | if (info->params.mode == MGSL_MODE_HDLC) |
1286 | rx_ready_hdlc(info, isr & IRQ_RXEOM); | 1286 | rx_ready_hdlc(info, isr & IRQ_RXEOM); |
1287 | else | 1287 | else |
1288 | rx_ready_async(info, isr & IRQ_RXEOM); | 1288 | rx_ready_async(info, isr & IRQ_RXEOM); |
1289 | } | 1289 | } |
1290 | 1290 | ||
1291 | /* transmit IRQs */ | 1291 | /* transmit IRQs */ |
1292 | if (isr & IRQ_UNDERRUN) { | 1292 | if (isr & IRQ_UNDERRUN) { |
1293 | if (info->tx_aborting) | 1293 | if (info->tx_aborting) |
1294 | info->icount.txabort++; | 1294 | info->icount.txabort++; |
@@ -1311,13 +1311,13 @@ static irqreturn_t mgslpc_isr(int irq, void *dev_id) | |||
1311 | ri_change(info); | 1311 | ri_change(info); |
1312 | } | 1312 | } |
1313 | } | 1313 | } |
1314 | 1314 | ||
1315 | /* Request bottom half processing if there's something | 1315 | /* Request bottom half processing if there's something |
1316 | * for it to do and the bh is not already running | 1316 | * for it to do and the bh is not already running |
1317 | */ | 1317 | */ |
1318 | 1318 | ||
1319 | if (info->pending_bh && !info->bh_running && !info->bh_requested) { | 1319 | if (info->pending_bh && !info->bh_running && !info->bh_requested) { |
1320 | if ( debug_level >= DEBUG_LEVEL_ISR ) | 1320 | if ( debug_level >= DEBUG_LEVEL_ISR ) |
1321 | printk("%s(%d):%s queueing bh task.\n", | 1321 | printk("%s(%d):%s queueing bh task.\n", |
1322 | __FILE__,__LINE__,info->device_name); | 1322 | __FILE__,__LINE__,info->device_name); |
1323 | schedule_work(&info->task); | 1323 | schedule_work(&info->task); |
@@ -1325,8 +1325,8 @@ static irqreturn_t mgslpc_isr(int irq, void *dev_id) | |||
1325 | } | 1325 | } |
1326 | 1326 | ||
1327 | spin_unlock(&info->lock); | 1327 | spin_unlock(&info->lock); |
1328 | 1328 | ||
1329 | if (debug_level >= DEBUG_LEVEL_ISR) | 1329 | if (debug_level >= DEBUG_LEVEL_ISR) |
1330 | printk("%s(%d):mgslpc_isr(%d)exit.\n", | 1330 | printk("%s(%d):mgslpc_isr(%d)exit.\n", |
1331 | __FILE__,__LINE__,irq); | 1331 | __FILE__,__LINE__,irq); |
1332 | 1332 | ||
@@ -1338,13 +1338,13 @@ static irqreturn_t mgslpc_isr(int irq, void *dev_id) | |||
1338 | static int startup(MGSLPC_INFO * info) | 1338 | static int startup(MGSLPC_INFO * info) |
1339 | { | 1339 | { |
1340 | int retval = 0; | 1340 | int retval = 0; |
1341 | 1341 | ||
1342 | if (debug_level >= DEBUG_LEVEL_INFO) | 1342 | if (debug_level >= DEBUG_LEVEL_INFO) |
1343 | printk("%s(%d):startup(%s)\n",__FILE__,__LINE__,info->device_name); | 1343 | printk("%s(%d):startup(%s)\n",__FILE__,__LINE__,info->device_name); |
1344 | 1344 | ||
1345 | if (info->flags & ASYNC_INITIALIZED) | 1345 | if (info->flags & ASYNC_INITIALIZED) |
1346 | return 0; | 1346 | return 0; |
1347 | 1347 | ||
1348 | if (!info->tx_buf) { | 1348 | if (!info->tx_buf) { |
1349 | /* allocate a page of memory for a transmit buffer */ | 1349 | /* allocate a page of memory for a transmit buffer */ |
1350 | info->tx_buf = (unsigned char *)get_zeroed_page(GFP_KERNEL); | 1350 | info->tx_buf = (unsigned char *)get_zeroed_page(GFP_KERNEL); |
@@ -1356,18 +1356,18 @@ static int startup(MGSLPC_INFO * info) | |||
1356 | } | 1356 | } |
1357 | 1357 | ||
1358 | info->pending_bh = 0; | 1358 | info->pending_bh = 0; |
1359 | 1359 | ||
1360 | memset(&info->icount, 0, sizeof(info->icount)); | 1360 | memset(&info->icount, 0, sizeof(info->icount)); |
1361 | 1361 | ||
1362 | setup_timer(&info->tx_timer, tx_timeout, (unsigned long)info); | 1362 | setup_timer(&info->tx_timer, tx_timeout, (unsigned long)info); |
1363 | 1363 | ||
1364 | /* Allocate and claim adapter resources */ | 1364 | /* Allocate and claim adapter resources */ |
1365 | retval = claim_resources(info); | 1365 | retval = claim_resources(info); |
1366 | 1366 | ||
1367 | /* perform existance check and diagnostics */ | 1367 | /* perform existance check and diagnostics */ |
1368 | if ( !retval ) | 1368 | if ( !retval ) |
1369 | retval = adapter_test(info); | 1369 | retval = adapter_test(info); |
1370 | 1370 | ||
1371 | if ( retval ) { | 1371 | if ( retval ) { |
1372 | if (capable(CAP_SYS_ADMIN) && info->tty) | 1372 | if (capable(CAP_SYS_ADMIN) && info->tty) |
1373 | set_bit(TTY_IO_ERROR, &info->tty->flags); | 1373 | set_bit(TTY_IO_ERROR, &info->tty->flags); |
@@ -1377,12 +1377,12 @@ static int startup(MGSLPC_INFO * info) | |||
1377 | 1377 | ||
1378 | /* program hardware for current parameters */ | 1378 | /* program hardware for current parameters */ |
1379 | mgslpc_change_params(info); | 1379 | mgslpc_change_params(info); |
1380 | 1380 | ||
1381 | if (info->tty) | 1381 | if (info->tty) |
1382 | clear_bit(TTY_IO_ERROR, &info->tty->flags); | 1382 | clear_bit(TTY_IO_ERROR, &info->tty->flags); |
1383 | 1383 | ||
1384 | info->flags |= ASYNC_INITIALIZED; | 1384 | info->flags |= ASYNC_INITIALIZED; |
1385 | 1385 | ||
1386 | return 0; | 1386 | return 0; |
1387 | } | 1387 | } |
1388 | 1388 | ||
@@ -1391,7 +1391,7 @@ static int startup(MGSLPC_INFO * info) | |||
1391 | static void shutdown(MGSLPC_INFO * info) | 1391 | static void shutdown(MGSLPC_INFO * info) |
1392 | { | 1392 | { |
1393 | unsigned long flags; | 1393 | unsigned long flags; |
1394 | 1394 | ||
1395 | if (!(info->flags & ASYNC_INITIALIZED)) | 1395 | if (!(info->flags & ASYNC_INITIALIZED)) |
1396 | return; | 1396 | return; |
1397 | 1397 | ||
@@ -1418,16 +1418,16 @@ static void shutdown(MGSLPC_INFO * info) | |||
1418 | 1418 | ||
1419 | /* TODO:disable interrupts instead of reset to preserve signal states */ | 1419 | /* TODO:disable interrupts instead of reset to preserve signal states */ |
1420 | reset_device(info); | 1420 | reset_device(info); |
1421 | 1421 | ||
1422 | if (!info->tty || info->tty->termios->c_cflag & HUPCL) { | 1422 | if (!info->tty || info->tty->termios->c_cflag & HUPCL) { |
1423 | info->serial_signals &= ~(SerialSignal_DTR + SerialSignal_RTS); | 1423 | info->serial_signals &= ~(SerialSignal_DTR + SerialSignal_RTS); |
1424 | set_signals(info); | 1424 | set_signals(info); |
1425 | } | 1425 | } |
1426 | 1426 | ||
1427 | spin_unlock_irqrestore(&info->lock,flags); | 1427 | spin_unlock_irqrestore(&info->lock,flags); |
1428 | 1428 | ||
1429 | release_resources(info); | 1429 | release_resources(info); |
1430 | 1430 | ||
1431 | if (info->tty) | 1431 | if (info->tty) |
1432 | set_bit(TTY_IO_ERROR, &info->tty->flags); | 1432 | set_bit(TTY_IO_ERROR, &info->tty->flags); |
1433 | 1433 | ||
@@ -1439,18 +1439,18 @@ static void mgslpc_program_hw(MGSLPC_INFO *info) | |||
1439 | unsigned long flags; | 1439 | unsigned long flags; |
1440 | 1440 | ||
1441 | spin_lock_irqsave(&info->lock,flags); | 1441 | spin_lock_irqsave(&info->lock,flags); |
1442 | 1442 | ||
1443 | rx_stop(info); | 1443 | rx_stop(info); |
1444 | tx_stop(info); | 1444 | tx_stop(info); |
1445 | info->tx_count = info->tx_put = info->tx_get = 0; | 1445 | info->tx_count = info->tx_put = info->tx_get = 0; |
1446 | 1446 | ||
1447 | if (info->params.mode == MGSL_MODE_HDLC || info->netcount) | 1447 | if (info->params.mode == MGSL_MODE_HDLC || info->netcount) |
1448 | hdlc_mode(info); | 1448 | hdlc_mode(info); |
1449 | else | 1449 | else |
1450 | async_mode(info); | 1450 | async_mode(info); |
1451 | 1451 | ||
1452 | set_signals(info); | 1452 | set_signals(info); |
1453 | 1453 | ||
1454 | info->dcd_chkcount = 0; | 1454 | info->dcd_chkcount = 0; |
1455 | info->cts_chkcount = 0; | 1455 | info->cts_chkcount = 0; |
1456 | info->ri_chkcount = 0; | 1456 | info->ri_chkcount = 0; |
@@ -1459,10 +1459,10 @@ static void mgslpc_program_hw(MGSLPC_INFO *info) | |||
1459 | irq_enable(info, CHB, IRQ_DCD | IRQ_CTS); | 1459 | irq_enable(info, CHB, IRQ_DCD | IRQ_CTS); |
1460 | port_irq_enable(info, (unsigned char) PVR_DSR | PVR_RI); | 1460 | port_irq_enable(info, (unsigned char) PVR_DSR | PVR_RI); |
1461 | get_signals(info); | 1461 | get_signals(info); |
1462 | 1462 | ||
1463 | if (info->netcount || info->tty->termios->c_cflag & CREAD) | 1463 | if (info->netcount || info->tty->termios->c_cflag & CREAD) |
1464 | rx_start(info); | 1464 | rx_start(info); |
1465 | 1465 | ||
1466 | spin_unlock_irqrestore(&info->lock,flags); | 1466 | spin_unlock_irqrestore(&info->lock,flags); |
1467 | } | 1467 | } |
1468 | 1468 | ||
@@ -1475,11 +1475,11 @@ static void mgslpc_change_params(MGSLPC_INFO *info) | |||
1475 | 1475 | ||
1476 | if (!info->tty || !info->tty->termios) | 1476 | if (!info->tty || !info->tty->termios) |
1477 | return; | 1477 | return; |
1478 | 1478 | ||
1479 | if (debug_level >= DEBUG_LEVEL_INFO) | 1479 | if (debug_level >= DEBUG_LEVEL_INFO) |
1480 | printk("%s(%d):mgslpc_change_params(%s)\n", | 1480 | printk("%s(%d):mgslpc_change_params(%s)\n", |
1481 | __FILE__,__LINE__, info->device_name ); | 1481 | __FILE__,__LINE__, info->device_name ); |
1482 | 1482 | ||
1483 | cflag = info->tty->termios->c_cflag; | 1483 | cflag = info->tty->termios->c_cflag; |
1484 | 1484 | ||
1485 | /* if B0 rate (hangup) specified then negate DTR and RTS */ | 1485 | /* if B0 rate (hangup) specified then negate DTR and RTS */ |
@@ -1488,9 +1488,9 @@ static void mgslpc_change_params(MGSLPC_INFO *info) | |||
1488 | info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR; | 1488 | info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR; |
1489 | else | 1489 | else |
1490 | info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR); | 1490 | info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR); |
1491 | 1491 | ||
1492 | /* byte size and parity */ | 1492 | /* byte size and parity */ |
1493 | 1493 | ||
1494 | switch (cflag & CSIZE) { | 1494 | switch (cflag & CSIZE) { |
1495 | case CS5: info->params.data_bits = 5; break; | 1495 | case CS5: info->params.data_bits = 5; break; |
1496 | case CS6: info->params.data_bits = 6; break; | 1496 | case CS6: info->params.data_bits = 6; break; |
@@ -1498,7 +1498,7 @@ static void mgslpc_change_params(MGSLPC_INFO *info) | |||
1498 | case CS8: info->params.data_bits = 8; break; | 1498 | case CS8: info->params.data_bits = 8; break; |
1499 | default: info->params.data_bits = 7; break; | 1499 | default: info->params.data_bits = 7; break; |
1500 | } | 1500 | } |
1501 | 1501 | ||
1502 | if (cflag & CSTOPB) | 1502 | if (cflag & CSTOPB) |
1503 | info->params.stop_bits = 2; | 1503 | info->params.stop_bits = 2; |
1504 | else | 1504 | else |
@@ -1519,7 +1519,7 @@ static void mgslpc_change_params(MGSLPC_INFO *info) | |||
1519 | /* calculate number of jiffies to transmit a full | 1519 | /* calculate number of jiffies to transmit a full |
1520 | * FIFO (32 bytes) at specified data rate | 1520 | * FIFO (32 bytes) at specified data rate |
1521 | */ | 1521 | */ |
1522 | bits_per_char = info->params.data_bits + | 1522 | bits_per_char = info->params.data_bits + |
1523 | info->params.stop_bits + 1; | 1523 | info->params.stop_bits + 1; |
1524 | 1524 | ||
1525 | /* if port data rate is set to 460800 or less then | 1525 | /* if port data rate is set to 460800 or less then |
@@ -1529,9 +1529,9 @@ static void mgslpc_change_params(MGSLPC_INFO *info) | |||
1529 | if (info->params.data_rate <= 460800) { | 1529 | if (info->params.data_rate <= 460800) { |
1530 | info->params.data_rate = tty_get_baud_rate(info->tty); | 1530 | info->params.data_rate = tty_get_baud_rate(info->tty); |
1531 | } | 1531 | } |
1532 | 1532 | ||
1533 | if ( info->params.data_rate ) { | 1533 | if ( info->params.data_rate ) { |
1534 | info->timeout = (32*HZ*bits_per_char) / | 1534 | info->timeout = (32*HZ*bits_per_char) / |
1535 | info->params.data_rate; | 1535 | info->params.data_rate; |
1536 | } | 1536 | } |
1537 | info->timeout += HZ/50; /* Add .02 seconds of slop */ | 1537 | info->timeout += HZ/50; /* Add .02 seconds of slop */ |
@@ -1540,14 +1540,14 @@ static void mgslpc_change_params(MGSLPC_INFO *info) | |||
1540 | info->flags |= ASYNC_CTS_FLOW; | 1540 | info->flags |= ASYNC_CTS_FLOW; |
1541 | else | 1541 | else |
1542 | info->flags &= ~ASYNC_CTS_FLOW; | 1542 | info->flags &= ~ASYNC_CTS_FLOW; |
1543 | 1543 | ||
1544 | if (cflag & CLOCAL) | 1544 | if (cflag & CLOCAL) |
1545 | info->flags &= ~ASYNC_CHECK_CD; | 1545 | info->flags &= ~ASYNC_CHECK_CD; |
1546 | else | 1546 | else |
1547 | info->flags |= ASYNC_CHECK_CD; | 1547 | info->flags |= ASYNC_CHECK_CD; |
1548 | 1548 | ||
1549 | /* process tty input control flags */ | 1549 | /* process tty input control flags */ |
1550 | 1550 | ||
1551 | info->read_status_mask = 0; | 1551 | info->read_status_mask = 0; |
1552 | if (I_INPCK(info->tty)) | 1552 | if (I_INPCK(info->tty)) |
1553 | info->read_status_mask |= BIT7 | BIT6; | 1553 | info->read_status_mask |= BIT7 | BIT6; |
@@ -1576,7 +1576,7 @@ static void mgslpc_put_char(struct tty_struct *tty, unsigned char ch) | |||
1576 | return; | 1576 | return; |
1577 | 1577 | ||
1578 | spin_lock_irqsave(&info->lock,flags); | 1578 | spin_lock_irqsave(&info->lock,flags); |
1579 | 1579 | ||
1580 | if (info->params.mode == MGSL_MODE_ASYNC || !info->tx_active) { | 1580 | if (info->params.mode == MGSL_MODE_ASYNC || !info->tx_active) { |
1581 | if (info->tx_count < TXBUFSIZE - 1) { | 1581 | if (info->tx_count < TXBUFSIZE - 1) { |
1582 | info->tx_buf[info->tx_put++] = ch; | 1582 | info->tx_buf[info->tx_put++] = ch; |
@@ -1584,7 +1584,7 @@ static void mgslpc_put_char(struct tty_struct *tty, unsigned char ch) | |||
1584 | info->tx_count++; | 1584 | info->tx_count++; |
1585 | } | 1585 | } |
1586 | } | 1586 | } |
1587 | 1587 | ||
1588 | spin_unlock_irqrestore(&info->lock,flags); | 1588 | spin_unlock_irqrestore(&info->lock,flags); |
1589 | } | 1589 | } |
1590 | 1590 | ||
@@ -1595,11 +1595,11 @@ static void mgslpc_flush_chars(struct tty_struct *tty) | |||
1595 | { | 1595 | { |
1596 | MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data; | 1596 | MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data; |
1597 | unsigned long flags; | 1597 | unsigned long flags; |
1598 | 1598 | ||
1599 | if (debug_level >= DEBUG_LEVEL_INFO) | 1599 | if (debug_level >= DEBUG_LEVEL_INFO) |
1600 | printk( "%s(%d):mgslpc_flush_chars() entry on %s tx_count=%d\n", | 1600 | printk( "%s(%d):mgslpc_flush_chars() entry on %s tx_count=%d\n", |
1601 | __FILE__,__LINE__,info->device_name,info->tx_count); | 1601 | __FILE__,__LINE__,info->device_name,info->tx_count); |
1602 | 1602 | ||
1603 | if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_chars")) | 1603 | if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_chars")) |
1604 | return; | 1604 | return; |
1605 | 1605 | ||
@@ -1618,13 +1618,13 @@ static void mgslpc_flush_chars(struct tty_struct *tty) | |||
1618 | } | 1618 | } |
1619 | 1619 | ||
1620 | /* Send a block of data | 1620 | /* Send a block of data |
1621 | * | 1621 | * |
1622 | * Arguments: | 1622 | * Arguments: |
1623 | * | 1623 | * |
1624 | * tty pointer to tty information structure | 1624 | * tty pointer to tty information structure |
1625 | * buf pointer to buffer containing send data | 1625 | * buf pointer to buffer containing send data |
1626 | * count size of send data in bytes | 1626 | * count size of send data in bytes |
1627 | * | 1627 | * |
1628 | * Returns: number of characters written | 1628 | * Returns: number of characters written |
1629 | */ | 1629 | */ |
1630 | static int mgslpc_write(struct tty_struct * tty, | 1630 | static int mgslpc_write(struct tty_struct * tty, |
@@ -1633,11 +1633,11 @@ static int mgslpc_write(struct tty_struct * tty, | |||
1633 | int c, ret = 0; | 1633 | int c, ret = 0; |
1634 | MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data; | 1634 | MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data; |
1635 | unsigned long flags; | 1635 | unsigned long flags; |
1636 | 1636 | ||
1637 | if (debug_level >= DEBUG_LEVEL_INFO) | 1637 | if (debug_level >= DEBUG_LEVEL_INFO) |
1638 | printk( "%s(%d):mgslpc_write(%s) count=%d\n", | 1638 | printk( "%s(%d):mgslpc_write(%s) count=%d\n", |
1639 | __FILE__,__LINE__,info->device_name,count); | 1639 | __FILE__,__LINE__,info->device_name,count); |
1640 | 1640 | ||
1641 | if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write") || | 1641 | if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write") || |
1642 | !info->tx_buf) | 1642 | !info->tx_buf) |
1643 | goto cleanup; | 1643 | goto cleanup; |
@@ -1659,7 +1659,7 @@ static int mgslpc_write(struct tty_struct * tty, | |||
1659 | TXBUFSIZE - info->tx_put)); | 1659 | TXBUFSIZE - info->tx_put)); |
1660 | if (c <= 0) | 1660 | if (c <= 0) |
1661 | break; | 1661 | break; |
1662 | 1662 | ||
1663 | memcpy(info->tx_buf + info->tx_put, buf, c); | 1663 | memcpy(info->tx_buf + info->tx_put, buf, c); |
1664 | 1664 | ||
1665 | spin_lock_irqsave(&info->lock,flags); | 1665 | spin_lock_irqsave(&info->lock,flags); |
@@ -1678,7 +1678,7 @@ start: | |||
1678 | tx_start(info); | 1678 | tx_start(info); |
1679 | spin_unlock_irqrestore(&info->lock,flags); | 1679 | spin_unlock_irqrestore(&info->lock,flags); |
1680 | } | 1680 | } |
1681 | cleanup: | 1681 | cleanup: |
1682 | if (debug_level >= DEBUG_LEVEL_INFO) | 1682 | if (debug_level >= DEBUG_LEVEL_INFO) |
1683 | printk( "%s(%d):mgslpc_write(%s) returning=%d\n", | 1683 | printk( "%s(%d):mgslpc_write(%s) returning=%d\n", |
1684 | __FILE__,__LINE__,info->device_name,ret); | 1684 | __FILE__,__LINE__,info->device_name,ret); |
@@ -1691,7 +1691,7 @@ static int mgslpc_write_room(struct tty_struct *tty) | |||
1691 | { | 1691 | { |
1692 | MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data; | 1692 | MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data; |
1693 | int ret; | 1693 | int ret; |
1694 | 1694 | ||
1695 | if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write_room")) | 1695 | if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write_room")) |
1696 | return 0; | 1696 | return 0; |
1697 | 1697 | ||
@@ -1706,7 +1706,7 @@ static int mgslpc_write_room(struct tty_struct *tty) | |||
1706 | if (ret < 0) | 1706 | if (ret < 0) |
1707 | ret = 0; | 1707 | ret = 0; |
1708 | } | 1708 | } |
1709 | 1709 | ||
1710 | if (debug_level >= DEBUG_LEVEL_INFO) | 1710 | if (debug_level >= DEBUG_LEVEL_INFO) |
1711 | printk("%s(%d):mgslpc_write_room(%s)=%d\n", | 1711 | printk("%s(%d):mgslpc_write_room(%s)=%d\n", |
1712 | __FILE__,__LINE__, info->device_name, ret); | 1712 | __FILE__,__LINE__, info->device_name, ret); |
@@ -1719,14 +1719,14 @@ static int mgslpc_chars_in_buffer(struct tty_struct *tty) | |||
1719 | { | 1719 | { |
1720 | MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data; | 1720 | MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data; |
1721 | int rc; | 1721 | int rc; |
1722 | 1722 | ||
1723 | if (debug_level >= DEBUG_LEVEL_INFO) | 1723 | if (debug_level >= DEBUG_LEVEL_INFO) |
1724 | printk("%s(%d):mgslpc_chars_in_buffer(%s)\n", | 1724 | printk("%s(%d):mgslpc_chars_in_buffer(%s)\n", |
1725 | __FILE__,__LINE__, info->device_name ); | 1725 | __FILE__,__LINE__, info->device_name ); |
1726 | 1726 | ||
1727 | if (mgslpc_paranoia_check(info, tty->name, "mgslpc_chars_in_buffer")) | 1727 | if (mgslpc_paranoia_check(info, tty->name, "mgslpc_chars_in_buffer")) |
1728 | return 0; | 1728 | return 0; |
1729 | 1729 | ||
1730 | if (info->params.mode == MGSL_MODE_HDLC) | 1730 | if (info->params.mode == MGSL_MODE_HDLC) |
1731 | rc = info->tx_active ? info->max_frame_size : 0; | 1731 | rc = info->tx_active ? info->max_frame_size : 0; |
1732 | else | 1732 | else |
@@ -1735,7 +1735,7 @@ static int mgslpc_chars_in_buffer(struct tty_struct *tty) | |||
1735 | if (debug_level >= DEBUG_LEVEL_INFO) | 1735 | if (debug_level >= DEBUG_LEVEL_INFO) |
1736 | printk("%s(%d):mgslpc_chars_in_buffer(%s)=%d\n", | 1736 | printk("%s(%d):mgslpc_chars_in_buffer(%s)=%d\n", |
1737 | __FILE__,__LINE__, info->device_name, rc); | 1737 | __FILE__,__LINE__, info->device_name, rc); |
1738 | 1738 | ||
1739 | return rc; | 1739 | return rc; |
1740 | } | 1740 | } |
1741 | 1741 | ||
@@ -1745,17 +1745,17 @@ static void mgslpc_flush_buffer(struct tty_struct *tty) | |||
1745 | { | 1745 | { |
1746 | MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data; | 1746 | MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data; |
1747 | unsigned long flags; | 1747 | unsigned long flags; |
1748 | 1748 | ||
1749 | if (debug_level >= DEBUG_LEVEL_INFO) | 1749 | if (debug_level >= DEBUG_LEVEL_INFO) |
1750 | printk("%s(%d):mgslpc_flush_buffer(%s) entry\n", | 1750 | printk("%s(%d):mgslpc_flush_buffer(%s) entry\n", |
1751 | __FILE__,__LINE__, info->device_name ); | 1751 | __FILE__,__LINE__, info->device_name ); |
1752 | 1752 | ||
1753 | if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_buffer")) | 1753 | if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_buffer")) |
1754 | return; | 1754 | return; |
1755 | 1755 | ||
1756 | spin_lock_irqsave(&info->lock,flags); | 1756 | spin_lock_irqsave(&info->lock,flags); |
1757 | info->tx_count = info->tx_put = info->tx_get = 0; | 1757 | info->tx_count = info->tx_put = info->tx_get = 0; |
1758 | del_timer(&info->tx_timer); | 1758 | del_timer(&info->tx_timer); |
1759 | spin_unlock_irqrestore(&info->lock,flags); | 1759 | spin_unlock_irqrestore(&info->lock,flags); |
1760 | 1760 | ||
1761 | wake_up_interruptible(&tty->write_wait); | 1761 | wake_up_interruptible(&tty->write_wait); |
@@ -1772,7 +1772,7 @@ static void mgslpc_send_xchar(struct tty_struct *tty, char ch) | |||
1772 | if (debug_level >= DEBUG_LEVEL_INFO) | 1772 | if (debug_level >= DEBUG_LEVEL_INFO) |
1773 | printk("%s(%d):mgslpc_send_xchar(%s,%d)\n", | 1773 | printk("%s(%d):mgslpc_send_xchar(%s,%d)\n", |
1774 | __FILE__,__LINE__, info->device_name, ch ); | 1774 | __FILE__,__LINE__, info->device_name, ch ); |
1775 | 1775 | ||
1776 | if (mgslpc_paranoia_check(info, tty->name, "mgslpc_send_xchar")) | 1776 | if (mgslpc_paranoia_check(info, tty->name, "mgslpc_send_xchar")) |
1777 | return; | 1777 | return; |
1778 | 1778 | ||
@@ -1791,17 +1791,17 @@ static void mgslpc_throttle(struct tty_struct * tty) | |||
1791 | { | 1791 | { |
1792 | MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data; | 1792 | MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data; |
1793 | unsigned long flags; | 1793 | unsigned long flags; |
1794 | 1794 | ||
1795 | if (debug_level >= DEBUG_LEVEL_INFO) | 1795 | if (debug_level >= DEBUG_LEVEL_INFO) |
1796 | printk("%s(%d):mgslpc_throttle(%s) entry\n", | 1796 | printk("%s(%d):mgslpc_throttle(%s) entry\n", |
1797 | __FILE__,__LINE__, info->device_name ); | 1797 | __FILE__,__LINE__, info->device_name ); |
1798 | 1798 | ||
1799 | if (mgslpc_paranoia_check(info, tty->name, "mgslpc_throttle")) | 1799 | if (mgslpc_paranoia_check(info, tty->name, "mgslpc_throttle")) |
1800 | return; | 1800 | return; |
1801 | 1801 | ||
1802 | if (I_IXOFF(tty)) | 1802 | if (I_IXOFF(tty)) |
1803 | mgslpc_send_xchar(tty, STOP_CHAR(tty)); | 1803 | mgslpc_send_xchar(tty, STOP_CHAR(tty)); |
1804 | 1804 | ||
1805 | if (tty->termios->c_cflag & CRTSCTS) { | 1805 | if (tty->termios->c_cflag & CRTSCTS) { |
1806 | spin_lock_irqsave(&info->lock,flags); | 1806 | spin_lock_irqsave(&info->lock,flags); |
1807 | info->serial_signals &= ~SerialSignal_RTS; | 1807 | info->serial_signals &= ~SerialSignal_RTS; |
@@ -1816,21 +1816,21 @@ static void mgslpc_unthrottle(struct tty_struct * tty) | |||
1816 | { | 1816 | { |
1817 | MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data; | 1817 | MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data; |
1818 | unsigned long flags; | 1818 | unsigned long flags; |
1819 | 1819 | ||
1820 | if (debug_level >= DEBUG_LEVEL_INFO) | 1820 | if (debug_level >= DEBUG_LEVEL_INFO) |
1821 | printk("%s(%d):mgslpc_unthrottle(%s) entry\n", | 1821 | printk("%s(%d):mgslpc_unthrottle(%s) entry\n", |
1822 | __FILE__,__LINE__, info->device_name ); | 1822 | __FILE__,__LINE__, info->device_name ); |
1823 | 1823 | ||
1824 | if (mgslpc_paranoia_check(info, tty->name, "mgslpc_unthrottle")) | 1824 | if (mgslpc_paranoia_check(info, tty->name, "mgslpc_unthrottle")) |
1825 | return; | 1825 | return; |
1826 | 1826 | ||
1827 | if (I_IXOFF(tty)) { | 1827 | if (I_IXOFF(tty)) { |
1828 | if (info->x_char) | 1828 | if (info->x_char) |
1829 | info->x_char = 0; | 1829 | info->x_char = 0; |
1830 | else | 1830 | else |
1831 | mgslpc_send_xchar(tty, START_CHAR(tty)); | 1831 | mgslpc_send_xchar(tty, START_CHAR(tty)); |
1832 | } | 1832 | } |
1833 | 1833 | ||
1834 | if (tty->termios->c_cflag & CRTSCTS) { | 1834 | if (tty->termios->c_cflag & CRTSCTS) { |
1835 | spin_lock_irqsave(&info->lock,flags); | 1835 | spin_lock_irqsave(&info->lock,flags); |
1836 | info->serial_signals |= SerialSignal_RTS; | 1836 | info->serial_signals |= SerialSignal_RTS; |
@@ -1870,9 +1870,9 @@ static int get_params(MGSLPC_INFO * info, MGSL_PARAMS __user *user_params) | |||
1870 | } | 1870 | } |
1871 | 1871 | ||
1872 | /* set the serial parameters | 1872 | /* set the serial parameters |
1873 | * | 1873 | * |
1874 | * Arguments: | 1874 | * Arguments: |
1875 | * | 1875 | * |
1876 | * info pointer to device instance data | 1876 | * info pointer to device instance data |
1877 | * new_params user buffer containing new serial params | 1877 | * new_params user buffer containing new serial params |
1878 | * | 1878 | * |
@@ -1883,7 +1883,7 @@ static int set_params(MGSLPC_INFO * info, MGSL_PARAMS __user *new_params) | |||
1883 | unsigned long flags; | 1883 | unsigned long flags; |
1884 | MGSL_PARAMS tmp_params; | 1884 | MGSL_PARAMS tmp_params; |
1885 | int err; | 1885 | int err; |
1886 | 1886 | ||
1887 | if (debug_level >= DEBUG_LEVEL_INFO) | 1887 | if (debug_level >= DEBUG_LEVEL_INFO) |
1888 | printk("%s(%d):set_params %s\n", __FILE__,__LINE__, | 1888 | printk("%s(%d):set_params %s\n", __FILE__,__LINE__, |
1889 | info->device_name ); | 1889 | info->device_name ); |
@@ -1894,13 +1894,13 @@ static int set_params(MGSLPC_INFO * info, MGSL_PARAMS __user *new_params) | |||
1894 | __FILE__,__LINE__,info->device_name); | 1894 | __FILE__,__LINE__,info->device_name); |
1895 | return -EFAULT; | 1895 | return -EFAULT; |
1896 | } | 1896 | } |
1897 | 1897 | ||
1898 | spin_lock_irqsave(&info->lock,flags); | 1898 | spin_lock_irqsave(&info->lock,flags); |
1899 | memcpy(&info->params,&tmp_params,sizeof(MGSL_PARAMS)); | 1899 | memcpy(&info->params,&tmp_params,sizeof(MGSL_PARAMS)); |
1900 | spin_unlock_irqrestore(&info->lock,flags); | 1900 | spin_unlock_irqrestore(&info->lock,flags); |
1901 | 1901 | ||
1902 | mgslpc_change_params(info); | 1902 | mgslpc_change_params(info); |
1903 | 1903 | ||
1904 | return 0; | 1904 | return 0; |
1905 | } | 1905 | } |
1906 | 1906 | ||
@@ -1963,10 +1963,10 @@ static int set_interface(MGSLPC_INFO * info, int if_mode) | |||
1963 | static int set_txenable(MGSLPC_INFO * info, int enable) | 1963 | static int set_txenable(MGSLPC_INFO * info, int enable) |
1964 | { | 1964 | { |
1965 | unsigned long flags; | 1965 | unsigned long flags; |
1966 | 1966 | ||
1967 | if (debug_level >= DEBUG_LEVEL_INFO) | 1967 | if (debug_level >= DEBUG_LEVEL_INFO) |
1968 | printk("set_txenable(%s,%d)\n", info->device_name, enable); | 1968 | printk("set_txenable(%s,%d)\n", info->device_name, enable); |
1969 | 1969 | ||
1970 | spin_lock_irqsave(&info->lock,flags); | 1970 | spin_lock_irqsave(&info->lock,flags); |
1971 | if (enable) { | 1971 | if (enable) { |
1972 | if (!info->tx_enabled) | 1972 | if (!info->tx_enabled) |
@@ -1982,10 +1982,10 @@ static int set_txenable(MGSLPC_INFO * info, int enable) | |||
1982 | static int tx_abort(MGSLPC_INFO * info) | 1982 | static int tx_abort(MGSLPC_INFO * info) |
1983 | { | 1983 | { |
1984 | unsigned long flags; | 1984 | unsigned long flags; |
1985 | 1985 | ||
1986 | if (debug_level >= DEBUG_LEVEL_INFO) | 1986 | if (debug_level >= DEBUG_LEVEL_INFO) |
1987 | printk("tx_abort(%s)\n", info->device_name); | 1987 | printk("tx_abort(%s)\n", info->device_name); |
1988 | 1988 | ||
1989 | spin_lock_irqsave(&info->lock,flags); | 1989 | spin_lock_irqsave(&info->lock,flags); |
1990 | if (info->tx_active && info->tx_count && | 1990 | if (info->tx_active && info->tx_count && |
1991 | info->params.mode == MGSL_MODE_HDLC) { | 1991 | info->params.mode == MGSL_MODE_HDLC) { |
@@ -2002,10 +2002,10 @@ static int tx_abort(MGSLPC_INFO * info) | |||
2002 | static int set_rxenable(MGSLPC_INFO * info, int enable) | 2002 | static int set_rxenable(MGSLPC_INFO * info, int enable) |
2003 | { | 2003 | { |
2004 | unsigned long flags; | 2004 | unsigned long flags; |
2005 | 2005 | ||
2006 | if (debug_level >= DEBUG_LEVEL_INFO) | 2006 | if (debug_level >= DEBUG_LEVEL_INFO) |
2007 | printk("set_rxenable(%s,%d)\n", info->device_name, enable); | 2007 | printk("set_rxenable(%s,%d)\n", info->device_name, enable); |
2008 | 2008 | ||
2009 | spin_lock_irqsave(&info->lock,flags); | 2009 | spin_lock_irqsave(&info->lock,flags); |
2010 | if (enable) { | 2010 | if (enable) { |
2011 | if (!info->rx_enabled) | 2011 | if (!info->rx_enabled) |
@@ -2019,7 +2019,7 @@ static int set_rxenable(MGSLPC_INFO * info, int enable) | |||
2019 | } | 2019 | } |
2020 | 2020 | ||
2021 | /* wait for specified event to occur | 2021 | /* wait for specified event to occur |
2022 | * | 2022 | * |
2023 | * Arguments: info pointer to device instance data | 2023 | * Arguments: info pointer to device instance data |
2024 | * mask pointer to bitmask of events to wait for | 2024 | * mask pointer to bitmask of events to wait for |
2025 | * Return Value: 0 if successful and bit mask updated with | 2025 | * Return Value: 0 if successful and bit mask updated with |
@@ -2040,7 +2040,7 @@ static int wait_events(MGSLPC_INFO * info, int __user *mask_ptr) | |||
2040 | COPY_FROM_USER(rc,&mask, mask_ptr, sizeof(int)); | 2040 | COPY_FROM_USER(rc,&mask, mask_ptr, sizeof(int)); |
2041 | if (rc) | 2041 | if (rc) |
2042 | return -EFAULT; | 2042 | return -EFAULT; |
2043 | 2043 | ||
2044 | if (debug_level >= DEBUG_LEVEL_INFO) | 2044 | if (debug_level >= DEBUG_LEVEL_INFO) |
2045 | printk("wait_events(%s,%d)\n", info->device_name, mask); | 2045 | printk("wait_events(%s,%d)\n", info->device_name, mask); |
2046 | 2046 | ||
@@ -2062,24 +2062,24 @@ static int wait_events(MGSLPC_INFO * info, int __user *mask_ptr) | |||
2062 | /* save current irq counts */ | 2062 | /* save current irq counts */ |
2063 | cprev = info->icount; | 2063 | cprev = info->icount; |
2064 | oldsigs = info->input_signal_events; | 2064 | oldsigs = info->input_signal_events; |
2065 | 2065 | ||
2066 | if ((info->params.mode == MGSL_MODE_HDLC) && | 2066 | if ((info->params.mode == MGSL_MODE_HDLC) && |
2067 | (mask & MgslEvent_ExitHuntMode)) | 2067 | (mask & MgslEvent_ExitHuntMode)) |
2068 | irq_enable(info, CHA, IRQ_EXITHUNT); | 2068 | irq_enable(info, CHA, IRQ_EXITHUNT); |
2069 | 2069 | ||
2070 | set_current_state(TASK_INTERRUPTIBLE); | 2070 | set_current_state(TASK_INTERRUPTIBLE); |
2071 | add_wait_queue(&info->event_wait_q, &wait); | 2071 | add_wait_queue(&info->event_wait_q, &wait); |
2072 | 2072 | ||
2073 | spin_unlock_irqrestore(&info->lock,flags); | 2073 | spin_unlock_irqrestore(&info->lock,flags); |
2074 | 2074 | ||
2075 | 2075 | ||
2076 | for(;;) { | 2076 | for(;;) { |
2077 | schedule(); | 2077 | schedule(); |
2078 | if (signal_pending(current)) { | 2078 | if (signal_pending(current)) { |
2079 | rc = -ERESTARTSYS; | 2079 | rc = -ERESTARTSYS; |
2080 | break; | 2080 | break; |
2081 | } | 2081 | } |
2082 | 2082 | ||
2083 | /* get current irq counts */ | 2083 | /* get current irq counts */ |
2084 | spin_lock_irqsave(&info->lock,flags); | 2084 | spin_lock_irqsave(&info->lock,flags); |
2085 | cnow = info->icount; | 2085 | cnow = info->icount; |
@@ -2115,11 +2115,11 @@ static int wait_events(MGSLPC_INFO * info, int __user *mask_ptr) | |||
2115 | (cnow.rxidle != cprev.rxidle ? MgslEvent_IdleReceived:0) ); | 2115 | (cnow.rxidle != cprev.rxidle ? MgslEvent_IdleReceived:0) ); |
2116 | if (events) | 2116 | if (events) |
2117 | break; | 2117 | break; |
2118 | 2118 | ||
2119 | cprev = cnow; | 2119 | cprev = cnow; |
2120 | oldsigs = newsigs; | 2120 | oldsigs = newsigs; |
2121 | } | 2121 | } |
2122 | 2122 | ||
2123 | remove_wait_queue(&info->event_wait_q, &wait); | 2123 | remove_wait_queue(&info->event_wait_q, &wait); |
2124 | set_current_state(TASK_RUNNING); | 2124 | set_current_state(TASK_RUNNING); |
2125 | 2125 | ||
@@ -2247,42 +2247,42 @@ static void mgslpc_break(struct tty_struct *tty, int break_state) | |||
2247 | { | 2247 | { |
2248 | MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data; | 2248 | MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data; |
2249 | unsigned long flags; | 2249 | unsigned long flags; |
2250 | 2250 | ||
2251 | if (debug_level >= DEBUG_LEVEL_INFO) | 2251 | if (debug_level >= DEBUG_LEVEL_INFO) |
2252 | printk("%s(%d):mgslpc_break(%s,%d)\n", | 2252 | printk("%s(%d):mgslpc_break(%s,%d)\n", |
2253 | __FILE__,__LINE__, info->device_name, break_state); | 2253 | __FILE__,__LINE__, info->device_name, break_state); |
2254 | 2254 | ||
2255 | if (mgslpc_paranoia_check(info, tty->name, "mgslpc_break")) | 2255 | if (mgslpc_paranoia_check(info, tty->name, "mgslpc_break")) |
2256 | return; | 2256 | return; |
2257 | 2257 | ||
2258 | spin_lock_irqsave(&info->lock,flags); | 2258 | spin_lock_irqsave(&info->lock,flags); |
2259 | if (break_state == -1) | 2259 | if (break_state == -1) |
2260 | set_reg_bits(info, CHA+DAFO, BIT6); | 2260 | set_reg_bits(info, CHA+DAFO, BIT6); |
2261 | else | 2261 | else |
2262 | clear_reg_bits(info, CHA+DAFO, BIT6); | 2262 | clear_reg_bits(info, CHA+DAFO, BIT6); |
2263 | spin_unlock_irqrestore(&info->lock,flags); | 2263 | spin_unlock_irqrestore(&info->lock,flags); |
2264 | } | 2264 | } |
2265 | 2265 | ||
2266 | /* Service an IOCTL request | 2266 | /* Service an IOCTL request |
2267 | * | 2267 | * |
2268 | * Arguments: | 2268 | * Arguments: |
2269 | * | 2269 | * |
2270 | * tty pointer to tty instance data | 2270 | * tty pointer to tty instance data |
2271 | * file pointer to associated file object for device | 2271 | * file pointer to associated file object for device |
2272 | * cmd IOCTL command code | 2272 | * cmd IOCTL command code |
2273 | * arg command argument/context | 2273 | * arg command argument/context |
2274 | * | 2274 | * |
2275 | * Return Value: 0 if success, otherwise error code | 2275 | * Return Value: 0 if success, otherwise error code |
2276 | */ | 2276 | */ |
2277 | static int mgslpc_ioctl(struct tty_struct *tty, struct file * file, | 2277 | static int mgslpc_ioctl(struct tty_struct *tty, struct file * file, |
2278 | unsigned int cmd, unsigned long arg) | 2278 | unsigned int cmd, unsigned long arg) |
2279 | { | 2279 | { |
2280 | MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data; | 2280 | MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data; |
2281 | 2281 | ||
2282 | if (debug_level >= DEBUG_LEVEL_INFO) | 2282 | if (debug_level >= DEBUG_LEVEL_INFO) |
2283 | printk("%s(%d):mgslpc_ioctl %s cmd=%08X\n", __FILE__,__LINE__, | 2283 | printk("%s(%d):mgslpc_ioctl %s cmd=%08X\n", __FILE__,__LINE__, |
2284 | info->device_name, cmd ); | 2284 | info->device_name, cmd ); |
2285 | 2285 | ||
2286 | if (mgslpc_paranoia_check(info, tty->name, "mgslpc_ioctl")) | 2286 | if (mgslpc_paranoia_check(info, tty->name, "mgslpc_ioctl")) |
2287 | return -ENODEV; | 2287 | return -ENODEV; |
2288 | 2288 | ||
@@ -2302,7 +2302,7 @@ static int ioctl_common(MGSLPC_INFO *info, unsigned int cmd, unsigned long arg) | |||
2302 | struct serial_icounter_struct __user *p_cuser; /* user space */ | 2302 | struct serial_icounter_struct __user *p_cuser; /* user space */ |
2303 | void __user *argp = (void __user *)arg; | 2303 | void __user *argp = (void __user *)arg; |
2304 | unsigned long flags; | 2304 | unsigned long flags; |
2305 | 2305 | ||
2306 | switch (cmd) { | 2306 | switch (cmd) { |
2307 | case MGSL_IOCGPARAMS: | 2307 | case MGSL_IOCGPARAMS: |
2308 | return get_params(info, argp); | 2308 | return get_params(info, argp); |
@@ -2363,9 +2363,9 @@ static int ioctl_common(MGSLPC_INFO *info, unsigned int cmd, unsigned long arg) | |||
2363 | } | 2363 | } |
2364 | 2364 | ||
2365 | /* Set new termios settings | 2365 | /* Set new termios settings |
2366 | * | 2366 | * |
2367 | * Arguments: | 2367 | * Arguments: |
2368 | * | 2368 | * |
2369 | * tty pointer to tty structure | 2369 | * tty pointer to tty structure |
2370 | * termios pointer to buffer to hold returned old termios | 2370 | * termios pointer to buffer to hold returned old termios |
2371 | */ | 2371 | */ |
@@ -2373,14 +2373,14 @@ static void mgslpc_set_termios(struct tty_struct *tty, struct ktermios *old_term | |||
2373 | { | 2373 | { |
2374 | MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data; | 2374 | MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data; |
2375 | unsigned long flags; | 2375 | unsigned long flags; |
2376 | 2376 | ||
2377 | if (debug_level >= DEBUG_LEVEL_INFO) | 2377 | if (debug_level >= DEBUG_LEVEL_INFO) |
2378 | printk("%s(%d):mgslpc_set_termios %s\n", __FILE__,__LINE__, | 2378 | printk("%s(%d):mgslpc_set_termios %s\n", __FILE__,__LINE__, |
2379 | tty->driver->name ); | 2379 | tty->driver->name ); |
2380 | 2380 | ||
2381 | /* just return if nothing has changed */ | 2381 | /* just return if nothing has changed */ |
2382 | if ((tty->termios->c_cflag == old_termios->c_cflag) | 2382 | if ((tty->termios->c_cflag == old_termios->c_cflag) |
2383 | && (RELEVANT_IFLAG(tty->termios->c_iflag) | 2383 | && (RELEVANT_IFLAG(tty->termios->c_iflag) |
2384 | == RELEVANT_IFLAG(old_termios->c_iflag))) | 2384 | == RELEVANT_IFLAG(old_termios->c_iflag))) |
2385 | return; | 2385 | return; |
2386 | 2386 | ||
@@ -2394,12 +2394,12 @@ static void mgslpc_set_termios(struct tty_struct *tty, struct ktermios *old_term | |||
2394 | set_signals(info); | 2394 | set_signals(info); |
2395 | spin_unlock_irqrestore(&info->lock,flags); | 2395 | spin_unlock_irqrestore(&info->lock,flags); |
2396 | } | 2396 | } |
2397 | 2397 | ||
2398 | /* Handle transition away from B0 status */ | 2398 | /* Handle transition away from B0 status */ |
2399 | if (!(old_termios->c_cflag & CBAUD) && | 2399 | if (!(old_termios->c_cflag & CBAUD) && |
2400 | tty->termios->c_cflag & CBAUD) { | 2400 | tty->termios->c_cflag & CBAUD) { |
2401 | info->serial_signals |= SerialSignal_DTR; | 2401 | info->serial_signals |= SerialSignal_DTR; |
2402 | if (!(tty->termios->c_cflag & CRTSCTS) || | 2402 | if (!(tty->termios->c_cflag & CRTSCTS) || |
2403 | !test_bit(TTY_THROTTLED, &tty->flags)) { | 2403 | !test_bit(TTY_THROTTLED, &tty->flags)) { |
2404 | info->serial_signals |= SerialSignal_RTS; | 2404 | info->serial_signals |= SerialSignal_RTS; |
2405 | } | 2405 | } |
@@ -2407,7 +2407,7 @@ static void mgslpc_set_termios(struct tty_struct *tty, struct ktermios *old_term | |||
2407 | set_signals(info); | 2407 | set_signals(info); |
2408 | spin_unlock_irqrestore(&info->lock,flags); | 2408 | spin_unlock_irqrestore(&info->lock,flags); |
2409 | } | 2409 | } |
2410 | 2410 | ||
2411 | /* Handle turning off CRTSCTS */ | 2411 | /* Handle turning off CRTSCTS */ |
2412 | if (old_termios->c_cflag & CRTSCTS && | 2412 | if (old_termios->c_cflag & CRTSCTS && |
2413 | !(tty->termios->c_cflag & CRTSCTS)) { | 2413 | !(tty->termios->c_cflag & CRTSCTS)) { |
@@ -2422,17 +2422,17 @@ static void mgslpc_close(struct tty_struct *tty, struct file * filp) | |||
2422 | 2422 | ||
2423 | if (mgslpc_paranoia_check(info, tty->name, "mgslpc_close")) | 2423 | if (mgslpc_paranoia_check(info, tty->name, "mgslpc_close")) |
2424 | return; | 2424 | return; |
2425 | 2425 | ||
2426 | if (debug_level >= DEBUG_LEVEL_INFO) | 2426 | if (debug_level >= DEBUG_LEVEL_INFO) |
2427 | printk("%s(%d):mgslpc_close(%s) entry, count=%d\n", | 2427 | printk("%s(%d):mgslpc_close(%s) entry, count=%d\n", |
2428 | __FILE__,__LINE__, info->device_name, info->count); | 2428 | __FILE__,__LINE__, info->device_name, info->count); |
2429 | 2429 | ||
2430 | if (!info->count) | 2430 | if (!info->count) |
2431 | return; | 2431 | return; |
2432 | 2432 | ||
2433 | if (tty_hung_up_p(filp)) | 2433 | if (tty_hung_up_p(filp)) |
2434 | goto cleanup; | 2434 | goto cleanup; |
2435 | 2435 | ||
2436 | if ((tty->count == 1) && (info->count != 1)) { | 2436 | if ((tty->count == 1) && (info->count != 1)) { |
2437 | /* | 2437 | /* |
2438 | * tty->count is 1 and the tty structure will be freed. | 2438 | * tty->count is 1 and the tty structure will be freed. |
@@ -2443,30 +2443,30 @@ static void mgslpc_close(struct tty_struct *tty, struct file * filp) | |||
2443 | "info->count is %d\n", info->count); | 2443 | "info->count is %d\n", info->count); |
2444 | info->count = 1; | 2444 | info->count = 1; |
2445 | } | 2445 | } |
2446 | 2446 | ||
2447 | info->count--; | 2447 | info->count--; |
2448 | 2448 | ||
2449 | /* if at least one open remaining, leave hardware active */ | 2449 | /* if at least one open remaining, leave hardware active */ |
2450 | if (info->count) | 2450 | if (info->count) |
2451 | goto cleanup; | 2451 | goto cleanup; |
2452 | 2452 | ||
2453 | info->flags |= ASYNC_CLOSING; | 2453 | info->flags |= ASYNC_CLOSING; |
2454 | 2454 | ||
2455 | /* set tty->closing to notify line discipline to | 2455 | /* set tty->closing to notify line discipline to |
2456 | * only process XON/XOFF characters. Only the N_TTY | 2456 | * only process XON/XOFF characters. Only the N_TTY |
2457 | * discipline appears to use this (ppp does not). | 2457 | * discipline appears to use this (ppp does not). |
2458 | */ | 2458 | */ |
2459 | tty->closing = 1; | 2459 | tty->closing = 1; |
2460 | 2460 | ||
2461 | /* wait for transmit data to clear all layers */ | 2461 | /* wait for transmit data to clear all layers */ |
2462 | 2462 | ||
2463 | if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE) { | 2463 | if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE) { |
2464 | if (debug_level >= DEBUG_LEVEL_INFO) | 2464 | if (debug_level >= DEBUG_LEVEL_INFO) |
2465 | printk("%s(%d):mgslpc_close(%s) calling tty_wait_until_sent\n", | 2465 | printk("%s(%d):mgslpc_close(%s) calling tty_wait_until_sent\n", |
2466 | __FILE__,__LINE__, info->device_name ); | 2466 | __FILE__,__LINE__, info->device_name ); |
2467 | tty_wait_until_sent(tty, info->closing_wait); | 2467 | tty_wait_until_sent(tty, info->closing_wait); |
2468 | } | 2468 | } |
2469 | 2469 | ||
2470 | if (info->flags & ASYNC_INITIALIZED) | 2470 | if (info->flags & ASYNC_INITIALIZED) |
2471 | mgslpc_wait_until_sent(tty, info->timeout); | 2471 | mgslpc_wait_until_sent(tty, info->timeout); |
2472 | 2472 | ||
@@ -2474,24 +2474,24 @@ static void mgslpc_close(struct tty_struct *tty, struct file * filp) | |||
2474 | tty->driver->flush_buffer(tty); | 2474 | tty->driver->flush_buffer(tty); |
2475 | 2475 | ||
2476 | ldisc_flush_buffer(tty); | 2476 | ldisc_flush_buffer(tty); |
2477 | 2477 | ||
2478 | shutdown(info); | 2478 | shutdown(info); |
2479 | 2479 | ||
2480 | tty->closing = 0; | 2480 | tty->closing = 0; |
2481 | info->tty = NULL; | 2481 | info->tty = NULL; |
2482 | 2482 | ||
2483 | if (info->blocked_open) { | 2483 | if (info->blocked_open) { |
2484 | if (info->close_delay) { | 2484 | if (info->close_delay) { |
2485 | msleep_interruptible(jiffies_to_msecs(info->close_delay)); | 2485 | msleep_interruptible(jiffies_to_msecs(info->close_delay)); |
2486 | } | 2486 | } |
2487 | wake_up_interruptible(&info->open_wait); | 2487 | wake_up_interruptible(&info->open_wait); |
2488 | } | 2488 | } |
2489 | 2489 | ||
2490 | info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING); | 2490 | info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING); |
2491 | 2491 | ||
2492 | wake_up_interruptible(&info->close_wait); | 2492 | wake_up_interruptible(&info->close_wait); |
2493 | 2493 | ||
2494 | cleanup: | 2494 | cleanup: |
2495 | if (debug_level >= DEBUG_LEVEL_INFO) | 2495 | if (debug_level >= DEBUG_LEVEL_INFO) |
2496 | printk("%s(%d):mgslpc_close(%s) exit, count=%d\n", __FILE__,__LINE__, | 2496 | printk("%s(%d):mgslpc_close(%s) exit, count=%d\n", __FILE__,__LINE__, |
2497 | tty->driver->name, info->count); | 2497 | tty->driver->name, info->count); |
@@ -2510,31 +2510,31 @@ static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout) | |||
2510 | if (debug_level >= DEBUG_LEVEL_INFO) | 2510 | if (debug_level >= DEBUG_LEVEL_INFO) |
2511 | printk("%s(%d):mgslpc_wait_until_sent(%s) entry\n", | 2511 | printk("%s(%d):mgslpc_wait_until_sent(%s) entry\n", |
2512 | __FILE__,__LINE__, info->device_name ); | 2512 | __FILE__,__LINE__, info->device_name ); |
2513 | 2513 | ||
2514 | if (mgslpc_paranoia_check(info, tty->name, "mgslpc_wait_until_sent")) | 2514 | if (mgslpc_paranoia_check(info, tty->name, "mgslpc_wait_until_sent")) |
2515 | return; | 2515 | return; |
2516 | 2516 | ||
2517 | if (!(info->flags & ASYNC_INITIALIZED)) | 2517 | if (!(info->flags & ASYNC_INITIALIZED)) |
2518 | goto exit; | 2518 | goto exit; |
2519 | 2519 | ||
2520 | orig_jiffies = jiffies; | 2520 | orig_jiffies = jiffies; |
2521 | 2521 | ||
2522 | /* Set check interval to 1/5 of estimated time to | 2522 | /* Set check interval to 1/5 of estimated time to |
2523 | * send a character, and make it at least 1. The check | 2523 | * send a character, and make it at least 1. The check |
2524 | * interval should also be less than the timeout. | 2524 | * interval should also be less than the timeout. |
2525 | * Note: use tight timings here to satisfy the NIST-PCTS. | 2525 | * Note: use tight timings here to satisfy the NIST-PCTS. |
2526 | */ | 2526 | */ |
2527 | 2527 | ||
2528 | if ( info->params.data_rate ) { | 2528 | if ( info->params.data_rate ) { |
2529 | char_time = info->timeout/(32 * 5); | 2529 | char_time = info->timeout/(32 * 5); |
2530 | if (!char_time) | 2530 | if (!char_time) |
2531 | char_time++; | 2531 | char_time++; |
2532 | } else | 2532 | } else |
2533 | char_time = 1; | 2533 | char_time = 1; |
2534 | 2534 | ||
2535 | if (timeout) | 2535 | if (timeout) |
2536 | char_time = min_t(unsigned long, char_time, timeout); | 2536 | char_time = min_t(unsigned long, char_time, timeout); |
2537 | 2537 | ||
2538 | if (info->params.mode == MGSL_MODE_HDLC) { | 2538 | if (info->params.mode == MGSL_MODE_HDLC) { |
2539 | while (info->tx_active) { | 2539 | while (info->tx_active) { |
2540 | msleep_interruptible(jiffies_to_msecs(char_time)); | 2540 | msleep_interruptible(jiffies_to_msecs(char_time)); |
@@ -2553,7 +2553,7 @@ static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout) | |||
2553 | break; | 2553 | break; |
2554 | } | 2554 | } |
2555 | } | 2555 | } |
2556 | 2556 | ||
2557 | exit: | 2557 | exit: |
2558 | if (debug_level >= DEBUG_LEVEL_INFO) | 2558 | if (debug_level >= DEBUG_LEVEL_INFO) |
2559 | printk("%s(%d):mgslpc_wait_until_sent(%s) exit\n", | 2559 | printk("%s(%d):mgslpc_wait_until_sent(%s) exit\n", |
@@ -2566,18 +2566,18 @@ exit: | |||
2566 | static void mgslpc_hangup(struct tty_struct *tty) | 2566 | static void mgslpc_hangup(struct tty_struct *tty) |
2567 | { | 2567 | { |
2568 | MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data; | 2568 | MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data; |
2569 | 2569 | ||
2570 | if (debug_level >= DEBUG_LEVEL_INFO) | 2570 | if (debug_level >= DEBUG_LEVEL_INFO) |
2571 | printk("%s(%d):mgslpc_hangup(%s)\n", | 2571 | printk("%s(%d):mgslpc_hangup(%s)\n", |
2572 | __FILE__,__LINE__, info->device_name ); | 2572 | __FILE__,__LINE__, info->device_name ); |
2573 | 2573 | ||
2574 | if (mgslpc_paranoia_check(info, tty->name, "mgslpc_hangup")) | 2574 | if (mgslpc_paranoia_check(info, tty->name, "mgslpc_hangup")) |
2575 | return; | 2575 | return; |
2576 | 2576 | ||
2577 | mgslpc_flush_buffer(tty); | 2577 | mgslpc_flush_buffer(tty); |
2578 | shutdown(info); | 2578 | shutdown(info); |
2579 | 2579 | ||
2580 | info->count = 0; | 2580 | info->count = 0; |
2581 | info->flags &= ~ASYNC_NORMAL_ACTIVE; | 2581 | info->flags &= ~ASYNC_NORMAL_ACTIVE; |
2582 | info->tty = NULL; | 2582 | info->tty = NULL; |
2583 | 2583 | ||
@@ -2594,7 +2594,7 @@ static int block_til_ready(struct tty_struct *tty, struct file *filp, | |||
2594 | int retval; | 2594 | int retval; |
2595 | int do_clocal = 0, extra_count = 0; | 2595 | int do_clocal = 0, extra_count = 0; |
2596 | unsigned long flags; | 2596 | unsigned long flags; |
2597 | 2597 | ||
2598 | if (debug_level >= DEBUG_LEVEL_INFO) | 2598 | if (debug_level >= DEBUG_LEVEL_INFO) |
2599 | printk("%s(%d):block_til_ready on %s\n", | 2599 | printk("%s(%d):block_til_ready on %s\n", |
2600 | __FILE__,__LINE__, tty->driver->name ); | 2600 | __FILE__,__LINE__, tty->driver->name ); |
@@ -2615,10 +2615,10 @@ static int block_til_ready(struct tty_struct *tty, struct file *filp, | |||
2615 | * mgslpc_close() knows when to free things. We restore it upon | 2615 | * mgslpc_close() knows when to free things. We restore it upon |
2616 | * exit, either normal or abnormal. | 2616 | * exit, either normal or abnormal. |
2617 | */ | 2617 | */ |
2618 | 2618 | ||
2619 | retval = 0; | 2619 | retval = 0; |
2620 | add_wait_queue(&info->open_wait, &wait); | 2620 | add_wait_queue(&info->open_wait, &wait); |
2621 | 2621 | ||
2622 | if (debug_level >= DEBUG_LEVEL_INFO) | 2622 | if (debug_level >= DEBUG_LEVEL_INFO) |
2623 | printk("%s(%d):block_til_ready before block on %s count=%d\n", | 2623 | printk("%s(%d):block_til_ready before block on %s count=%d\n", |
2624 | __FILE__,__LINE__, tty->driver->name, info->count ); | 2624 | __FILE__,__LINE__, tty->driver->name, info->count ); |
@@ -2630,7 +2630,7 @@ static int block_til_ready(struct tty_struct *tty, struct file *filp, | |||
2630 | } | 2630 | } |
2631 | spin_unlock_irqrestore(&info->lock, flags); | 2631 | spin_unlock_irqrestore(&info->lock, flags); |
2632 | info->blocked_open++; | 2632 | info->blocked_open++; |
2633 | 2633 | ||
2634 | while (1) { | 2634 | while (1) { |
2635 | if ((tty->termios->c_cflag & CBAUD)) { | 2635 | if ((tty->termios->c_cflag & CBAUD)) { |
2636 | spin_lock_irqsave(&info->lock,flags); | 2636 | spin_lock_irqsave(&info->lock,flags); |
@@ -2638,50 +2638,50 @@ static int block_til_ready(struct tty_struct *tty, struct file *filp, | |||
2638 | set_signals(info); | 2638 | set_signals(info); |
2639 | spin_unlock_irqrestore(&info->lock,flags); | 2639 | spin_unlock_irqrestore(&info->lock,flags); |
2640 | } | 2640 | } |
2641 | 2641 | ||
2642 | set_current_state(TASK_INTERRUPTIBLE); | 2642 | set_current_state(TASK_INTERRUPTIBLE); |
2643 | 2643 | ||
2644 | if (tty_hung_up_p(filp) || !(info->flags & ASYNC_INITIALIZED)){ | 2644 | if (tty_hung_up_p(filp) || !(info->flags & ASYNC_INITIALIZED)){ |
2645 | retval = (info->flags & ASYNC_HUP_NOTIFY) ? | 2645 | retval = (info->flags & ASYNC_HUP_NOTIFY) ? |
2646 | -EAGAIN : -ERESTARTSYS; | 2646 | -EAGAIN : -ERESTARTSYS; |
2647 | break; | 2647 | break; |
2648 | } | 2648 | } |
2649 | 2649 | ||
2650 | spin_lock_irqsave(&info->lock,flags); | 2650 | spin_lock_irqsave(&info->lock,flags); |
2651 | get_signals(info); | 2651 | get_signals(info); |
2652 | spin_unlock_irqrestore(&info->lock,flags); | 2652 | spin_unlock_irqrestore(&info->lock,flags); |
2653 | 2653 | ||
2654 | if (!(info->flags & ASYNC_CLOSING) && | 2654 | if (!(info->flags & ASYNC_CLOSING) && |
2655 | (do_clocal || (info->serial_signals & SerialSignal_DCD)) ) { | 2655 | (do_clocal || (info->serial_signals & SerialSignal_DCD)) ) { |
2656 | break; | 2656 | break; |
2657 | } | 2657 | } |
2658 | 2658 | ||
2659 | if (signal_pending(current)) { | 2659 | if (signal_pending(current)) { |
2660 | retval = -ERESTARTSYS; | 2660 | retval = -ERESTARTSYS; |
2661 | break; | 2661 | break; |
2662 | } | 2662 | } |
2663 | 2663 | ||
2664 | if (debug_level >= DEBUG_LEVEL_INFO) | 2664 | if (debug_level >= DEBUG_LEVEL_INFO) |
2665 | printk("%s(%d):block_til_ready blocking on %s count=%d\n", | 2665 | printk("%s(%d):block_til_ready blocking on %s count=%d\n", |
2666 | __FILE__,__LINE__, tty->driver->name, info->count ); | 2666 | __FILE__,__LINE__, tty->driver->name, info->count ); |
2667 | 2667 | ||
2668 | schedule(); | 2668 | schedule(); |
2669 | } | 2669 | } |
2670 | 2670 | ||
2671 | set_current_state(TASK_RUNNING); | 2671 | set_current_state(TASK_RUNNING); |
2672 | remove_wait_queue(&info->open_wait, &wait); | 2672 | remove_wait_queue(&info->open_wait, &wait); |
2673 | 2673 | ||
2674 | if (extra_count) | 2674 | if (extra_count) |
2675 | info->count++; | 2675 | info->count++; |
2676 | info->blocked_open--; | 2676 | info->blocked_open--; |
2677 | 2677 | ||
2678 | if (debug_level >= DEBUG_LEVEL_INFO) | 2678 | if (debug_level >= DEBUG_LEVEL_INFO) |
2679 | printk("%s(%d):block_til_ready after blocking on %s count=%d\n", | 2679 | printk("%s(%d):block_til_ready after blocking on %s count=%d\n", |
2680 | __FILE__,__LINE__, tty->driver->name, info->count ); | 2680 | __FILE__,__LINE__, tty->driver->name, info->count ); |
2681 | 2681 | ||
2682 | if (!retval) | 2682 | if (!retval) |
2683 | info->flags |= ASYNC_NORMAL_ACTIVE; | 2683 | info->flags |= ASYNC_NORMAL_ACTIVE; |
2684 | 2684 | ||
2685 | return retval; | 2685 | return retval; |
2686 | } | 2686 | } |
2687 | 2687 | ||
@@ -2691,7 +2691,7 @@ static int mgslpc_open(struct tty_struct *tty, struct file * filp) | |||
2691 | int retval, line; | 2691 | int retval, line; |
2692 | unsigned long flags; | 2692 | unsigned long flags; |
2693 | 2693 | ||
2694 | /* verify range of specified line number */ | 2694 | /* verify range of specified line number */ |
2695 | line = tty->index; | 2695 | line = tty->index; |
2696 | if ((line < 0) || (line >= mgslpc_device_count)) { | 2696 | if ((line < 0) || (line >= mgslpc_device_count)) { |
2697 | printk("%s(%d):mgslpc_open with invalid line #%d.\n", | 2697 | printk("%s(%d):mgslpc_open with invalid line #%d.\n", |
@@ -2705,10 +2705,10 @@ static int mgslpc_open(struct tty_struct *tty, struct file * filp) | |||
2705 | info = info->next_device; | 2705 | info = info->next_device; |
2706 | if (mgslpc_paranoia_check(info, tty->name, "mgslpc_open")) | 2706 | if (mgslpc_paranoia_check(info, tty->name, "mgslpc_open")) |
2707 | return -ENODEV; | 2707 | return -ENODEV; |
2708 | 2708 | ||
2709 | tty->driver_data = info; | 2709 | tty->driver_data = info; |
2710 | info->tty = tty; | 2710 | info->tty = tty; |
2711 | 2711 | ||
2712 | if (debug_level >= DEBUG_LEVEL_INFO) | 2712 | if (debug_level >= DEBUG_LEVEL_INFO) |
2713 | printk("%s(%d):mgslpc_open(%s), old ref count = %d\n", | 2713 | printk("%s(%d):mgslpc_open(%s), old ref count = %d\n", |
2714 | __FILE__,__LINE__,tty->driver->name, info->count); | 2714 | __FILE__,__LINE__,tty->driver->name, info->count); |
@@ -2721,7 +2721,7 @@ static int mgslpc_open(struct tty_struct *tty, struct file * filp) | |||
2721 | -EAGAIN : -ERESTARTSYS); | 2721 | -EAGAIN : -ERESTARTSYS); |
2722 | goto cleanup; | 2722 | goto cleanup; |
2723 | } | 2723 | } |
2724 | 2724 | ||
2725 | info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0; | 2725 | info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0; |
2726 | 2726 | ||
2727 | spin_lock_irqsave(&info->netlock, flags); | 2727 | spin_lock_irqsave(&info->netlock, flags); |
@@ -2752,15 +2752,15 @@ static int mgslpc_open(struct tty_struct *tty, struct file * filp) | |||
2752 | printk("%s(%d):mgslpc_open(%s) success\n", | 2752 | printk("%s(%d):mgslpc_open(%s) success\n", |
2753 | __FILE__,__LINE__, info->device_name); | 2753 | __FILE__,__LINE__, info->device_name); |
2754 | retval = 0; | 2754 | retval = 0; |
2755 | 2755 | ||
2756 | cleanup: | 2756 | cleanup: |
2757 | if (retval) { | 2757 | if (retval) { |
2758 | if (tty->count == 1) | 2758 | if (tty->count == 1) |
2759 | info->tty = NULL; /* tty layer will release tty struct */ | 2759 | info->tty = NULL; /* tty layer will release tty struct */ |
2760 | if(info->count) | 2760 | if(info->count) |
2761 | info->count--; | 2761 | info->count--; |
2762 | } | 2762 | } |
2763 | 2763 | ||
2764 | return retval; | 2764 | return retval; |
2765 | } | 2765 | } |
2766 | 2766 | ||
@@ -2781,7 +2781,7 @@ static inline int line_info(char *buf, MGSLPC_INFO *info) | |||
2781 | spin_lock_irqsave(&info->lock,flags); | 2781 | spin_lock_irqsave(&info->lock,flags); |
2782 | get_signals(info); | 2782 | get_signals(info); |
2783 | spin_unlock_irqrestore(&info->lock,flags); | 2783 | spin_unlock_irqrestore(&info->lock,flags); |
2784 | 2784 | ||
2785 | stat_buf[0] = 0; | 2785 | stat_buf[0] = 0; |
2786 | stat_buf[1] = 0; | 2786 | stat_buf[1] = 0; |
2787 | if (info->serial_signals & SerialSignal_RTS) | 2787 | if (info->serial_signals & SerialSignal_RTS) |
@@ -2805,7 +2805,7 @@ static inline int line_info(char *buf, MGSLPC_INFO *info) | |||
2805 | if (info->icount.txabort) | 2805 | if (info->icount.txabort) |
2806 | ret += sprintf(buf+ret, " txabort:%d", info->icount.txabort); | 2806 | ret += sprintf(buf+ret, " txabort:%d", info->icount.txabort); |
2807 | if (info->icount.rxshort) | 2807 | if (info->icount.rxshort) |
2808 | ret += sprintf(buf+ret, " rxshort:%d", info->icount.rxshort); | 2808 | ret += sprintf(buf+ret, " rxshort:%d", info->icount.rxshort); |
2809 | if (info->icount.rxlong) | 2809 | if (info->icount.rxlong) |
2810 | ret += sprintf(buf+ret, " rxlong:%d", info->icount.rxlong); | 2810 | ret += sprintf(buf+ret, " rxlong:%d", info->icount.rxlong); |
2811 | if (info->icount.rxover) | 2811 | if (info->icount.rxover) |
@@ -2820,18 +2820,18 @@ static inline int line_info(char *buf, MGSLPC_INFO *info) | |||
2820 | if (info->icount.parity) | 2820 | if (info->icount.parity) |
2821 | ret += sprintf(buf+ret, " pe:%d", info->icount.parity); | 2821 | ret += sprintf(buf+ret, " pe:%d", info->icount.parity); |
2822 | if (info->icount.brk) | 2822 | if (info->icount.brk) |
2823 | ret += sprintf(buf+ret, " brk:%d", info->icount.brk); | 2823 | ret += sprintf(buf+ret, " brk:%d", info->icount.brk); |
2824 | if (info->icount.overrun) | 2824 | if (info->icount.overrun) |
2825 | ret += sprintf(buf+ret, " oe:%d", info->icount.overrun); | 2825 | ret += sprintf(buf+ret, " oe:%d", info->icount.overrun); |
2826 | } | 2826 | } |
2827 | 2827 | ||
2828 | /* Append serial signal status to end */ | 2828 | /* Append serial signal status to end */ |
2829 | ret += sprintf(buf+ret, " %s\n", stat_buf+1); | 2829 | ret += sprintf(buf+ret, " %s\n", stat_buf+1); |
2830 | 2830 | ||
2831 | ret += sprintf(buf+ret, "txactive=%d bh_req=%d bh_run=%d pending_bh=%x\n", | 2831 | ret += sprintf(buf+ret, "txactive=%d bh_req=%d bh_run=%d pending_bh=%x\n", |
2832 | info->tx_active,info->bh_requested,info->bh_running, | 2832 | info->tx_active,info->bh_requested,info->bh_running, |
2833 | info->pending_bh); | 2833 | info->pending_bh); |
2834 | 2834 | ||
2835 | return ret; | 2835 | return ret; |
2836 | } | 2836 | } |
2837 | 2837 | ||
@@ -2843,9 +2843,9 @@ static int mgslpc_read_proc(char *page, char **start, off_t off, int count, | |||
2843 | int len = 0, l; | 2843 | int len = 0, l; |
2844 | off_t begin = 0; | 2844 | off_t begin = 0; |
2845 | MGSLPC_INFO *info; | 2845 | MGSLPC_INFO *info; |
2846 | 2846 | ||
2847 | len += sprintf(page, "synclink driver:%s\n", driver_version); | 2847 | len += sprintf(page, "synclink driver:%s\n", driver_version); |
2848 | 2848 | ||
2849 | info = mgslpc_device_list; | 2849 | info = mgslpc_device_list; |
2850 | while( info ) { | 2850 | while( info ) { |
2851 | l = line_info(page + len, info); | 2851 | l = line_info(page + len, info); |
@@ -2902,7 +2902,7 @@ static int claim_resources(MGSLPC_INFO *info) | |||
2902 | printk( "Cant allocate rx buffer %s\n", info->device_name); | 2902 | printk( "Cant allocate rx buffer %s\n", info->device_name); |
2903 | release_resources(info); | 2903 | release_resources(info); |
2904 | return -ENODEV; | 2904 | return -ENODEV; |
2905 | } | 2905 | } |
2906 | return 0; | 2906 | return 0; |
2907 | } | 2907 | } |
2908 | 2908 | ||
@@ -2915,7 +2915,7 @@ static void release_resources(MGSLPC_INFO *info) | |||
2915 | 2915 | ||
2916 | /* Add the specified device instance data structure to the | 2916 | /* Add the specified device instance data structure to the |
2917 | * global linked list of devices and increment the device count. | 2917 | * global linked list of devices and increment the device count. |
2918 | * | 2918 | * |
2919 | * Arguments: info pointer to device instance data | 2919 | * Arguments: info pointer to device instance data |
2920 | */ | 2920 | */ |
2921 | static void mgslpc_add_device(MGSLPC_INFO *info) | 2921 | static void mgslpc_add_device(MGSLPC_INFO *info) |
@@ -2923,7 +2923,7 @@ static void mgslpc_add_device(MGSLPC_INFO *info) | |||
2923 | info->next_device = NULL; | 2923 | info->next_device = NULL; |
2924 | info->line = mgslpc_device_count; | 2924 | info->line = mgslpc_device_count; |
2925 | sprintf(info->device_name,"ttySLP%d",info->line); | 2925 | sprintf(info->device_name,"ttySLP%d",info->line); |
2926 | 2926 | ||
2927 | if (info->line < MAX_DEVICE_COUNT) { | 2927 | if (info->line < MAX_DEVICE_COUNT) { |
2928 | if (maxframe[info->line]) | 2928 | if (maxframe[info->line]) |
2929 | info->max_frame_size = maxframe[info->line]; | 2929 | info->max_frame_size = maxframe[info->line]; |
@@ -2931,21 +2931,21 @@ static void mgslpc_add_device(MGSLPC_INFO *info) | |||
2931 | } | 2931 | } |
2932 | 2932 | ||
2933 | mgslpc_device_count++; | 2933 | mgslpc_device_count++; |
2934 | 2934 | ||
2935 | if (!mgslpc_device_list) | 2935 | if (!mgslpc_device_list) |
2936 | mgslpc_device_list = info; | 2936 | mgslpc_device_list = info; |
2937 | else { | 2937 | else { |
2938 | MGSLPC_INFO *current_dev = mgslpc_device_list; | 2938 | MGSLPC_INFO *current_dev = mgslpc_device_list; |
2939 | while( current_dev->next_device ) | 2939 | while( current_dev->next_device ) |
2940 | current_dev = current_dev->next_device; | 2940 | current_dev = current_dev->next_device; |
2941 | current_dev->next_device = info; | 2941 | current_dev->next_device = info; |
2942 | } | 2942 | } |
2943 | 2943 | ||
2944 | if (info->max_frame_size < 4096) | 2944 | if (info->max_frame_size < 4096) |
2945 | info->max_frame_size = 4096; | 2945 | info->max_frame_size = 4096; |
2946 | else if (info->max_frame_size > 65535) | 2946 | else if (info->max_frame_size > 65535) |
2947 | info->max_frame_size = 65535; | 2947 | info->max_frame_size = 65535; |
2948 | 2948 | ||
2949 | printk( "SyncLink PC Card %s:IO=%04X IRQ=%d\n", | 2949 | printk( "SyncLink PC Card %s:IO=%04X IRQ=%d\n", |
2950 | info->device_name, info->io_base, info->irq_level); | 2950 | info->device_name, info->io_base, info->irq_level); |
2951 | 2951 | ||
@@ -3060,7 +3060,7 @@ static int __init synclink_cs_init(void) | |||
3060 | } | 3060 | } |
3061 | 3061 | ||
3062 | /* Initialize the tty_driver structure */ | 3062 | /* Initialize the tty_driver structure */ |
3063 | 3063 | ||
3064 | serial_driver->owner = THIS_MODULE; | 3064 | serial_driver->owner = THIS_MODULE; |
3065 | serial_driver->driver_name = "synclink_cs"; | 3065 | serial_driver->driver_name = "synclink_cs"; |
3066 | serial_driver->name = "ttySLP"; | 3066 | serial_driver->name = "ttySLP"; |
@@ -3081,11 +3081,11 @@ static int __init synclink_cs_init(void) | |||
3081 | serial_driver = NULL; | 3081 | serial_driver = NULL; |
3082 | goto error; | 3082 | goto error; |
3083 | } | 3083 | } |
3084 | 3084 | ||
3085 | printk("%s %s, tty major#%d\n", | 3085 | printk("%s %s, tty major#%d\n", |
3086 | driver_name, driver_version, | 3086 | driver_name, driver_version, |
3087 | serial_driver->major); | 3087 | serial_driver->major); |
3088 | 3088 | ||
3089 | return 0; | 3089 | return 0; |
3090 | 3090 | ||
3091 | error: | 3091 | error: |
@@ -3093,7 +3093,7 @@ error: | |||
3093 | return rc; | 3093 | return rc; |
3094 | } | 3094 | } |
3095 | 3095 | ||
3096 | static void __exit synclink_cs_exit(void) | 3096 | static void __exit synclink_cs_exit(void) |
3097 | { | 3097 | { |
3098 | synclink_cs_cleanup(); | 3098 | synclink_cs_cleanup(); |
3099 | } | 3099 | } |
@@ -3106,8 +3106,8 @@ static void mgslpc_set_rate(MGSLPC_INFO *info, unsigned char channel, unsigned i | |||
3106 | unsigned int M, N; | 3106 | unsigned int M, N; |
3107 | unsigned char val; | 3107 | unsigned char val; |
3108 | 3108 | ||
3109 | /* note:standard BRG mode is broken in V3.2 chip | 3109 | /* note:standard BRG mode is broken in V3.2 chip |
3110 | * so enhanced mode is always used | 3110 | * so enhanced mode is always used |
3111 | */ | 3111 | */ |
3112 | 3112 | ||
3113 | if (rate) { | 3113 | if (rate) { |
@@ -3126,7 +3126,7 @@ static void mgslpc_set_rate(MGSLPC_INFO *info, unsigned char channel, unsigned i | |||
3126 | * divisor = (N+1)*2^M | 3126 | * divisor = (N+1)*2^M |
3127 | * | 3127 | * |
3128 | * Note: M *must* not be zero (causes asymetric duty cycle) | 3128 | * Note: M *must* not be zero (causes asymetric duty cycle) |
3129 | */ | 3129 | */ |
3130 | write_reg(info, (unsigned char) (channel + BGR), | 3130 | write_reg(info, (unsigned char) (channel + BGR), |
3131 | (unsigned char) ((M << 6) + N)); | 3131 | (unsigned char) ((M << 6) + N)); |
3132 | val = read_reg(info, (unsigned char) (channel + CCR2)) & 0x3f; | 3132 | val = read_reg(info, (unsigned char) (channel + CCR2)) & 0x3f; |
@@ -3140,7 +3140,7 @@ static void mgslpc_set_rate(MGSLPC_INFO *info, unsigned char channel, unsigned i | |||
3140 | static void enable_auxclk(MGSLPC_INFO *info) | 3140 | static void enable_auxclk(MGSLPC_INFO *info) |
3141 | { | 3141 | { |
3142 | unsigned char val; | 3142 | unsigned char val; |
3143 | 3143 | ||
3144 | /* MODE | 3144 | /* MODE |
3145 | * | 3145 | * |
3146 | * 07..06 MDS[1..0] 10 = transparent HDLC mode | 3146 | * 07..06 MDS[1..0] 10 = transparent HDLC mode |
@@ -3152,14 +3152,14 @@ static void enable_auxclk(MGSLPC_INFO *info) | |||
3152 | * 00 TLP Test Loop, 0 = no loop | 3152 | * 00 TLP Test Loop, 0 = no loop |
3153 | * | 3153 | * |
3154 | * 1000 0010 | 3154 | * 1000 0010 |
3155 | */ | 3155 | */ |
3156 | val = 0x82; | 3156 | val = 0x82; |
3157 | 3157 | ||
3158 | /* channel B RTS is used to enable AUXCLK driver on SP505 */ | 3158 | /* channel B RTS is used to enable AUXCLK driver on SP505 */ |
3159 | if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed) | 3159 | if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed) |
3160 | val |= BIT2; | 3160 | val |= BIT2; |
3161 | write_reg(info, CHB + MODE, val); | 3161 | write_reg(info, CHB + MODE, val); |
3162 | 3162 | ||
3163 | /* CCR0 | 3163 | /* CCR0 |
3164 | * | 3164 | * |
3165 | * 07 PU Power Up, 1=active, 0=power down | 3165 | * 07 PU Power Up, 1=active, 0=power down |
@@ -3169,9 +3169,9 @@ static void enable_auxclk(MGSLPC_INFO *info) | |||
3169 | * 01..00 SM[1..0] Serial Mode, 00=HDLC | 3169 | * 01..00 SM[1..0] Serial Mode, 00=HDLC |
3170 | * | 3170 | * |
3171 | * 11000000 | 3171 | * 11000000 |
3172 | */ | 3172 | */ |
3173 | write_reg(info, CHB + CCR0, 0xc0); | 3173 | write_reg(info, CHB + CCR0, 0xc0); |
3174 | 3174 | ||
3175 | /* CCR1 | 3175 | /* CCR1 |
3176 | * | 3176 | * |
3177 | * 07 SFLG Shared Flag, 0 = disable shared flags | 3177 | * 07 SFLG Shared Flag, 0 = disable shared flags |
@@ -3182,9 +3182,9 @@ static void enable_auxclk(MGSLPC_INFO *info) | |||
3182 | * 02..00 CM[2..0] Clock Mode | 3182 | * 02..00 CM[2..0] Clock Mode |
3183 | * | 3183 | * |
3184 | * 0001 0111 | 3184 | * 0001 0111 |
3185 | */ | 3185 | */ |
3186 | write_reg(info, CHB + CCR1, 0x17); | 3186 | write_reg(info, CHB + CCR1, 0x17); |
3187 | 3187 | ||
3188 | /* CCR2 (Channel B) | 3188 | /* CCR2 (Channel B) |
3189 | * | 3189 | * |
3190 | * 07..06 BGR[9..8] Baud rate bits 9..8 | 3190 | * 07..06 BGR[9..8] Baud rate bits 9..8 |
@@ -3196,12 +3196,12 @@ static void enable_auxclk(MGSLPC_INFO *info) | |||
3196 | * 00 DIV, data inversion 0=disabled, 1=enabled | 3196 | * 00 DIV, data inversion 0=disabled, 1=enabled |
3197 | * | 3197 | * |
3198 | * 0011 1000 | 3198 | * 0011 1000 |
3199 | */ | 3199 | */ |
3200 | if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed) | 3200 | if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed) |
3201 | write_reg(info, CHB + CCR2, 0x38); | 3201 | write_reg(info, CHB + CCR2, 0x38); |
3202 | else | 3202 | else |
3203 | write_reg(info, CHB + CCR2, 0x30); | 3203 | write_reg(info, CHB + CCR2, 0x30); |
3204 | 3204 | ||
3205 | /* CCR4 | 3205 | /* CCR4 |
3206 | * | 3206 | * |
3207 | * 07 MCK4 Master Clock Divide by 4, 1=enabled | 3207 | * 07 MCK4 Master Clock Divide by 4, 1=enabled |
@@ -3212,37 +3212,37 @@ static void enable_auxclk(MGSLPC_INFO *info) | |||
3212 | * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes | 3212 | * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes |
3213 | * | 3213 | * |
3214 | * 0101 0000 | 3214 | * 0101 0000 |
3215 | */ | 3215 | */ |
3216 | write_reg(info, CHB + CCR4, 0x50); | 3216 | write_reg(info, CHB + CCR4, 0x50); |
3217 | 3217 | ||
3218 | /* if auxclk not enabled, set internal BRG so | 3218 | /* if auxclk not enabled, set internal BRG so |
3219 | * CTS transitions can be detected (requires TxC) | 3219 | * CTS transitions can be detected (requires TxC) |
3220 | */ | 3220 | */ |
3221 | if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed) | 3221 | if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed) |
3222 | mgslpc_set_rate(info, CHB, info->params.clock_speed); | 3222 | mgslpc_set_rate(info, CHB, info->params.clock_speed); |
3223 | else | 3223 | else |
3224 | mgslpc_set_rate(info, CHB, 921600); | 3224 | mgslpc_set_rate(info, CHB, 921600); |
3225 | } | 3225 | } |
3226 | 3226 | ||
3227 | static void loopback_enable(MGSLPC_INFO *info) | 3227 | static void loopback_enable(MGSLPC_INFO *info) |
3228 | { | 3228 | { |
3229 | unsigned char val; | 3229 | unsigned char val; |
3230 | 3230 | ||
3231 | /* CCR1:02..00 CM[2..0] Clock Mode = 111 (clock mode 7) */ | 3231 | /* CCR1:02..00 CM[2..0] Clock Mode = 111 (clock mode 7) */ |
3232 | val = read_reg(info, CHA + CCR1) | (BIT2 + BIT1 + BIT0); | 3232 | val = read_reg(info, CHA + CCR1) | (BIT2 + BIT1 + BIT0); |
3233 | write_reg(info, CHA + CCR1, val); | 3233 | write_reg(info, CHA + CCR1, val); |
3234 | 3234 | ||
3235 | /* CCR2:04 SSEL Clock source select, 1=submode b */ | 3235 | /* CCR2:04 SSEL Clock source select, 1=submode b */ |
3236 | val = read_reg(info, CHA + CCR2) | (BIT4 + BIT5); | 3236 | val = read_reg(info, CHA + CCR2) | (BIT4 + BIT5); |
3237 | write_reg(info, CHA + CCR2, val); | 3237 | write_reg(info, CHA + CCR2, val); |
3238 | 3238 | ||
3239 | /* set LinkSpeed if available, otherwise default to 2Mbps */ | 3239 | /* set LinkSpeed if available, otherwise default to 2Mbps */ |
3240 | if (info->params.clock_speed) | 3240 | if (info->params.clock_speed) |
3241 | mgslpc_set_rate(info, CHA, info->params.clock_speed); | 3241 | mgslpc_set_rate(info, CHA, info->params.clock_speed); |
3242 | else | 3242 | else |
3243 | mgslpc_set_rate(info, CHA, 1843200); | 3243 | mgslpc_set_rate(info, CHA, 1843200); |
3244 | 3244 | ||
3245 | /* MODE:00 TLP Test Loop, 1=loopback enabled */ | 3245 | /* MODE:00 TLP Test Loop, 1=loopback enabled */ |
3246 | val = read_reg(info, CHA + MODE) | BIT0; | 3246 | val = read_reg(info, CHA + MODE) | BIT0; |
3247 | write_reg(info, CHA + MODE, val); | 3247 | write_reg(info, CHA + MODE, val); |
3248 | } | 3248 | } |
@@ -3252,36 +3252,36 @@ static void hdlc_mode(MGSLPC_INFO *info) | |||
3252 | unsigned char val; | 3252 | unsigned char val; |
3253 | unsigned char clkmode, clksubmode; | 3253 | unsigned char clkmode, clksubmode; |
3254 | 3254 | ||
3255 | /* disable all interrupts */ | 3255 | /* disable all interrupts */ |
3256 | irq_disable(info, CHA, 0xffff); | 3256 | irq_disable(info, CHA, 0xffff); |
3257 | irq_disable(info, CHB, 0xffff); | 3257 | irq_disable(info, CHB, 0xffff); |
3258 | port_irq_disable(info, 0xff); | 3258 | port_irq_disable(info, 0xff); |
3259 | 3259 | ||
3260 | /* assume clock mode 0a, rcv=RxC xmt=TxC */ | 3260 | /* assume clock mode 0a, rcv=RxC xmt=TxC */ |
3261 | clkmode = clksubmode = 0; | 3261 | clkmode = clksubmode = 0; |
3262 | if (info->params.flags & HDLC_FLAG_RXC_DPLL | 3262 | if (info->params.flags & HDLC_FLAG_RXC_DPLL |
3263 | && info->params.flags & HDLC_FLAG_TXC_DPLL) { | 3263 | && info->params.flags & HDLC_FLAG_TXC_DPLL) { |
3264 | /* clock mode 7a, rcv = DPLL, xmt = DPLL */ | 3264 | /* clock mode 7a, rcv = DPLL, xmt = DPLL */ |
3265 | clkmode = 7; | 3265 | clkmode = 7; |
3266 | } else if (info->params.flags & HDLC_FLAG_RXC_BRG | 3266 | } else if (info->params.flags & HDLC_FLAG_RXC_BRG |
3267 | && info->params.flags & HDLC_FLAG_TXC_BRG) { | 3267 | && info->params.flags & HDLC_FLAG_TXC_BRG) { |
3268 | /* clock mode 7b, rcv = BRG, xmt = BRG */ | 3268 | /* clock mode 7b, rcv = BRG, xmt = BRG */ |
3269 | clkmode = 7; | 3269 | clkmode = 7; |
3270 | clksubmode = 1; | 3270 | clksubmode = 1; |
3271 | } else if (info->params.flags & HDLC_FLAG_RXC_DPLL) { | 3271 | } else if (info->params.flags & HDLC_FLAG_RXC_DPLL) { |
3272 | if (info->params.flags & HDLC_FLAG_TXC_BRG) { | 3272 | if (info->params.flags & HDLC_FLAG_TXC_BRG) { |
3273 | /* clock mode 6b, rcv = DPLL, xmt = BRG/16 */ | 3273 | /* clock mode 6b, rcv = DPLL, xmt = BRG/16 */ |
3274 | clkmode = 6; | 3274 | clkmode = 6; |
3275 | clksubmode = 1; | 3275 | clksubmode = 1; |
3276 | } else { | 3276 | } else { |
3277 | /* clock mode 6a, rcv = DPLL, xmt = TxC */ | 3277 | /* clock mode 6a, rcv = DPLL, xmt = TxC */ |
3278 | clkmode = 6; | 3278 | clkmode = 6; |
3279 | } | 3279 | } |
3280 | } else if (info->params.flags & HDLC_FLAG_TXC_BRG) { | 3280 | } else if (info->params.flags & HDLC_FLAG_TXC_BRG) { |
3281 | /* clock mode 0b, rcv = RxC, xmt = BRG */ | 3281 | /* clock mode 0b, rcv = RxC, xmt = BRG */ |
3282 | clksubmode = 1; | 3282 | clksubmode = 1; |
3283 | } | 3283 | } |
3284 | 3284 | ||
3285 | /* MODE | 3285 | /* MODE |
3286 | * | 3286 | * |
3287 | * 07..06 MDS[1..0] 10 = transparent HDLC mode | 3287 | * 07..06 MDS[1..0] 10 = transparent HDLC mode |
@@ -3293,16 +3293,16 @@ static void hdlc_mode(MGSLPC_INFO *info) | |||
3293 | * 00 TLP Test Loop, 0 = no loop | 3293 | * 00 TLP Test Loop, 0 = no loop |
3294 | * | 3294 | * |
3295 | * 1000 0010 | 3295 | * 1000 0010 |
3296 | */ | 3296 | */ |
3297 | val = 0x82; | 3297 | val = 0x82; |
3298 | if (info->params.loopback) | 3298 | if (info->params.loopback) |
3299 | val |= BIT0; | 3299 | val |= BIT0; |
3300 | 3300 | ||
3301 | /* preserve RTS state */ | 3301 | /* preserve RTS state */ |
3302 | if (info->serial_signals & SerialSignal_RTS) | 3302 | if (info->serial_signals & SerialSignal_RTS) |
3303 | val |= BIT2; | 3303 | val |= BIT2; |
3304 | write_reg(info, CHA + MODE, val); | 3304 | write_reg(info, CHA + MODE, val); |
3305 | 3305 | ||
3306 | /* CCR0 | 3306 | /* CCR0 |
3307 | * | 3307 | * |
3308 | * 07 PU Power Up, 1=active, 0=power down | 3308 | * 07 PU Power Up, 1=active, 0=power down |
@@ -3312,7 +3312,7 @@ static void hdlc_mode(MGSLPC_INFO *info) | |||
3312 | * 01..00 SM[1..0] Serial Mode, 00=HDLC | 3312 | * 01..00 SM[1..0] Serial Mode, 00=HDLC |
3313 | * | 3313 | * |
3314 | * 11000000 | 3314 | * 11000000 |
3315 | */ | 3315 | */ |
3316 | val = 0xc0; | 3316 | val = 0xc0; |
3317 | switch (info->params.encoding) | 3317 | switch (info->params.encoding) |
3318 | { | 3318 | { |
@@ -3330,7 +3330,7 @@ static void hdlc_mode(MGSLPC_INFO *info) | |||
3330 | break; // Manchester | 3330 | break; // Manchester |
3331 | } | 3331 | } |
3332 | write_reg(info, CHA + CCR0, val); | 3332 | write_reg(info, CHA + CCR0, val); |
3333 | 3333 | ||
3334 | /* CCR1 | 3334 | /* CCR1 |
3335 | * | 3335 | * |
3336 | * 07 SFLG Shared Flag, 0 = disable shared flags | 3336 | * 07 SFLG Shared Flag, 0 = disable shared flags |
@@ -3341,10 +3341,10 @@ static void hdlc_mode(MGSLPC_INFO *info) | |||
3341 | * 02..00 CM[2..0] Clock Mode | 3341 | * 02..00 CM[2..0] Clock Mode |
3342 | * | 3342 | * |
3343 | * 0001 0000 | 3343 | * 0001 0000 |
3344 | */ | 3344 | */ |
3345 | val = 0x10 + clkmode; | 3345 | val = 0x10 + clkmode; |
3346 | write_reg(info, CHA + CCR1, val); | 3346 | write_reg(info, CHA + CCR1, val); |
3347 | 3347 | ||
3348 | /* CCR2 | 3348 | /* CCR2 |
3349 | * | 3349 | * |
3350 | * 07..06 BGR[9..8] Baud rate bits 9..8 | 3350 | * 07..06 BGR[9..8] Baud rate bits 9..8 |
@@ -3356,7 +3356,7 @@ static void hdlc_mode(MGSLPC_INFO *info) | |||
3356 | * 00 DIV, data inversion 0=disabled, 1=enabled | 3356 | * 00 DIV, data inversion 0=disabled, 1=enabled |
3357 | * | 3357 | * |
3358 | * 0000 0000 | 3358 | * 0000 0000 |
3359 | */ | 3359 | */ |
3360 | val = 0x00; | 3360 | val = 0x00; |
3361 | if (clkmode == 2 || clkmode == 3 || clkmode == 6 | 3361 | if (clkmode == 2 || clkmode == 3 || clkmode == 6 |
3362 | || clkmode == 7 || (clkmode == 0 && clksubmode == 1)) | 3362 | || clkmode == 7 || (clkmode == 0 && clksubmode == 1)) |
@@ -3368,7 +3368,7 @@ static void hdlc_mode(MGSLPC_INFO *info) | |||
3368 | if (info->params.encoding == HDLC_ENCODING_NRZB) | 3368 | if (info->params.encoding == HDLC_ENCODING_NRZB) |
3369 | val |= BIT0; | 3369 | val |= BIT0; |
3370 | write_reg(info, CHA + CCR2, val); | 3370 | write_reg(info, CHA + CCR2, val); |
3371 | 3371 | ||
3372 | /* CCR3 | 3372 | /* CCR3 |
3373 | * | 3373 | * |
3374 | * 07..06 PRE[1..0] Preamble count 00=1, 01=2, 10=4, 11=8 | 3374 | * 07..06 PRE[1..0] Preamble count 00=1, 01=2, 10=4, 11=8 |
@@ -3380,7 +3380,7 @@ static void hdlc_mode(MGSLPC_INFO *info) | |||
3380 | * 00 PSD DPLL Phase Shift Disable | 3380 | * 00 PSD DPLL Phase Shift Disable |
3381 | * | 3381 | * |
3382 | * 0000 0000 | 3382 | * 0000 0000 |
3383 | */ | 3383 | */ |
3384 | val = 0x00; | 3384 | val = 0x00; |
3385 | if (info->params.crc_type == HDLC_CRC_NONE) | 3385 | if (info->params.crc_type == HDLC_CRC_NONE) |
3386 | val |= BIT2 + BIT1; | 3386 | val |= BIT2 + BIT1; |
@@ -3399,8 +3399,8 @@ static void hdlc_mode(MGSLPC_INFO *info) | |||
3399 | break; | 3399 | break; |
3400 | } | 3400 | } |
3401 | write_reg(info, CHA + CCR3, val); | 3401 | write_reg(info, CHA + CCR3, val); |
3402 | 3402 | ||
3403 | /* PRE - Preamble pattern */ | 3403 | /* PRE - Preamble pattern */ |
3404 | val = 0; | 3404 | val = 0; |
3405 | switch (info->params.preamble) | 3405 | switch (info->params.preamble) |
3406 | { | 3406 | { |
@@ -3410,7 +3410,7 @@ static void hdlc_mode(MGSLPC_INFO *info) | |||
3410 | case HDLC_PREAMBLE_PATTERN_ONES: val = 0xff; break; | 3410 | case HDLC_PREAMBLE_PATTERN_ONES: val = 0xff; break; |
3411 | } | 3411 | } |
3412 | write_reg(info, CHA + PRE, val); | 3412 | write_reg(info, CHA + PRE, val); |
3413 | 3413 | ||
3414 | /* CCR4 | 3414 | /* CCR4 |
3415 | * | 3415 | * |
3416 | * 07 MCK4 Master Clock Divide by 4, 1=enabled | 3416 | * 07 MCK4 Master Clock Divide by 4, 1=enabled |
@@ -3421,21 +3421,21 @@ static void hdlc_mode(MGSLPC_INFO *info) | |||
3421 | * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes | 3421 | * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes |
3422 | * | 3422 | * |
3423 | * 0101 0000 | 3423 | * 0101 0000 |
3424 | */ | 3424 | */ |
3425 | val = 0x50; | 3425 | val = 0x50; |
3426 | write_reg(info, CHA + CCR4, val); | 3426 | write_reg(info, CHA + CCR4, val); |
3427 | if (info->params.flags & HDLC_FLAG_RXC_DPLL) | 3427 | if (info->params.flags & HDLC_FLAG_RXC_DPLL) |
3428 | mgslpc_set_rate(info, CHA, info->params.clock_speed * 16); | 3428 | mgslpc_set_rate(info, CHA, info->params.clock_speed * 16); |
3429 | else | 3429 | else |
3430 | mgslpc_set_rate(info, CHA, info->params.clock_speed); | 3430 | mgslpc_set_rate(info, CHA, info->params.clock_speed); |
3431 | 3431 | ||
3432 | /* RLCR Receive length check register | 3432 | /* RLCR Receive length check register |
3433 | * | 3433 | * |
3434 | * 7 1=enable receive length check | 3434 | * 7 1=enable receive length check |
3435 | * 6..0 Max frame length = (RL + 1) * 32 | 3435 | * 6..0 Max frame length = (RL + 1) * 32 |
3436 | */ | 3436 | */ |
3437 | write_reg(info, CHA + RLCR, 0); | 3437 | write_reg(info, CHA + RLCR, 0); |
3438 | 3438 | ||
3439 | /* XBCH Transmit Byte Count High | 3439 | /* XBCH Transmit Byte Count High |
3440 | * | 3440 | * |
3441 | * 07 DMA mode, 0 = interrupt driven | 3441 | * 07 DMA mode, 0 = interrupt driven |
@@ -3445,7 +3445,7 @@ static void hdlc_mode(MGSLPC_INFO *info) | |||
3445 | * 03..00 XBC[10..8] Transmit byte count bits 10..8 | 3445 | * 03..00 XBC[10..8] Transmit byte count bits 10..8 |
3446 | * | 3446 | * |
3447 | * 0000 0000 | 3447 | * 0000 0000 |
3448 | */ | 3448 | */ |
3449 | val = 0x00; | 3449 | val = 0x00; |
3450 | if (info->params.flags & HDLC_FLAG_AUTO_DCD) | 3450 | if (info->params.flags & HDLC_FLAG_AUTO_DCD) |
3451 | val |= BIT5; | 3451 | val |= BIT5; |
@@ -3456,7 +3456,7 @@ static void hdlc_mode(MGSLPC_INFO *info) | |||
3456 | if (info->params.flags & HDLC_FLAG_AUTO_CTS) | 3456 | if (info->params.flags & HDLC_FLAG_AUTO_CTS) |
3457 | { | 3457 | { |
3458 | irq_enable(info, CHB, IRQ_CTS); | 3458 | irq_enable(info, CHB, IRQ_CTS); |
3459 | /* PVR[3] 1=AUTO CTS active */ | 3459 | /* PVR[3] 1=AUTO CTS active */ |
3460 | set_reg_bits(info, CHA + PVR, BIT3); | 3460 | set_reg_bits(info, CHA + PVR, BIT3); |
3461 | } else | 3461 | } else |
3462 | clear_reg_bits(info, CHA + PVR, BIT3); | 3462 | clear_reg_bits(info, CHA + PVR, BIT3); |
@@ -3467,7 +3467,7 @@ static void hdlc_mode(MGSLPC_INFO *info) | |||
3467 | issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET); | 3467 | issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET); |
3468 | wait_command_complete(info, CHA); | 3468 | wait_command_complete(info, CHA); |
3469 | read_reg16(info, CHA + ISR); /* clear pending IRQs */ | 3469 | read_reg16(info, CHA + ISR); /* clear pending IRQs */ |
3470 | 3470 | ||
3471 | /* Master clock mode enabled above to allow reset commands | 3471 | /* Master clock mode enabled above to allow reset commands |
3472 | * to complete even if no data clocks are present. | 3472 | * to complete even if no data clocks are present. |
3473 | * | 3473 | * |
@@ -3477,7 +3477,7 @@ static void hdlc_mode(MGSLPC_INFO *info) | |||
3477 | * | 3477 | * |
3478 | * Leave master clock mode enabled for IRQ test because the | 3478 | * Leave master clock mode enabled for IRQ test because the |
3479 | * timer IRQ used by the test can only happen in master clock mode. | 3479 | * timer IRQ used by the test can only happen in master clock mode. |
3480 | */ | 3480 | */ |
3481 | if (!info->testing_irq) | 3481 | if (!info->testing_irq) |
3482 | clear_reg_bits(info, CHA + CCR0, BIT6); | 3482 | clear_reg_bits(info, CHA + CCR0, BIT6); |
3483 | 3483 | ||
@@ -3492,8 +3492,8 @@ static void rx_stop(MGSLPC_INFO *info) | |||
3492 | if (debug_level >= DEBUG_LEVEL_ISR) | 3492 | if (debug_level >= DEBUG_LEVEL_ISR) |
3493 | printk("%s(%d):rx_stop(%s)\n", | 3493 | printk("%s(%d):rx_stop(%s)\n", |
3494 | __FILE__,__LINE__, info->device_name ); | 3494 | __FILE__,__LINE__, info->device_name ); |
3495 | 3495 | ||
3496 | /* MODE:03 RAC Receiver Active, 0=inactive */ | 3496 | /* MODE:03 RAC Receiver Active, 0=inactive */ |
3497 | clear_reg_bits(info, CHA + MODE, BIT3); | 3497 | clear_reg_bits(info, CHA + MODE, BIT3); |
3498 | 3498 | ||
3499 | info->rx_enabled = 0; | 3499 | info->rx_enabled = 0; |
@@ -3510,7 +3510,7 @@ static void rx_start(MGSLPC_INFO *info) | |||
3510 | info->rx_enabled = 0; | 3510 | info->rx_enabled = 0; |
3511 | info->rx_overflow = 0; | 3511 | info->rx_overflow = 0; |
3512 | 3512 | ||
3513 | /* MODE:03 RAC Receiver Active, 1=active */ | 3513 | /* MODE:03 RAC Receiver Active, 1=active */ |
3514 | set_reg_bits(info, CHA + MODE, BIT3); | 3514 | set_reg_bits(info, CHA + MODE, BIT3); |
3515 | 3515 | ||
3516 | info->rx_enabled = 1; | 3516 | info->rx_enabled = 1; |
@@ -3521,7 +3521,7 @@ static void tx_start(MGSLPC_INFO *info) | |||
3521 | if (debug_level >= DEBUG_LEVEL_ISR) | 3521 | if (debug_level >= DEBUG_LEVEL_ISR) |
3522 | printk("%s(%d):tx_start(%s)\n", | 3522 | printk("%s(%d):tx_start(%s)\n", |
3523 | __FILE__,__LINE__, info->device_name ); | 3523 | __FILE__,__LINE__, info->device_name ); |
3524 | 3524 | ||
3525 | if (info->tx_count) { | 3525 | if (info->tx_count) { |
3526 | /* If auto RTS enabled and RTS is inactive, then assert */ | 3526 | /* If auto RTS enabled and RTS is inactive, then assert */ |
3527 | /* RTS and set a flag indicating that the driver should */ | 3527 | /* RTS and set a flag indicating that the driver should */ |
@@ -3559,8 +3559,8 @@ static void tx_stop(MGSLPC_INFO *info) | |||
3559 | if (debug_level >= DEBUG_LEVEL_ISR) | 3559 | if (debug_level >= DEBUG_LEVEL_ISR) |
3560 | printk("%s(%d):tx_stop(%s)\n", | 3560 | printk("%s(%d):tx_stop(%s)\n", |
3561 | __FILE__,__LINE__, info->device_name ); | 3561 | __FILE__,__LINE__, info->device_name ); |
3562 | 3562 | ||
3563 | del_timer(&info->tx_timer); | 3563 | del_timer(&info->tx_timer); |
3564 | 3564 | ||
3565 | info->tx_enabled = 0; | 3565 | info->tx_enabled = 0; |
3566 | info->tx_active = 0; | 3566 | info->tx_active = 0; |
@@ -3570,17 +3570,17 @@ static void tx_stop(MGSLPC_INFO *info) | |||
3570 | */ | 3570 | */ |
3571 | static void reset_device(MGSLPC_INFO *info) | 3571 | static void reset_device(MGSLPC_INFO *info) |
3572 | { | 3572 | { |
3573 | /* power up both channels (set BIT7) */ | 3573 | /* power up both channels (set BIT7) */ |
3574 | write_reg(info, CHA + CCR0, 0x80); | 3574 | write_reg(info, CHA + CCR0, 0x80); |
3575 | write_reg(info, CHB + CCR0, 0x80); | 3575 | write_reg(info, CHB + CCR0, 0x80); |
3576 | write_reg(info, CHA + MODE, 0); | 3576 | write_reg(info, CHA + MODE, 0); |
3577 | write_reg(info, CHB + MODE, 0); | 3577 | write_reg(info, CHB + MODE, 0); |
3578 | 3578 | ||
3579 | /* disable all interrupts */ | 3579 | /* disable all interrupts */ |
3580 | irq_disable(info, CHA, 0xffff); | 3580 | irq_disable(info, CHA, 0xffff); |
3581 | irq_disable(info, CHB, 0xffff); | 3581 | irq_disable(info, CHB, 0xffff); |
3582 | port_irq_disable(info, 0xff); | 3582 | port_irq_disable(info, 0xff); |
3583 | 3583 | ||
3584 | /* PCR Port Configuration Register | 3584 | /* PCR Port Configuration Register |
3585 | * | 3585 | * |
3586 | * 07..04 DEC[3..0] Serial I/F select outputs | 3586 | * 07..04 DEC[3..0] Serial I/F select outputs |
@@ -3590,9 +3590,9 @@ static void reset_device(MGSLPC_INFO *info) | |||
3590 | * 00 DTR output 0=active | 3590 | * 00 DTR output 0=active |
3591 | * | 3591 | * |
3592 | * 0000 0110 | 3592 | * 0000 0110 |
3593 | */ | 3593 | */ |
3594 | write_reg(info, PCR, 0x06); | 3594 | write_reg(info, PCR, 0x06); |
3595 | 3595 | ||
3596 | /* PVR Port Value Register | 3596 | /* PVR Port Value Register |
3597 | * | 3597 | * |
3598 | * 07..04 DEC[3..0] Serial I/F select (0000=disabled) | 3598 | * 07..04 DEC[3..0] Serial I/F select (0000=disabled) |
@@ -3604,7 +3604,7 @@ static void reset_device(MGSLPC_INFO *info) | |||
3604 | * 0000 0001 | 3604 | * 0000 0001 |
3605 | */ | 3605 | */ |
3606 | // write_reg(info, PVR, PVR_DTR); | 3606 | // write_reg(info, PVR, PVR_DTR); |
3607 | 3607 | ||
3608 | /* IPC Interrupt Port Configuration | 3608 | /* IPC Interrupt Port Configuration |
3609 | * | 3609 | * |
3610 | * 07 VIS 1=Masked interrupts visible | 3610 | * 07 VIS 1=Masked interrupts visible |
@@ -3614,7 +3614,7 @@ static void reset_device(MGSLPC_INFO *info) | |||
3614 | * 01..00 IC[1..0] Interrupt Config, 01=push-pull output, active low | 3614 | * 01..00 IC[1..0] Interrupt Config, 01=push-pull output, active low |
3615 | * | 3615 | * |
3616 | * 0000 0101 | 3616 | * 0000 0101 |
3617 | */ | 3617 | */ |
3618 | write_reg(info, IPC, 0x05); | 3618 | write_reg(info, IPC, 0x05); |
3619 | } | 3619 | } |
3620 | 3620 | ||
@@ -3622,11 +3622,11 @@ static void async_mode(MGSLPC_INFO *info) | |||
3622 | { | 3622 | { |
3623 | unsigned char val; | 3623 | unsigned char val; |
3624 | 3624 | ||
3625 | /* disable all interrupts */ | 3625 | /* disable all interrupts */ |
3626 | irq_disable(info, CHA, 0xffff); | 3626 | irq_disable(info, CHA, 0xffff); |
3627 | irq_disable(info, CHB, 0xffff); | 3627 | irq_disable(info, CHB, 0xffff); |
3628 | port_irq_disable(info, 0xff); | 3628 | port_irq_disable(info, 0xff); |
3629 | 3629 | ||
3630 | /* MODE | 3630 | /* MODE |
3631 | * | 3631 | * |
3632 | * 07 Reserved, 0 | 3632 | * 07 Reserved, 0 |
@@ -3639,16 +3639,16 @@ static void async_mode(MGSLPC_INFO *info) | |||
3639 | * 00 TLP Test Loop, 0 = no loop | 3639 | * 00 TLP Test Loop, 0 = no loop |
3640 | * | 3640 | * |
3641 | * 0000 0110 | 3641 | * 0000 0110 |
3642 | */ | 3642 | */ |
3643 | val = 0x06; | 3643 | val = 0x06; |
3644 | if (info->params.loopback) | 3644 | if (info->params.loopback) |
3645 | val |= BIT0; | 3645 | val |= BIT0; |
3646 | 3646 | ||
3647 | /* preserve RTS state */ | 3647 | /* preserve RTS state */ |
3648 | if (!(info->serial_signals & SerialSignal_RTS)) | 3648 | if (!(info->serial_signals & SerialSignal_RTS)) |
3649 | val |= BIT6; | 3649 | val |= BIT6; |
3650 | write_reg(info, CHA + MODE, val); | 3650 | write_reg(info, CHA + MODE, val); |
3651 | 3651 | ||
3652 | /* CCR0 | 3652 | /* CCR0 |
3653 | * | 3653 | * |
3654 | * 07 PU Power Up, 1=active, 0=power down | 3654 | * 07 PU Power Up, 1=active, 0=power down |
@@ -3658,9 +3658,9 @@ static void async_mode(MGSLPC_INFO *info) | |||
3658 | * 01..00 SM[1..0] Serial Mode, 11=Async | 3658 | * 01..00 SM[1..0] Serial Mode, 11=Async |
3659 | * | 3659 | * |
3660 | * 1000 0011 | 3660 | * 1000 0011 |
3661 | */ | 3661 | */ |
3662 | write_reg(info, CHA + CCR0, 0x83); | 3662 | write_reg(info, CHA + CCR0, 0x83); |
3663 | 3663 | ||
3664 | /* CCR1 | 3664 | /* CCR1 |
3665 | * | 3665 | * |
3666 | * 07..05 Reserved, 0 | 3666 | * 07..05 Reserved, 0 |
@@ -3669,9 +3669,9 @@ static void async_mode(MGSLPC_INFO *info) | |||
3669 | * 02..00 CM[2..0] Clock Mode, 111=BRG | 3669 | * 02..00 CM[2..0] Clock Mode, 111=BRG |
3670 | * | 3670 | * |
3671 | * 0001 1111 | 3671 | * 0001 1111 |
3672 | */ | 3672 | */ |
3673 | write_reg(info, CHA + CCR1, 0x1f); | 3673 | write_reg(info, CHA + CCR1, 0x1f); |
3674 | 3674 | ||
3675 | /* CCR2 (channel A) | 3675 | /* CCR2 (channel A) |
3676 | * | 3676 | * |
3677 | * 07..06 BGR[9..8] Baud rate bits 9..8 | 3677 | * 07..06 BGR[9..8] Baud rate bits 9..8 |
@@ -3683,18 +3683,18 @@ static void async_mode(MGSLPC_INFO *info) | |||
3683 | * 00 DIV, data inversion 0=disabled, 1=enabled | 3683 | * 00 DIV, data inversion 0=disabled, 1=enabled |
3684 | * | 3684 | * |
3685 | * 0001 0000 | 3685 | * 0001 0000 |
3686 | */ | 3686 | */ |
3687 | write_reg(info, CHA + CCR2, 0x10); | 3687 | write_reg(info, CHA + CCR2, 0x10); |
3688 | 3688 | ||
3689 | /* CCR3 | 3689 | /* CCR3 |
3690 | * | 3690 | * |
3691 | * 07..01 Reserved, 0 | 3691 | * 07..01 Reserved, 0 |
3692 | * 00 PSD DPLL Phase Shift Disable | 3692 | * 00 PSD DPLL Phase Shift Disable |
3693 | * | 3693 | * |
3694 | * 0000 0000 | 3694 | * 0000 0000 |
3695 | */ | 3695 | */ |
3696 | write_reg(info, CHA + CCR3, 0); | 3696 | write_reg(info, CHA + CCR3, 0); |
3697 | 3697 | ||
3698 | /* CCR4 | 3698 | /* CCR4 |
3699 | * | 3699 | * |
3700 | * 07 MCK4 Master Clock Divide by 4, 1=enabled | 3700 | * 07 MCK4 Master Clock Divide by 4, 1=enabled |
@@ -3704,10 +3704,10 @@ static void async_mode(MGSLPC_INFO *info) | |||
3704 | * 03..00 Reserved, must be 0 | 3704 | * 03..00 Reserved, must be 0 |
3705 | * | 3705 | * |
3706 | * 0101 0000 | 3706 | * 0101 0000 |
3707 | */ | 3707 | */ |
3708 | write_reg(info, CHA + CCR4, 0x50); | 3708 | write_reg(info, CHA + CCR4, 0x50); |
3709 | mgslpc_set_rate(info, CHA, info->params.data_rate * 16); | 3709 | mgslpc_set_rate(info, CHA, info->params.data_rate * 16); |
3710 | 3710 | ||
3711 | /* DAFO Data Format | 3711 | /* DAFO Data Format |
3712 | * | 3712 | * |
3713 | * 07 Reserved, 0 | 3713 | * 07 Reserved, 0 |
@@ -3717,7 +3717,7 @@ static void async_mode(MGSLPC_INFO *info) | |||
3717 | * 02 PAREN Parity Enable | 3717 | * 02 PAREN Parity Enable |
3718 | * 01..00 CHL[1..0] Character Length (00=8, 01=7) | 3718 | * 01..00 CHL[1..0] Character Length (00=8, 01=7) |
3719 | * | 3719 | * |
3720 | */ | 3720 | */ |
3721 | val = 0x00; | 3721 | val = 0x00; |
3722 | if (info->params.data_bits != 8) | 3722 | if (info->params.data_bits != 8) |
3723 | val |= BIT0; /* 7 bits */ | 3723 | val |= BIT0; /* 7 bits */ |
@@ -3732,7 +3732,7 @@ static void async_mode(MGSLPC_INFO *info) | |||
3732 | val |= BIT4; | 3732 | val |= BIT4; |
3733 | } | 3733 | } |
3734 | write_reg(info, CHA + DAFO, val); | 3734 | write_reg(info, CHA + DAFO, val); |
3735 | 3735 | ||
3736 | /* RFC Rx FIFO Control | 3736 | /* RFC Rx FIFO Control |
3737 | * | 3737 | * |
3738 | * 07 Reserved, 0 | 3738 | * 07 Reserved, 0 |
@@ -3744,15 +3744,15 @@ static void async_mode(MGSLPC_INFO *info) | |||
3744 | * 00 TCDE Terminate Char Detect Enable, 0=disabled | 3744 | * 00 TCDE Terminate Char Detect Enable, 0=disabled |
3745 | * | 3745 | * |
3746 | * 0101 1100 | 3746 | * 0101 1100 |
3747 | */ | 3747 | */ |
3748 | write_reg(info, CHA + RFC, 0x5c); | 3748 | write_reg(info, CHA + RFC, 0x5c); |
3749 | 3749 | ||
3750 | /* RLCR Receive length check register | 3750 | /* RLCR Receive length check register |
3751 | * | 3751 | * |
3752 | * Max frame length = (RL + 1) * 32 | 3752 | * Max frame length = (RL + 1) * 32 |
3753 | */ | 3753 | */ |
3754 | write_reg(info, CHA + RLCR, 0); | 3754 | write_reg(info, CHA + RLCR, 0); |
3755 | 3755 | ||
3756 | /* XBCH Transmit Byte Count High | 3756 | /* XBCH Transmit Byte Count High |
3757 | * | 3757 | * |
3758 | * 07 DMA mode, 0 = interrupt driven | 3758 | * 07 DMA mode, 0 = interrupt driven |
@@ -3762,20 +3762,20 @@ static void async_mode(MGSLPC_INFO *info) | |||
3762 | * 03..00 XBC[10..8] Transmit byte count bits 10..8 | 3762 | * 03..00 XBC[10..8] Transmit byte count bits 10..8 |
3763 | * | 3763 | * |
3764 | * 0000 0000 | 3764 | * 0000 0000 |
3765 | */ | 3765 | */ |
3766 | val = 0x00; | 3766 | val = 0x00; |
3767 | if (info->params.flags & HDLC_FLAG_AUTO_DCD) | 3767 | if (info->params.flags & HDLC_FLAG_AUTO_DCD) |
3768 | val |= BIT5; | 3768 | val |= BIT5; |
3769 | write_reg(info, CHA + XBCH, val); | 3769 | write_reg(info, CHA + XBCH, val); |
3770 | if (info->params.flags & HDLC_FLAG_AUTO_CTS) | 3770 | if (info->params.flags & HDLC_FLAG_AUTO_CTS) |
3771 | irq_enable(info, CHA, IRQ_CTS); | 3771 | irq_enable(info, CHA, IRQ_CTS); |
3772 | 3772 | ||
3773 | /* MODE:03 RAC Receiver Active, 1=active */ | 3773 | /* MODE:03 RAC Receiver Active, 1=active */ |
3774 | set_reg_bits(info, CHA + MODE, BIT3); | 3774 | set_reg_bits(info, CHA + MODE, BIT3); |
3775 | enable_auxclk(info); | 3775 | enable_auxclk(info); |
3776 | if (info->params.flags & HDLC_FLAG_AUTO_CTS) { | 3776 | if (info->params.flags & HDLC_FLAG_AUTO_CTS) { |
3777 | irq_enable(info, CHB, IRQ_CTS); | 3777 | irq_enable(info, CHB, IRQ_CTS); |
3778 | /* PVR[3] 1=AUTO CTS active */ | 3778 | /* PVR[3] 1=AUTO CTS active */ |
3779 | set_reg_bits(info, CHA + PVR, BIT3); | 3779 | set_reg_bits(info, CHA + PVR, BIT3); |
3780 | } else | 3780 | } else |
3781 | clear_reg_bits(info, CHA + PVR, BIT3); | 3781 | clear_reg_bits(info, CHA + PVR, BIT3); |
@@ -3791,7 +3791,7 @@ static void async_mode(MGSLPC_INFO *info) | |||
3791 | */ | 3791 | */ |
3792 | static void tx_set_idle(MGSLPC_INFO *info) | 3792 | static void tx_set_idle(MGSLPC_INFO *info) |
3793 | { | 3793 | { |
3794 | /* Note: ESCC2 only supports flags and one idle modes */ | 3794 | /* Note: ESCC2 only supports flags and one idle modes */ |
3795 | if (info->idle_mode == HDLC_TXIDLE_FLAGS) | 3795 | if (info->idle_mode == HDLC_TXIDLE_FLAGS) |
3796 | set_reg_bits(info, CHA + CCR1, BIT3); | 3796 | set_reg_bits(info, CHA + CCR1, BIT3); |
3797 | else | 3797 | else |
@@ -3803,8 +3803,8 @@ static void tx_set_idle(MGSLPC_INFO *info) | |||
3803 | static void get_signals(MGSLPC_INFO *info) | 3803 | static void get_signals(MGSLPC_INFO *info) |
3804 | { | 3804 | { |
3805 | unsigned char status = 0; | 3805 | unsigned char status = 0; |
3806 | 3806 | ||
3807 | /* preserve DTR and RTS */ | 3807 | /* preserve DTR and RTS */ |
3808 | info->serial_signals &= SerialSignal_DTR + SerialSignal_RTS; | 3808 | info->serial_signals &= SerialSignal_DTR + SerialSignal_RTS; |
3809 | 3809 | ||
3810 | if (read_reg(info, CHB + VSTR) & BIT7) | 3810 | if (read_reg(info, CHB + VSTR) & BIT7) |
@@ -3873,7 +3873,7 @@ static int rx_get_frame(MGSLPC_INFO *info) | |||
3873 | unsigned long flags; | 3873 | unsigned long flags; |
3874 | struct tty_struct *tty = info->tty; | 3874 | struct tty_struct *tty = info->tty; |
3875 | int return_frame = 0; | 3875 | int return_frame = 0; |
3876 | 3876 | ||
3877 | if (info->rx_frame_count == 0) | 3877 | if (info->rx_frame_count == 0) |
3878 | return 0; | 3878 | return 0; |
3879 | 3879 | ||
@@ -3913,10 +3913,10 @@ static int rx_get_frame(MGSLPC_INFO *info) | |||
3913 | if (debug_level >= DEBUG_LEVEL_BH) | 3913 | if (debug_level >= DEBUG_LEVEL_BH) |
3914 | printk("%s(%d):rx_get_frame(%s) status=%04X size=%d\n", | 3914 | printk("%s(%d):rx_get_frame(%s) status=%04X size=%d\n", |
3915 | __FILE__,__LINE__,info->device_name,status,framesize); | 3915 | __FILE__,__LINE__,info->device_name,status,framesize); |
3916 | 3916 | ||
3917 | if (debug_level >= DEBUG_LEVEL_DATA) | 3917 | if (debug_level >= DEBUG_LEVEL_DATA) |
3918 | trace_block(info, buf->data, framesize, 0); | 3918 | trace_block(info, buf->data, framesize, 0); |
3919 | 3919 | ||
3920 | if (framesize) { | 3920 | if (framesize) { |
3921 | if ((info->params.crc_type & HDLC_CRC_RETURN_EX && | 3921 | if ((info->params.crc_type & HDLC_CRC_RETURN_EX && |
3922 | framesize+1 > info->max_frame_size) || | 3922 | framesize+1 > info->max_frame_size) || |
@@ -3953,7 +3953,7 @@ static int rx_get_frame(MGSLPC_INFO *info) | |||
3953 | 3953 | ||
3954 | static BOOLEAN register_test(MGSLPC_INFO *info) | 3954 | static BOOLEAN register_test(MGSLPC_INFO *info) |
3955 | { | 3955 | { |
3956 | static unsigned char patterns[] = | 3956 | static unsigned char patterns[] = |
3957 | { 0x00, 0xff, 0xaa, 0x55, 0x69, 0x96, 0x0f }; | 3957 | { 0x00, 0xff, 0xaa, 0x55, 0x69, 0x96, 0x0f }; |
3958 | static unsigned int count = ARRAY_SIZE(patterns); | 3958 | static unsigned int count = ARRAY_SIZE(patterns); |
3959 | unsigned int i; | 3959 | unsigned int i; |
@@ -4002,13 +4002,13 @@ static BOOLEAN irq_test(MGSLPC_INFO *info) | |||
4002 | while(end_time-- && !info->irq_occurred) { | 4002 | while(end_time-- && !info->irq_occurred) { |
4003 | msleep_interruptible(10); | 4003 | msleep_interruptible(10); |
4004 | } | 4004 | } |
4005 | 4005 | ||
4006 | info->testing_irq = FALSE; | 4006 | info->testing_irq = FALSE; |
4007 | 4007 | ||
4008 | spin_lock_irqsave(&info->lock,flags); | 4008 | spin_lock_irqsave(&info->lock,flags); |
4009 | reset_device(info); | 4009 | reset_device(info); |
4010 | spin_unlock_irqrestore(&info->lock,flags); | 4010 | spin_unlock_irqrestore(&info->lock,flags); |
4011 | 4011 | ||
4012 | return info->irq_occurred ? TRUE : FALSE; | 4012 | return info->irq_occurred ? TRUE : FALSE; |
4013 | } | 4013 | } |
4014 | 4014 | ||
@@ -4042,13 +4042,13 @@ static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit) | |||
4042 | printk("%s tx data:\n",info->device_name); | 4042 | printk("%s tx data:\n",info->device_name); |
4043 | else | 4043 | else |
4044 | printk("%s rx data:\n",info->device_name); | 4044 | printk("%s rx data:\n",info->device_name); |
4045 | 4045 | ||
4046 | while(count) { | 4046 | while(count) { |
4047 | if (count > 16) | 4047 | if (count > 16) |
4048 | linecount = 16; | 4048 | linecount = 16; |
4049 | else | 4049 | else |
4050 | linecount = count; | 4050 | linecount = count; |
4051 | 4051 | ||
4052 | for(i=0;i<linecount;i++) | 4052 | for(i=0;i<linecount;i++) |
4053 | printk("%02X ",(unsigned char)data[i]); | 4053 | printk("%02X ",(unsigned char)data[i]); |
4054 | for(;i<17;i++) | 4054 | for(;i<17;i++) |
@@ -4060,7 +4060,7 @@ static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit) | |||
4060 | printk("."); | 4060 | printk("."); |
4061 | } | 4061 | } |
4062 | printk("\n"); | 4062 | printk("\n"); |
4063 | 4063 | ||
4064 | data += linecount; | 4064 | data += linecount; |
4065 | count -= linecount; | 4065 | count -= linecount; |
4066 | } | 4066 | } |
@@ -4073,7 +4073,7 @@ static void tx_timeout(unsigned long context) | |||
4073 | { | 4073 | { |
4074 | MGSLPC_INFO *info = (MGSLPC_INFO*)context; | 4074 | MGSLPC_INFO *info = (MGSLPC_INFO*)context; |
4075 | unsigned long flags; | 4075 | unsigned long flags; |
4076 | 4076 | ||
4077 | if ( debug_level >= DEBUG_LEVEL_INFO ) | 4077 | if ( debug_level >= DEBUG_LEVEL_INFO ) |
4078 | printk( "%s(%d):tx_timeout(%s)\n", | 4078 | printk( "%s(%d):tx_timeout(%s)\n", |
4079 | __FILE__,__LINE__,info->device_name); | 4079 | __FILE__,__LINE__,info->device_name); |
@@ -4086,7 +4086,7 @@ static void tx_timeout(unsigned long context) | |||
4086 | info->tx_count = info->tx_put = info->tx_get = 0; | 4086 | info->tx_count = info->tx_put = info->tx_get = 0; |
4087 | 4087 | ||
4088 | spin_unlock_irqrestore(&info->lock,flags); | 4088 | spin_unlock_irqrestore(&info->lock,flags); |
4089 | 4089 | ||
4090 | #if SYNCLINK_GENERIC_HDLC | 4090 | #if SYNCLINK_GENERIC_HDLC |
4091 | if (info->netcount) | 4091 | if (info->netcount) |
4092 | hdlcdev_tx_done(info); | 4092 | hdlcdev_tx_done(info); |