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authorMichael Neuling <mikey@neuling.org>2008-06-17 20:47:26 -0400
committerPaul Mackerras <paulus@samba.org>2008-06-30 08:31:11 -0400
commite952e6c4d6635b36c212c056a9427bd93460178c (patch)
tree1791007d187ffea2e66a0150977dc5f3cc3b8c53
parente2d755051129c61a9f67bf752d0b7cc82b115338 (diff)
powerpc: Add cputable entry for POWER7
Add a cputable entry for the POWER7 processor. Also tell firmware that we know about POWER7. Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Joel Schopp <jschopp@austin.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
-rw-r--r--arch/powerpc/kernel/cputable.c25
-rw-r--r--arch/powerpc/kernel/misc.S5
-rw-r--r--arch/powerpc/kernel/prom_init.c1
-rw-r--r--include/asm-powerpc/cputable.h12
4 files changed, 41 insertions, 2 deletions
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index f247fc6ad12d..d8d669308403 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -53,6 +53,8 @@ extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec);
53extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec); 53extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec);
54extern void __restore_cpu_pa6t(void); 54extern void __restore_cpu_pa6t(void);
55extern void __restore_cpu_ppc970(void); 55extern void __restore_cpu_ppc970(void);
56extern void __setup_cpu_power7(unsigned long offset, struct cpu_spec* spec);
57extern void __restore_cpu_power7(void);
56#endif /* CONFIG_PPC64 */ 58#endif /* CONFIG_PPC64 */
57 59
58/* This table only contains "desktop" CPUs, it need to be filled with embedded 60/* This table only contains "desktop" CPUs, it need to be filled with embedded
@@ -69,6 +71,9 @@ extern void __restore_cpu_ppc970(void);
69#define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\ 71#define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\
70 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 72 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
71 PPC_FEATURE_TRUE_LE) 73 PPC_FEATURE_TRUE_LE)
74#define COMMON_USER_POWER7 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\
75 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
76 PPC_FEATURE_TRUE_LE)
72#define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\ 77#define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\
73 PPC_FEATURE_TRUE_LE | \ 78 PPC_FEATURE_TRUE_LE | \
74 PPC_FEATURE_HAS_ALTIVEC_COMP) 79 PPC_FEATURE_HAS_ALTIVEC_COMP)
@@ -381,6 +386,26 @@ static struct cpu_spec __initdata cpu_specs[] = {
381 .machine_check = machine_check_generic, 386 .machine_check = machine_check_generic,
382 .platform = "power6", 387 .platform = "power6",
383 }, 388 },
389 { /* Power7 */
390 .pvr_mask = 0xffff0000,
391 .pvr_value = 0x003f0000,
392 .cpu_name = "POWER7",
393 .cpu_features = CPU_FTRS_POWER7,
394 .cpu_user_features = COMMON_USER_POWER7,
395 .icache_bsize = 128,
396 .dcache_bsize = 128,
397 .num_pmcs = 6,
398 .pmc_type = PPC_PMC_IBM,
399 .cpu_setup = __setup_cpu_power7,
400 .cpu_restore = __restore_cpu_power7,
401 .oprofile_cpu_type = "ppc64/power7",
402 .oprofile_type = PPC_OPROFILE_POWER4,
403 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
404 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
405 .oprofile_mmcra_clear = POWER6_MMCRA_THRM |
406 POWER6_MMCRA_OTHER,
407 .platform = "power7",
408 },
384 { /* Cell Broadband Engine */ 409 { /* Cell Broadband Engine */
385 .pvr_mask = 0xffff0000, 410 .pvr_mask = 0xffff0000,
386 .pvr_value = 0x00700000, 411 .pvr_value = 0x00700000,
diff --git a/arch/powerpc/kernel/misc.S b/arch/powerpc/kernel/misc.S
index 7b9160220698..85cb6f340846 100644
--- a/arch/powerpc/kernel/misc.S
+++ b/arch/powerpc/kernel/misc.S
@@ -116,3 +116,8 @@ _GLOBAL(longjmp)
116 mtlr r0 116 mtlr r0
117 mr r3,r4 117 mr r3,r4
118 blr 118 blr
119
120_GLOBAL(__setup_cpu_power7)
121_GLOBAL(__restore_cpu_power7)
122 /* place holder */
123 blr
diff --git a/arch/powerpc/kernel/prom_init.c b/arch/powerpc/kernel/prom_init.c
index 6d6df1e60325..7585ed181ff8 100644
--- a/arch/powerpc/kernel/prom_init.c
+++ b/arch/powerpc/kernel/prom_init.c
@@ -650,6 +650,7 @@ static void __init early_cmdline_parse(void)
650static unsigned char ibm_architecture_vec[] = { 650static unsigned char ibm_architecture_vec[] = {
651 W(0xfffe0000), W(0x003a0000), /* POWER5/POWER5+ */ 651 W(0xfffe0000), W(0x003a0000), /* POWER5/POWER5+ */
652 W(0xffff0000), W(0x003e0000), /* POWER6 */ 652 W(0xffff0000), W(0x003e0000), /* POWER6 */
653 W(0xffff0000), W(0x003f0000), /* POWER7 */
653 W(0xffffffff), W(0x0f000002), /* all 2.05-compliant */ 654 W(0xffffffff), W(0x0f000002), /* all 2.05-compliant */
654 W(0xfffffffe), W(0x0f000001), /* all 2.04-compliant and earlier */ 655 W(0xfffffffe), W(0x0f000001), /* all 2.04-compliant and earlier */
655 5 - 1, /* 5 option vectors */ 656 5 - 1, /* 5 option vectors */
diff --git a/include/asm-powerpc/cputable.h b/include/asm-powerpc/cputable.h
index 9106113ae0b5..3e5b2deafe44 100644
--- a/include/asm-powerpc/cputable.h
+++ b/include/asm-powerpc/cputable.h
@@ -26,6 +26,7 @@
26#define PPC_FEATURE_PA6T 0x00000800 26#define PPC_FEATURE_PA6T 0x00000800
27#define PPC_FEATURE_HAS_DFP 0x00000400 27#define PPC_FEATURE_HAS_DFP 0x00000400
28#define PPC_FEATURE_POWER6_EXT 0x00000200 28#define PPC_FEATURE_POWER6_EXT 0x00000200
29#define PPC_FEATURE_ARCH_2_06 0x00000100
29 30
30#define PPC_FEATURE_TRUE_LE 0x00000002 31#define PPC_FEATURE_TRUE_LE 0x00000002
31#define PPC_FEATURE_PPC_LE 0x00000001 32#define PPC_FEATURE_PPC_LE 0x00000001
@@ -379,6 +380,12 @@ extern void do_feature_fixups(unsigned long value, void *fixup_start,
379 CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \ 380 CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \
380 CPU_FTR_PURR | CPU_FTR_SPURR | CPU_FTR_REAL_LE | \ 381 CPU_FTR_PURR | CPU_FTR_SPURR | CPU_FTR_REAL_LE | \
381 CPU_FTR_DSCR) 382 CPU_FTR_DSCR)
383#define CPU_FTRS_POWER7 (CPU_FTR_USE_TB | \
384 CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
385 CPU_FTR_MMCRA | CPU_FTR_SMT | \
386 CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \
387 CPU_FTR_PURR | CPU_FTR_SPURR | CPU_FTR_REAL_LE | \
388 CPU_FTR_DSCR)
382#define CPU_FTRS_CELL (CPU_FTR_USE_TB | \ 389#define CPU_FTRS_CELL (CPU_FTR_USE_TB | \
383 CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \ 390 CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
384 CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \ 391 CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \
@@ -394,7 +401,8 @@ extern void do_feature_fixups(unsigned long value, void *fixup_start,
394#define CPU_FTRS_POSSIBLE \ 401#define CPU_FTRS_POSSIBLE \
395 (CPU_FTRS_POWER3 | CPU_FTRS_RS64 | CPU_FTRS_POWER4 | \ 402 (CPU_FTRS_POWER3 | CPU_FTRS_RS64 | CPU_FTRS_POWER4 | \
396 CPU_FTRS_PPC970 | CPU_FTRS_POWER5 | CPU_FTRS_POWER6 | \ 403 CPU_FTRS_PPC970 | CPU_FTRS_POWER5 | CPU_FTRS_POWER6 | \
397 CPU_FTRS_CELL | CPU_FTRS_PA6T | CPU_FTR_1T_SEGMENT) 404 CPU_FTRS_POWER7 | CPU_FTRS_CELL | CPU_FTRS_PA6T | \
405 CPU_FTR_1T_SEGMENT)
398#else 406#else
399enum { 407enum {
400 CPU_FTRS_POSSIBLE = 408 CPU_FTRS_POSSIBLE =
@@ -434,7 +442,7 @@ enum {
434#define CPU_FTRS_ALWAYS \ 442#define CPU_FTRS_ALWAYS \
435 (CPU_FTRS_POWER3 & CPU_FTRS_RS64 & CPU_FTRS_POWER4 & \ 443 (CPU_FTRS_POWER3 & CPU_FTRS_RS64 & CPU_FTRS_POWER4 & \
436 CPU_FTRS_PPC970 & CPU_FTRS_POWER5 & CPU_FTRS_POWER6 & \ 444 CPU_FTRS_PPC970 & CPU_FTRS_POWER5 & CPU_FTRS_POWER6 & \
437 CPU_FTRS_CELL & CPU_FTRS_PA6T & CPU_FTRS_POSSIBLE) 445 CPU_FTRS_POWER7 & CPU_FTRS_CELL & CPU_FTRS_PA6T & CPU_FTRS_POSSIBLE)
438#else 446#else
439enum { 447enum {
440 CPU_FTRS_ALWAYS = 448 CPU_FTRS_ALWAYS =