aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorAndreas Mohr <andi@rhlx01.fht-esslingen.de>2006-06-26 03:25:14 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2006-06-26 12:58:21 -0400
commit7d622d4794490cef933c20e4a6279e43e03fafad (patch)
tree1c13c63335aa021533997b1f88c412170fba193f
parenta275254975a29c51929ee175b92ac471ac2a0043 (diff)
[PATCH] make pmtmr_ioport __read_mostly
- written on init only, accessed for every timer read --> __read_mostly - fix broken sentence Signed-off-by: Andreas Mohr <andi@lisas.de> Cc: john stultz <johnstul@us.ibm.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
-rw-r--r--arch/x86_64/kernel/pmtimer.c2
-rw-r--r--drivers/clocksource/acpi_pm.c4
2 files changed, 3 insertions, 3 deletions
diff --git a/arch/x86_64/kernel/pmtimer.c b/arch/x86_64/kernel/pmtimer.c
index bf421ed26808..7554458dc9cb 100644
--- a/arch/x86_64/kernel/pmtimer.c
+++ b/arch/x86_64/kernel/pmtimer.c
@@ -27,7 +27,7 @@
27/* The I/O port the PMTMR resides at. 27/* The I/O port the PMTMR resides at.
28 * The location is detected during setup_arch(), 28 * The location is detected during setup_arch(),
29 * in arch/i386/kernel/acpi/boot.c */ 29 * in arch/i386/kernel/acpi/boot.c */
30u32 pmtmr_ioport; 30u32 pmtmr_ioport __read_mostly;
31 31
32/* value of the Power timer at last timer interrupt */ 32/* value of the Power timer at last timer interrupt */
33static u32 offset_delay; 33static u32 offset_delay;
diff --git a/drivers/clocksource/acpi_pm.c b/drivers/clocksource/acpi_pm.c
index 9217be5048d5..066dc77433d5 100644
--- a/drivers/clocksource/acpi_pm.c
+++ b/drivers/clocksource/acpi_pm.c
@@ -30,7 +30,7 @@
30 * The location is detected during setup_arch(), 30 * The location is detected during setup_arch(),
31 * in arch/i386/acpi/boot.c 31 * in arch/i386/acpi/boot.c
32 */ 32 */
33u32 pmtmr_ioport; 33u32 pmtmr_ioport __read_mostly;
34 34
35#define ACPI_PM_MASK 0xFFFFFF /* limit it to 24 bits */ 35#define ACPI_PM_MASK 0xFFFFFF /* limit it to 24 bits */
36 36
@@ -47,7 +47,7 @@ static cycle_t acpi_pm_read_verified(void)
47 /* 47 /*
48 * It has been reported that because of various broken 48 * It has been reported that because of various broken
49 * chipsets (ICH4, PIIX4 and PIIX4E) where the ACPI PM clock 49 * chipsets (ICH4, PIIX4 and PIIX4E) where the ACPI PM clock
50 * source is not latched, so you must read it multiple 50 * source is not latched, you must read it multiple
51 * times to ensure a safe value is read: 51 * times to ensure a safe value is read:
52 */ 52 */
53 do { 53 do {