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authorDavid Brownell <david-b@pacbell.net>2007-08-08 12:09:01 -0400
committerPierre Ossman <drzeus@drzeus.cx>2007-09-23 15:37:51 -0400
commit97018580c40c8a31dd7ae744da3378c787a2066d (patch)
treef5d4b4ddc8be32f9763a9c14c405cbb8b0466866
parent759bdc7af450404382e937c76722ae8736daef92 (diff)
MMC headers learn about SPI
Teach the MMC/SD/SDIO system headers that some hosts use SPI mode - New host capabilities and status bits * MMC_CAP_SPI, with mmc_host_is_spi() test * mmc_host.use_spi_crc flag - SPI-specific declarations: * Response types, MMC_RSP_SPI_R* * Two SPI-only commands * Status bits used native to SPI: R1_SPI_*, R2_SPI_* - Fix a few (unrelated) whitespace bugs in the headers. - Reorder a few mmc_host fields, removing several bytes of padding None of these changes affect current code. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
-rw-r--r--include/linux/mmc/core.h26
-rw-r--r--include/linux/mmc/host.h16
-rw-r--r--include/linux/mmc/mmc.h38
3 files changed, 67 insertions, 13 deletions
diff --git a/include/linux/mmc/core.h b/include/linux/mmc/core.h
index 8945da9b54fa..d0c3abed74c2 100644
--- a/include/linux/mmc/core.h
+++ b/include/linux/mmc/core.h
@@ -25,14 +25,20 @@ struct mmc_command {
25#define MMC_RSP_CRC (1 << 2) /* expect valid crc */ 25#define MMC_RSP_CRC (1 << 2) /* expect valid crc */
26#define MMC_RSP_BUSY (1 << 3) /* card may send busy */ 26#define MMC_RSP_BUSY (1 << 3) /* card may send busy */
27#define MMC_RSP_OPCODE (1 << 4) /* response contains opcode */ 27#define MMC_RSP_OPCODE (1 << 4) /* response contains opcode */
28#define MMC_CMD_MASK (3 << 5) /* command type */ 28
29#define MMC_CMD_MASK (3 << 5) /* non-SPI command type */
29#define MMC_CMD_AC (0 << 5) 30#define MMC_CMD_AC (0 << 5)
30#define MMC_CMD_ADTC (1 << 5) 31#define MMC_CMD_ADTC (1 << 5)
31#define MMC_CMD_BC (2 << 5) 32#define MMC_CMD_BC (2 << 5)
32#define MMC_CMD_BCR (3 << 5) 33#define MMC_CMD_BCR (3 << 5)
33 34
35#define MMC_RSP_SPI_S1 (1 << 7) /* one status byte */
36#define MMC_RSP_SPI_S2 (1 << 8) /* second byte */
37#define MMC_RSP_SPI_B4 (1 << 9) /* four data bytes */
38#define MMC_RSP_SPI_BUSY (1 << 10) /* card may send busy */
39
34/* 40/*
35 * These are the response types, and correspond to valid bit 41 * These are the native response types, and correspond to valid bit
36 * patterns of the above flags. One additional valid pattern 42 * patterns of the above flags. One additional valid pattern
37 * is all zeros, which means we don't expect a response. 43 * is all zeros, which means we don't expect a response.
38 */ 44 */
@@ -49,6 +55,22 @@ struct mmc_command {
49#define mmc_resp_type(cmd) ((cmd)->flags & (MMC_RSP_PRESENT|MMC_RSP_136|MMC_RSP_CRC|MMC_RSP_BUSY|MMC_RSP_OPCODE)) 55#define mmc_resp_type(cmd) ((cmd)->flags & (MMC_RSP_PRESENT|MMC_RSP_136|MMC_RSP_CRC|MMC_RSP_BUSY|MMC_RSP_OPCODE))
50 56
51/* 57/*
58 * These are the SPI response types for MMC, SD, and SDIO cards.
59 * Commands return R1, with maybe more info. Zero is an error type;
60 * callers must always provide the appropriate MMC_RSP_SPI_Rx flags.
61 */
62#define MMC_RSP_SPI_R1 (MMC_RSP_SPI_S1)
63#define MMC_RSP_SPI_R1B (MMC_RSP_SPI_S1|MMC_RSP_SPI_BUSY)
64#define MMC_RSP_SPI_R2 (MMC_RSP_SPI_S1|MMC_RSP_SPI_S2)
65#define MMC_RSP_SPI_R3 (MMC_RSP_SPI_S1|MMC_RSP_SPI_B4)
66#define MMC_RSP_SPI_R4 (MMC_RSP_SPI_S1|MMC_RSP_SPI_B4)
67#define MMC_RSP_SPI_R5 (MMC_RSP_SPI_S1|MMC_RSP_SPI_S2)
68#define MMC_RSP_SPI_R7 (MMC_RSP_SPI_S1|MMC_RSP_SPI_B4)
69
70#define mmc_spi_resp_type(cmd) ((cmd)->flags & \
71 (MMC_RSP_SPI_S1|MMC_RSP_SPI_BUSY|MMC_RSP_SPI_S2|MMC_RSP_SPI_B4))
72
73/*
52 * These are the command types. 74 * These are the command types.
53 */ 75 */
54#define mmc_cmd_type(cmd) ((cmd)->flags & MMC_CMD_MASK) 76#define mmc_cmd_type(cmd) ((cmd)->flags & MMC_CMD_MASK)
diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h
index 3fd197962f73..76eef94782f8 100644
--- a/include/linux/mmc/host.h
+++ b/include/linux/mmc/host.h
@@ -91,6 +91,7 @@ struct mmc_host {
91#define MMC_CAP_MMC_HIGHSPEED (1 << 2) /* Can do MMC high-speed timing */ 91#define MMC_CAP_MMC_HIGHSPEED (1 << 2) /* Can do MMC high-speed timing */
92#define MMC_CAP_SD_HIGHSPEED (1 << 3) /* Can do SD high-speed timing */ 92#define MMC_CAP_SD_HIGHSPEED (1 << 3) /* Can do SD high-speed timing */
93#define MMC_CAP_SDIO_IRQ (1 << 4) /* Can signal pending SDIO IRQs */ 93#define MMC_CAP_SDIO_IRQ (1 << 4) /* Can signal pending SDIO IRQs */
94#define MMC_CAP_SPI (1 << 5) /* Talks only SPI protocols */
94 95
95 /* host specific block data */ 96 /* host specific block data */
96 unsigned int max_seg_size; /* see blk_queue_max_segment_size */ 97 unsigned int max_seg_size; /* see blk_queue_max_segment_size */
@@ -107,6 +108,14 @@ struct mmc_host {
107 struct mmc_ios ios; /* current io bus settings */ 108 struct mmc_ios ios; /* current io bus settings */
108 u32 ocr; /* the current OCR setting */ 109 u32 ocr; /* the current OCR setting */
109 110
111 /* group bitfields together to minimize padding */
112 unsigned int use_spi_crc:1;
113 unsigned int claimed:1; /* host exclusively claimed */
114 unsigned int bus_dead:1; /* bus has been released */
115#ifdef CONFIG_MMC_DEBUG
116 unsigned int removed:1; /* host is being removed */
117#endif
118
110 unsigned int mode; /* current card mode of host */ 119 unsigned int mode; /* current card mode of host */
111#define MMC_MODE_MMC 0 120#define MMC_MODE_MMC 0
112#define MMC_MODE_SD 1 121#define MMC_MODE_SD 1
@@ -114,16 +123,11 @@ struct mmc_host {
114 struct mmc_card *card; /* device attached to this host */ 123 struct mmc_card *card; /* device attached to this host */
115 124
116 wait_queue_head_t wq; 125 wait_queue_head_t wq;
117 unsigned int claimed:1; /* host exclusively claimed */
118 126
119 struct delayed_work detect; 127 struct delayed_work detect;
120#ifdef CONFIG_MMC_DEBUG
121 unsigned int removed:1; /* host is being removed */
122#endif
123 128
124 const struct mmc_bus_ops *bus_ops; /* current bus driver */ 129 const struct mmc_bus_ops *bus_ops; /* current bus driver */
125 unsigned int bus_refs; /* reference counter */ 130 unsigned int bus_refs; /* reference counter */
126 unsigned int bus_dead:1; /* bus has been released */
127 131
128 unsigned int sdio_irqs; 132 unsigned int sdio_irqs;
129 struct task_struct *sdio_irq_thread; 133 struct task_struct *sdio_irq_thread;
@@ -142,6 +146,8 @@ static inline void *mmc_priv(struct mmc_host *host)
142 return (void *)host->private; 146 return (void *)host->private;
143} 147}
144 148
149#define mmc_host_is_spi(host) ((host)->caps & MMC_CAP_SPI)
150
145#define mmc_dev(x) ((x)->parent) 151#define mmc_dev(x) ((x)->parent)
146#define mmc_classdev(x) (&(x)->class_dev) 152#define mmc_classdev(x) (&(x)->class_dev)
147#define mmc_hostname(x) ((x)->class_dev.bus_id) 153#define mmc_hostname(x) ((x)->class_dev.bus_id)
diff --git a/include/linux/mmc/mmc.h b/include/linux/mmc/mmc.h
index d1d6cbcc1514..4236fbf0b6fb 100644
--- a/include/linux/mmc/mmc.h
+++ b/include/linux/mmc/mmc.h
@@ -27,7 +27,7 @@
27 27
28/* Standard MMC commands (4.1) type argument response */ 28/* Standard MMC commands (4.1) type argument response */
29 /* class 1 */ 29 /* class 1 */
30#define MMC_GO_IDLE_STATE 0 /* bc */ 30#define MMC_GO_IDLE_STATE 0 /* bc */
31#define MMC_SEND_OP_COND 1 /* bcr [31:0] OCR R3 */ 31#define MMC_SEND_OP_COND 1 /* bcr [31:0] OCR R3 */
32#define MMC_ALL_SEND_CID 2 /* bcr R2 */ 32#define MMC_ALL_SEND_CID 2 /* bcr R2 */
33#define MMC_SET_RELATIVE_ADDR 3 /* ac [31:16] RCA R1 */ 33#define MMC_SET_RELATIVE_ADDR 3 /* ac [31:16] RCA R1 */
@@ -39,8 +39,10 @@
39#define MMC_SEND_CID 10 /* ac [31:16] RCA R2 */ 39#define MMC_SEND_CID 10 /* ac [31:16] RCA R2 */
40#define MMC_READ_DAT_UNTIL_STOP 11 /* adtc [31:0] dadr R1 */ 40#define MMC_READ_DAT_UNTIL_STOP 11 /* adtc [31:0] dadr R1 */
41#define MMC_STOP_TRANSMISSION 12 /* ac R1b */ 41#define MMC_STOP_TRANSMISSION 12 /* ac R1b */
42#define MMC_SEND_STATUS 13 /* ac [31:16] RCA R1 */ 42#define MMC_SEND_STATUS 13 /* ac [31:16] RCA R1 */
43#define MMC_GO_INACTIVE_STATE 15 /* ac [31:16] RCA */ 43#define MMC_GO_INACTIVE_STATE 15 /* ac [31:16] RCA */
44#define MMC_SPI_READ_OCR 58 /* spi spi_R3 */
45#define MMC_SPI_CRC_ON_OFF 59 /* spi [0:0] flag spi_R1 */
44 46
45 /* class 2 */ 47 /* class 2 */
46#define MMC_SET_BLOCKLEN 16 /* ac [31:0] block len R1 */ 48#define MMC_SET_BLOCKLEN 16 /* ac [31:0] block len R1 */
@@ -90,15 +92,15 @@
90 */ 92 */
91 93
92/* 94/*
93 MMC status in R1 95 MMC status in R1, for native mode (SPI bits are different)
94 Type 96 Type
95 e : error bit 97 e : error bit
96 s : status bit 98 s : status bit
97 r : detected and set for the actual command response 99 r : detected and set for the actual command response
98 x : detected and set during command execution. the host must poll 100 x : detected and set during command execution. the host must poll
99 the card by sending status command in order to read these bits. 101 the card by sending status command in order to read these bits.
100 Clear condition 102 Clear condition
101 a : according to the card state 103 a : according to the card state
102 b : always related to the previous command. Reception of 104 b : always related to the previous command. Reception of
103 a valid command will clear it (with a delay of one command) 105 a valid command will clear it (with a delay of one command)
104 c : clear by read 106 c : clear by read
@@ -124,10 +126,33 @@
124#define R1_CARD_ECC_DISABLED (1 << 14) /* sx, a */ 126#define R1_CARD_ECC_DISABLED (1 << 14) /* sx, a */
125#define R1_ERASE_RESET (1 << 13) /* sr, c */ 127#define R1_ERASE_RESET (1 << 13) /* sr, c */
126#define R1_STATUS(x) (x & 0xFFFFE000) 128#define R1_STATUS(x) (x & 0xFFFFE000)
127#define R1_CURRENT_STATE(x) ((x & 0x00001E00) >> 9) /* sx, b (4 bits) */ 129#define R1_CURRENT_STATE(x) ((x & 0x00001E00) >> 9) /* sx, b (4 bits) */
128#define R1_READY_FOR_DATA (1 << 8) /* sx, a */ 130#define R1_READY_FOR_DATA (1 << 8) /* sx, a */
129#define R1_APP_CMD (1 << 5) /* sr, c */ 131#define R1_APP_CMD (1 << 5) /* sr, c */
130 132
133/*
134 * MMC/SD in SPI mode reports R1 status always, and R2 for SEND_STATUS
135 * R1 is the low order byte; R2 is the next highest byte, when present.
136 */
137#define R1_SPI_IDLE (1 << 0)
138#define R1_SPI_ERASE_RESET (1 << 1)
139#define R1_SPI_ILLEGAL_COMMAND (1 << 2)
140#define R1_SPI_COM_CRC (1 << 3)
141#define R1_SPI_ERASE_SEQ (1 << 4)
142#define R1_SPI_ADDRESS (1 << 5)
143#define R1_SPI_PARAMETER (1 << 6)
144/* R1 bit 7 is always zero */
145#define R2_SPI_CARD_LOCKED (1 << 8)
146#define R2_SPI_WP_ERASE_SKIP (1 << 9) /* or lock/unlock fail */
147#define R2_SPI_LOCK_UNLOCK_FAIL R2_SPI_WP_ERASE_SKIP
148#define R2_SPI_ERROR (1 << 10)
149#define R2_SPI_CC_ERROR (1 << 11)
150#define R2_SPI_CARD_ECC_ERROR (1 << 12)
151#define R2_SPI_WP_VIOLATION (1 << 13)
152#define R2_SPI_ERASE_PARAM (1 << 14)
153#define R2_SPI_OUT_OF_RANGE (1 << 15) /* or CSD overwrite */
154#define R2_SPI_CSD_OVERWRITE R2_SPI_OUT_OF_RANGE
155
131/* These are unpacked versions of the actual responses */ 156/* These are unpacked versions of the actual responses */
132 157
133struct _mmc_csd { 158struct _mmc_csd {
@@ -182,6 +207,7 @@ struct _mmc_csd {
182 */ 207 */
183#define CCC_BASIC (1<<0) /* (0) Basic protocol functions */ 208#define CCC_BASIC (1<<0) /* (0) Basic protocol functions */
184 /* (CMD0,1,2,3,4,7,9,10,12,13,15) */ 209 /* (CMD0,1,2,3,4,7,9,10,12,13,15) */
210 /* (and for SPI, CMD58,59) */
185#define CCC_STREAM_READ (1<<1) /* (1) Stream read commands */ 211#define CCC_STREAM_READ (1<<1) /* (1) Stream read commands */
186 /* (CMD11) */ 212 /* (CMD11) */
187#define CCC_BLOCK_READ (1<<2) /* (2) Block read commands */ 213#define CCC_BLOCK_READ (1<<2) /* (2) Block read commands */