diff options
author | Vitaly Bordug <vbordug@ru.mvista.com> | 2006-01-15 09:30:29 -0500 |
---|---|---|
committer | Paul Mackerras <paulus@samba.org> | 2006-01-20 00:13:29 -0500 |
commit | 0ce928e1b2ad4309fae6c4324b9e9e433fbf62a2 (patch) | |
tree | 774811b3bba02ac53292c56cc0be0d144e616044 | |
parent | 63dafe5728e7354bc3f15bd49f13f1f9a433e8fb (diff) |
[PATCH] ppc32 8xx: Added setbitsXX/clrbitsXX macro for read-modify-write operations
This adds setbitsXX/clrbitsXX macro for read-modify-write operations
and converts the 8xx core and drivers to use them.
Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com>
Signed-off-by: Marcelo Tosatti <marcelo.tosatti@cyclades.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
-rw-r--r-- | arch/ppc/8xx_io/commproc.c | 6 | ||||
-rw-r--r-- | arch/ppc/syslib/m8xx_setup.c | 13 | ||||
-rw-r--r-- | arch/ppc/syslib/m8xx_wdt.c | 3 | ||||
-rw-r--r-- | include/asm-ppc/io.h | 7 |
4 files changed, 18 insertions, 11 deletions
diff --git a/arch/ppc/8xx_io/commproc.c b/arch/ppc/8xx_io/commproc.c index 579cd40258b9..12b84ca51327 100644 --- a/arch/ppc/8xx_io/commproc.c +++ b/arch/ppc/8xx_io/commproc.c | |||
@@ -73,7 +73,7 @@ cpm_mask_irq(unsigned int irq) | |||
73 | { | 73 | { |
74 | int cpm_vec = irq - CPM_IRQ_OFFSET; | 74 | int cpm_vec = irq - CPM_IRQ_OFFSET; |
75 | 75 | ||
76 | out_be32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr, in_be32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr) & ~(1 << cpm_vec)); | 76 | clrbits32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr, (1 << cpm_vec)); |
77 | } | 77 | } |
78 | 78 | ||
79 | static void | 79 | static void |
@@ -81,7 +81,7 @@ cpm_unmask_irq(unsigned int irq) | |||
81 | { | 81 | { |
82 | int cpm_vec = irq - CPM_IRQ_OFFSET; | 82 | int cpm_vec = irq - CPM_IRQ_OFFSET; |
83 | 83 | ||
84 | out_be32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr, in_be32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr) | (1 << cpm_vec)); | 84 | setbits32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr, (1 << cpm_vec)); |
85 | } | 85 | } |
86 | 86 | ||
87 | static void | 87 | static void |
@@ -198,7 +198,7 @@ cpm_interrupt_init(void) | |||
198 | if (setup_irq(CPM_IRQ_OFFSET + CPMVEC_ERROR, &cpm_error_irqaction)) | 198 | if (setup_irq(CPM_IRQ_OFFSET + CPMVEC_ERROR, &cpm_error_irqaction)) |
199 | panic("Could not allocate CPM error IRQ!"); | 199 | panic("Could not allocate CPM error IRQ!"); |
200 | 200 | ||
201 | out_be32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cicr, in_be32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cicr) | CICR_IEN); | 201 | setbits32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cicr, CICR_IEN); |
202 | } | 202 | } |
203 | 203 | ||
204 | /* | 204 | /* |
diff --git a/arch/ppc/syslib/m8xx_setup.c b/arch/ppc/syslib/m8xx_setup.c index 688616de3cde..ff0282479a78 100644 --- a/arch/ppc/syslib/m8xx_setup.c +++ b/arch/ppc/syslib/m8xx_setup.c | |||
@@ -140,9 +140,11 @@ void __init __attribute__ ((weak)) | |||
140 | init_internal_rtc(void) | 140 | init_internal_rtc(void) |
141 | { | 141 | { |
142 | /* Disable the RTC one second and alarm interrupts. */ | 142 | /* Disable the RTC one second and alarm interrupts. */ |
143 | out_be16(&((immap_t *)IMAP_ADDR)->im_sit.sit_rtcsc, in_be16(&((immap_t *)IMAP_ADDR)->im_sit.sit_rtcsc) & ~(RTCSC_SIE | RTCSC_ALE)); | 143 | clrbits16(&((immap_t *)IMAP_ADDR)->im_sit.sit_rtcsc, (RTCSC_SIE | RTCSC_ALE)); |
144 | |||
144 | /* Enable the RTC */ | 145 | /* Enable the RTC */ |
145 | out_be16(&((immap_t *)IMAP_ADDR)->im_sit.sit_rtcsc, in_be16(&((immap_t *)IMAP_ADDR)->im_sit.sit_rtcsc) | (RTCSC_RTF | RTCSC_RTE)); | 146 | setbits16(&((immap_t *)IMAP_ADDR)->im_sit.sit_rtcsc, (RTCSC_RTF | RTCSC_RTE)); |
147 | |||
146 | } | 148 | } |
147 | 149 | ||
148 | /* The decrementer counts at the system (internal) clock frequency divided by | 150 | /* The decrementer counts at the system (internal) clock frequency divided by |
@@ -159,8 +161,7 @@ void __init m8xx_calibrate_decr(void) | |||
159 | out_be32(&((immap_t *)IMAP_ADDR)->im_clkrstk.cark_sccrk, KAPWR_KEY); | 161 | out_be32(&((immap_t *)IMAP_ADDR)->im_clkrstk.cark_sccrk, KAPWR_KEY); |
160 | 162 | ||
161 | /* Force all 8xx processors to use divide by 16 processor clock. */ | 163 | /* Force all 8xx processors to use divide by 16 processor clock. */ |
162 | out_be32(&((immap_t *)IMAP_ADDR)->im_clkrst.car_sccr, | 164 | setbits32(&((immap_t *)IMAP_ADDR)->im_clkrst.car_sccr, 0x02000000); |
163 | in_be32(&((immap_t *)IMAP_ADDR)->im_clkrst.car_sccr)|0x02000000); | ||
164 | /* Processor frequency is MHz. | 165 | /* Processor frequency is MHz. |
165 | * The value 'fp' is the number of decrementer ticks per second. | 166 | * The value 'fp' is the number of decrementer ticks per second. |
166 | */ | 167 | */ |
@@ -239,8 +240,8 @@ m8xx_restart(char *cmd) | |||
239 | __volatile__ unsigned char dummy; | 240 | __volatile__ unsigned char dummy; |
240 | 241 | ||
241 | local_irq_disable(); | 242 | local_irq_disable(); |
242 | out_be32(&((immap_t *)IMAP_ADDR)->im_clkrst.car_plprcr, in_be32(&((immap_t *)IMAP_ADDR)->im_clkrst.car_plprcr) | 0x00000080); | ||
243 | 243 | ||
244 | setbits32(&((immap_t *)IMAP_ADDR)->im_clkrst.car_plprcr, 0x00000080); | ||
244 | /* Clear the ME bit in MSR to cause checkstop on machine check | 245 | /* Clear the ME bit in MSR to cause checkstop on machine check |
245 | */ | 246 | */ |
246 | mtmsr(mfmsr() & ~0x1000); | 247 | mtmsr(mfmsr() & ~0x1000); |
@@ -310,8 +311,8 @@ m8xx_init_IRQ(void) | |||
310 | i8259_init(0); | 311 | i8259_init(0); |
311 | 312 | ||
312 | /* The i8259 cascade interrupt must be level sensitive. */ | 313 | /* The i8259 cascade interrupt must be level sensitive. */ |
313 | out_be32(&((immap_t *)IMAP_ADDR)->im_siu_conf.sc_siel, in_be32(&((immap_t *)IMAP_ADDR)->im_siu_conf.sc_siel & ~(0x80000000 >> ISA_BRIDGE_INT))); | ||
314 | 314 | ||
315 | clrbits32(&((immap_t *)IMAP_ADDR)->im_siu_conf.sc_siel, (0x80000000 >> ISA_BRIDGE_INT)); | ||
315 | if (setup_irq(ISA_BRIDGE_INT, &mbx_i8259_irqaction)) | 316 | if (setup_irq(ISA_BRIDGE_INT, &mbx_i8259_irqaction)) |
316 | enable_irq(ISA_BRIDGE_INT); | 317 | enable_irq(ISA_BRIDGE_INT); |
317 | #endif /* CONFIG_PCI */ | 318 | #endif /* CONFIG_PCI */ |
diff --git a/arch/ppc/syslib/m8xx_wdt.c b/arch/ppc/syslib/m8xx_wdt.c index df6c9557b86a..ac11d7bab443 100644 --- a/arch/ppc/syslib/m8xx_wdt.c +++ b/arch/ppc/syslib/m8xx_wdt.c | |||
@@ -41,8 +41,7 @@ static irqreturn_t m8xx_wdt_interrupt(int irq, void *dev, struct pt_regs *regs) | |||
41 | 41 | ||
42 | m8xx_wdt_reset(); | 42 | m8xx_wdt_reset(); |
43 | 43 | ||
44 | out_be16(&imap->im_sit.sit_piscr, in_be16(&imap->im_sit.sit_piscr) | PISCR_PS); /* clear irq */ | 44 | setbits16(&imap->im_sit.sit_piscr, PISCR_PS); |
45 | |||
46 | return IRQ_HANDLED; | 45 | return IRQ_HANDLED; |
47 | } | 46 | } |
48 | 47 | ||
diff --git a/include/asm-ppc/io.h b/include/asm-ppc/io.h index df9cf6ed189d..b919d8fb7d98 100644 --- a/include/asm-ppc/io.h +++ b/include/asm-ppc/io.h | |||
@@ -575,4 +575,11 @@ extern void pci_iounmap(struct pci_dev *dev, void __iomem *); | |||
575 | */ | 575 | */ |
576 | #define xlate_dev_kmem_ptr(p) p | 576 | #define xlate_dev_kmem_ptr(p) p |
577 | 577 | ||
578 | /* access ports */ | ||
579 | #define setbits32(_addr, _v) out_be32((_addr), in_be32(_addr) | (_v)) | ||
580 | #define clrbits32(_addr, _v) out_be32((_addr), in_be32(_addr) & ~(_v)) | ||
581 | |||
582 | #define setbits16(_addr, _v) out_be16((_addr), in_be16(_addr) | (_v)) | ||
583 | #define clrbits16(_addr, _v) out_be16((_addr), in_be16(_addr) & ~(_v)) | ||
584 | |||
578 | #endif /* __KERNEL__ */ | 585 | #endif /* __KERNEL__ */ |