diff options
author | Ralf Baechle <ralf@linux-mips.org> | 2006-10-31 13:33:09 -0500 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2006-10-31 15:13:22 -0500 |
commit | 70e46f48cb5933119712ee27945309a4bfc98282 (patch) | |
tree | c9a35ca3652659562e8bc534ca2caf563d9ccd88 | |
parent | e79f55a8c7aaae5a33e8c2b29682ec8e603b5434 (diff) |
[MIPS] VSMP: Synchronize cp0 counters on bootup.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r-- | arch/mips/kernel/smp-mt.c | 2 | ||||
-rw-r--r-- | arch/mips/mips-boards/generic/time.c | 5 | ||||
-rw-r--r-- | include/asm-mips/mipsmtregs.h | 2 |
3 files changed, 7 insertions, 2 deletions
diff --git a/arch/mips/kernel/smp-mt.c b/arch/mips/kernel/smp-mt.c index 06b29fa73f56..2ac19a6cbf68 100644 --- a/arch/mips/kernel/smp-mt.c +++ b/arch/mips/kernel/smp-mt.c | |||
@@ -153,6 +153,8 @@ static void __init smp_copy_vpe_config(void) | |||
153 | 153 | ||
154 | /* Propagate Config7 */ | 154 | /* Propagate Config7 */ |
155 | write_vpe_c0_config7(read_c0_config7()); | 155 | write_vpe_c0_config7(read_c0_config7()); |
156 | |||
157 | write_vpe_c0_count(read_c0_count()); | ||
156 | } | 158 | } |
157 | 159 | ||
158 | static unsigned int __init smp_vpe_init(unsigned int tc, unsigned int mvpconf0, | 160 | static unsigned int __init smp_vpe_init(unsigned int tc, unsigned int mvpconf0, |
diff --git a/arch/mips/mips-boards/generic/time.c b/arch/mips/mips-boards/generic/time.c index 659706705005..d817c60c5ca5 100644 --- a/arch/mips/mips-boards/generic/time.c +++ b/arch/mips/mips-boards/generic/time.c | |||
@@ -209,6 +209,7 @@ static unsigned int __init estimate_cpu_frequency(void) | |||
209 | #endif | 209 | #endif |
210 | #if defined(CONFIG_MIPS_ATLAS) || defined(CONFIG_MIPS_MALTA) | 210 | #if defined(CONFIG_MIPS_ATLAS) || defined(CONFIG_MIPS_MALTA) |
211 | unsigned long flags; | 211 | unsigned long flags; |
212 | unsigned int start; | ||
212 | 213 | ||
213 | local_irq_save(flags); | 214 | local_irq_save(flags); |
214 | 215 | ||
@@ -217,13 +218,13 @@ static unsigned int __init estimate_cpu_frequency(void) | |||
217 | while (!(CMOS_READ(RTC_REG_A) & RTC_UIP)); | 218 | while (!(CMOS_READ(RTC_REG_A) & RTC_UIP)); |
218 | 219 | ||
219 | /* Start r4k counter. */ | 220 | /* Start r4k counter. */ |
220 | write_c0_count(0); | 221 | start = read_c0_count(); |
221 | 222 | ||
222 | /* Read counter exactly on falling edge of update flag */ | 223 | /* Read counter exactly on falling edge of update flag */ |
223 | while (CMOS_READ(RTC_REG_A) & RTC_UIP); | 224 | while (CMOS_READ(RTC_REG_A) & RTC_UIP); |
224 | while (!(CMOS_READ(RTC_REG_A) & RTC_UIP)); | 225 | while (!(CMOS_READ(RTC_REG_A) & RTC_UIP)); |
225 | 226 | ||
226 | count = read_c0_count(); | 227 | count = read_c0_count() - start; |
227 | 228 | ||
228 | /* restore interrupts */ | 229 | /* restore interrupts */ |
229 | local_irq_restore(flags); | 230 | local_irq_restore(flags); |
diff --git a/include/asm-mips/mipsmtregs.h b/include/asm-mips/mipsmtregs.h index f637ce70758f..3e9468f424f4 100644 --- a/include/asm-mips/mipsmtregs.h +++ b/include/asm-mips/mipsmtregs.h | |||
@@ -352,6 +352,8 @@ do { \ | |||
352 | #define write_vpe_c0_vpecontrol(val) mttc0(1, 1, val) | 352 | #define write_vpe_c0_vpecontrol(val) mttc0(1, 1, val) |
353 | #define read_vpe_c0_vpeconf0() mftc0(1, 2) | 353 | #define read_vpe_c0_vpeconf0() mftc0(1, 2) |
354 | #define write_vpe_c0_vpeconf0(val) mttc0(1, 2, val) | 354 | #define write_vpe_c0_vpeconf0(val) mttc0(1, 2, val) |
355 | #define read_vpe_c0_count() mftc0(9, 0) | ||
356 | #define write_vpe_c0_count(val) mttc0(9, 0, val) | ||
355 | #define read_vpe_c0_status() mftc0(12, 0) | 357 | #define read_vpe_c0_status() mftc0(12, 0) |
356 | #define write_vpe_c0_status(val) mttc0(12, 0, val) | 358 | #define write_vpe_c0_status(val) mttc0(12, 0, val) |
357 | #define read_vpe_c0_cause() mftc0(13, 0) | 359 | #define read_vpe_c0_cause() mftc0(13, 0) |