diff options
author | James Bottomley <James.Bottomley@HansenPartnership.com> | 2008-04-03 13:28:20 -0400 |
---|---|---|
committer | James Bottomley <James.Bottomley@HansenPartnership.com> | 2008-04-07 13:19:11 -0400 |
commit | db3cc200a6ecf9681d598bfe1c3df9dac1afa40a (patch) | |
tree | b455a4e7b1246b60510e96be8bd511da1ad5bf15 | |
parent | 79bc14813cd7e1b75d2e4cbbc17043261cf4bcdc (diff) |
[SCSI] ips: remove spurious cpu_to_leX on outX statements
These are completely wrong because both outX and writeX do an
automatic reverse of their arguments if necessary, so having an extra
cpu_to_leX gives us the wrong ordering on BE platforms again.
Acked-by: Mark Salyzyn <Mark_Salyzyn@adaptec.com>
Signed-off-by: James Bottomley <James.Bottomley@HansenPartnership.com>
-rw-r--r-- | drivers/scsi/ips.c | 32 |
1 files changed, 16 insertions, 16 deletions
diff --git a/drivers/scsi/ips.c b/drivers/scsi/ips.c index c4501946130f..7c615c70ec5c 100644 --- a/drivers/scsi/ips.c +++ b/drivers/scsi/ips.c | |||
@@ -2377,7 +2377,7 @@ ips_get_bios_version(ips_ha_t * ha, int intr) | |||
2377 | if (inb(ha->io_addr + IPS_REG_FLDP) != 0x55) | 2377 | if (inb(ha->io_addr + IPS_REG_FLDP) != 0x55) |
2378 | return; | 2378 | return; |
2379 | 2379 | ||
2380 | outl(cpu_to_le32(1), ha->io_addr + IPS_REG_FLAP); | 2380 | outl(1, ha->io_addr + IPS_REG_FLAP); |
2381 | if (ha->pcidev->revision == IPS_REVID_TROMBONE64) | 2381 | if (ha->pcidev->revision == IPS_REVID_TROMBONE64) |
2382 | udelay(25); /* 25 us */ | 2382 | udelay(25); /* 25 us */ |
2383 | 2383 | ||
@@ -2385,21 +2385,21 @@ ips_get_bios_version(ips_ha_t * ha, int intr) | |||
2385 | return; | 2385 | return; |
2386 | 2386 | ||
2387 | /* Get Major version */ | 2387 | /* Get Major version */ |
2388 | outl(cpu_to_le32(0x1FF), ha->io_addr + IPS_REG_FLAP); | 2388 | outl(0x1FF, ha->io_addr + IPS_REG_FLAP); |
2389 | if (ha->pcidev->revision == IPS_REVID_TROMBONE64) | 2389 | if (ha->pcidev->revision == IPS_REVID_TROMBONE64) |
2390 | udelay(25); /* 25 us */ | 2390 | udelay(25); /* 25 us */ |
2391 | 2391 | ||
2392 | major = inb(ha->io_addr + IPS_REG_FLDP); | 2392 | major = inb(ha->io_addr + IPS_REG_FLDP); |
2393 | 2393 | ||
2394 | /* Get Minor version */ | 2394 | /* Get Minor version */ |
2395 | outl(cpu_to_le32(0x1FE), ha->io_addr + IPS_REG_FLAP); | 2395 | outl(0x1FE, ha->io_addr + IPS_REG_FLAP); |
2396 | if (ha->pcidev->revision == IPS_REVID_TROMBONE64) | 2396 | if (ha->pcidev->revision == IPS_REVID_TROMBONE64) |
2397 | udelay(25); /* 25 us */ | 2397 | udelay(25); /* 25 us */ |
2398 | 2398 | ||
2399 | minor = inb(ha->io_addr + IPS_REG_FLDP); | 2399 | minor = inb(ha->io_addr + IPS_REG_FLDP); |
2400 | 2400 | ||
2401 | /* Get SubMinor version */ | 2401 | /* Get SubMinor version */ |
2402 | outl(cpu_to_le32(0x1FD), ha->io_addr + IPS_REG_FLAP); | 2402 | outl(0x1FD, ha->io_addr + IPS_REG_FLAP); |
2403 | if (ha->pcidev->revision == IPS_REVID_TROMBONE64) | 2403 | if (ha->pcidev->revision == IPS_REVID_TROMBONE64) |
2404 | udelay(25); /* 25 us */ | 2404 | udelay(25); /* 25 us */ |
2405 | 2405 | ||
@@ -4852,7 +4852,7 @@ ips_init_copperhead(ips_ha_t * ha) | |||
4852 | return (0); | 4852 | return (0); |
4853 | 4853 | ||
4854 | /* setup CCCR */ | 4854 | /* setup CCCR */ |
4855 | outl(cpu_to_le32(0x1010), ha->io_addr + IPS_REG_CCCR); | 4855 | outl(0x1010, ha->io_addr + IPS_REG_CCCR); |
4856 | 4856 | ||
4857 | /* Enable busmastering */ | 4857 | /* Enable busmastering */ |
4858 | outb(IPS_BIT_EBM, ha->io_addr + IPS_REG_SCPR); | 4858 | outb(IPS_BIT_EBM, ha->io_addr + IPS_REG_SCPR); |
@@ -5234,12 +5234,12 @@ ips_statinit(ips_ha_t * ha) | |||
5234 | ha->adapt->p_status_tail = ha->adapt->status; | 5234 | ha->adapt->p_status_tail = ha->adapt->status; |
5235 | 5235 | ||
5236 | phys_status_start = ha->adapt->hw_status_start; | 5236 | phys_status_start = ha->adapt->hw_status_start; |
5237 | outl(cpu_to_le32(phys_status_start), ha->io_addr + IPS_REG_SQSR); | 5237 | outl(phys_status_start, ha->io_addr + IPS_REG_SQSR); |
5238 | outl(cpu_to_le32(phys_status_start + IPS_STATUS_Q_SIZE), | 5238 | outl(phys_status_start + IPS_STATUS_Q_SIZE, |
5239 | ha->io_addr + IPS_REG_SQER); | 5239 | ha->io_addr + IPS_REG_SQER); |
5240 | outl(cpu_to_le32(phys_status_start + IPS_STATUS_SIZE), | 5240 | outl(phys_status_start + IPS_STATUS_SIZE, |
5241 | ha->io_addr + IPS_REG_SQHR); | 5241 | ha->io_addr + IPS_REG_SQHR); |
5242 | outl(cpu_to_le32(phys_status_start), ha->io_addr + IPS_REG_SQTR); | 5242 | outl(phys_status_start, ha->io_addr + IPS_REG_SQTR); |
5243 | 5243 | ||
5244 | ha->adapt->hw_status_tail = phys_status_start; | 5244 | ha->adapt->hw_status_tail = phys_status_start; |
5245 | } | 5245 | } |
@@ -5296,7 +5296,7 @@ ips_statupd_copperhead(ips_ha_t * ha) | |||
5296 | ha->adapt->hw_status_tail = ha->adapt->hw_status_start; | 5296 | ha->adapt->hw_status_tail = ha->adapt->hw_status_start; |
5297 | } | 5297 | } |
5298 | 5298 | ||
5299 | outl(cpu_to_le32(ha->adapt->hw_status_tail), | 5299 | outl(ha->adapt->hw_status_tail, |
5300 | ha->io_addr + IPS_REG_SQTR); | 5300 | ha->io_addr + IPS_REG_SQTR); |
5301 | 5301 | ||
5302 | return (ha->adapt->p_status_tail->value); | 5302 | return (ha->adapt->p_status_tail->value); |
@@ -5398,8 +5398,8 @@ ips_issue_copperhead(ips_ha_t * ha, ips_scb_t * scb) | |||
5398 | } /* end if */ | 5398 | } /* end if */ |
5399 | } /* end while */ | 5399 | } /* end while */ |
5400 | 5400 | ||
5401 | outl(cpu_to_le32(scb->scb_busaddr), ha->io_addr + IPS_REG_CCSAR); | 5401 | outl(scb->scb_busaddr, ha->io_addr + IPS_REG_CCSAR); |
5402 | outw(cpu_to_le32(IPS_BIT_START_CMD), ha->io_addr + IPS_REG_CCCR); | 5402 | outw(IPS_BIT_START_CMD, ha->io_addr + IPS_REG_CCCR); |
5403 | 5403 | ||
5404 | return (IPS_SUCCESS); | 5404 | return (IPS_SUCCESS); |
5405 | } | 5405 | } |
@@ -5484,7 +5484,7 @@ ips_issue_i2o(ips_ha_t * ha, ips_scb_t * scb) | |||
5484 | ips_name, ha->host_num, scb->cmd.basic_io.command_id); | 5484 | ips_name, ha->host_num, scb->cmd.basic_io.command_id); |
5485 | } | 5485 | } |
5486 | 5486 | ||
5487 | outl(cpu_to_le32(scb->scb_busaddr), ha->io_addr + IPS_REG_I2O_INMSGQ); | 5487 | outl(scb->scb_busaddr, ha->io_addr + IPS_REG_I2O_INMSGQ); |
5488 | 5488 | ||
5489 | return (IPS_SUCCESS); | 5489 | return (IPS_SUCCESS); |
5490 | } | 5490 | } |
@@ -6376,7 +6376,7 @@ ips_program_bios(ips_ha_t * ha, char *buffer, uint32_t buffersize, | |||
6376 | 6376 | ||
6377 | for (i = 0; i < buffersize; i++) { | 6377 | for (i = 0; i < buffersize; i++) { |
6378 | /* write a byte */ | 6378 | /* write a byte */ |
6379 | outl(cpu_to_le32(i + offset), ha->io_addr + IPS_REG_FLAP); | 6379 | outl(i + offset, ha->io_addr + IPS_REG_FLAP); |
6380 | if (ha->pcidev->revision == IPS_REVID_TROMBONE64) | 6380 | if (ha->pcidev->revision == IPS_REVID_TROMBONE64) |
6381 | udelay(25); /* 25 us */ | 6381 | udelay(25); /* 25 us */ |
6382 | 6382 | ||
@@ -6561,7 +6561,7 @@ ips_verify_bios(ips_ha_t * ha, char *buffer, uint32_t buffersize, | |||
6561 | if (inb(ha->io_addr + IPS_REG_FLDP) != 0x55) | 6561 | if (inb(ha->io_addr + IPS_REG_FLDP) != 0x55) |
6562 | return (1); | 6562 | return (1); |
6563 | 6563 | ||
6564 | outl(cpu_to_le32(1), ha->io_addr + IPS_REG_FLAP); | 6564 | outl(1, ha->io_addr + IPS_REG_FLAP); |
6565 | if (ha->pcidev->revision == IPS_REVID_TROMBONE64) | 6565 | if (ha->pcidev->revision == IPS_REVID_TROMBONE64) |
6566 | udelay(25); /* 25 us */ | 6566 | udelay(25); /* 25 us */ |
6567 | if (inb(ha->io_addr + IPS_REG_FLDP) != 0xAA) | 6567 | if (inb(ha->io_addr + IPS_REG_FLDP) != 0xAA) |
@@ -6570,7 +6570,7 @@ ips_verify_bios(ips_ha_t * ha, char *buffer, uint32_t buffersize, | |||
6570 | checksum = 0xff; | 6570 | checksum = 0xff; |
6571 | for (i = 2; i < buffersize; i++) { | 6571 | for (i = 2; i < buffersize; i++) { |
6572 | 6572 | ||
6573 | outl(cpu_to_le32(i + offset), ha->io_addr + IPS_REG_FLAP); | 6573 | outl(i + offset, ha->io_addr + IPS_REG_FLAP); |
6574 | if (ha->pcidev->revision == IPS_REVID_TROMBONE64) | 6574 | if (ha->pcidev->revision == IPS_REVID_TROMBONE64) |
6575 | udelay(25); /* 25 us */ | 6575 | udelay(25); /* 25 us */ |
6576 | 6576 | ||